Stop infrun from tracking breakpoint insertion status.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
ab96bf03 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
d1f161ea 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ
25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840
DJ
29
30#ifndef NUM_ELEM
31#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
32#endif
33
00a97672
RS
34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ
60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
24718e3b 66static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 67
7f266840
DJ
68/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
69 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
70 in that slot. */
71
c19d1205 72static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ
73{
74 /* No relocation */
75 HOWTO (R_ARM_NONE, /* type */
76 0, /* rightshift */
77 0, /* size (0 = byte, 1 = short, 2 = long) */
78 0, /* bitsize */
79 FALSE, /* pc_relative */
80 0, /* bitpos */
81 complain_overflow_dont,/* complain_on_overflow */
82 bfd_elf_generic_reloc, /* special_function */
83 "R_ARM_NONE", /* name */
84 FALSE, /* partial_inplace */
85 0, /* src_mask */
86 0, /* dst_mask */
87 FALSE), /* pcrel_offset */
88
89 HOWTO (R_ARM_PC24, /* type */
90 2, /* rightshift */
91 2, /* size (0 = byte, 1 = short, 2 = long) */
92 24, /* bitsize */
93 TRUE, /* pc_relative */
94 0, /* bitpos */
95 complain_overflow_signed,/* complain_on_overflow */
96 bfd_elf_generic_reloc, /* special_function */
97 "R_ARM_PC24", /* name */
98 FALSE, /* partial_inplace */
99 0x00ffffff, /* src_mask */
100 0x00ffffff, /* dst_mask */
101 TRUE), /* pcrel_offset */
102
103 /* 32 bit absolute */
104 HOWTO (R_ARM_ABS32, /* type */
105 0, /* rightshift */
106 2, /* size (0 = byte, 1 = short, 2 = long) */
107 32, /* bitsize */
108 FALSE, /* pc_relative */
109 0, /* bitpos */
110 complain_overflow_bitfield,/* complain_on_overflow */
111 bfd_elf_generic_reloc, /* special_function */
112 "R_ARM_ABS32", /* name */
113 FALSE, /* partial_inplace */
114 0xffffffff, /* src_mask */
115 0xffffffff, /* dst_mask */
116 FALSE), /* pcrel_offset */
117
118 /* standard 32bit pc-relative reloc */
119 HOWTO (R_ARM_REL32, /* type */
120 0, /* rightshift */
121 2, /* size (0 = byte, 1 = short, 2 = long) */
122 32, /* bitsize */
123 TRUE, /* pc_relative */
124 0, /* bitpos */
125 complain_overflow_bitfield,/* complain_on_overflow */
126 bfd_elf_generic_reloc, /* special_function */
127 "R_ARM_REL32", /* name */
128 FALSE, /* partial_inplace */
129 0xffffffff, /* src_mask */
130 0xffffffff, /* dst_mask */
131 TRUE), /* pcrel_offset */
132
c19d1205 133 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 134 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ
135 0, /* rightshift */
136 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS
137 32, /* bitsize */
138 TRUE, /* pc_relative */
7f266840 139 0, /* bitpos */
4962c51a 140 complain_overflow_dont,/* complain_on_overflow */
7f266840 141 bfd_elf_generic_reloc, /* special_function */
4962c51a 142 "R_ARM_LDR_PC_G0", /* name */
7f266840 143 FALSE, /* partial_inplace */
4962c51a
MS
144 0xffffffff, /* src_mask */
145 0xffffffff, /* dst_mask */
146 TRUE), /* pcrel_offset */
7f266840
DJ
147
148 /* 16 bit absolute */
149 HOWTO (R_ARM_ABS16, /* type */
150 0, /* rightshift */
151 1, /* size (0 = byte, 1 = short, 2 = long) */
152 16, /* bitsize */
153 FALSE, /* pc_relative */
154 0, /* bitpos */
155 complain_overflow_bitfield,/* complain_on_overflow */
156 bfd_elf_generic_reloc, /* special_function */
157 "R_ARM_ABS16", /* name */
158 FALSE, /* partial_inplace */
159 0x0000ffff, /* src_mask */
160 0x0000ffff, /* dst_mask */
161 FALSE), /* pcrel_offset */
162
163 /* 12 bit absolute */
164 HOWTO (R_ARM_ABS12, /* type */
165 0, /* rightshift */
166 2, /* size (0 = byte, 1 = short, 2 = long) */
167 12, /* bitsize */
168 FALSE, /* pc_relative */
169 0, /* bitpos */
170 complain_overflow_bitfield,/* complain_on_overflow */
171 bfd_elf_generic_reloc, /* special_function */
172 "R_ARM_ABS12", /* name */
173 FALSE, /* partial_inplace */
00a97672
RS
174 0x00000fff, /* src_mask */
175 0x00000fff, /* dst_mask */
7f266840
DJ
176 FALSE), /* pcrel_offset */
177
178 HOWTO (R_ARM_THM_ABS5, /* type */
179 6, /* rightshift */
180 1, /* size (0 = byte, 1 = short, 2 = long) */
181 5, /* bitsize */
182 FALSE, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_bitfield,/* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_ARM_THM_ABS5", /* name */
187 FALSE, /* partial_inplace */
188 0x000007e0, /* src_mask */
189 0x000007e0, /* dst_mask */
190 FALSE), /* pcrel_offset */
191
192 /* 8 bit absolute */
193 HOWTO (R_ARM_ABS8, /* type */
194 0, /* rightshift */
195 0, /* size (0 = byte, 1 = short, 2 = long) */
196 8, /* bitsize */
197 FALSE, /* pc_relative */
198 0, /* bitpos */
199 complain_overflow_bitfield,/* complain_on_overflow */
200 bfd_elf_generic_reloc, /* special_function */
201 "R_ARM_ABS8", /* name */
202 FALSE, /* partial_inplace */
203 0x000000ff, /* src_mask */
204 0x000000ff, /* dst_mask */
205 FALSE), /* pcrel_offset */
206
207 HOWTO (R_ARM_SBREL32, /* type */
208 0, /* rightshift */
209 2, /* size (0 = byte, 1 = short, 2 = long) */
210 32, /* bitsize */
211 FALSE, /* pc_relative */
212 0, /* bitpos */
213 complain_overflow_dont,/* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_ARM_SBREL32", /* name */
216 FALSE, /* partial_inplace */
217 0xffffffff, /* src_mask */
218 0xffffffff, /* dst_mask */
219 FALSE), /* pcrel_offset */
220
c19d1205 221 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ
222 1, /* rightshift */
223 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 224 25, /* bitsize */
7f266840
DJ
225 TRUE, /* pc_relative */
226 0, /* bitpos */
227 complain_overflow_signed,/* complain_on_overflow */
228 bfd_elf_generic_reloc, /* special_function */
c19d1205 229 "R_ARM_THM_CALL", /* name */
7f266840
DJ
230 FALSE, /* partial_inplace */
231 0x07ff07ff, /* src_mask */
232 0x07ff07ff, /* dst_mask */
233 TRUE), /* pcrel_offset */
234
235 HOWTO (R_ARM_THM_PC8, /* type */
236 1, /* rightshift */
237 1, /* size (0 = byte, 1 = short, 2 = long) */
238 8, /* bitsize */
239 TRUE, /* pc_relative */
240 0, /* bitpos */
241 complain_overflow_signed,/* complain_on_overflow */
242 bfd_elf_generic_reloc, /* special_function */
243 "R_ARM_THM_PC8", /* name */
244 FALSE, /* partial_inplace */
245 0x000000ff, /* src_mask */
246 0x000000ff, /* dst_mask */
247 TRUE), /* pcrel_offset */
248
c19d1205 249 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ
250 1, /* rightshift */
251 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW
252 32, /* bitsize */
253 FALSE, /* pc_relative */
7f266840
DJ
254 0, /* bitpos */
255 complain_overflow_signed,/* complain_on_overflow */
256 bfd_elf_generic_reloc, /* special_function */
c19d1205 257 "R_ARM_BREL_ADJ", /* name */
7f266840 258 FALSE, /* partial_inplace */
c19d1205
ZW
259 0xffffffff, /* src_mask */
260 0xffffffff, /* dst_mask */
261 FALSE), /* pcrel_offset */
7f266840
DJ
262
263 HOWTO (R_ARM_SWI24, /* type */
264 0, /* rightshift */
265 0, /* size (0 = byte, 1 = short, 2 = long) */
266 0, /* bitsize */
267 FALSE, /* pc_relative */
268 0, /* bitpos */
269 complain_overflow_signed,/* complain_on_overflow */
270 bfd_elf_generic_reloc, /* special_function */
271 "R_ARM_SWI24", /* name */
272 FALSE, /* partial_inplace */
273 0x00000000, /* src_mask */
274 0x00000000, /* dst_mask */
275 FALSE), /* pcrel_offset */
276
277 HOWTO (R_ARM_THM_SWI8, /* type */
278 0, /* rightshift */
279 0, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_signed,/* complain_on_overflow */
284 bfd_elf_generic_reloc, /* special_function */
285 "R_ARM_SWI8", /* name */
286 FALSE, /* partial_inplace */
287 0x00000000, /* src_mask */
288 0x00000000, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* BLX instruction for the ARM. */
292 HOWTO (R_ARM_XPC25, /* type */
293 2, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 25, /* bitsize */
296 TRUE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_signed,/* complain_on_overflow */
299 bfd_elf_generic_reloc, /* special_function */
300 "R_ARM_XPC25", /* name */
301 FALSE, /* partial_inplace */
302 0x00ffffff, /* src_mask */
303 0x00ffffff, /* dst_mask */
304 TRUE), /* pcrel_offset */
305
306 /* BLX instruction for the Thumb. */
307 HOWTO (R_ARM_THM_XPC22, /* type */
308 2, /* rightshift */
309 2, /* size (0 = byte, 1 = short, 2 = long) */
310 22, /* bitsize */
311 TRUE, /* pc_relative */
312 0, /* bitpos */
313 complain_overflow_signed,/* complain_on_overflow */
314 bfd_elf_generic_reloc, /* special_function */
315 "R_ARM_THM_XPC22", /* name */
316 FALSE, /* partial_inplace */
317 0x07ff07ff, /* src_mask */
318 0x07ff07ff, /* dst_mask */
319 TRUE), /* pcrel_offset */
320
ba93b8ac 321 /* Dynamic TLS relocations. */
7f266840 322
ba93b8ac
DJ
323 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
324 0, /* rightshift */
325 2, /* size (0 = byte, 1 = short, 2 = long) */
326 32, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_bitfield,/* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_ARM_TLS_DTPMOD32", /* name */
332 TRUE, /* partial_inplace */
333 0xffffffff, /* src_mask */
334 0xffffffff, /* dst_mask */
335 FALSE), /* pcrel_offset */
7f266840 336
ba93b8ac
DJ
337 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
338 0, /* rightshift */
339 2, /* size (0 = byte, 1 = short, 2 = long) */
340 32, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield,/* complain_on_overflow */
344 bfd_elf_generic_reloc, /* special_function */
345 "R_ARM_TLS_DTPOFF32", /* name */
346 TRUE, /* partial_inplace */
347 0xffffffff, /* src_mask */
348 0xffffffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
7f266840 350
ba93b8ac
DJ
351 HOWTO (R_ARM_TLS_TPOFF32, /* type */
352 0, /* rightshift */
353 2, /* size (0 = byte, 1 = short, 2 = long) */
354 32, /* bitsize */
355 FALSE, /* pc_relative */
356 0, /* bitpos */
357 complain_overflow_bitfield,/* complain_on_overflow */
358 bfd_elf_generic_reloc, /* special_function */
359 "R_ARM_TLS_TPOFF32", /* name */
360 TRUE, /* partial_inplace */
361 0xffffffff, /* src_mask */
362 0xffffffff, /* dst_mask */
363 FALSE), /* pcrel_offset */
7f266840
DJ
364
365 /* Relocs used in ARM Linux */
366
367 HOWTO (R_ARM_COPY, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 32, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_bitfield,/* complain_on_overflow */
374 bfd_elf_generic_reloc, /* special_function */
375 "R_ARM_COPY", /* name */
376 TRUE, /* partial_inplace */
377 0xffffffff, /* src_mask */
378 0xffffffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 HOWTO (R_ARM_GLOB_DAT, /* type */
382 0, /* rightshift */
383 2, /* size (0 = byte, 1 = short, 2 = long) */
384 32, /* bitsize */
385 FALSE, /* pc_relative */
386 0, /* bitpos */
387 complain_overflow_bitfield,/* complain_on_overflow */
388 bfd_elf_generic_reloc, /* special_function */
389 "R_ARM_GLOB_DAT", /* name */
390 TRUE, /* partial_inplace */
391 0xffffffff, /* src_mask */
392 0xffffffff, /* dst_mask */
393 FALSE), /* pcrel_offset */
394
395 HOWTO (R_ARM_JUMP_SLOT, /* type */
396 0, /* rightshift */
397 2, /* size (0 = byte, 1 = short, 2 = long) */
398 32, /* bitsize */
399 FALSE, /* pc_relative */
400 0, /* bitpos */
401 complain_overflow_bitfield,/* complain_on_overflow */
402 bfd_elf_generic_reloc, /* special_function */
403 "R_ARM_JUMP_SLOT", /* name */
404 TRUE, /* partial_inplace */
405 0xffffffff, /* src_mask */
406 0xffffffff, /* dst_mask */
407 FALSE), /* pcrel_offset */
408
409 HOWTO (R_ARM_RELATIVE, /* type */
410 0, /* rightshift */
411 2, /* size (0 = byte, 1 = short, 2 = long) */
412 32, /* bitsize */
413 FALSE, /* pc_relative */
414 0, /* bitpos */
415 complain_overflow_bitfield,/* complain_on_overflow */
416 bfd_elf_generic_reloc, /* special_function */
417 "R_ARM_RELATIVE", /* name */
418 TRUE, /* partial_inplace */
419 0xffffffff, /* src_mask */
420 0xffffffff, /* dst_mask */
421 FALSE), /* pcrel_offset */
422
c19d1205 423 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ
424 0, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 32, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_bitfield,/* complain_on_overflow */
430 bfd_elf_generic_reloc, /* special_function */
c19d1205 431 "R_ARM_GOTOFF32", /* name */
7f266840
DJ
432 TRUE, /* partial_inplace */
433 0xffffffff, /* src_mask */
434 0xffffffff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 HOWTO (R_ARM_GOTPC, /* type */
438 0, /* rightshift */
439 2, /* size (0 = byte, 1 = short, 2 = long) */
440 32, /* bitsize */
441 TRUE, /* pc_relative */
442 0, /* bitpos */
443 complain_overflow_bitfield,/* complain_on_overflow */
444 bfd_elf_generic_reloc, /* special_function */
445 "R_ARM_GOTPC", /* name */
446 TRUE, /* partial_inplace */
447 0xffffffff, /* src_mask */
448 0xffffffff, /* dst_mask */
449 TRUE), /* pcrel_offset */
450
451 HOWTO (R_ARM_GOT32, /* type */
452 0, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 32, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_bitfield,/* complain_on_overflow */
458 bfd_elf_generic_reloc, /* special_function */
459 "R_ARM_GOT32", /* name */
460 TRUE, /* partial_inplace */
461 0xffffffff, /* src_mask */
462 0xffffffff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 HOWTO (R_ARM_PLT32, /* type */
466 2, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 468 24, /* bitsize */
7f266840
DJ
469 TRUE, /* pc_relative */
470 0, /* bitpos */
471 complain_overflow_bitfield,/* complain_on_overflow */
472 bfd_elf_generic_reloc, /* special_function */
473 "R_ARM_PLT32", /* name */
ce490eda 474 FALSE, /* partial_inplace */
7f266840
DJ
475 0x00ffffff, /* src_mask */
476 0x00ffffff, /* dst_mask */
477 TRUE), /* pcrel_offset */
478
479 HOWTO (R_ARM_CALL, /* type */
480 2, /* rightshift */
481 2, /* size (0 = byte, 1 = short, 2 = long) */
482 24, /* bitsize */
483 TRUE, /* pc_relative */
484 0, /* bitpos */
485 complain_overflow_signed,/* complain_on_overflow */
486 bfd_elf_generic_reloc, /* special_function */
487 "R_ARM_CALL", /* name */
488 FALSE, /* partial_inplace */
489 0x00ffffff, /* src_mask */
490 0x00ffffff, /* dst_mask */
491 TRUE), /* pcrel_offset */
492
493 HOWTO (R_ARM_JUMP24, /* type */
494 2, /* rightshift */
495 2, /* size (0 = byte, 1 = short, 2 = long) */
496 24, /* bitsize */
497 TRUE, /* pc_relative */
498 0, /* bitpos */
499 complain_overflow_signed,/* complain_on_overflow */
500 bfd_elf_generic_reloc, /* special_function */
501 "R_ARM_JUMP24", /* name */
502 FALSE, /* partial_inplace */
503 0x00ffffff, /* src_mask */
504 0x00ffffff, /* dst_mask */
505 TRUE), /* pcrel_offset */
506
c19d1205
ZW
507 HOWTO (R_ARM_THM_JUMP24, /* type */
508 1, /* rightshift */
509 2, /* size (0 = byte, 1 = short, 2 = long) */
510 24, /* bitsize */
511 TRUE, /* pc_relative */
7f266840 512 0, /* bitpos */
c19d1205 513 complain_overflow_signed,/* complain_on_overflow */
7f266840 514 bfd_elf_generic_reloc, /* special_function */
c19d1205 515 "R_ARM_THM_JUMP24", /* name */
7f266840 516 FALSE, /* partial_inplace */
c19d1205
ZW
517 0x07ff2fff, /* src_mask */
518 0x07ff2fff, /* dst_mask */
519 TRUE), /* pcrel_offset */
7f266840 520
c19d1205 521 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 522 0, /* rightshift */
c19d1205
ZW
523 2, /* size (0 = byte, 1 = short, 2 = long) */
524 32, /* bitsize */
7f266840
DJ
525 FALSE, /* pc_relative */
526 0, /* bitpos */
527 complain_overflow_dont,/* complain_on_overflow */
528 bfd_elf_generic_reloc, /* special_function */
c19d1205 529 "R_ARM_BASE_ABS", /* name */
7f266840 530 FALSE, /* partial_inplace */
c19d1205
ZW
531 0xffffffff, /* src_mask */
532 0xffffffff, /* dst_mask */
7f266840
DJ
533 FALSE), /* pcrel_offset */
534
535 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
536 0, /* rightshift */
537 2, /* size (0 = byte, 1 = short, 2 = long) */
538 12, /* bitsize */
539 TRUE, /* pc_relative */
540 0, /* bitpos */
541 complain_overflow_dont,/* complain_on_overflow */
542 bfd_elf_generic_reloc, /* special_function */
543 "R_ARM_ALU_PCREL_7_0", /* name */
544 FALSE, /* partial_inplace */
545 0x00000fff, /* src_mask */
546 0x00000fff, /* dst_mask */
547 TRUE), /* pcrel_offset */
548
549 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
550 0, /* rightshift */
551 2, /* size (0 = byte, 1 = short, 2 = long) */
552 12, /* bitsize */
553 TRUE, /* pc_relative */
554 8, /* bitpos */
555 complain_overflow_dont,/* complain_on_overflow */
556 bfd_elf_generic_reloc, /* special_function */
557 "R_ARM_ALU_PCREL_15_8",/* name */
558 FALSE, /* partial_inplace */
559 0x00000fff, /* src_mask */
560 0x00000fff, /* dst_mask */
561 TRUE), /* pcrel_offset */
562
563 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
564 0, /* rightshift */
565 2, /* size (0 = byte, 1 = short, 2 = long) */
566 12, /* bitsize */
567 TRUE, /* pc_relative */
568 16, /* bitpos */
569 complain_overflow_dont,/* complain_on_overflow */
570 bfd_elf_generic_reloc, /* special_function */
571 "R_ARM_ALU_PCREL_23_15",/* name */
572 FALSE, /* partial_inplace */
573 0x00000fff, /* src_mask */
574 0x00000fff, /* dst_mask */
575 TRUE), /* pcrel_offset */
576
577 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
578 0, /* rightshift */
579 2, /* size (0 = byte, 1 = short, 2 = long) */
580 12, /* bitsize */
581 FALSE, /* pc_relative */
582 0, /* bitpos */
583 complain_overflow_dont,/* complain_on_overflow */
584 bfd_elf_generic_reloc, /* special_function */
585 "R_ARM_LDR_SBREL_11_0",/* name */
586 FALSE, /* partial_inplace */
587 0x00000fff, /* src_mask */
588 0x00000fff, /* dst_mask */
589 FALSE), /* pcrel_offset */
590
591 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
592 0, /* rightshift */
593 2, /* size (0 = byte, 1 = short, 2 = long) */
594 8, /* bitsize */
595 FALSE, /* pc_relative */
596 12, /* bitpos */
597 complain_overflow_dont,/* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
599 "R_ARM_ALU_SBREL_19_12",/* name */
600 FALSE, /* partial_inplace */
601 0x000ff000, /* src_mask */
602 0x000ff000, /* dst_mask */
603 FALSE), /* pcrel_offset */
604
605 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 8, /* bitsize */
609 FALSE, /* pc_relative */
610 20, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 bfd_elf_generic_reloc, /* special_function */
613 "R_ARM_ALU_SBREL_27_20",/* name */
614 FALSE, /* partial_inplace */
615 0x0ff00000, /* src_mask */
616 0x0ff00000, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 HOWTO (R_ARM_TARGET1, /* type */
620 0, /* rightshift */
621 2, /* size (0 = byte, 1 = short, 2 = long) */
622 32, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_dont,/* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_ARM_TARGET1", /* name */
628 FALSE, /* partial_inplace */
629 0xffffffff, /* src_mask */
630 0xffffffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 HOWTO (R_ARM_ROSEGREL32, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_dont,/* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_ARM_ROSEGREL32", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 HOWTO (R_ARM_V4BX, /* type */
648 0, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 32, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_ARM_V4BX", /* name */
656 FALSE, /* partial_inplace */
657 0xffffffff, /* src_mask */
658 0xffffffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 HOWTO (R_ARM_TARGET2, /* type */
662 0, /* rightshift */
663 2, /* size (0 = byte, 1 = short, 2 = long) */
664 32, /* bitsize */
665 FALSE, /* pc_relative */
666 0, /* bitpos */
667 complain_overflow_signed,/* complain_on_overflow */
668 bfd_elf_generic_reloc, /* special_function */
669 "R_ARM_TARGET2", /* name */
670 FALSE, /* partial_inplace */
671 0xffffffff, /* src_mask */
672 0xffffffff, /* dst_mask */
673 TRUE), /* pcrel_offset */
674
675 HOWTO (R_ARM_PREL31, /* type */
676 0, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 31, /* bitsize */
679 TRUE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_signed,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_ARM_PREL31", /* name */
684 FALSE, /* partial_inplace */
685 0x7fffffff, /* src_mask */
686 0x7fffffff, /* dst_mask */
687 TRUE), /* pcrel_offset */
c19d1205
ZW
688
689 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
690 0, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 16, /* bitsize */
693 FALSE, /* pc_relative */
694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_ARM_MOVW_ABS_NC", /* name */
698 FALSE, /* partial_inplace */
699 0x0000ffff, /* src_mask */
700 0x0000ffff, /* dst_mask */
701 FALSE), /* pcrel_offset */
702
703 HOWTO (R_ARM_MOVT_ABS, /* type */
704 0, /* rightshift */
705 2, /* size (0 = byte, 1 = short, 2 = long) */
706 16, /* bitsize */
707 FALSE, /* pc_relative */
708 0, /* bitpos */
709 complain_overflow_bitfield,/* complain_on_overflow */
710 bfd_elf_generic_reloc, /* special_function */
711 "R_ARM_MOVT_ABS", /* name */
712 FALSE, /* partial_inplace */
713 0x0000ffff, /* src_mask */
714 0x0000ffff, /* dst_mask */
715 FALSE), /* pcrel_offset */
716
717 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
718 0, /* rightshift */
719 2, /* size (0 = byte, 1 = short, 2 = long) */
720 16, /* bitsize */
721 TRUE, /* pc_relative */
722 0, /* bitpos */
723 complain_overflow_dont,/* complain_on_overflow */
724 bfd_elf_generic_reloc, /* special_function */
725 "R_ARM_MOVW_PREL_NC", /* name */
726 FALSE, /* partial_inplace */
727 0x0000ffff, /* src_mask */
728 0x0000ffff, /* dst_mask */
729 TRUE), /* pcrel_offset */
730
731 HOWTO (R_ARM_MOVT_PREL, /* type */
732 0, /* rightshift */
733 2, /* size (0 = byte, 1 = short, 2 = long) */
734 16, /* bitsize */
735 TRUE, /* pc_relative */
736 0, /* bitpos */
737 complain_overflow_bitfield,/* complain_on_overflow */
738 bfd_elf_generic_reloc, /* special_function */
739 "R_ARM_MOVT_PREL", /* name */
740 FALSE, /* partial_inplace */
741 0x0000ffff, /* src_mask */
742 0x0000ffff, /* dst_mask */
743 TRUE), /* pcrel_offset */
744
745 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
746 0, /* rightshift */
747 2, /* size (0 = byte, 1 = short, 2 = long) */
748 16, /* bitsize */
749 FALSE, /* pc_relative */
750 0, /* bitpos */
751 complain_overflow_dont,/* complain_on_overflow */
752 bfd_elf_generic_reloc, /* special_function */
753 "R_ARM_THM_MOVW_ABS_NC",/* name */
754 FALSE, /* partial_inplace */
755 0x040f70ff, /* src_mask */
756 0x040f70ff, /* dst_mask */
757 FALSE), /* pcrel_offset */
758
759 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
760 0, /* rightshift */
761 2, /* size (0 = byte, 1 = short, 2 = long) */
762 16, /* bitsize */
763 FALSE, /* pc_relative */
764 0, /* bitpos */
765 complain_overflow_bitfield,/* complain_on_overflow */
766 bfd_elf_generic_reloc, /* special_function */
767 "R_ARM_THM_MOVT_ABS", /* name */
768 FALSE, /* partial_inplace */
769 0x040f70ff, /* src_mask */
770 0x040f70ff, /* dst_mask */
771 FALSE), /* pcrel_offset */
772
773 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
774 0, /* rightshift */
775 2, /* size (0 = byte, 1 = short, 2 = long) */
776 16, /* bitsize */
777 TRUE, /* pc_relative */
778 0, /* bitpos */
779 complain_overflow_dont,/* complain_on_overflow */
780 bfd_elf_generic_reloc, /* special_function */
781 "R_ARM_THM_MOVW_PREL_NC",/* name */
782 FALSE, /* partial_inplace */
783 0x040f70ff, /* src_mask */
784 0x040f70ff, /* dst_mask */
785 TRUE), /* pcrel_offset */
786
787 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
788 0, /* rightshift */
789 2, /* size (0 = byte, 1 = short, 2 = long) */
790 16, /* bitsize */
791 TRUE, /* pc_relative */
792 0, /* bitpos */
793 complain_overflow_bitfield,/* complain_on_overflow */
794 bfd_elf_generic_reloc, /* special_function */
795 "R_ARM_THM_MOVT_PREL", /* name */
796 FALSE, /* partial_inplace */
797 0x040f70ff, /* src_mask */
798 0x040f70ff, /* dst_mask */
799 TRUE), /* pcrel_offset */
800
801 HOWTO (R_ARM_THM_JUMP19, /* type */
802 1, /* rightshift */
803 2, /* size (0 = byte, 1 = short, 2 = long) */
804 19, /* bitsize */
805 TRUE, /* pc_relative */
806 0, /* bitpos */
807 complain_overflow_signed,/* complain_on_overflow */
808 bfd_elf_generic_reloc, /* special_function */
809 "R_ARM_THM_JUMP19", /* name */
810 FALSE, /* partial_inplace */
811 0x043f2fff, /* src_mask */
812 0x043f2fff, /* dst_mask */
813 TRUE), /* pcrel_offset */
814
815 HOWTO (R_ARM_THM_JUMP6, /* type */
816 1, /* rightshift */
817 1, /* size (0 = byte, 1 = short, 2 = long) */
818 6, /* bitsize */
819 TRUE, /* pc_relative */
820 0, /* bitpos */
821 complain_overflow_unsigned,/* complain_on_overflow */
822 bfd_elf_generic_reloc, /* special_function */
823 "R_ARM_THM_JUMP6", /* name */
824 FALSE, /* partial_inplace */
825 0x02f8, /* src_mask */
826 0x02f8, /* dst_mask */
827 TRUE), /* pcrel_offset */
828
829 /* These are declared as 13-bit signed relocations because we can
830 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
831 versa. */
832 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
833 0, /* rightshift */
834 2, /* size (0 = byte, 1 = short, 2 = long) */
835 13, /* bitsize */
836 TRUE, /* pc_relative */
837 0, /* bitpos */
2cab6cc3 838 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW
839 bfd_elf_generic_reloc, /* special_function */
840 "R_ARM_THM_ALU_PREL_11_0",/* name */
841 FALSE, /* partial_inplace */
2cab6cc3
MS
842 0xffffffff, /* src_mask */
843 0xffffffff, /* dst_mask */
c19d1205
ZW
844 TRUE), /* pcrel_offset */
845
846 HOWTO (R_ARM_THM_PC12, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 13, /* bitsize */
850 TRUE, /* pc_relative */
851 0, /* bitpos */
2cab6cc3 852 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW
853 bfd_elf_generic_reloc, /* special_function */
854 "R_ARM_THM_PC12", /* name */
855 FALSE, /* partial_inplace */
2cab6cc3
MS
856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
c19d1205
ZW
858 TRUE), /* pcrel_offset */
859
860 HOWTO (R_ARM_ABS32_NOI, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_dont,/* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_ARM_ABS32_NOI", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 HOWTO (R_ARM_REL32_NOI, /* type */
875 0, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 32, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_dont,/* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 "R_ARM_REL32_NOI", /* name */
883 FALSE, /* partial_inplace */
884 0xffffffff, /* src_mask */
885 0xffffffff, /* dst_mask */
886 FALSE), /* pcrel_offset */
7f266840 887
4962c51a
MS
888 /* Group relocations. */
889
890 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
891 0, /* rightshift */
892 2, /* size (0 = byte, 1 = short, 2 = long) */
893 32, /* bitsize */
894 TRUE, /* pc_relative */
895 0, /* bitpos */
896 complain_overflow_dont,/* complain_on_overflow */
897 bfd_elf_generic_reloc, /* special_function */
898 "R_ARM_ALU_PC_G0_NC", /* name */
899 FALSE, /* partial_inplace */
900 0xffffffff, /* src_mask */
901 0xffffffff, /* dst_mask */
902 TRUE), /* pcrel_offset */
903
904 HOWTO (R_ARM_ALU_PC_G0, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_dont,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_ARM_ALU_PC_G0", /* name */
913 FALSE, /* partial_inplace */
914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
919 0, /* rightshift */
920 2, /* size (0 = byte, 1 = short, 2 = long) */
921 32, /* bitsize */
922 TRUE, /* pc_relative */
923 0, /* bitpos */
924 complain_overflow_dont,/* complain_on_overflow */
925 bfd_elf_generic_reloc, /* special_function */
926 "R_ARM_ALU_PC_G1_NC", /* name */
927 FALSE, /* partial_inplace */
928 0xffffffff, /* src_mask */
929 0xffffffff, /* dst_mask */
930 TRUE), /* pcrel_offset */
931
932 HOWTO (R_ARM_ALU_PC_G1, /* type */
933 0, /* rightshift */
934 2, /* size (0 = byte, 1 = short, 2 = long) */
935 32, /* bitsize */
936 TRUE, /* pc_relative */
937 0, /* bitpos */
938 complain_overflow_dont,/* complain_on_overflow */
939 bfd_elf_generic_reloc, /* special_function */
940 "R_ARM_ALU_PC_G1", /* name */
941 FALSE, /* partial_inplace */
942 0xffffffff, /* src_mask */
943 0xffffffff, /* dst_mask */
944 TRUE), /* pcrel_offset */
945
946 HOWTO (R_ARM_ALU_PC_G2, /* type */
947 0, /* rightshift */
948 2, /* size (0 = byte, 1 = short, 2 = long) */
949 32, /* bitsize */
950 TRUE, /* pc_relative */
951 0, /* bitpos */
952 complain_overflow_dont,/* complain_on_overflow */
953 bfd_elf_generic_reloc, /* special_function */
954 "R_ARM_ALU_PC_G2", /* name */
955 FALSE, /* partial_inplace */
956 0xffffffff, /* src_mask */
957 0xffffffff, /* dst_mask */
958 TRUE), /* pcrel_offset */
959
960 HOWTO (R_ARM_LDR_PC_G1, /* type */
961 0, /* rightshift */
962 2, /* size (0 = byte, 1 = short, 2 = long) */
963 32, /* bitsize */
964 TRUE, /* pc_relative */
965 0, /* bitpos */
966 complain_overflow_dont,/* complain_on_overflow */
967 bfd_elf_generic_reloc, /* special_function */
968 "R_ARM_LDR_PC_G1", /* name */
969 FALSE, /* partial_inplace */
970 0xffffffff, /* src_mask */
971 0xffffffff, /* dst_mask */
972 TRUE), /* pcrel_offset */
973
974 HOWTO (R_ARM_LDR_PC_G2, /* type */
975 0, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 32, /* bitsize */
978 TRUE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont,/* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 "R_ARM_LDR_PC_G2", /* name */
983 FALSE, /* partial_inplace */
984 0xffffffff, /* src_mask */
985 0xffffffff, /* dst_mask */
986 TRUE), /* pcrel_offset */
987
988 HOWTO (R_ARM_LDRS_PC_G0, /* type */
989 0, /* rightshift */
990 2, /* size (0 = byte, 1 = short, 2 = long) */
991 32, /* bitsize */
992 TRUE, /* pc_relative */
993 0, /* bitpos */
994 complain_overflow_dont,/* complain_on_overflow */
995 bfd_elf_generic_reloc, /* special_function */
996 "R_ARM_LDRS_PC_G0", /* name */
997 FALSE, /* partial_inplace */
998 0xffffffff, /* src_mask */
999 0xffffffff, /* dst_mask */
1000 TRUE), /* pcrel_offset */
1001
1002 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1003 0, /* rightshift */
1004 2, /* size (0 = byte, 1 = short, 2 = long) */
1005 32, /* bitsize */
1006 TRUE, /* pc_relative */
1007 0, /* bitpos */
1008 complain_overflow_dont,/* complain_on_overflow */
1009 bfd_elf_generic_reloc, /* special_function */
1010 "R_ARM_LDRS_PC_G1", /* name */
1011 FALSE, /* partial_inplace */
1012 0xffffffff, /* src_mask */
1013 0xffffffff, /* dst_mask */
1014 TRUE), /* pcrel_offset */
1015
1016 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1017 0, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 32, /* bitsize */
1020 TRUE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_ARM_LDRS_PC_G2", /* name */
1025 FALSE, /* partial_inplace */
1026 0xffffffff, /* src_mask */
1027 0xffffffff, /* dst_mask */
1028 TRUE), /* pcrel_offset */
1029
1030 HOWTO (R_ARM_LDC_PC_G0, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 32, /* bitsize */
1034 TRUE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_ARM_LDC_PC_G0", /* name */
1039 FALSE, /* partial_inplace */
1040 0xffffffff, /* src_mask */
1041 0xffffffff, /* dst_mask */
1042 TRUE), /* pcrel_offset */
1043
1044 HOWTO (R_ARM_LDC_PC_G1, /* type */
1045 0, /* rightshift */
1046 2, /* size (0 = byte, 1 = short, 2 = long) */
1047 32, /* bitsize */
1048 TRUE, /* pc_relative */
1049 0, /* bitpos */
1050 complain_overflow_dont,/* complain_on_overflow */
1051 bfd_elf_generic_reloc, /* special_function */
1052 "R_ARM_LDC_PC_G1", /* name */
1053 FALSE, /* partial_inplace */
1054 0xffffffff, /* src_mask */
1055 0xffffffff, /* dst_mask */
1056 TRUE), /* pcrel_offset */
1057
1058 HOWTO (R_ARM_LDC_PC_G2, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 32, /* bitsize */
1062 TRUE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont,/* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_ARM_LDC_PC_G2", /* name */
1067 FALSE, /* partial_inplace */
1068 0xffffffff, /* src_mask */
1069 0xffffffff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 TRUE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_ARM_ALU_SB_G0_NC", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 TRUE), /* pcrel_offset */
1085
1086 HOWTO (R_ARM_ALU_SB_G0, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 32, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_ARM_ALU_SB_G0", /* name */
1095 FALSE, /* partial_inplace */
1096 0xffffffff, /* src_mask */
1097 0xffffffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 TRUE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 bfd_elf_generic_reloc, /* special_function */
1108 "R_ARM_ALU_SB_G1_NC", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 TRUE), /* pcrel_offset */
1113
1114 HOWTO (R_ARM_ALU_SB_G1, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
1118 TRUE, /* pc_relative */
1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 bfd_elf_generic_reloc, /* special_function */
1122 "R_ARM_ALU_SB_G1", /* name */
1123 FALSE, /* partial_inplace */
1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
1126 TRUE), /* pcrel_offset */
1127
1128 HOWTO (R_ARM_ALU_SB_G2, /* type */
1129 0, /* rightshift */
1130 2, /* size (0 = byte, 1 = short, 2 = long) */
1131 32, /* bitsize */
1132 TRUE, /* pc_relative */
1133 0, /* bitpos */
1134 complain_overflow_dont,/* complain_on_overflow */
1135 bfd_elf_generic_reloc, /* special_function */
1136 "R_ARM_ALU_SB_G2", /* name */
1137 FALSE, /* partial_inplace */
1138 0xffffffff, /* src_mask */
1139 0xffffffff, /* dst_mask */
1140 TRUE), /* pcrel_offset */
1141
1142 HOWTO (R_ARM_LDR_SB_G0, /* type */
1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 32, /* bitsize */
1146 TRUE, /* pc_relative */
1147 0, /* bitpos */
1148 complain_overflow_dont,/* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
1150 "R_ARM_LDR_SB_G0", /* name */
1151 FALSE, /* partial_inplace */
1152 0xffffffff, /* src_mask */
1153 0xffffffff, /* dst_mask */
1154 TRUE), /* pcrel_offset */
1155
1156 HOWTO (R_ARM_LDR_SB_G1, /* type */
1157 0, /* rightshift */
1158 2, /* size (0 = byte, 1 = short, 2 = long) */
1159 32, /* bitsize */
1160 TRUE, /* pc_relative */
1161 0, /* bitpos */
1162 complain_overflow_dont,/* complain_on_overflow */
1163 bfd_elf_generic_reloc, /* special_function */
1164 "R_ARM_LDR_SB_G1", /* name */
1165 FALSE, /* partial_inplace */
1166 0xffffffff, /* src_mask */
1167 0xffffffff, /* dst_mask */
1168 TRUE), /* pcrel_offset */
1169
1170 HOWTO (R_ARM_LDR_SB_G2, /* type */
1171 0, /* rightshift */
1172 2, /* size (0 = byte, 1 = short, 2 = long) */
1173 32, /* bitsize */
1174 TRUE, /* pc_relative */
1175 0, /* bitpos */
1176 complain_overflow_dont,/* complain_on_overflow */
1177 bfd_elf_generic_reloc, /* special_function */
1178 "R_ARM_LDR_SB_G2", /* name */
1179 FALSE, /* partial_inplace */
1180 0xffffffff, /* src_mask */
1181 0xffffffff, /* dst_mask */
1182 TRUE), /* pcrel_offset */
1183
1184 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1185 0, /* rightshift */
1186 2, /* size (0 = byte, 1 = short, 2 = long) */
1187 32, /* bitsize */
1188 TRUE, /* pc_relative */
1189 0, /* bitpos */
1190 complain_overflow_dont,/* complain_on_overflow */
1191 bfd_elf_generic_reloc, /* special_function */
1192 "R_ARM_LDRS_SB_G0", /* name */
1193 FALSE, /* partial_inplace */
1194 0xffffffff, /* src_mask */
1195 0xffffffff, /* dst_mask */
1196 TRUE), /* pcrel_offset */
1197
1198 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1199 0, /* rightshift */
1200 2, /* size (0 = byte, 1 = short, 2 = long) */
1201 32, /* bitsize */
1202 TRUE, /* pc_relative */
1203 0, /* bitpos */
1204 complain_overflow_dont,/* complain_on_overflow */
1205 bfd_elf_generic_reloc, /* special_function */
1206 "R_ARM_LDRS_SB_G1", /* name */
1207 FALSE, /* partial_inplace */
1208 0xffffffff, /* src_mask */
1209 0xffffffff, /* dst_mask */
1210 TRUE), /* pcrel_offset */
1211
1212 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1213 0, /* rightshift */
1214 2, /* size (0 = byte, 1 = short, 2 = long) */
1215 32, /* bitsize */
1216 TRUE, /* pc_relative */
1217 0, /* bitpos */
1218 complain_overflow_dont,/* complain_on_overflow */
1219 bfd_elf_generic_reloc, /* special_function */
1220 "R_ARM_LDRS_SB_G2", /* name */
1221 FALSE, /* partial_inplace */
1222 0xffffffff, /* src_mask */
1223 0xffffffff, /* dst_mask */
1224 TRUE), /* pcrel_offset */
1225
1226 HOWTO (R_ARM_LDC_SB_G0, /* type */
1227 0, /* rightshift */
1228 2, /* size (0 = byte, 1 = short, 2 = long) */
1229 32, /* bitsize */
1230 TRUE, /* pc_relative */
1231 0, /* bitpos */
1232 complain_overflow_dont,/* complain_on_overflow */
1233 bfd_elf_generic_reloc, /* special_function */
1234 "R_ARM_LDC_SB_G0", /* name */
1235 FALSE, /* partial_inplace */
1236 0xffffffff, /* src_mask */
1237 0xffffffff, /* dst_mask */
1238 TRUE), /* pcrel_offset */
1239
1240 HOWTO (R_ARM_LDC_SB_G1, /* type */
1241 0, /* rightshift */
1242 2, /* size (0 = byte, 1 = short, 2 = long) */
1243 32, /* bitsize */
1244 TRUE, /* pc_relative */
1245 0, /* bitpos */
1246 complain_overflow_dont,/* complain_on_overflow */
1247 bfd_elf_generic_reloc, /* special_function */
1248 "R_ARM_LDC_SB_G1", /* name */
1249 FALSE, /* partial_inplace */
1250 0xffffffff, /* src_mask */
1251 0xffffffff, /* dst_mask */
1252 TRUE), /* pcrel_offset */
1253
1254 HOWTO (R_ARM_LDC_SB_G2, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 TRUE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 "R_ARM_LDC_SB_G2", /* name */
1263 FALSE, /* partial_inplace */
1264 0xffffffff, /* src_mask */
1265 0xffffffff, /* dst_mask */
1266 TRUE), /* pcrel_offset */
1267
1268 /* End of group relocations. */
c19d1205 1269
c19d1205
ZW
1270 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1271 0, /* rightshift */
1272 2, /* size (0 = byte, 1 = short, 2 = long) */
1273 16, /* bitsize */
1274 FALSE, /* pc_relative */
1275 0, /* bitpos */
1276 complain_overflow_dont,/* complain_on_overflow */
1277 bfd_elf_generic_reloc, /* special_function */
1278 "R_ARM_MOVW_BREL_NC", /* name */
1279 FALSE, /* partial_inplace */
1280 0x0000ffff, /* src_mask */
1281 0x0000ffff, /* dst_mask */
1282 FALSE), /* pcrel_offset */
1283
1284 HOWTO (R_ARM_MOVT_BREL, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_bitfield,/* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 "R_ARM_MOVT_BREL", /* name */
1293 FALSE, /* partial_inplace */
1294 0x0000ffff, /* src_mask */
1295 0x0000ffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 HOWTO (R_ARM_MOVW_BREL, /* type */
1299 0, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 16, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_ARM_MOVW_BREL", /* name */
1307 FALSE, /* partial_inplace */
1308 0x0000ffff, /* src_mask */
1309 0x0000ffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 16, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_ARM_THM_MOVW_BREL_NC",/* name */
1321 FALSE, /* partial_inplace */
1322 0x040f70ff, /* src_mask */
1323 0x040f70ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1327 0, /* rightshift */
1328 2, /* size (0 = byte, 1 = short, 2 = long) */
1329 16, /* bitsize */
1330 FALSE, /* pc_relative */
1331 0, /* bitpos */
1332 complain_overflow_bitfield,/* complain_on_overflow */
1333 bfd_elf_generic_reloc, /* special_function */
1334 "R_ARM_THM_MOVT_BREL", /* name */
1335 FALSE, /* partial_inplace */
1336 0x040f70ff, /* src_mask */
1337 0x040f70ff, /* dst_mask */
1338 FALSE), /* pcrel_offset */
1339
1340 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1341 0, /* rightshift */
1342 2, /* size (0 = byte, 1 = short, 2 = long) */
1343 16, /* bitsize */
1344 FALSE, /* pc_relative */
1345 0, /* bitpos */
1346 complain_overflow_dont,/* complain_on_overflow */
1347 bfd_elf_generic_reloc, /* special_function */
1348 "R_ARM_THM_MOVW_BREL", /* name */
1349 FALSE, /* partial_inplace */
1350 0x040f70ff, /* src_mask */
1351 0x040f70ff, /* dst_mask */
1352 FALSE), /* pcrel_offset */
1353
1354 EMPTY_HOWTO (90), /* unallocated */
1355 EMPTY_HOWTO (91),
1356 EMPTY_HOWTO (92),
1357 EMPTY_HOWTO (93),
1358
1359 HOWTO (R_ARM_PLT32_ABS, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_dont,/* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_ARM_PLT32_ABS", /* name */
1368 FALSE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_GOT_ABS, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 32, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_GOT_ABS", /* name */
1382 FALSE, /* partial_inplace */
1383 0xffffffff, /* src_mask */
1384 0xffffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_GOT_PREL, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 32, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_GOT_PREL", /* name */
1396 FALSE, /* partial_inplace */
1397 0xffffffff, /* src_mask */
1398 0xffffffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_GOT_BREL12, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 12, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_bitfield,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_GOT_BREL12", /* name */
1410 FALSE, /* partial_inplace */
1411 0x00000fff, /* src_mask */
1412 0x00000fff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_GOTOFF12, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 12, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_bitfield,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_GOTOFF12", /* name */
1424 FALSE, /* partial_inplace */
1425 0x00000fff, /* src_mask */
1426 0x00000fff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1430
1431 /* GNU extension to record C++ vtable member usage */
1432 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ
1433 0, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1435 0, /* bitsize */
ba93b8ac
DJ
1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
c19d1205
ZW
1438 complain_overflow_dont, /* complain_on_overflow */
1439 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1440 "R_ARM_GNU_VTENTRY", /* name */
1441 FALSE, /* partial_inplace */
1442 0, /* src_mask */
1443 0, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* GNU extension to record C++ vtable hierarchy */
1447 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 0, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 NULL, /* special_function */
1455 "R_ARM_GNU_VTINHERIT", /* name */
1456 FALSE, /* partial_inplace */
1457 0, /* src_mask */
1458 0, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_ARM_THM_JUMP11, /* type */
1462 1, /* rightshift */
1463 1, /* size (0 = byte, 1 = short, 2 = long) */
1464 11, /* bitsize */
1465 TRUE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_ARM_THM_JUMP11", /* name */
1470 FALSE, /* partial_inplace */
1471 0x000007ff, /* src_mask */
1472 0x000007ff, /* dst_mask */
1473 TRUE), /* pcrel_offset */
1474
1475 HOWTO (R_ARM_THM_JUMP8, /* type */
1476 1, /* rightshift */
1477 1, /* size (0 = byte, 1 = short, 2 = long) */
1478 8, /* bitsize */
1479 TRUE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_ARM_THM_JUMP8", /* name */
1484 FALSE, /* partial_inplace */
1485 0x000000ff, /* src_mask */
1486 0x000000ff, /* dst_mask */
1487 TRUE), /* pcrel_offset */
ba93b8ac 1488
c19d1205
ZW
1489 /* TLS relocations */
1490 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ
1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 32, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW
1497 NULL, /* special_function */
1498 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ
1499 TRUE, /* partial_inplace */
1500 0xffffffff, /* src_mask */
1501 0xffffffff, /* dst_mask */
c19d1205 1502 FALSE), /* pcrel_offset */
ba93b8ac 1503
ba93b8ac
DJ
1504 HOWTO (R_ARM_TLS_LDM32, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 32, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_bitfield,/* complain_on_overflow */
1511 bfd_elf_generic_reloc, /* special_function */
1512 "R_ARM_TLS_LDM32", /* name */
1513 TRUE, /* partial_inplace */
1514 0xffffffff, /* src_mask */
1515 0xffffffff, /* dst_mask */
c19d1205 1516 FALSE), /* pcrel_offset */
ba93b8ac 1517
c19d1205 1518 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ
1519 0, /* rightshift */
1520 2, /* size (0 = byte, 1 = short, 2 = long) */
1521 32, /* bitsize */
1522 FALSE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_bitfield,/* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
c19d1205 1526 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ
1527 TRUE, /* partial_inplace */
1528 0xffffffff, /* src_mask */
1529 0xffffffff, /* dst_mask */
c19d1205 1530 FALSE), /* pcrel_offset */
ba93b8ac 1531
ba93b8ac
DJ
1532 HOWTO (R_ARM_TLS_IE32, /* type */
1533 0, /* rightshift */
1534 2, /* size (0 = byte, 1 = short, 2 = long) */
1535 32, /* bitsize */
1536 FALSE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_bitfield,/* complain_on_overflow */
1539 NULL, /* special_function */
1540 "R_ARM_TLS_IE32", /* name */
1541 TRUE, /* partial_inplace */
1542 0xffffffff, /* src_mask */
1543 0xffffffff, /* dst_mask */
c19d1205 1544 FALSE), /* pcrel_offset */
7f266840 1545
c19d1205 1546 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ
1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1549 32, /* bitsize */
7f266840
DJ
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
c19d1205
ZW
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_ARM_TLS_LE32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
7f266840 1559
c19d1205
ZW
1560 HOWTO (R_ARM_TLS_LDO12, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 12, /* bitsize */
1564 FALSE, /* pc_relative */
7f266840 1565 0, /* bitpos */
c19d1205 1566 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1567 bfd_elf_generic_reloc, /* special_function */
c19d1205 1568 "R_ARM_TLS_LDO12", /* name */
7f266840 1569 FALSE, /* partial_inplace */
c19d1205
ZW
1570 0x00000fff, /* src_mask */
1571 0x00000fff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
7f266840 1573
c19d1205
ZW
1574 HOWTO (R_ARM_TLS_LE12, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 12, /* bitsize */
1578 FALSE, /* pc_relative */
7f266840 1579 0, /* bitpos */
c19d1205 1580 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1581 bfd_elf_generic_reloc, /* special_function */
c19d1205 1582 "R_ARM_TLS_LE12", /* name */
7f266840 1583 FALSE, /* partial_inplace */
c19d1205
ZW
1584 0x00000fff, /* src_mask */
1585 0x00000fff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
7f266840 1587
c19d1205 1588 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ
1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW
1591 12, /* bitsize */
1592 FALSE, /* pc_relative */
7f266840 1593 0, /* bitpos */
c19d1205 1594 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1595 bfd_elf_generic_reloc, /* special_function */
c19d1205 1596 "R_ARM_TLS_IE12GP", /* name */
7f266840 1597 FALSE, /* partial_inplace */
c19d1205
ZW
1598 0x00000fff, /* src_mask */
1599 0x00000fff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601};
1602
1603/* 112-127 private relocations
1604 128 R_ARM_ME_TOO, obsolete
1605 129-255 unallocated in AAELF.
7f266840 1606
c19d1205
ZW
1607 249-255 extended, currently unused, relocations: */
1608
4962c51a 1609static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ
1610{
1611 HOWTO (R_ARM_RREL32, /* type */
1612 0, /* rightshift */
1613 0, /* size (0 = byte, 1 = short, 2 = long) */
1614 0, /* bitsize */
1615 FALSE, /* pc_relative */
1616 0, /* bitpos */
1617 complain_overflow_dont,/* complain_on_overflow */
1618 bfd_elf_generic_reloc, /* special_function */
1619 "R_ARM_RREL32", /* name */
1620 FALSE, /* partial_inplace */
1621 0, /* src_mask */
1622 0, /* dst_mask */
1623 FALSE), /* pcrel_offset */
1624
1625 HOWTO (R_ARM_RABS32, /* type */
1626 0, /* rightshift */
1627 0, /* size (0 = byte, 1 = short, 2 = long) */
1628 0, /* bitsize */
1629 FALSE, /* pc_relative */
1630 0, /* bitpos */
1631 complain_overflow_dont,/* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 "R_ARM_RABS32", /* name */
1634 FALSE, /* partial_inplace */
1635 0, /* src_mask */
1636 0, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 HOWTO (R_ARM_RPC24, /* type */
1640 0, /* rightshift */
1641 0, /* size (0 = byte, 1 = short, 2 = long) */
1642 0, /* bitsize */
1643 FALSE, /* pc_relative */
1644 0, /* bitpos */
1645 complain_overflow_dont,/* complain_on_overflow */
1646 bfd_elf_generic_reloc, /* special_function */
1647 "R_ARM_RPC24", /* name */
1648 FALSE, /* partial_inplace */
1649 0, /* src_mask */
1650 0, /* dst_mask */
1651 FALSE), /* pcrel_offset */
1652
1653 HOWTO (R_ARM_RBASE, /* type */
1654 0, /* rightshift */
1655 0, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_ARM_RBASE", /* name */
1662 FALSE, /* partial_inplace */
1663 0, /* src_mask */
1664 0, /* dst_mask */
1665 FALSE) /* pcrel_offset */
1666};
1667
1668static reloc_howto_type *
1669elf32_arm_howto_from_type (unsigned int r_type)
1670{
c19d1205
ZW
1671 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1672 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1673
c19d1205
ZW
1674 if (r_type >= R_ARM_RREL32
1675 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1676 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1677
c19d1205 1678 return NULL;
7f266840
DJ
1679}
1680
1681static void
1682elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1683 Elf_Internal_Rela * elf_reloc)
1684{
1685 unsigned int r_type;
1686
1687 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1688 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1689}
1690
1691struct elf32_arm_reloc_map
1692 {
1693 bfd_reloc_code_real_type bfd_reloc_val;
1694 unsigned char elf_reloc_val;
1695 };
1696
1697/* All entries in this list must also be present in elf32_arm_howto_table. */
1698static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1699 {
1700 {BFD_RELOC_NONE, R_ARM_NONE},
1701 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB
1702 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1703 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ
1704 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1705 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1706 {BFD_RELOC_32, R_ARM_ABS32},
1707 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1708 {BFD_RELOC_8, R_ARM_ABS8},
1709 {BFD_RELOC_16, R_ARM_ABS16},
1710 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1711 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW
1712 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ
1718 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1719 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1720 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1721 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ
1722 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1723 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1724 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1725 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1726 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1727 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1728 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ
1729 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1730 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1731 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1732 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1733 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1734 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1735 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1736 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1737 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1738 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW
1739 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1740 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB
1741 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1742 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1743 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1744 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1745 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1746 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1747 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS
1749 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1750 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1751 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1753 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1754 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1755 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1756 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1757 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1758 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1759 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1760 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1761 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1762 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1763 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1764 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1765 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1767 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1768 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1769 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1770 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1771 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1772 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1773 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1774 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1775 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
1776 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}
7f266840
DJ
1777 };
1778
1779static reloc_howto_type *
f1c71a59
ZW
1780elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1781 bfd_reloc_code_real_type code)
7f266840
DJ
1782{
1783 unsigned int i;
c19d1205
ZW
1784 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1785 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1786 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1787
c19d1205 1788 return NULL;
7f266840
DJ
1789}
1790
157090f7
AM
1791static reloc_howto_type *
1792elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1793 const char *r_name)
1794{
1795 unsigned int i;
1796
1797 for (i = 0;
1798 i < (sizeof (elf32_arm_howto_table_1)
1799 / sizeof (elf32_arm_howto_table_1[0]));
1800 i++)
1801 if (elf32_arm_howto_table_1[i].name != NULL
1802 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1803 return &elf32_arm_howto_table_1[i];
1804
1805 for (i = 0;
1806 i < (sizeof (elf32_arm_howto_table_2)
1807 / sizeof (elf32_arm_howto_table_2[0]));
1808 i++)
1809 if (elf32_arm_howto_table_2[i].name != NULL
1810 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1811 return &elf32_arm_howto_table_2[i];
1812
1813 return NULL;
1814}
1815
7f266840
DJ
1816/* Support for core dump NOTE sections */
1817static bfd_boolean
f1c71a59 1818elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ
1819{
1820 int offset;
1821 size_t size;
1822
1823 switch (note->descsz)
1824 {
1825 default:
1826 return FALSE;
1827
1828 case 148: /* Linux/ARM 32-bit*/
1829 /* pr_cursig */
1830 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1831
1832 /* pr_pid */
1833 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1834
1835 /* pr_reg */
1836 offset = 72;
1837 size = 72;
1838
1839 break;
1840 }
1841
1842 /* Make a ".reg/999" section. */
1843 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1844 size, note->descpos + offset);
1845}
1846
1847static bfd_boolean
f1c71a59 1848elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ
1849{
1850 switch (note->descsz)
1851 {
1852 default:
1853 return FALSE;
1854
1855 case 124: /* Linux/ARM elf_prpsinfo */
1856 elf_tdata (abfd)->core_program
1857 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1858 elf_tdata (abfd)->core_command
1859 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1860 }
1861
1862 /* Note that for some reason, a spurious space is tacked
1863 onto the end of the args in some (at least one anyway)
1864 implementations, so strip it off if it exists. */
1865
1866 {
1867 char *command = elf_tdata (abfd)->core_command;
1868 int n = strlen (command);
1869
1870 if (0 < n && command[n - 1] == ' ')
1871 command[n - 1] = '\0';
1872 }
1873
1874 return TRUE;
1875}
1876
1877#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1878#define TARGET_LITTLE_NAME "elf32-littlearm"
1879#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1880#define TARGET_BIG_NAME "elf32-bigarm"
1881
1882#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1883#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1884
252b5132
RH
1885typedef unsigned long int insn32;
1886typedef unsigned short int insn16;
1887
3a4a14e9
PB
1888/* In lieu of proper flags, assume all EABIv4 or later objects are
1889 interworkable. */
57e8b36a 1890#define INTERWORK_FLAG(abfd) \
3a4a14e9 1891 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1892 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1893
252b5132
RH
1894/* The linker script knows the section names for placement.
1895 The entry_names are used to do simple name mangling on the stubs.
1896 Given a function name, and its type, the stub can be found. The
9b485d32 1897 name can be changed. The only requirement is the %s be present. */
252b5132
RH
1898#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1899#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1900
1901#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1902#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1903
c7b8f16e
JB
1904#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1905#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1906
252b5132
RH
1907/* The name of the dynamic interpreter. This is put in the .interp
1908 section. */
1909#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1910
5e681ec4
PB
1911#ifdef FOUR_WORD_PLT
1912
252b5132
RH
1913/* The first entry in a procedure linkage table looks like
1914 this. It is set up so that any shared library function that is
59f2c4e7 1915 called before the relocation has been set up calls the dynamic
9b485d32 1916 linker first. */
e5a52504 1917static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB
1918 {
1919 0xe52de004, /* str lr, [sp, #-4]! */
1920 0xe59fe010, /* ldr lr, [pc, #16] */
1921 0xe08fe00e, /* add lr, pc, lr */
1922 0xe5bef008, /* ldr pc, [lr, #8]! */
1923 };
1924
1925/* Subsequent entries in a procedure linkage table look like
1926 this. */
e5a52504 1927static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB
1928 {
1929 0xe28fc600, /* add ip, pc, #NN */
1930 0xe28cca00, /* add ip, ip, #NN */
1931 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1932 0x00000000, /* unused */
1933 };
1934
1935#else
1936
5e681ec4
PB
1937/* The first entry in a procedure linkage table looks like
1938 this. It is set up so that any shared library function that is
1939 called before the relocation has been set up calls the dynamic
1940 linker first. */
e5a52504 1941static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1942 {
5e681ec4
PB
1943 0xe52de004, /* str lr, [sp, #-4]! */
1944 0xe59fe004, /* ldr lr, [pc, #4] */
1945 0xe08fe00e, /* add lr, pc, lr */
1946 0xe5bef008, /* ldr pc, [lr, #8]! */
1947 0x00000000, /* &GOT[0] - . */
917583ad 1948 };
252b5132
RH
1949
1950/* Subsequent entries in a procedure linkage table look like
1951 this. */
e5a52504 1952static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB
1953 {
1954 0xe28fc600, /* add ip, pc, #0xNN00000 */
1955 0xe28cca00, /* add ip, ip, #0xNN000 */
1956 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1957 };
1958
1959#endif
252b5132 1960
00a97672
RS
1961/* The format of the first entry in the procedure linkage table
1962 for a VxWorks executable. */
1963static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1964 {
1965 0xe52dc008, /* str ip,[sp,#-8]! */
1966 0xe59fc000, /* ldr ip,[pc] */
1967 0xe59cf008, /* ldr pc,[ip,#8] */
1968 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1969 };
1970
1971/* The format of subsequent entries in a VxWorks executable. */
1972static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1973 {
1974 0xe59fc000, /* ldr ip,[pc] */
1975 0xe59cf000, /* ldr pc,[ip] */
1976 0x00000000, /* .long @got */
1977 0xe59fc000, /* ldr ip,[pc] */
1978 0xea000000, /* b _PLT */
1979 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1980 };
1981
1982/* The format of entries in a VxWorks shared library. */
1983static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1984 {
1985 0xe59fc000, /* ldr ip,[pc] */
1986 0xe79cf009, /* ldr pc,[ip,r9] */
1987 0x00000000, /* .long @got */
1988 0xe59fc000, /* ldr ip,[pc] */
1989 0xe599f008, /* ldr pc,[r9,#8] */
1990 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1991 };
1992
b7693d02
DJ
1993/* An initial stub used if the PLT entry is referenced from Thumb code. */
1994#define PLT_THUMB_STUB_SIZE 4
1995static const bfd_vma elf32_arm_plt_thumb_stub [] =
1996 {
1997 0x4778, /* bx pc */
1998 0x46c0 /* nop */
1999 };
2000
e5a52504
MM
2001/* The entries in a PLT when using a DLL-based target with multiple
2002 address spaces. */
2003static const bfd_vma elf32_arm_symbian_plt_entry [] =
2004 {
83a358aa 2005 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM
2006 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2007 };
2008
e489d0ae
PB
2009/* Used to build a map of a section. This is required for mixed-endian
2010 code/data. */
2011
2012typedef struct elf32_elf_section_map
2013{
2014 bfd_vma vma;
2015 char type;
2016}
2017elf32_arm_section_map;
2018
c7b8f16e
JB
2019/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2020
2021typedef enum
2022{
2023 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2024 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2025 VFP11_ERRATUM_ARM_VENEER,
2026 VFP11_ERRATUM_THUMB_VENEER
2027}
2028elf32_vfp11_erratum_type;
2029
2030typedef struct elf32_vfp11_erratum_list
2031{
2032 struct elf32_vfp11_erratum_list *next;
2033 bfd_vma vma;
2034 union
2035 {
2036 struct
2037 {
2038 struct elf32_vfp11_erratum_list *veneer;
2039 unsigned int vfp_insn;
2040 } b;
2041 struct
2042 {
2043 struct elf32_vfp11_erratum_list *branch;
2044 unsigned int id;
2045 } v;
2046 } u;
2047 elf32_vfp11_erratum_type type;
2048}
2049elf32_vfp11_erratum_list;
2050
8e3de13a 2051typedef struct _arm_elf_section_data
e489d0ae
PB
2052{
2053 struct bfd_elf_section_data elf;
8e3de13a 2054 unsigned int mapcount;
c7b8f16e 2055 unsigned int mapsize;
e489d0ae 2056 elf32_arm_section_map *map;
c7b8f16e
JB
2057 unsigned int erratumcount;
2058 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC
2059}
2060_arm_elf_section_data;
e489d0ae
PB
2061
2062#define elf32_arm_section_data(sec) \
8e3de13a 2063 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2064
ba93b8ac
DJ
2065/* The size of the thread control block. */
2066#define TCB_SIZE 8
2067
2068struct elf32_arm_obj_tdata
2069{
2070 struct elf_obj_tdata root;
2071
2072 /* tls_type for each local got entry. */
2073 char *local_got_tls_type;
ee065d83 2074
bf21ed78
MS
2075 /* Zero to warn when linking objects with incompatible enum sizes. */
2076 int no_enum_size_warning;
ba93b8ac
DJ
2077};
2078
2079#define elf32_arm_tdata(abfd) \
2080 ((struct elf32_arm_obj_tdata *) (abfd)->tdata.any)
2081
2082#define elf32_arm_local_got_tls_type(abfd) \
2083 (elf32_arm_tdata (abfd)->local_got_tls_type)
2084
2085static bfd_boolean
2086elf32_arm_mkobject (bfd *abfd)
2087{
ba93b8ac 2088 if (abfd->tdata.any == NULL)
62d7a5f6
AM
2089 {
2090 bfd_size_type amt = sizeof (struct elf32_arm_obj_tdata);
2091 abfd->tdata.any = bfd_zalloc (abfd, amt);
2092 if (abfd->tdata.any == NULL)
2093 return FALSE;
2094 }
2095 return bfd_elf_mkobject (abfd);
ba93b8ac
DJ
2096}
2097
252b5132
RH
2098/* The ARM linker needs to keep track of the number of relocs that it
2099 decides to copy in check_relocs for each symbol. This is so that
2100 it can discard PC relative relocs if it doesn't need them when
2101 linking with -Bsymbolic. We store the information in a field
2102 extending the regular ELF linker hash table. */
2103
ba93b8ac
DJ
2104/* This structure keeps track of the number of relocs we have copied
2105 for a given symbol. */
5e681ec4 2106struct elf32_arm_relocs_copied
917583ad
NC
2107 {
2108 /* Next section. */
5e681ec4 2109 struct elf32_arm_relocs_copied * next;
917583ad
NC
2110 /* A section in dynobj. */
2111 asection * section;
2112 /* Number of relocs copied in this section. */
2113 bfd_size_type count;
ba93b8ac
DJ
2114 /* Number of PC-relative relocs copied in this section. */
2115 bfd_size_type pc_count;
917583ad 2116 };
252b5132 2117
ba93b8ac
DJ
2118#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2119
ba96a88f 2120/* Arm ELF linker hash entry. */
252b5132 2121struct elf32_arm_link_hash_entry
917583ad
NC
2122 {
2123 struct elf_link_hash_entry root;
252b5132 2124
917583ad 2125 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2126 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ
2127
2128 /* We reference count Thumb references to a PLT entry separately,
2129 so that we can emit the Thumb trampoline only if needed. */
2130 bfd_signed_vma plt_thumb_refcount;
2131
bd97cb95
DJ
2132 /* Some references from Thumb code may be eliminated by BL->BLX
2133 conversion, so record them separately. */
2134 bfd_signed_vma plt_maybe_thumb_refcount;
2135
b7693d02
DJ
2136 /* Since PLT entries have variable size if the Thumb prologue is
2137 used, we need to record the index into .got.plt instead of
2138 recomputing it from the PLT offset. */
2139 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ
2140
2141#define GOT_UNKNOWN 0
2142#define GOT_NORMAL 1
2143#define GOT_TLS_GD 2
2144#define GOT_TLS_IE 4
2145 unsigned char tls_type;
a4fd1a8e
PB
2146
2147 /* The symbol marking the real symbol location for exported thumb
2148 symbols with Arm stubs. */
2149 struct elf_link_hash_entry *export_glue;
917583ad 2150 };
252b5132 2151
252b5132 2152/* Traverse an arm ELF linker hash table. */
252b5132
RH
2153#define elf32_arm_link_hash_traverse(table, func, info) \
2154 (elf_link_hash_traverse \
2155 (&(table)->root, \
b7693d02 2156 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH
2157 (info)))
2158
2159/* Get the ARM elf linker hash table from a link_info structure. */
2160#define elf32_arm_hash_table(info) \
2161 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2162
9b485d32 2163/* ARM ELF linker hash table. */
252b5132 2164struct elf32_arm_link_hash_table
917583ad
NC
2165 {
2166 /* The main hash table. */
2167 struct elf_link_hash_table root;
252b5132 2168
4cc11e76 2169 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2170 bfd_size_type thumb_glue_size;
252b5132 2171
4cc11e76 2172 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2173 bfd_size_type arm_glue_size;
252b5132 2174
c7b8f16e
JB
2175 /* The size in bytes of the section containing glue for VFP11 erratum
2176 veneers. */
2177 bfd_size_type vfp11_erratum_glue_size;
2178
4cc11e76 2179 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2180 bfd * bfd_of_glue_owner;
ba96a88f 2181
e489d0ae
PB
2182 /* Nonzero to output a BE8 image. */
2183 int byteswap_code;
2184
9c504268 2185 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2186 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB
2187 int target1_is_rel;
2188
eb043451
PB
2189 /* The relocation to use for R_ARM_TARGET2 relocations. */
2190 int target2_reloc;
2191
319850b4
JB
2192 /* Nonzero to fix BX instructions for ARMv4 targets. */
2193 int fix_v4bx;
2194
33bfe774
JB
2195 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2196 int use_blx;
2197
c7b8f16e
JB
2198 /* What sort of code sequences we should look for which may trigger the
2199 VFP11 denorm erratum. */
2200 bfd_arm_vfp11_fix vfp11_fix;
2201
2202 /* Global counter for the number of fixes we have emitted. */
2203 int num_vfp11_fixes;
2204
27e55c4d
PB
2205 /* Nonzero to force PIC branch veneers. */
2206 int pic_veneer;
2207
e5a52504
MM
2208 /* The number of bytes in the initial entry in the PLT. */
2209 bfd_size_type plt_header_size;
2210
2211 /* The number of bytes in the subsequent PLT etries. */
2212 bfd_size_type plt_entry_size;
2213
00a97672
RS
2214 /* True if the target system is VxWorks. */
2215 int vxworks_p;
2216
e5a52504
MM
2217 /* True if the target system is Symbian OS. */
2218 int symbian_p;
2219
4e7fd91e
PB
2220 /* True if the target uses REL relocations. */
2221 int use_rel;
2222
5e681ec4
PB
2223 /* Short-cuts to get to dynamic linker sections. */
2224 asection *sgot;
2225 asection *sgotplt;
2226 asection *srelgot;
2227 asection *splt;
2228 asection *srelplt;
2229 asection *sdynbss;
2230 asection *srelbss;
2231
00a97672
RS
2232 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2233 asection *srelplt2;
2234
ba93b8ac
DJ
2235 /* Data for R_ARM_TLS_LDM32 relocations. */
2236 union {
2237 bfd_signed_vma refcount;
2238 bfd_vma offset;
2239 } tls_ldm_got;
2240
5e681ec4
PB
2241 /* Small local sym to section mapping cache. */
2242 struct sym_sec_cache sym_sec;
b7693d02
DJ
2243
2244 /* For convenience in allocate_dynrelocs. */
2245 bfd * obfd;
917583ad 2246 };
252b5132 2247
780a67af
NC
2248/* Create an entry in an ARM ELF linker hash table. */
2249
2250static struct bfd_hash_entry *
57e8b36a
NC
2251elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2252 struct bfd_hash_table * table,
2253 const char * string)
780a67af
NC
2254{
2255 struct elf32_arm_link_hash_entry * ret =
2256 (struct elf32_arm_link_hash_entry *) entry;
2257
2258 /* Allocate the structure if it has not already been allocated by a
2259 subclass. */
2260 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC
2261 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2262 if (ret == NULL)
780a67af
NC
2263 return (struct bfd_hash_entry *) ret;
2264
2265 /* Call the allocation method of the superclass. */
2266 ret = ((struct elf32_arm_link_hash_entry *)
2267 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2268 table, string));
57e8b36a 2269 if (ret != NULL)
b7693d02
DJ
2270 {
2271 ret->relocs_copied = NULL;
ba93b8ac 2272 ret->tls_type = GOT_UNKNOWN;
b7693d02 2273 ret->plt_thumb_refcount = 0;
bd97cb95 2274 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2275 ret->plt_got_offset = -1;
a4fd1a8e 2276 ret->export_glue = NULL;
b7693d02 2277 }
780a67af
NC
2278
2279 return (struct bfd_hash_entry *) ret;
2280}
2281
00a97672
RS
2282/* Return true if NAME is the name of the relocation section associated
2283 with S. */
2284
2285static bfd_boolean
2286reloc_section_p (struct elf32_arm_link_hash_table *htab,
2287 const char *name, asection *s)
2288{
2289 if (htab->use_rel)
0112cd26 2290 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2291 else
0112cd26 2292 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS
2293}
2294
2295/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB
2296 shortcuts to them in our hash table. */
2297
2298static bfd_boolean
57e8b36a 2299create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB
2300{
2301 struct elf32_arm_link_hash_table *htab;
2302
e5a52504
MM
2303 htab = elf32_arm_hash_table (info);
2304 /* BPABI objects never have a GOT, or associated sections. */
2305 if (htab->symbian_p)
2306 return TRUE;
2307
5e681ec4
PB
2308 if (! _bfd_elf_create_got_section (dynobj, info))
2309 return FALSE;
2310
5e681ec4
PB
2311 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2312 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2313 if (!htab->sgot || !htab->sgotplt)
2314 abort ();
2315
00a97672
RS
2316 htab->srelgot = bfd_make_section_with_flags (dynobj,
2317 RELOC_SECTION (htab, ".got"),
3496cb2a
L
2318 (SEC_ALLOC | SEC_LOAD
2319 | SEC_HAS_CONTENTS
2320 | SEC_IN_MEMORY
2321 | SEC_LINKER_CREATED
2322 | SEC_READONLY));
5e681ec4 2323 if (htab->srelgot == NULL
5e681ec4
PB
2324 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2325 return FALSE;
2326 return TRUE;
2327}
2328
00a97672
RS
2329/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2330 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB
2331 hash table. */
2332
2333static bfd_boolean
57e8b36a 2334elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB
2335{
2336 struct elf32_arm_link_hash_table *htab;
2337
2338 htab = elf32_arm_hash_table (info);
2339 if (!htab->sgot && !create_got_section (dynobj, info))
2340 return FALSE;
2341
2342 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2343 return FALSE;
2344
2345 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS
2346 htab->srelplt = bfd_get_section_by_name (dynobj,
2347 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB
2348 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2349 if (!info->shared)
00a97672
RS
2350 htab->srelbss = bfd_get_section_by_name (dynobj,
2351 RELOC_SECTION (htab, ".bss"));
2352
2353 if (htab->vxworks_p)
2354 {
2355 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2356 return FALSE;
2357
2358 if (info->shared)
2359 {
2360 htab->plt_header_size = 0;
2361 htab->plt_entry_size
2362 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2363 }
2364 else
2365 {
2366 htab->plt_header_size
2367 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2368 htab->plt_entry_size
2369 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2370 }
2371 }
5e681ec4 2372
e5a52504
MM
2373 if (!htab->splt
2374 || !htab->srelplt
2375 || !htab->sdynbss
5e681ec4
PB
2376 || (!info->shared && !htab->srelbss))
2377 abort ();
2378
2379 return TRUE;
2380}
2381
2382/* Copy the extra info we tack onto an elf_link_hash_entry. */
2383
2384static void
fcfa13d2 2385elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB
2386 struct elf_link_hash_entry *dir,
2387 struct elf_link_hash_entry *ind)
2388{
2389 struct elf32_arm_link_hash_entry *edir, *eind;
2390
2391 edir = (struct elf32_arm_link_hash_entry *) dir;
2392 eind = (struct elf32_arm_link_hash_entry *) ind;
2393
2394 if (eind->relocs_copied != NULL)
2395 {
2396 if (edir->relocs_copied != NULL)
2397 {
2398 struct elf32_arm_relocs_copied **pp;
2399 struct elf32_arm_relocs_copied *p;
2400
fcfa13d2 2401 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB
2402 list. Merge any entries against the same section. */
2403 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2404 {
2405 struct elf32_arm_relocs_copied *q;
2406
2407 for (q = edir->relocs_copied; q != NULL; q = q->next)
2408 if (q->section == p->section)
2409 {
ba93b8ac 2410 q->pc_count += p->pc_count;
5e681ec4
PB
2411 q->count += p->count;
2412 *pp = p->next;
2413 break;
2414 }
2415 if (q == NULL)
2416 pp = &p->next;
2417 }
2418 *pp = edir->relocs_copied;
2419 }
2420
2421 edir->relocs_copied = eind->relocs_copied;
2422 eind->relocs_copied = NULL;
2423 }
2424
b34b2d70 2425 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2426 {
b34b2d70
DJ
2427 /* Copy over PLT info. */
2428 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2429 eind->plt_thumb_refcount = 0;
bd97cb95
DJ
2430 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2431 eind->plt_maybe_thumb_refcount = 0;
b34b2d70
DJ
2432
2433 if (dir->got.refcount <= 0)
2434 {
2435 edir->tls_type = eind->tls_type;
2436 eind->tls_type = GOT_UNKNOWN;
2437 }
ba93b8ac
DJ
2438 }
2439
fcfa13d2 2440 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB
2441}
2442
9b485d32 2443/* Create an ARM elf linker hash table. */
252b5132
RH
2444
2445static struct bfd_link_hash_table *
57e8b36a 2446elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH
2447{
2448 struct elf32_arm_link_hash_table *ret;
dc810e39 2449 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2450
57e8b36a
NC
2451 ret = bfd_malloc (amt);
2452 if (ret == NULL)
252b5132
RH
2453 return NULL;
2454
57e8b36a 2455 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM
2456 elf32_arm_link_hash_newfunc,
2457 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2458 {
e2d34d7d 2459 free (ret);
252b5132
RH
2460 return NULL;
2461 }
2462
5e681ec4
PB
2463 ret->sgot = NULL;
2464 ret->sgotplt = NULL;
2465 ret->srelgot = NULL;
2466 ret->splt = NULL;
2467 ret->srelplt = NULL;
2468 ret->sdynbss = NULL;
2469 ret->srelbss = NULL;
00a97672 2470 ret->srelplt2 = NULL;
252b5132
RH
2471 ret->thumb_glue_size = 0;
2472 ret->arm_glue_size = 0;
c7b8f16e
JB
2473 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2474 ret->vfp11_erratum_glue_size = 0;
2475 ret->num_vfp11_fixes = 0;
252b5132 2476 ret->bfd_of_glue_owner = NULL;
e489d0ae 2477 ret->byteswap_code = 0;
9c504268 2478 ret->target1_is_rel = 0;
eb043451 2479 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM
2480#ifdef FOUR_WORD_PLT
2481 ret->plt_header_size = 16;
2482 ret->plt_entry_size = 16;
2483#else
2484 ret->plt_header_size = 20;
2485 ret->plt_entry_size = 12;
2486#endif
33bfe774
JB
2487 ret->fix_v4bx = 0;
2488 ret->use_blx = 0;
00a97672 2489 ret->vxworks_p = 0;
e5a52504 2490 ret->symbian_p = 0;
4e7fd91e 2491 ret->use_rel = 1;
5e681ec4 2492 ret->sym_sec.abfd = NULL;
b7693d02 2493 ret->obfd = abfd;
ba93b8ac 2494 ret->tls_ldm_got.refcount = 0;
252b5132
RH
2495
2496 return &ret->root.root;
2497}
2498
9b485d32
NC
2499/* Locate the Thumb encoded calling stub for NAME. */
2500
252b5132 2501static struct elf_link_hash_entry *
57e8b36a
NC
2502find_thumb_glue (struct bfd_link_info *link_info,
2503 const char *name,
f2a9dd69 2504 char **error_message)
252b5132
RH
2505{
2506 char *tmp_name;
2507 struct elf_link_hash_entry *hash;
2508 struct elf32_arm_link_hash_table *hash_table;
2509
2510 /* We need a pointer to the armelf specific hash table. */
2511 hash_table = elf32_arm_hash_table (link_info);
2512
57e8b36a
NC
2513 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2514 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2515
2516 BFD_ASSERT (tmp_name);
2517
2518 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2519
2520 hash = elf_link_hash_lookup
b34976b6 2521 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2522
b1657152
AM
2523 if (hash == NULL
2524 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2525 tmp_name, name) == -1)
2526 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH
2527
2528 free (tmp_name);
2529
2530 return hash;
2531}
2532
9b485d32
NC
2533/* Locate the ARM encoded calling stub for NAME. */
2534
252b5132 2535static struct elf_link_hash_entry *
57e8b36a
NC
2536find_arm_glue (struct bfd_link_info *link_info,
2537 const char *name,
f2a9dd69 2538 char **error_message)
252b5132
RH
2539{
2540 char *tmp_name;
2541 struct elf_link_hash_entry *myh;
2542 struct elf32_arm_link_hash_table *hash_table;
2543
2544 /* We need a pointer to the elfarm specific hash table. */
2545 hash_table = elf32_arm_hash_table (link_info);
2546
57e8b36a
NC
2547 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2548 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2549
2550 BFD_ASSERT (tmp_name);
2551
2552 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2553
2554 myh = elf_link_hash_lookup
b34976b6 2555 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2556
b1657152
AM
2557 if (myh == NULL
2558 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2559 tmp_name, name) == -1)
2560 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH
2561
2562 free (tmp_name);
2563
2564 return myh;
2565}
2566
8f6277f5 2567/* ARM->Thumb glue (static images):
252b5132
RH
2568
2569 .arm
2570 __func_from_arm:
2571 ldr r12, __func_addr
2572 bx r12
2573 __func_addr:
8f6277f5 2574 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2575
26079076
PB
2576 (v5t static images)
2577 .arm
2578 __func_from_arm:
2579 ldr pc, __func_addr
2580 __func_addr:
2581 .word func @ behave as if you saw a ARM_32 reloc.
2582
8f6277f5
PB
2583 (relocatable images)
2584 .arm
2585 __func_from_arm:
2586 ldr r12, __func_offset
2587 add r12, r12, pc
2588 bx r12
2589 __func_offset:
2590 .word func - .
2591 */
2592
2593#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH
2594static const insn32 a2t1_ldr_insn = 0xe59fc000;
2595static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2596static const insn32 a2t3_func_addr_insn = 0x00000001;
2597
26079076
PB
2598#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2599static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2600static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2601
8f6277f5
PB
2602#define ARM2THUMB_PIC_GLUE_SIZE 16
2603static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2604static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2605static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2606
9b485d32 2607/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH
2608
2609 .thumb .thumb
2610 .align 2 .align 2
2611 __func_from_thumb: __func_from_thumb:
2612 bx pc push {r6, lr}
2613 nop ldr r6, __func_addr
2614 .arm mov lr, pc
2615 __func_change_to_arm: bx r6
2616 b func .arm
2617 __func_back_to_thumb:
2618 ldmia r13! {r6, lr}
2619 bx lr
2620 __func_addr:
9b485d32 2621 .word func */
252b5132
RH
2622
2623#define THUMB2ARM_GLUE_SIZE 8
2624static const insn16 t2a1_bx_pc_insn = 0x4778;
2625static const insn16 t2a2_noop_insn = 0x46c0;
2626static const insn32 t2a3_b_insn = 0xea000000;
2627
c7b8f16e
JB
2628#define VFP11_ERRATUM_VENEER_SIZE 8
2629
7e392df6 2630#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2631bfd_boolean
57e8b36a 2632bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH
2633{
2634 asection * s;
2635 bfd_byte * foo;
2636 struct elf32_arm_link_hash_table * globals;
2637
2638 globals = elf32_arm_hash_table (info);
2639
2640 BFD_ASSERT (globals != NULL);
2641
2642 if (globals->arm_glue_size != 0)
2643 {
2644 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2645
dc810e39
AM
2646 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2647 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH
2648
2649 BFD_ASSERT (s != NULL);
2650
57e8b36a 2651 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2652
2f475487 2653 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH
2654 s->contents = foo;
2655 }
2656
2657 if (globals->thumb_glue_size != 0)
2658 {
2659 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2660
2661 s = bfd_get_section_by_name
2662 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2663
2664 BFD_ASSERT (s != NULL);
2665
57e8b36a 2666 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2667
2f475487 2668 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH
2669 s->contents = foo;
2670 }
c7b8f16e
JB
2671
2672 if (globals->vfp11_erratum_glue_size != 0)
2673 {
2674 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2675
2676 s = bfd_get_section_by_name
2677 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2678
2679 BFD_ASSERT (s != NULL);
2680
2681 foo = bfd_alloc (globals->bfd_of_glue_owner,
2682 globals->vfp11_erratum_glue_size);
2683
2684 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2685 s->contents = foo;
2686 }
252b5132 2687
b34976b6 2688 return TRUE;
252b5132
RH
2689}
2690
a4fd1a8e
PB
2691/* Allocate space and symbols for calling a Thumb function from Arm mode.
2692 returns the symbol identifying teh stub. */
2693static struct elf_link_hash_entry *
57e8b36a
NC
2694record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2695 struct elf_link_hash_entry * h)
252b5132
RH
2696{
2697 const char * name = h->root.root.string;
63b0f745 2698 asection * s;
252b5132
RH
2699 char * tmp_name;
2700 struct elf_link_hash_entry * myh;
14a793b2 2701 struct bfd_link_hash_entry * bh;
252b5132 2702 struct elf32_arm_link_hash_table * globals;
dc810e39 2703 bfd_vma val;
2f475487 2704 bfd_size_type size;
252b5132
RH
2705
2706 globals = elf32_arm_hash_table (link_info);
2707
2708 BFD_ASSERT (globals != NULL);
2709 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2710
2711 s = bfd_get_section_by_name
2712 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2713
252b5132
RH
2714 BFD_ASSERT (s != NULL);
2715
57e8b36a 2716 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2717
2718 BFD_ASSERT (tmp_name);
2719
2720 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2721
2722 myh = elf_link_hash_lookup
b34976b6 2723 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2724
2725 if (myh != NULL)
2726 {
9b485d32 2727 /* We've already seen this guy. */
252b5132 2728 free (tmp_name);
a4fd1a8e 2729 return myh;
252b5132
RH
2730 }
2731
57e8b36a
NC
2732 /* The only trick here is using hash_table->arm_glue_size as the value.
2733 Even though the section isn't allocated yet, this is where we will be
2734 putting it. */
14a793b2 2735 bh = NULL;
dc810e39
AM
2736 val = globals->arm_glue_size + 1;
2737 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2738 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2739 NULL, TRUE, FALSE, &bh);
252b5132 2740
b7693d02
DJ
2741 myh = (struct elf_link_hash_entry *) bh;
2742 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2743 myh->forced_local = 1;
2744
252b5132
RH
2745 free (tmp_name);
2746
27e55c4d
PB
2747 if (link_info->shared || globals->root.is_relocatable_executable
2748 || globals->pic_veneer)
2f475487 2749 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB
2750 else if (globals->use_blx)
2751 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2752 else
2f475487
AM
2753 size = ARM2THUMB_STATIC_GLUE_SIZE;
2754
2755 s->size += size;
2756 globals->arm_glue_size += size;
252b5132 2757
a4fd1a8e 2758 return myh;
252b5132
RH
2759}
2760
2761static void
57e8b36a
NC
2762record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2763 struct elf_link_hash_entry *h)
252b5132
RH
2764{
2765 const char *name = h->root.root.string;
63b0f745 2766 asection *s;
252b5132
RH
2767 char *tmp_name;
2768 struct elf_link_hash_entry *myh;
14a793b2 2769 struct bfd_link_hash_entry *bh;
252b5132 2770 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2771 bfd_vma val;
252b5132
RH
2772
2773 hash_table = elf32_arm_hash_table (link_info);
2774
2775 BFD_ASSERT (hash_table != NULL);
2776 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2777
2778 s = bfd_get_section_by_name
2779 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2780
2781 BFD_ASSERT (s != NULL);
2782
57e8b36a
NC
2783 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2784 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH
2785
2786 BFD_ASSERT (tmp_name);
2787
2788 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2789
2790 myh = elf_link_hash_lookup
b34976b6 2791 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH
2792
2793 if (myh != NULL)
2794 {
9b485d32 2795 /* We've already seen this guy. */
252b5132 2796 free (tmp_name);
9b485d32 2797 return;
252b5132
RH
2798 }
2799
14a793b2 2800 bh = NULL;
dc810e39
AM
2801 val = hash_table->thumb_glue_size + 1;
2802 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2803 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2804 NULL, TRUE, FALSE, &bh);
252b5132 2805
9b485d32 2806 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2807 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ
2808 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2809 myh->forced_local = 1;
252b5132
RH
2810
2811 free (tmp_name);
2812
252b5132
RH
2813#define CHANGE_TO_ARM "__%s_change_to_arm"
2814#define BACK_FROM_ARM "__%s_back_from_arm"
2815
9b485d32 2816 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC
2817 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2818 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH
2819
2820 BFD_ASSERT (tmp_name);
2821
2822 sprintf (tmp_name, CHANGE_TO_ARM, name);
2823
14a793b2 2824 bh = NULL;
dc810e39
AM
2825 val = hash_table->thumb_glue_size + 4,
2826 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2827 tmp_name, BSF_LOCAL, s, val,
b34976b6 2828 NULL, TRUE, FALSE, &bh);
252b5132
RH
2829
2830 free (tmp_name);
2831
2f475487 2832 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH
2833 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2834
2835 return;
2836}
2837
c7b8f16e
JB
2838
2839/* Add an entry to the code/data map for section SEC. */
2840
2841static void
2842elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2843{
2844 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2845 unsigned int newidx;
2846
2847 if (sec_data->map == NULL)
2848 {
2849 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2850 sec_data->mapcount = 0;
2851 sec_data->mapsize = 1;
2852 }
2853
2854 newidx = sec_data->mapcount++;
2855
2856 if (sec_data->mapcount > sec_data->mapsize)
2857 {
2858 sec_data->mapsize *= 2;
2859 sec_data->map = bfd_realloc (sec_data->map, sec_data->mapsize
2860 * sizeof (elf32_arm_section_map));
2861 }
2862
2863 sec_data->map[newidx].vma = vma;
2864 sec_data->map[newidx].type = type;
2865}
2866
2867
2868/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2869 veneers are handled for now. */
2870
2871static bfd_vma
2872record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2873 elf32_vfp11_erratum_list *branch,
2874 bfd *branch_bfd,
2875 asection *branch_sec,
2876 unsigned int offset)
2877{
2878 asection *s;
2879 struct elf32_arm_link_hash_table *hash_table;
2880 char *tmp_name;
2881 struct elf_link_hash_entry *myh;
2882 struct bfd_link_hash_entry *bh;
2883 bfd_vma val;
2884 struct _arm_elf_section_data *sec_data;
2885 int errcount;
2886 elf32_vfp11_erratum_list *newerr;
2887
2888 hash_table = elf32_arm_hash_table (link_info);
2889
2890 BFD_ASSERT (hash_table != NULL);
2891 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2892
2893 s = bfd_get_section_by_name
2894 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2895
2896 sec_data = elf32_arm_section_data (s);
2897
2898 BFD_ASSERT (s != NULL);
2899
2900 tmp_name = bfd_malloc ((bfd_size_type) strlen
2901 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2902
2903 BFD_ASSERT (tmp_name);
2904
2905 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
2906 hash_table->num_vfp11_fixes);
2907
2908 myh = elf_link_hash_lookup
2909 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2910
2911 BFD_ASSERT (myh == NULL);
2912
2913 bh = NULL;
2914 val = hash_table->vfp11_erratum_glue_size;
2915 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2916 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2917 NULL, TRUE, FALSE, &bh);
2918
2919 myh = (struct elf_link_hash_entry *) bh;
2920 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2921 myh->forced_local = 1;
2922
2923 /* Link veneer back to calling location. */
2924 errcount = ++(sec_data->erratumcount);
2925 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
2926
2927 newerr->type = VFP11_ERRATUM_ARM_VENEER;
2928 newerr->vma = -1;
2929 newerr->u.v.branch = branch;
2930 newerr->u.v.id = hash_table->num_vfp11_fixes;
2931 branch->u.b.veneer = newerr;
2932
2933 newerr->next = sec_data->erratumlist;
2934 sec_data->erratumlist = newerr;
2935
2936 /* A symbol for the return from the veneer. */
2937 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
2938 hash_table->num_vfp11_fixes);
2939
2940 myh = elf_link_hash_lookup
2941 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
2942
2943 if (myh != NULL)
2944 abort ();
2945
2946 bh = NULL;
2947 val = offset + 4;
2948 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
2949 branch_sec, val, NULL, TRUE, FALSE, &bh);
2950
2951 myh = (struct elf_link_hash_entry *) bh;
2952 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2953 myh->forced_local = 1;
2954
2955 free (tmp_name);
2956
2957 /* Generate a mapping symbol for the veneer section, and explicitly add an
2958 entry for that symbol to the code/data map for the section. */
2959 if (hash_table->vfp11_erratum_glue_size == 0)
2960 {
2961 bh = NULL;
2962 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
2963 ever requires this erratum fix. */
2964 _bfd_generic_link_add_one_symbol (link_info,
2965 hash_table->bfd_of_glue_owner, "$a",
2966 BSF_LOCAL, s, 0, NULL,
2967 TRUE, FALSE, &bh);
2968
2969 myh = (struct elf_link_hash_entry *) bh;
2970 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
2971 myh->forced_local = 1;
2972
2973 /* The elf32_arm_init_maps function only cares about symbols from input
2974 BFDs. We must make a note of this generated mapping symbol
2975 ourselves so that code byteswapping works properly in
2976 elf32_arm_write_section. */
2977 elf32_arm_section_map_add (s, 'a', 0);
2978 }
2979
2980 s->size += VFP11_ERRATUM_VENEER_SIZE;
2981 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
2982 hash_table->num_vfp11_fixes++;
2983
2984 /* The offset of the veneer. */
2985 return val;
2986}
2987
8afb0e02
NC
2988/* Add the glue sections to ABFD. This function is called from the
2989 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 2990
b34976b6 2991bfd_boolean
57e8b36a
NC
2992bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
2993 struct bfd_link_info *info)
252b5132 2994{
252b5132
RH
2995 flagword flags;
2996 asection *sec;
2997
8afb0e02
NC
2998 /* If we are only performing a partial
2999 link do not bother adding the glue. */
1049f94e 3000 if (info->relocatable)
b34976b6 3001 return TRUE;
252b5132 3002
252b5132
RH
3003 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
3004
3005 if (sec == NULL)
3006 {
57db232e
NC
3007 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
3008 will prevent elf_link_input_bfd() from processing the contents
3009 of this section. */
2f475487
AM
3010 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3011 | SEC_CODE | SEC_READONLY);
252b5132 3012
3496cb2a
L
3013 sec = bfd_make_section_with_flags (abfd,
3014 ARM2THUMB_GLUE_SECTION_NAME,
3015 flags);
252b5132
RH
3016
3017 if (sec == NULL
252b5132 3018 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3019 return FALSE;
9a5aca8c 3020
57db232e
NC
3021 /* Set the gc mark to prevent the section from being removed by garbage
3022 collection, despite the fact that no relocs refer to this section. */
3023 sec->gc_mark = 1;
252b5132
RH
3024 }
3025
3026 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3027
3028 if (sec == NULL)
3029 {
2f475487
AM
3030 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3031 | SEC_CODE | SEC_READONLY);
252b5132 3032
3496cb2a
L
3033 sec = bfd_make_section_with_flags (abfd,
3034 THUMB2ARM_GLUE_SECTION_NAME,
3035 flags);
252b5132
RH
3036
3037 if (sec == NULL
252b5132 3038 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3039 return FALSE;
9a5aca8c 3040
57db232e 3041 sec->gc_mark = 1;
252b5132
RH
3042 }
3043
c7b8f16e
JB
3044 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3045
3046 if (sec == NULL)
3047 {
3048 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3049 | SEC_CODE | SEC_READONLY);
3050
3051 sec = bfd_make_section_with_flags (abfd,
3052 VFP11_ERRATUM_VENEER_SECTION_NAME,
3053 flags);
3054
3055 if (sec == NULL
3056 || !bfd_set_section_alignment (abfd, sec, 2))
3057 return FALSE;
3058
3059 sec->gc_mark = 1;
3060 }
3061
b34976b6 3062 return TRUE;
8afb0e02
NC
3063}
3064
3065/* Select a BFD to be used to hold the sections used by the glue code.
3066 This function is called from the linker scripts in ld/emultempl/
3067 {armelf/pe}.em */
3068
b34976b6 3069bfd_boolean
57e8b36a 3070bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC
3071{
3072 struct elf32_arm_link_hash_table *globals;
3073
3074 /* If we are only performing a partial link
3075 do not bother getting a bfd to hold the glue. */
1049f94e 3076 if (info->relocatable)
b34976b6 3077 return TRUE;
8afb0e02 3078
b7693d02
DJ
3079 /* Make sure we don't attach the glue sections to a dynamic object. */
3080 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3081
8afb0e02
NC
3082 globals = elf32_arm_hash_table (info);
3083
3084 BFD_ASSERT (globals != NULL);
3085
3086 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3087 return TRUE;
8afb0e02 3088
252b5132
RH
3089 /* Save the bfd for later use. */
3090 globals->bfd_of_glue_owner = abfd;
cedb70c5 3091
b34976b6 3092 return TRUE;
252b5132
RH
3093}
3094
39b41c9c
PB
3095static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3096{
104d59d1
JM
3097 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3098 Tag_CPU_arch) > 2)
39b41c9c
PB
3099 globals->use_blx = 1;
3100}
3101
b34976b6 3102bfd_boolean
57e8b36a 3103bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3104 struct bfd_link_info *link_info)
252b5132
RH
3105{
3106 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3107 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH
3108 Elf_Internal_Rela *irel, *irelend;
3109 bfd_byte *contents = NULL;
252b5132
RH
3110
3111 asection *sec;
3112 struct elf32_arm_link_hash_table *globals;
3113
3114 /* If we are only performing a partial link do not bother
3115 to construct any glue. */
1049f94e 3116 if (link_info->relocatable)
b34976b6 3117 return TRUE;
252b5132
RH
3118
3119 /* Here we have a bfd that is to be included on the link. We have a hook
3120 to do reloc rummaging, before section sizes are nailed down. */
252b5132 3121 globals = elf32_arm_hash_table (link_info);
39b41c9c 3122 check_use_blx (globals);
252b5132
RH
3123
3124 BFD_ASSERT (globals != NULL);
3125 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
3126
d504ffc8 3127 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3128 {
d003868e
AM
3129 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3130 abfd);
e489d0ae
PB
3131 return FALSE;
3132 }
f21f3fe0 3133
252b5132
RH
3134 /* Rummage around all the relocs and map the glue vectors. */
3135 sec = abfd->sections;
3136
3137 if (sec == NULL)
b34976b6 3138 return TRUE;
252b5132
RH
3139
3140 for (; sec != NULL; sec = sec->next)
3141 {
3142 if (sec->reloc_count == 0)
3143 continue;
3144
2f475487
AM
3145 if ((sec->flags & SEC_EXCLUDE) != 0)
3146 continue;
3147
252b5132 3148 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
252b5132 3149
9b485d32 3150 /* Load the relocs. */
6cdc0ccc 3151 internal_relocs
57e8b36a 3152 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3153 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3154
6cdc0ccc
AM
3155 if (internal_relocs == NULL)
3156 goto error_return;
252b5132 3157
6cdc0ccc
AM
3158 irelend = internal_relocs + sec->reloc_count;
3159 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH
3160 {
3161 long r_type;
3162 unsigned long r_index;
252b5132
RH
3163
3164 struct elf_link_hash_entry *h;
3165
3166 r_type = ELF32_R_TYPE (irel->r_info);
3167 r_index = ELF32_R_SYM (irel->r_info);
3168
9b485d32 3169 /* These are the only relocation types we care about. */
ba96a88f 3170 if ( r_type != R_ARM_PC24
b7693d02 3171 && r_type != R_ARM_PLT32
5b5bb741
PB
3172 && r_type != R_ARM_CALL
3173 && r_type != R_ARM_JUMP24
bd97cb95
DJ
3174 && r_type != R_ARM_THM_CALL
3175 && r_type != R_ARM_THM_JUMP24)
252b5132
RH
3176 continue;
3177
3178 /* Get the section contents if we haven't done so already. */
3179 if (contents == NULL)
3180 {
3181 /* Get cached copy if it exists. */
3182 if (elf_section_data (sec)->this_hdr.contents != NULL)
3183 contents = elf_section_data (sec)->this_hdr.contents;
3184 else
3185 {
3186 /* Go get them off disk. */
57e8b36a 3187 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH
3188 goto error_return;
3189 }
3190 }
3191
a7c10850 3192 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH
3193 h = NULL;
3194
9b485d32 3195 /* We don't care about local symbols. */
252b5132
RH
3196 if (r_index < symtab_hdr->sh_info)
3197 continue;
3198
9b485d32 3199 /* This is an external symbol. */
252b5132
RH
3200 r_index -= symtab_hdr->sh_info;
3201 h = (struct elf_link_hash_entry *)
3202 elf_sym_hashes (abfd)[r_index];
3203
3204 /* If the relocation is against a static symbol it must be within
3205 the current section and so cannot be a cross ARM/Thumb relocation. */
3206 if (h == NULL)
3207 continue;
3208
d504ffc8
DJ
3209 /* If the call will go through a PLT entry then we do not need
3210 glue. */
3211 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ
3212 continue;
3213
252b5132
RH
3214 switch (r_type)
3215 {
3216 case R_ARM_PC24:
c6596c5e 3217 case R_ARM_PLT32:
5b5bb741
PB
3218 case R_ARM_CALL:
3219 case R_ARM_JUMP24:
252b5132 3220 /* This one is a call from arm code. We need to look up
2f0ca46a 3221 the target of the call. If it is a thumb target, we
252b5132 3222 insert glue. */
39b41c9c
PB
3223 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3224 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH
3225 record_arm_to_thumb_glue (link_info, h);
3226 break;
3227
c19d1205 3228 case R_ARM_THM_CALL:
bd97cb95 3229 case R_ARM_THM_JUMP24:
f21f3fe0 3230 /* This one is a call from thumb code. We look
2f0ca46a 3231 up the target of the call. If it is not a thumb
bcbdc74c 3232 target, we insert glue. */
bd97cb95
DJ
3233 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
3234 && !(globals->use_blx && r_type == R_ARM_THM_CALL)
5ab79981 3235 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH
3236 record_thumb_to_arm_glue (link_info, h);
3237 break;
3238
3239 default:
c6596c5e 3240 abort ();
252b5132
RH
3241 }
3242 }
6cdc0ccc
AM
3243
3244 if (contents != NULL
3245 && elf_section_data (sec)->this_hdr.contents != contents)
3246 free (contents);
3247 contents = NULL;
3248
3249 if (internal_relocs != NULL
3250 && elf_section_data (sec)->relocs != internal_relocs)
3251 free (internal_relocs);
3252 internal_relocs = NULL;
252b5132
RH
3253 }
3254
b34976b6 3255 return TRUE;
9a5aca8c 3256
252b5132 3257error_return:
6cdc0ccc
AM
3258 if (contents != NULL
3259 && elf_section_data (sec)->this_hdr.contents != contents)
3260 free (contents);
3261 if (internal_relocs != NULL
3262 && elf_section_data (sec)->relocs != internal_relocs)
3263 free (internal_relocs);
9a5aca8c 3264
b34976b6 3265 return FALSE;
252b5132 3266}
7e392df6 3267#endif
252b5132 3268
eb043451 3269
c7b8f16e
JB
3270/* Initialise maps of ARM/Thumb/data for input BFDs. */
3271
3272void
3273bfd_elf32_arm_init_maps (bfd *abfd)
3274{
3275 Elf_Internal_Sym *isymbuf;
3276 Elf_Internal_Shdr *hdr;
3277 unsigned int i, localsyms;
3278
3279 if ((abfd->flags & DYNAMIC) != 0)
3280 return;
3281
3282 hdr = &elf_tdata (abfd)->symtab_hdr;
3283 localsyms = hdr->sh_info;
3284
3285 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3286 should contain the number of local symbols, which should come before any
3287 global symbols. Mapping symbols are always local. */
3288 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3289 NULL);
3290
3291 /* No internal symbols read? Skip this BFD. */
3292 if (isymbuf == NULL)
3293 return;
3294
3295 for (i = 0; i < localsyms; i++)
3296 {
3297 Elf_Internal_Sym *isym = &isymbuf[i];
3298 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3299 const char *name;
3300
3301 if (sec != NULL
3302 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3303 {
3304 name = bfd_elf_string_from_elf_section (abfd,
3305 hdr->sh_link, isym->st_name);
3306
3307 if (bfd_is_arm_special_symbol_name (name,
3308 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3309 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3310 }
3311 }
3312}
3313
3314
3315void
3316bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3317{
3318 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3319 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB
3320
3321 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3322 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3323 {
3324 switch (globals->vfp11_fix)
3325 {
3326 case BFD_ARM_VFP11_FIX_DEFAULT:
3327 case BFD_ARM_VFP11_FIX_NONE:
3328 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3329 break;
3330
3331 default:
3332 /* Give a warning, but do as the user requests anyway. */
3333 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3334 "workaround is not necessary for target architecture"), obfd);
3335 }
3336 }
3337 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3338 /* For earlier architectures, we might need the workaround, but do not
3339 enable it by default. If users is running with broken hardware, they
3340 must enable the erratum fix explicitly. */
3341 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3342}
3343
3344
3345enum bfd_arm_vfp11_pipe {
3346 VFP11_FMAC,
3347 VFP11_LS,
3348 VFP11_DS,
3349 VFP11_BAD
3350};
3351
3352/* Return a VFP register number. This is encoded as RX:X for single-precision
3353 registers, or X:RX for double-precision registers, where RX is the group of
3354 four bits in the instruction encoding and X is the single extension bit.
3355 RX and X fields are specified using their lowest (starting) bit. The return
3356 value is:
3357
3358 0...31: single-precision registers s0...s31
3359 32...63: double-precision registers d0...d31.
3360
3361 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3362 encounter VFP3 instructions, so we allow the full range for DP registers. */
3363
3364static unsigned int
3365bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3366 unsigned int x)
3367{
3368 if (is_double)
3369 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3370 else
3371 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3372}
3373
3374/* Set bits in *WMASK according to a register number REG as encoded by
3375 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3376
3377static void
3378bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3379{
3380 if (reg < 32)
3381 *wmask |= 1 << reg;
3382 else if (reg < 48)
3383 *wmask |= 3 << ((reg - 32) * 2);
3384}
3385
3386/* Return TRUE if WMASK overwrites anything in REGS. */
3387
3388static bfd_boolean
3389bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3390{
3391 int i;
3392
3393 for (i = 0; i < numregs; i++)
3394 {
3395 unsigned int reg = regs[i];
3396
3397 if (reg < 32 && (wmask & (1 << reg)) != 0)
3398 return TRUE;
3399
3400 reg -= 32;
3401
3402 if (reg >= 16)
3403 continue;
3404
3405 if ((wmask & (3 << (reg * 2))) != 0)
3406 return TRUE;
3407 }
3408
3409 return FALSE;
3410}
3411
3412/* In this function, we're interested in two things: finding input registers
3413 for VFP data-processing instructions, and finding the set of registers which
3414 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3415 hold the written set, so FLDM etc. are easy to deal with (we're only
3416 interested in 32 SP registers or 16 dp registers, due to the VFP version
3417 implemented by the chip in question). DP registers are marked by setting
3418 both SP registers in the write mask). */
3419
3420static enum bfd_arm_vfp11_pipe
3421bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3422 int *numregs)
3423{
3424 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3425 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3426
3427 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3428 {
3429 unsigned int pqrs;
3430 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3431 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3432
3433 pqrs = ((insn & 0x00800000) >> 20)
3434 | ((insn & 0x00300000) >> 19)
3435 | ((insn & 0x00000040) >> 6);
3436
3437 switch (pqrs)
3438 {
3439 case 0: /* fmac[sd]. */
3440 case 1: /* fnmac[sd]. */
3441 case 2: /* fmsc[sd]. */
3442 case 3: /* fnmsc[sd]. */
3443 pipe = VFP11_FMAC;
3444 bfd_arm_vfp11_write_mask (destmask, fd);
3445 regs[0] = fd;
3446 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3447 regs[2] = fm;
3448 *numregs = 3;
3449 break;
3450
3451 case 4: /* fmul[sd]. */
3452 case 5: /* fnmul[sd]. */
3453 case 6: /* fadd[sd]. */
3454 case 7: /* fsub[sd]. */
3455 pipe = VFP11_FMAC;
3456 goto vfp_binop;
3457
3458 case 8: /* fdiv[sd]. */
3459 pipe = VFP11_DS;
3460 vfp_binop:
3461 bfd_arm_vfp11_write_mask (destmask, fd);
3462 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3463 regs[1] = fm;
3464 *numregs = 2;
3465 break;
3466
3467 case 15: /* extended opcode. */
3468 {
3469 unsigned int extn = ((insn >> 15) & 0x1e)
3470 | ((insn >> 7) & 1);
3471
3472 switch (extn)
3473 {
3474 case 0: /* fcpy[sd]. */
3475 case 1: /* fabs[sd]. */
3476 case 2: /* fneg[sd]. */
3477 case 8: /* fcmp[sd]. */
3478 case 9: /* fcmpe[sd]. */
3479 case 10: /* fcmpz[sd]. */
3480 case 11: /* fcmpez[sd]. */
3481 case 16: /* fuito[sd]. */
3482 case 17: /* fsito[sd]. */
3483 case 24: /* ftoui[sd]. */
3484 case 25: /* ftouiz[sd]. */
3485 case 26: /* ftosi[sd]. */
3486 case 27: /* ftosiz[sd]. */
3487 /* These instructions will not bounce due to underflow. */
3488 *numregs = 0;
3489 pipe = VFP11_FMAC;
3490 break;
3491
3492 case 3: /* fsqrt[sd]. */
3493 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3494 registers to cause the erratum in previous instructions. */
3495 bfd_arm_vfp11_write_mask (destmask, fd);
3496 pipe = VFP11_DS;
3497 break;
3498
3499 case 15: /* fcvt{ds,sd}. */
3500 {
3501 int rnum = 0;
3502
3503 bfd_arm_vfp11_write_mask (destmask, fd);
3504
3505 /* Only FCVTSD can underflow. */
3506 if ((insn & 0x100) != 0)
3507 regs[rnum++] = fm;
3508
3509 *numregs = rnum;
3510
3511 pipe = VFP11_FMAC;
3512 }
3513 break;
3514
3515 default:
3516 return VFP11_BAD;
3517 }
3518 }
3519 break;
3520
3521 default:
3522 return VFP11_BAD;
3523 }
3524 }
3525 /* Two-register transfer. */
3526 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3527 {
3528 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3529
3530 if ((insn & 0x100000) == 0)
3531 {
3532 if (is_double)
3533 bfd_arm_vfp11_write_mask (destmask, fm);
3534 else
3535 {
3536 bfd_arm_vfp11_write_mask (destmask, fm);
3537 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3538 }
3539 }
3540
3541 pipe = VFP11_LS;
3542 }
3543 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3544 {
3545 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3546 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3547
3548 switch (puw)
3549 {
3550 case 0: /* Two-reg transfer. We should catch these above. */
3551 abort ();
3552
3553 case 2: /* fldm[sdx]. */
3554 case 3:
3555 case 5:
3556 {
3557 unsigned int i, offset = insn & 0xff;
3558
3559 if (is_double)
3560 offset >>= 1;
3561
3562 for (i = fd; i < fd + offset; i++)
3563 bfd_arm_vfp11_write_mask (destmask, i);
3564 }
3565 break;
3566
3567 case 4: /* fld[sd]. */
3568 case 6:
3569 bfd_arm_vfp11_write_mask (destmask, fd);
3570 break;
3571
3572 default:
3573 return VFP11_BAD;
3574 }
3575
3576 pipe = VFP11_LS;
3577 }
3578 /* Single-register transfer. Note L==0. */
3579 else if ((insn & 0x0f100e10) == 0x0e000a10)
3580 {
3581 unsigned int opcode = (insn >> 21) & 7;
3582 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3583
3584 switch (opcode)
3585 {
3586 case 0: /* fmsr/fmdlr. */
3587 case 1: /* fmdhr. */
3588 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3589 destination register. I don't know if this is exactly right,
3590 but it is the conservative choice. */
3591 bfd_arm_vfp11_write_mask (destmask, fn);
3592 break;
3593
3594 case 7: /* fmxr. */
3595 break;
3596 }
3597
3598 pipe = VFP11_LS;
3599 }
3600
3601 return pipe;
3602}
3603
3604
3605static int elf32_arm_compare_mapping (const void * a, const void * b);
3606
3607
3608/* Look for potentially-troublesome code sequences which might trigger the
3609 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3610 (available from ARM) for details of the erratum. A short version is
3611 described in ld.texinfo. */
3612
3613bfd_boolean
3614bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3615{
3616 asection *sec;
3617 bfd_byte *contents = NULL;
3618 int state = 0;
3619 int regs[3], numregs = 0;
3620 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3621 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3622
3623 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3624 The states transition as follows:
3625
3626 0 -> 1 (vector) or 0 -> 2 (scalar)
3627 A VFP FMAC-pipeline instruction has been seen. Fill
3628 regs[0]..regs[numregs-1] with its input operands. Remember this
3629 instruction in 'first_fmac'.
3630
3631 1 -> 2
3632 Any instruction, except for a VFP instruction which overwrites
3633 regs[*].
3634
3635 1 -> 3 [ -> 0 ] or
3636 2 -> 3 [ -> 0 ]
3637 A VFP instruction has been seen which overwrites any of regs[*].
3638 We must make a veneer! Reset state to 0 before examining next
3639 instruction.
3640
3641 2 -> 0
3642 If we fail to match anything in state 2, reset to state 0 and reset
3643 the instruction pointer to the instruction after 'first_fmac'.
3644
3645 If the VFP11 vector mode is in use, there must be at least two unrelated
3646 instructions between anti-dependent VFP11 instructions to properly avoid
3647 triggering the erratum, hence the use of the extra state 1.
3648 */
3649
3650 /* If we are only performing a partial link do not bother
3651 to construct any glue. */
3652 if (link_info->relocatable)
3653 return TRUE;
3654
3655 /* We should have chosen a fix type by the time we get here. */
3656 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3657
3658 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3659 return TRUE;
2e6030b9
MS
3660
3661 /* Skip if this bfd does not correspond to an ELF image. */
3662 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3663 return TRUE;
c7b8f16e
JB
3664
3665 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3666 {
3667 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3668 struct _arm_elf_section_data *sec_data;
3669
3670 /* If we don't have executable progbits, we're not interested in this
3671 section. Also skip if section is to be excluded. */
3672 if (elf_section_type (sec) != SHT_PROGBITS
3673 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3674 || (sec->flags & SEC_EXCLUDE) != 0
3675 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3676 continue;
3677
3678 sec_data = elf32_arm_section_data (sec);
3679
3680 if (sec_data->mapcount == 0)
3681 continue;
3682
3683 if (elf_section_data (sec)->this_hdr.contents != NULL)
3684 contents = elf_section_data (sec)->this_hdr.contents;
3685 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3686 goto error_return;
3687
3688 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3689 elf32_arm_compare_mapping);
3690
3691 for (span = 0; span < sec_data->mapcount; span++)
3692 {
3693 unsigned int span_start = sec_data->map[span].vma;
3694 unsigned int span_end = (span == sec_data->mapcount - 1)
3695 ? sec->size : sec_data->map[span + 1].vma;
3696 char span_type = sec_data->map[span].type;
3697
3698 /* FIXME: Only ARM mode is supported at present. We may need to
3699 support Thumb-2 mode also at some point. */
3700 if (span_type != 'a')
3701 continue;
3702
3703 for (i = span_start; i < span_end;)
3704 {
3705 unsigned int next_i = i + 4;
3706 unsigned int insn = bfd_big_endian (abfd)
3707 ? (contents[i] << 24)
3708 | (contents[i + 1] << 16)
3709 | (contents[i + 2] << 8)
3710 | contents[i + 3]
3711 : (contents[i + 3] << 24)
3712 | (contents[i + 2] << 16)
3713 | (contents[i + 1] << 8)
3714 | contents[i];
3715 unsigned int writemask = 0;
3716 enum bfd_arm_vfp11_pipe pipe;
3717
3718 switch (state)
3719 {
3720 case 0:
3721 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3722 &numregs);
3723 /* I'm assuming the VFP11 erratum can trigger with denorm
3724 operands on either the FMAC or the DS pipeline. This might
3725 lead to slightly overenthusiastic veneer insertion. */
3726 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3727 {
3728 state = use_vector ? 1 : 2;
3729 first_fmac = i;
3730 veneer_of_insn = insn;
3731 }
3732 break;
3733
3734 case 1:
3735 {
3736 int other_regs[3], other_numregs;
3737 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3738 other_regs,
3739 &other_numregs);
3740 if (pipe != VFP11_BAD
3741 && bfd_arm_vfp11_antidependency (writemask, regs,
3742 numregs))
3743 state = 3;
3744 else
3745 state = 2;
3746 }
3747 break;
3748
3749 case 2:
3750 {
3751 int other_regs[3], other_numregs;
3752 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3753 other_regs,
3754 &other_numregs);
3755 if (pipe != VFP11_BAD
3756 && bfd_arm_vfp11_antidependency (writemask, regs,
3757 numregs))
3758 state = 3;
3759 else
3760 {
3761 state = 0;
3762 next_i = first_fmac + 4;
3763 }
3764 }
3765 break;
3766
3767 case 3:
3768 abort (); /* Should be unreachable. */
3769 }
3770
3771 if (state == 3)
3772 {
3773 elf32_vfp11_erratum_list *newerr
3774 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3775 int errcount;
3776
3777 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3778
3779 newerr->u.b.vfp_insn = veneer_of_insn;
3780
3781 switch (span_type)
3782 {
3783 case 'a':
3784 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3785 break;
3786
3787 default:
3788 abort ();
3789 }
3790
3791 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3792 first_fmac);
3793
3794 newerr->vma = -1;
3795
3796 newerr->next = sec_data->erratumlist;
3797 sec_data->erratumlist = newerr;
3798
3799 state = 0;
3800 }
3801
3802 i = next_i;
3803 }
3804 }
3805
3806 if (contents != NULL
3807 && elf_section_data (sec)->this_hdr.contents != contents)
3808 free (contents);
3809 contents = NULL;
3810 }
3811
3812 return TRUE;
3813
3814error_return:
3815 if (contents != NULL
3816 && elf_section_data (sec)->this_hdr.contents != contents)
3817 free (contents);
3818
3819 return FALSE;
3820}
3821
3822/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3823 after sections have been laid out, using specially-named symbols. */
3824
3825void
3826bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3827 struct bfd_link_info *link_info)
3828{
3829 asection *sec;
3830 struct elf32_arm_link_hash_table *globals;
3831 char *tmp_name;
3832
3833 if (link_info->relocatable)
3834 return;
2e6030b9
MS
3835
3836 /* Skip if this bfd does not correspond to an ELF image. */
3837 if (bfd_get_flavour (abfd) != bfd_target_elf_flavour)
3838 return;
3839
c7b8f16e
JB
3840 globals = elf32_arm_hash_table (link_info);
3841
3842 tmp_name = bfd_malloc ((bfd_size_type) strlen
3843 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3844
3845 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3846 {
3847 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3848 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3849
3850 for (; errnode != NULL; errnode = errnode->next)
3851 {
3852 struct elf_link_hash_entry *myh;
3853 bfd_vma vma;
3854
3855 switch (errnode->type)
3856 {
3857 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3858 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3859 /* Find veneer symbol. */
3860 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3861 errnode->u.b.veneer->u.v.id);
3862
3863 myh = elf_link_hash_lookup
3864 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3865
3866 if (myh == NULL)
3867 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3868 "`%s'"), abfd, tmp_name);
3869
3870 vma = myh->root.u.def.section->output_section->vma
3871 + myh->root.u.def.section->output_offset
3872 + myh->root.u.def.value;
3873
3874 errnode->u.b.veneer->vma = vma;
3875 break;
3876
3877 case VFP11_ERRATUM_ARM_VENEER:
3878 case VFP11_ERRATUM_THUMB_VENEER:
3879 /* Find return location. */
3880 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3881 errnode->u.v.id);
3882
3883 myh = elf_link_hash_lookup
3884 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3885
3886 if (myh == NULL)
3887 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3888 "`%s'"), abfd, tmp_name);
3889
3890 vma = myh->root.u.def.section->output_section->vma
3891 + myh->root.u.def.section->output_offset
3892 + myh->root.u.def.value;
3893
3894 errnode->u.v.branch->vma = vma;
3895 break;
3896
3897 default:
3898 abort ();
3899 }
3900 }
3901 }
3902
3903 free (tmp_name);
3904}
3905
3906
eb043451
PB
3907/* Set target relocation values needed during linking. */
3908
3909void
bf21ed78
MS
3910bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
3911 struct bfd_link_info *link_info,
eb043451 3912 int target1_is_rel,
319850b4 3913 char * target2_type,
33bfe774 3914 int fix_v4bx,
c7b8f16e 3915 int use_blx,
bf21ed78 3916 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 3917 int no_enum_warn, int pic_veneer)
eb043451
PB
3918{
3919 struct elf32_arm_link_hash_table *globals;
3920
3921 globals = elf32_arm_hash_table (link_info);
3922
3923 globals->target1_is_rel = target1_is_rel;
3924 if (strcmp (target2_type, "rel") == 0)
3925 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB
3926 else if (strcmp (target2_type, "abs") == 0)
3927 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB
3928 else if (strcmp (target2_type, "got-rel") == 0)
3929 globals->target2_reloc = R_ARM_GOT_PREL;
3930 else
3931 {
3932 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
3933 target2_type);
3934 }
319850b4 3935 globals->fix_v4bx = fix_v4bx;
33bfe774 3936 globals->use_blx |= use_blx;
c7b8f16e 3937 globals->vfp11_fix = vfp11_fix;
27e55c4d 3938 globals->pic_veneer = pic_veneer;
bf21ed78
MS
3939
3940 elf32_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 3941}
eb043451 3942
252b5132
RH
3943/* The thumb form of a long branch is a bit finicky, because the offset
3944 encoding is split over two fields, each in it's own instruction. They
f21f3fe0 3945 can occur in any order. So given a thumb form of long branch, and an
252b5132 3946 offset, insert the offset into the thumb branch and return finished
f21f3fe0 3947 instruction.
252b5132 3948
f21f3fe0 3949 It takes two thumb instructions to encode the target address. Each has
4cc11e76 3950 11 bits to invest. The upper 11 bits are stored in one (identified by
f21f3fe0
UD
3951 H-0.. see below), the lower 11 bits are stored in the other (identified
3952 by H-1).
252b5132 3953
f21f3fe0 3954 Combine together and shifted left by 1 (it's a half word address) and
252b5132
RH
3955 there you have it.
3956
3957 Op: 1111 = F,
3958 H-0, upper address-0 = 000
3959 Op: 1111 = F,
3960 H-1, lower address-0 = 800
3961
f21f3fe0 3962 They can be ordered either way, but the arm tools I've seen always put
252b5132
RH
3963 the lower one first. It probably doesn't matter. krk@cygnus.com
3964
3965 XXX: Actually the order does matter. The second instruction (H-1)
3966 moves the computed address into the PC, so it must be the second one
3967 in the sequence. The problem, however is that whilst little endian code
3968 stores the instructions in HI then LOW order, big endian code does the
dfc5f959 3969 reverse. nickc@cygnus.com. */
252b5132 3970
dfc5f959
NC
3971#define LOW_HI_ORDER 0xF800F000
3972#define HI_LOW_ORDER 0xF000F800
252b5132
RH
3973
3974static insn32
57e8b36a 3975insert_thumb_branch (insn32 br_insn, int rel_off)
252b5132
RH
3976{
3977 unsigned int low_bits;
3978 unsigned int high_bits;
3979
252b5132
RH
3980 BFD_ASSERT ((rel_off & 1) != 1);
3981
dfc5f959
NC
3982 rel_off >>= 1; /* Half word aligned address. */
3983 low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */
3984 high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */
252b5132
RH
3985
3986 if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER)
3987 br_insn = LOW_HI_ORDER | (low_bits << 16) | high_bits;
3988 else if ((br_insn & HI_LOW_ORDER) == HI_LOW_ORDER)
3989 br_insn = HI_LOW_ORDER | (high_bits << 16) | low_bits;
3990 else
9b485d32 3991 /* FIXME: abort is probably not the right call. krk@cygnus.com */
57e8b36a 3992 abort (); /* Error - not a valid branch instruction form. */
252b5132 3993
252b5132
RH
3994 return br_insn;
3995}
3996
52ab56c2
PB
3997
3998/* Store an Arm insn into an output section not processed by
3999 elf32_arm_write_section. */
4000
4001static void
4002put_arm_insn (struct elf32_arm_link_hash_table *htab,
4003 bfd * output_bfd, bfd_vma val, void * ptr)
4004{
4005 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4006 bfd_putl32 (val, ptr);
4007 else
4008 bfd_putb32 (val, ptr);
4009}
4010
4011
4012/* Store a 16-bit Thumb insn into an output section not processed by
4013 elf32_arm_write_section. */
4014
4015static void
4016put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4017 bfd * output_bfd, bfd_vma val, void * ptr)
4018{
4019 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4020 bfd_putl16 (val, ptr);
4021 else
4022 bfd_putb16 (val, ptr);
4023}
4024
4025
9b485d32
NC
4026/* Thumb code calling an ARM function. */
4027
252b5132 4028static int
57e8b36a
NC
4029elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4030 const char * name,
4031 bfd * input_bfd,
4032 bfd * output_bfd,
4033 asection * input_section,
4034 bfd_byte * hit_data,
4035 asection * sym_sec,
4036 bfd_vma offset,
4037 bfd_signed_vma addend,
f2a9dd69
DJ
4038 bfd_vma val,
4039 char **error_message)
252b5132 4040{
bcbdc74c 4041 asection * s = 0;
dc810e39 4042 bfd_vma my_offset;
252b5132
RH
4043 unsigned long int tmp;
4044 long int ret_offset;
bcbdc74c
NC
4045 struct elf_link_hash_entry * myh;
4046 struct elf32_arm_link_hash_table * globals;
252b5132 4047
f2a9dd69 4048 myh = find_thumb_glue (info, name, error_message);
252b5132 4049 if (myh == NULL)
b34976b6 4050 return FALSE;
252b5132
RH
4051
4052 globals = elf32_arm_hash_table (info);
4053
4054 BFD_ASSERT (globals != NULL);
4055 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4056
4057 my_offset = myh->root.u.def.value;
4058
4059 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4060 THUMB2ARM_GLUE_SECTION_NAME);
4061
4062 BFD_ASSERT (s != NULL);
4063 BFD_ASSERT (s->contents != NULL);
4064 BFD_ASSERT (s->output_section != NULL);
4065
4066 if ((my_offset & 0x01) == 0x01)
4067 {
4068 if (sym_sec != NULL
4069 && sym_sec->owner != NULL
4070 && !INTERWORK_FLAG (sym_sec->owner))
4071 {
8f615d07 4072 (*_bfd_error_handler)
d003868e
AM
4073 (_("%B(%s): warning: interworking not enabled.\n"
4074 " first occurrence: %B: thumb call to arm"),
4075 sym_sec->owner, input_bfd, name);
252b5132 4076
b34976b6 4077 return FALSE;
252b5132
RH
4078 }
4079
4080 --my_offset;
4081 myh->root.u.def.value = my_offset;
4082
52ab56c2
PB
4083 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4084 s->contents + my_offset);
252b5132 4085
52ab56c2
PB
4086 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4087 s->contents + my_offset + 2);
252b5132
RH
4088
4089 ret_offset =
9b485d32
NC
4090 /* Address of destination of the stub. */
4091 ((bfd_signed_vma) val)
252b5132 4092 - ((bfd_signed_vma)
57e8b36a
NC
4093 /* Offset from the start of the current section
4094 to the start of the stubs. */
9b485d32
NC
4095 (s->output_offset
4096 /* Offset of the start of this stub from the start of the stubs. */
4097 + my_offset
4098 /* Address of the start of the current section. */
4099 + s->output_section->vma)
4100 /* The branch instruction is 4 bytes into the stub. */
4101 + 4
4102 /* ARM branches work from the pc of the instruction + 8. */
4103 + 8);
252b5132 4104
52ab56c2
PB
4105 put_arm_insn (globals, output_bfd,
4106 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4107 s->contents + my_offset + 4);
252b5132
RH
4108 }
4109
4110 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4111
427bfd90
NC
4112 /* Now go back and fix up the original BL insn to point to here. */
4113 ret_offset =
4114 /* Address of where the stub is located. */
4115 (s->output_section->vma + s->output_offset + my_offset)
4116 /* Address of where the BL is located. */
57e8b36a
NC
4117 - (input_section->output_section->vma + input_section->output_offset
4118 + offset)
427bfd90
NC
4119 /* Addend in the relocation. */
4120 - addend
4121 /* Biassing for PC-relative addressing. */
4122 - 8;
252b5132
RH
4123
4124 tmp = bfd_get_32 (input_bfd, hit_data
4125 - input_section->vma);
4126
4127 bfd_put_32 (output_bfd,
dc810e39 4128 (bfd_vma) insert_thumb_branch (tmp, ret_offset),
252b5132
RH
4129 hit_data - input_section->vma);
4130
b34976b6 4131 return TRUE;
252b5132
RH
4132}
4133
a4fd1a8e 4134/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4135
a4fd1a8e
PB
4136static struct elf_link_hash_entry *
4137elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4138 const char * name,
4139 bfd * input_bfd,
4140 bfd * output_bfd,
4141 asection * sym_sec,
4142 bfd_vma val,
f2a9dd69
DJ
4143 asection *s,
4144 char **error_message)
252b5132 4145{
dc810e39 4146 bfd_vma my_offset;
252b5132 4147 long int ret_offset;
bcbdc74c
NC
4148 struct elf_link_hash_entry * myh;
4149 struct elf32_arm_link_hash_table * globals;
252b5132 4150
f2a9dd69 4151 myh = find_arm_glue (info, name, error_message);
252b5132 4152 if (myh == NULL)
a4fd1a8e 4153 return NULL;
252b5132
RH
4154
4155 globals = elf32_arm_hash_table (info);
4156
4157 BFD_ASSERT (globals != NULL);
4158 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4159
4160 my_offset = myh->root.u.def.value;
252b5132
RH
4161
4162 if ((my_offset & 0x01) == 0x01)
4163 {
4164 if (sym_sec != NULL
4165 && sym_sec->owner != NULL
4166 && !INTERWORK_FLAG (sym_sec->owner))
4167 {
8f615d07 4168 (*_bfd_error_handler)
d003868e
AM
4169 (_("%B(%s): warning: interworking not enabled.\n"
4170 " first occurrence: %B: arm call to thumb"),
4171 sym_sec->owner, input_bfd, name);
252b5132 4172 }
9b485d32 4173
252b5132
RH
4174 --my_offset;
4175 myh->root.u.def.value = my_offset;
4176
27e55c4d
PB
4177 if (info->shared || globals->root.is_relocatable_executable
4178 || globals->pic_veneer)
8f6277f5
PB
4179 {
4180 /* For relocatable objects we can't use absolute addresses,
4181 so construct the address from a relative offset. */
4182 /* TODO: If the offset is small it's probably worth
4183 constructing the address with adds. */
52ab56c2
PB
4184 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4185 s->contents + my_offset);
4186 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4187 s->contents + my_offset + 4);
4188 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4189 s->contents + my_offset + 8);
8f6277f5
PB
4190 /* Adjust the offset by 4 for the position of the add,
4191 and 8 for the pipeline offset. */
4192 ret_offset = (val - (s->output_offset
4193 + s->output_section->vma
4194 + my_offset + 12))
4195 | 1;
4196 bfd_put_32 (output_bfd, ret_offset,
4197 s->contents + my_offset + 12);
4198 }
26079076
PB
4199 else if (globals->use_blx)
4200 {
4201 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4202 s->contents + my_offset);
4203
4204 /* It's a thumb address. Add the low order bit. */
4205 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4206 s->contents + my_offset + 4);
4207 }
8f6277f5
PB
4208 else
4209 {
52ab56c2
PB
4210 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4211 s->contents + my_offset);
252b5132 4212
52ab56c2
PB
4213 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4214 s->contents + my_offset + 4);
252b5132 4215
8f6277f5
PB
4216 /* It's a thumb address. Add the low order bit. */
4217 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4218 s->contents + my_offset + 8);
4219 }
252b5132
RH
4220 }
4221
4222 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4223
a4fd1a8e
PB
4224 return myh;
4225}
4226
4227/* Arm code calling a Thumb function. */
4228
4229static int
4230elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4231 const char * name,
4232 bfd * input_bfd,
4233 bfd * output_bfd,
4234 asection * input_section,
4235 bfd_byte * hit_data,
4236 asection * sym_sec,
4237 bfd_vma offset,
4238 bfd_signed_vma addend,
f2a9dd69
DJ
4239 bfd_vma val,
4240 char **error_message)
a4fd1a8e
PB
4241{
4242 unsigned long int tmp;
4243 bfd_vma my_offset;
4244 asection * s;
4245 long int ret_offset;
4246 struct elf_link_hash_entry * myh;
4247 struct elf32_arm_link_hash_table * globals;
4248
4249 globals = elf32_arm_hash_table (info);
4250
4251 BFD_ASSERT (globals != NULL);
4252 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4253
4254 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4255 ARM2THUMB_GLUE_SECTION_NAME);
4256 BFD_ASSERT (s != NULL);
4257 BFD_ASSERT (s->contents != NULL);
4258 BFD_ASSERT (s->output_section != NULL);
4259
4260 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4261 sym_sec, val, s, error_message);
a4fd1a8e
PB
4262 if (!myh)
4263 return FALSE;
4264
4265 my_offset = myh->root.u.def.value;
252b5132
RH
4266 tmp = bfd_get_32 (input_bfd, hit_data);
4267 tmp = tmp & 0xFF000000;
4268
9b485d32 4269 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM
4270 ret_offset = (s->output_offset
4271 + my_offset
4272 + s->output_section->vma
4273 - (input_section->output_offset
4274 + input_section->output_section->vma
4275 + offset + addend)
4276 - 8);
9a5aca8c 4277
252b5132
RH
4278 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4279
dc810e39 4280 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4281
b34976b6 4282 return TRUE;
252b5132
RH
4283}
4284
a4fd1a8e
PB
4285/* Populate Arm stub for an exported Thumb function. */
4286
4287static bfd_boolean
4288elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4289{
4290 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4291 asection * s;
4292 struct elf_link_hash_entry * myh;
4293 struct elf32_arm_link_hash_entry *eh;
4294 struct elf32_arm_link_hash_table * globals;
4295 asection *sec;
4296 bfd_vma val;
f2a9dd69 4297 char *error_message;
a4fd1a8e
PB
4298
4299 eh = elf32_arm_hash_entry(h);
4300 /* Allocate stubs for exported Thumb functions on v4t. */
4301 if (eh->export_glue == NULL)
4302 return TRUE;
4303
4304 globals = elf32_arm_hash_table (info);
4305
4306 BFD_ASSERT (globals != NULL);
4307 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4308
4309 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4310 ARM2THUMB_GLUE_SECTION_NAME);
4311 BFD_ASSERT (s != NULL);
4312 BFD_ASSERT (s->contents != NULL);
4313 BFD_ASSERT (s->output_section != NULL);
4314
4315 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB
4316
4317 BFD_ASSERT (sec->output_section != NULL);
4318
a4fd1a8e
PB
4319 val = eh->export_glue->root.u.def.value + sec->output_offset
4320 + sec->output_section->vma;
4321 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4322 h->root.u.def.section->owner,
f2a9dd69
DJ
4323 globals->obfd, sec, val, s,
4324 &error_message);
a4fd1a8e
PB
4325 BFD_ASSERT (myh);
4326 return TRUE;
4327}
4328
4329/* Generate Arm stubs for exported Thumb symbols. */
4330static void
4331elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4332 struct bfd_link_info *link_info)
4333{
4334 struct elf32_arm_link_hash_table * globals;
4335
4336 if (!link_info)
4337 return;
4338
4339 globals = elf32_arm_hash_table (link_info);
84c08195
PB
4340 /* If blx is available then exported Thumb symbols are OK and there is
4341 nothing to do. */
a4fd1a8e
PB
4342 if (globals->use_blx)
4343 return;
4344
4345 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4346 link_info);
4347}
4348
eb043451
PB
4349/* Some relocations map to different relocations depending on the
4350 target. Return the real relocation. */
4351static int
4352arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4353 int r_type)
4354{
4355 switch (r_type)
4356 {
4357 case R_ARM_TARGET1:
4358 if (globals->target1_is_rel)
4359 return R_ARM_REL32;
4360 else
4361 return R_ARM_ABS32;
4362
4363 case R_ARM_TARGET2:
4364 return globals->target2_reloc;
4365
4366 default:
4367 return r_type;
4368 }
4369}
eb043451 4370
ba93b8ac
DJ
4371/* Return the base VMA address which should be subtracted from real addresses
4372 when resolving @dtpoff relocation.
4373 This is PT_TLS segment p_vaddr. */
4374
4375static bfd_vma
4376dtpoff_base (struct bfd_link_info *info)
4377{
4378 /* If tls_sec is NULL, we should have signalled an error already. */
4379 if (elf_hash_table (info)->tls_sec == NULL)
4380 return 0;
4381 return elf_hash_table (info)->tls_sec->vma;
4382}
4383
4384/* Return the relocation value for @tpoff relocation
4385 if STT_TLS virtual address is ADDRESS. */
4386
4387static bfd_vma
4388tpoff (struct bfd_link_info *info, bfd_vma address)
4389{
4390 struct elf_link_hash_table *htab = elf_hash_table (info);
4391 bfd_vma base;
4392
4393 /* If tls_sec is NULL, we should have signalled an error already. */
4394 if (htab->tls_sec == NULL)
4395 return 0;
4396 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4397 return address - htab->tls_sec->vma + base;
4398}
4399
00a97672
RS
4400/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4401 VALUE is the relocation value. */
4402
4403static bfd_reloc_status_type
4404elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4405{
4406 if (value > 0xfff)
4407 return bfd_reloc_overflow;
4408
4409 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4410 bfd_put_32 (abfd, value, data);
4411 return bfd_reloc_ok;
4412}
4413
4962c51a
MS
4414/* For a given value of n, calculate the value of G_n as required to
4415 deal with group relocations. We return it in the form of an
4416 encoded constant-and-rotation, together with the final residual. If n is
4417 specified as less than zero, then final_residual is filled with the
4418 input value and no further action is performed. */
4419
4420static bfd_vma
4421calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4422{
4423 int current_n;
4424 bfd_vma g_n;
4425 bfd_vma encoded_g_n = 0;
4426 bfd_vma residual = value; /* Also known as Y_n. */
4427
4428 for (current_n = 0; current_n <= n; current_n++)
4429 {
4430 int shift;
4431
4432 /* Calculate which part of the value to mask. */
4433 if (residual == 0)
4434 shift = 0;
4435 else
4436 {
4437 int msb;
4438
4439 /* Determine the most significant bit in the residual and
4440 align the resulting value to a 2-bit boundary. */
4441 for (msb = 30; msb >= 0; msb -= 2)
4442 if (residual & (3 << msb))
4443 break;
4444
4445 /* The desired shift is now (msb - 6), or zero, whichever
4446 is the greater. */
4447 shift = msb - 6;
4448 if (shift < 0)
4449 shift = 0;
4450 }
4451
4452 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4453 g_n = residual & (0xff << shift);
4454 encoded_g_n = (g_n >> shift)
4455 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4456
4457 /* Calculate the residual for the next time around. */
4458 residual &= ~g_n;
4459 }
4460
4461 *final_residual = residual;
4462
4463 return encoded_g_n;
4464}
4465
4466/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4467 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4468static int
4469identify_add_or_sub(bfd_vma insn)
4470{
4471 int opcode = insn & 0x1e00000;
4472
4473 if (opcode == 1 << 23) /* ADD */
4474 return 1;
4475
4476 if (opcode == 1 << 22) /* SUB */
4477 return -1;
4478
4479 return 0;
4480}
4481
e95de063
MS
4482/* Determine if we're dealing with a Thumb-2 object. */
4483
4484static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4485{
104d59d1
JM
4486 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4487 Tag_CPU_arch);
e95de063
MS
4488 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4489}
4490
252b5132 4491/* Perform a relocation as part of a final link. */
9b485d32 4492
252b5132 4493static bfd_reloc_status_type
57e8b36a
NC
4494elf32_arm_final_link_relocate (reloc_howto_type * howto,
4495 bfd * input_bfd,
4496 bfd * output_bfd,
4497 asection * input_section,
4498 bfd_byte * contents,
4499 Elf_Internal_Rela * rel,
4500 bfd_vma value,
4501 struct bfd_link_info * info,
4502 asection * sym_sec,
4503 const char * sym_name,
4504 int sym_flags,
0945cdfd 4505 struct elf_link_hash_entry * h,
f2a9dd69
DJ
4506 bfd_boolean * unresolved_reloc_p,
4507 char **error_message)
252b5132
RH
4508{
4509 unsigned long r_type = howto->type;
4510 unsigned long r_symndx;
4511 bfd_byte * hit_data = contents + rel->r_offset;
4512 bfd * dynobj = NULL;
4513 Elf_Internal_Shdr * symtab_hdr;
4514 struct elf_link_hash_entry ** sym_hashes;
4515 bfd_vma * local_got_offsets;
4516 asection * sgot = NULL;
4517 asection * splt = NULL;
4518 asection * sreloc = NULL;
252b5132 4519 bfd_vma addend;
ba96a88f
NC
4520 bfd_signed_vma signed_addend;
4521 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4522
9c504268
PB
4523 globals = elf32_arm_hash_table (info);
4524
9c504268
PB
4525 /* Some relocation type map to different relocations depending on the
4526 target. We pick the right one here. */
eb043451
PB
4527 r_type = arm_real_reloc_type (globals, r_type);
4528 if (r_type != howto->type)
4529 howto = elf32_arm_howto_from_type (r_type);
9c504268 4530
cac15327
NC
4531 /* If the start address has been set, then set the EF_ARM_HASENTRY
4532 flag. Setting this more than once is redundant, but the cost is
4533 not too high, and it keeps the code simple.
99e4ae17 4534
cac15327
NC
4535 The test is done here, rather than somewhere else, because the
4536 start address is only set just before the final link commences.
4537
4538 Note - if the user deliberately sets a start address of 0, the
4539 flag will not be set. */
4540 if (bfd_get_start_address (output_bfd) != 0)
4541 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4542
252b5132
RH
4543 dynobj = elf_hash_table (info)->dynobj;
4544 if (dynobj)
4545 {
4546 sgot = bfd_get_section_by_name (dynobj, ".got");
4547 splt = bfd_get_section_by_name (dynobj, ".plt");
4548 }
4549 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
4550 sym_hashes = elf_sym_hashes (input_bfd);
4551 local_got_offsets = elf_local_got_offsets (input_bfd);
4552 r_symndx = ELF32_R_SYM (rel->r_info);
4553
4e7fd91e 4554 if (globals->use_rel)
ba96a88f 4555 {
4e7fd91e
PB
4556 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4557
4558 if (addend & ((howto->src_mask + 1) >> 1))
4559 {
4560 signed_addend = -1;
4561 signed_addend &= ~ howto->src_mask;
4562 signed_addend |= addend;
4563 }
4564 else
4565 signed_addend = addend;
ba96a88f
NC
4566 }
4567 else
4e7fd91e 4568 addend = signed_addend = rel->r_addend;
f21f3fe0 4569
252b5132
RH
4570 switch (r_type)
4571 {
4572 case R_ARM_NONE:
28a094c2
DJ
4573 /* We don't need to find a value for this symbol. It's just a
4574 marker. */
4575 *unresolved_reloc_p = FALSE;
252b5132
RH
4576 return bfd_reloc_ok;
4577
00a97672
RS
4578 case R_ARM_ABS12:
4579 if (!globals->vxworks_p)
4580 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4581
252b5132
RH
4582 case R_ARM_PC24:
4583 case R_ARM_ABS32:
bb224fc3 4584 case R_ARM_ABS32_NOI:
252b5132 4585 case R_ARM_REL32:
bb224fc3 4586 case R_ARM_REL32_NOI:
5b5bb741
PB
4587 case R_ARM_CALL:
4588 case R_ARM_JUMP24:
dfc5f959 4589 case R_ARM_XPC25:
eb043451 4590 case R_ARM_PREL31:
7359ea65 4591 case R_ARM_PLT32:
7359ea65
DJ
4592 /* Handle relocations which should use the PLT entry. ABS32/REL32
4593 will use the symbol's value, which may point to a PLT entry, but we
4594 don't need to handle that here. If we created a PLT entry, all
4595 branches in this object should go to it. */
bb224fc3
MS
4596 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4597 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4598 && h != NULL
c84cd8ee 4599 && splt != NULL
7359ea65
DJ
4600 && h->plt.offset != (bfd_vma) -1)
4601 {
c84cd8ee
DJ
4602 /* If we've created a .plt section, and assigned a PLT entry to
4603 this function, it should not be known to bind locally. If
4604 it were, we would have cleared the PLT entry. */
7359ea65
DJ
4605 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4606
4607 value = (splt->output_section->vma
4608 + splt->output_offset
4609 + h->plt.offset);
0945cdfd 4610 *unresolved_reloc_p = FALSE;
7359ea65
DJ
4611 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4612 contents, rel->r_offset, value,
00a97672 4613 rel->r_addend);
7359ea65
DJ
4614 }
4615
67687978
PB
4616 /* When generating a shared object or relocatable executable, these
4617 relocations are copied into the output file to be resolved at
4618 run time. */
4619 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4620 && (input_section->flags & SEC_ALLOC)
bb224fc3 4621 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4622 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ
4623 && (h == NULL
4624 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4625 || h->root.type != bfd_link_hash_undefweak)
4626 && r_type != R_ARM_PC24
5b5bb741
PB
4627 && r_type != R_ARM_CALL
4628 && r_type != R_ARM_JUMP24
ee06dc07 4629 && r_type != R_ARM_PREL31
7359ea65 4630 && r_type != R_ARM_PLT32)
252b5132 4631 {
947216bf
AM
4632 Elf_Internal_Rela outrel;
4633 bfd_byte *loc;
b34976b6 4634 bfd_boolean skip, relocate;
f21f3fe0 4635
0945cdfd
DJ
4636 *unresolved_reloc_p = FALSE;
4637
252b5132
RH
4638 if (sreloc == NULL)
4639 {
4640 const char * name;
f21f3fe0 4641
252b5132
RH
4642 name = (bfd_elf_string_from_elf_section
4643 (input_bfd,
4644 elf_elfheader (input_bfd)->e_shstrndx,
4645 elf_section_data (input_section)->rel_hdr.sh_name));
4646 if (name == NULL)
4647 return bfd_reloc_notsupported;
f21f3fe0 4648
00a97672 4649 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4650
252b5132
RH
4651 sreloc = bfd_get_section_by_name (dynobj, name);
4652 BFD_ASSERT (sreloc != NULL);
4653 }
f21f3fe0 4654
b34976b6
AM
4655 skip = FALSE;
4656 relocate = FALSE;
f21f3fe0 4657
00a97672 4658 outrel.r_addend = addend;
c629eae0
JJ
4659 outrel.r_offset =
4660 _bfd_elf_section_offset (output_bfd, info, input_section,
4661 rel->r_offset);
4662 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4663 skip = TRUE;
0bb2d96a 4664 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4665 skip = TRUE, relocate = TRUE;
252b5132
RH
4666 outrel.r_offset += (input_section->output_section->vma
4667 + input_section->output_offset);
f21f3fe0 4668
252b5132 4669 if (skip)
0bb2d96a 4670 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB
4671 else if (h != NULL
4672 && h->dynindx != -1
7359ea65 4673 && (!info->shared
5e681ec4 4674 || !info->symbolic
f5385ebf 4675 || !h->def_regular))
5e681ec4 4676 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH
4677 else
4678 {
a16385dc
MM
4679 int symbol;
4680
5e681ec4 4681 /* This symbol is local, or marked to become local. */
b7693d02
DJ
4682 if (sym_flags == STT_ARM_TFUNC)
4683 value |= 1;
a16385dc 4684 if (globals->symbian_p)
6366ff1e 4685 {
74541ad4
AM
4686 asection *osec;
4687
6366ff1e
MM
4688 /* On Symbian OS, the data segment and text segement
4689 can be relocated independently. Therefore, we
4690 must indicate the segment to which this
4691 relocation is relative. The BPABI allows us to
4692 use any symbol in the right segment; we just use
4693 the section symbol as it is convenient. (We
4694 cannot use the symbol given by "h" directly as it
74541ad4
AM
4695 will not appear in the dynamic symbol table.)
4696
4697 Note that the dynamic linker ignores the section
4698 symbol value, so we don't subtract osec->vma
4699 from the emitted reloc addend. */
10dbd1f3 4700 if (sym_sec)
74541ad4 4701 osec = sym_sec->output_section;
10dbd1f3 4702 else
74541ad4
AM
4703 osec = input_section->output_section;
4704 symbol = elf_section_data (osec)->dynindx;
4705 if (symbol == 0)
4706 {
4707 struct elf_link_hash_table *htab = elf_hash_table (info);
4708
4709 if ((osec->flags & SEC_READONLY) == 0
4710 && htab->data_index_section != NULL)
4711 osec = htab->data_index_section;
4712 else
4713 osec = htab->text_index_section;
4714 symbol = elf_section_data (osec)->dynindx;
4715 }
6366ff1e
MM
4716 BFD_ASSERT (symbol != 0);
4717 }
a16385dc
MM
4718 else
4719 /* On SVR4-ish systems, the dynamic loader cannot
4720 relocate the text and data segments independently,
4721 so the symbol does not matter. */
4722 symbol = 0;
4723 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS
4724 if (globals->use_rel)
4725 relocate = TRUE;
4726 else
4727 outrel.r_addend += value;
252b5132 4728 }
f21f3fe0 4729
947216bf 4730 loc = sreloc->contents;
00a97672
RS
4731 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4732 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4733
f21f3fe0 4734 /* If this reloc is against an external symbol, we do not want to
252b5132 4735 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4736 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH
4737 if (! relocate)
4738 return bfd_reloc_ok;
9a5aca8c 4739
f21f3fe0 4740 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH
4741 contents, rel->r_offset, value,
4742 (bfd_vma) 0);
4743 }
4744 else switch (r_type)
4745 {
00a97672
RS
4746 case R_ARM_ABS12:
4747 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4748
dfc5f959 4749 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB
4750 case R_ARM_CALL:
4751 case R_ARM_JUMP24:
dfc5f959 4752 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4753 case R_ARM_PLT32:
dfc5f959 4754 if (r_type == R_ARM_XPC25)
252b5132 4755 {
dfc5f959
NC
4756 /* Check for Arm calling Arm function. */
4757 /* FIXME: Should we translate the instruction into a BL
4758 instruction instead ? */
4759 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM
4760 (*_bfd_error_handler)
4761 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4762 input_bfd,
4763 h ? h->root.root.string : "(local)");
dfc5f959 4764 }
39b41c9c 4765 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC
4766 {
4767 /* Check for Arm calling Thumb function. */
4768 if (sym_flags == STT_ARM_TFUNC)
4769 {
f2a9dd69
DJ
4770 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4771 output_bfd, input_section,
4772 hit_data, sym_sec, rel->r_offset,
4773 signed_addend, value,
4774 error_message))
4775 return bfd_reloc_ok;
4776 else
4777 return bfd_reloc_dangerous;
dfc5f959 4778 }
252b5132 4779 }
ba96a88f 4780
dea514f5
PB
4781 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4782 where:
4783 S is the address of the symbol in the relocation.
4784 P is address of the instruction being relocated.
4785 A is the addend (extracted from the instruction) in bytes.
4786
4787 S is held in 'value'.
4788 P is the base address of the section containing the
4789 instruction plus the offset of the reloc into that
4790 section, ie:
4791 (input_section->output_section->vma +
4792 input_section->output_offset +
4793 rel->r_offset).
4794 A is the addend, converted into bytes, ie:
4795 (signed_addend * 4)
4796
4797 Note: None of these operations have knowledge of the pipeline
4798 size of the processor, thus it is up to the assembler to
4799 encode this information into the addend. */
4800 value -= (input_section->output_section->vma
4801 + input_section->output_offset);
4802 value -= rel->r_offset;
4e7fd91e
PB
4803 if (globals->use_rel)
4804 value += (signed_addend << howto->size);
4805 else
4806 /* RELA addends do not have to be adjusted by howto->size. */
4807 value += signed_addend;
23080146 4808
dcb5e6e6
NC
4809 signed_addend = value;
4810 signed_addend >>= howto->rightshift;
9a5aca8c 4811
5ab79981
PB
4812 /* A branch to an undefined weak symbol is turned into a jump to
4813 the next instruction. */
4814 if (h && h->root.type == bfd_link_hash_undefweak)
4815 {
4816 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4817 | 0x0affffff;
4818 }
4819 else
59f2c4e7 4820 {
9b485d32 4821 /* Perform a signed range check. */
dcb5e6e6 4822 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC
4823 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4824 return bfd_reloc_overflow;
9a5aca8c 4825
5ab79981 4826 addend = (value & 2);
39b41c9c 4827
5ab79981
PB
4828 value = (signed_addend & howto->dst_mask)
4829 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4830
5ab79981 4831 /* Set the H bit in the BLX instruction. */
39b41c9c 4832 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4833 {
5ab79981
PB
4834 if (addend)
4835 value |= (1 << 24);
4836 else
4837 value &= ~(bfd_vma)(1 << 24);
4838 }
4839 if (r_type == R_ARM_CALL)
4840 {
4841 /* Select the correct instruction (BL or BLX). */
4842 if (sym_flags == STT_ARM_TFUNC)
4843 value |= (1 << 28);
4844 else
4845 {
4846 value &= ~(bfd_vma)(1 << 28);
4847 value |= (1 << 24);
4848 }
39b41c9c
PB
4849 }
4850 }
252b5132 4851 break;
f21f3fe0 4852
252b5132
RH
4853 case R_ARM_ABS32:
4854 value += addend;
4855 if (sym_flags == STT_ARM_TFUNC)
4856 value |= 1;
4857 break;
f21f3fe0 4858
bb224fc3
MS
4859 case R_ARM_ABS32_NOI:
4860 value += addend;
4861 break;
4862
252b5132 4863 case R_ARM_REL32:
a8bc6c78
PB
4864 value += addend;
4865 if (sym_flags == STT_ARM_TFUNC)
4866 value |= 1;
252b5132 4867 value -= (input_section->output_section->vma
62efb346 4868 + input_section->output_offset + rel->r_offset);
252b5132 4869 break;
eb043451 4870
bb224fc3
MS
4871 case R_ARM_REL32_NOI:
4872 value += addend;
4873 value -= (input_section->output_section->vma
4874 + input_section->output_offset + rel->r_offset);
4875 break;
4876
eb043451
PB
4877 case R_ARM_PREL31:
4878 value -= (input_section->output_section->vma
4879 + input_section->output_offset + rel->r_offset);
4880 value += signed_addend;
4881 if (! h || h->root.type != bfd_link_hash_undefweak)
4882 {
4883 /* Check for overflow */
4884 if ((value ^ (value >> 1)) & (1 << 30))
4885 return bfd_reloc_overflow;
4886 }
4887 value &= 0x7fffffff;
4888 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
4889 if (sym_flags == STT_ARM_TFUNC)
4890 value |= 1;
4891 break;
252b5132 4892 }
f21f3fe0 4893
252b5132
RH
4894 bfd_put_32 (input_bfd, value, hit_data);
4895 return bfd_reloc_ok;
4896
4897 case R_ARM_ABS8:
4898 value += addend;
4899 if ((long) value > 0x7f || (long) value < -0x80)
4900 return bfd_reloc_overflow;
4901
4902 bfd_put_8 (input_bfd, value, hit_data);
4903 return bfd_reloc_ok;
4904
4905 case R_ARM_ABS16:
4906 value += addend;
4907
4908 if ((long) value > 0x7fff || (long) value < -0x8000)
4909 return bfd_reloc_overflow;
4910
4911 bfd_put_16 (input_bfd, value, hit_data);
4912 return bfd_reloc_ok;
4913
252b5132 4914 case R_ARM_THM_ABS5:
9b485d32 4915 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB
4916 if (globals->use_rel)
4917 {
4918 /* Need to refetch addend. */
4919 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
4920 /* ??? Need to determine shift amount from operand size. */
4921 addend >>= howto->rightshift;
4922 }
252b5132
RH
4923 value += addend;
4924
4925 /* ??? Isn't value unsigned? */
4926 if ((long) value > 0x1f || (long) value < -0x10)
4927 return bfd_reloc_overflow;
4928
4929 /* ??? Value needs to be properly shifted into place first. */
4930 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
4931 bfd_put_16 (input_bfd, value, hit_data);
4932 return bfd_reloc_ok;
4933
2cab6cc3
MS
4934 case R_ARM_THM_ALU_PREL_11_0:
4935 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
4936 {
4937 bfd_vma insn;
4938 bfd_signed_vma relocation;
4939
4940 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4941 | bfd_get_16 (input_bfd, hit_data + 2);
4942
4943 if (globals->use_rel)
4944 {
4945 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
4946 | ((insn & (1 << 26)) >> 15);
4947 if (insn & 0xf00000)
4948 signed_addend = -signed_addend;
4949 }
4950
4951 relocation = value + signed_addend;
4952 relocation -= (input_section->output_section->vma
4953 + input_section->output_offset
4954 + rel->r_offset);
4955
4956 value = abs (relocation);
4957
4958 if (value >= 0x1000)
4959 return bfd_reloc_overflow;
4960
4961 insn = (insn & 0xfb0f8f00) | (value & 0xff)
4962 | ((value & 0x700) << 4)
4963 | ((value & 0x800) << 15);
4964 if (relocation < 0)
4965 insn |= 0xa00000;
4966
4967 bfd_put_16 (input_bfd, insn >> 16, hit_data);
4968 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
4969
4970 return bfd_reloc_ok;
4971 }
4972
4973 case R_ARM_THM_PC12:
4974 /* Corresponds to: ldr.w reg, [pc, #offset]. */
4975 {
4976 bfd_vma insn;
4977 bfd_signed_vma relocation;
4978
4979 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
4980 | bfd_get_16 (input_bfd, hit_data + 2);
4981
4982 if (globals->use_rel)
4983 {
4984 signed_addend = insn & 0xfff;
4985 if (!(insn & (1 << 23)))
4986 signed_addend = -signed_addend;
4987 }
4988
4989 relocation = value + signed_addend;
4990 relocation -= (input_section->output_section->vma
4991 + input_section->output_offset
4992 + rel->r_offset);
4993
4994 value = abs (relocation);
4995
4996 if (value >= 0x1000)
4997 return bfd_reloc_overflow;
4998
4999 insn = (insn & 0xff7ff000) | value;
5000 if (relocation >= 0)
5001 insn |= (1 << 23);
5002
5003 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5004 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5005
5006 return bfd_reloc_ok;
5007 }
5008
dfc5f959 5009 case R_ARM_THM_XPC22:
c19d1205 5010 case R_ARM_THM_CALL:
bd97cb95 5011 case R_ARM_THM_JUMP24:
dfc5f959 5012 /* Thumb BL (branch long instruction). */
252b5132 5013 {
b34976b6 5014 bfd_vma relocation;
e95de063 5015 bfd_vma reloc_sign;
b34976b6
AM
5016 bfd_boolean overflow = FALSE;
5017 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5018 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS
5019 bfd_signed_vma reloc_signed_max;
5020 bfd_signed_vma reloc_signed_min;
b34976b6 5021 bfd_vma check;
252b5132 5022 bfd_signed_vma signed_check;
e95de063
MS
5023 int bitsize;
5024 int thumb2 = using_thumb2 (globals);
252b5132 5025
5ab79981
PB
5026 /* A branch to an undefined weak symbol is turned into a jump to
5027 the next instruction. */
5028 if (h && h->root.type == bfd_link_hash_undefweak)
5029 {
5030 bfd_put_16 (input_bfd, 0xe000, hit_data);
5031 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5032 return bfd_reloc_ok;
5033 }
5034
e95de063
MS
5035 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5036 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB
5037 if (globals->use_rel)
5038 {
e95de063
MS
5039 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5040 bfd_vma upper = upper_insn & 0x3ff;
5041 bfd_vma lower = lower_insn & 0x7ff;
5042 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5043 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5044 bfd_vma i1 = j1 ^ s ? 0 : 1;
5045 bfd_vma i2 = j2 ^ s ? 0 : 1;
5046
5047 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5048 /* Sign extend. */
5049 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5050
4e7fd91e
PB
5051 signed_addend = addend;
5052 }
cb1afa5c 5053
dfc5f959
NC
5054 if (r_type == R_ARM_THM_XPC22)
5055 {
5056 /* Check for Thumb to Thumb call. */
5057 /* FIXME: Should we translate the instruction into a BL
5058 instruction instead ? */
5059 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM
5060 (*_bfd_error_handler)
5061 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5062 input_bfd,
5063 h ? h->root.root.string : "(local)");
dfc5f959
NC
5064 }
5065 else
252b5132 5066 {
dfc5f959
NC
5067 /* If it is not a call to Thumb, assume call to Arm.
5068 If it is a call relative to a section name, then it is not a
b7693d02
DJ
5069 function call at all, but rather a long jump. Calls through
5070 the PLT do not require stubs. */
5071 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5072 && (h == NULL || splt == NULL
5073 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5074 {
bd97cb95 5075 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB
5076 {
5077 /* Convert BL to BLX. */
5078 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5079 }
5080 else if (elf32_thumb_to_arm_stub
dfc5f959 5081 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ
5082 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5083 error_message))
dfc5f959
NC
5084 return bfd_reloc_ok;
5085 else
5086 return bfd_reloc_dangerous;
5087 }
bd97cb95
DJ
5088 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
5089 && r_type == R_ARM_THM_CALL)
39b41c9c
PB
5090 {
5091 /* Make sure this is a BL. */
5092 lower_insn |= 0x1800;
5093 }
252b5132 5094 }
f21f3fe0 5095
b7693d02
DJ
5096 /* Handle calls via the PLT. */
5097 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5098 {
5099 value = (splt->output_section->vma
5100 + splt->output_offset
5101 + h->plt.offset);
bd97cb95 5102 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB
5103 {
5104 /* If the Thumb BLX instruction is available, convert the
5105 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5106 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB
5107 }
5108 else
5109 /* Target the Thumb stub before the ARM PLT entry. */
5110 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5111 *unresolved_reloc_p = FALSE;
b7693d02
DJ
5112 }
5113
ba96a88f 5114 relocation = value + signed_addend;
f21f3fe0 5115
252b5132 5116 relocation -= (input_section->output_section->vma
ba96a88f
NC
5117 + input_section->output_offset
5118 + rel->r_offset);
9a5aca8c 5119
252b5132
RH
5120 check = relocation >> howto->rightshift;
5121
5122 /* If this is a signed value, the rightshift just dropped
5123 leading 1 bits (assuming twos complement). */
5124 if ((bfd_signed_vma) relocation >= 0)
5125 signed_check = check;
5126 else
5127 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5128
e95de063
MS
5129 /* Calculate the permissable maximum and minimum values for
5130 this relocation according to whether we're relocating for
5131 Thumb-2 or not. */
5132 bitsize = howto->bitsize;
5133 if (!thumb2)
5134 bitsize -= 2;
5135 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5136 reloc_signed_min = ~reloc_signed_max;
5137
252b5132 5138 /* Assumes two's complement. */
ba96a88f 5139 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5140 overflow = TRUE;
252b5132 5141
bd97cb95 5142 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC
5143 /* For a BLX instruction, make sure that the relocation is rounded up
5144 to a word boundary. This follows the semantics of the instruction
5145 which specifies that bit 1 of the target address will come from bit
5146 1 of the base address. */
5147 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5148
e95de063
MS
5149 /* Put RELOCATION back into the insn. Assumes two's complement.
5150 We use the Thumb-2 encoding, which is safe even if dealing with
5151 a Thumb-1 instruction by virtue of our overflow check above. */
5152 reloc_sign = (signed_check < 0) ? 1 : 0;
5153 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5154 | ((relocation >> 12) & 0x3ff)
5155 | (reloc_sign << 10);
5156 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5157 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5158 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5159 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5160
252b5132
RH
5161 /* Put the relocated value back in the object file: */
5162 bfd_put_16 (input_bfd, upper_insn, hit_data);
5163 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5164
5165 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5166 }
5167 break;
5168
c19d1205
ZW
5169 case R_ARM_THM_JUMP19:
5170 /* Thumb32 conditional branch instruction. */
5171 {
5172 bfd_vma relocation;
5173 bfd_boolean overflow = FALSE;
5174 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5175 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS
5176 bfd_signed_vma reloc_signed_max = 0xffffe;
5177 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW
5178 bfd_signed_vma signed_check;
5179
5180 /* Need to refetch the addend, reconstruct the top three bits,
5181 and squish the two 11 bit pieces together. */
5182 if (globals->use_rel)
5183 {
5184 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5185 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW
5186 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5187 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5188 bfd_vma lower = (lower_insn & 0x07ff);
5189
a00a1f35
MS
5190 upper |= J1 << 6;
5191 upper |= J2 << 7;
5192 upper |= (!S) << 8;
c19d1205
ZW
5193 upper -= 0x0100; /* Sign extend. */
5194
5195 addend = (upper << 12) | (lower << 1);
5196 signed_addend = addend;
5197 }
5198
bd97cb95
DJ
5199 /* Handle calls via the PLT. */
5200 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5201 {
5202 value = (splt->output_section->vma
5203 + splt->output_offset
5204 + h->plt.offset);
5205 /* Target the Thumb stub before the ARM PLT entry. */
5206 value -= PLT_THUMB_STUB_SIZE;
5207 *unresolved_reloc_p = FALSE;
5208 }
5209
c19d1205
ZW
5210 /* ??? Should handle interworking? GCC might someday try to
5211 use this for tail calls. */
5212
5213 relocation = value + signed_addend;
5214 relocation -= (input_section->output_section->vma
5215 + input_section->output_offset
5216 + rel->r_offset);
a00a1f35 5217 signed_check = (bfd_signed_vma) relocation;
c19d1205 5218
c19d1205
ZW
5219 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5220 overflow = TRUE;
5221
5222 /* Put RELOCATION back into the insn. */
5223 {
5224 bfd_vma S = (relocation & 0x00100000) >> 20;
5225 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5226 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5227 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5228 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5229
a00a1f35 5230 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW
5231 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5232 }
5233
5234 /* Put the relocated value back in the object file: */
5235 bfd_put_16 (input_bfd, upper_insn, hit_data);
5236 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5237
5238 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5239 }
5240
5241 case R_ARM_THM_JUMP11:
5242 case R_ARM_THM_JUMP8:
5243 case R_ARM_THM_JUMP6:
51c5503b
NC
5244 /* Thumb B (branch) instruction). */
5245 {
6cf9e9fe 5246 bfd_signed_vma relocation;
51c5503b
NC
5247 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5248 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC
5249 bfd_signed_vma signed_check;
5250
c19d1205
ZW
5251 /* CZB cannot jump backward. */
5252 if (r_type == R_ARM_THM_JUMP6)
5253 reloc_signed_min = 0;
5254
4e7fd91e 5255 if (globals->use_rel)
6cf9e9fe 5256 {
4e7fd91e
PB
5257 /* Need to refetch addend. */
5258 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5259 if (addend & ((howto->src_mask + 1) >> 1))
5260 {
5261 signed_addend = -1;
5262 signed_addend &= ~ howto->src_mask;
5263 signed_addend |= addend;
5264 }
5265 else
5266 signed_addend = addend;
5267 /* The value in the insn has been right shifted. We need to
5268 undo this, so that we can perform the address calculation
5269 in terms of bytes. */
5270 signed_addend <<= howto->rightshift;
6cf9e9fe 5271 }
6cf9e9fe 5272 relocation = value + signed_addend;
51c5503b
NC
5273
5274 relocation -= (input_section->output_section->vma
5275 + input_section->output_offset
5276 + rel->r_offset);
5277
6cf9e9fe
NC
5278 relocation >>= howto->rightshift;
5279 signed_check = relocation;
c19d1205
ZW
5280
5281 if (r_type == R_ARM_THM_JUMP6)
5282 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5283 else
5284 relocation &= howto->dst_mask;
51c5503b 5285 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5286
51c5503b
NC
5287 bfd_put_16 (input_bfd, relocation, hit_data);
5288
5289 /* Assumes two's complement. */
5290 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5291 return bfd_reloc_overflow;
5292
5293 return bfd_reloc_ok;
5294 }
cedb70c5 5295
8375c36b
PB
5296 case R_ARM_ALU_PCREL7_0:
5297 case R_ARM_ALU_PCREL15_8:
5298 case R_ARM_ALU_PCREL23_15:
5299 {
5300 bfd_vma insn;
5301 bfd_vma relocation;
5302
5303 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB
5304 if (globals->use_rel)
5305 {
5306 /* Extract the addend. */
5307 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5308 signed_addend = addend;
5309 }
8375c36b
PB
5310 relocation = value + signed_addend;
5311
5312 relocation -= (input_section->output_section->vma
5313 + input_section->output_offset
5314 + rel->r_offset);
5315 insn = (insn & ~0xfff)
5316 | ((howto->bitpos << 7) & 0xf00)
5317 | ((relocation >> howto->bitpos) & 0xff);
5318 bfd_put_32 (input_bfd, value, hit_data);
5319 }
5320 return bfd_reloc_ok;
5321
252b5132
RH
5322 case R_ARM_GNU_VTINHERIT:
5323 case R_ARM_GNU_VTENTRY:
5324 return bfd_reloc_ok;
5325
c19d1205 5326 case R_ARM_GOTOFF32:
252b5132
RH
5327 /* Relocation is relative to the start of the
5328 global offset table. */
5329
5330 BFD_ASSERT (sgot != NULL);
5331 if (sgot == NULL)
5332 return bfd_reloc_notsupported;
9a5aca8c 5333
cedb70c5 5334 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE
5335 address by one, so that attempts to call the function pointer will
5336 correctly interpret it as Thumb code. */
5337 if (sym_flags == STT_ARM_TFUNC)
5338 value += 1;
5339
252b5132
RH
5340 /* Note that sgot->output_offset is not involved in this
5341 calculation. We always want the start of .got. If we
5342 define _GLOBAL_OFFSET_TABLE in a different way, as is
5343 permitted by the ABI, we might have to change this
9b485d32 5344 calculation. */
252b5132 5345 value -= sgot->output_section->vma;
f21f3fe0 5346 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5347 contents, rel->r_offset, value,
00a97672 5348 rel->r_addend);
252b5132
RH
5349
5350 case R_ARM_GOTPC:
a7c10850 5351 /* Use global offset table as symbol value. */
252b5132 5352 BFD_ASSERT (sgot != NULL);
f21f3fe0 5353
252b5132
RH
5354 if (sgot == NULL)
5355 return bfd_reloc_notsupported;
5356
0945cdfd 5357 *unresolved_reloc_p = FALSE;
252b5132 5358 value = sgot->output_section->vma;
f21f3fe0 5359 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5360 contents, rel->r_offset, value,
00a97672 5361 rel->r_addend);
f21f3fe0 5362
252b5132 5363 case R_ARM_GOT32:
eb043451 5364 case R_ARM_GOT_PREL:
252b5132 5365 /* Relocation is to the entry for this symbol in the
9b485d32 5366 global offset table. */
252b5132
RH
5367 if (sgot == NULL)
5368 return bfd_reloc_notsupported;
f21f3fe0 5369
252b5132
RH
5370 if (h != NULL)
5371 {
5372 bfd_vma off;
5e681ec4 5373 bfd_boolean dyn;
f21f3fe0 5374
252b5132
RH
5375 off = h->got.offset;
5376 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5377 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5378
5e681ec4 5379 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5380 || (info->shared
5e681ec4
PB
5381 && SYMBOL_REFERENCES_LOCAL (info, h))
5382 || (ELF_ST_VISIBILITY (h->other)
5383 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH
5384 {
5385 /* This is actually a static link, or it is a -Bsymbolic link
5386 and the symbol is defined locally. We must initialize this
5387 entry in the global offset table. Since the offset must
5388 always be a multiple of 4, we use the least significant bit
5389 to record whether we have initialized it already.
f21f3fe0 5390
00a97672 5391 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5392 entry to initialize the value. This is done in the
9b485d32 5393 finish_dynamic_symbol routine. */
252b5132
RH
5394 if ((off & 1) != 0)
5395 off &= ~1;
5396 else
5397 {
ee29b9fb
RE
5398 /* If we are addressing a Thumb function, we need to
5399 adjust the address by one, so that attempts to
5400 call the function pointer will correctly
5401 interpret it as Thumb code. */
5402 if (sym_flags == STT_ARM_TFUNC)
5403 value |= 1;
5404
252b5132
RH
5405 bfd_put_32 (output_bfd, value, sgot->contents + off);
5406 h->got.offset |= 1;
5407 }
5408 }
0945cdfd
DJ
5409 else
5410 *unresolved_reloc_p = FALSE;
f21f3fe0 5411
252b5132
RH
5412 value = sgot->output_offset + off;
5413 }
5414 else
5415 {
5416 bfd_vma off;
f21f3fe0 5417
252b5132
RH
5418 BFD_ASSERT (local_got_offsets != NULL &&
5419 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5420
252b5132 5421 off = local_got_offsets[r_symndx];
f21f3fe0 5422
252b5132
RH
5423 /* The offset must always be a multiple of 4. We use the
5424 least significant bit to record whether we have already
9b485d32 5425 generated the necessary reloc. */
252b5132
RH
5426 if ((off & 1) != 0)
5427 off &= ~1;
5428 else
5429 {
b7693d02
DJ
5430 /* If we are addressing a Thumb function, we need to
5431 adjust the address by one, so that attempts to
5432 call the function pointer will correctly
5433 interpret it as Thumb code. */
5434 if (sym_flags == STT_ARM_TFUNC)
5435 value |= 1;
5436
00a97672
RS
5437 if (globals->use_rel)
5438 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5439
252b5132
RH
5440 if (info->shared)
5441 {
5442 asection * srelgot;
947216bf
AM
5443 Elf_Internal_Rela outrel;
5444 bfd_byte *loc;
f21f3fe0 5445
00a97672
RS
5446 srelgot = (bfd_get_section_by_name
5447 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5448 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5449
00a97672 5450 outrel.r_addend = addend + value;
252b5132 5451 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5452 + sgot->output_offset
252b5132
RH
5453 + off);
5454 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5455 loc = srelgot->contents;
00a97672
RS
5456 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5457 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5458 }
f21f3fe0 5459
252b5132
RH
5460 local_got_offsets[r_symndx] |= 1;
5461 }
f21f3fe0 5462
252b5132
RH
5463 value = sgot->output_offset + off;
5464 }
eb043451
PB
5465 if (r_type != R_ARM_GOT32)
5466 value += sgot->output_section->vma;
9a5aca8c 5467
f21f3fe0 5468 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5469 contents, rel->r_offset, value,
00a97672 5470 rel->r_addend);
f21f3fe0 5471
ba93b8ac
DJ
5472 case R_ARM_TLS_LDO32:
5473 value = value - dtpoff_base (info);
5474
5475 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS
5476 contents, rel->r_offset, value,
5477 rel->r_addend);
ba93b8ac
DJ
5478
5479 case R_ARM_TLS_LDM32:
5480 {
5481 bfd_vma off;
5482
5483 if (globals->sgot == NULL)
5484 abort ();
5485
5486 off = globals->tls_ldm_got.offset;
5487
5488 if ((off & 1) != 0)
5489 off &= ~1;
5490 else
5491 {
5492 /* If we don't know the module number, create a relocation
5493 for it. */
5494 if (info->shared)
5495 {
5496 Elf_Internal_Rela outrel;
5497 bfd_byte *loc;
5498
5499 if (globals->srelgot == NULL)
5500 abort ();
5501
00a97672 5502 outrel.r_addend = 0;
ba93b8ac
DJ
5503 outrel.r_offset = (globals->sgot->output_section->vma
5504 + globals->sgot->output_offset + off);
5505 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5506
00a97672
RS
5507 if (globals->use_rel)
5508 bfd_put_32 (output_bfd, outrel.r_addend,
5509 globals->sgot->contents + off);
ba93b8ac
DJ
5510
5511 loc = globals->srelgot->contents;
00a97672
RS
5512 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5513 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ
5514 }
5515 else
5516 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5517
5518 globals->tls_ldm_got.offset |= 1;
5519 }
5520
5521 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5522 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5523
5524 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5525 contents, rel->r_offset, value,
00a97672 5526 rel->r_addend);
ba93b8ac
DJ
5527 }
5528
5529 case R_ARM_TLS_GD32:
5530 case R_ARM_TLS_IE32:
5531 {
5532 bfd_vma off;
5533 int indx;
5534 char tls_type;
5535
5536 if (globals->sgot == NULL)
5537 abort ();
5538
5539 indx = 0;
5540 if (h != NULL)
5541 {
5542 bfd_boolean dyn;
5543 dyn = globals->root.dynamic_sections_created;
5544 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5545 && (!info->shared
5546 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5547 {
5548 *unresolved_reloc_p = FALSE;
5549 indx = h->dynindx;
5550 }
5551 off = h->got.offset;
5552 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5553 }
5554 else
5555 {
5556 if (local_got_offsets == NULL)
5557 abort ();
5558 off = local_got_offsets[r_symndx];
5559 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5560 }
5561
5562 if (tls_type == GOT_UNKNOWN)
5563 abort ();
5564
5565 if ((off & 1) != 0)
5566 off &= ~1;
5567 else
5568 {
5569 bfd_boolean need_relocs = FALSE;
5570 Elf_Internal_Rela outrel;
5571 bfd_byte *loc = NULL;
5572 int cur_off = off;
5573
5574 /* The GOT entries have not been initialized yet. Do it
5575 now, and emit any relocations. If both an IE GOT and a
5576 GD GOT are necessary, we emit the GD first. */
5577
5578 if ((info->shared || indx != 0)
5579 && (h == NULL
5580 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5581 || h->root.type != bfd_link_hash_undefweak))
5582 {
5583 need_relocs = TRUE;
5584 if (globals->srelgot == NULL)
5585 abort ();
5586 loc = globals->srelgot->contents;
00a97672 5587 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ
5588 }
5589
5590 if (tls_type & GOT_TLS_GD)
5591 {
5592 if (need_relocs)
5593 {
00a97672 5594 outrel.r_addend = 0;
ba93b8ac 5595 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS
5596 + globals->sgot->output_offset
5597 + cur_off);
ba93b8ac 5598 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5599
00a97672
RS
5600 if (globals->use_rel)
5601 bfd_put_32 (output_bfd, outrel.r_addend,
5602 globals->sgot->contents + cur_off);
5603
5604 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5605 globals->srelgot->reloc_count++;
00a97672 5606 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5607
5608 if (indx == 0)
5609 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5610 globals->sgot->contents + cur_off + 4);
5611 else
5612 {
00a97672 5613 outrel.r_addend = 0;
ba93b8ac
DJ
5614 outrel.r_info = ELF32_R_INFO (indx,
5615 R_ARM_TLS_DTPOFF32);
5616 outrel.r_offset += 4;
00a97672
RS
5617
5618 if (globals->use_rel)
5619 bfd_put_32 (output_bfd, outrel.r_addend,
5620 globals->sgot->contents + cur_off + 4);
5621
5622
5623 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5624 globals->srelgot->reloc_count++;
00a97672 5625 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5626 }
5627 }
5628 else
5629 {
5630 /* If we are not emitting relocations for a
5631 general dynamic reference, then we must be in a
5632 static link or an executable link with the
5633 symbol binding locally. Mark it as belonging
5634 to module 1, the executable. */
5635 bfd_put_32 (output_bfd, 1,
5636 globals->sgot->contents + cur_off);
5637 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5638 globals->sgot->contents + cur_off + 4);
5639 }
5640
5641 cur_off += 8;
5642 }
5643
5644 if (tls_type & GOT_TLS_IE)
5645 {
5646 if (need_relocs)
5647 {
00a97672
RS
5648 if (indx == 0)
5649 outrel.r_addend = value - dtpoff_base (info);
5650 else
5651 outrel.r_addend = 0;
ba93b8ac
DJ
5652 outrel.r_offset = (globals->sgot->output_section->vma
5653 + globals->sgot->output_offset
5654 + cur_off);
5655 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5656
00a97672
RS
5657 if (globals->use_rel)
5658 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ
5659 globals->sgot->contents + cur_off);
5660
00a97672 5661 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5662 globals->srelgot->reloc_count++;
00a97672 5663 loc += RELOC_SIZE (globals);
ba93b8ac
DJ
5664 }
5665 else
5666 bfd_put_32 (output_bfd, tpoff (info, value),
5667 globals->sgot->contents + cur_off);
5668 cur_off += 4;
5669 }
5670
5671 if (h != NULL)
5672 h->got.offset |= 1;
5673 else
5674 local_got_offsets[r_symndx] |= 1;
5675 }
5676
5677 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5678 off += 8;
5679 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5680 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5681
5682 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5683 contents, rel->r_offset, value,
00a97672 5684 rel->r_addend);
ba93b8ac
DJ
5685 }
5686
5687 case R_ARM_TLS_LE32:
5688 if (info->shared)
5689 {
5690 (*_bfd_error_handler)
5691 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5692 input_bfd, input_section,
5693 (long) rel->r_offset, howto->name);
5694 return FALSE;
5695 }
5696 else
5697 value = tpoff (info, value);
5698
5699 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS
5700 contents, rel->r_offset, value,
5701 rel->r_addend);
ba93b8ac 5702
319850b4
JB
5703 case R_ARM_V4BX:
5704 if (globals->fix_v4bx)
5705 {
5706 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5707
5708 /* Ensure that we have a BX instruction. */
5709 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
5710
5711 /* Preserve Rm (lowest four bits) and the condition code
5712 (highest four bits). Other bits encode MOV PC,Rm. */
5713 insn = (insn & 0xf000000f) | 0x01a0f000;
5714
5715 bfd_put_32 (input_bfd, insn, hit_data);
5716 }
5717 return bfd_reloc_ok;
5718
b6895b4f
PB
5719 case R_ARM_MOVW_ABS_NC:
5720 case R_ARM_MOVT_ABS:
5721 case R_ARM_MOVW_PREL_NC:
5722 case R_ARM_MOVT_PREL:
92f5d02b
MS
5723 /* Until we properly support segment-base-relative addressing then
5724 we assume the segment base to be zero, as for the group relocations.
5725 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5726 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5727 case R_ARM_MOVW_BREL_NC:
5728 case R_ARM_MOVW_BREL:
5729 case R_ARM_MOVT_BREL:
b6895b4f
PB
5730 {
5731 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5732
5733 if (globals->use_rel)
5734 {
5735 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
5736 signed_addend = (addend ^ 0x10000) - 0x10000;
5737 }
92f5d02b 5738
b6895b4f 5739 value += signed_addend;
b6895b4f
PB
5740
5741 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5742 value -= (input_section->output_section->vma
5743 + input_section->output_offset + rel->r_offset);
5744
92f5d02b
MS
5745 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5746 return bfd_reloc_overflow;
5747
5748 if (sym_flags == STT_ARM_TFUNC)
5749 value |= 1;
5750
5751 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5752 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB
5753 value >>= 16;
5754
5755 insn &= 0xfff0f000;
5756 insn |= value & 0xfff;
5757 insn |= (value & 0xf000) << 4;
5758 bfd_put_32 (input_bfd, insn, hit_data);
5759 }
5760 return bfd_reloc_ok;
5761
5762 case R_ARM_THM_MOVW_ABS_NC:
5763 case R_ARM_THM_MOVT_ABS:
5764 case R_ARM_THM_MOVW_PREL_NC:
5765 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS
5766 /* Until we properly support segment-base-relative addressing then
5767 we assume the segment base to be zero, as for the above relocations.
5768 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5769 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5770 as R_ARM_THM_MOVT_ABS. */
5771 case R_ARM_THM_MOVW_BREL_NC:
5772 case R_ARM_THM_MOVW_BREL:
5773 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB
5774 {
5775 bfd_vma insn;
5776
5777 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5778 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5779
5780 if (globals->use_rel)
5781 {
5782 addend = ((insn >> 4) & 0xf000)
5783 | ((insn >> 15) & 0x0800)
5784 | ((insn >> 4) & 0x0700)
5785 | (insn & 0x00ff);
5786 signed_addend = (addend ^ 0x10000) - 0x10000;
5787 }
92f5d02b 5788
b6895b4f 5789 value += signed_addend;
b6895b4f
PB
5790
5791 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5792 value -= (input_section->output_section->vma
5793 + input_section->output_offset + rel->r_offset);
5794
92f5d02b
MS
5795 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5796 return bfd_reloc_overflow;
5797
5798 if (sym_flags == STT_ARM_TFUNC)
5799 value |= 1;
5800
5801 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5802 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB
5803 value >>= 16;
5804
5805 insn &= 0xfbf08f00;
5806 insn |= (value & 0xf000) << 4;
5807 insn |= (value & 0x0800) << 15;
5808 insn |= (value & 0x0700) << 4;
5809 insn |= (value & 0x00ff);
5810
5811 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5812 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5813 }
5814 return bfd_reloc_ok;
5815
4962c51a
MS
5816 case R_ARM_ALU_PC_G0_NC:
5817 case R_ARM_ALU_PC_G1_NC:
5818 case R_ARM_ALU_PC_G0:
5819 case R_ARM_ALU_PC_G1:
5820 case R_ARM_ALU_PC_G2:
5821 case R_ARM_ALU_SB_G0_NC:
5822 case R_ARM_ALU_SB_G1_NC:
5823 case R_ARM_ALU_SB_G0:
5824 case R_ARM_ALU_SB_G1:
5825 case R_ARM_ALU_SB_G2:
5826 {
5827 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5828 bfd_vma pc = input_section->output_section->vma
5829 + input_section->output_offset + rel->r_offset;
5830 /* sb should be the origin of the *segment* containing the symbol.
5831 It is not clear how to obtain this OS-dependent value, so we
5832 make an arbitrary choice of zero. */
5833 bfd_vma sb = 0;
5834 bfd_vma residual;
5835 bfd_vma g_n;
5836 bfd_signed_vma signed_value;
5837 int group = 0;
5838
5839 /* Determine which group of bits to select. */
5840 switch (r_type)
5841 {
5842 case R_ARM_ALU_PC_G0_NC:
5843 case R_ARM_ALU_PC_G0:
5844 case R_ARM_ALU_SB_G0_NC:
5845 case R_ARM_ALU_SB_G0:
5846 group = 0;
5847 break;
5848
5849 case R_ARM_ALU_PC_G1_NC:
5850 case R_ARM_ALU_PC_G1:
5851 case R_ARM_ALU_SB_G1_NC:
5852 case R_ARM_ALU_SB_G1:
5853 group = 1;
5854 break;
5855
5856 case R_ARM_ALU_PC_G2:
5857 case R_ARM_ALU_SB_G2:
5858 group = 2;
5859 break;
5860
5861 default:
5862 abort();
5863 }
5864
5865 /* If REL, extract the addend from the insn. If RELA, it will
5866 have already been fetched for us. */
5867 if (globals->use_rel)
5868 {
5869 int negative;
5870 bfd_vma constant = insn & 0xff;
5871 bfd_vma rotation = (insn & 0xf00) >> 8;
5872
5873 if (rotation == 0)
5874 signed_addend = constant;
5875 else
5876 {
5877 /* Compensate for the fact that in the instruction, the
5878 rotation is stored in multiples of 2 bits. */
5879 rotation *= 2;
5880
5881 /* Rotate "constant" right by "rotation" bits. */
5882 signed_addend = (constant >> rotation) |
5883 (constant << (8 * sizeof (bfd_vma) - rotation));
5884 }
5885
5886 /* Determine if the instruction is an ADD or a SUB.
5887 (For REL, this determines the sign of the addend.) */
5888 negative = identify_add_or_sub (insn);
5889 if (negative == 0)
5890 {
5891 (*_bfd_error_handler)
5892 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
5893 input_bfd, input_section,
5894 (long) rel->r_offset, howto->name);
5895 return bfd_reloc_overflow;
5896 }
5897
5898 signed_addend *= negative;
5899 }
5900
5901 /* Compute the value (X) to go in the place. */
5902 if (r_type == R_ARM_ALU_PC_G0_NC
5903 || r_type == R_ARM_ALU_PC_G1_NC
5904 || r_type == R_ARM_ALU_PC_G0
5905 || r_type == R_ARM_ALU_PC_G1
5906 || r_type == R_ARM_ALU_PC_G2)
5907 /* PC relative. */
5908 signed_value = value - pc + signed_addend;
5909 else
5910 /* Section base relative. */
5911 signed_value = value - sb + signed_addend;
5912
5913 /* If the target symbol is a Thumb function, then set the
5914 Thumb bit in the address. */
5915 if (sym_flags == STT_ARM_TFUNC)
5916 signed_value |= 1;
5917
5918 /* Calculate the value of the relevant G_n, in encoded
5919 constant-with-rotation format. */
5920 g_n = calculate_group_reloc_mask (abs (signed_value), group,
5921 &residual);
5922
5923 /* Check for overflow if required. */
5924 if ((r_type == R_ARM_ALU_PC_G0
5925 || r_type == R_ARM_ALU_PC_G1
5926 || r_type == R_ARM_ALU_PC_G2
5927 || r_type == R_ARM_ALU_SB_G0
5928 || r_type == R_ARM_ALU_SB_G1
5929 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
5930 {
5931 (*_bfd_error_handler)
5932 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
5933 input_bfd, input_section,
5934 (long) rel->r_offset, abs (signed_value), howto->name);
5935 return bfd_reloc_overflow;
5936 }
5937
5938 /* Mask out the value and the ADD/SUB part of the opcode; take care
5939 not to destroy the S bit. */
5940 insn &= 0xff1ff000;
5941
5942 /* Set the opcode according to whether the value to go in the
5943 place is negative. */
5944 if (signed_value < 0)
5945 insn |= 1 << 22;
5946 else
5947 insn |= 1 << 23;
5948
5949 /* Encode the offset. */
5950 insn |= g_n;
5951
5952 bfd_put_32 (input_bfd, insn, hit_data);
5953 }
5954 return bfd_reloc_ok;
5955
5956 case R_ARM_LDR_PC_G0:
5957 case R_ARM_LDR_PC_G1:
5958 case R_ARM_LDR_PC_G2:
5959 case R_ARM_LDR_SB_G0:
5960 case R_ARM_LDR_SB_G1:
5961 case R_ARM_LDR_SB_G2:
5962 {
5963 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5964 bfd_vma pc = input_section->output_section->vma
5965 + input_section->output_offset + rel->r_offset;
5966 bfd_vma sb = 0; /* See note above. */
5967 bfd_vma residual;
5968 bfd_signed_vma signed_value;
5969 int group = 0;
5970
5971 /* Determine which groups of bits to calculate. */
5972 switch (r_type)
5973 {
5974 case R_ARM_LDR_PC_G0:
5975 case R_ARM_LDR_SB_G0:
5976 group = 0;
5977 break;
5978
5979 case R_ARM_LDR_PC_G1:
5980 case R_ARM_LDR_SB_G1:
5981 group = 1;
5982 break;
5983
5984 case R_ARM_LDR_PC_G2:
5985 case R_ARM_LDR_SB_G2:
5986 group = 2;
5987 break;
5988
5989 default:
5990 abort();
5991 }
5992
5993 /* If REL, extract the addend from the insn. If RELA, it will
5994 have already been fetched for us. */
5995 if (globals->use_rel)
5996 {
5997 int negative = (insn & (1 << 23)) ? 1 : -1;
5998 signed_addend = negative * (insn & 0xfff);
5999 }
6000
6001 /* Compute the value (X) to go in the place. */
6002 if (r_type == R_ARM_LDR_PC_G0
6003 || r_type == R_ARM_LDR_PC_G1
6004 || r_type == R_ARM_LDR_PC_G2)
6005 /* PC relative. */
6006 signed_value = value - pc + signed_addend;
6007 else
6008 /* Section base relative. */
6009 signed_value = value - sb + signed_addend;
6010
6011 /* Calculate the value of the relevant G_{n-1} to obtain
6012 the residual at that stage. */
6013 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6014
6015 /* Check for overflow. */
6016 if (residual >= 0x1000)
6017 {
6018 (*_bfd_error_handler)
6019 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6020 input_bfd, input_section,
6021 (long) rel->r_offset, abs (signed_value), howto->name);
6022 return bfd_reloc_overflow;
6023 }
6024
6025 /* Mask out the value and U bit. */
6026 insn &= 0xff7ff000;
6027
6028 /* Set the U bit if the value to go in the place is non-negative. */
6029 if (signed_value >= 0)
6030 insn |= 1 << 23;
6031
6032 /* Encode the offset. */
6033 insn |= residual;
6034
6035 bfd_put_32 (input_bfd, insn, hit_data);
6036 }
6037 return bfd_reloc_ok;
6038
6039 case R_ARM_LDRS_PC_G0:
6040 case R_ARM_LDRS_PC_G1:
6041 case R_ARM_LDRS_PC_G2:
6042 case R_ARM_LDRS_SB_G0:
6043 case R_ARM_LDRS_SB_G1:
6044 case R_ARM_LDRS_SB_G2:
6045 {
6046 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6047 bfd_vma pc = input_section->output_section->vma
6048 + input_section->output_offset + rel->r_offset;
6049 bfd_vma sb = 0; /* See note above. */
6050 bfd_vma residual;
6051 bfd_signed_vma signed_value;
6052 int group = 0;
6053
6054 /* Determine which groups of bits to calculate. */
6055 switch (r_type)
6056 {
6057 case R_ARM_LDRS_PC_G0:
6058 case R_ARM_LDRS_SB_G0:
6059 group = 0;
6060 break;
6061
6062 case R_ARM_LDRS_PC_G1:
6063 case R_ARM_LDRS_SB_G1:
6064 group = 1;
6065 break;
6066
6067 case R_ARM_LDRS_PC_G2:
6068 case R_ARM_LDRS_SB_G2:
6069 group = 2;
6070 break;
6071
6072 default:
6073 abort();
6074 }
6075
6076 /* If REL, extract the addend from the insn. If RELA, it will
6077 have already been fetched for us. */
6078 if (globals->use_rel)
6079 {
6080 int negative = (insn & (1 << 23)) ? 1 : -1;
6081 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6082 }
6083
6084 /* Compute the value (X) to go in the place. */
6085 if (r_type == R_ARM_LDRS_PC_G0
6086 || r_type == R_ARM_LDRS_PC_G1
6087 || r_type == R_ARM_LDRS_PC_G2)
6088 /* PC relative. */
6089 signed_value = value - pc + signed_addend;
6090 else
6091 /* Section base relative. */
6092 signed_value = value - sb + signed_addend;
6093
6094 /* Calculate the value of the relevant G_{n-1} to obtain
6095 the residual at that stage. */
6096 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6097
6098 /* Check for overflow. */
6099 if (residual >= 0x100)
6100 {
6101 (*_bfd_error_handler)
6102 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6103 input_bfd, input_section,
6104 (long) rel->r_offset, abs (signed_value), howto->name);
6105 return bfd_reloc_overflow;
6106 }
6107
6108 /* Mask out the value and U bit. */
6109 insn &= 0xff7ff0f0;
6110
6111 /* Set the U bit if the value to go in the place is non-negative. */
6112 if (signed_value >= 0)
6113 insn |= 1 << 23;
6114
6115 /* Encode the offset. */
6116 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6117
6118 bfd_put_32 (input_bfd, insn, hit_data);
6119 }
6120 return bfd_reloc_ok;
6121
6122 case R_ARM_LDC_PC_G0:
6123 case R_ARM_LDC_PC_G1:
6124 case R_ARM_LDC_PC_G2:
6125 case R_ARM_LDC_SB_G0:
6126 case R_ARM_LDC_SB_G1:
6127 case R_ARM_LDC_SB_G2:
6128 {
6129 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6130 bfd_vma pc = input_section->output_section->vma
6131 + input_section->output_offset + rel->r_offset;
6132 bfd_vma sb = 0; /* See note above. */
6133 bfd_vma residual;
6134 bfd_signed_vma signed_value;
6135 int group = 0;
6136
6137 /* Determine which groups of bits to calculate. */
6138 switch (r_type)
6139 {
6140 case R_ARM_LDC_PC_G0:
6141 case R_ARM_LDC_SB_G0:
6142 group = 0;
6143 break;
6144
6145 case R_ARM_LDC_PC_G1:
6146 case R_ARM_LDC_SB_G1:
6147 group = 1;
6148 break;
6149
6150 case R_ARM_LDC_PC_G2:
6151 case R_ARM_LDC_SB_G2:
6152 group = 2;
6153 break;
6154
6155 default:
6156 abort();
6157 }
6158
6159 /* If REL, extract the addend from the insn. If RELA, it will
6160 have already been fetched for us. */
6161 if (globals->use_rel)
6162 {
6163 int negative = (insn & (1 << 23)) ? 1 : -1;
6164 signed_addend = negative * ((insn & 0xff) << 2);
6165 }
6166
6167 /* Compute the value (X) to go in the place. */
6168 if (r_type == R_ARM_LDC_PC_G0
6169 || r_type == R_ARM_LDC_PC_G1
6170 || r_type == R_ARM_LDC_PC_G2)
6171 /* PC relative. */
6172 signed_value = value - pc + signed_addend;
6173 else
6174 /* Section base relative. */
6175 signed_value = value - sb + signed_addend;
6176
6177 /* Calculate the value of the relevant G_{n-1} to obtain
6178 the residual at that stage. */
6179 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6180
6181 /* Check for overflow. (The absolute value to go in the place must be
6182 divisible by four and, after having been divided by four, must
6183 fit in eight bits.) */
6184 if ((residual & 0x3) != 0 || residual >= 0x400)
6185 {
6186 (*_bfd_error_handler)
6187 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6188 input_bfd, input_section,
6189 (long) rel->r_offset, abs (signed_value), howto->name);
6190 return bfd_reloc_overflow;
6191 }
6192
6193 /* Mask out the value and U bit. */
6194 insn &= 0xff7fff00;
6195
6196 /* Set the U bit if the value to go in the place is non-negative. */
6197 if (signed_value >= 0)
6198 insn |= 1 << 23;
6199
6200 /* Encode the offset. */
6201 insn |= residual >> 2;
6202
6203 bfd_put_32 (input_bfd, insn, hit_data);
6204 }
6205 return bfd_reloc_ok;
6206
252b5132
RH
6207 default:
6208 return bfd_reloc_notsupported;
6209 }
6210}
6211
98c1d4aa
NC
6212/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6213static void
57e8b36a
NC
6214arm_add_to_rel (bfd * abfd,
6215 bfd_byte * address,
6216 reloc_howto_type * howto,
6217 bfd_signed_vma increment)
98c1d4aa 6218{
98c1d4aa
NC
6219 bfd_signed_vma addend;
6220
bd97cb95
DJ
6221 if (howto->type == R_ARM_THM_CALL
6222 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 6223 {
9a5aca8c
AM
6224 int upper_insn, lower_insn;
6225 int upper, lower;
98c1d4aa 6226
9a5aca8c
AM
6227 upper_insn = bfd_get_16 (abfd, address);
6228 lower_insn = bfd_get_16 (abfd, address + 2);
6229 upper = upper_insn & 0x7ff;
6230 lower = lower_insn & 0x7ff;
6231
6232 addend = (upper << 12) | (lower << 1);
ddda4409 6233 addend += increment;
9a5aca8c 6234 addend >>= 1;
98c1d4aa 6235
9a5aca8c
AM
6236 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6237 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6238
dc810e39
AM
6239 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6240 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM
6241 }
6242 else
6243 {
6244 bfd_vma contents;
6245
6246 contents = bfd_get_32 (abfd, address);
6247
6248 /* Get the (signed) value from the instruction. */
6249 addend = contents & howto->src_mask;
6250 if (addend & ((howto->src_mask + 1) >> 1))
6251 {
6252 bfd_signed_vma mask;
6253
6254 mask = -1;
6255 mask &= ~ howto->src_mask;
6256 addend |= mask;
6257 }
6258
6259 /* Add in the increment, (which is a byte value). */
6260 switch (howto->type)
6261 {
6262 default:
6263 addend += increment;
6264 break;
6265
6266 case R_ARM_PC24:
c6596c5e 6267 case R_ARM_PLT32:
5b5bb741
PB
6268 case R_ARM_CALL:
6269 case R_ARM_JUMP24:
9a5aca8c 6270 addend <<= howto->size;
dc810e39 6271 addend += increment;
9a5aca8c
AM
6272
6273 /* Should we check for overflow here ? */
6274
6275 /* Drop any undesired bits. */
6276 addend >>= howto->rightshift;
6277 break;
6278 }
6279
6280 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6281
6282 bfd_put_32 (abfd, contents, address);
ddda4409 6283 }
98c1d4aa 6284}
252b5132 6285
ba93b8ac
DJ
6286#define IS_ARM_TLS_RELOC(R_TYPE) \
6287 ((R_TYPE) == R_ARM_TLS_GD32 \
6288 || (R_TYPE) == R_ARM_TLS_LDO32 \
6289 || (R_TYPE) == R_ARM_TLS_LDM32 \
6290 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6291 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6292 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6293 || (R_TYPE) == R_ARM_TLS_LE32 \
6294 || (R_TYPE) == R_ARM_TLS_IE32)
6295
252b5132 6296/* Relocate an ARM ELF section. */
b34976b6 6297static bfd_boolean
57e8b36a
NC
6298elf32_arm_relocate_section (bfd * output_bfd,
6299 struct bfd_link_info * info,
6300 bfd * input_bfd,
6301 asection * input_section,
6302 bfd_byte * contents,
6303 Elf_Internal_Rela * relocs,
6304 Elf_Internal_Sym * local_syms,
6305 asection ** local_sections)
252b5132 6306{
b34976b6
AM
6307 Elf_Internal_Shdr *symtab_hdr;
6308 struct elf_link_hash_entry **sym_hashes;
6309 Elf_Internal_Rela *rel;
6310 Elf_Internal_Rela *relend;
6311 const char *name;
b32d3aa2 6312 struct elf32_arm_link_hash_table * globals;
252b5132 6313
4e7fd91e 6314 globals = elf32_arm_hash_table (info);
b491616a 6315
252b5132
RH
6316 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
6317 sym_hashes = elf_sym_hashes (input_bfd);
6318
6319 rel = relocs;
6320 relend = relocs + input_section->reloc_count;
6321 for (; rel < relend; rel++)
6322 {
ba96a88f
NC
6323 int r_type;
6324 reloc_howto_type * howto;
6325 unsigned long r_symndx;
6326 Elf_Internal_Sym * sym;
6327 asection * sec;
252b5132 6328 struct elf_link_hash_entry * h;
ba96a88f
NC
6329 bfd_vma relocation;
6330 bfd_reloc_status_type r;
6331 arelent bfd_reloc;
ba93b8ac 6332 char sym_type;
0945cdfd 6333 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6334 char *error_message = NULL;
f21f3fe0 6335
252b5132 6336 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6337 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6338 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6339
ba96a88f
NC
6340 if ( r_type == R_ARM_GNU_VTENTRY
6341 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH
6342 continue;
6343
b32d3aa2 6344 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6345 howto = bfd_reloc.howto;
252b5132 6346
252b5132
RH
6347 h = NULL;
6348 sym = NULL;
6349 sec = NULL;
9b485d32 6350
252b5132
RH
6351 if (r_symndx < symtab_hdr->sh_info)
6352 {
6353 sym = local_syms + r_symndx;
ba93b8ac 6354 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6355 sec = local_sections[r_symndx];
4e7fd91e 6356 if (globals->use_rel)
f8df10f4 6357 {
4e7fd91e
PB
6358 relocation = (sec->output_section->vma
6359 + sec->output_offset
6360 + sym->st_value);
ab96bf03
AM
6361 if (!info->relocatable
6362 && (sec->flags & SEC_MERGE)
6363 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6364 {
4e7fd91e
PB
6365 asection *msec;
6366 bfd_vma addend, value;
6367
6368 if (howto->rightshift)
6369 {
6370 (*_bfd_error_handler)
6371 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6372 input_bfd, input_section,
6373 (long) rel->r_offset, howto->name);
6374 return FALSE;
6375 }
f8df10f4 6376
4e7fd91e 6377 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
f8df10f4 6378
4e7fd91e
PB
6379 /* Get the (signed) value from the instruction. */
6380 addend = value & howto->src_mask;
6381 if (addend & ((howto->src_mask + 1) >> 1))
6382 {
6383 bfd_signed_vma mask;
f8df10f4 6384
4e7fd91e
PB
6385 mask = -1;
6386 mask &= ~ howto->src_mask;
6387 addend |= mask;
6388 }
6389 msec = sec;
6390 addend =
6391 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6392 - relocation;
6393 addend += msec->output_section->vma + msec->output_offset;
6394 value = (value & ~ howto->dst_mask) | (addend & howto->dst_mask);
6395 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
f8df10f4 6396 }
f8df10f4 6397 }
4e7fd91e
PB
6398 else
6399 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
6400 }
6401 else
6402 {
560e09e9 6403 bfd_boolean warned;
560e09e9 6404
b2a8e766
AM
6405 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6406 r_symndx, symtab_hdr, sym_hashes,
6407 h, sec, relocation,
6408 unresolved_reloc, warned);
ba93b8ac
DJ
6409
6410 sym_type = h->type;
252b5132
RH
6411 }
6412
ab96bf03
AM
6413 if (sec != NULL && elf_discarded_section (sec))
6414 {
6415 /* For relocs against symbols from removed linkonce sections,
6416 or sections discarded by a linker script, we just want the
6417 section contents zeroed. Avoid any special processing. */
6418 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6419 rel->r_info = 0;
6420 rel->r_addend = 0;
6421 continue;
6422 }
6423
6424 if (info->relocatable)
6425 {
6426 /* This is a relocatable link. We don't have to change
6427 anything, unless the reloc is against a section symbol,
6428 in which case we have to adjust according to where the
6429 section symbol winds up in the output section. */
6430 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6431 {
6432 if (globals->use_rel)
6433 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6434 howto, (bfd_signed_vma) sec->output_offset);
6435 else
6436 rel->r_addend += sec->output_offset;
6437 }
6438 continue;
6439 }
6440
252b5132
RH
6441 if (h != NULL)
6442 name = h->root.root.string;
6443 else
6444 {
6445 name = (bfd_elf_string_from_elf_section
6446 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6447 if (name == NULL || *name == '\0')
6448 name = bfd_section_name (input_bfd, sec);
6449 }
f21f3fe0 6450
ba93b8ac
DJ
6451 if (r_symndx != 0
6452 && r_type != R_ARM_NONE
6453 && (h == NULL
6454 || h->root.type == bfd_link_hash_defined
6455 || h->root.type == bfd_link_hash_defweak)
6456 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6457 {
6458 (*_bfd_error_handler)
6459 ((sym_type == STT_TLS
6460 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6461 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6462 input_bfd,
6463 input_section,
6464 (long) rel->r_offset,
6465 howto->name,
6466 name);
6467 }
6468
252b5132
RH
6469 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6470 input_section, contents, rel,
6471 relocation, info, sec, name,
6472 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6473 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6474 &unresolved_reloc, &error_message);
0945cdfd
DJ
6475
6476 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6477 because such sections are not SEC_ALLOC and thus ld.so will
6478 not process them. */
6479 if (unresolved_reloc
6480 && !((input_section->flags & SEC_DEBUGGING) != 0
6481 && h->def_dynamic))
6482 {
6483 (*_bfd_error_handler)
843fe662
L
6484 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6485 input_bfd,
6486 input_section,
6487 (long) rel->r_offset,
6488 howto->name,
6489 h->root.root.string);
0945cdfd
DJ
6490 return FALSE;
6491 }
252b5132
RH
6492
6493 if (r != bfd_reloc_ok)
6494 {
252b5132
RH
6495 switch (r)
6496 {
6497 case bfd_reloc_overflow:
cf919dfd
PB
6498 /* If the overflowing reloc was to an undefined symbol,
6499 we have already printed one error message and there
6500 is no point complaining again. */
6501 if ((! h ||
6502 h->root.type != bfd_link_hash_undefined)
6503 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L
6504 (info, (h ? &h->root : NULL), name, howto->name,
6505 (bfd_vma) 0, input_bfd, input_section,
6506 rel->r_offset))))
b34976b6 6507 return FALSE;
252b5132
RH
6508 break;
6509
6510 case bfd_reloc_undefined:
6511 if (!((*info->callbacks->undefined_symbol)
6512 (info, name, input_bfd, input_section,
b34976b6
AM
6513 rel->r_offset, TRUE)))
6514 return FALSE;
252b5132
RH
6515 break;
6516
6517 case bfd_reloc_outofrange:
f2a9dd69 6518 error_message = _("out of range");
252b5132
RH
6519 goto common_error;
6520
6521 case bfd_reloc_notsupported:
f2a9dd69 6522 error_message = _("unsupported relocation");
252b5132
RH
6523 goto common_error;
6524
6525 case bfd_reloc_dangerous:
f2a9dd69 6526 /* error_message should already be set. */
252b5132
RH
6527 goto common_error;
6528
6529 default:
f2a9dd69 6530 error_message = _("unknown error");
252b5132
RH
6531 /* fall through */
6532
6533 common_error:
f2a9dd69
DJ
6534 BFD_ASSERT (error_message != NULL);
6535 if (!((*info->callbacks->reloc_dangerous)
6536 (info, error_message, input_bfd, input_section,
252b5132 6537 rel->r_offset)))
b34976b6 6538 return FALSE;
252b5132
RH
6539 break;
6540 }
6541 }
6542 }
6543
b34976b6 6544 return TRUE;
252b5132
RH
6545}
6546
c178919b
NC
6547/* Set the right machine number. */
6548
6549static bfd_boolean
57e8b36a 6550elf32_arm_object_p (bfd *abfd)
c178919b 6551{
5a6c6817 6552 unsigned int mach;
57e8b36a 6553
5a6c6817 6554 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6555
5a6c6817
NC
6556 if (mach != bfd_mach_arm_unknown)
6557 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6558
6559 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6560 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6561
e16bb312 6562 else
5a6c6817 6563 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC
6564
6565 return TRUE;
6566}
6567
fc830a83 6568/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6569
b34976b6 6570static bfd_boolean
57e8b36a 6571elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH
6572{
6573 if (elf_flags_init (abfd)
6574 && elf_elfheader (abfd)->e_flags != flags)
6575 {
fc830a83
NC
6576 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6577 {
fd2ec330 6578 if (flags & EF_ARM_INTERWORK)
d003868e
AM
6579 (*_bfd_error_handler)
6580 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6581 abfd);
fc830a83 6582 else
d003868e
AM
6583 _bfd_error_handler
6584 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6585 abfd);
fc830a83 6586 }
252b5132
RH
6587 }
6588 else
6589 {
6590 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6591 elf_flags_init (abfd) = TRUE;
252b5132
RH
6592 }
6593
b34976b6 6594 return TRUE;
252b5132
RH
6595}
6596
fc830a83 6597/* Copy backend specific data from one object module to another. */
9b485d32 6598
b34976b6 6599static bfd_boolean
57e8b36a 6600elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH
6601{
6602 flagword in_flags;
6603 flagword out_flags;
6604
fc830a83 6605 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
252b5132 6606 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 6607 return TRUE;
252b5132 6608
fc830a83 6609 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH
6610 out_flags = elf_elfheader (obfd)->e_flags;
6611
fc830a83
NC
6612 if (elf_flags_init (obfd)
6613 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6614 && in_flags != out_flags)
252b5132 6615 {
252b5132 6616 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6617 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6618 return FALSE;
252b5132
RH
6619
6620 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6621 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6622 return FALSE;
252b5132
RH
6623
6624 /* If the src and dest have different interworking flags
6625 then turn off the interworking bit. */
fd2ec330 6626 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6627 {
fd2ec330 6628 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM
6629 _bfd_error_handler
6630 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6631 obfd, ibfd);
252b5132 6632
fd2ec330 6633 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6634 }
1006ba19
PB
6635
6636 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB
6637 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6638 in_flags &= ~EF_ARM_PIC;
252b5132
RH
6639 }
6640
6641 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6642 elf_flags_init (obfd) = TRUE;
252b5132 6643
94a3258f
PB
6644 /* Also copy the EI_OSABI field. */
6645 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6646 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6647
104d59d1
JM
6648 /* Copy object attributes. */
6649 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB
6650
6651 return TRUE;
6652}
6653
6654/* Values for Tag_ABI_PCS_R9_use. */
6655enum
6656{
6657 AEABI_R9_V6,
6658 AEABI_R9_SB,
6659 AEABI_R9_TLS,
6660 AEABI_R9_unused
6661};
6662
6663/* Values for Tag_ABI_PCS_RW_data. */
6664enum
6665{
6666 AEABI_PCS_RW_data_absolute,
6667 AEABI_PCS_RW_data_PCrel,
6668 AEABI_PCS_RW_data_SBrel,
6669 AEABI_PCS_RW_data_unused
6670};
6671
6672/* Values for Tag_ABI_enum_size. */
6673enum
6674{
6675 AEABI_enum_unused,
6676 AEABI_enum_short,
6677 AEABI_enum_wide,
6678 AEABI_enum_forced_wide
6679};
6680
104d59d1
JM
6681/* Determine whether an object attribute tag takes an integer, a
6682 string or both. */
6683static int
6684elf32_arm_obj_attrs_arg_type (int tag)
6685{
6686 if (tag == Tag_compatibility)
6687 return 3;
6688 else if (tag == 4 || tag == 5)
6689 return 2;
6690 else if (tag < 32)
6691 return 1;
6692 else
6693 return (tag & 1) != 0 ? 2 : 1;
6694}
6695
ee065d83
PB
6696/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6697 are conflicting attributes. */
6698static bfd_boolean
6699elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6700{
104d59d1
JM
6701 obj_attribute *in_attr;
6702 obj_attribute *out_attr;
6703 obj_attribute_list *in_list;
ee065d83
PB
6704 /* Some tags have 0 = don't care, 1 = strong requirement,
6705 2 = weak requirement. */
6706 static const int order_312[3] = {3, 1, 2};
6707 int i;
6708
104d59d1 6709 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB
6710 {
6711 /* This is the first object. Copy the attributes. */
104d59d1 6712 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB
6713
6714 /* Use the Tag_null value to indicate the attributes have been
6715 initialized. */
104d59d1 6716 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6717
ee065d83
PB
6718 return TRUE;
6719 }
6720
104d59d1
JM
6721 in_attr = elf_known_obj_attributes_proc (ibfd);
6722 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB
6723 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6724 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6725 {
6726 /* Ignore mismatches if teh object doesn't use floating point. */
6727 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6728 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6729 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6730 {
6731 _bfd_error_handler
6732 (_("ERROR: %B uses VFP register arguments, %B does not"),
6733 ibfd, obfd);
6734 return FALSE;
6735 }
6736 }
6737
104d59d1 6738 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB
6739 {
6740 /* Merge this attribute with existing attributes. */
6741 switch (i)
6742 {
6743 case Tag_CPU_raw_name:
6744 case Tag_CPU_name:
004ae526
PB
6745 /* Use whichever has the greatest architecture requirements. We
6746 won't necessarily have both the above tags, so make sure input
6747 name is non-NULL. */
6748 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6749 && in_attr[i].s)
104d59d1 6750 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB
6751 break;
6752
6753 case Tag_ABI_optimization_goals:
6754 case Tag_ABI_FP_optimization_goals:
6755 /* Use the first value seen. */
6756 break;
6757
6758 case Tag_CPU_arch:
6759 case Tag_ARM_ISA_use:
6760 case Tag_THUMB_ISA_use:
6761 case Tag_VFP_arch:
6762 case Tag_WMMX_arch:
6763 case Tag_NEON_arch:
6764 /* ??? Do NEON and WMMX conflict? */
6765 case Tag_ABI_FP_rounding:
6766 case Tag_ABI_FP_denormal:
6767 case Tag_ABI_FP_exceptions:
6768 case Tag_ABI_FP_user_exceptions:
6769 case Tag_ABI_FP_number_model:
6770 case Tag_ABI_align8_preserved:
6771 case Tag_ABI_HardFP_use:
6772 /* Use the largest value specified. */
6773 if (in_attr[i].i > out_attr[i].i)
6774 out_attr[i].i = in_attr[i].i;
6775 break;
6776
6777 case Tag_CPU_arch_profile:
6778 /* Warn if conflicting architecture profiles used. */
6779 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6780 {
6781 _bfd_error_handler
6782 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6783 ibfd, in_attr[i].i, out_attr[i].i);
6784 return FALSE;
6785 }
6786 if (in_attr[i].i)
6787 out_attr[i].i = in_attr[i].i;
6788 break;
6789 case Tag_PCS_config:
6790 if (out_attr[i].i == 0)
6791 out_attr[i].i = in_attr[i].i;
6792 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
6793 {
6794 /* It's sometimes ok to mix different configs, so this is only
6795 a warning. */
6796 _bfd_error_handler
6797 (_("Warning: %B: Conflicting platform configuration"), ibfd);
6798 }
6799 break;
6800 case Tag_ABI_PCS_R9_use:
004ae526
PB
6801 if (in_attr[i].i != out_attr[i].i
6802 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB
6803 && in_attr[i].i != AEABI_R9_unused)
6804 {
6805 _bfd_error_handler
6806 (_("ERROR: %B: Conflicting use of R9"), ibfd);
6807 return FALSE;
6808 }
6809 if (out_attr[i].i == AEABI_R9_unused)
6810 out_attr[i].i = in_attr[i].i;
6811 break;
6812 case Tag_ABI_PCS_RW_data:
6813 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
6814 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
6815 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
6816 {
6817 _bfd_error_handler
6818 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
6819 ibfd);
6820 return FALSE;
6821 }
6822 /* Use the smallest value specified. */
6823 if (in_attr[i].i < out_attr[i].i)
6824 out_attr[i].i = in_attr[i].i;
6825 break;
6826 case Tag_ABI_PCS_RO_data:
6827 /* Use the smallest value specified. */
6828 if (in_attr[i].i < out_attr[i].i)
6829 out_attr[i].i = in_attr[i].i;
6830 break;
6831 case Tag_ABI_PCS_GOT_use:
6832 if (in_attr[i].i > 2 || out_attr[i].i > 2
6833 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6834 out_attr[i].i = in_attr[i].i;
6835 break;
6836 case Tag_ABI_PCS_wchar_t:
6837 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
6838 {
6839 _bfd_error_handler
6840 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
6841 return FALSE;
6842 }
6843 if (in_attr[i].i)
6844 out_attr[i].i = in_attr[i].i;
6845 break;
6846 case Tag_ABI_align8_needed:
6847 /* ??? Check against Tag_ABI_align8_preserved. */
6848 if (in_attr[i].i > 2 || out_attr[i].i > 2
6849 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
6850 out_attr[i].i = in_attr[i].i;
6851 break;
6852 case Tag_ABI_enum_size:
6853 if (in_attr[i].i != AEABI_enum_unused)
6854 {
6855 if (out_attr[i].i == AEABI_enum_unused
6856 || out_attr[i].i == AEABI_enum_forced_wide)
6857 {
6858 /* The existing object is compatible with anything.
6859 Use whatever requirements the new object has. */
6860 out_attr[i].i = in_attr[i].i;
6861 }
6862 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78
MS
6863 && out_attr[i].i != in_attr[i].i
6864 && !elf32_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 6865 {
bf21ed78
MS
6866 const char *aeabi_enum_names[] =
6867 { "", "variable-size", "32-bit", "" };
ee065d83 6868 _bfd_error_handler
bf21ed78
MS
6869 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
6870 ibfd, aeabi_enum_names[in_attr[i].i],
6871 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB
6872 }
6873 }
6874 break;
6875 case Tag_ABI_VFP_args:
6876 /* Aready done. */
6877 break;
6878 case Tag_ABI_WMMX_args:
6879 if (in_attr[i].i != out_attr[i].i)
6880 {
6881 _bfd_error_handler
6882 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
6883 ibfd, obfd);
6884 return FALSE;
6885 }
6886 break;
6887 default: /* All known attributes should be explicitly covered. */
6888 abort ();
6889 }
3cfad14c
JM
6890
6891 if (in_attr[i].type && !out_attr[i].type)
6892 switch (in_attr[i].type)
6893 {
6894 case 1:
6895 if (out_attr[i].i)
6896 out_attr[i].type = 1;
6897 break;
6898
6899 case 2:
6900 if (out_attr[i].s)
6901 out_attr[i].type = 2;
6902 break;
6903
6904 default:
6905 abort ();
6906 }
ee065d83
PB
6907 }
6908
104d59d1
JM
6909 /* Merge Tag_compatibility attributes and any common GNU ones. */
6910 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 6911
104d59d1
JM
6912 /* Check for any attributes not known on ARM. */
6913 in_list = elf_other_obj_attributes_proc (ibfd);
6914 while (in_list && in_list->tag == Tag_compatibility)
6915 in_list = in_list->next;
ee065d83
PB
6916
6917 for (; in_list; in_list = in_list->next)
6918 {
6919 if ((in_list->tag & 128) < 64)
eb111b1f
BE
6920 {
6921 _bfd_error_handler
6922 (_("Warning: %B: Unknown EABI object attribute %d"),
6923 ibfd, in_list->tag);
6924 break;
6925 }
ee065d83 6926 }
b34976b6 6927 return TRUE;
252b5132
RH
6928}
6929
3a4a14e9
PB
6930
6931/* Return TRUE if the two EABI versions are incompatible. */
6932
6933static bfd_boolean
6934elf32_arm_versions_compatible (unsigned iver, unsigned over)
6935{
6936 /* v4 and v5 are the same spec before and after it was released,
6937 so allow mixing them. */
6938 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
6939 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
6940 return TRUE;
6941
6942 return (iver == over);
6943}
6944
252b5132
RH
6945/* Merge backend specific data from an object file to the output
6946 object file when linking. */
9b485d32 6947
b34976b6 6948static bfd_boolean
57e8b36a 6949elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH
6950{
6951 flagword out_flags;
6952 flagword in_flags;
b34976b6 6953 bfd_boolean flags_compatible = TRUE;
cf919dfd 6954 asection *sec;
252b5132 6955
9b485d32 6956 /* Check if we have the same endianess. */
82e51918 6957 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 6958 return FALSE;
1fe494a5 6959
252b5132
RH
6960 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
6961 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 6962 return TRUE;
252b5132 6963
ee065d83
PB
6964 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
6965 return FALSE;
6966
252b5132
RH
6967 /* The input BFD must have had its flags initialised. */
6968 /* The following seems bogus to me -- The flags are initialized in
6969 the assembler but I don't think an elf_flags_init field is
9b485d32 6970 written into the object. */
252b5132
RH
6971 /* BFD_ASSERT (elf_flags_init (ibfd)); */
6972
6973 in_flags = elf_elfheader (ibfd)->e_flags;
6974 out_flags = elf_elfheader (obfd)->e_flags;
6975
6976 if (!elf_flags_init (obfd))
6977 {
fe077fa6
NC
6978 /* If the input is the default architecture and had the default
6979 flags then do not bother setting the flags for the output
6980 architecture, instead allow future merges to do this. If no
6981 future merges ever set these flags then they will retain their
6982 uninitialised values, which surprise surprise, correspond
252b5132 6983 to the default values. */
fe077fa6
NC
6984 if (bfd_get_arch_info (ibfd)->the_default
6985 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 6986 return TRUE;
252b5132 6987
b34976b6 6988 elf_flags_init (obfd) = TRUE;
252b5132
RH
6989 elf_elfheader (obfd)->e_flags = in_flags;
6990
6991 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
6992 && bfd_get_arch_info (obfd)->the_default)
6993 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
6994
b34976b6 6995 return TRUE;
252b5132
RH
6996 }
6997
5a6c6817
NC
6998 /* Determine what should happen if the input ARM architecture
6999 does not match the output ARM architecture. */
7000 if (! bfd_arm_merge_machines (ibfd, obfd))
7001 return FALSE;
e16bb312 7002
1006ba19 7003 /* Identical flags must be compatible. */
252b5132 7004 if (in_flags == out_flags)
b34976b6 7005 return TRUE;
252b5132 7006
35a0f415
DJ
7007 /* Check to see if the input BFD actually contains any sections. If
7008 not, its flags may not have been initialised either, but it
8e3de13a 7009 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7010 dynamic objects; their section list may be emptied by
d1f161ea 7011 elf_link_add_object_symbols.
35a0f415 7012
d1f161ea
NC
7013 Also check to see if there are no code sections in the input.
7014 In this case there is no need to check for code specific flags.
7015 XXX - do we need to worry about floating-point format compatability
7016 in data sections ? */
35a0f415 7017 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7018 {
35a0f415 7019 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7020 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ
7021
7022 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7023 {
35a0f415
DJ
7024 /* Ignore synthetic glue sections. */
7025 if (strcmp (sec->name, ".glue_7")
7026 && strcmp (sec->name, ".glue_7t"))
7027 {
d1f161ea
NC
7028 if ((bfd_get_section_flags (ibfd, sec)
7029 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7030 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7031 only_data_sections = FALSE;
7032
35a0f415
DJ
7033 null_input_bfd = FALSE;
7034 break;
7035 }
cf919dfd 7036 }
d1f161ea
NC
7037
7038 if (null_input_bfd || only_data_sections)
35a0f415 7039 return TRUE;
cf919dfd 7040 }
cf919dfd 7041
252b5132 7042 /* Complain about various flag mismatches. */
3a4a14e9
PB
7043 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7044 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7045 {
d003868e 7046 _bfd_error_handler
3656d5e3 7047 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM
7048 ibfd, obfd,
7049 (in_flags & EF_ARM_EABIMASK) >> 24,
7050 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7051 return FALSE;
fc830a83 7052 }
252b5132 7053
1006ba19 7054 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS
7055 /* VxWorks libraries do not use these flags. */
7056 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7057 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7058 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7059 {
fd2ec330 7060 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7061 {
d003868e
AM
7062 _bfd_error_handler
7063 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7064 ibfd, obfd,
7065 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7066 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7067 flags_compatible = FALSE;
1006ba19 7068 }
252b5132 7069
fd2ec330 7070 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7071 {
5eefb65f 7072 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM
7073 _bfd_error_handler
7074 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7075 ibfd, obfd);
5eefb65f 7076 else
d003868e
AM
7077 _bfd_error_handler
7078 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7079 ibfd, obfd);
63b0f745 7080
b34976b6 7081 flags_compatible = FALSE;
1006ba19 7082 }
252b5132 7083
96a846ea 7084 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7085 {
96a846ea 7086 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM
7087 _bfd_error_handler
7088 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7089 ibfd, obfd);
5eefb65f 7090 else
d003868e
AM
7091 _bfd_error_handler
7092 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7093 ibfd, obfd);
fde78edd
NC
7094
7095 flags_compatible = FALSE;
7096 }
7097
7098 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7099 {
7100 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM
7101 _bfd_error_handler
7102 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7103 ibfd, obfd);
fde78edd 7104 else
d003868e
AM
7105 _bfd_error_handler
7106 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7107 ibfd, obfd);
63b0f745 7108
b34976b6 7109 flags_compatible = FALSE;
1006ba19 7110 }
96a846ea
RE
7111
7112#ifdef EF_ARM_SOFT_FLOAT
7113 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7114 {
7115 /* We can allow interworking between code that is VFP format
7116 layout, and uses either soft float or integer regs for
7117 passing floating point arguments and results. We already
7118 know that the APCS_FLOAT flags match; similarly for VFP
7119 flags. */
7120 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7121 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7122 {
7123 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM
7124 _bfd_error_handler
7125 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7126 ibfd, obfd);
96a846ea 7127 else
d003868e
AM
7128 _bfd_error_handler
7129 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7130 ibfd, obfd);
96a846ea 7131
b34976b6 7132 flags_compatible = FALSE;
96a846ea
RE
7133 }
7134 }
ee43f35e 7135#endif
252b5132 7136
1006ba19 7137 /* Interworking mismatch is only a warning. */
fd2ec330 7138 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7139 {
e3c8793a
NC
7140 if (in_flags & EF_ARM_INTERWORK)
7141 {
d003868e
AM
7142 _bfd_error_handler
7143 (_("Warning: %B supports interworking, whereas %B does not"),
7144 ibfd, obfd);
e3c8793a
NC
7145 }
7146 else
7147 {
d003868e
AM
7148 _bfd_error_handler
7149 (_("Warning: %B does not support interworking, whereas %B does"),
7150 ibfd, obfd);
e3c8793a 7151 }
8f615d07 7152 }
252b5132 7153 }
63b0f745 7154
1006ba19 7155 return flags_compatible;
252b5132
RH
7156}
7157
9b485d32
NC
7158/* Display the flags field. */
7159
b34976b6 7160static bfd_boolean
57e8b36a 7161elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7162{
fc830a83
NC
7163 FILE * file = (FILE *) ptr;
7164 unsigned long flags;
252b5132
RH
7165
7166 BFD_ASSERT (abfd != NULL && ptr != NULL);
7167
7168 /* Print normal ELF private data. */
7169 _bfd_elf_print_private_bfd_data (abfd, ptr);
7170
fc830a83 7171 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC
7172 /* Ignore init flag - it may not be set, despite the flags field
7173 containing valid data. */
252b5132
RH
7174
7175 /* xgettext:c-format */
9b485d32 7176 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7177
fc830a83
NC
7178 switch (EF_ARM_EABI_VERSION (flags))
7179 {
7180 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7181 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC
7182 official ARM ELF extended ABI. Hence they are only decoded if
7183 the EABI version is not set. */
fd2ec330 7184 if (flags & EF_ARM_INTERWORK)
9b485d32 7185 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7186
fd2ec330 7187 if (flags & EF_ARM_APCS_26)
6c571f00 7188 fprintf (file, " [APCS-26]");
fc830a83 7189 else
6c571f00 7190 fprintf (file, " [APCS-32]");
9a5aca8c 7191
96a846ea
RE
7192 if (flags & EF_ARM_VFP_FLOAT)
7193 fprintf (file, _(" [VFP float format]"));
fde78edd
NC
7194 else if (flags & EF_ARM_MAVERICK_FLOAT)
7195 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE
7196 else
7197 fprintf (file, _(" [FPA float format]"));
7198
fd2ec330 7199 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7200 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7201
fd2ec330 7202 if (flags & EF_ARM_PIC)
9b485d32 7203 fprintf (file, _(" [position independent]"));
fc830a83 7204
fd2ec330 7205 if (flags & EF_ARM_NEW_ABI)
9b485d32 7206 fprintf (file, _(" [new ABI]"));
9a5aca8c 7207
fd2ec330 7208 if (flags & EF_ARM_OLD_ABI)
9b485d32 7209 fprintf (file, _(" [old ABI]"));
9a5aca8c 7210
fd2ec330 7211 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7212 fprintf (file, _(" [software FP]"));
9a5aca8c 7213
96a846ea
RE
7214 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7215 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC
7216 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7217 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7218 break;
9a5aca8c 7219
fc830a83 7220 case EF_ARM_EABI_VER1:
9b485d32 7221 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7222
fc830a83 7223 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7224 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7225 else
9b485d32 7226 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7227
fc830a83
NC
7228 flags &= ~ EF_ARM_SYMSARESORTED;
7229 break;
9a5aca8c 7230
fd2ec330
PB
7231 case EF_ARM_EABI_VER2:
7232 fprintf (file, _(" [Version2 EABI]"));
7233
7234 if (flags & EF_ARM_SYMSARESORTED)
7235 fprintf (file, _(" [sorted symbol table]"));
7236 else
7237 fprintf (file, _(" [unsorted symbol table]"));
7238
7239 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7240 fprintf (file, _(" [dynamic symbols use segment index]"));
7241
7242 if (flags & EF_ARM_MAPSYMSFIRST)
7243 fprintf (file, _(" [mapping symbols precede others]"));
7244
99e4ae17 7245 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB
7246 | EF_ARM_MAPSYMSFIRST);
7247 break;
7248
d507cf36
PB
7249 case EF_ARM_EABI_VER3:
7250 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB
7251 break;
7252
7253 case EF_ARM_EABI_VER4:
7254 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7255 goto eabi;
d507cf36 7256
3a4a14e9
PB
7257 case EF_ARM_EABI_VER5:
7258 fprintf (file, _(" [Version5 EABI]"));
7259 eabi:
d507cf36
PB
7260 if (flags & EF_ARM_BE8)
7261 fprintf (file, _(" [BE8]"));
7262
7263 if (flags & EF_ARM_LE8)
7264 fprintf (file, _(" [LE8]"));
7265
7266 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7267 break;
7268
fc830a83 7269 default:
9b485d32 7270 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC
7271 break;
7272 }
252b5132 7273
fc830a83 7274 flags &= ~ EF_ARM_EABIMASK;
252b5132 7275
fc830a83 7276 if (flags & EF_ARM_RELEXEC)
9b485d32 7277 fprintf (file, _(" [relocatable executable]"));
252b5132 7278
fc830a83 7279 if (flags & EF_ARM_HASENTRY)
9b485d32 7280 fprintf (file, _(" [has entry point]"));
252b5132 7281
fc830a83
NC
7282 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7283
7284 if (flags)
9b485d32 7285 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7286
252b5132
RH
7287 fputc ('\n', file);
7288
b34976b6 7289 return TRUE;
252b5132
RH
7290}
7291
7292static int
57e8b36a 7293elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7294{
2f0ca46a
NC
7295 switch (ELF_ST_TYPE (elf_sym->st_info))
7296 {
7297 case STT_ARM_TFUNC:
7298 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7299
2f0ca46a
NC
7300 case STT_ARM_16BIT:
7301 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7302 This allows us to distinguish between data used by Thumb instructions
7303 and non-data (which is probably code) inside Thumb regions of an
7304 executable. */
1a0eb693 7305 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC
7306 return ELF_ST_TYPE (elf_sym->st_info);
7307 break;
9a5aca8c 7308
ce855c42
NC
7309 default:
7310 break;
2f0ca46a
NC
7311 }
7312
7313 return type;
252b5132 7314}
f21f3fe0 7315
252b5132 7316static asection *
07adf181
AM
7317elf32_arm_gc_mark_hook (asection *sec,
7318 struct bfd_link_info *info,
7319 Elf_Internal_Rela *rel,
7320 struct elf_link_hash_entry *h,
7321 Elf_Internal_Sym *sym)
252b5132
RH
7322{
7323 if (h != NULL)
07adf181 7324 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH
7325 {
7326 case R_ARM_GNU_VTINHERIT:
7327 case R_ARM_GNU_VTENTRY:
07adf181
AM
7328 return NULL;
7329 }
9ad5cbcf 7330
07adf181 7331 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH
7332}
7333
780a67af
NC
7334/* Update the got entry reference counts for the section being removed. */
7335
b34976b6 7336static bfd_boolean
ba93b8ac
DJ
7337elf32_arm_gc_sweep_hook (bfd * abfd,
7338 struct bfd_link_info * info,
7339 asection * sec,
7340 const Elf_Internal_Rela * relocs)
252b5132 7341{
5e681ec4
PB
7342 Elf_Internal_Shdr *symtab_hdr;
7343 struct elf_link_hash_entry **sym_hashes;
7344 bfd_signed_vma *local_got_refcounts;
7345 const Elf_Internal_Rela *rel, *relend;
eb043451
PB
7346 struct elf32_arm_link_hash_table * globals;
7347
7348 globals = elf32_arm_hash_table (info);
5e681ec4
PB
7349
7350 elf_section_data (sec)->local_dynrel = NULL;
7351
7352 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7353 sym_hashes = elf_sym_hashes (abfd);
7354 local_got_refcounts = elf_local_got_refcounts (abfd);
7355
bd97cb95
DJ
7356 check_use_blx(globals);
7357
5e681ec4
PB
7358 relend = relocs + sec->reloc_count;
7359 for (rel = relocs; rel < relend; rel++)
eb043451 7360 {
3eb128b2
AM
7361 unsigned long r_symndx;
7362 struct elf_link_hash_entry *h = NULL;
eb043451 7363 int r_type;
5e681ec4 7364
3eb128b2
AM
7365 r_symndx = ELF32_R_SYM (rel->r_info);
7366 if (r_symndx >= symtab_hdr->sh_info)
7367 {
7368 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7369 while (h->root.type == bfd_link_hash_indirect
7370 || h->root.type == bfd_link_hash_warning)
7371 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7372 }
7373
eb043451 7374 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7375 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB
7376 switch (r_type)
7377 {
7378 case R_ARM_GOT32:
eb043451 7379 case R_ARM_GOT_PREL:
ba93b8ac
DJ
7380 case R_ARM_TLS_GD32:
7381 case R_ARM_TLS_IE32:
3eb128b2 7382 if (h != NULL)
eb043451 7383 {
eb043451
PB
7384 if (h->got.refcount > 0)
7385 h->got.refcount -= 1;
7386 }
7387 else if (local_got_refcounts != NULL)
7388 {
7389 if (local_got_refcounts[r_symndx] > 0)
7390 local_got_refcounts[r_symndx] -= 1;
7391 }
7392 break;
7393
ba93b8ac
DJ
7394 case R_ARM_TLS_LDM32:
7395 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7396 break;
7397
eb043451 7398 case R_ARM_ABS32:
bb224fc3 7399 case R_ARM_ABS32_NOI:
eb043451 7400 case R_ARM_REL32:
bb224fc3 7401 case R_ARM_REL32_NOI:
eb043451
PB
7402 case R_ARM_PC24:
7403 case R_ARM_PLT32:
5b5bb741
PB
7404 case R_ARM_CALL:
7405 case R_ARM_JUMP24:
eb043451 7406 case R_ARM_PREL31:
c19d1205 7407 case R_ARM_THM_CALL:
bd97cb95
DJ
7408 case R_ARM_THM_JUMP24:
7409 case R_ARM_THM_JUMP19:
b6895b4f
PB
7410 case R_ARM_MOVW_ABS_NC:
7411 case R_ARM_MOVT_ABS:
7412 case R_ARM_MOVW_PREL_NC:
7413 case R_ARM_MOVT_PREL:
7414 case R_ARM_THM_MOVW_ABS_NC:
7415 case R_ARM_THM_MOVT_ABS:
7416 case R_ARM_THM_MOVW_PREL_NC:
7417 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ
7418 /* Should the interworking branches be here also? */
7419
3eb128b2 7420 if (h != NULL)
eb043451
PB
7421 {
7422 struct elf32_arm_link_hash_entry *eh;
7423 struct elf32_arm_relocs_copied **pp;
7424 struct elf32_arm_relocs_copied *p;
5e681ec4 7425
b7693d02 7426 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7427
eb043451 7428 if (h->plt.refcount > 0)
b7693d02
DJ
7429 {
7430 h->plt.refcount -= 1;
bd97cb95
DJ
7431 if (r_type == R_ARM_THM_CALL)
7432 eh->plt_maybe_thumb_refcount--;
7433
7434 if (r_type == R_ARM_THM_JUMP24
7435 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ
7436 eh->plt_thumb_refcount--;
7437 }
5e681ec4 7438
eb043451 7439 if (r_type == R_ARM_ABS32
bb224fc3
MS
7440 || r_type == R_ARM_REL32
7441 || r_type == R_ARM_ABS32_NOI
7442 || r_type == R_ARM_REL32_NOI)
eb043451 7443 {
eb043451
PB
7444 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7445 pp = &p->next)
7446 if (p->section == sec)
7447 {
7448 p->count -= 1;
bb224fc3
MS
7449 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7450 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7451 p->pc_count -= 1;
eb043451
PB
7452 if (p->count == 0)
7453 *pp = p->next;
7454 break;
7455 }
7456 }
7457 }
7458 break;
5e681ec4 7459
eb043451
PB
7460 default:
7461 break;
7462 }
7463 }
5e681ec4 7464
b34976b6 7465 return TRUE;
252b5132
RH
7466}
7467
780a67af
NC
7468/* Look through the relocs for a section during the first phase. */
7469
b34976b6 7470static bfd_boolean
57e8b36a
NC
7471elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7472 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7473{
b34976b6
AM
7474 Elf_Internal_Shdr *symtab_hdr;
7475 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM
7476 const Elf_Internal_Rela *rel;
7477 const Elf_Internal_Rela *rel_end;
7478 bfd *dynobj;
5e681ec4 7479 asection *sreloc;
b34976b6 7480 bfd_vma *local_got_offsets;
5e681ec4 7481 struct elf32_arm_link_hash_table *htab;
9a5aca8c 7482
1049f94e 7483 if (info->relocatable)
b34976b6 7484 return TRUE;
9a5aca8c 7485
5e681ec4
PB
7486 htab = elf32_arm_hash_table (info);
7487 sreloc = NULL;
9a5aca8c 7488
67687978
PB
7489 /* Create dynamic sections for relocatable executables so that we can
7490 copy relocations. */
7491 if (htab->root.is_relocatable_executable
7492 && ! htab->root.dynamic_sections_created)
7493 {
7494 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7495 return FALSE;
7496 }
7497
252b5132
RH
7498 dynobj = elf_hash_table (info)->dynobj;
7499 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7500
252b5132
RH
7501 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7502 sym_hashes = elf_sym_hashes (abfd);
9b485d32 7503
252b5132
RH
7504 rel_end = relocs + sec->reloc_count;
7505 for (rel = relocs; rel < rel_end; rel++)
7506 {
7507 struct elf_link_hash_entry *h;
b7693d02 7508 struct elf32_arm_link_hash_entry *eh;
252b5132 7509 unsigned long r_symndx;
eb043451 7510 int r_type;
9a5aca8c 7511
252b5132 7512 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7513 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7514 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ
7515
7516 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7517 {
7518 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7519 r_symndx);
7520 return FALSE;
7521 }
7522
252b5132
RH
7523 if (r_symndx < symtab_hdr->sh_info)
7524 h = NULL;
7525 else
973a3492
L
7526 {
7527 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7528 while (h->root.type == bfd_link_hash_indirect
7529 || h->root.type == bfd_link_hash_warning)
7530 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7531 }
9a5aca8c 7532
b7693d02
DJ
7533 eh = (struct elf32_arm_link_hash_entry *) h;
7534
eb043451 7535 switch (r_type)
252b5132 7536 {
5e681ec4 7537 case R_ARM_GOT32:
eb043451 7538 case R_ARM_GOT_PREL:
ba93b8ac
DJ
7539 case R_ARM_TLS_GD32:
7540 case R_ARM_TLS_IE32:
5e681ec4 7541 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ
7542 {
7543 int tls_type, old_tls_type;
5e681ec4 7544
ba93b8ac
DJ
7545 switch (r_type)
7546 {
7547 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7548 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7549 default: tls_type = GOT_NORMAL; break;
7550 }
252b5132 7551
ba93b8ac
DJ
7552 if (h != NULL)
7553 {
7554 h->got.refcount++;
7555 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7556 }
7557 else
7558 {
7559 bfd_signed_vma *local_got_refcounts;
7560
7561 /* This is a global offset table entry for a local symbol. */
7562 local_got_refcounts = elf_local_got_refcounts (abfd);
7563 if (local_got_refcounts == NULL)
7564 {
7565 bfd_size_type size;
7566
7567 size = symtab_hdr->sh_info;
7568 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7569 local_got_refcounts = bfd_zalloc (abfd, size);
7570 if (local_got_refcounts == NULL)
7571 return FALSE;
7572 elf_local_got_refcounts (abfd) = local_got_refcounts;
7573 elf32_arm_local_got_tls_type (abfd)
7574 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7575 }
7576 local_got_refcounts[r_symndx] += 1;
7577 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7578 }
7579
7580 /* We will already have issued an error message if there is a
7581 TLS / non-TLS mismatch, based on the symbol type. We don't
7582 support any linker relaxations. So just combine any TLS
7583 types needed. */
7584 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7585 && tls_type != GOT_NORMAL)
7586 tls_type |= old_tls_type;
7587
7588 if (old_tls_type != tls_type)
7589 {
7590 if (h != NULL)
7591 elf32_arm_hash_entry (h)->tls_type = tls_type;
7592 else
7593 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7594 }
7595 }
7596 /* Fall through */
7597
7598 case R_ARM_TLS_LDM32:
7599 if (r_type == R_ARM_TLS_LDM32)
7600 htab->tls_ldm_got.refcount++;
7601 /* Fall through */
252b5132 7602
c19d1205 7603 case R_ARM_GOTOFF32:
5e681ec4
PB
7604 case R_ARM_GOTPC:
7605 if (htab->sgot == NULL)
7606 {
7607 if (htab->root.dynobj == NULL)
7608 htab->root.dynobj = abfd;
7609 if (!create_got_section (htab->root.dynobj, info))
7610 return FALSE;
7611 }
252b5132
RH
7612 break;
7613
00a97672
RS
7614 case R_ARM_ABS12:
7615 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7616 ldr __GOTT_INDEX__ offsets. */
7617 if (!htab->vxworks_p)
7618 break;
7619 /* Fall through */
7620
252b5132 7621 case R_ARM_ABS32:
bb224fc3 7622 case R_ARM_ABS32_NOI:
252b5132 7623 case R_ARM_REL32:
bb224fc3 7624 case R_ARM_REL32_NOI:
252b5132 7625 case R_ARM_PC24:
7359ea65 7626 case R_ARM_PLT32:
5b5bb741
PB
7627 case R_ARM_CALL:
7628 case R_ARM_JUMP24:
eb043451 7629 case R_ARM_PREL31:
c19d1205 7630 case R_ARM_THM_CALL:
bd97cb95
DJ
7631 case R_ARM_THM_JUMP24:
7632 case R_ARM_THM_JUMP19:
b6895b4f
PB
7633 case R_ARM_MOVW_ABS_NC:
7634 case R_ARM_MOVT_ABS:
7635 case R_ARM_MOVW_PREL_NC:
7636 case R_ARM_MOVT_PREL:
7637 case R_ARM_THM_MOVW_ABS_NC:
7638 case R_ARM_THM_MOVT_ABS:
7639 case R_ARM_THM_MOVW_PREL_NC:
7640 case R_ARM_THM_MOVT_PREL:
b7693d02 7641 /* Should the interworking branches be listed here? */
7359ea65 7642 if (h != NULL)
5e681ec4
PB
7643 {
7644 /* If this reloc is in a read-only section, we might
7645 need a copy reloc. We can't check reliably at this
7646 stage whether the section is read-only, as input
7647 sections have not yet been mapped to output sections.
7648 Tentatively set the flag for now, and correct in
7649 adjust_dynamic_symbol. */
7359ea65 7650 if (!info->shared)
f5385ebf 7651 h->non_got_ref = 1;
7359ea65 7652
5e681ec4 7653 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ
7654 refers to is in a different object. We can't tell for
7655 sure yet, because something later might force the
7656 symbol local. */
bb224fc3
MS
7657 if (r_type != R_ARM_ABS32
7658 && r_type != R_ARM_REL32
7659 && r_type != R_ARM_ABS32_NOI
d3753b85
RS
7660 && r_type != R_ARM_REL32_NOI
7661 && r_type != R_ARM_ABS12)
f5385ebf 7662 h->needs_plt = 1;
4f199be3
DJ
7663
7664 /* If we create a PLT entry, this relocation will reference
7665 it, even if it's an ABS32 relocation. */
7666 h->plt.refcount += 1;
b7693d02 7667
bd97cb95
DJ
7668 /* It's too early to use htab->use_blx here, so we have to
7669 record possible blx references separately from
7670 relocs that definitely need a thumb stub. */
7671
c19d1205 7672 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ
7673 eh->plt_maybe_thumb_refcount += 1;
7674
7675 if (r_type == R_ARM_THM_JUMP24
7676 || r_type == R_ARM_THM_JUMP19)
b7693d02 7677 eh->plt_thumb_refcount += 1;
5e681ec4
PB
7678 }
7679
67687978
PB
7680 /* If we are creating a shared library or relocatable executable,
7681 and this is a reloc against a global symbol, or a non PC
7682 relative reloc against a local symbol, then we need to copy
7683 the reloc into the shared library. However, if we are linking
7684 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH
7685 global symbol which is defined in an object we are
7686 including in the link (i.e., DEF_REGULAR is set). At
7687 this point we have not seen all the input files, so it is
7688 possible that DEF_REGULAR is not set now but will be set
7689 later (it is never cleared). We account for that
7690 possibility below by storing information in the
5e681ec4 7691 relocs_copied field of the hash table entry. */
67687978 7692 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7693 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7694 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ
7695 || (h != NULL && ! h->needs_plt
7696 && (! info->symbolic || ! h->def_regular))))
252b5132 7697 {
5e681ec4
PB
7698 struct elf32_arm_relocs_copied *p, **head;
7699
252b5132
RH
7700 /* When creating a shared object, we must copy these
7701 reloc types into the output file. We create a reloc
7702 section in dynobj and make room for this reloc. */
7703 if (sreloc == NULL)
7704 {
7705 const char * name;
7706
7707 name = (bfd_elf_string_from_elf_section
7708 (abfd,
7709 elf_elfheader (abfd)->e_shstrndx,
7710 elf_section_data (sec)->rel_hdr.sh_name));
7711 if (name == NULL)
b34976b6 7712 return FALSE;
252b5132 7713
00a97672 7714 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH
7715
7716 sreloc = bfd_get_section_by_name (dynobj, name);
7717 if (sreloc == NULL)
7718 {
7719 flagword flags;
7720
252b5132
RH
7721 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7722 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM
7723 if ((sec->flags & SEC_ALLOC) != 0
7724 /* BPABI objects never have dynamic
7725 relocations mapped. */
7726 && !htab->symbian_p)
252b5132 7727 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L
7728 sreloc = bfd_make_section_with_flags (dynobj,
7729 name,
7730 flags);
252b5132 7731 if (sreloc == NULL
252b5132 7732 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7733 return FALSE;
252b5132 7734 }
5e681ec4
PB
7735
7736 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH
7737 }
7738
5e681ec4
PB
7739 /* If this is a global symbol, we count the number of
7740 relocations we need for this symbol. */
7741 if (h != NULL)
252b5132 7742 {
5e681ec4
PB
7743 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7744 }
7745 else
7746 {
7747 /* Track dynamic relocs needed for local syms too.
7748 We really need local syms available to do this
7749 easily. Oh well. */
57e8b36a 7750
5e681ec4 7751 asection *s;
6edfbbad
DJ
7752 void *vpp;
7753
5e681ec4
PB
7754 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7755 sec, r_symndx);
7756 if (s == NULL)
7757 return FALSE;
57e8b36a 7758
6edfbbad
DJ
7759 vpp = &elf_section_data (s)->local_dynrel;
7760 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7761 }
57e8b36a 7762
5e681ec4
PB
7763 p = *head;
7764 if (p == NULL || p->section != sec)
7765 {
7766 bfd_size_type amt = sizeof *p;
57e8b36a 7767
5e681ec4 7768 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7769 if (p == NULL)
5e681ec4
PB
7770 return FALSE;
7771 p->next = *head;
7772 *head = p;
7773 p->section = sec;
7774 p->count = 0;
ba93b8ac 7775 p->pc_count = 0;
252b5132 7776 }
57e8b36a 7777
bb224fc3 7778 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7779 p->pc_count += 1;
71a976dd 7780 p->count += 1;
252b5132
RH
7781 }
7782 break;
7783
7784 /* This relocation describes the C++ object vtable hierarchy.
7785 Reconstruct it for later use during GC. */
7786 case R_ARM_GNU_VTINHERIT:
c152c796 7787 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 7788 return FALSE;
252b5132 7789 break;
9a5aca8c 7790
252b5132
RH
7791 /* This relocation describes which C++ vtable entries are actually
7792 used. Record for later use during GC. */
7793 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB
7794 BFD_ASSERT (h != NULL);
7795 if (h != NULL
7796 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 7797 return FALSE;
252b5132
RH
7798 break;
7799 }
7800 }
f21f3fe0 7801
b34976b6 7802 return TRUE;
252b5132
RH
7803}
7804
6a5bb875
PB
7805/* Unwinding tables are not referenced directly. This pass marks them as
7806 required if the corresponding code section is marked. */
7807
7808static bfd_boolean
7809elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
7810 elf_gc_mark_hook_fn gc_mark_hook)
7811{
7812 bfd *sub;
7813 Elf_Internal_Shdr **elf_shdrp;
7814 bfd_boolean again;
7815
7816 /* Marking EH data may cause additional code sections to be marked,
7817 requiring multiple passes. */
7818 again = TRUE;
7819 while (again)
7820 {
7821 again = FALSE;
7822 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
7823 {
7824 asection *o;
7825
7826 if (bfd_get_flavour (sub) != bfd_target_elf_flavour)
7827 continue;
7828
7829 elf_shdrp = elf_elfsections (sub);
7830 for (o = sub->sections; o != NULL; o = o->next)
7831 {
7832 Elf_Internal_Shdr *hdr;
7833 hdr = &elf_section_data (o)->this_hdr;
7834 if (hdr->sh_type == SHT_ARM_EXIDX && hdr->sh_link
7835 && !o->gc_mark
7836 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
7837 {
7838 again = TRUE;
7839 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
7840 return FALSE;
7841 }
7842 }
7843 }
7844 }
7845
7846 return TRUE;
7847}
7848
3c9458e9
NC
7849/* Treat mapping symbols as special target symbols. */
7850
7851static bfd_boolean
7852elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
7853{
b0796911
PB
7854 return bfd_is_arm_special_symbol_name (sym->name,
7855 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC
7856}
7857
0367ecfb
NC
7858/* This is a copy of elf_find_function() from elf.c except that
7859 ARM mapping symbols are ignored when looking for function names
7860 and STT_ARM_TFUNC is considered to a function type. */
252b5132 7861
0367ecfb
NC
7862static bfd_boolean
7863arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
7864 asection * section,
7865 asymbol ** symbols,
7866 bfd_vma offset,
7867 const char ** filename_ptr,
7868 const char ** functionname_ptr)
7869{
7870 const char * filename = NULL;
7871 asymbol * func = NULL;
7872 bfd_vma low_func = 0;
7873 asymbol ** p;
252b5132
RH
7874
7875 for (p = symbols; *p != NULL; p++)
7876 {
7877 elf_symbol_type *q;
7878
7879 q = (elf_symbol_type *) *p;
7880
252b5132
RH
7881 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
7882 {
7883 default:
7884 break;
7885 case STT_FILE:
7886 filename = bfd_asymbol_name (&q->symbol);
7887 break;
252b5132
RH
7888 case STT_FUNC:
7889 case STT_ARM_TFUNC:
9d2da7ca 7890 case STT_NOTYPE:
b0796911 7891 /* Skip mapping symbols. */
0367ecfb 7892 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB
7893 && bfd_is_arm_special_symbol_name (q->symbol.name,
7894 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC
7895 continue;
7896 /* Fall through. */
6b40fcba 7897 if (bfd_get_section (&q->symbol) == section
252b5132
RH
7898 && q->symbol.value >= low_func
7899 && q->symbol.value <= offset)
7900 {
7901 func = (asymbol *) q;
7902 low_func = q->symbol.value;
7903 }
7904 break;
7905 }
7906 }
7907
7908 if (func == NULL)
b34976b6 7909 return FALSE;
252b5132 7910
0367ecfb
NC
7911 if (filename_ptr)
7912 *filename_ptr = filename;
7913 if (functionname_ptr)
7914 *functionname_ptr = bfd_asymbol_name (func);
7915
7916 return TRUE;
7917}
7918
7919
7920/* Find the nearest line to a particular section and offset, for error
7921 reporting. This code is a duplicate of the code in elf.c, except
7922 that it uses arm_elf_find_function. */
7923
7924static bfd_boolean
7925elf32_arm_find_nearest_line (bfd * abfd,
7926 asection * section,
7927 asymbol ** symbols,
7928 bfd_vma offset,
7929 const char ** filename_ptr,
7930 const char ** functionname_ptr,
7931 unsigned int * line_ptr)
7932{
7933 bfd_boolean found = FALSE;
7934
7935 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
7936
7937 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
7938 filename_ptr, functionname_ptr,
7939 line_ptr, 0,
7940 & elf_tdata (abfd)->dwarf2_find_line_info))
7941 {
7942 if (!*functionname_ptr)
7943 arm_elf_find_function (abfd, section, symbols, offset,
7944 *filename_ptr ? NULL : filename_ptr,
7945 functionname_ptr);
f21f3fe0 7946
0367ecfb
NC
7947 return TRUE;
7948 }
7949
7950 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
7951 & found, filename_ptr,
7952 functionname_ptr, line_ptr,
7953 & elf_tdata (abfd)->line_info))
7954 return FALSE;
7955
7956 if (found && (*functionname_ptr || *line_ptr))
7957 return TRUE;
7958
7959 if (symbols == NULL)
7960 return FALSE;
7961
7962 if (! arm_elf_find_function (abfd, section, symbols, offset,
7963 filename_ptr, functionname_ptr))
7964 return FALSE;
7965
7966 *line_ptr = 0;
b34976b6 7967 return TRUE;
252b5132
RH
7968}
7969
4ab527b0
FF
7970static bfd_boolean
7971elf32_arm_find_inliner_info (bfd * abfd,
7972 const char ** filename_ptr,
7973 const char ** functionname_ptr,
7974 unsigned int * line_ptr)
7975{
7976 bfd_boolean found;
7977 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
7978 functionname_ptr, line_ptr,
7979 & elf_tdata (abfd)->dwarf2_find_line_info);
7980 return found;
7981}
7982
252b5132
RH
7983/* Adjust a symbol defined by a dynamic object and referenced by a
7984 regular object. The current definition is in some section of the
7985 dynamic object, but we're not including those sections. We have to
7986 change the definition to something the rest of the link can
7987 understand. */
7988
b34976b6 7989static bfd_boolean
57e8b36a
NC
7990elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
7991 struct elf_link_hash_entry * h)
252b5132
RH
7992{
7993 bfd * dynobj;
7994 asection * s;
b7693d02 7995 struct elf32_arm_link_hash_entry * eh;
67687978 7996 struct elf32_arm_link_hash_table *globals;
252b5132 7997
67687978 7998 globals = elf32_arm_hash_table (info);
252b5132
RH
7999 dynobj = elf_hash_table (info)->dynobj;
8000
8001 /* Make sure we know what is going on here. */
8002 BFD_ASSERT (dynobj != NULL
f5385ebf 8003 && (h->needs_plt
f6e332e6 8004 || h->u.weakdef != NULL
f5385ebf
AM
8005 || (h->def_dynamic
8006 && h->ref_regular
8007 && !h->def_regular)));
252b5132 8008
b7693d02
DJ
8009 eh = (struct elf32_arm_link_hash_entry *) h;
8010
252b5132
RH
8011 /* If this is a function, put it in the procedure linkage table. We
8012 will fill in the contents of the procedure linkage table later,
8013 when we know the address of the .got section. */
b7693d02 8014 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8015 || h->needs_plt)
252b5132 8016 {
5e681ec4
PB
8017 if (h->plt.refcount <= 0
8018 || SYMBOL_CALLS_LOCAL (info, h)
8019 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8020 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH
8021 {
8022 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB
8023 file, but the symbol was never referred to by a dynamic
8024 object, or if all references were garbage collected. In
8025 such a case, we don't actually need to build a procedure
8026 linkage table, and we can just do a PC24 reloc instead. */
8027 h->plt.offset = (bfd_vma) -1;
b7693d02 8028 eh->plt_thumb_refcount = 0;
bd97cb95 8029 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 8030 h->needs_plt = 0;
252b5132
RH
8031 }
8032
b34976b6 8033 return TRUE;
252b5132 8034 }
5e681ec4 8035 else
b7693d02
DJ
8036 {
8037 /* It's possible that we incorrectly decided a .plt reloc was
8038 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8039 in check_relocs. We can't decide accurately between function
8040 and non-function syms in check-relocs; Objects loaded later in
8041 the link may change h->type. So fix it now. */
8042 h->plt.offset = (bfd_vma) -1;
8043 eh->plt_thumb_refcount = 0;
bd97cb95 8044 eh->plt_maybe_thumb_refcount = 0;
b7693d02 8045 }
252b5132
RH
8046
8047 /* If this is a weak symbol, and there is a real definition, the
8048 processor independent code will have arranged for us to see the
8049 real definition first, and we can just use the same value. */
f6e332e6 8050 if (h->u.weakdef != NULL)
252b5132 8051 {
f6e332e6
AM
8052 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8053 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8054 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8055 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8056 return TRUE;
252b5132
RH
8057 }
8058
ba93b8ac
DJ
8059 /* If there are no non-GOT references, we do not need a copy
8060 relocation. */
8061 if (!h->non_got_ref)
8062 return TRUE;
8063
252b5132
RH
8064 /* This is a reference to a symbol defined by a dynamic object which
8065 is not a function. */
8066
8067 /* If we are creating a shared library, we must presume that the
8068 only references to the symbol are via the global offset table.
8069 For such cases we need not do anything here; the relocations will
67687978
PB
8070 be handled correctly by relocate_section. Relocatable executables
8071 can reference data in shared objects directly, so we don't need to
8072 do anything here. */
8073 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8074 return TRUE;
252b5132 8075
909272ee
AM
8076 if (h->size == 0)
8077 {
8078 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8079 h->root.root.string);
8080 return TRUE;
8081 }
8082
252b5132
RH
8083 /* We must allocate the symbol in our .dynbss section, which will
8084 become part of the .bss section of the executable. There will be
8085 an entry for this symbol in the .dynsym section. The dynamic
8086 object will contain position independent code, so all references
8087 from the dynamic object to this symbol will go through the global
8088 offset table. The dynamic linker will use the .dynsym entry to
8089 determine the address it must put in the global offset table, so
8090 both the dynamic object and the regular object will refer to the
8091 same memory location for the variable. */
252b5132
RH
8092 s = bfd_get_section_by_name (dynobj, ".dynbss");
8093 BFD_ASSERT (s != NULL);
8094
8095 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8096 copy the initial value out of the dynamic object and into the
8097 runtime process image. We need to remember the offset into the
00a97672 8098 .rel(a).bss section we are going to use. */
252b5132
RH
8099 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8100 {
8101 asection *srel;
8102
00a97672 8103 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8104 BFD_ASSERT (srel != NULL);
00a97672 8105 srel->size += RELOC_SIZE (globals);
f5385ebf 8106 h->needs_copy = 1;
252b5132
RH
8107 }
8108
027297b7 8109 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH
8110}
8111
5e681ec4
PB
8112/* Allocate space in .plt, .got and associated reloc sections for
8113 dynamic relocs. */
8114
8115static bfd_boolean
57e8b36a 8116allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB
8117{
8118 struct bfd_link_info *info;
8119 struct elf32_arm_link_hash_table *htab;
8120 struct elf32_arm_link_hash_entry *eh;
8121 struct elf32_arm_relocs_copied *p;
bd97cb95 8122 bfd_signed_vma thumb_refs;
5e681ec4 8123
b7693d02
DJ
8124 eh = (struct elf32_arm_link_hash_entry *) h;
8125
5e681ec4
PB
8126 if (h->root.type == bfd_link_hash_indirect)
8127 return TRUE;
8128
8129 if (h->root.type == bfd_link_hash_warning)
8130 /* When warning symbols are created, they **replace** the "real"
8131 entry in the hash table, thus we never get to see the real
8132 symbol in a hash traversal. So look at it now. */
8133 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8134
8135 info = (struct bfd_link_info *) inf;
8136 htab = elf32_arm_hash_table (info);
8137
8138 if (htab->root.dynamic_sections_created
8139 && h->plt.refcount > 0)
8140 {
8141 /* Make sure this symbol is output as a dynamic symbol.
8142 Undefined weak syms won't yet be marked as dynamic. */
8143 if (h->dynindx == -1
f5385ebf 8144 && !h->forced_local)
5e681ec4 8145 {
c152c796 8146 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8147 return FALSE;
8148 }
8149
8150 if (info->shared
7359ea65 8151 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB
8152 {
8153 asection *s = htab->splt;
8154
8155 /* If this is the first .plt entry, make room for the special
8156 first entry. */
eea6121a 8157 if (s->size == 0)
e5a52504 8158 s->size += htab->plt_header_size;
5e681ec4 8159
eea6121a 8160 h->plt.offset = s->size;
5e681ec4 8161
b7693d02
DJ
8162 /* If we will insert a Thumb trampoline before this PLT, leave room
8163 for it. */
bd97cb95
DJ
8164 thumb_refs = eh->plt_thumb_refcount;
8165 if (!htab->use_blx)
8166 thumb_refs += eh->plt_maybe_thumb_refcount;
8167
8168 if (thumb_refs > 0)
b7693d02
DJ
8169 {
8170 h->plt.offset += PLT_THUMB_STUB_SIZE;
8171 s->size += PLT_THUMB_STUB_SIZE;
8172 }
8173
5e681ec4
PB
8174 /* If this symbol is not defined in a regular file, and we are
8175 not generating a shared library, then set the symbol to this
8176 location in the .plt. This is required to make function
8177 pointers compare as equal between the normal executable and
8178 the shared library. */
8179 if (! info->shared
f5385ebf 8180 && !h->def_regular)
5e681ec4
PB
8181 {
8182 h->root.u.def.section = s;
8183 h->root.u.def.value = h->plt.offset;
b7693d02
DJ
8184
8185 /* Make sure the function is not marked as Thumb, in case
8186 it is the target of an ABS32 relocation, which will
8187 point to the PLT entry. */
8188 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8189 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB
8190 }
8191
8192 /* Make room for this entry. */
e5a52504 8193 s->size += htab->plt_entry_size;
5e681ec4 8194
e5a52504 8195 if (!htab->symbian_p)
b7693d02
DJ
8196 {
8197 /* We also need to make an entry in the .got.plt section, which
8198 will be placed in the .got section by the linker script. */
8199 eh->plt_got_offset = htab->sgotplt->size;
8200 htab->sgotplt->size += 4;
8201 }
5e681ec4 8202
00a97672
RS
8203 /* We also need to make an entry in the .rel(a).plt section. */
8204 htab->srelplt->size += RELOC_SIZE (htab);
8205
8206 /* VxWorks executables have a second set of relocations for
8207 each PLT entry. They go in a separate relocation section,
8208 which is processed by the kernel loader. */
8209 if (htab->vxworks_p && !info->shared)
8210 {
8211 /* There is a relocation for the initial PLT entry:
8212 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8213 if (h->plt.offset == htab->plt_header_size)
8214 htab->srelplt2->size += RELOC_SIZE (htab);
8215
8216 /* There are two extra relocations for each subsequent
8217 PLT entry: an R_ARM_32 relocation for the GOT entry,
8218 and an R_ARM_32 relocation for the PLT entry. */
8219 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8220 }
5e681ec4
PB
8221 }
8222 else
8223 {
8224 h->plt.offset = (bfd_vma) -1;
f5385ebf 8225 h->needs_plt = 0;
5e681ec4
PB
8226 }
8227 }
8228 else
8229 {
8230 h->plt.offset = (bfd_vma) -1;
f5385ebf 8231 h->needs_plt = 0;
5e681ec4
PB
8232 }
8233
8234 if (h->got.refcount > 0)
8235 {
8236 asection *s;
8237 bfd_boolean dyn;
ba93b8ac
DJ
8238 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8239 int indx;
5e681ec4
PB
8240
8241 /* Make sure this symbol is output as a dynamic symbol.
8242 Undefined weak syms won't yet be marked as dynamic. */
8243 if (h->dynindx == -1
f5385ebf 8244 && !h->forced_local)
5e681ec4 8245 {
c152c796 8246 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8247 return FALSE;
8248 }
8249
e5a52504
MM
8250 if (!htab->symbian_p)
8251 {
8252 s = htab->sgot;
8253 h->got.offset = s->size;
ba93b8ac
DJ
8254
8255 if (tls_type == GOT_UNKNOWN)
8256 abort ();
8257
8258 if (tls_type == GOT_NORMAL)
8259 /* Non-TLS symbols need one GOT slot. */
8260 s->size += 4;
8261 else
8262 {
8263 if (tls_type & GOT_TLS_GD)
8264 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8265 s->size += 8;
8266 if (tls_type & GOT_TLS_IE)
8267 /* R_ARM_TLS_IE32 needs one GOT slot. */
8268 s->size += 4;
8269 }
8270
e5a52504 8271 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ
8272
8273 indx = 0;
8274 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8275 && (!info->shared
8276 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8277 indx = h->dynindx;
8278
8279 if (tls_type != GOT_NORMAL
8280 && (info->shared || indx != 0)
8281 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8282 || h->root.type != bfd_link_hash_undefweak))
8283 {
8284 if (tls_type & GOT_TLS_IE)
00a97672 8285 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8286
8287 if (tls_type & GOT_TLS_GD)
00a97672 8288 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8289
8290 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8291 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8292 }
8293 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8294 || h->root.type != bfd_link_hash_undefweak)
8295 && (info->shared
8296 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8297 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8298 }
5e681ec4
PB
8299 }
8300 else
8301 h->got.offset = (bfd_vma) -1;
8302
a4fd1a8e
PB
8303 /* Allocate stubs for exported Thumb functions on v4t. */
8304 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8305 && h->def_regular
a4fd1a8e
PB
8306 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8307 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8308 {
8309 struct elf_link_hash_entry * th;
8310 struct bfd_link_hash_entry * bh;
8311 struct elf_link_hash_entry * myh;
8312 char name[1024];
8313 asection *s;
8314 bh = NULL;
8315 /* Create a new symbol to regist the real location of the function. */
8316 s = h->root.u.def.section;
8317 sprintf(name, "__real_%s", h->root.root.string);
8318 _bfd_generic_link_add_one_symbol (info, s->owner,
8319 name, BSF_GLOBAL, s,
8320 h->root.u.def.value,
8321 NULL, TRUE, FALSE, &bh);
8322
8323 myh = (struct elf_link_hash_entry *) bh;
8324 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8325 myh->forced_local = 1;
8326 eh->export_glue = myh;
8327 th = record_arm_to_thumb_glue (info, h);
8328 /* Point the symbol at the stub. */
8329 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8330 h->root.u.def.section = th->root.u.def.section;
8331 h->root.u.def.value = th->root.u.def.value & ~1;
8332 }
8333
5e681ec4
PB
8334 if (eh->relocs_copied == NULL)
8335 return TRUE;
8336
8337 /* In the shared -Bsymbolic case, discard space allocated for
8338 dynamic pc-relative relocs against symbols which turn out to be
8339 defined in regular objects. For the normal shared case, discard
8340 space for pc-relative relocs that have become local due to symbol
8341 visibility changes. */
8342
67687978 8343 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8344 {
7bdca076 8345 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS
8346 R_ARM_REL32_NOI, which will appear on something like
8347 ".long foo - .". We want calls to protected symbols to resolve
8348 directly to the function rather than going via the plt. If people
8349 want function pointer comparisons to work as expected then they
8350 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ
8351 if (SYMBOL_CALLS_LOCAL (info, h))
8352 {
8353 struct elf32_arm_relocs_copied **pp;
8354
8355 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8356 {
8357 p->count -= p->pc_count;
8358 p->pc_count = 0;
8359 if (p->count == 0)
8360 *pp = p->next;
8361 else
8362 pp = &p->next;
8363 }
8364 }
8365
8366 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8367 visibility. */
22d606e9 8368 if (eh->relocs_copied != NULL
5e681ec4 8369 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM
8370 {
8371 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8372 eh->relocs_copied = NULL;
8373
8374 /* Make sure undefined weak symbols are output as a dynamic
8375 symbol in PIEs. */
8376 else if (h->dynindx == -1
8377 && !h->forced_local)
8378 {
8379 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8380 return FALSE;
8381 }
8382 }
8383
67687978
PB
8384 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8385 && h->root.type == bfd_link_hash_new)
8386 {
8387 /* Output absolute symbols so that we can create relocations
8388 against them. For normal symbols we output a relocation
8389 against the section that contains them. */
8390 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8391 return FALSE;
8392 }
8393
5e681ec4
PB
8394 }
8395 else
8396 {
8397 /* For the non-shared case, discard space for relocs against
8398 symbols which turn out to need copy relocs or are not
8399 dynamic. */
8400
f5385ebf
AM
8401 if (!h->non_got_ref
8402 && ((h->def_dynamic
8403 && !h->def_regular)
5e681ec4
PB
8404 || (htab->root.dynamic_sections_created
8405 && (h->root.type == bfd_link_hash_undefweak
8406 || h->root.type == bfd_link_hash_undefined))))
8407 {
8408 /* Make sure this symbol is output as a dynamic symbol.
8409 Undefined weak syms won't yet be marked as dynamic. */
8410 if (h->dynindx == -1
f5385ebf 8411 && !h->forced_local)
5e681ec4 8412 {
c152c796 8413 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB
8414 return FALSE;
8415 }
8416
8417 /* If that succeeded, we know we'll be keeping all the
8418 relocs. */
8419 if (h->dynindx != -1)
8420 goto keep;
8421 }
8422
8423 eh->relocs_copied = NULL;
8424
8425 keep: ;
8426 }
8427
8428 /* Finally, allocate space. */
8429 for (p = eh->relocs_copied; p != NULL; p = p->next)
8430 {
8431 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8432 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB
8433 }
8434
8435 return TRUE;
8436}
8437
08d1f311
DJ
8438/* Find any dynamic relocs that apply to read-only sections. */
8439
8440static bfd_boolean
8441elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8442{
8443 struct elf32_arm_link_hash_entry *eh;
8444 struct elf32_arm_relocs_copied *p;
8445
8446 if (h->root.type == bfd_link_hash_warning)
8447 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8448
8449 eh = (struct elf32_arm_link_hash_entry *) h;
8450 for (p = eh->relocs_copied; p != NULL; p = p->next)
8451 {
8452 asection *s = p->section;
8453
8454 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8455 {
8456 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8457
8458 info->flags |= DF_TEXTREL;
8459
8460 /* Not an error, just cut short the traversal. */
8461 return FALSE;
8462 }
8463 }
8464 return TRUE;
8465}
8466
d504ffc8
DJ
8467void
8468bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8469 int byteswap_code)
8470{
8471 struct elf32_arm_link_hash_table *globals;
8472
8473 globals = elf32_arm_hash_table (info);
8474 globals->byteswap_code = byteswap_code;
8475}
8476
252b5132
RH
8477/* Set the sizes of the dynamic sections. */
8478
b34976b6 8479static bfd_boolean
57e8b36a
NC
8480elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8481 struct bfd_link_info * info)
252b5132
RH
8482{
8483 bfd * dynobj;
8484 asection * s;
b34976b6
AM
8485 bfd_boolean plt;
8486 bfd_boolean relocs;
5e681ec4
PB
8487 bfd *ibfd;
8488 struct elf32_arm_link_hash_table *htab;
252b5132 8489
5e681ec4 8490 htab = elf32_arm_hash_table (info);
252b5132
RH
8491 dynobj = elf_hash_table (info)->dynobj;
8492 BFD_ASSERT (dynobj != NULL);
39b41c9c 8493 check_use_blx (htab);
252b5132
RH
8494
8495 if (elf_hash_table (info)->dynamic_sections_created)
8496 {
8497 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8498 if (info->executable)
252b5132
RH
8499 {
8500 s = bfd_get_section_by_name (dynobj, ".interp");
8501 BFD_ASSERT (s != NULL);
eea6121a 8502 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH
8503 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8504 }
8505 }
5e681ec4
PB
8506
8507 /* Set up .got offsets for local syms, and space for local dynamic
8508 relocs. */
8509 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8510 {
5e681ec4
PB
8511 bfd_signed_vma *local_got;
8512 bfd_signed_vma *end_local_got;
8513 char *local_tls_type;
8514 bfd_size_type locsymcount;
8515 Elf_Internal_Shdr *symtab_hdr;
8516 asection *srel;
8517
8518 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
8519 continue;
8520
8521 for (s = ibfd->sections; s != NULL; s = s->next)
8522 {
8523 struct elf32_arm_relocs_copied *p;
8524
6edfbbad 8525 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB
8526 {
8527 if (!bfd_is_abs_section (p->section)
8528 && bfd_is_abs_section (p->section->output_section))
8529 {
8530 /* Input section has been discarded, either because
8531 it is a copy of a linkonce section or due to
8532 linker script /DISCARD/, so we'll be discarding
8533 the relocs too. */
8534 }
8535 else if (p->count != 0)
8536 {
8537 srel = elf_section_data (p->section)->sreloc;
00a97672 8538 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB
8539 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8540 info->flags |= DF_TEXTREL;
8541 }
8542 }
8543 }
8544
8545 local_got = elf_local_got_refcounts (ibfd);
8546 if (!local_got)
8547 continue;
8548
8549 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
8550 locsymcount = symtab_hdr->sh_info;
8551 end_local_got = local_got + locsymcount;
ba93b8ac 8552 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB
8553 s = htab->sgot;
8554 srel = htab->srelgot;
8555 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8556 {
8557 if (*local_got > 0)
8558 {
eea6121a 8559 *local_got = s->size;
ba93b8ac
DJ
8560 if (*local_tls_type & GOT_TLS_GD)
8561 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8562 s->size += 8;
8563 if (*local_tls_type & GOT_TLS_IE)
8564 s->size += 4;
8565 if (*local_tls_type == GOT_NORMAL)
8566 s->size += 4;
8567
8568 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8569 srel->size += RELOC_SIZE (htab);
5e681ec4
PB
8570 }
8571 else
8572 *local_got = (bfd_vma) -1;
8573 }
252b5132
RH
8574 }
8575
ba93b8ac
DJ
8576 if (htab->tls_ldm_got.refcount > 0)
8577 {
8578 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8579 for R_ARM_TLS_LDM32 relocations. */
8580 htab->tls_ldm_got.offset = htab->sgot->size;
8581 htab->sgot->size += 8;
8582 if (info->shared)
00a97672 8583 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ
8584 }
8585 else
8586 htab->tls_ldm_got.offset = -1;
8587
5e681ec4
PB
8588 /* Allocate global sym .plt and .got entries, and space for global
8589 sym dynamic relocs. */
57e8b36a 8590 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8591
d504ffc8
DJ
8592 /* Here we rummage through the found bfds to collect glue information. */
8593 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e
JB
8594 {
8595 /* Initialise mapping tables for code/data. */
8596 bfd_elf32_arm_init_maps (ibfd);
8597
8598 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8599 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8600 /* xgettext:c-format */
8601 _bfd_error_handler (_("Errors encountered processing file %s"),
8602 ibfd->filename);
8603 }
d504ffc8 8604
252b5132
RH
8605 /* The check_relocs and adjust_dynamic_symbol entry points have
8606 determined the sizes of the various dynamic sections. Allocate
8607 memory for them. */
b34976b6
AM
8608 plt = FALSE;
8609 relocs = FALSE;
252b5132
RH
8610 for (s = dynobj->sections; s != NULL; s = s->next)
8611 {
8612 const char * name;
252b5132
RH
8613
8614 if ((s->flags & SEC_LINKER_CREATED) == 0)
8615 continue;
8616
8617 /* It's OK to base decisions on the section name, because none
8618 of the dynobj section names depend upon the input files. */
8619 name = bfd_get_section_name (dynobj, s);
8620
24a1ba0f 8621 if (strcmp (name, ".plt") == 0)
252b5132 8622 {
c456f082
AM
8623 /* Remember whether there is a PLT. */
8624 plt = s->size != 0;
252b5132 8625 }
0112cd26 8626 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8627 {
c456f082 8628 if (s->size != 0)
252b5132 8629 {
252b5132 8630 /* Remember whether there are any reloc sections other
00a97672
RS
8631 than .rel(a).plt and .rela.plt.unloaded. */
8632 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8633 relocs = TRUE;
252b5132
RH
8634
8635 /* We use the reloc_count field as a counter if we need
8636 to copy relocs into the output file. */
8637 s->reloc_count = 0;
8638 }
8639 }
0112cd26 8640 else if (! CONST_STRNEQ (name, ".got")
c456f082 8641 && strcmp (name, ".dynbss") != 0)
252b5132
RH
8642 {
8643 /* It's not one of our sections, so don't allocate space. */
8644 continue;
8645 }
8646
c456f082 8647 if (s->size == 0)
252b5132 8648 {
c456f082 8649 /* If we don't need this section, strip it from the
00a97672
RS
8650 output file. This is mostly to handle .rel(a).bss and
8651 .rel(a).plt. We must create both sections in
c456f082
AM
8652 create_dynamic_sections, because they must be created
8653 before the linker maps input sections to output
8654 sections. The linker does that before
8655 adjust_dynamic_symbol is called, and it is that
8656 function which decides whether anything needs to go
8657 into these sections. */
8423293d 8658 s->flags |= SEC_EXCLUDE;
252b5132
RH
8659 continue;
8660 }
8661
c456f082
AM
8662 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8663 continue;
8664
252b5132 8665 /* Allocate memory for the section contents. */
eea6121a 8666 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8667 if (s->contents == NULL)
b34976b6 8668 return FALSE;
252b5132
RH
8669 }
8670
8671 if (elf_hash_table (info)->dynamic_sections_created)
8672 {
8673 /* Add some entries to the .dynamic section. We fill in the
8674 values later, in elf32_arm_finish_dynamic_sections, but we
8675 must add the entries now so that we get the correct size for
8676 the .dynamic section. The DT_DEBUG entry is filled in by the
8677 dynamic linker and used by the debugger. */
dc810e39 8678#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8679 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8680
8532796c 8681 if (info->executable)
252b5132 8682 {
dc810e39 8683 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8684 return FALSE;
252b5132
RH
8685 }
8686
8687 if (plt)
8688 {
dc810e39
AM
8689 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8690 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS
8691 || !add_dynamic_entry (DT_PLTREL,
8692 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8693 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8694 return FALSE;
252b5132
RH
8695 }
8696
8697 if (relocs)
8698 {
00a97672
RS
8699 if (htab->use_rel)
8700 {
8701 if (!add_dynamic_entry (DT_REL, 0)
8702 || !add_dynamic_entry (DT_RELSZ, 0)
8703 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8704 return FALSE;
8705 }
8706 else
8707 {
8708 if (!add_dynamic_entry (DT_RELA, 0)
8709 || !add_dynamic_entry (DT_RELASZ, 0)
8710 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8711 return FALSE;
8712 }
252b5132
RH
8713 }
8714
08d1f311
DJ
8715 /* If any dynamic relocs apply to a read-only section,
8716 then we need a DT_TEXTREL entry. */
8717 if ((info->flags & DF_TEXTREL) == 0)
8718 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8719 (PTR) info);
8720
99e4ae17 8721 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8722 {
dc810e39 8723 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8724 return FALSE;
252b5132 8725 }
7a2b07ff
NS
8726 if (htab->vxworks_p
8727 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
8728 return FALSE;
252b5132 8729 }
8532796c 8730#undef add_dynamic_entry
252b5132 8731
b34976b6 8732 return TRUE;
252b5132
RH
8733}
8734
252b5132
RH
8735/* Finish up dynamic symbol handling. We set the contents of various
8736 dynamic sections here. */
8737
b34976b6 8738static bfd_boolean
57e8b36a
NC
8739elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8740 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH
8741{
8742 bfd * dynobj;
e5a52504 8743 struct elf32_arm_link_hash_table *htab;
b7693d02 8744 struct elf32_arm_link_hash_entry *eh;
252b5132
RH
8745
8746 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8747 htab = elf32_arm_hash_table (info);
b7693d02 8748 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH
8749
8750 if (h->plt.offset != (bfd_vma) -1)
8751 {
8752 asection * splt;
252b5132 8753 asection * srel;
e5a52504 8754 bfd_byte *loc;
24a1ba0f 8755 bfd_vma plt_index;
947216bf 8756 Elf_Internal_Rela rel;
252b5132
RH
8757
8758 /* This symbol has an entry in the procedure linkage table. Set
8759 it up. */
8760
8761 BFD_ASSERT (h->dynindx != -1);
8762
8763 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 8764 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 8765 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 8766
e5a52504
MM
8767 /* Fill in the entry in the procedure linkage table. */
8768 if (htab->symbian_p)
8769 {
52ab56c2
PB
8770 put_arm_insn (htab, output_bfd,
8771 elf32_arm_symbian_plt_entry[0],
8772 splt->contents + h->plt.offset);
8773 bfd_put_32 (output_bfd,
8774 elf32_arm_symbian_plt_entry[1],
8775 splt->contents + h->plt.offset + 4);
e5a52504
MM
8776
8777 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM
8778 rel.r_offset = (splt->output_section->vma
8779 + splt->output_offset
52ab56c2 8780 + h->plt.offset + 4);
e5a52504 8781 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ
8782
8783 /* Get the index in the procedure linkage table which
8784 corresponds to this symbol. This is the index of this symbol
8785 in all the symbols for which we are making plt entries. The
8786 first entry in the procedure linkage table is reserved. */
8787 plt_index = ((h->plt.offset - htab->plt_header_size)
8788 / htab->plt_entry_size);
e5a52504
MM
8789 }
8790 else
8791 {
00a97672 8792 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM
8793 bfd_vma got_displacement;
8794 asection * sgot;
52ab56c2 8795 bfd_byte * ptr;
e5a52504
MM
8796
8797 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
8798 BFD_ASSERT (sgot != NULL);
8799
b7693d02
DJ
8800 /* Get the offset into the .got.plt table of the entry that
8801 corresponds to this function. */
8802 got_offset = eh->plt_got_offset;
8803
8804 /* Get the index in the procedure linkage table which
8805 corresponds to this symbol. This is the index of this symbol
8806 in all the symbols for which we are making plt entries. The
8807 first three entries in .got.plt are reserved; after that
8808 symbols appear in the same order as in .plt. */
8809 plt_index = (got_offset - 12) / 4;
e5a52504 8810
00a97672
RS
8811 /* Calculate the address of the GOT entry. */
8812 got_address = (sgot->output_section->vma
8813 + sgot->output_offset
8814 + got_offset);
5e681ec4 8815
00a97672
RS
8816 /* ...and the address of the PLT entry. */
8817 plt_address = (splt->output_section->vma
8818 + splt->output_offset
8819 + h->plt.offset);
5e681ec4 8820
52ab56c2 8821 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS
8822 if (htab->vxworks_p && info->shared)
8823 {
8824 unsigned int i;
8825 bfd_vma val;
8826
52ab56c2 8827 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS
8828 {
8829 val = elf32_arm_vxworks_shared_plt_entry[i];
8830 if (i == 2)
8831 val |= got_address - sgot->output_section->vma;
8832 if (i == 5)
8833 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB
8834 if (i == 2 || i == 5)
8835 bfd_put_32 (output_bfd, val, ptr);
8836 else
8837 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS
8838 }
8839 }
8840 else if (htab->vxworks_p)
b7693d02 8841 {
00a97672
RS
8842 unsigned int i;
8843 bfd_vma val;
8844
d3753b85 8845 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS
8846 {
8847 val = elf32_arm_vxworks_exec_plt_entry[i];
8848 if (i == 2)
8849 val |= got_address;
8850 if (i == 4)
8851 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
8852 if (i == 5)
8853 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB
8854 if (i == 2 || i == 5)
8855 bfd_put_32 (output_bfd, val, ptr);
8856 else
8857 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS
8858 }
8859
8860 loc = (htab->srelplt2->contents
8861 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
8862
8863 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
8864 referencing the GOT for this PLT entry. */
8865 rel.r_offset = plt_address + 8;
8866 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
8867 rel.r_addend = got_offset;
8868 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
8869 loc += RELOC_SIZE (htab);
8870
8871 /* Create the R_ARM_ABS32 relocation referencing the
8872 beginning of the PLT for this GOT entry. */
8873 rel.r_offset = got_address;
8874 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
8875 rel.r_addend = 0;
8876 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 8877 }
00a97672
RS
8878 else
8879 {
bd97cb95 8880 bfd_signed_vma thumb_refs;
00a97672
RS
8881 /* Calculate the displacement between the PLT slot and the
8882 entry in the GOT. The eight-byte offset accounts for the
8883 value produced by adding to pc in the first instruction
8884 of the PLT stub. */
8885 got_displacement = got_address - (plt_address + 8);
b7693d02 8886
00a97672
RS
8887 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
8888
bd97cb95
DJ
8889 thumb_refs = eh->plt_thumb_refcount;
8890 if (!htab->use_blx)
8891 thumb_refs += eh->plt_maybe_thumb_refcount;
8892
8893 if (thumb_refs > 0)
00a97672 8894 {
52ab56c2
PB
8895 put_thumb_insn (htab, output_bfd,
8896 elf32_arm_plt_thumb_stub[0], ptr - 4);
8897 put_thumb_insn (htab, output_bfd,
8898 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS
8899 }
8900
52ab56c2
PB
8901 put_arm_insn (htab, output_bfd,
8902 elf32_arm_plt_entry[0]
8903 | ((got_displacement & 0x0ff00000) >> 20),
8904 ptr + 0);
8905 put_arm_insn (htab, output_bfd,
8906 elf32_arm_plt_entry[1]
8907 | ((got_displacement & 0x000ff000) >> 12),
8908 ptr+ 4);
8909 put_arm_insn (htab, output_bfd,
8910 elf32_arm_plt_entry[2]
8911 | (got_displacement & 0x00000fff),
8912 ptr + 8);
5e681ec4 8913#ifdef FOUR_WORD_PLT
52ab56c2 8914 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 8915#endif
00a97672 8916 }
252b5132 8917
e5a52504
MM
8918 /* Fill in the entry in the global offset table. */
8919 bfd_put_32 (output_bfd,
8920 (splt->output_section->vma
8921 + splt->output_offset),
8922 sgot->contents + got_offset);
8923
00a97672
RS
8924 /* Fill in the entry in the .rel(a).plt section. */
8925 rel.r_addend = 0;
8926 rel.r_offset = got_address;
e5a52504
MM
8927 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
8928 }
57e8b36a 8929
00a97672
RS
8930 loc = srel->contents + plt_index * RELOC_SIZE (htab);
8931 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 8932
f5385ebf 8933 if (!h->def_regular)
252b5132
RH
8934 {
8935 /* Mark the symbol as undefined, rather than as defined in
8936 the .plt section. Leave the value alone. */
8937 sym->st_shndx = SHN_UNDEF;
d982ba73
PB
8938 /* If the symbol is weak, we do need to clear the value.
8939 Otherwise, the PLT entry would provide a definition for
8940 the symbol even if the symbol wasn't defined anywhere,
8941 and so the symbol would never be NULL. */
f5385ebf 8942 if (!h->ref_regular_nonweak)
d982ba73 8943 sym->st_value = 0;
252b5132
RH
8944 }
8945 }
8946
ba93b8ac
DJ
8947 if (h->got.offset != (bfd_vma) -1
8948 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
8949 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH
8950 {
8951 asection * sgot;
8952 asection * srel;
947216bf
AM
8953 Elf_Internal_Rela rel;
8954 bfd_byte *loc;
00a97672 8955 bfd_vma offset;
252b5132
RH
8956
8957 /* This symbol has an entry in the global offset table. Set it
8958 up. */
252b5132 8959 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 8960 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH
8961 BFD_ASSERT (sgot != NULL && srel != NULL);
8962
00a97672
RS
8963 offset = (h->got.offset & ~(bfd_vma) 1);
8964 rel.r_addend = 0;
252b5132
RH
8965 rel.r_offset = (sgot->output_section->vma
8966 + sgot->output_offset
00a97672 8967 + offset);
252b5132 8968
5e681ec4
PB
8969 /* If this is a static link, or it is a -Bsymbolic link and the
8970 symbol is defined locally or was forced to be local because
8971 of a version file, we just want to emit a RELATIVE reloc.
8972 The entry in the global offset table will already have been
8973 initialized in the relocate_section function. */
252b5132 8974 if (info->shared
5e681ec4
PB
8975 && SYMBOL_REFERENCES_LOCAL (info, h))
8976 {
8977 BFD_ASSERT((h->got.offset & 1) != 0);
8978 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS
8979 if (!htab->use_rel)
8980 {
8981 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
8982 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
8983 }
5e681ec4 8984 }
252b5132
RH
8985 else
8986 {
5e681ec4 8987 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 8988 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH
8989 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
8990 }
8991
00a97672
RS
8992 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
8993 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH
8994 }
8995
f5385ebf 8996 if (h->needs_copy)
252b5132
RH
8997 {
8998 asection * s;
947216bf
AM
8999 Elf_Internal_Rela rel;
9000 bfd_byte *loc;
252b5132
RH
9001
9002 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH
9003 BFD_ASSERT (h->dynindx != -1
9004 && (h->root.type == bfd_link_hash_defined
9005 || h->root.type == bfd_link_hash_defweak));
9006
9007 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9008 RELOC_SECTION (htab, ".bss"));
252b5132
RH
9009 BFD_ASSERT (s != NULL);
9010
00a97672 9011 rel.r_addend = 0;
252b5132
RH
9012 rel.r_offset = (h->root.u.def.value
9013 + h->root.u.def.section->output_section->vma
9014 + h->root.u.def.section->output_offset);
9015 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS
9016 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9017 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH
9018 }
9019
00a97672
RS
9020 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9021 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9022 to the ".got" section. */
252b5132 9023 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9024 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH
9025 sym->st_shndx = SHN_ABS;
9026
b34976b6 9027 return TRUE;
252b5132
RH
9028}
9029
9030/* Finish up the dynamic sections. */
9031
b34976b6 9032static bfd_boolean
57e8b36a 9033elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH
9034{
9035 bfd * dynobj;
9036 asection * sgot;
9037 asection * sdyn;
9038
9039 dynobj = elf_hash_table (info)->dynobj;
9040
9041 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9042 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH
9043 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9044
9045 if (elf_hash_table (info)->dynamic_sections_created)
9046 {
9047 asection *splt;
9048 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9049 struct elf32_arm_link_hash_table *htab;
252b5132 9050
229fcec5 9051 htab = elf32_arm_hash_table (info);
252b5132 9052 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9053 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH
9054
9055 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9056 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9057
252b5132
RH
9058 for (; dyncon < dynconend; dyncon++)
9059 {
9060 Elf_Internal_Dyn dyn;
9061 const char * name;
9062 asection * s;
9063
9064 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9065
9066 switch (dyn.d_tag)
9067 {
229fcec5
MM
9068 unsigned int type;
9069
252b5132 9070 default:
7a2b07ff
NS
9071 if (htab->vxworks_p
9072 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
9073 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH
9074 break;
9075
229fcec5
MM
9076 case DT_HASH:
9077 name = ".hash";
9078 goto get_vma_if_bpabi;
9079 case DT_STRTAB:
9080 name = ".dynstr";
9081 goto get_vma_if_bpabi;
9082 case DT_SYMTAB:
9083 name = ".dynsym";
9084 goto get_vma_if_bpabi;
c0042f5d
MM
9085 case DT_VERSYM:
9086 name = ".gnu.version";
9087 goto get_vma_if_bpabi;
9088 case DT_VERDEF:
9089 name = ".gnu.version_d";
9090 goto get_vma_if_bpabi;
9091 case DT_VERNEED:
9092 name = ".gnu.version_r";
9093 goto get_vma_if_bpabi;
9094
252b5132
RH
9095 case DT_PLTGOT:
9096 name = ".got";
9097 goto get_vma;
9098 case DT_JMPREL:
00a97672 9099 name = RELOC_SECTION (htab, ".plt");
252b5132
RH
9100 get_vma:
9101 s = bfd_get_section_by_name (output_bfd, name);
9102 BFD_ASSERT (s != NULL);
229fcec5
MM
9103 if (!htab->symbian_p)
9104 dyn.d_un.d_ptr = s->vma;
9105 else
9106 /* In the BPABI, tags in the PT_DYNAMIC section point
9107 at the file offset, not the memory address, for the
9108 convenience of the post linker. */
9109 dyn.d_un.d_ptr = s->filepos;
252b5132
RH
9110 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9111 break;
9112
229fcec5
MM
9113 get_vma_if_bpabi:
9114 if (htab->symbian_p)
9115 goto get_vma;
9116 break;
9117
252b5132 9118 case DT_PLTRELSZ:
00a97672
RS
9119 s = bfd_get_section_by_name (output_bfd,
9120 RELOC_SECTION (htab, ".plt"));
252b5132 9121 BFD_ASSERT (s != NULL);
eea6121a 9122 dyn.d_un.d_val = s->size;
252b5132
RH
9123 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9124 break;
229fcec5 9125
252b5132 9126 case DT_RELSZ:
00a97672 9127 case DT_RELASZ:
229fcec5
MM
9128 if (!htab->symbian_p)
9129 {
9130 /* My reading of the SVR4 ABI indicates that the
9131 procedure linkage table relocs (DT_JMPREL) should be
9132 included in the overall relocs (DT_REL). This is
9133 what Solaris does. However, UnixWare can not handle
9134 that case. Therefore, we override the DT_RELSZ entry
9135 here to make it not include the JMPREL relocs. Since
00a97672 9136 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM
9137 other relocation sections, we don't have to worry
9138 about changing the DT_REL entry. */
00a97672
RS
9139 s = bfd_get_section_by_name (output_bfd,
9140 RELOC_SECTION (htab, ".plt"));
229fcec5
MM
9141 if (s != NULL)
9142 dyn.d_un.d_val -= s->size;
9143 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9144 break;
9145 }
9146 /* Fall through */
9147
9148 case DT_REL:
9149 case DT_RELA:
229fcec5
MM
9150 /* In the BPABI, the DT_REL tag must point at the file
9151 offset, not the VMA, of the first relocation
9152 section. So, we use code similar to that in
9153 elflink.c, but do not check for SHF_ALLOC on the
9154 relcoation section, since relocations sections are
9155 never allocated under the BPABI. The comments above
9156 about Unixware notwithstanding, we include all of the
9157 relocations here. */
9158 if (htab->symbian_p)
9159 {
9160 unsigned int i;
9161 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9162 ? SHT_REL : SHT_RELA);
9163 dyn.d_un.d_val = 0;
9164 for (i = 1; i < elf_numsections (output_bfd); i++)
9165 {
9166 Elf_Internal_Shdr *hdr
9167 = elf_elfsections (output_bfd)[i];
9168 if (hdr->sh_type == type)
9169 {
9170 if (dyn.d_tag == DT_RELSZ
9171 || dyn.d_tag == DT_RELASZ)
9172 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM
9173 else if ((ufile_ptr) hdr->sh_offset
9174 <= dyn.d_un.d_val - 1)
229fcec5
MM
9175 dyn.d_un.d_val = hdr->sh_offset;
9176 }
9177 }
9178 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9179 }
252b5132 9180 break;
88f7bcd5
NC
9181
9182 /* Set the bottom bit of DT_INIT/FINI if the
9183 corresponding function is Thumb. */
9184 case DT_INIT:
9185 name = info->init_function;
9186 goto get_sym;
9187 case DT_FINI:
9188 name = info->fini_function;
9189 get_sym:
9190 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9191 then there is nothing to adjust. */
88f7bcd5
NC
9192 if (dyn.d_un.d_val != 0)
9193 {
9194 struct elf_link_hash_entry * eh;
9195
9196 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9197 FALSE, FALSE, TRUE);
88f7bcd5
NC
9198 if (eh != (struct elf_link_hash_entry *) NULL
9199 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9200 {
9201 dyn.d_un.d_val |= 1;
b34976b6 9202 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC
9203 }
9204 }
9205 break;
252b5132
RH
9206 }
9207 }
9208
24a1ba0f 9209 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9210 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9211 {
00a97672
RS
9212 const bfd_vma *plt0_entry;
9213 bfd_vma got_address, plt_address, got_displacement;
9214
9215 /* Calculate the addresses of the GOT and PLT. */
9216 got_address = sgot->output_section->vma + sgot->output_offset;
9217 plt_address = splt->output_section->vma + splt->output_offset;
9218
9219 if (htab->vxworks_p)
9220 {
9221 /* The VxWorks GOT is relocated by the dynamic linker.
9222 Therefore, we must emit relocations rather than simply
9223 computing the values now. */
9224 Elf_Internal_Rela rel;
9225
9226 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB
9227 put_arm_insn (htab, output_bfd, plt0_entry[0],
9228 splt->contents + 0);
9229 put_arm_insn (htab, output_bfd, plt0_entry[1],
9230 splt->contents + 4);
9231 put_arm_insn (htab, output_bfd, plt0_entry[2],
9232 splt->contents + 8);
00a97672
RS
9233 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9234
9235 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9236 rel.r_offset = plt_address + 12;
9237 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9238 rel.r_addend = 0;
9239 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9240 htab->srelplt2->contents);
9241 }
9242 else
9243 {
9244 got_displacement = got_address - (plt_address + 16);
9245
9246 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB
9247 put_arm_insn (htab, output_bfd, plt0_entry[0],
9248 splt->contents + 0);
9249 put_arm_insn (htab, output_bfd, plt0_entry[1],
9250 splt->contents + 4);
9251 put_arm_insn (htab, output_bfd, plt0_entry[2],
9252 splt->contents + 8);
9253 put_arm_insn (htab, output_bfd, plt0_entry[3],
9254 splt->contents + 12);
5e681ec4 9255
5e681ec4 9256#ifdef FOUR_WORD_PLT
00a97672
RS
9257 /* The displacement value goes in the otherwise-unused
9258 last word of the second entry. */
9259 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9260#else
00a97672 9261 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9262#endif
00a97672 9263 }
f7a74f8c 9264 }
252b5132
RH
9265
9266 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9267 really seem like the right value. */
74541ad4
AM
9268 if (splt->output_section->owner == output_bfd)
9269 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS
9270
9271 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9272 {
9273 /* Correct the .rel(a).plt.unloaded relocations. They will have
9274 incorrect symbol indexes. */
9275 int num_plts;
eed62c48 9276 unsigned char *p;
00a97672
RS
9277
9278 num_plts = ((htab->splt->size - htab->plt_header_size)
9279 / htab->plt_entry_size);
9280 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9281
9282 for (; num_plts; num_plts--)
9283 {
9284 Elf_Internal_Rela rel;
9285
9286 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9287 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9288 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9289 p += RELOC_SIZE (htab);
9290
9291 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9292 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9293 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9294 p += RELOC_SIZE (htab);
9295 }
9296 }
252b5132
RH
9297 }
9298
9299 /* Fill in the first three entries in the global offset table. */
229fcec5 9300 if (sgot)
252b5132 9301 {
229fcec5
MM
9302 if (sgot->size > 0)
9303 {
9304 if (sdyn == NULL)
9305 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9306 else
9307 bfd_put_32 (output_bfd,
9308 sdyn->output_section->vma + sdyn->output_offset,
9309 sgot->contents);
9310 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9311 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9312 }
252b5132 9313
229fcec5
MM
9314 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9315 }
252b5132 9316
b34976b6 9317 return TRUE;
252b5132
RH
9318}
9319
ba96a88f 9320static void
57e8b36a 9321elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9322{
9b485d32 9323 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9324 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC
9325
9326 i_ehdrp = elf_elfheader (abfd);
9327
94a3258f
PB
9328 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9329 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9330 else
9331 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9332 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9333
93204d3a
PB
9334 if (link_info)
9335 {
9336 globals = elf32_arm_hash_table (link_info);
9337 if (globals->byteswap_code)
9338 i_ehdrp->e_flags |= EF_ARM_BE8;
9339 }
ba96a88f
NC
9340}
9341
99e4ae17 9342static enum elf_reloc_type_class
57e8b36a 9343elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9344{
f51e552e 9345 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ
9346 {
9347 case R_ARM_RELATIVE:
9348 return reloc_class_relative;
9349 case R_ARM_JUMP_SLOT:
9350 return reloc_class_plt;
9351 case R_ARM_COPY:
9352 return reloc_class_copy;
9353 default:
9354 return reloc_class_normal;
9355 }
9356}
9357
e16bb312
NC
9358/* Set the right machine number for an Arm ELF file. */
9359
9360static bfd_boolean
57e8b36a 9361elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC
9362{
9363 if (hdr->sh_type == SHT_NOTE)
9364 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9365
9366 return TRUE;
9367}
9368
e489d0ae 9369static void
57e8b36a 9370elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9371{
5a6c6817 9372 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC
9373}
9374
40a18ebd
NC
9375/* Return TRUE if this is an unwinding table entry. */
9376
9377static bfd_boolean
9378is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9379{
0112cd26
NC
9380 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9381 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC
9382}
9383
9384
9385/* Set the type and flags for an ARM section. We do this by
9386 the section name, which is a hack, but ought to work. */
9387
9388static bfd_boolean
9389elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9390{
9391 const char * name;
9392
9393 name = bfd_get_section_name (abfd, sec);
9394
9395 if (is_arm_elf_unwind_section_name (abfd, name))
9396 {
9397 hdr->sh_type = SHT_ARM_EXIDX;
9398 hdr->sh_flags |= SHF_LINK_ORDER;
9399 }
9400 return TRUE;
9401}
9402
6dc132d9
L
9403/* Handle an ARM specific section when reading an object file. This is
9404 called when bfd_section_from_shdr finds a section with an unknown
9405 type. */
40a18ebd
NC
9406
9407static bfd_boolean
9408elf32_arm_section_from_shdr (bfd *abfd,
9409 Elf_Internal_Shdr * hdr,
6dc132d9
L
9410 const char *name,
9411 int shindex)
40a18ebd
NC
9412{
9413 /* There ought to be a place to keep ELF backend specific flags, but
9414 at the moment there isn't one. We just keep track of the
9415 sections by their name, instead. Fortunately, the ABI gives
9416 names for all the ARM specific sections, so we will probably get
9417 away with this. */
9418 switch (hdr->sh_type)
9419 {
9420 case SHT_ARM_EXIDX:
0951f019
RE
9421 case SHT_ARM_PREEMPTMAP:
9422 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC
9423 break;
9424
9425 default:
9426 return FALSE;
9427 }
9428
6dc132d9 9429 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC
9430 return FALSE;
9431
9432 return TRUE;
9433}
e489d0ae 9434
8e3de13a
NC
9435/* A structure used to record a list of sections, independently
9436 of the next and prev fields in the asection structure. */
9437typedef struct section_list
9438{
9439 asection * sec;
9440 struct section_list * next;
9441 struct section_list * prev;
9442}
9443section_list;
9444
9445/* Unfortunately we need to keep a list of sections for which
9446 an _arm_elf_section_data structure has been allocated. This
9447 is because it is possible for functions like elf32_arm_write_section
9448 to be called on a section which has had an elf_data_structure
9449 allocated for it (and so the used_by_bfd field is valid) but
9450 for which the ARM extended version of this structure - the
9451 _arm_elf_section_data structure - has not been allocated. */
9452static section_list * sections_with_arm_elf_section_data = NULL;
9453
9454static void
957c6e41 9455record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC
9456{
9457 struct section_list * entry;
9458
957c6e41 9459 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC
9460 if (entry == NULL)
9461 return;
9462 entry->sec = sec;
9463 entry->next = sections_with_arm_elf_section_data;
9464 entry->prev = NULL;
9465 if (entry->next != NULL)
9466 entry->next->prev = entry;
9467 sections_with_arm_elf_section_data = entry;
9468}
9469
44444f50
NC
9470static struct section_list *
9471find_arm_elf_section_entry (asection * sec)
8e3de13a
NC
9472{
9473 struct section_list * entry;
bd4aae00 9474 static struct section_list * last_entry = NULL;
8e3de13a 9475
bd4aae00
NC
9476 /* This is a short cut for the typical case where the sections are added
9477 to the sections_with_arm_elf_section_data list in forward order and
9478 then looked up here in backwards order. This makes a real difference
9479 to the ld-srec/sec64k.exp linker test. */
44444f50 9480 entry = sections_with_arm_elf_section_data;
bd4aae00
NC
9481 if (last_entry != NULL)
9482 {
9483 if (last_entry->sec == sec)
44444f50
NC
9484 entry = last_entry;
9485 else if (last_entry->next != NULL
9486 && last_entry->next->sec == sec)
9487 entry = last_entry->next;
bd4aae00 9488 }
44444f50
NC
9489
9490 for (; entry; entry = entry->next)
8e3de13a 9491 if (entry->sec == sec)
44444f50 9492 break;
bd4aae00 9493
44444f50
NC
9494 if (entry)
9495 /* Record the entry prior to this one - it is the entry we are most
9496 likely to want to locate next time. Also this way if we have been
9497 called from unrecord_section_with_arm_elf_section_data() we will not
9498 be caching a pointer that is about to be freed. */
9499 last_entry = entry->prev;
9500
9501 return entry;
9502}
9503
9504static _arm_elf_section_data *
9505get_arm_elf_section_data (asection * sec)
9506{
9507 struct section_list * entry;
9508
9509 entry = find_arm_elf_section_entry (sec);
9510
9511 if (entry)
9512 return elf32_arm_section_data (entry->sec);
9513 else
9514 return NULL;
8e3de13a
NC
9515}
9516
9517static void
9518unrecord_section_with_arm_elf_section_data (asection * sec)
9519{
9520 struct section_list * entry;
9521
44444f50
NC
9522 entry = find_arm_elf_section_entry (sec);
9523
9524 if (entry)
9525 {
9526 if (entry->prev != NULL)
9527 entry->prev->next = entry->next;
9528 if (entry->next != NULL)
9529 entry->next->prev = entry->prev;
9530 if (entry == sections_with_arm_elf_section_data)
9531 sections_with_arm_elf_section_data = entry->next;
9532 free (entry);
9533 }
8e3de13a
NC
9534}
9535
e489d0ae 9536
4e617b1e
PB
9537typedef struct
9538{
9539 void *finfo;
9540 struct bfd_link_info *info;
91a5743d
PB
9541 asection *sec;
9542 int sec_shndx;
4e617b1e
PB
9543 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9544 asection *, struct elf_link_hash_entry *);
9545} output_arch_syminfo;
9546
9547enum map_symbol_type
9548{
9549 ARM_MAP_ARM,
9550 ARM_MAP_THUMB,
9551 ARM_MAP_DATA
9552};
9553
9554
9555/* Output a single PLT mapping symbol. */
9556
9557static bfd_boolean
9558elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9559 enum map_symbol_type type,
9560 bfd_vma offset)
9561{
9562 static const char *names[3] = {"$a", "$t", "$d"};
9563 struct elf32_arm_link_hash_table *htab;
9564 Elf_Internal_Sym sym;
9565
9566 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB
9567 sym.st_value = osi->sec->output_section->vma
9568 + osi->sec->output_offset
9569 + offset;
4e617b1e
PB
9570 sym.st_size = 0;
9571 sym.st_other = 0;
9572 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB
9573 sym.st_shndx = osi->sec_shndx;
9574 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB
9575 return FALSE;
9576 return TRUE;
9577}
9578
9579
9580/* Output mapping symbols for PLT entries associated with H. */
9581
9582static bfd_boolean
9583elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9584{
9585 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9586 struct elf32_arm_link_hash_table *htab;
9587 struct elf32_arm_link_hash_entry *eh;
9588 bfd_vma addr;
9589
9590 htab = elf32_arm_hash_table (osi->info);
9591
9592 if (h->root.type == bfd_link_hash_indirect)
9593 return TRUE;
9594
9595 if (h->root.type == bfd_link_hash_warning)
9596 /* When warning symbols are created, they **replace** the "real"
9597 entry in the hash table, thus we never get to see the real
9598 symbol in a hash traversal. So look at it now. */
9599 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9600
9601 if (h->plt.offset == (bfd_vma) -1)
9602 return TRUE;
9603
9604 eh = (struct elf32_arm_link_hash_entry *) h;
9605 addr = h->plt.offset;
9606 if (htab->symbian_p)
9607 {
9608 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9609 return FALSE;
9610 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9611 return FALSE;
9612 }
9613 else if (htab->vxworks_p)
9614 {
9615 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9616 return FALSE;
9617 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9618 return FALSE;
9619 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9620 return FALSE;
9621 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9622 return FALSE;
9623 }
9624 else
9625 {
bd97cb95
DJ
9626 bfd_signed_vma thumb_refs;
9627
9628 thumb_refs = eh->plt_thumb_refcount;
9629 if (!htab->use_blx)
9630 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 9631
bd97cb95 9632 if (thumb_refs > 0)
4e617b1e
PB
9633 {
9634 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9635 return FALSE;
9636 }
9637#ifdef FOUR_WORD_PLT
9638 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9639 return FALSE;
9640 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9641 return FALSE;
9642#else
9643 /* A three-word PLT with no Thumb thunk contains only Arm code,
9644 so only need to output a mapping symbol for the first PLT entry and
9645 entries with thumb thunks. */
bd97cb95 9646 if (thumb_refs > 0 || addr == 20)
4e617b1e
PB
9647 {
9648 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9649 return FALSE;
9650 }
9651#endif
9652 }
9653
9654 return TRUE;
9655}
9656
9657
91a5743d 9658/* Output mapping symbols for linker generated sections. */
4e617b1e
PB
9659
9660static bfd_boolean
9661elf32_arm_output_arch_local_syms (bfd *output_bfd,
9662 struct bfd_link_info *info,
9663 void *finfo, bfd_boolean (*func) (void *, const char *,
9664 Elf_Internal_Sym *,
9665 asection *,
9666 struct elf_link_hash_entry *))
9667{
9668 output_arch_syminfo osi;
9669 struct elf32_arm_link_hash_table *htab;
91a5743d
PB
9670 bfd_vma offset;
9671 bfd_size_type size;
4e617b1e
PB
9672
9673 htab = elf32_arm_hash_table (info);
4e617b1e 9674 check_use_blx(htab);
91a5743d 9675
4e617b1e
PB
9676 osi.finfo = finfo;
9677 osi.info = info;
9678 osi.func = func;
91a5743d
PB
9679
9680 /* ARM->Thumb glue. */
9681 if (htab->arm_glue_size > 0)
9682 {
9683 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9684 ARM2THUMB_GLUE_SECTION_NAME);
9685
9686 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9687 (output_bfd, osi.sec->output_section);
9688 if (info->shared || htab->root.is_relocatable_executable
9689 || htab->pic_veneer)
9690 size = ARM2THUMB_PIC_GLUE_SIZE;
9691 else if (htab->use_blx)
9692 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9693 else
9694 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9695
91a5743d
PB
9696 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9697 {
9698 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9699 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9700 }
9701 }
9702
9703 /* Thumb->ARM glue. */
9704 if (htab->thumb_glue_size > 0)
9705 {
9706 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9707 THUMB2ARM_GLUE_SECTION_NAME);
9708
9709 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9710 (output_bfd, osi.sec->output_section);
9711 size = THUMB2ARM_GLUE_SIZE;
9712
9713 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9714 {
9715 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9716 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9717 }
9718 }
9719
9720 /* Finally, output mapping symbols for the PLT. */
9721 if (!htab->splt || htab->splt->size == 0)
9722 return TRUE;
9723
9724 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9725 htab->splt->output_section);
9726 osi.sec = htab->splt;
4e617b1e
PB
9727 /* Output mapping symbols for the plt header. SymbianOS does not have a
9728 plt header. */
9729 if (htab->vxworks_p)
9730 {
9731 /* VxWorks shared libraries have no PLT header. */
9732 if (!info->shared)
9733 {
9734 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9735 return FALSE;
9736 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9737 return FALSE;
9738 }
9739 }
9740 else if (!htab->symbian_p)
9741 {
9742 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9743 return FALSE;
9744#ifndef FOUR_WORD_PLT
9745 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9746 return FALSE;
9747#endif
9748 }
9749
9750 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
9751 return TRUE;
9752}
9753
e489d0ae
PB
9754/* Allocate target specific section data. */
9755
9756static bfd_boolean
9757elf32_arm_new_section_hook (bfd *abfd, asection *sec)
9758{
f592407e
AM
9759 if (!sec->used_by_bfd)
9760 {
9761 _arm_elf_section_data *sdata;
9762 bfd_size_type amt = sizeof (*sdata);
e489d0ae 9763
f592407e
AM
9764 sdata = bfd_zalloc (abfd, amt);
9765 if (sdata == NULL)
9766 return FALSE;
9767 sec->used_by_bfd = sdata;
9768 }
e489d0ae 9769
957c6e41 9770 record_section_with_arm_elf_section_data (sec);
8e3de13a 9771
e489d0ae
PB
9772 return _bfd_elf_new_section_hook (abfd, sec);
9773}
9774
9775
9776/* Used to order a list of mapping symbols by address. */
9777
9778static int
9779elf32_arm_compare_mapping (const void * a, const void * b)
9780{
7f6a71ff
JM
9781 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
9782 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
9783
9784 if (amap->vma > bmap->vma)
9785 return 1;
9786 else if (amap->vma < bmap->vma)
9787 return -1;
9788 else if (amap->type > bmap->type)
9789 /* Ensure results do not depend on the host qsort for objects with
9790 multiple mapping symbols at the same address by sorting on type
9791 after vma. */
9792 return 1;
9793 else if (amap->type < bmap->type)
9794 return -1;
9795 else
9796 return 0;
e489d0ae
PB
9797}
9798
9799
9800/* Do code byteswapping. Return FALSE afterwards so that the section is
9801 written out as normal. */
9802
9803static bfd_boolean
c7b8f16e
JB
9804elf32_arm_write_section (bfd *output_bfd,
9805 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB
9806 bfd_byte *contents)
9807{
c7b8f16e 9808 int mapcount, errcount;
8e3de13a 9809 _arm_elf_section_data *arm_data;
c7b8f16e 9810 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 9811 elf32_arm_section_map *map;
c7b8f16e 9812 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB
9813 bfd_vma ptr;
9814 bfd_vma end;
c7b8f16e 9815 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB
9816 bfd_byte tmp;
9817 int i;
57e8b36a 9818
8e3de13a
NC
9819 /* If this section has not been allocated an _arm_elf_section_data
9820 structure then we cannot record anything. */
9821 arm_data = get_arm_elf_section_data (sec);
9822 if (arm_data == NULL)
9823 return FALSE;
9824
9825 mapcount = arm_data->mapcount;
9826 map = arm_data->map;
c7b8f16e
JB
9827 errcount = arm_data->erratumcount;
9828
9829 if (errcount != 0)
9830 {
9831 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
9832
9833 for (errnode = arm_data->erratumlist; errnode != 0;
9834 errnode = errnode->next)
9835 {
9836 bfd_vma index = errnode->vma - offset;
9837
9838 switch (errnode->type)
9839 {
9840 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
9841 {
9842 bfd_vma branch_to_veneer;
9843 /* Original condition code of instruction, plus bit mask for
9844 ARM B instruction. */
9845 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
9846 | 0x0a000000;
9847
9848 /* The instruction is before the label. */
9849 index -= 4;
9850
9851 /* Above offset included in -4 below. */
9852 branch_to_veneer = errnode->u.b.veneer->vma
9853 - errnode->vma - 4;
9854
9855 if ((signed) branch_to_veneer < -(1 << 25)
9856 || (signed) branch_to_veneer >= (1 << 25))
9857 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9858 "range"), output_bfd);
9859
9860 insn |= (branch_to_veneer >> 2) & 0xffffff;
9861 contents[endianflip ^ index] = insn & 0xff;
9862 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9863 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9864 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9865 }
9866 break;
9867
9868 case VFP11_ERRATUM_ARM_VENEER:
9869 {
9870 bfd_vma branch_from_veneer;
9871 unsigned int insn;
9872
9873 /* Take size of veneer into account. */
9874 branch_from_veneer = errnode->u.v.branch->vma
9875 - errnode->vma - 12;
9876
9877 if ((signed) branch_from_veneer < -(1 << 25)
9878 || (signed) branch_from_veneer >= (1 << 25))
9879 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
9880 "range"), output_bfd);
9881
9882 /* Original instruction. */
9883 insn = errnode->u.v.branch->u.b.vfp_insn;
9884 contents[endianflip ^ index] = insn & 0xff;
9885 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
9886 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
9887 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
9888
9889 /* Branch back to insn after original insn. */
9890 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
9891 contents[endianflip ^ (index + 4)] = insn & 0xff;
9892 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
9893 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
9894 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
9895 }
9896 break;
9897
9898 default:
9899 abort ();
9900 }
9901 }
9902 }
e489d0ae
PB
9903
9904 if (mapcount == 0)
9905 return FALSE;
9906
c7b8f16e 9907 if (globals->byteswap_code)
e489d0ae 9908 {
c7b8f16e 9909 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 9910
c7b8f16e
JB
9911 ptr = map[0].vma;
9912 for (i = 0; i < mapcount; i++)
9913 {
9914 if (i == mapcount - 1)
9915 end = sec->size;
9916 else
9917 end = map[i + 1].vma;
e489d0ae 9918
c7b8f16e 9919 switch (map[i].type)
e489d0ae 9920 {
c7b8f16e
JB
9921 case 'a':
9922 /* Byte swap code words. */
9923 while (ptr + 3 < end)
9924 {
9925 tmp = contents[ptr];
9926 contents[ptr] = contents[ptr + 3];
9927 contents[ptr + 3] = tmp;
9928 tmp = contents[ptr + 1];
9929 contents[ptr + 1] = contents[ptr + 2];
9930 contents[ptr + 2] = tmp;
9931 ptr += 4;
9932 }
9933 break;
e489d0ae 9934
c7b8f16e
JB
9935 case 't':
9936 /* Byte swap code halfwords. */
9937 while (ptr + 1 < end)
9938 {
9939 tmp = contents[ptr];
9940 contents[ptr] = contents[ptr + 1];
9941 contents[ptr + 1] = tmp;
9942 ptr += 2;
9943 }
9944 break;
9945
9946 case 'd':
9947 /* Leave data alone. */
9948 break;
9949 }
9950 ptr = end;
9951 }
e489d0ae 9952 }
8e3de13a 9953
93204d3a 9954 free (map);
8e3de13a 9955 arm_data->mapcount = 0;
c7b8f16e 9956 arm_data->mapsize = 0;
8e3de13a
NC
9957 arm_data->map = NULL;
9958 unrecord_section_with_arm_elf_section_data (sec);
9959
e489d0ae
PB
9960 return FALSE;
9961}
9962
957c6e41
NC
9963static void
9964unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
9965 asection * sec,
9966 void * ignore ATTRIBUTE_UNUSED)
9967{
9968 unrecord_section_with_arm_elf_section_data (sec);
9969}
9970
9971static bfd_boolean
9972elf32_arm_close_and_cleanup (bfd * abfd)
9973{
b25e3d87
L
9974 if (abfd->sections)
9975 bfd_map_over_sections (abfd,
9976 unrecord_section_via_map_over_sections,
9977 NULL);
957c6e41
NC
9978
9979 return _bfd_elf_close_and_cleanup (abfd);
9980}
9981
b25e3d87
L
9982static bfd_boolean
9983elf32_arm_bfd_free_cached_info (bfd * abfd)
9984{
9985 if (abfd->sections)
9986 bfd_map_over_sections (abfd,
9987 unrecord_section_via_map_over_sections,
9988 NULL);
9989
9990 return _bfd_free_cached_info (abfd);
9991}
9992
b7693d02
DJ
9993/* Display STT_ARM_TFUNC symbols as functions. */
9994
9995static void
9996elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
9997 asymbol *asym)
9998{
9999 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
10000
10001 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
10002 elfsym->symbol.flags |= BSF_FUNCTION;
10003}
10004
0beaef2b
PB
10005
10006/* Mangle thumb function symbols as we read them in. */
10007
8384fb8f 10008static bfd_boolean
0beaef2b
PB
10009elf32_arm_swap_symbol_in (bfd * abfd,
10010 const void *psrc,
10011 const void *pshn,
10012 Elf_Internal_Sym *dst)
10013{
8384fb8f
AM
10014 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
10015 return FALSE;
0beaef2b
PB
10016
10017 /* New EABI objects mark thumb function symbols by setting the low bit of
10018 the address. Turn these into STT_ARM_TFUNC. */
10019 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10020 && (dst->st_value & 1))
10021 {
10022 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10023 dst->st_value &= ~(bfd_vma) 1;
10024 }
8384fb8f 10025 return TRUE;
0beaef2b
PB
10026}
10027
10028
10029/* Mangle thumb function symbols as we write them out. */
10030
10031static void
10032elf32_arm_swap_symbol_out (bfd *abfd,
10033 const Elf_Internal_Sym *src,
10034 void *cdst,
10035 void *shndx)
10036{
10037 Elf_Internal_Sym newsym;
10038
10039 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10040 of the address set, as per the new EABI. We do this unconditionally
10041 because objcopy does not set the elf header flags until after
10042 it writes out the symbol table. */
10043 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10044 {
10045 newsym = *src;
10046 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB
10047 if (newsym.st_shndx != SHN_UNDEF)
10048 {
10049 /* Do this only for defined symbols. At link type, the static
10050 linker will simulate the work of dynamic linker of resolving
10051 symbols and will carry over the thumbness of found symbols to
10052 the output symbol table. It's not clear how it happens, but
b0fead2b 10053 the thumbness of undefined symbols can well be different at
0fa3dcad
PB
10054 runtime, and writing '1' for them will be confusing for users
10055 and possibly for dynamic linker itself.
10056 */
10057 newsym.st_value |= 1;
10058 }
0beaef2b
PB
10059
10060 src = &newsym;
10061 }
10062 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10063}
10064
b294bdf8
MM
10065/* Add the PT_ARM_EXIDX program header. */
10066
10067static bfd_boolean
10068elf32_arm_modify_segment_map (bfd *abfd,
10069 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10070{
10071 struct elf_segment_map *m;
10072 asection *sec;
10073
10074 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10075 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10076 {
10077 /* If there is already a PT_ARM_EXIDX header, then we do not
10078 want to add another one. This situation arises when running
10079 "strip"; the input binary already has the header. */
10080 m = elf_tdata (abfd)->segment_map;
10081 while (m && m->p_type != PT_ARM_EXIDX)
10082 m = m->next;
10083 if (!m)
10084 {
10085 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10086 if (m == NULL)
10087 return FALSE;
10088 m->p_type = PT_ARM_EXIDX;
10089 m->count = 1;
10090 m->sections[0] = sec;
10091
10092 m->next = elf_tdata (abfd)->segment_map;
10093 elf_tdata (abfd)->segment_map = m;
10094 }
10095 }
10096
10097 return TRUE;
10098}
10099
10100/* We may add a PT_ARM_EXIDX program header. */
10101
10102static int
a6b96beb
AM
10103elf32_arm_additional_program_headers (bfd *abfd,
10104 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM
10105{
10106 asection *sec;
10107
10108 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10109 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10110 return 1;
10111 else
10112 return 0;
10113}
10114
fcb93ecf
PB
10115/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10116static bfd_boolean
10117elf32_arm_is_function_type (unsigned int type)
10118{
10119 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10120}
10121
0beaef2b
PB
10122/* We use this to override swap_symbol_in and swap_symbol_out. */
10123const struct elf_size_info elf32_arm_size_info = {
10124 sizeof (Elf32_External_Ehdr),
10125 sizeof (Elf32_External_Phdr),
10126 sizeof (Elf32_External_Shdr),
10127 sizeof (Elf32_External_Rel),
10128 sizeof (Elf32_External_Rela),
10129 sizeof (Elf32_External_Sym),
10130 sizeof (Elf32_External_Dyn),
10131 sizeof (Elf_External_Note),
10132 4,
10133 1,
10134 32, 2,
10135 ELFCLASS32, EV_CURRENT,
10136 bfd_elf32_write_out_phdrs,
10137 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 10138 bfd_elf32_checksum_contents,
0beaef2b
PB
10139 bfd_elf32_write_relocs,
10140 elf32_arm_swap_symbol_in,
10141 elf32_arm_swap_symbol_out,
10142 bfd_elf32_slurp_reloc_table,
10143 bfd_elf32_slurp_symbol_table,
10144 bfd_elf32_swap_dyn_in,
10145 bfd_elf32_swap_dyn_out,
10146 bfd_elf32_swap_reloc_in,
10147 bfd_elf32_swap_reloc_out,
10148 bfd_elf32_swap_reloca_in,
10149 bfd_elf32_swap_reloca_out
10150};
10151
252b5132
RH
10152#define ELF_ARCH bfd_arch_arm
10153#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC
10154#ifdef __QNXTARGET__
10155#define ELF_MAXPAGESIZE 0x1000
10156#else
f21f3fe0 10157#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10158#endif
b1342370 10159#define ELF_MINPAGESIZE 0x1000
24718e3b 10160#define ELF_COMMONPAGESIZE 0x1000
252b5132 10161
ba93b8ac
DJ
10162#define bfd_elf32_mkobject elf32_arm_mkobject
10163
99e4ae17
AJ
10164#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10165#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH
10166#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10167#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10168#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10169#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10170#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10171#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10172#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10173#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10174#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10175#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10176#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH
10177
10178#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10179#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10180#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH
10181#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10182#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10183#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10184#define elf_backend_write_section elf32_arm_write_section
252b5132 10185#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10186#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH
10187#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10188#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10189#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10190#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10191#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10192#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10193#define elf_backend_object_p elf32_arm_object_p
e16bb312 10194#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC
10195#define elf_backend_fake_sections elf32_arm_fake_sections
10196#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10197#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10198#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10199#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10200#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM
10201#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10202#define elf_backend_additional_program_headers \
10203 elf32_arm_additional_program_headers
4e617b1e
PB
10204#define elf_backend_output_arch_local_syms \
10205 elf32_arm_output_arch_local_syms
a4fd1a8e
PB
10206#define elf_backend_begin_write_processing \
10207 elf32_arm_begin_write_processing
fcb93ecf 10208#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10209
5e681ec4 10210#define elf_backend_can_refcount 1
252b5132
RH
10211#define elf_backend_can_gc_sections 1
10212#define elf_backend_plt_readonly 1
10213#define elf_backend_want_got_plt 1
10214#define elf_backend_want_plt_sym 0
4e7fd91e
PB
10215#define elf_backend_may_use_rel_p 1
10216#define elf_backend_may_use_rela_p 0
10217#define elf_backend_default_use_rela_p 0
252b5132 10218
04f7c78d 10219#define elf_backend_got_header_size 12
04f7c78d 10220
104d59d1
JM
10221#undef elf_backend_obj_attrs_vendor
10222#define elf_backend_obj_attrs_vendor "aeabi"
10223#undef elf_backend_obj_attrs_section
10224#define elf_backend_obj_attrs_section ".ARM.attributes"
10225#undef elf_backend_obj_attrs_arg_type
10226#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10227#undef elf_backend_obj_attrs_section_type
10228#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10229
252b5132 10230#include "elf32-target.h"
7f266840 10231
4e7fd91e
PB
10232/* VxWorks Targets */
10233
10234#undef TARGET_LITTLE_SYM
10235#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10236#undef TARGET_LITTLE_NAME
10237#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10238#undef TARGET_BIG_SYM
10239#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10240#undef TARGET_BIG_NAME
10241#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10242
10243/* Like elf32_arm_link_hash_table_create -- but overrides
10244 appropriately for VxWorks. */
10245static struct bfd_link_hash_table *
10246elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10247{
10248 struct bfd_link_hash_table *ret;
10249
10250 ret = elf32_arm_link_hash_table_create (abfd);
10251 if (ret)
10252 {
10253 struct elf32_arm_link_hash_table *htab
00a97672 10254 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10255 htab->use_rel = 0;
00a97672 10256 htab->vxworks_p = 1;
4e7fd91e
PB
10257 }
10258 return ret;
10259}
10260
00a97672
RS
10261static void
10262elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10263{
10264 elf32_arm_final_write_processing (abfd, linker);
10265 elf_vxworks_final_write_processing (abfd, linker);
10266}
10267
4e7fd91e
PB
10268#undef elf32_bed
10269#define elf32_bed elf32_arm_vxworks_bed
10270
10271#undef bfd_elf32_bfd_link_hash_table_create
10272#define bfd_elf32_bfd_link_hash_table_create \
10273 elf32_arm_vxworks_link_hash_table_create
00a97672
RS
10274#undef elf_backend_add_symbol_hook
10275#define elf_backend_add_symbol_hook \
10276 elf_vxworks_add_symbol_hook
10277#undef elf_backend_final_write_processing
10278#define elf_backend_final_write_processing \
10279 elf32_arm_vxworks_final_write_processing
10280#undef elf_backend_emit_relocs
10281#define elf_backend_emit_relocs \
10282 elf_vxworks_emit_relocs
4e7fd91e
PB
10283
10284#undef elf_backend_may_use_rel_p
00a97672 10285#define elf_backend_may_use_rel_p 0
4e7fd91e 10286#undef elf_backend_may_use_rela_p
00a97672 10287#define elf_backend_may_use_rela_p 1
4e7fd91e 10288#undef elf_backend_default_use_rela_p
00a97672 10289#define elf_backend_default_use_rela_p 1
00a97672
RS
10290#undef elf_backend_want_plt_sym
10291#define elf_backend_want_plt_sym 1
10292#undef ELF_MAXPAGESIZE
10293#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB
10294
10295#include "elf32-target.h"
10296
10297
7f266840
DJ
10298/* Symbian OS Targets */
10299
10300#undef TARGET_LITTLE_SYM
10301#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10302#undef TARGET_LITTLE_NAME
10303#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10304#undef TARGET_BIG_SYM
10305#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10306#undef TARGET_BIG_NAME
10307#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10308
10309/* Like elf32_arm_link_hash_table_create -- but overrides
10310 appropriately for Symbian OS. */
10311static struct bfd_link_hash_table *
10312elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10313{
10314 struct bfd_link_hash_table *ret;
10315
10316 ret = elf32_arm_link_hash_table_create (abfd);
10317 if (ret)
10318 {
10319 struct elf32_arm_link_hash_table *htab
10320 = (struct elf32_arm_link_hash_table *)ret;
10321 /* There is no PLT header for Symbian OS. */
10322 htab->plt_header_size = 0;
10323 /* The PLT entries are each three instructions. */
10324 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10325 htab->symbian_p = 1;
33bfe774
JB
10326 /* Symbian uses armv5t or above, so use_blx is always true. */
10327 htab->use_blx = 1;
67687978 10328 htab->root.is_relocatable_executable = 1;
7f266840
DJ
10329 }
10330 return ret;
10331}
10332
b35d266b 10333static const struct bfd_elf_special_section
551b43fd 10334elf32_arm_symbian_special_sections[] =
7f266840 10335{
5cd3778d
MM
10336 /* In a BPABI executable, the dynamic linking sections do not go in
10337 the loadable read-only segment. The post-linker may wish to
10338 refer to these sections, but they are not part of the final
10339 program image. */
0112cd26
NC
10340 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10341 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10342 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10343 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10344 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM
10345 /* These sections do not need to be writable as the SymbianOS
10346 postlinker will arrange things so that no dynamic relocation is
10347 required. */
0112cd26
NC
10348 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10349 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10350 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10351 { NULL, 0, 0, 0, 0 }
7f266840
DJ
10352};
10353
c3c76620 10354static void
b34af79c 10355elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10356 struct bfd_link_info *link_info)
c3c76620
MM
10357{
10358 /* BPABI objects are never loaded directly by an OS kernel; they are
10359 processed by a postlinker first, into an OS-specific format. If
10360 the D_PAGED bit is set on the file, BFD will align segments on
10361 page boundaries, so that an OS can directly map the file. With
10362 BPABI objects, that just results in wasted space. In addition,
10363 because we clear the D_PAGED bit, map_sections_to_segments will
10364 recognize that the program headers should not be mapped into any
10365 loadable segment. */
10366 abfd->flags &= ~D_PAGED;
a4fd1a8e 10367 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10368}
7f266840
DJ
10369
10370static bfd_boolean
b34af79c 10371elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10372 struct bfd_link_info *info)
7f266840
DJ
10373{
10374 struct elf_segment_map *m;
10375 asection *dynsec;
10376
7f266840
DJ
10377 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10378 segment. However, because the .dynamic section is not marked
10379 with SEC_LOAD, the generic ELF code will not create such a
10380 segment. */
10381 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10382 if (dynsec)
10383 {
8ded5a0f
AM
10384 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10385 if (m->p_type == PT_DYNAMIC)
10386 break;
10387
10388 if (m == NULL)
10389 {
10390 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10391 m->next = elf_tdata (abfd)->segment_map;
10392 elf_tdata (abfd)->segment_map = m;
10393 }
7f266840
DJ
10394 }
10395
b294bdf8
MM
10396 /* Also call the generic arm routine. */
10397 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ
10398}
10399
10400#undef elf32_bed
10401#define elf32_bed elf32_arm_symbian_bed
10402
10403/* The dynamic sections are not allocated on SymbianOS; the postlinker
10404 will process them and then discard them. */
10405#undef ELF_DYNAMIC_SEC_FLAGS
10406#define ELF_DYNAMIC_SEC_FLAGS \
10407 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10408
10409#undef bfd_elf32_bfd_link_hash_table_create
10410#define bfd_elf32_bfd_link_hash_table_create \
10411 elf32_arm_symbian_link_hash_table_create
00a97672 10412#undef elf_backend_add_symbol_hook
7f266840 10413
29ef7005
L
10414#undef elf_backend_special_sections
10415#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10416
c3c76620
MM
10417#undef elf_backend_begin_write_processing
10418#define elf_backend_begin_write_processing \
10419 elf32_arm_symbian_begin_write_processing
00a97672
RS
10420#undef elf_backend_final_write_processing
10421#define elf_backend_final_write_processing \
10422 elf32_arm_final_write_processing
10423#undef elf_backend_emit_relocs
c3c76620 10424
7f266840
DJ
10425#undef elf_backend_modify_segment_map
10426#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10427
10428/* There is no .got section for BPABI objects, and hence no header. */
10429#undef elf_backend_got_header_size
10430#define elf_backend_got_header_size 0
10431
10432/* Similarly, there is no .got.plt section. */
10433#undef elf_backend_want_got_plt
10434#define elf_backend_want_got_plt 0
10435
4e7fd91e 10436#undef elf_backend_may_use_rel_p
00a97672 10437#define elf_backend_may_use_rel_p 1
4e7fd91e 10438#undef elf_backend_may_use_rela_p
00a97672 10439#define elf_backend_may_use_rela_p 0
4e7fd91e 10440#undef elf_backend_default_use_rela_p
00a97672 10441#define elf_backend_default_use_rela_p 0
00a97672
RS
10442#undef elf_backend_want_plt_sym
10443#define elf_backend_want_plt_sym 0
10444#undef ELF_MAXPAGESIZE
10445#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10446
7f266840 10447#include "elf32-target.h"
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