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"$ gdb PROGRAM" vs "(gdb) file PROGRAM" difference; warn on failure to remove breakpoint.
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
4b95cf5c 2 Copyright (C) 1998-2014 Free Software Foundation, Inc.
252b5132
RH		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
cd123cb7 8 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
cd123cb7
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
6e6718a3 21#include "sysdep.h"
2468f9c9
PB		 22#include <limits.h>
23
3db64b00 24#include "bfd.h"
6034aab8 25#include "bfd_stdint.h"
00a97672 26#include "libiberty.h"
7f266840
DJ		 27#include "libbfd.h"
28#include "elf-bfd.h"
b38cadfb 29#include "elf-nacl.h"
00a97672 30#include "elf-vxworks.h"
ee065d83 31#include "elf/arm.h"
7f266840 32
00a97672
RS		 33/* Return the relocation section associated with NAME. HTAB is the
34 bfd's elf32_arm_link_hash_entry. */
35#define RELOC_SECTION(HTAB, NAME) \
36 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
37
38/* Return size of a relocation entry. HTAB is the bfd's
39 elf32_arm_link_hash_entry. */
40#define RELOC_SIZE(HTAB) \
41 ((HTAB)->use_rel \
42 ? sizeof (Elf32_External_Rel) \
43 : sizeof (Elf32_External_Rela))
44
45/* Return function to swap relocations in. HTAB is the bfd's
46 elf32_arm_link_hash_entry. */
47#define SWAP_RELOC_IN(HTAB) \
48 ((HTAB)->use_rel \
49 ? bfd_elf32_swap_reloc_in \
50 : bfd_elf32_swap_reloca_in)
51
52/* Return function to swap relocations out. HTAB is the bfd's
53 elf32_arm_link_hash_entry. */
54#define SWAP_RELOC_OUT(HTAB) \
55 ((HTAB)->use_rel \
56 ? bfd_elf32_swap_reloc_out \
57 : bfd_elf32_swap_reloca_out)
58
7f266840
DJ		 59#define elf_info_to_howto 0
60#define elf_info_to_howto_rel elf32_arm_info_to_howto
61
62#define ARM_ELF_ABI_VERSION 0
63#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
64
79f08007
YZ		 65/* The Adjusted Place, as defined by AAELF. */
66#define Pa(X) ((X) & 0xfffffffc)
67
3e6b1042
DJ		 68static bfd_boolean elf32_arm_write_section (bfd *output_bfd,
69 struct bfd_link_info *link_info,
70 asection *sec,
71 bfd_byte *contents);
72
7f266840
DJ		 73/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
74 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
75 in that slot. */
76
c19d1205 77static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840 78{
8029a119 79 /* No relocation. */
7f266840
DJ		 80 HOWTO (R_ARM_NONE, /* type */
81 0, /* rightshift */
82 0, /* size (0 = byte, 1 = short, 2 = long) */
83 0, /* bitsize */
84 FALSE, /* pc_relative */
85 0, /* bitpos */
86 complain_overflow_dont,/* complain_on_overflow */
87 bfd_elf_generic_reloc, /* special_function */
88 "R_ARM_NONE", /* name */
89 FALSE, /* partial_inplace */
90 0, /* src_mask */
91 0, /* dst_mask */
92 FALSE), /* pcrel_offset */
93
94 HOWTO (R_ARM_PC24, /* type */
95 2, /* rightshift */
96 2, /* size (0 = byte, 1 = short, 2 = long) */
97 24, /* bitsize */
98 TRUE, /* pc_relative */
99 0, /* bitpos */
100 complain_overflow_signed,/* complain_on_overflow */
101 bfd_elf_generic_reloc, /* special_function */
102 "R_ARM_PC24", /* name */
103 FALSE, /* partial_inplace */
104 0x00ffffff, /* src_mask */
105 0x00ffffff, /* dst_mask */
106 TRUE), /* pcrel_offset */
107
108 /* 32 bit absolute */
109 HOWTO (R_ARM_ABS32, /* type */
110 0, /* rightshift */
111 2, /* size (0 = byte, 1 = short, 2 = long) */
112 32, /* bitsize */
113 FALSE, /* pc_relative */
114 0, /* bitpos */
115 complain_overflow_bitfield,/* complain_on_overflow */
116 bfd_elf_generic_reloc, /* special_function */
117 "R_ARM_ABS32", /* name */
118 FALSE, /* partial_inplace */
119 0xffffffff, /* src_mask */
120 0xffffffff, /* dst_mask */
121 FALSE), /* pcrel_offset */
122
123 /* standard 32bit pc-relative reloc */
124 HOWTO (R_ARM_REL32, /* type */
125 0, /* rightshift */
126 2, /* size (0 = byte, 1 = short, 2 = long) */
127 32, /* bitsize */
128 TRUE, /* pc_relative */
129 0, /* bitpos */
130 complain_overflow_bitfield,/* complain_on_overflow */
131 bfd_elf_generic_reloc, /* special_function */
132 "R_ARM_REL32", /* name */
133 FALSE, /* partial_inplace */
134 0xffffffff, /* src_mask */
135 0xffffffff, /* dst_mask */
136 TRUE), /* pcrel_offset */
137
c19d1205 138 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 139 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 140 0, /* rightshift */
141 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 142 32, /* bitsize */
143 TRUE, /* pc_relative */
7f266840 144 0, /* bitpos */
4962c51a 145 complain_overflow_dont,/* complain_on_overflow */
7f266840 146 bfd_elf_generic_reloc, /* special_function */
4962c51a 147 "R_ARM_LDR_PC_G0", /* name */
7f266840 148 FALSE, /* partial_inplace */
4962c51a
MS		 149 0xffffffff, /* src_mask */
150 0xffffffff, /* dst_mask */
151 TRUE), /* pcrel_offset */
7f266840
DJ		 152
153 /* 16 bit absolute */
154 HOWTO (R_ARM_ABS16, /* type */
155 0, /* rightshift */
156 1, /* size (0 = byte, 1 = short, 2 = long) */
157 16, /* bitsize */
158 FALSE, /* pc_relative */
159 0, /* bitpos */
160 complain_overflow_bitfield,/* complain_on_overflow */
161 bfd_elf_generic_reloc, /* special_function */
162 "R_ARM_ABS16", /* name */
163 FALSE, /* partial_inplace */
164 0x0000ffff, /* src_mask */
165 0x0000ffff, /* dst_mask */
166 FALSE), /* pcrel_offset */
167
168 /* 12 bit absolute */
169 HOWTO (R_ARM_ABS12, /* type */
170 0, /* rightshift */
171 2, /* size (0 = byte, 1 = short, 2 = long) */
172 12, /* bitsize */
173 FALSE, /* pc_relative */
174 0, /* bitpos */
175 complain_overflow_bitfield,/* complain_on_overflow */
176 bfd_elf_generic_reloc, /* special_function */
177 "R_ARM_ABS12", /* name */
178 FALSE, /* partial_inplace */
00a97672
RS		 179 0x00000fff, /* src_mask */
180 0x00000fff, /* dst_mask */
7f266840
DJ		 181 FALSE), /* pcrel_offset */
182
183 HOWTO (R_ARM_THM_ABS5, /* type */
184 6, /* rightshift */
185 1, /* size (0 = byte, 1 = short, 2 = long) */
186 5, /* bitsize */
187 FALSE, /* pc_relative */
188 0, /* bitpos */
189 complain_overflow_bitfield,/* complain_on_overflow */
190 bfd_elf_generic_reloc, /* special_function */
191 "R_ARM_THM_ABS5", /* name */
192 FALSE, /* partial_inplace */
193 0x000007e0, /* src_mask */
194 0x000007e0, /* dst_mask */
195 FALSE), /* pcrel_offset */
196
197 /* 8 bit absolute */
198 HOWTO (R_ARM_ABS8, /* type */
199 0, /* rightshift */
200 0, /* size (0 = byte, 1 = short, 2 = long) */
201 8, /* bitsize */
202 FALSE, /* pc_relative */
203 0, /* bitpos */
204 complain_overflow_bitfield,/* complain_on_overflow */
205 bfd_elf_generic_reloc, /* special_function */
206 "R_ARM_ABS8", /* name */
207 FALSE, /* partial_inplace */
208 0x000000ff, /* src_mask */
209 0x000000ff, /* dst_mask */
210 FALSE), /* pcrel_offset */
211
212 HOWTO (R_ARM_SBREL32, /* type */
213 0, /* rightshift */
214 2, /* size (0 = byte, 1 = short, 2 = long) */
215 32, /* bitsize */
216 FALSE, /* pc_relative */
217 0, /* bitpos */
218 complain_overflow_dont,/* complain_on_overflow */
219 bfd_elf_generic_reloc, /* special_function */
220 "R_ARM_SBREL32", /* name */
221 FALSE, /* partial_inplace */
222 0xffffffff, /* src_mask */
223 0xffffffff, /* dst_mask */
224 FALSE), /* pcrel_offset */
225
c19d1205 226 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 227 1, /* rightshift */
228 2, /* size (0 = byte, 1 = short, 2 = long) */
f6ebfac0 229 24, /* bitsize */
7f266840
DJ		 230 TRUE, /* pc_relative */
231 0, /* bitpos */
232 complain_overflow_signed,/* complain_on_overflow */
233 bfd_elf_generic_reloc, /* special_function */
c19d1205 234 "R_ARM_THM_CALL", /* name */
7f266840 235 FALSE, /* partial_inplace */
7f6ab9f8
AM		 236 0x07ff2fff, /* src_mask */
237 0x07ff2fff, /* dst_mask */
7f266840
DJ		 238 TRUE), /* pcrel_offset */
239
240 HOWTO (R_ARM_THM_PC8, /* type */
241 1, /* rightshift */
242 1, /* size (0 = byte, 1 = short, 2 = long) */
243 8, /* bitsize */
244 TRUE, /* pc_relative */
245 0, /* bitpos */
246 complain_overflow_signed,/* complain_on_overflow */
247 bfd_elf_generic_reloc, /* special_function */
248 "R_ARM_THM_PC8", /* name */
249 FALSE, /* partial_inplace */
250 0x000000ff, /* src_mask */
251 0x000000ff, /* dst_mask */
252 TRUE), /* pcrel_offset */
253
c19d1205 254 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 255 1, /* rightshift */
256 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 257 32, /* bitsize */
258 FALSE, /* pc_relative */
7f266840
DJ		 259 0, /* bitpos */
260 complain_overflow_signed,/* complain_on_overflow */
261 bfd_elf_generic_reloc, /* special_function */
c19d1205 262 "R_ARM_BREL_ADJ", /* name */
7f266840 263 FALSE, /* partial_inplace */
c19d1205
ZW		 264 0xffffffff, /* src_mask */
265 0xffffffff, /* dst_mask */
266 FALSE), /* pcrel_offset */
7f266840 267
0855e32b 268 HOWTO (R_ARM_TLS_DESC, /* type */
7f266840 269 0, /* rightshift */
0855e32b
NS		 270 2, /* size (0 = byte, 1 = short, 2 = long) */
271 32, /* bitsize */
7f266840
DJ		 272 FALSE, /* pc_relative */
273 0, /* bitpos */
0855e32b 274 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 275 bfd_elf_generic_reloc, /* special_function */
0855e32b 276 "R_ARM_TLS_DESC", /* name */
7f266840 277 FALSE, /* partial_inplace */
0855e32b
NS		 278 0xffffffff, /* src_mask */
279 0xffffffff, /* dst_mask */
7f266840
DJ		 280 FALSE), /* pcrel_offset */
281
282 HOWTO (R_ARM_THM_SWI8, /* type */
283 0, /* rightshift */
284 0, /* size (0 = byte, 1 = short, 2 = long) */
285 0, /* bitsize */
286 FALSE, /* pc_relative */
287 0, /* bitpos */
288 complain_overflow_signed,/* complain_on_overflow */
289 bfd_elf_generic_reloc, /* special_function */
290 "R_ARM_SWI8", /* name */
291 FALSE, /* partial_inplace */
292 0x00000000, /* src_mask */
293 0x00000000, /* dst_mask */
294 FALSE), /* pcrel_offset */
295
296 /* BLX instruction for the ARM. */
297 HOWTO (R_ARM_XPC25, /* type */
298 2, /* rightshift */
299 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 300 24, /* bitsize */
7f266840
DJ		 301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed,/* complain_on_overflow */
304 bfd_elf_generic_reloc, /* special_function */
305 "R_ARM_XPC25", /* name */
306 FALSE, /* partial_inplace */
307 0x00ffffff, /* src_mask */
308 0x00ffffff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* BLX instruction for the Thumb. */
312 HOWTO (R_ARM_THM_XPC22, /* type */
313 2, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
7f6ab9f8 315 24, /* bitsize */
7f266840
DJ		 316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_ARM_THM_XPC22", /* name */
321 FALSE, /* partial_inplace */
7f6ab9f8
AM		 322 0x07ff2fff, /* src_mask */
323 0x07ff2fff, /* dst_mask */
7f266840
DJ		 324 TRUE), /* pcrel_offset */
325
ba93b8ac 326 /* Dynamic TLS relocations. */
7f266840 327
ba93b8ac 328 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
99059e56
RM		 329 0, /* rightshift */
330 2, /* size (0 = byte, 1 = short, 2 = long) */
331 32, /* bitsize */
332 FALSE, /* pc_relative */
333 0, /* bitpos */
334 complain_overflow_bitfield,/* complain_on_overflow */
335 bfd_elf_generic_reloc, /* special_function */
336 "R_ARM_TLS_DTPMOD32", /* name */
337 TRUE, /* partial_inplace */
338 0xffffffff, /* src_mask */
339 0xffffffff, /* dst_mask */
340 FALSE), /* pcrel_offset */
7f266840 341
ba93b8ac 342 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
99059e56
RM		 343 0, /* rightshift */
344 2, /* size (0 = byte, 1 = short, 2 = long) */
345 32, /* bitsize */
346 FALSE, /* pc_relative */
347 0, /* bitpos */
348 complain_overflow_bitfield,/* complain_on_overflow */
349 bfd_elf_generic_reloc, /* special_function */
350 "R_ARM_TLS_DTPOFF32", /* name */
351 TRUE, /* partial_inplace */
352 0xffffffff, /* src_mask */
353 0xffffffff, /* dst_mask */
354 FALSE), /* pcrel_offset */
7f266840 355
ba93b8ac 356 HOWTO (R_ARM_TLS_TPOFF32, /* type */
99059e56
RM		 357 0, /* rightshift */
358 2, /* size (0 = byte, 1 = short, 2 = long) */
359 32, /* bitsize */
360 FALSE, /* pc_relative */
361 0, /* bitpos */
362 complain_overflow_bitfield,/* complain_on_overflow */
363 bfd_elf_generic_reloc, /* special_function */
364 "R_ARM_TLS_TPOFF32", /* name */
365 TRUE, /* partial_inplace */
366 0xffffffff, /* src_mask */
367 0xffffffff, /* dst_mask */
368 FALSE), /* pcrel_offset */
7f266840
DJ		 369
370 /* Relocs used in ARM Linux */
371
372 HOWTO (R_ARM_COPY, /* type */
99059e56
RM		 373 0, /* rightshift */
374 2, /* size (0 = byte, 1 = short, 2 = long) */
375 32, /* bitsize */
376 FALSE, /* pc_relative */
377 0, /* bitpos */
378 complain_overflow_bitfield,/* complain_on_overflow */
379 bfd_elf_generic_reloc, /* special_function */
380 "R_ARM_COPY", /* name */
381 TRUE, /* partial_inplace */
382 0xffffffff, /* src_mask */
383 0xffffffff, /* dst_mask */
384 FALSE), /* pcrel_offset */
7f266840
DJ		 385
386 HOWTO (R_ARM_GLOB_DAT, /* type */
99059e56
RM		 387 0, /* rightshift */
388 2, /* size (0 = byte, 1 = short, 2 = long) */
389 32, /* bitsize */
390 FALSE, /* pc_relative */
391 0, /* bitpos */
392 complain_overflow_bitfield,/* complain_on_overflow */
393 bfd_elf_generic_reloc, /* special_function */
394 "R_ARM_GLOB_DAT", /* name */
395 TRUE, /* partial_inplace */
396 0xffffffff, /* src_mask */
397 0xffffffff, /* dst_mask */
398 FALSE), /* pcrel_offset */
7f266840
DJ		 399
400 HOWTO (R_ARM_JUMP_SLOT, /* type */
99059e56
RM		 401 0, /* rightshift */
402 2, /* size (0 = byte, 1 = short, 2 = long) */
403 32, /* bitsize */
404 FALSE, /* pc_relative */
405 0, /* bitpos */
406 complain_overflow_bitfield,/* complain_on_overflow */
407 bfd_elf_generic_reloc, /* special_function */
408 "R_ARM_JUMP_SLOT", /* name */
409 TRUE, /* partial_inplace */
410 0xffffffff, /* src_mask */
411 0xffffffff, /* dst_mask */
412 FALSE), /* pcrel_offset */
7f266840
DJ		 413
414 HOWTO (R_ARM_RELATIVE, /* type */
99059e56
RM		 415 0, /* rightshift */
416 2, /* size (0 = byte, 1 = short, 2 = long) */
417 32, /* bitsize */
418 FALSE, /* pc_relative */
419 0, /* bitpos */
420 complain_overflow_bitfield,/* complain_on_overflow */
421 bfd_elf_generic_reloc, /* special_function */
422 "R_ARM_RELATIVE", /* name */
423 TRUE, /* partial_inplace */
424 0xffffffff, /* src_mask */
425 0xffffffff, /* dst_mask */
426 FALSE), /* pcrel_offset */
7f266840 427
c19d1205 428 HOWTO (R_ARM_GOTOFF32, /* type */
99059e56
RM		 429 0, /* rightshift */
430 2, /* size (0 = byte, 1 = short, 2 = long) */
431 32, /* bitsize */
432 FALSE, /* pc_relative */
433 0, /* bitpos */
434 complain_overflow_bitfield,/* complain_on_overflow */
435 bfd_elf_generic_reloc, /* special_function */
436 "R_ARM_GOTOFF32", /* name */
437 TRUE, /* partial_inplace */
438 0xffffffff, /* src_mask */
439 0xffffffff, /* dst_mask */
440 FALSE), /* pcrel_offset */
7f266840
DJ		 441
442 HOWTO (R_ARM_GOTPC, /* type */
99059e56
RM		 443 0, /* rightshift */
444 2, /* size (0 = byte, 1 = short, 2 = long) */
445 32, /* bitsize */
446 TRUE, /* pc_relative */
447 0, /* bitpos */
448 complain_overflow_bitfield,/* complain_on_overflow */
449 bfd_elf_generic_reloc, /* special_function */
450 "R_ARM_GOTPC", /* name */
451 TRUE, /* partial_inplace */
452 0xffffffff, /* src_mask */
453 0xffffffff, /* dst_mask */
454 TRUE), /* pcrel_offset */
7f266840
DJ		 455
456 HOWTO (R_ARM_GOT32, /* type */
99059e56
RM		 457 0, /* rightshift */
458 2, /* size (0 = byte, 1 = short, 2 = long) */
459 32, /* bitsize */
460 FALSE, /* pc_relative */
461 0, /* bitpos */
462 complain_overflow_bitfield,/* complain_on_overflow */
463 bfd_elf_generic_reloc, /* special_function */
464 "R_ARM_GOT32", /* name */
465 TRUE, /* partial_inplace */
466 0xffffffff, /* src_mask */
467 0xffffffff, /* dst_mask */
468 FALSE), /* pcrel_offset */
7f266840
DJ		 469
470 HOWTO (R_ARM_PLT32, /* type */
99059e56
RM		 471 2, /* rightshift */
472 2, /* size (0 = byte, 1 = short, 2 = long) */
473 24, /* bitsize */
474 TRUE, /* pc_relative */
475 0, /* bitpos */
476 complain_overflow_bitfield,/* complain_on_overflow */
477 bfd_elf_generic_reloc, /* special_function */
478 "R_ARM_PLT32", /* name */
479 FALSE, /* partial_inplace */
480 0x00ffffff, /* src_mask */
481 0x00ffffff, /* dst_mask */
482 TRUE), /* pcrel_offset */
7f266840
DJ		 483
484 HOWTO (R_ARM_CALL, /* type */
485 2, /* rightshift */
486 2, /* size (0 = byte, 1 = short, 2 = long) */
487 24, /* bitsize */
488 TRUE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_signed,/* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_ARM_CALL", /* name */
493 FALSE, /* partial_inplace */
494 0x00ffffff, /* src_mask */
495 0x00ffffff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 HOWTO (R_ARM_JUMP24, /* type */
499 2, /* rightshift */
500 2, /* size (0 = byte, 1 = short, 2 = long) */
501 24, /* bitsize */
502 TRUE, /* pc_relative */
503 0, /* bitpos */
504 complain_overflow_signed,/* complain_on_overflow */
505 bfd_elf_generic_reloc, /* special_function */
506 "R_ARM_JUMP24", /* name */
507 FALSE, /* partial_inplace */
508 0x00ffffff, /* src_mask */
509 0x00ffffff, /* dst_mask */
510 TRUE), /* pcrel_offset */
511
c19d1205
ZW		 512 HOWTO (R_ARM_THM_JUMP24, /* type */
513 1, /* rightshift */
514 2, /* size (0 = byte, 1 = short, 2 = long) */
515 24, /* bitsize */
516 TRUE, /* pc_relative */
7f266840 517 0, /* bitpos */
c19d1205 518 complain_overflow_signed,/* complain_on_overflow */
7f266840 519 bfd_elf_generic_reloc, /* special_function */
c19d1205 520 "R_ARM_THM_JUMP24", /* name */
7f266840 521 FALSE, /* partial_inplace */
c19d1205
ZW		 522 0x07ff2fff, /* src_mask */
523 0x07ff2fff, /* dst_mask */
524 TRUE), /* pcrel_offset */
7f266840 525
c19d1205 526 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 527 0, /* rightshift */
c19d1205
ZW		 528 2, /* size (0 = byte, 1 = short, 2 = long) */
529 32, /* bitsize */
7f266840
DJ		 530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_dont,/* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
c19d1205 534 "R_ARM_BASE_ABS", /* name */
7f266840 535 FALSE, /* partial_inplace */
c19d1205
ZW		 536 0xffffffff, /* src_mask */
537 0xffffffff, /* dst_mask */
7f266840
DJ		 538 FALSE), /* pcrel_offset */
539
540 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
541 0, /* rightshift */
542 2, /* size (0 = byte, 1 = short, 2 = long) */
543 12, /* bitsize */
544 TRUE, /* pc_relative */
545 0, /* bitpos */
546 complain_overflow_dont,/* complain_on_overflow */
547 bfd_elf_generic_reloc, /* special_function */
548 "R_ARM_ALU_PCREL_7_0", /* name */
549 FALSE, /* partial_inplace */
550 0x00000fff, /* src_mask */
551 0x00000fff, /* dst_mask */
552 TRUE), /* pcrel_offset */
553
554 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
555 0, /* rightshift */
556 2, /* size (0 = byte, 1 = short, 2 = long) */
557 12, /* bitsize */
558 TRUE, /* pc_relative */
559 8, /* bitpos */
560 complain_overflow_dont,/* complain_on_overflow */
561 bfd_elf_generic_reloc, /* special_function */
562 "R_ARM_ALU_PCREL_15_8",/* name */
563 FALSE, /* partial_inplace */
564 0x00000fff, /* src_mask */
565 0x00000fff, /* dst_mask */
566 TRUE), /* pcrel_offset */
567
568 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
569 0, /* rightshift */
570 2, /* size (0 = byte, 1 = short, 2 = long) */
571 12, /* bitsize */
572 TRUE, /* pc_relative */
573 16, /* bitpos */
574 complain_overflow_dont,/* complain_on_overflow */
575 bfd_elf_generic_reloc, /* special_function */
576 "R_ARM_ALU_PCREL_23_15",/* name */
577 FALSE, /* partial_inplace */
578 0x00000fff, /* src_mask */
579 0x00000fff, /* dst_mask */
580 TRUE), /* pcrel_offset */
581
582 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
583 0, /* rightshift */
584 2, /* size (0 = byte, 1 = short, 2 = long) */
585 12, /* bitsize */
586 FALSE, /* pc_relative */
587 0, /* bitpos */
588 complain_overflow_dont,/* complain_on_overflow */
589 bfd_elf_generic_reloc, /* special_function */
590 "R_ARM_LDR_SBREL_11_0",/* name */
591 FALSE, /* partial_inplace */
592 0x00000fff, /* src_mask */
593 0x00000fff, /* dst_mask */
594 FALSE), /* pcrel_offset */
595
596 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
597 0, /* rightshift */
598 2, /* size (0 = byte, 1 = short, 2 = long) */
599 8, /* bitsize */
600 FALSE, /* pc_relative */
601 12, /* bitpos */
602 complain_overflow_dont,/* complain_on_overflow */
603 bfd_elf_generic_reloc, /* special_function */
604 "R_ARM_ALU_SBREL_19_12",/* name */
605 FALSE, /* partial_inplace */
606 0x000ff000, /* src_mask */
607 0x000ff000, /* dst_mask */
608 FALSE), /* pcrel_offset */
609
610 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
611 0, /* rightshift */
612 2, /* size (0 = byte, 1 = short, 2 = long) */
613 8, /* bitsize */
614 FALSE, /* pc_relative */
615 20, /* bitpos */
616 complain_overflow_dont,/* complain_on_overflow */
617 bfd_elf_generic_reloc, /* special_function */
618 "R_ARM_ALU_SBREL_27_20",/* name */
619 FALSE, /* partial_inplace */
620 0x0ff00000, /* src_mask */
621 0x0ff00000, /* dst_mask */
622 FALSE), /* pcrel_offset */
623
624 HOWTO (R_ARM_TARGET1, /* type */
625 0, /* rightshift */
626 2, /* size (0 = byte, 1 = short, 2 = long) */
627 32, /* bitsize */
628 FALSE, /* pc_relative */
629 0, /* bitpos */
630 complain_overflow_dont,/* complain_on_overflow */
631 bfd_elf_generic_reloc, /* special_function */
632 "R_ARM_TARGET1", /* name */
633 FALSE, /* partial_inplace */
634 0xffffffff, /* src_mask */
635 0xffffffff, /* dst_mask */
636 FALSE), /* pcrel_offset */
637
638 HOWTO (R_ARM_ROSEGREL32, /* type */
639 0, /* rightshift */
640 2, /* size (0 = byte, 1 = short, 2 = long) */
641 32, /* bitsize */
642 FALSE, /* pc_relative */
643 0, /* bitpos */
644 complain_overflow_dont,/* complain_on_overflow */
645 bfd_elf_generic_reloc, /* special_function */
646 "R_ARM_ROSEGREL32", /* name */
647 FALSE, /* partial_inplace */
648 0xffffffff, /* src_mask */
649 0xffffffff, /* dst_mask */
650 FALSE), /* pcrel_offset */
651
652 HOWTO (R_ARM_V4BX, /* type */
653 0, /* rightshift */
654 2, /* size (0 = byte, 1 = short, 2 = long) */
655 32, /* bitsize */
656 FALSE, /* pc_relative */
657 0, /* bitpos */
658 complain_overflow_dont,/* complain_on_overflow */
659 bfd_elf_generic_reloc, /* special_function */
660 "R_ARM_V4BX", /* name */
661 FALSE, /* partial_inplace */
662 0xffffffff, /* src_mask */
663 0xffffffff, /* dst_mask */
664 FALSE), /* pcrel_offset */
665
666 HOWTO (R_ARM_TARGET2, /* type */
667 0, /* rightshift */
668 2, /* size (0 = byte, 1 = short, 2 = long) */
669 32, /* bitsize */
670 FALSE, /* pc_relative */
671 0, /* bitpos */
672 complain_overflow_signed,/* complain_on_overflow */
673 bfd_elf_generic_reloc, /* special_function */
674 "R_ARM_TARGET2", /* name */
675 FALSE, /* partial_inplace */
676 0xffffffff, /* src_mask */
677 0xffffffff, /* dst_mask */
678 TRUE), /* pcrel_offset */
679
680 HOWTO (R_ARM_PREL31, /* type */
681 0, /* rightshift */
682 2, /* size (0 = byte, 1 = short, 2 = long) */
683 31, /* bitsize */
684 TRUE, /* pc_relative */
685 0, /* bitpos */
686 complain_overflow_signed,/* complain_on_overflow */
687 bfd_elf_generic_reloc, /* special_function */
688 "R_ARM_PREL31", /* name */
689 FALSE, /* partial_inplace */
690 0x7fffffff, /* src_mask */
691 0x7fffffff, /* dst_mask */
692 TRUE), /* pcrel_offset */
c19d1205
ZW		 693
694 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
695 0, /* rightshift */
696 2, /* size (0 = byte, 1 = short, 2 = long) */
697 16, /* bitsize */
698 FALSE, /* pc_relative */
699 0, /* bitpos */
700 complain_overflow_dont,/* complain_on_overflow */
701 bfd_elf_generic_reloc, /* special_function */
702 "R_ARM_MOVW_ABS_NC", /* name */
703 FALSE, /* partial_inplace */
39623e12
PB		 704 0x000f0fff, /* src_mask */
705 0x000f0fff, /* dst_mask */
c19d1205
ZW		 706 FALSE), /* pcrel_offset */
707
708 HOWTO (R_ARM_MOVT_ABS, /* type */
709 0, /* rightshift */
710 2, /* size (0 = byte, 1 = short, 2 = long) */
711 16, /* bitsize */
712 FALSE, /* pc_relative */
713 0, /* bitpos */
714 complain_overflow_bitfield,/* complain_on_overflow */
715 bfd_elf_generic_reloc, /* special_function */
716 "R_ARM_MOVT_ABS", /* name */
717 FALSE, /* partial_inplace */
39623e12
PB		 718 0x000f0fff, /* src_mask */
719 0x000f0fff, /* dst_mask */
c19d1205
ZW		 720 FALSE), /* pcrel_offset */
721
722 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
723 0, /* rightshift */
724 2, /* size (0 = byte, 1 = short, 2 = long) */
725 16, /* bitsize */
726 TRUE, /* pc_relative */
727 0, /* bitpos */
728 complain_overflow_dont,/* complain_on_overflow */
729 bfd_elf_generic_reloc, /* special_function */
730 "R_ARM_MOVW_PREL_NC", /* name */
731 FALSE, /* partial_inplace */
39623e12
PB		 732 0x000f0fff, /* src_mask */
733 0x000f0fff, /* dst_mask */
c19d1205
ZW		 734 TRUE), /* pcrel_offset */
735
736 HOWTO (R_ARM_MOVT_PREL, /* type */
737 0, /* rightshift */
738 2, /* size (0 = byte, 1 = short, 2 = long) */
739 16, /* bitsize */
740 TRUE, /* pc_relative */
741 0, /* bitpos */
742 complain_overflow_bitfield,/* complain_on_overflow */
743 bfd_elf_generic_reloc, /* special_function */
744 "R_ARM_MOVT_PREL", /* name */
745 FALSE, /* partial_inplace */
39623e12
PB		 746 0x000f0fff, /* src_mask */
747 0x000f0fff, /* dst_mask */
c19d1205
ZW		 748 TRUE), /* pcrel_offset */
749
750 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
751 0, /* rightshift */
752 2, /* size (0 = byte, 1 = short, 2 = long) */
753 16, /* bitsize */
754 FALSE, /* pc_relative */
755 0, /* bitpos */
756 complain_overflow_dont,/* complain_on_overflow */
757 bfd_elf_generic_reloc, /* special_function */
758 "R_ARM_THM_MOVW_ABS_NC",/* name */
759 FALSE, /* partial_inplace */
760 0x040f70ff, /* src_mask */
761 0x040f70ff, /* dst_mask */
762 FALSE), /* pcrel_offset */
763
764 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
765 0, /* rightshift */
766 2, /* size (0 = byte, 1 = short, 2 = long) */
767 16, /* bitsize */
768 FALSE, /* pc_relative */
769 0, /* bitpos */
770 complain_overflow_bitfield,/* complain_on_overflow */
771 bfd_elf_generic_reloc, /* special_function */
772 "R_ARM_THM_MOVT_ABS", /* name */
773 FALSE, /* partial_inplace */
774 0x040f70ff, /* src_mask */
775 0x040f70ff, /* dst_mask */
776 FALSE), /* pcrel_offset */
777
778 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 16, /* bitsize */
782 TRUE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 bfd_elf_generic_reloc, /* special_function */
786 "R_ARM_THM_MOVW_PREL_NC",/* name */
787 FALSE, /* partial_inplace */
788 0x040f70ff, /* src_mask */
789 0x040f70ff, /* dst_mask */
790 TRUE), /* pcrel_offset */
791
792 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
793 0, /* rightshift */
794 2, /* size (0 = byte, 1 = short, 2 = long) */
795 16, /* bitsize */
796 TRUE, /* pc_relative */
797 0, /* bitpos */
798 complain_overflow_bitfield,/* complain_on_overflow */
799 bfd_elf_generic_reloc, /* special_function */
800 "R_ARM_THM_MOVT_PREL", /* name */
801 FALSE, /* partial_inplace */
802 0x040f70ff, /* src_mask */
803 0x040f70ff, /* dst_mask */
804 TRUE), /* pcrel_offset */
805
806 HOWTO (R_ARM_THM_JUMP19, /* type */
807 1, /* rightshift */
808 2, /* size (0 = byte, 1 = short, 2 = long) */
809 19, /* bitsize */
810 TRUE, /* pc_relative */
811 0, /* bitpos */
812 complain_overflow_signed,/* complain_on_overflow */
813 bfd_elf_generic_reloc, /* special_function */
814 "R_ARM_THM_JUMP19", /* name */
815 FALSE, /* partial_inplace */
816 0x043f2fff, /* src_mask */
817 0x043f2fff, /* dst_mask */
818 TRUE), /* pcrel_offset */
819
820 HOWTO (R_ARM_THM_JUMP6, /* type */
821 1, /* rightshift */
822 1, /* size (0 = byte, 1 = short, 2 = long) */
823 6, /* bitsize */
824 TRUE, /* pc_relative */
825 0, /* bitpos */
826 complain_overflow_unsigned,/* complain_on_overflow */
827 bfd_elf_generic_reloc, /* special_function */
828 "R_ARM_THM_JUMP6", /* name */
829 FALSE, /* partial_inplace */
830 0x02f8, /* src_mask */
831 0x02f8, /* dst_mask */
832 TRUE), /* pcrel_offset */
833
834 /* These are declared as 13-bit signed relocations because we can
835 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
836 versa. */
837 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
838 0, /* rightshift */
839 2, /* size (0 = byte, 1 = short, 2 = long) */
840 13, /* bitsize */
841 TRUE, /* pc_relative */
842 0, /* bitpos */
2cab6cc3 843 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 844 bfd_elf_generic_reloc, /* special_function */
845 "R_ARM_THM_ALU_PREL_11_0",/* name */
846 FALSE, /* partial_inplace */
2cab6cc3
MS		 847 0xffffffff, /* src_mask */
848 0xffffffff, /* dst_mask */
c19d1205
ZW		 849 TRUE), /* pcrel_offset */
850
851 HOWTO (R_ARM_THM_PC12, /* type */
852 0, /* rightshift */
853 2, /* size (0 = byte, 1 = short, 2 = long) */
854 13, /* bitsize */
855 TRUE, /* pc_relative */
856 0, /* bitpos */
2cab6cc3 857 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 858 bfd_elf_generic_reloc, /* special_function */
859 "R_ARM_THM_PC12", /* name */
860 FALSE, /* partial_inplace */
2cab6cc3
MS		 861 0xffffffff, /* src_mask */
862 0xffffffff, /* dst_mask */
c19d1205
ZW		 863 TRUE), /* pcrel_offset */
864
865 HOWTO (R_ARM_ABS32_NOI, /* type */
866 0, /* rightshift */
867 2, /* size (0 = byte, 1 = short, 2 = long) */
868 32, /* bitsize */
869 FALSE, /* pc_relative */
870 0, /* bitpos */
871 complain_overflow_dont,/* complain_on_overflow */
872 bfd_elf_generic_reloc, /* special_function */
873 "R_ARM_ABS32_NOI", /* name */
874 FALSE, /* partial_inplace */
875 0xffffffff, /* src_mask */
876 0xffffffff, /* dst_mask */
877 FALSE), /* pcrel_offset */
878
879 HOWTO (R_ARM_REL32_NOI, /* type */
880 0, /* rightshift */
881 2, /* size (0 = byte, 1 = short, 2 = long) */
882 32, /* bitsize */
883 TRUE, /* pc_relative */
884 0, /* bitpos */
885 complain_overflow_dont,/* complain_on_overflow */
886 bfd_elf_generic_reloc, /* special_function */
887 "R_ARM_REL32_NOI", /* name */
888 FALSE, /* partial_inplace */
889 0xffffffff, /* src_mask */
890 0xffffffff, /* dst_mask */
891 FALSE), /* pcrel_offset */
7f266840 892
4962c51a
MS		 893 /* Group relocations. */
894
895 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
896 0, /* rightshift */
897 2, /* size (0 = byte, 1 = short, 2 = long) */
898 32, /* bitsize */
899 TRUE, /* pc_relative */
900 0, /* bitpos */
901 complain_overflow_dont,/* complain_on_overflow */
902 bfd_elf_generic_reloc, /* special_function */
903 "R_ARM_ALU_PC_G0_NC", /* name */
904 FALSE, /* partial_inplace */
905 0xffffffff, /* src_mask */
906 0xffffffff, /* dst_mask */
907 TRUE), /* pcrel_offset */
908
909 HOWTO (R_ARM_ALU_PC_G0, /* type */
910 0, /* rightshift */
911 2, /* size (0 = byte, 1 = short, 2 = long) */
912 32, /* bitsize */
913 TRUE, /* pc_relative */
914 0, /* bitpos */
915 complain_overflow_dont,/* complain_on_overflow */
916 bfd_elf_generic_reloc, /* special_function */
917 "R_ARM_ALU_PC_G0", /* name */
918 FALSE, /* partial_inplace */
919 0xffffffff, /* src_mask */
920 0xffffffff, /* dst_mask */
921 TRUE), /* pcrel_offset */
922
923 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
924 0, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 32, /* bitsize */
927 TRUE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_ARM_ALU_PC_G1_NC", /* name */
932 FALSE, /* partial_inplace */
933 0xffffffff, /* src_mask */
934 0xffffffff, /* dst_mask */
935 TRUE), /* pcrel_offset */
936
937 HOWTO (R_ARM_ALU_PC_G1, /* type */
938 0, /* rightshift */
939 2, /* size (0 = byte, 1 = short, 2 = long) */
940 32, /* bitsize */
941 TRUE, /* pc_relative */
942 0, /* bitpos */
943 complain_overflow_dont,/* complain_on_overflow */
944 bfd_elf_generic_reloc, /* special_function */
945 "R_ARM_ALU_PC_G1", /* name */
946 FALSE, /* partial_inplace */
947 0xffffffff, /* src_mask */
948 0xffffffff, /* dst_mask */
949 TRUE), /* pcrel_offset */
950
951 HOWTO (R_ARM_ALU_PC_G2, /* type */
952 0, /* rightshift */
953 2, /* size (0 = byte, 1 = short, 2 = long) */
954 32, /* bitsize */
955 TRUE, /* pc_relative */
956 0, /* bitpos */
957 complain_overflow_dont,/* complain_on_overflow */
958 bfd_elf_generic_reloc, /* special_function */
959 "R_ARM_ALU_PC_G2", /* name */
960 FALSE, /* partial_inplace */
961 0xffffffff, /* src_mask */
962 0xffffffff, /* dst_mask */
963 TRUE), /* pcrel_offset */
964
965 HOWTO (R_ARM_LDR_PC_G1, /* type */
966 0, /* rightshift */
967 2, /* size (0 = byte, 1 = short, 2 = long) */
968 32, /* bitsize */
969 TRUE, /* pc_relative */
970 0, /* bitpos */
971 complain_overflow_dont,/* complain_on_overflow */
972 bfd_elf_generic_reloc, /* special_function */
973 "R_ARM_LDR_PC_G1", /* name */
974 FALSE, /* partial_inplace */
975 0xffffffff, /* src_mask */
976 0xffffffff, /* dst_mask */
977 TRUE), /* pcrel_offset */
978
979 HOWTO (R_ARM_LDR_PC_G2, /* type */
980 0, /* rightshift */
981 2, /* size (0 = byte, 1 = short, 2 = long) */
982 32, /* bitsize */
983 TRUE, /* pc_relative */
984 0, /* bitpos */
985 complain_overflow_dont,/* complain_on_overflow */
986 bfd_elf_generic_reloc, /* special_function */
987 "R_ARM_LDR_PC_G2", /* name */
988 FALSE, /* partial_inplace */
989 0xffffffff, /* src_mask */
990 0xffffffff, /* dst_mask */
991 TRUE), /* pcrel_offset */
992
993 HOWTO (R_ARM_LDRS_PC_G0, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 32, /* bitsize */
997 TRUE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_ARM_LDRS_PC_G0", /* name */
1002 FALSE, /* partial_inplace */
1003 0xffffffff, /* src_mask */
1004 0xffffffff, /* dst_mask */
1005 TRUE), /* pcrel_offset */
1006
1007 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1008 0, /* rightshift */
1009 2, /* size (0 = byte, 1 = short, 2 = long) */
1010 32, /* bitsize */
1011 TRUE, /* pc_relative */
1012 0, /* bitpos */
1013 complain_overflow_dont,/* complain_on_overflow */
1014 bfd_elf_generic_reloc, /* special_function */
1015 "R_ARM_LDRS_PC_G1", /* name */
1016 FALSE, /* partial_inplace */
1017 0xffffffff, /* src_mask */
1018 0xffffffff, /* dst_mask */
1019 TRUE), /* pcrel_offset */
1020
1021 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1022 0, /* rightshift */
1023 2, /* size (0 = byte, 1 = short, 2 = long) */
1024 32, /* bitsize */
1025 TRUE, /* pc_relative */
1026 0, /* bitpos */
1027 complain_overflow_dont,/* complain_on_overflow */
1028 bfd_elf_generic_reloc, /* special_function */
1029 "R_ARM_LDRS_PC_G2", /* name */
1030 FALSE, /* partial_inplace */
1031 0xffffffff, /* src_mask */
1032 0xffffffff, /* dst_mask */
1033 TRUE), /* pcrel_offset */
1034
1035 HOWTO (R_ARM_LDC_PC_G0, /* type */
1036 0, /* rightshift */
1037 2, /* size (0 = byte, 1 = short, 2 = long) */
1038 32, /* bitsize */
1039 TRUE, /* pc_relative */
1040 0, /* bitpos */
1041 complain_overflow_dont,/* complain_on_overflow */
1042 bfd_elf_generic_reloc, /* special_function */
1043 "R_ARM_LDC_PC_G0", /* name */
1044 FALSE, /* partial_inplace */
1045 0xffffffff, /* src_mask */
1046 0xffffffff, /* dst_mask */
1047 TRUE), /* pcrel_offset */
1048
1049 HOWTO (R_ARM_LDC_PC_G1, /* type */
1050 0, /* rightshift */
1051 2, /* size (0 = byte, 1 = short, 2 = long) */
1052 32, /* bitsize */
1053 TRUE, /* pc_relative */
1054 0, /* bitpos */
1055 complain_overflow_dont,/* complain_on_overflow */
1056 bfd_elf_generic_reloc, /* special_function */
1057 "R_ARM_LDC_PC_G1", /* name */
1058 FALSE, /* partial_inplace */
1059 0xffffffff, /* src_mask */
1060 0xffffffff, /* dst_mask */
1061 TRUE), /* pcrel_offset */
1062
1063 HOWTO (R_ARM_LDC_PC_G2, /* type */
1064 0, /* rightshift */
1065 2, /* size (0 = byte, 1 = short, 2 = long) */
1066 32, /* bitsize */
1067 TRUE, /* pc_relative */
1068 0, /* bitpos */
1069 complain_overflow_dont,/* complain_on_overflow */
1070 bfd_elf_generic_reloc, /* special_function */
1071 "R_ARM_LDC_PC_G2", /* name */
1072 FALSE, /* partial_inplace */
1073 0xffffffff, /* src_mask */
1074 0xffffffff, /* dst_mask */
1075 TRUE), /* pcrel_offset */
1076
1077 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1078 0, /* rightshift */
1079 2, /* size (0 = byte, 1 = short, 2 = long) */
1080 32, /* bitsize */
1081 TRUE, /* pc_relative */
1082 0, /* bitpos */
1083 complain_overflow_dont,/* complain_on_overflow */
1084 bfd_elf_generic_reloc, /* special_function */
1085 "R_ARM_ALU_SB_G0_NC", /* name */
1086 FALSE, /* partial_inplace */
1087 0xffffffff, /* src_mask */
1088 0xffffffff, /* dst_mask */
1089 TRUE), /* pcrel_offset */
1090
1091 HOWTO (R_ARM_ALU_SB_G0, /* type */
1092 0, /* rightshift */
1093 2, /* size (0 = byte, 1 = short, 2 = long) */
1094 32, /* bitsize */
1095 TRUE, /* pc_relative */
1096 0, /* bitpos */
1097 complain_overflow_dont,/* complain_on_overflow */
1098 bfd_elf_generic_reloc, /* special_function */
1099 "R_ARM_ALU_SB_G0", /* name */
1100 FALSE, /* partial_inplace */
1101 0xffffffff, /* src_mask */
1102 0xffffffff, /* dst_mask */
1103 TRUE), /* pcrel_offset */
1104
1105 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1106 0, /* rightshift */
1107 2, /* size (0 = byte, 1 = short, 2 = long) */
1108 32, /* bitsize */
1109 TRUE, /* pc_relative */
1110 0, /* bitpos */
1111 complain_overflow_dont,/* complain_on_overflow */
1112 bfd_elf_generic_reloc, /* special_function */
1113 "R_ARM_ALU_SB_G1_NC", /* name */
1114 FALSE, /* partial_inplace */
1115 0xffffffff, /* src_mask */
1116 0xffffffff, /* dst_mask */
1117 TRUE), /* pcrel_offset */
1118
1119 HOWTO (R_ARM_ALU_SB_G1, /* type */
1120 0, /* rightshift */
1121 2, /* size (0 = byte, 1 = short, 2 = long) */
1122 32, /* bitsize */
1123 TRUE, /* pc_relative */
1124 0, /* bitpos */
1125 complain_overflow_dont,/* complain_on_overflow */
1126 bfd_elf_generic_reloc, /* special_function */
1127 "R_ARM_ALU_SB_G1", /* name */
1128 FALSE, /* partial_inplace */
1129 0xffffffff, /* src_mask */
1130 0xffffffff, /* dst_mask */
1131 TRUE), /* pcrel_offset */
1132
1133 HOWTO (R_ARM_ALU_SB_G2, /* type */
1134 0, /* rightshift */
1135 2, /* size (0 = byte, 1 = short, 2 = long) */
1136 32, /* bitsize */
1137 TRUE, /* pc_relative */
1138 0, /* bitpos */
1139 complain_overflow_dont,/* complain_on_overflow */
1140 bfd_elf_generic_reloc, /* special_function */
1141 "R_ARM_ALU_SB_G2", /* name */
1142 FALSE, /* partial_inplace */
1143 0xffffffff, /* src_mask */
1144 0xffffffff, /* dst_mask */
1145 TRUE), /* pcrel_offset */
1146
1147 HOWTO (R_ARM_LDR_SB_G0, /* type */
1148 0, /* rightshift */
1149 2, /* size (0 = byte, 1 = short, 2 = long) */
1150 32, /* bitsize */
1151 TRUE, /* pc_relative */
1152 0, /* bitpos */
1153 complain_overflow_dont,/* complain_on_overflow */
1154 bfd_elf_generic_reloc, /* special_function */
1155 "R_ARM_LDR_SB_G0", /* name */
1156 FALSE, /* partial_inplace */
1157 0xffffffff, /* src_mask */
1158 0xffffffff, /* dst_mask */
1159 TRUE), /* pcrel_offset */
1160
1161 HOWTO (R_ARM_LDR_SB_G1, /* type */
1162 0, /* rightshift */
1163 2, /* size (0 = byte, 1 = short, 2 = long) */
1164 32, /* bitsize */
1165 TRUE, /* pc_relative */
1166 0, /* bitpos */
1167 complain_overflow_dont,/* complain_on_overflow */
1168 bfd_elf_generic_reloc, /* special_function */
1169 "R_ARM_LDR_SB_G1", /* name */
1170 FALSE, /* partial_inplace */
1171 0xffffffff, /* src_mask */
1172 0xffffffff, /* dst_mask */
1173 TRUE), /* pcrel_offset */
1174
1175 HOWTO (R_ARM_LDR_SB_G2, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 TRUE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 bfd_elf_generic_reloc, /* special_function */
1183 "R_ARM_LDR_SB_G2", /* name */
1184 FALSE, /* partial_inplace */
1185 0xffffffff, /* src_mask */
1186 0xffffffff, /* dst_mask */
1187 TRUE), /* pcrel_offset */
1188
1189 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1190 0, /* rightshift */
1191 2, /* size (0 = byte, 1 = short, 2 = long) */
1192 32, /* bitsize */
1193 TRUE, /* pc_relative */
1194 0, /* bitpos */
1195 complain_overflow_dont,/* complain_on_overflow */
1196 bfd_elf_generic_reloc, /* special_function */
1197 "R_ARM_LDRS_SB_G0", /* name */
1198 FALSE, /* partial_inplace */
1199 0xffffffff, /* src_mask */
1200 0xffffffff, /* dst_mask */
1201 TRUE), /* pcrel_offset */
1202
1203 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1204 0, /* rightshift */
1205 2, /* size (0 = byte, 1 = short, 2 = long) */
1206 32, /* bitsize */
1207 TRUE, /* pc_relative */
1208 0, /* bitpos */
1209 complain_overflow_dont,/* complain_on_overflow */
1210 bfd_elf_generic_reloc, /* special_function */
1211 "R_ARM_LDRS_SB_G1", /* name */
1212 FALSE, /* partial_inplace */
1213 0xffffffff, /* src_mask */
1214 0xffffffff, /* dst_mask */
1215 TRUE), /* pcrel_offset */
1216
1217 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1218 0, /* rightshift */
1219 2, /* size (0 = byte, 1 = short, 2 = long) */
1220 32, /* bitsize */
1221 TRUE, /* pc_relative */
1222 0, /* bitpos */
1223 complain_overflow_dont,/* complain_on_overflow */
1224 bfd_elf_generic_reloc, /* special_function */
1225 "R_ARM_LDRS_SB_G2", /* name */
1226 FALSE, /* partial_inplace */
1227 0xffffffff, /* src_mask */
1228 0xffffffff, /* dst_mask */
1229 TRUE), /* pcrel_offset */
1230
1231 HOWTO (R_ARM_LDC_SB_G0, /* type */
1232 0, /* rightshift */
1233 2, /* size (0 = byte, 1 = short, 2 = long) */
1234 32, /* bitsize */
1235 TRUE, /* pc_relative */
1236 0, /* bitpos */
1237 complain_overflow_dont,/* complain_on_overflow */
1238 bfd_elf_generic_reloc, /* special_function */
1239 "R_ARM_LDC_SB_G0", /* name */
1240 FALSE, /* partial_inplace */
1241 0xffffffff, /* src_mask */
1242 0xffffffff, /* dst_mask */
1243 TRUE), /* pcrel_offset */
1244
1245 HOWTO (R_ARM_LDC_SB_G1, /* type */
1246 0, /* rightshift */
1247 2, /* size (0 = byte, 1 = short, 2 = long) */
1248 32, /* bitsize */
1249 TRUE, /* pc_relative */
1250 0, /* bitpos */
1251 complain_overflow_dont,/* complain_on_overflow */
1252 bfd_elf_generic_reloc, /* special_function */
1253 "R_ARM_LDC_SB_G1", /* name */
1254 FALSE, /* partial_inplace */
1255 0xffffffff, /* src_mask */
1256 0xffffffff, /* dst_mask */
1257 TRUE), /* pcrel_offset */
1258
1259 HOWTO (R_ARM_LDC_SB_G2, /* type */
1260 0, /* rightshift */
1261 2, /* size (0 = byte, 1 = short, 2 = long) */
1262 32, /* bitsize */
1263 TRUE, /* pc_relative */
1264 0, /* bitpos */
1265 complain_overflow_dont,/* complain_on_overflow */
1266 bfd_elf_generic_reloc, /* special_function */
1267 "R_ARM_LDC_SB_G2", /* name */
1268 FALSE, /* partial_inplace */
1269 0xffffffff, /* src_mask */
1270 0xffffffff, /* dst_mask */
1271 TRUE), /* pcrel_offset */
1272
1273 /* End of group relocations. */
c19d1205 1274
c19d1205
ZW		 1275 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1276 0, /* rightshift */
1277 2, /* size (0 = byte, 1 = short, 2 = long) */
1278 16, /* bitsize */
1279 FALSE, /* pc_relative */
1280 0, /* bitpos */
1281 complain_overflow_dont,/* complain_on_overflow */
1282 bfd_elf_generic_reloc, /* special_function */
1283 "R_ARM_MOVW_BREL_NC", /* name */
1284 FALSE, /* partial_inplace */
1285 0x0000ffff, /* src_mask */
1286 0x0000ffff, /* dst_mask */
1287 FALSE), /* pcrel_offset */
1288
1289 HOWTO (R_ARM_MOVT_BREL, /* type */
1290 0, /* rightshift */
1291 2, /* size (0 = byte, 1 = short, 2 = long) */
1292 16, /* bitsize */
1293 FALSE, /* pc_relative */
1294 0, /* bitpos */
1295 complain_overflow_bitfield,/* complain_on_overflow */
1296 bfd_elf_generic_reloc, /* special_function */
1297 "R_ARM_MOVT_BREL", /* name */
1298 FALSE, /* partial_inplace */
1299 0x0000ffff, /* src_mask */
1300 0x0000ffff, /* dst_mask */
1301 FALSE), /* pcrel_offset */
1302
1303 HOWTO (R_ARM_MOVW_BREL, /* type */
1304 0, /* rightshift */
1305 2, /* size (0 = byte, 1 = short, 2 = long) */
1306 16, /* bitsize */
1307 FALSE, /* pc_relative */
1308 0, /* bitpos */
1309 complain_overflow_dont,/* complain_on_overflow */
1310 bfd_elf_generic_reloc, /* special_function */
1311 "R_ARM_MOVW_BREL", /* name */
1312 FALSE, /* partial_inplace */
1313 0x0000ffff, /* src_mask */
1314 0x0000ffff, /* dst_mask */
1315 FALSE), /* pcrel_offset */
1316
1317 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1318 0, /* rightshift */
1319 2, /* size (0 = byte, 1 = short, 2 = long) */
1320 16, /* bitsize */
1321 FALSE, /* pc_relative */
1322 0, /* bitpos */
1323 complain_overflow_dont,/* complain_on_overflow */
1324 bfd_elf_generic_reloc, /* special_function */
1325 "R_ARM_THM_MOVW_BREL_NC",/* name */
1326 FALSE, /* partial_inplace */
1327 0x040f70ff, /* src_mask */
1328 0x040f70ff, /* dst_mask */
1329 FALSE), /* pcrel_offset */
1330
1331 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1332 0, /* rightshift */
1333 2, /* size (0 = byte, 1 = short, 2 = long) */
1334 16, /* bitsize */
1335 FALSE, /* pc_relative */
1336 0, /* bitpos */
1337 complain_overflow_bitfield,/* complain_on_overflow */
1338 bfd_elf_generic_reloc, /* special_function */
1339 "R_ARM_THM_MOVT_BREL", /* name */
1340 FALSE, /* partial_inplace */
1341 0x040f70ff, /* src_mask */
1342 0x040f70ff, /* dst_mask */
1343 FALSE), /* pcrel_offset */
1344
1345 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1346 0, /* rightshift */
1347 2, /* size (0 = byte, 1 = short, 2 = long) */
1348 16, /* bitsize */
1349 FALSE, /* pc_relative */
1350 0, /* bitpos */
1351 complain_overflow_dont,/* complain_on_overflow */
1352 bfd_elf_generic_reloc, /* special_function */
1353 "R_ARM_THM_MOVW_BREL", /* name */
1354 FALSE, /* partial_inplace */
1355 0x040f70ff, /* src_mask */
1356 0x040f70ff, /* dst_mask */
1357 FALSE), /* pcrel_offset */
1358
0855e32b
NS		 1359 HOWTO (R_ARM_TLS_GOTDESC, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_bitfield,/* complain_on_overflow */
1366 NULL, /* special_function */
1367 "R_ARM_TLS_GOTDESC", /* name */
1368 TRUE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_TLS_CALL, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 24, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_TLS_CALL", /* name */
1382 FALSE, /* partial_inplace */
1383 0x00ffffff, /* src_mask */
1384 0x00ffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_TLS_DESCSEQ, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 0, /* bitsize */
1391 FALSE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_bitfield,/* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_TLS_DESCSEQ", /* name */
1396 FALSE, /* partial_inplace */
1397 0x00000000, /* src_mask */
1398 0x00000000, /* dst_mask */
1399 FALSE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_THM_TLS_CALL, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 24, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_dont,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_THM_TLS_CALL", /* name */
1410 FALSE, /* partial_inplace */
1411 0x07ff07ff, /* src_mask */
1412 0x07ff07ff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
c19d1205
ZW		 1414
1415 HOWTO (R_ARM_PLT32_ABS, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 32, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_dont,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_PLT32_ABS", /* name */
1424 FALSE, /* partial_inplace */
1425 0xffffffff, /* src_mask */
1426 0xffffffff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 HOWTO (R_ARM_GOT_ABS, /* type */
1430 0, /* rightshift */
1431 2, /* size (0 = byte, 1 = short, 2 = long) */
1432 32, /* bitsize */
1433 FALSE, /* pc_relative */
1434 0, /* bitpos */
1435 complain_overflow_dont,/* complain_on_overflow */
1436 bfd_elf_generic_reloc, /* special_function */
1437 "R_ARM_GOT_ABS", /* name */
1438 FALSE, /* partial_inplace */
1439 0xffffffff, /* src_mask */
1440 0xffffffff, /* dst_mask */
1441 FALSE), /* pcrel_offset */
1442
1443 HOWTO (R_ARM_GOT_PREL, /* type */
1444 0, /* rightshift */
1445 2, /* size (0 = byte, 1 = short, 2 = long) */
1446 32, /* bitsize */
1447 TRUE, /* pc_relative */
1448 0, /* bitpos */
1449 complain_overflow_dont, /* complain_on_overflow */
1450 bfd_elf_generic_reloc, /* special_function */
1451 "R_ARM_GOT_PREL", /* name */
1452 FALSE, /* partial_inplace */
1453 0xffffffff, /* src_mask */
1454 0xffffffff, /* dst_mask */
1455 TRUE), /* pcrel_offset */
1456
1457 HOWTO (R_ARM_GOT_BREL12, /* type */
1458 0, /* rightshift */
1459 2, /* size (0 = byte, 1 = short, 2 = long) */
1460 12, /* bitsize */
1461 FALSE, /* pc_relative */
1462 0, /* bitpos */
1463 complain_overflow_bitfield,/* complain_on_overflow */
1464 bfd_elf_generic_reloc, /* special_function */
1465 "R_ARM_GOT_BREL12", /* name */
1466 FALSE, /* partial_inplace */
1467 0x00000fff, /* src_mask */
1468 0x00000fff, /* dst_mask */
1469 FALSE), /* pcrel_offset */
1470
1471 HOWTO (R_ARM_GOTOFF12, /* type */
1472 0, /* rightshift */
1473 2, /* size (0 = byte, 1 = short, 2 = long) */
1474 12, /* bitsize */
1475 FALSE, /* pc_relative */
1476 0, /* bitpos */
1477 complain_overflow_bitfield,/* complain_on_overflow */
1478 bfd_elf_generic_reloc, /* special_function */
1479 "R_ARM_GOTOFF12", /* name */
1480 FALSE, /* partial_inplace */
1481 0x00000fff, /* src_mask */
1482 0x00000fff, /* dst_mask */
1483 FALSE), /* pcrel_offset */
1484
1485 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1486
1487 /* GNU extension to record C++ vtable member usage */
1488 HOWTO (R_ARM_GNU_VTENTRY, /* type */
99059e56
RM		 1489 0, /* rightshift */
1490 2, /* size (0 = byte, 1 = short, 2 = long) */
1491 0, /* bitsize */
1492 FALSE, /* pc_relative */
1493 0, /* bitpos */
1494 complain_overflow_dont, /* complain_on_overflow */
1495 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1496 "R_ARM_GNU_VTENTRY", /* name */
1497 FALSE, /* partial_inplace */
1498 0, /* src_mask */
1499 0, /* dst_mask */
1500 FALSE), /* pcrel_offset */
c19d1205
ZW		 1501
1502 /* GNU extension to record C++ vtable hierarchy */
1503 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
99059e56
RM		 1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 0, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont, /* complain_on_overflow */
1510 NULL, /* special_function */
1511 "R_ARM_GNU_VTINHERIT", /* name */
1512 FALSE, /* partial_inplace */
1513 0, /* src_mask */
1514 0, /* dst_mask */
1515 FALSE), /* pcrel_offset */
c19d1205
ZW		 1516
1517 HOWTO (R_ARM_THM_JUMP11, /* type */
1518 1, /* rightshift */
1519 1, /* size (0 = byte, 1 = short, 2 = long) */
1520 11, /* bitsize */
1521 TRUE, /* pc_relative */
1522 0, /* bitpos */
1523 complain_overflow_signed, /* complain_on_overflow */
1524 bfd_elf_generic_reloc, /* special_function */
1525 "R_ARM_THM_JUMP11", /* name */
1526 FALSE, /* partial_inplace */
1527 0x000007ff, /* src_mask */
1528 0x000007ff, /* dst_mask */
1529 TRUE), /* pcrel_offset */
1530
1531 HOWTO (R_ARM_THM_JUMP8, /* type */
1532 1, /* rightshift */
1533 1, /* size (0 = byte, 1 = short, 2 = long) */
1534 8, /* bitsize */
1535 TRUE, /* pc_relative */
1536 0, /* bitpos */
1537 complain_overflow_signed, /* complain_on_overflow */
1538 bfd_elf_generic_reloc, /* special_function */
1539 "R_ARM_THM_JUMP8", /* name */
1540 FALSE, /* partial_inplace */
1541 0x000000ff, /* src_mask */
1542 0x000000ff, /* dst_mask */
1543 TRUE), /* pcrel_offset */
ba93b8ac 1544
c19d1205
ZW		 1545 /* TLS relocations */
1546 HOWTO (R_ARM_TLS_GD32, /* type */
99059e56
RM		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
1549 32, /* bitsize */
1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 NULL, /* special_function */
1554 "R_ARM_TLS_GD32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
ba93b8ac 1559
ba93b8ac 1560 HOWTO (R_ARM_TLS_LDM32, /* type */
99059e56
RM		 1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 32, /* bitsize */
1564 FALSE, /* pc_relative */
1565 0, /* bitpos */
1566 complain_overflow_bitfield,/* complain_on_overflow */
1567 bfd_elf_generic_reloc, /* special_function */
1568 "R_ARM_TLS_LDM32", /* name */
1569 TRUE, /* partial_inplace */
1570 0xffffffff, /* src_mask */
1571 0xffffffff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
ba93b8ac 1573
c19d1205 1574 HOWTO (R_ARM_TLS_LDO32, /* type */
99059e56
RM		 1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 32, /* bitsize */
1578 FALSE, /* pc_relative */
1579 0, /* bitpos */
1580 complain_overflow_bitfield,/* complain_on_overflow */
1581 bfd_elf_generic_reloc, /* special_function */
1582 "R_ARM_TLS_LDO32", /* name */
1583 TRUE, /* partial_inplace */
1584 0xffffffff, /* src_mask */
1585 0xffffffff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
ba93b8ac 1587
ba93b8ac 1588 HOWTO (R_ARM_TLS_IE32, /* type */
99059e56
RM		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
1591 32, /* bitsize */
1592 FALSE, /* pc_relative */
1593 0, /* bitpos */
1594 complain_overflow_bitfield,/* complain_on_overflow */
1595 NULL, /* special_function */
1596 "R_ARM_TLS_IE32", /* name */
1597 TRUE, /* partial_inplace */
1598 0xffffffff, /* src_mask */
1599 0xffffffff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
7f266840 1601
c19d1205 1602 HOWTO (R_ARM_TLS_LE32, /* type */
99059e56
RM		 1603 0, /* rightshift */
1604 2, /* size (0 = byte, 1 = short, 2 = long) */
1605 32, /* bitsize */
1606 FALSE, /* pc_relative */
1607 0, /* bitpos */
1608 complain_overflow_bitfield,/* complain_on_overflow */
1609 bfd_elf_generic_reloc, /* special_function */
1610 "R_ARM_TLS_LE32", /* name */
1611 TRUE, /* partial_inplace */
1612 0xffffffff, /* src_mask */
1613 0xffffffff, /* dst_mask */
1614 FALSE), /* pcrel_offset */
7f266840 1615
c19d1205
ZW		 1616 HOWTO (R_ARM_TLS_LDO12, /* type */
1617 0, /* rightshift */
1618 2, /* size (0 = byte, 1 = short, 2 = long) */
1619 12, /* bitsize */
1620 FALSE, /* pc_relative */
7f266840 1621 0, /* bitpos */
c19d1205 1622 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1623 bfd_elf_generic_reloc, /* special_function */
c19d1205 1624 "R_ARM_TLS_LDO12", /* name */
7f266840 1625 FALSE, /* partial_inplace */
c19d1205
ZW		 1626 0x00000fff, /* src_mask */
1627 0x00000fff, /* dst_mask */
1628 FALSE), /* pcrel_offset */
7f266840 1629
c19d1205
ZW		 1630 HOWTO (R_ARM_TLS_LE12, /* type */
1631 0, /* rightshift */
1632 2, /* size (0 = byte, 1 = short, 2 = long) */
1633 12, /* bitsize */
1634 FALSE, /* pc_relative */
7f266840 1635 0, /* bitpos */
c19d1205 1636 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1637 bfd_elf_generic_reloc, /* special_function */
c19d1205 1638 "R_ARM_TLS_LE12", /* name */
7f266840 1639 FALSE, /* partial_inplace */
c19d1205
ZW		 1640 0x00000fff, /* src_mask */
1641 0x00000fff, /* dst_mask */
1642 FALSE), /* pcrel_offset */
7f266840 1643
c19d1205 1644 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1645 0, /* rightshift */
1646 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1647 12, /* bitsize */
1648 FALSE, /* pc_relative */
7f266840 1649 0, /* bitpos */
c19d1205 1650 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1651 bfd_elf_generic_reloc, /* special_function */
c19d1205 1652 "R_ARM_TLS_IE12GP", /* name */
7f266840 1653 FALSE, /* partial_inplace */
c19d1205
ZW		 1654 0x00000fff, /* src_mask */
1655 0x00000fff, /* dst_mask */
1656 FALSE), /* pcrel_offset */
0855e32b 1657
34e77a92 1658 /* 112-127 private relocations. */
0855e32b
NS		 1659 EMPTY_HOWTO (112),
1660 EMPTY_HOWTO (113),
1661 EMPTY_HOWTO (114),
1662 EMPTY_HOWTO (115),
1663 EMPTY_HOWTO (116),
1664 EMPTY_HOWTO (117),
1665 EMPTY_HOWTO (118),
1666 EMPTY_HOWTO (119),
1667 EMPTY_HOWTO (120),
1668 EMPTY_HOWTO (121),
1669 EMPTY_HOWTO (122),
1670 EMPTY_HOWTO (123),
1671 EMPTY_HOWTO (124),
1672 EMPTY_HOWTO (125),
1673 EMPTY_HOWTO (126),
1674 EMPTY_HOWTO (127),
34e77a92
RS		 1675
1676 /* R_ARM_ME_TOO, obsolete. */
0855e32b
NS		 1677 EMPTY_HOWTO (128),
1678
1679 HOWTO (R_ARM_THM_TLS_DESCSEQ, /* type */
1680 0, /* rightshift */
1681 1, /* size (0 = byte, 1 = short, 2 = long) */
1682 0, /* bitsize */
1683 FALSE, /* pc_relative */
1684 0, /* bitpos */
1685 complain_overflow_bitfield,/* complain_on_overflow */
1686 bfd_elf_generic_reloc, /* special_function */
1687 "R_ARM_THM_TLS_DESCSEQ",/* name */
1688 FALSE, /* partial_inplace */
1689 0x00000000, /* src_mask */
1690 0x00000000, /* dst_mask */
1691 FALSE), /* pcrel_offset */
c19d1205
ZW		 1692};
1693
34e77a92
RS		 1694/* 160 onwards: */
1695static reloc_howto_type elf32_arm_howto_table_2[1] =
1696{
1697 HOWTO (R_ARM_IRELATIVE, /* type */
99059e56
RM		 1698 0, /* rightshift */
1699 2, /* size (0 = byte, 1 = short, 2 = long) */
1700 32, /* bitsize */
1701 FALSE, /* pc_relative */
1702 0, /* bitpos */
1703 complain_overflow_bitfield,/* complain_on_overflow */
1704 bfd_elf_generic_reloc, /* special_function */
1705 "R_ARM_IRELATIVE", /* name */
1706 TRUE, /* partial_inplace */
1707 0xffffffff, /* src_mask */
1708 0xffffffff, /* dst_mask */
1709 FALSE) /* pcrel_offset */
34e77a92 1710};
c19d1205 1711
34e77a92
RS		 1712/* 249-255 extended, currently unused, relocations: */
1713static reloc_howto_type elf32_arm_howto_table_3[4] =
7f266840
DJ		 1714{
1715 HOWTO (R_ARM_RREL32, /* type */
1716 0, /* rightshift */
1717 0, /* size (0 = byte, 1 = short, 2 = long) */
1718 0, /* bitsize */
1719 FALSE, /* pc_relative */
1720 0, /* bitpos */
1721 complain_overflow_dont,/* complain_on_overflow */
1722 bfd_elf_generic_reloc, /* special_function */
1723 "R_ARM_RREL32", /* name */
1724 FALSE, /* partial_inplace */
1725 0, /* src_mask */
1726 0, /* dst_mask */
1727 FALSE), /* pcrel_offset */
1728
1729 HOWTO (R_ARM_RABS32, /* type */
1730 0, /* rightshift */
1731 0, /* size (0 = byte, 1 = short, 2 = long) */
1732 0, /* bitsize */
1733 FALSE, /* pc_relative */
1734 0, /* bitpos */
1735 complain_overflow_dont,/* complain_on_overflow */
1736 bfd_elf_generic_reloc, /* special_function */
1737 "R_ARM_RABS32", /* name */
1738 FALSE, /* partial_inplace */
1739 0, /* src_mask */
1740 0, /* dst_mask */
1741 FALSE), /* pcrel_offset */
1742
1743 HOWTO (R_ARM_RPC24, /* type */
1744 0, /* rightshift */
1745 0, /* size (0 = byte, 1 = short, 2 = long) */
1746 0, /* bitsize */
1747 FALSE, /* pc_relative */
1748 0, /* bitpos */
1749 complain_overflow_dont,/* complain_on_overflow */
1750 bfd_elf_generic_reloc, /* special_function */
1751 "R_ARM_RPC24", /* name */
1752 FALSE, /* partial_inplace */
1753 0, /* src_mask */
1754 0, /* dst_mask */
1755 FALSE), /* pcrel_offset */
1756
1757 HOWTO (R_ARM_RBASE, /* type */
1758 0, /* rightshift */
1759 0, /* size (0 = byte, 1 = short, 2 = long) */
1760 0, /* bitsize */
1761 FALSE, /* pc_relative */
1762 0, /* bitpos */
1763 complain_overflow_dont,/* complain_on_overflow */
1764 bfd_elf_generic_reloc, /* special_function */
1765 "R_ARM_RBASE", /* name */
1766 FALSE, /* partial_inplace */
1767 0, /* src_mask */
1768 0, /* dst_mask */
1769 FALSE) /* pcrel_offset */
1770};
1771
1772static reloc_howto_type *
1773elf32_arm_howto_from_type (unsigned int r_type)
1774{
906e58ca 1775 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1))
c19d1205 1776 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1777
34e77a92
RS		 1778 if (r_type == R_ARM_IRELATIVE)
1779 return &elf32_arm_howto_table_2[r_type - R_ARM_IRELATIVE];
1780
c19d1205 1781 if (r_type >= R_ARM_RREL32
34e77a92
RS		 1782 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_3))
1783 return &elf32_arm_howto_table_3[r_type - R_ARM_RREL32];
7f266840 1784
c19d1205 1785 return NULL;
7f266840
DJ		 1786}
1787
1788static void
1789elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1790 Elf_Internal_Rela * elf_reloc)
1791{
1792 unsigned int r_type;
1793
1794 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1795 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1796}
1797
1798struct elf32_arm_reloc_map
1799 {
1800 bfd_reloc_code_real_type bfd_reloc_val;
1801 unsigned char elf_reloc_val;
1802 };
1803
1804/* All entries in this list must also be present in elf32_arm_howto_table. */
1805static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1806 {
1807 {BFD_RELOC_NONE, R_ARM_NONE},
1808 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1809 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1810 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1811 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1812 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1813 {BFD_RELOC_32, R_ARM_ABS32},
1814 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1815 {BFD_RELOC_8, R_ARM_ABS8},
1816 {BFD_RELOC_16, R_ARM_ABS16},
1817 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1818 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1819 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1820 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1821 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1822 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1823 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1824 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1825 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1826 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1827 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1828 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840 1829 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
b43420e6 1830 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL},
7f266840
DJ		 1831 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1832 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1833 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1834 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1835 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1836 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1837 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1838 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
0855e32b
NS		 1839 {BFD_RELOC_ARM_TLS_GOTDESC, R_ARM_TLS_GOTDESC},
1840 {BFD_RELOC_ARM_TLS_CALL, R_ARM_TLS_CALL},
1841 {BFD_RELOC_ARM_THM_TLS_CALL, R_ARM_THM_TLS_CALL},
1842 {BFD_RELOC_ARM_TLS_DESCSEQ, R_ARM_TLS_DESCSEQ},
1843 {BFD_RELOC_ARM_THM_TLS_DESCSEQ, R_ARM_THM_TLS_DESCSEQ},
1844 {BFD_RELOC_ARM_TLS_DESC, R_ARM_TLS_DESC},
ba93b8ac
DJ		 1845 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1846 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1847 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1848 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1849 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1850 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1851 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1852 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
34e77a92 1853 {BFD_RELOC_ARM_IRELATIVE, R_ARM_IRELATIVE},
c19d1205
ZW		 1854 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1855 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1856 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1857 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1858 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1859 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1860 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1861 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1862 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1863 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1864 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1865 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1866 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1867 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1868 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1869 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1870 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1871 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1872 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1873 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1874 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1875 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1876 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1877 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1878 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1879 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1880 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1881 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1882 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1883 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1884 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1885 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1886 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1887 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1888 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1889 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1890 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1891 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1892 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1893 };
1894
1895static reloc_howto_type *
f1c71a59
ZW		 1896elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1897 bfd_reloc_code_real_type code)
7f266840
DJ		 1898{
1899 unsigned int i;
8029a119 1900
906e58ca 1901 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++)
c19d1205
ZW		 1902 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1903 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1904
c19d1205 1905 return NULL;
7f266840
DJ		 1906}
1907
157090f7
AM		 1908static reloc_howto_type *
1909elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1910 const char *r_name)
1911{
1912 unsigned int i;
1913
906e58ca 1914 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++)
157090f7
AM		 1915 if (elf32_arm_howto_table_1[i].name != NULL
1916 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1917 return &elf32_arm_howto_table_1[i];
1918
906e58ca 1919 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++)
157090f7
AM		 1920 if (elf32_arm_howto_table_2[i].name != NULL
1921 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1922 return &elf32_arm_howto_table_2[i];
1923
34e77a92
RS		 1924 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_3); i++)
1925 if (elf32_arm_howto_table_3[i].name != NULL
1926 && strcasecmp (elf32_arm_howto_table_3[i].name, r_name) == 0)
1927 return &elf32_arm_howto_table_3[i];
1928
157090f7
AM		 1929 return NULL;
1930}
1931
906e58ca
NC		 1932/* Support for core dump NOTE sections. */
1933
7f266840 1934static bfd_boolean
f1c71a59 1935elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1936{
1937 int offset;
1938 size_t size;
1939
1940 switch (note->descsz)
1941 {
1942 default:
1943 return FALSE;
1944
8029a119 1945 case 148: /* Linux/ARM 32-bit. */
7f266840 1946 /* pr_cursig */
228e534f 1947 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
7f266840
DJ		 1948
1949 /* pr_pid */
228e534f 1950 elf_tdata (abfd)->core->lwpid = bfd_get_32 (abfd, note->descdata + 24);
7f266840
DJ		 1951
1952 /* pr_reg */
1953 offset = 72;
1954 size = 72;
1955
1956 break;
1957 }
1958
1959 /* Make a ".reg/999" section. */
1960 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1961 size, note->descpos + offset);
1962}
1963
1964static bfd_boolean
f1c71a59 1965elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1966{
1967 switch (note->descsz)
1968 {
1969 default:
1970 return FALSE;
1971
8029a119 1972 case 124: /* Linux/ARM elf_prpsinfo. */
228e534f 1973 elf_tdata (abfd)->core->pid
4395ee08 1974 = bfd_get_32 (abfd, note->descdata + 12);
228e534f 1975 elf_tdata (abfd)->core->program
7f266840 1976 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
228e534f 1977 elf_tdata (abfd)->core->command
7f266840
DJ		 1978 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1979 }
1980
1981 /* Note that for some reason, a spurious space is tacked
1982 onto the end of the args in some (at least one anyway)
1983 implementations, so strip it off if it exists. */
7f266840 1984 {
228e534f 1985 char *command = elf_tdata (abfd)->core->command;
7f266840
DJ		 1986 int n = strlen (command);
1987
1988 if (0 < n && command[n - 1] == ' ')
1989 command[n - 1] = '\0';
1990 }
1991
1992 return TRUE;
1993}
1994
1f20dca5
UW		 1995static char *
1996elf32_arm_nabi_write_core_note (bfd *abfd, char *buf, int *bufsiz,
1997 int note_type, ...)
1998{
1999 switch (note_type)
2000 {
2001 default:
2002 return NULL;
2003
2004 case NT_PRPSINFO:
2005 {
2006 char data[124];
2007 va_list ap;
2008
2009 va_start (ap, note_type);
2010 memset (data, 0, sizeof (data));
2011 strncpy (data + 28, va_arg (ap, const char *), 16);
2012 strncpy (data + 44, va_arg (ap, const char *), 80);
2013 va_end (ap);
2014
2015 return elfcore_write_note (abfd, buf, bufsiz,
2016 "CORE", note_type, data, sizeof (data));
2017 }
2018
2019 case NT_PRSTATUS:
2020 {
2021 char data[148];
2022 va_list ap;
2023 long pid;
2024 int cursig;
2025 const void *greg;
2026
2027 va_start (ap, note_type);
2028 memset (data, 0, sizeof (data));
2029 pid = va_arg (ap, long);
2030 bfd_put_32 (abfd, pid, data + 24);
2031 cursig = va_arg (ap, int);
2032 bfd_put_16 (abfd, cursig, data + 12);
2033 greg = va_arg (ap, const void *);
2034 memcpy (data + 72, greg, 72);
2035 va_end (ap);
2036
2037 return elfcore_write_note (abfd, buf, bufsiz,
2038 "CORE", note_type, data, sizeof (data));
2039 }
2040 }
2041}
2042
6d00b590 2043#define TARGET_LITTLE_SYM arm_elf32_le_vec
7f266840 2044#define TARGET_LITTLE_NAME "elf32-littlearm"
6d00b590 2045#define TARGET_BIG_SYM arm_elf32_be_vec
7f266840
DJ		 2046#define TARGET_BIG_NAME "elf32-bigarm"
2047
2048#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
2049#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1f20dca5 2050#define elf_backend_write_core_note elf32_arm_nabi_write_core_note
7f266840 2051
252b5132
RH		 2052typedef unsigned long int insn32;
2053typedef unsigned short int insn16;
2054
3a4a14e9
PB		 2055/* In lieu of proper flags, assume all EABIv4 or later objects are
2056 interworkable. */
57e8b36a 2057#define INTERWORK_FLAG(abfd) \
3a4a14e9 2058 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
3e6b1042
DJ		 2059 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \
2060 || ((abfd)->flags & BFD_LINKER_CREATED))
9b485d32 2061
252b5132
RH		 2062/* The linker script knows the section names for placement.
2063 The entry_names are used to do simple name mangling on the stubs.
2064 Given a function name, and its type, the stub can be found. The
9b485d32 2065 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 2066#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
2067#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
2068
2069#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
2070#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
2071
c7b8f16e
JB		 2072#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
2073#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
2074
845b51d6
PB		 2075#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
2076#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
2077
7413f23f
DJ		 2078#define STUB_ENTRY_NAME "__%s_veneer"
2079
252b5132
RH		 2080/* The name of the dynamic interpreter. This is put in the .interp
2081 section. */
2082#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
2083
0855e32b 2084static const unsigned long tls_trampoline [] =
b38cadfb
NC		 2085{
2086 0xe08e0000, /* add r0, lr, r0 */
2087 0xe5901004, /* ldr r1, [r0,#4] */
2088 0xe12fff11, /* bx r1 */
2089};
0855e32b
NS		 2090
2091static const unsigned long dl_tlsdesc_lazy_trampoline [] =
b38cadfb
NC		 2092{
2093 0xe52d2004, /* push {r2} */
2094 0xe59f200c, /* ldr r2, [pc, #3f - . - 8] */
2095 0xe59f100c, /* ldr r1, [pc, #4f - . - 8] */
2096 0xe79f2002, /* 1: ldr r2, [pc, r2] */
2097 0xe081100f, /* 2: add r1, pc */
2098 0xe12fff12, /* bx r2 */
2099 0x00000014, /* 3: .word _GLOBAL_OFFSET_TABLE_ - 1b - 8
99059e56 2100 + dl_tlsdesc_lazy_resolver(GOT) */
b38cadfb
NC		 2101 0x00000018, /* 4: .word _GLOBAL_OFFSET_TABLE_ - 2b - 8 */
2102};
0855e32b 2103
5e681ec4
PB		 2104#ifdef FOUR_WORD_PLT
2105
252b5132
RH		 2106/* The first entry in a procedure linkage table looks like
2107 this. It is set up so that any shared library function that is
59f2c4e7 2108 called before the relocation has been set up calls the dynamic
9b485d32 2109 linker first. */
e5a52504 2110static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2111{
2112 0xe52de004, /* str lr, [sp, #-4]! */
2113 0xe59fe010, /* ldr lr, [pc, #16] */
2114 0xe08fe00e, /* add lr, pc, lr */
2115 0xe5bef008, /* ldr pc, [lr, #8]! */
2116};
5e681ec4
PB		 2117
2118/* Subsequent entries in a procedure linkage table look like
2119 this. */
e5a52504 2120static const bfd_vma elf32_arm_plt_entry [] =
b38cadfb
NC		 2121{
2122 0xe28fc600, /* add ip, pc, #NN */
2123 0xe28cca00, /* add ip, ip, #NN */
2124 0xe5bcf000, /* ldr pc, [ip, #NN]! */
2125 0x00000000, /* unused */
2126};
5e681ec4 2127
eed94f8f 2128#else /* not FOUR_WORD_PLT */
5e681ec4 2129
5e681ec4
PB		 2130/* The first entry in a procedure linkage table looks like
2131 this. It is set up so that any shared library function that is
2132 called before the relocation has been set up calls the dynamic
2133 linker first. */
e5a52504 2134static const bfd_vma elf32_arm_plt0_entry [] =
b38cadfb
NC		 2135{
2136 0xe52de004, /* str lr, [sp, #-4]! */
2137 0xe59fe004, /* ldr lr, [pc, #4] */
2138 0xe08fe00e, /* add lr, pc, lr */
2139 0xe5bef008, /* ldr pc, [lr, #8]! */
2140 0x00000000, /* &GOT[0] - . */
2141};
252b5132 2142
1db37fe6
YG		 2143/* By default subsequent entries in a procedure linkage table look like
2144 this. Offsets that don't fit into 28 bits will cause link error. */
2145static const bfd_vma elf32_arm_plt_entry_short [] =
b38cadfb
NC		 2146{
2147 0xe28fc600, /* add ip, pc, #0xNN00000 */
2148 0xe28cca00, /* add ip, ip, #0xNN000 */
2149 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2150};
5e681ec4 2151
1db37fe6
YG		 2152/* When explicitly asked, we'll use this "long" entry format
2153 which can cope with arbitrary displacements. */
2154static const bfd_vma elf32_arm_plt_entry_long [] =
2155{
2156 0xe28fc200, /* add ip, pc, #0xN0000000 */
2157 0xe28cc600, /* add ip, ip, #0xNN00000 */
2158 0xe28cca00, /* add ip, ip, #0xNN000 */
2159 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
2160};
2161
2162static bfd_boolean elf32_arm_use_long_plt_entry = FALSE;
2163
eed94f8f
NC		 2164#endif /* not FOUR_WORD_PLT */
2165
2166/* The first entry in a procedure linkage table looks like this.
2167 It is set up so that any shared library function that is called before the
2168 relocation has been set up calls the dynamic linker first. */
2169static const bfd_vma elf32_thumb2_plt0_entry [] =
2170{
2171 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2172 an instruction maybe encoded to one or two array elements. */
2173 0xf8dfb500, /* push {lr} */
2174 0x44fee008, /* ldr.w lr, [pc, #8] */
2175 /* add lr, pc */
2176 0xff08f85e, /* ldr.w pc, [lr, #8]! */
2177 0x00000000, /* &GOT[0] - . */
2178};
2179
2180/* Subsequent entries in a procedure linkage table for thumb only target
2181 look like this. */
2182static const bfd_vma elf32_thumb2_plt_entry [] =
2183{
2184 /* NOTE: As this is a mixture of 16-bit and 32-bit instructions,
2185 an instruction maybe encoded to one or two array elements. */
2186 0x0c00f240, /* movw ip, #0xNNNN */
2187 0x0c00f2c0, /* movt ip, #0xNNNN */
2188 0xf8dc44fc, /* add ip, pc */
2189 0xbf00f000 /* ldr.w pc, [ip] */
2190 /* nop */
2191};
252b5132 2192
00a97672
RS		 2193/* The format of the first entry in the procedure linkage table
2194 for a VxWorks executable. */
2195static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
b38cadfb
NC		 2196{
2197 0xe52dc008, /* str ip,[sp,#-8]! */
2198 0xe59fc000, /* ldr ip,[pc] */
2199 0xe59cf008, /* ldr pc,[ip,#8] */
2200 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
2201};
00a97672
RS		 2202
2203/* The format of subsequent entries in a VxWorks executable. */
2204static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
b38cadfb
NC		 2205{
2206 0xe59fc000, /* ldr ip,[pc] */
2207 0xe59cf000, /* ldr pc,[ip] */
2208 0x00000000, /* .long @got */
2209 0xe59fc000, /* ldr ip,[pc] */
2210 0xea000000, /* b _PLT */
2211 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2212};
00a97672
RS		 2213
2214/* The format of entries in a VxWorks shared library. */
2215static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
b38cadfb
NC		 2216{
2217 0xe59fc000, /* ldr ip,[pc] */
2218 0xe79cf009, /* ldr pc,[ip,r9] */
2219 0x00000000, /* .long @got */
2220 0xe59fc000, /* ldr ip,[pc] */
2221 0xe599f008, /* ldr pc,[r9,#8] */
2222 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
2223};
00a97672 2224
b7693d02
DJ		 2225/* An initial stub used if the PLT entry is referenced from Thumb code. */
2226#define PLT_THUMB_STUB_SIZE 4
2227static const bfd_vma elf32_arm_plt_thumb_stub [] =
b38cadfb
NC		 2228{
2229 0x4778, /* bx pc */
2230 0x46c0 /* nop */
2231};
b7693d02 2232
e5a52504
MM		 2233/* The entries in a PLT when using a DLL-based target with multiple
2234 address spaces. */
906e58ca 2235static const bfd_vma elf32_arm_symbian_plt_entry [] =
b38cadfb
NC		 2236{
2237 0xe51ff004, /* ldr pc, [pc, #-4] */
2238 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2239};
2240
2241/* The first entry in a procedure linkage table looks like
2242 this. It is set up so that any shared library function that is
2243 called before the relocation has been set up calls the dynamic
2244 linker first. */
2245static const bfd_vma elf32_arm_nacl_plt0_entry [] =
2246{
2247 /* First bundle: */
2248 0xe300c000, /* movw ip, #:lower16:&GOT[2]-.+8 */
2249 0xe340c000, /* movt ip, #:upper16:&GOT[2]-.+8 */
2250 0xe08cc00f, /* add ip, ip, pc */
2251 0xe52dc008, /* str ip, [sp, #-8]! */
2252 /* Second bundle: */
edccdf7c
RM		 2253 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2254 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2255 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2256 0xe12fff1c, /* bx ip */
b38cadfb 2257 /* Third bundle: */
edccdf7c
RM		 2258 0xe320f000, /* nop */
2259 0xe320f000, /* nop */
2260 0xe320f000, /* nop */
b38cadfb
NC		 2261 /* .Lplt_tail: */
2262 0xe50dc004, /* str ip, [sp, #-4] */
2263 /* Fourth bundle: */
edccdf7c
RM		 2264 0xe3ccc103, /* bic ip, ip, #0xc0000000 */
2265 0xe59cc000, /* ldr ip, [ip] */
b38cadfb 2266 0xe3ccc13f, /* bic ip, ip, #0xc000000f */
edccdf7c 2267 0xe12fff1c, /* bx ip */
b38cadfb
NC		 2268};
2269#define ARM_NACL_PLT_TAIL_OFFSET (11 * 4)
2270
2271/* Subsequent entries in a procedure linkage table look like this. */
2272static const bfd_vma elf32_arm_nacl_plt_entry [] =
2273{
2274 0xe300c000, /* movw ip, #:lower16:&GOT[n]-.+8 */
2275 0xe340c000, /* movt ip, #:upper16:&GOT[n]-.+8 */
2276 0xe08cc00f, /* add ip, ip, pc */
2277 0xea000000, /* b .Lplt_tail */
2278};
e5a52504 2279
906e58ca
NC		 2280#define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8)
2281#define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8)
2282#define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4)
2283#define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4)
2284#define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4)
2285#define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4)
2286
461a49ca 2287enum stub_insn_type
b38cadfb
NC		 2288{
2289 THUMB16_TYPE = 1,
2290 THUMB32_TYPE,
2291 ARM_TYPE,
2292 DATA_TYPE
2293};
461a49ca 2294
48229727
JB		 2295#define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0}
2296/* A bit of a hack. A Thumb conditional branch, in which the proper condition
2297 is inserted in arm_build_one_stub(). */
2298#define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1}
2299#define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0}
2300#define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)}
2301#define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0}
2302#define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)}
2303#define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)}
461a49ca
DJ		 2304
2305typedef struct
2306{
b38cadfb
NC		 2307 bfd_vma data;
2308 enum stub_insn_type type;
2309 unsigned int r_type;
2310 int reloc_addend;
461a49ca
DJ		 2311} insn_sequence;
2312
fea2b4d6
CL		 2313/* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
2314 to reach the stub if necessary. */
461a49ca 2315static const insn_sequence elf32_arm_stub_long_branch_any_any[] =
b38cadfb
NC		 2316{
2317 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2318 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2319};
906e58ca 2320
fea2b4d6
CL		 2321/* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
2322 available. */
461a49ca 2323static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] =
b38cadfb
NC		 2324{
2325 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2326 ARM_INSN (0xe12fff1c), /* bx ip */
2327 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2328};
906e58ca 2329
d3626fb0 2330/* Thumb -> Thumb long branch stub. Used on M-profile architectures. */
461a49ca 2331static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] =
b38cadfb
NC		 2332{
2333 THUMB16_INSN (0xb401), /* push {r0} */
2334 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2335 THUMB16_INSN (0x4684), /* mov ip, r0 */
2336 THUMB16_INSN (0xbc01), /* pop {r0} */
2337 THUMB16_INSN (0x4760), /* bx ip */
2338 THUMB16_INSN (0xbf00), /* nop */
2339 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2340};
906e58ca 2341
d3626fb0
CL		 2342/* V4T Thumb -> Thumb long branch stub. Using the stack is not
2343 allowed. */
2344static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
b38cadfb
NC		 2345{
2346 THUMB16_INSN (0x4778), /* bx pc */
2347 THUMB16_INSN (0x46c0), /* nop */
2348 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2349 ARM_INSN (0xe12fff1c), /* bx ip */
2350 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2351};
d3626fb0 2352
fea2b4d6
CL		 2353/* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
2354 available. */
461a49ca 2355static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2356{
2357 THUMB16_INSN (0x4778), /* bx pc */
2358 THUMB16_INSN (0x46c0), /* nop */
2359 ARM_INSN (0xe51ff004), /* ldr pc, [pc, #-4] */
2360 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2361};
906e58ca 2362
fea2b4d6
CL		 2363/* V4T Thumb -> ARM short branch stub. Shorter variant of the above
2364 one, when the destination is close enough. */
461a49ca 2365static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] =
b38cadfb
NC		 2366{
2367 THUMB16_INSN (0x4778), /* bx pc */
2368 THUMB16_INSN (0x46c0), /* nop */
2369 ARM_REL_INSN (0xea000000, -8), /* b (X-8) */
2370};
c820be07 2371
cf3eccff 2372/* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
fea2b4d6 2373 blx to reach the stub if necessary. */
cf3eccff 2374static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] =
b38cadfb
NC		 2375{
2376 ARM_INSN (0xe59fc000), /* ldr ip, [pc] */
2377 ARM_INSN (0xe08ff00c), /* add pc, pc, ip */
2378 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
2379};
906e58ca 2380
cf3eccff
DJ		 2381/* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
2382 blx to reach the stub if necessary. We can not add into pc;
2383 it is not guaranteed to mode switch (different in ARMv6 and
2384 ARMv7). */
2385static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] =
b38cadfb
NC		 2386{
2387 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2388 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2389 ARM_INSN (0xe12fff1c), /* bx ip */
2390 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2391};
cf3eccff 2392
ebe24dd4
CL		 2393/* V4T ARM -> ARM long branch stub, PIC. */
2394static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
b38cadfb
NC		 2395{
2396 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2397 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2398 ARM_INSN (0xe12fff1c), /* bx ip */
2399 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2400};
ebe24dd4
CL		 2401
2402/* V4T Thumb -> ARM long branch stub, PIC. */
2403static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
b38cadfb
NC		 2404{
2405 THUMB16_INSN (0x4778), /* bx pc */
2406 THUMB16_INSN (0x46c0), /* nop */
2407 ARM_INSN (0xe59fc000), /* ldr ip, [pc, #0] */
2408 ARM_INSN (0xe08cf00f), /* add pc, ip, pc */
2409 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
2410};
ebe24dd4 2411
d3626fb0
CL		 2412/* Thumb -> Thumb long branch stub, PIC. Used on M-profile
2413 architectures. */
ebe24dd4 2414static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] =
b38cadfb
NC		 2415{
2416 THUMB16_INSN (0xb401), /* push {r0} */
2417 THUMB16_INSN (0x4802), /* ldr r0, [pc, #8] */
2418 THUMB16_INSN (0x46fc), /* mov ip, pc */
2419 THUMB16_INSN (0x4484), /* add ip, r0 */
2420 THUMB16_INSN (0xbc01), /* pop {r0} */
2421 THUMB16_INSN (0x4760), /* bx ip */
2422 DATA_WORD (0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */
2423};
ebe24dd4 2424
d3626fb0
CL		 2425/* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
2426 allowed. */
2427static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
b38cadfb
NC		 2428{
2429 THUMB16_INSN (0x4778), /* bx pc */
2430 THUMB16_INSN (0x46c0), /* nop */
2431 ARM_INSN (0xe59fc004), /* ldr ip, [pc, #4] */
2432 ARM_INSN (0xe08fc00c), /* add ip, pc, ip */
2433 ARM_INSN (0xe12fff1c), /* bx ip */
2434 DATA_WORD (0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */
2435};
d3626fb0 2436
0855e32b
NS		 2437/* Thumb2/ARM -> TLS trampoline. Lowest common denominator, which is a
2438 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2439static const insn_sequence elf32_arm_stub_long_branch_any_tls_pic[] =
2440{
b38cadfb
NC		 2441 ARM_INSN (0xe59f1000), /* ldr r1, [pc] */
2442 ARM_INSN (0xe08ff001), /* add pc, pc, r1 */
2443 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */
0855e32b
NS		 2444};
2445
2446/* V4T Thumb -> TLS trampoline. lowest common denominator, which is a
2447 long PIC stub. We can use r1 as a scratch -- and cannot use ip. */
2448static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_tls_pic[] =
2449{
b38cadfb
NC		 2450 THUMB16_INSN (0x4778), /* bx pc */
2451 THUMB16_INSN (0x46c0), /* nop */
2452 ARM_INSN (0xe59f1000), /* ldr r1, [pc, #0] */
2453 ARM_INSN (0xe081f00f), /* add pc, r1, pc */
2454 DATA_WORD (0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */
0855e32b
NS		 2455};
2456
7a89b94e
NC		 2457/* NaCl ARM -> ARM long branch stub. */
2458static const insn_sequence elf32_arm_stub_long_branch_arm_nacl[] =
2459{
2460 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2461 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2462 ARM_INSN (0xe12fff1c), /* bx ip */
2463 ARM_INSN (0xe320f000), /* nop */
2464 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2465 DATA_WORD (0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */
2466 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2467 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2468};
2469
2470/* NaCl ARM -> ARM long branch stub, PIC. */
2471static const insn_sequence elf32_arm_stub_long_branch_arm_nacl_pic[] =
2472{
2473 ARM_INSN (0xe59fc00c), /* ldr ip, [pc, #12] */
2474 ARM_INSN (0xe08cc00f), /* add ip, ip, pc */
2475 ARM_INSN (0xe3ccc13f), /* bic ip, ip, #0xc000000f */
2476 ARM_INSN (0xe12fff1c), /* bx ip */
2477 ARM_INSN (0xe125be70), /* bkpt 0x5be0 */
2478 DATA_WORD (0, R_ARM_REL32, 8), /* dcd R_ARM_REL32(X+8) */
2479 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2480 DATA_WORD (0, R_ARM_NONE, 0), /* .word 0 */
2481};
2482
2483
48229727
JB		 2484/* Cortex-A8 erratum-workaround stubs. */
2485
2486/* Stub used for conditional branches (which may be beyond +/-1MB away, so we
2487 can't use a conditional branch to reach this stub). */
2488
2489static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] =
b38cadfb
NC		 2490{
2491 THUMB16_BCOND_INSN (0xd001), /* b<cond>.n true. */
2492 THUMB32_B_INSN (0xf000b800, -4), /* b.w insn_after_original_branch. */
2493 THUMB32_B_INSN (0xf000b800, -4) /* true: b.w original_branch_dest. */
2494};
48229727
JB		 2495
2496/* Stub used for b.w and bl.w instructions. */
2497
2498static const insn_sequence elf32_arm_stub_a8_veneer_b[] =
b38cadfb
NC		 2499{
2500 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2501};
48229727
JB		 2502
2503static const insn_sequence elf32_arm_stub_a8_veneer_bl[] =
b38cadfb
NC		 2504{
2505 THUMB32_B_INSN (0xf000b800, -4) /* b.w original_branch_dest. */
2506};
48229727
JB		 2507
2508/* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
2509 instruction (which switches to ARM mode) to point to this stub. Jump to the
2510 real destination using an ARM-mode branch. */
2511
2512static const insn_sequence elf32_arm_stub_a8_veneer_blx[] =
b38cadfb
NC		 2513{
2514 ARM_REL_INSN (0xea000000, -8) /* b original_branch_dest. */
2515};
48229727 2516
9553db3c
NC		 2517/* For each section group there can be a specially created linker section
2518 to hold the stubs for that group. The name of the stub section is based
2519 upon the name of another section within that group with the suffix below
2520 applied.
2521
2522 PR 13049: STUB_SUFFIX used to be ".stub", but this allowed the user to
2523 create what appeared to be a linker stub section when it actually
2524 contained user code/data. For example, consider this fragment:
b38cadfb 2525
9553db3c
NC		 2526 const char * stubborn_problems[] = { "np" };
2527
2528 If this is compiled with "-fPIC -fdata-sections" then gcc produces a
2529 section called:
2530
2531 .data.rel.local.stubborn_problems
2532
2533 This then causes problems in arm32_arm_build_stubs() as it triggers:
2534
2535 // Ignore non-stub sections.
2536 if (!strstr (stub_sec->name, STUB_SUFFIX))
2537 continue;
2538
2539 And so the section would be ignored instead of being processed. Hence
2540 the change in definition of STUB_SUFFIX to a name that cannot be a valid
2541 C identifier. */
2542#define STUB_SUFFIX ".__stub"
906e58ca 2543
738a79f6
CL		 2544/* One entry per long/short branch stub defined above. */
2545#define DEF_STUBS \
2546 DEF_STUB(long_branch_any_any) \
2547 DEF_STUB(long_branch_v4t_arm_thumb) \
2548 DEF_STUB(long_branch_thumb_only) \
2549 DEF_STUB(long_branch_v4t_thumb_thumb) \
2550 DEF_STUB(long_branch_v4t_thumb_arm) \
2551 DEF_STUB(short_branch_v4t_thumb_arm) \
2552 DEF_STUB(long_branch_any_arm_pic) \
2553 DEF_STUB(long_branch_any_thumb_pic) \
2554 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
2555 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
2556 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
48229727 2557 DEF_STUB(long_branch_thumb_only_pic) \
0855e32b
NS		 2558 DEF_STUB(long_branch_any_tls_pic) \
2559 DEF_STUB(long_branch_v4t_thumb_tls_pic) \
7a89b94e
NC		 2560 DEF_STUB(long_branch_arm_nacl) \
2561 DEF_STUB(long_branch_arm_nacl_pic) \
48229727
JB		 2562 DEF_STUB(a8_veneer_b_cond) \
2563 DEF_STUB(a8_veneer_b) \
2564 DEF_STUB(a8_veneer_bl) \
2565 DEF_STUB(a8_veneer_blx)
738a79f6
CL		 2566
2567#define DEF_STUB(x) arm_stub_##x,
b38cadfb
NC		 2568enum elf32_arm_stub_type
2569{
906e58ca 2570 arm_stub_none,
738a79f6 2571 DEF_STUBS
6a631e86 2572 /* Note the first a8_veneer type. */
eb7c4339 2573 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond
738a79f6
CL		 2574};
2575#undef DEF_STUB
2576
2577typedef struct
2578{
d3ce72d0 2579 const insn_sequence* template_sequence;
738a79f6
CL		 2580 int template_size;
2581} stub_def;
2582
2583#define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)},
b38cadfb
NC		 2584static const stub_def stub_definitions[] =
2585{
738a79f6
CL		 2586 {NULL, 0},
2587 DEF_STUBS
906e58ca
NC		 2588};
2589
2590struct elf32_arm_stub_hash_entry
2591{
2592 /* Base hash table entry structure. */
2593 struct bfd_hash_entry root;
2594
2595 /* The stub section. */
2596 asection *stub_sec;
2597
2598 /* Offset within stub_sec of the beginning of this stub. */
2599 bfd_vma stub_offset;
2600
2601 /* Given the symbol's value and its section we can determine its final
2602 value when building the stubs (so the stub knows where to jump). */
2603 bfd_vma target_value;
2604 asection *target_section;
2605
48229727
JB		 2606 /* Offset to apply to relocation referencing target_value. */
2607 bfd_vma target_addend;
2608
2609 /* The instruction which caused this stub to be generated (only valid for
2610 Cortex-A8 erratum workaround stubs at present). */
2611 unsigned long orig_insn;
2612
461a49ca 2613 /* The stub type. */
906e58ca 2614 enum elf32_arm_stub_type stub_type;
461a49ca
DJ		 2615 /* Its encoding size in bytes. */
2616 int stub_size;
2617 /* Its template. */
2618 const insn_sequence *stub_template;
2619 /* The size of the template (number of entries). */
2620 int stub_template_size;
906e58ca
NC		 2621
2622 /* The symbol table entry, if any, that this was derived from. */
2623 struct elf32_arm_link_hash_entry *h;
2624
35fc36a8
RS		 2625 /* Type of branch. */
2626 enum arm_st_branch_type branch_type;
906e58ca
NC		 2627
2628 /* Where this stub is being called from, or, in the case of combined
2629 stub sections, the first input section in the group. */
2630 asection *id_sec;
7413f23f
DJ		 2631
2632 /* The name for the local symbol at the start of this stub. The
2633 stub name in the hash table has to be unique; this does not, so
2634 it can be friendlier. */
2635 char *output_name;
906e58ca
NC		 2636};
2637
e489d0ae
PB		 2638/* Used to build a map of a section. This is required for mixed-endian
2639 code/data. */
2640
2641typedef struct elf32_elf_section_map
2642{
2643 bfd_vma vma;
2644 char type;
2645}
2646elf32_arm_section_map;
2647
c7b8f16e
JB		 2648/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2649
2650typedef enum
2651{
2652 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2653 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2654 VFP11_ERRATUM_ARM_VENEER,
2655 VFP11_ERRATUM_THUMB_VENEER
2656}
2657elf32_vfp11_erratum_type;
2658
2659typedef struct elf32_vfp11_erratum_list
2660{
2661 struct elf32_vfp11_erratum_list *next;
2662 bfd_vma vma;
2663 union
2664 {
2665 struct
2666 {
2667 struct elf32_vfp11_erratum_list *veneer;
2668 unsigned int vfp_insn;
2669 } b;
2670 struct
2671 {
2672 struct elf32_vfp11_erratum_list *branch;
2673 unsigned int id;
2674 } v;
2675 } u;
2676 elf32_vfp11_erratum_type type;
2677}
2678elf32_vfp11_erratum_list;
2679
2468f9c9
PB		 2680typedef enum
2681{
2682 DELETE_EXIDX_ENTRY,
2683 INSERT_EXIDX_CANTUNWIND_AT_END
2684}
2685arm_unwind_edit_type;
2686
2687/* A (sorted) list of edits to apply to an unwind table. */
2688typedef struct arm_unwind_table_edit
2689{
2690 arm_unwind_edit_type type;
2691 /* Note: we sometimes want to insert an unwind entry corresponding to a
2692 section different from the one we're currently writing out, so record the
2693 (text) section this edit relates to here. */
2694 asection *linked_section;
2695 unsigned int index;
2696 struct arm_unwind_table_edit *next;
2697}
2698arm_unwind_table_edit;
2699
8e3de13a 2700typedef struct _arm_elf_section_data
e489d0ae 2701{
2468f9c9 2702 /* Information about mapping symbols. */
e489d0ae 2703 struct bfd_elf_section_data elf;
8e3de13a 2704 unsigned int mapcount;
c7b8f16e 2705 unsigned int mapsize;
e489d0ae 2706 elf32_arm_section_map *map;
2468f9c9 2707 /* Information about CPU errata. */
c7b8f16e
JB		 2708 unsigned int erratumcount;
2709 elf32_vfp11_erratum_list *erratumlist;
2468f9c9
PB		 2710 /* Information about unwind tables. */
2711 union
2712 {
2713 /* Unwind info attached to a text section. */
2714 struct
2715 {
2716 asection *arm_exidx_sec;
2717 } text;
2718
2719 /* Unwind info attached to an .ARM.exidx section. */
2720 struct
2721 {
2722 arm_unwind_table_edit *unwind_edit_list;
2723 arm_unwind_table_edit *unwind_edit_tail;
2724 } exidx;
2725 } u;
8e3de13a
NC		 2726}
2727_arm_elf_section_data;
e489d0ae
PB		 2728
2729#define elf32_arm_section_data(sec) \
8e3de13a 2730 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2731
48229727
JB		 2732/* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum.
2733 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs),
2734 so may be created multiple times: we use an array of these entries whilst
2735 relaxing which we can refresh easily, then create stubs for each potentially
2736 erratum-triggering instruction once we've settled on a solution. */
2737
b38cadfb
NC		 2738struct a8_erratum_fix
2739{
48229727
JB		 2740 bfd *input_bfd;
2741 asection *section;
2742 bfd_vma offset;
2743 bfd_vma addend;
2744 unsigned long orig_insn;
2745 char *stub_name;
2746 enum elf32_arm_stub_type stub_type;
35fc36a8 2747 enum arm_st_branch_type branch_type;
48229727
JB		 2748};
2749
2750/* A table of relocs applied to branches which might trigger Cortex-A8
2751 erratum. */
2752
b38cadfb
NC		 2753struct a8_erratum_reloc
2754{
48229727
JB		 2755 bfd_vma from;
2756 bfd_vma destination;
92750f34
DJ		 2757 struct elf32_arm_link_hash_entry *hash;
2758 const char *sym_name;
48229727 2759 unsigned int r_type;
35fc36a8 2760 enum arm_st_branch_type branch_type;
48229727
JB		 2761 bfd_boolean non_a8_stub;
2762};
2763
ba93b8ac
DJ		 2764/* The size of the thread control block. */
2765#define TCB_SIZE 8
2766
34e77a92
RS		 2767/* ARM-specific information about a PLT entry, over and above the usual
2768 gotplt_union. */
b38cadfb
NC		 2769struct arm_plt_info
2770{
34e77a92
RS		 2771 /* We reference count Thumb references to a PLT entry separately,
2772 so that we can emit the Thumb trampoline only if needed. */
2773 bfd_signed_vma thumb_refcount;
2774
2775 /* Some references from Thumb code may be eliminated by BL->BLX
2776 conversion, so record them separately. */
2777 bfd_signed_vma maybe_thumb_refcount;
2778
2779 /* How many of the recorded PLT accesses were from non-call relocations.
2780 This information is useful when deciding whether anything takes the
2781 address of an STT_GNU_IFUNC PLT. A value of 0 means that all
2782 non-call references to the function should resolve directly to the
2783 real runtime target. */
2784 unsigned int noncall_refcount;
2785
2786 /* Since PLT entries have variable size if the Thumb prologue is
2787 used, we need to record the index into .got.plt instead of
2788 recomputing it from the PLT offset. */
2789 bfd_signed_vma got_offset;
2790};
2791
2792/* Information about an .iplt entry for a local STT_GNU_IFUNC symbol. */
b38cadfb
NC		 2793struct arm_local_iplt_info
2794{
34e77a92
RS		 2795 /* The information that is usually found in the generic ELF part of
2796 the hash table entry. */
2797 union gotplt_union root;
2798
2799 /* The information that is usually found in the ARM-specific part of
2800 the hash table entry. */
2801 struct arm_plt_info arm;
2802
2803 /* A list of all potential dynamic relocations against this symbol. */
2804 struct elf_dyn_relocs *dyn_relocs;
2805};
2806
0ffa91dd 2807struct elf_arm_obj_tdata
ba93b8ac
DJ		 2808{
2809 struct elf_obj_tdata root;
2810
2811 /* tls_type for each local got entry. */
2812 char *local_got_tls_type;
ee065d83 2813
0855e32b
NS		 2814 /* GOTPLT entries for TLS descriptors. */
2815 bfd_vma *local_tlsdesc_gotent;
2816
34e77a92
RS		 2817 /* Information for local symbols that need entries in .iplt. */
2818 struct arm_local_iplt_info **local_iplt;
2819
bf21ed78
MS		 2820 /* Zero to warn when linking objects with incompatible enum sizes. */
2821 int no_enum_size_warning;
a9dc9481
JM		 2822
2823 /* Zero to warn when linking objects with incompatible wchar_t sizes. */
2824 int no_wchar_size_warning;
ba93b8ac
DJ		 2825};
2826
0ffa91dd
NC		 2827#define elf_arm_tdata(bfd) \
2828 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2829
0ffa91dd
NC		 2830#define elf32_arm_local_got_tls_type(bfd) \
2831 (elf_arm_tdata (bfd)->local_got_tls_type)
2832
0855e32b
NS		 2833#define elf32_arm_local_tlsdesc_gotent(bfd) \
2834 (elf_arm_tdata (bfd)->local_tlsdesc_gotent)
2835
34e77a92
RS		 2836#define elf32_arm_local_iplt(bfd) \
2837 (elf_arm_tdata (bfd)->local_iplt)
2838
0ffa91dd
NC		 2839#define is_arm_elf(bfd) \
2840 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2841 && elf_tdata (bfd) != NULL \
4dfe6ac6 2842 && elf_object_id (bfd) == ARM_ELF_DATA)
ba93b8ac
DJ		 2843
2844static bfd_boolean
2845elf32_arm_mkobject (bfd *abfd)
2846{
0ffa91dd 2847 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
4dfe6ac6 2848 ARM_ELF_DATA);
ba93b8ac
DJ		 2849}
2850
ba93b8ac
DJ		 2851#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2852
ba96a88f 2853/* Arm ELF linker hash entry. */
252b5132 2854struct elf32_arm_link_hash_entry
b38cadfb
NC		 2855{
2856 struct elf_link_hash_entry root;
252b5132 2857
b38cadfb
NC		 2858 /* Track dynamic relocs copied for this symbol. */
2859 struct elf_dyn_relocs *dyn_relocs;
b7693d02 2860
b38cadfb
NC		 2861 /* ARM-specific PLT information. */
2862 struct arm_plt_info plt;
ba93b8ac
DJ		 2863
2864#define GOT_UNKNOWN 0
2865#define GOT_NORMAL 1
2866#define GOT_TLS_GD 2
2867#define GOT_TLS_IE 4
0855e32b
NS		 2868#define GOT_TLS_GDESC 8
2869#define GOT_TLS_GD_ANY_P(type) ((type & GOT_TLS_GD) || (type & GOT_TLS_GDESC))
b38cadfb 2870 unsigned int tls_type : 8;
34e77a92 2871
b38cadfb
NC		 2872 /* True if the symbol's PLT entry is in .iplt rather than .plt. */
2873 unsigned int is_iplt : 1;
34e77a92 2874
b38cadfb 2875 unsigned int unused : 23;
a4fd1a8e 2876
b38cadfb
NC		 2877 /* Offset of the GOTPLT entry reserved for the TLS descriptor,
2878 starting at the end of the jump table. */
2879 bfd_vma tlsdesc_got;
0855e32b 2880
b38cadfb
NC		 2881 /* The symbol marking the real symbol location for exported thumb
2882 symbols with Arm stubs. */
2883 struct elf_link_hash_entry *export_glue;
906e58ca 2884
b38cadfb 2885 /* A pointer to the most recently used stub hash entry against this
8029a119 2886 symbol. */
b38cadfb
NC		 2887 struct elf32_arm_stub_hash_entry *stub_cache;
2888};
252b5132 2889
252b5132 2890/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2891#define elf32_arm_link_hash_traverse(table, func, info) \
2892 (elf_link_hash_traverse \
2893 (&(table)->root, \
b7693d02 2894 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2895 (info)))
2896
2897/* Get the ARM elf linker hash table from a link_info structure. */
2898#define elf32_arm_hash_table(info) \
4dfe6ac6
NC		 2899 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \
2900 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL)
252b5132 2901
906e58ca
NC		 2902#define arm_stub_hash_lookup(table, string, create, copy) \
2903 ((struct elf32_arm_stub_hash_entry *) \
2904 bfd_hash_lookup ((table), (string), (create), (copy)))
2905
21d799b5
NC		 2906/* Array to keep track of which stub sections have been created, and
2907 information on stub grouping. */
2908struct map_stub
2909{
2910 /* This is the section to which stubs in the group will be
2911 attached. */
2912 asection *link_sec;
2913 /* The stub section. */
2914 asection *stub_sec;
2915};
2916
0855e32b
NS		 2917#define elf32_arm_compute_jump_table_size(htab) \
2918 ((htab)->next_tls_desc_index * 4)
2919
9b485d32 2920/* ARM ELF linker hash table. */
252b5132 2921struct elf32_arm_link_hash_table
906e58ca
NC		 2922{
2923 /* The main hash table. */
2924 struct elf_link_hash_table root;
252b5132 2925
906e58ca
NC		 2926 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
2927 bfd_size_type thumb_glue_size;
252b5132 2928
906e58ca
NC		 2929 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
2930 bfd_size_type arm_glue_size;
252b5132 2931
906e58ca
NC		 2932 /* The size in bytes of section containing the ARMv4 BX veneers. */
2933 bfd_size_type bx_glue_size;
845b51d6 2934
906e58ca
NC		 2935 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2936 veneer has been populated. */
2937 bfd_vma bx_glue_offset[15];
845b51d6 2938
906e58ca
NC		 2939 /* The size in bytes of the section containing glue for VFP11 erratum
2940 veneers. */
2941 bfd_size_type vfp11_erratum_glue_size;
c7b8f16e 2942
48229727
JB		 2943 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This
2944 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and
2945 elf32_arm_write_section(). */
2946 struct a8_erratum_fix *a8_erratum_fixes;
2947 unsigned int num_a8_erratum_fixes;
2948
906e58ca
NC		 2949 /* An arbitrary input BFD chosen to hold the glue sections. */
2950 bfd * bfd_of_glue_owner;
ba96a88f 2951
906e58ca
NC		 2952 /* Nonzero to output a BE8 image. */
2953 int byteswap_code;
e489d0ae 2954
906e58ca
NC		 2955 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
2956 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
2957 int target1_is_rel;
9c504268 2958
906e58ca
NC		 2959 /* The relocation to use for R_ARM_TARGET2 relocations. */
2960 int target2_reloc;
eb043451 2961
906e58ca
NC		 2962 /* 0 = Ignore R_ARM_V4BX.
2963 1 = Convert BX to MOV PC.
2964 2 = Generate v4 interworing stubs. */
2965 int fix_v4bx;
319850b4 2966
48229727
JB		 2967 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */
2968 int fix_cortex_a8;
2969
2de70689
MGD		 2970 /* Whether we should fix the ARM1176 BLX immediate issue. */
2971 int fix_arm1176;
2972
906e58ca
NC		 2973 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2974 int use_blx;
33bfe774 2975
906e58ca
NC		 2976 /* What sort of code sequences we should look for which may trigger the
2977 VFP11 denorm erratum. */
2978 bfd_arm_vfp11_fix vfp11_fix;
c7b8f16e 2979
906e58ca
NC		 2980 /* Global counter for the number of fixes we have emitted. */
2981 int num_vfp11_fixes;
c7b8f16e 2982
906e58ca
NC		 2983 /* Nonzero to force PIC branch veneers. */
2984 int pic_veneer;
27e55c4d 2985
906e58ca
NC		 2986 /* The number of bytes in the initial entry in the PLT. */
2987 bfd_size_type plt_header_size;
e5a52504 2988
906e58ca
NC		 2989 /* The number of bytes in the subsequent PLT etries. */
2990 bfd_size_type plt_entry_size;
e5a52504 2991
906e58ca
NC		 2992 /* True if the target system is VxWorks. */
2993 int vxworks_p;
00a97672 2994
906e58ca
NC		 2995 /* True if the target system is Symbian OS. */
2996 int symbian_p;
e5a52504 2997
b38cadfb
NC		 2998 /* True if the target system is Native Client. */
2999 int nacl_p;
3000
906e58ca
NC		 3001 /* True if the target uses REL relocations. */
3002 int use_rel;
4e7fd91e 3003
0855e32b
NS		 3004 /* The index of the next unused R_ARM_TLS_DESC slot in .rel.plt. */
3005 bfd_vma next_tls_desc_index;
3006
3007 /* How many R_ARM_TLS_DESC relocations were generated so far. */
3008 bfd_vma num_tls_desc;
3009
906e58ca 3010 /* Short-cuts to get to dynamic linker sections. */
906e58ca
NC		 3011 asection *sdynbss;
3012 asection *srelbss;
5e681ec4 3013
906e58ca
NC		 3014 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
3015 asection *srelplt2;
00a97672 3016
0855e32b
NS		 3017 /* The offset into splt of the PLT entry for the TLS descriptor
3018 resolver. Special values are 0, if not necessary (or not found
3019 to be necessary yet), and -1 if needed but not determined
3020 yet. */
3021 bfd_vma dt_tlsdesc_plt;
3022
3023 /* The offset into sgot of the GOT entry used by the PLT entry
3024 above. */
b38cadfb 3025 bfd_vma dt_tlsdesc_got;
0855e32b
NS		 3026
3027 /* Offset in .plt section of tls_arm_trampoline. */
3028 bfd_vma tls_trampoline;
3029
906e58ca
NC		 3030 /* Data for R_ARM_TLS_LDM32 relocations. */
3031 union
3032 {
3033 bfd_signed_vma refcount;
3034 bfd_vma offset;
3035 } tls_ldm_got;
b7693d02 3036
87d72d41
AM		 3037 /* Small local sym cache. */
3038 struct sym_cache sym_cache;
906e58ca
NC		 3039
3040 /* For convenience in allocate_dynrelocs. */
3041 bfd * obfd;
3042
0855e32b
NS		 3043 /* The amount of space used by the reserved portion of the sgotplt
3044 section, plus whatever space is used by the jump slots. */
3045 bfd_vma sgotplt_jump_table_size;
3046
906e58ca
NC		 3047 /* The stub hash table. */
3048 struct bfd_hash_table stub_hash_table;
3049
3050 /* Linker stub bfd. */
3051 bfd *stub_bfd;
3052
3053 /* Linker call-backs. */
7a89b94e 3054 asection * (*add_stub_section) (const char *, asection *, unsigned int);
906e58ca
NC		 3055 void (*layout_sections_again) (void);
3056
3057 /* Array to keep track of which stub sections have been created, and
3058 information on stub grouping. */
21d799b5 3059 struct map_stub *stub_group;
906e58ca 3060
fe33d2fa
CL		 3061 /* Number of elements in stub_group. */
3062 int top_id;
3063
906e58ca
NC		 3064 /* Assorted information used by elf32_arm_size_stubs. */
3065 unsigned int bfd_count;
3066 int top_index;
3067 asection **input_list;
3068};
252b5132 3069
780a67af
NC		 3070/* Create an entry in an ARM ELF linker hash table. */
3071
3072static struct bfd_hash_entry *
57e8b36a 3073elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
99059e56
RM		 3074 struct bfd_hash_table * table,
3075 const char * string)
780a67af
NC		 3076{
3077 struct elf32_arm_link_hash_entry * ret =
3078 (struct elf32_arm_link_hash_entry *) entry;
3079
3080 /* Allocate the structure if it has not already been allocated by a
3081 subclass. */
906e58ca 3082 if (ret == NULL)
21d799b5 3083 ret = (struct elf32_arm_link_hash_entry *)
99059e56 3084 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
57e8b36a 3085 if (ret == NULL)
780a67af
NC		 3086 return (struct bfd_hash_entry *) ret;
3087
3088 /* Call the allocation method of the superclass. */
3089 ret = ((struct elf32_arm_link_hash_entry *)
3090 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
3091 table, string));
57e8b36a 3092 if (ret != NULL)
b7693d02 3093 {
0bdcacaf 3094 ret->dyn_relocs = NULL;
ba93b8ac 3095 ret->tls_type = GOT_UNKNOWN;
0855e32b 3096 ret->tlsdesc_got = (bfd_vma) -1;
34e77a92
RS		 3097 ret->plt.thumb_refcount = 0;
3098 ret->plt.maybe_thumb_refcount = 0;
3099 ret->plt.noncall_refcount = 0;
3100 ret->plt.got_offset = -1;
3101 ret->is_iplt = FALSE;
a4fd1a8e 3102 ret->export_glue = NULL;
906e58ca
NC		 3103
3104 ret->stub_cache = NULL;
b7693d02 3105 }
780a67af
NC		 3106
3107 return (struct bfd_hash_entry *) ret;
3108}
3109
34e77a92
RS		 3110/* Ensure that we have allocated bookkeeping structures for ABFD's local
3111 symbols. */
3112
3113static bfd_boolean
3114elf32_arm_allocate_local_sym_info (bfd *abfd)
3115{
3116 if (elf_local_got_refcounts (abfd) == NULL)
3117 {
3118 bfd_size_type num_syms;
3119 bfd_size_type size;
3120 char *data;
3121
3122 num_syms = elf_tdata (abfd)->symtab_hdr.sh_info;
3123 size = num_syms * (sizeof (bfd_signed_vma)
3124 + sizeof (struct arm_local_iplt_info *)
3125 + sizeof (bfd_vma)
3126 + sizeof (char));
3127 data = bfd_zalloc (abfd, size);
3128 if (data == NULL)
3129 return FALSE;
3130
3131 elf_local_got_refcounts (abfd) = (bfd_signed_vma *) data;
3132 data += num_syms * sizeof (bfd_signed_vma);
3133
3134 elf32_arm_local_iplt (abfd) = (struct arm_local_iplt_info **) data;
3135 data += num_syms * sizeof (struct arm_local_iplt_info *);
3136
3137 elf32_arm_local_tlsdesc_gotent (abfd) = (bfd_vma *) data;
3138 data += num_syms * sizeof (bfd_vma);
3139
3140 elf32_arm_local_got_tls_type (abfd) = data;
3141 }
3142 return TRUE;
3143}
3144
3145/* Return the .iplt information for local symbol R_SYMNDX, which belongs
3146 to input bfd ABFD. Create the information if it doesn't already exist.
3147 Return null if an allocation fails. */
3148
3149static struct arm_local_iplt_info *
3150elf32_arm_create_local_iplt (bfd *abfd, unsigned long r_symndx)
3151{
3152 struct arm_local_iplt_info **ptr;
3153
3154 if (!elf32_arm_allocate_local_sym_info (abfd))
3155 return NULL;
3156
3157 BFD_ASSERT (r_symndx < elf_tdata (abfd)->symtab_hdr.sh_info);
3158 ptr = &elf32_arm_local_iplt (abfd)[r_symndx];
3159 if (*ptr == NULL)
3160 *ptr = bfd_zalloc (abfd, sizeof (**ptr));
3161 return *ptr;
3162}
3163
3164/* Try to obtain PLT information for the symbol with index R_SYMNDX
3165 in ABFD's symbol table. If the symbol is global, H points to its
3166 hash table entry, otherwise H is null.
3167
3168 Return true if the symbol does have PLT information. When returning
3169 true, point *ROOT_PLT at the target-independent reference count/offset
3170 union and *ARM_PLT at the ARM-specific information. */
3171
3172static bfd_boolean
3173elf32_arm_get_plt_info (bfd *abfd, struct elf32_arm_link_hash_entry *h,
3174 unsigned long r_symndx, union gotplt_union **root_plt,
3175 struct arm_plt_info **arm_plt)
3176{
3177 struct arm_local_iplt_info *local_iplt;
3178
3179 if (h != NULL)
3180 {
3181 *root_plt = &h->root.plt;
3182 *arm_plt = &h->plt;
3183 return TRUE;
3184 }
3185
3186 if (elf32_arm_local_iplt (abfd) == NULL)
3187 return FALSE;
3188
3189 local_iplt = elf32_arm_local_iplt (abfd)[r_symndx];
3190 if (local_iplt == NULL)
3191 return FALSE;
3192
3193 *root_plt = &local_iplt->root;
3194 *arm_plt = &local_iplt->arm;
3195 return TRUE;
3196}
3197
3198/* Return true if the PLT described by ARM_PLT requires a Thumb stub
3199 before it. */
3200
3201static bfd_boolean
3202elf32_arm_plt_needs_thumb_stub_p (struct bfd_link_info *info,
3203 struct arm_plt_info *arm_plt)
3204{
3205 struct elf32_arm_link_hash_table *htab;
3206
3207 htab = elf32_arm_hash_table (info);
3208 return (arm_plt->thumb_refcount != 0
3209 || (!htab->use_blx && arm_plt->maybe_thumb_refcount != 0));
3210}
3211
3212/* Return a pointer to the head of the dynamic reloc list that should
3213 be used for local symbol ISYM, which is symbol number R_SYMNDX in
3214 ABFD's symbol table. Return null if an error occurs. */
3215
3216static struct elf_dyn_relocs **
3217elf32_arm_get_local_dynreloc_list (bfd *abfd, unsigned long r_symndx,
3218 Elf_Internal_Sym *isym)
3219{
3220 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC)
3221 {
3222 struct arm_local_iplt_info *local_iplt;
3223
3224 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
3225 if (local_iplt == NULL)
3226 return NULL;
3227 return &local_iplt->dyn_relocs;
3228 }
3229 else
3230 {
3231 /* Track dynamic relocs needed for local syms too.
3232 We really need local syms available to do this
3233 easily. Oh well. */
3234 asection *s;
3235 void *vpp;
3236
3237 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
3238 if (s == NULL)
3239 abort ();
3240
3241 vpp = &elf_section_data (s)->local_dynrel;
3242 return (struct elf_dyn_relocs **) vpp;
3243 }
3244}
3245
906e58ca
NC		 3246/* Initialize an entry in the stub hash table. */
3247
3248static struct bfd_hash_entry *
3249stub_hash_newfunc (struct bfd_hash_entry *entry,
3250 struct bfd_hash_table *table,
3251 const char *string)
3252{
3253 /* Allocate the structure if it has not already been allocated by a
3254 subclass. */
3255 if (entry == NULL)
3256 {
21d799b5 3257 entry = (struct bfd_hash_entry *)
99059e56 3258 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry));
906e58ca
NC		 3259 if (entry == NULL)
3260 return entry;
3261 }
3262
3263 /* Call the allocation method of the superclass. */
3264 entry = bfd_hash_newfunc (entry, table, string);
3265 if (entry != NULL)
3266 {
3267 struct elf32_arm_stub_hash_entry *eh;
3268
3269 /* Initialize the local fields. */
3270 eh = (struct elf32_arm_stub_hash_entry *) entry;
3271 eh->stub_sec = NULL;
3272 eh->stub_offset = 0;
3273 eh->target_value = 0;
3274 eh->target_section = NULL;
cedfb179
DK		 3275 eh->target_addend = 0;
3276 eh->orig_insn = 0;
906e58ca 3277 eh->stub_type = arm_stub_none;
461a49ca
DJ		 3278 eh->stub_size = 0;
3279 eh->stub_template = NULL;
3280 eh->stub_template_size = 0;
906e58ca
NC		 3281 eh->h = NULL;
3282 eh->id_sec = NULL;
d8d2f433 3283 eh->output_name = NULL;
906e58ca
NC		 3284 }
3285
3286 return entry;
3287}
3288
00a97672 3289/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 3290 shortcuts to them in our hash table. */
3291
3292static bfd_boolean
57e8b36a 3293create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3294{
3295 struct elf32_arm_link_hash_table *htab;
3296
e5a52504 3297 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3298 if (htab == NULL)
3299 return FALSE;
3300
e5a52504
MM		 3301 /* BPABI objects never have a GOT, or associated sections. */
3302 if (htab->symbian_p)
3303 return TRUE;
3304
5e681ec4
PB		 3305 if (! _bfd_elf_create_got_section (dynobj, info))
3306 return FALSE;
3307
5e681ec4
PB		 3308 return TRUE;
3309}
3310
34e77a92
RS		 3311/* Create the .iplt, .rel(a).iplt and .igot.plt sections. */
3312
3313static bfd_boolean
3314create_ifunc_sections (struct bfd_link_info *info)
3315{
3316 struct elf32_arm_link_hash_table *htab;
3317 const struct elf_backend_data *bed;
3318 bfd *dynobj;
3319 asection *s;
3320 flagword flags;
b38cadfb 3321
34e77a92
RS		 3322 htab = elf32_arm_hash_table (info);
3323 dynobj = htab->root.dynobj;
3324 bed = get_elf_backend_data (dynobj);
3325 flags = bed->dynamic_sec_flags;
3326
3327 if (htab->root.iplt == NULL)
3328 {
3d4d4302
AM		 3329 s = bfd_make_section_anyway_with_flags (dynobj, ".iplt",
3330 flags | SEC_READONLY | SEC_CODE);
34e77a92 3331 if (s == NULL
a0f49396 3332 || !bfd_set_section_alignment (dynobj, s, bed->plt_alignment))
34e77a92
RS		 3333 return FALSE;
3334 htab->root.iplt = s;
3335 }
3336
3337 if (htab->root.irelplt == NULL)
3338 {
3d4d4302
AM		 3339 s = bfd_make_section_anyway_with_flags (dynobj,
3340 RELOC_SECTION (htab, ".iplt"),
3341 flags | SEC_READONLY);
34e77a92 3342 if (s == NULL
a0f49396 3343 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
34e77a92
RS		 3344 return FALSE;
3345 htab->root.irelplt = s;
3346 }
3347
3348 if (htab->root.igotplt == NULL)
3349 {
3d4d4302 3350 s = bfd_make_section_anyway_with_flags (dynobj, ".igot.plt", flags);
34e77a92
RS		 3351 if (s == NULL
3352 || !bfd_set_section_alignment (dynobj, s, bed->s->log_file_align))
3353 return FALSE;
3354 htab->root.igotplt = s;
3355 }
3356 return TRUE;
3357}
3358
eed94f8f
NC		 3359/* Determine if we're dealing with a Thumb only architecture. */
3360
3361static bfd_boolean
3362using_thumb_only (struct elf32_arm_link_hash_table *globals)
3363{
3364 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3365 Tag_CPU_arch);
3366 int profile;
3367
3368 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M)
3369 return TRUE;
3370
3371 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M)
3372 return FALSE;
3373
3374 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3375 Tag_CPU_arch_profile);
3376
3377 return profile == 'M';
3378}
3379
3380/* Determine if we're dealing with a Thumb-2 object. */
3381
3382static bfd_boolean
3383using_thumb2 (struct elf32_arm_link_hash_table *globals)
3384{
3385 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3386 Tag_CPU_arch);
3387 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
3388}
3389
00a97672
RS		 3390/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
3391 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 3392 hash table. */
3393
3394static bfd_boolean
57e8b36a 3395elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 3396{
3397 struct elf32_arm_link_hash_table *htab;
3398
3399 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3400 if (htab == NULL)
3401 return FALSE;
3402
362d30a1 3403 if (!htab->root.sgot && !create_got_section (dynobj, info))
5e681ec4
PB		 3404 return FALSE;
3405
3406 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
3407 return FALSE;
3408
3d4d4302 3409 htab->sdynbss = bfd_get_linker_section (dynobj, ".dynbss");
5e681ec4 3410 if (!info->shared)
3d4d4302
AM		 3411 htab->srelbss = bfd_get_linker_section (dynobj,
3412 RELOC_SECTION (htab, ".bss"));
00a97672
RS		 3413
3414 if (htab->vxworks_p)
3415 {
3416 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
3417 return FALSE;
3418
3419 if (info->shared)
3420 {
3421 htab->plt_header_size = 0;
3422 htab->plt_entry_size
3423 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
3424 }
3425 else
3426 {
3427 htab->plt_header_size
3428 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
3429 htab->plt_entry_size
3430 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
3431 }
3432 }
eed94f8f
NC		 3433 else
3434 {
3435 /* PR ld/16017
3436 Test for thumb only architectures. Note - we cannot just call
3437 using_thumb_only() as the attributes in the output bfd have not been
3438 initialised at this point, so instead we use the input bfd. */
3439 bfd * saved_obfd = htab->obfd;
3440
3441 htab->obfd = dynobj;
3442 if (using_thumb_only (htab))
3443 {
3444 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
3445 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
3446 }
3447 htab->obfd = saved_obfd;
3448 }
5e681ec4 3449
362d30a1
RS		 3450 if (!htab->root.splt
3451 || !htab->root.srelplt
e5a52504 3452 || !htab->sdynbss
5e681ec4
PB		 3453 || (!info->shared && !htab->srelbss))
3454 abort ();
3455
3456 return TRUE;
3457}
3458
906e58ca
NC		 3459/* Copy the extra info we tack onto an elf_link_hash_entry. */
3460
3461static void
3462elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
3463 struct elf_link_hash_entry *dir,
3464 struct elf_link_hash_entry *ind)
3465{
3466 struct elf32_arm_link_hash_entry *edir, *eind;
3467
3468 edir = (struct elf32_arm_link_hash_entry *) dir;
3469 eind = (struct elf32_arm_link_hash_entry *) ind;
3470
0bdcacaf 3471 if (eind->dyn_relocs != NULL)
906e58ca 3472 {
0bdcacaf 3473 if (edir->dyn_relocs != NULL)
906e58ca 3474 {
0bdcacaf
RS		 3475 struct elf_dyn_relocs **pp;
3476 struct elf_dyn_relocs *p;
906e58ca
NC		 3477
3478 /* Add reloc counts against the indirect sym to the direct sym
3479 list. Merge any entries against the same section. */
0bdcacaf 3480 for (pp = &eind->dyn_relocs; (p = *pp) != NULL; )
906e58ca 3481 {
0bdcacaf 3482 struct elf_dyn_relocs *q;
906e58ca 3483
0bdcacaf
RS		 3484 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3485 if (q->sec == p->sec)
906e58ca
NC		 3486 {
3487 q->pc_count += p->pc_count;
3488 q->count += p->count;
3489 *pp = p->next;
3490 break;
3491 }
3492 if (q == NULL)
3493 pp = &p->next;
3494 }
0bdcacaf 3495 *pp = edir->dyn_relocs;
906e58ca
NC		 3496 }
3497
0bdcacaf
RS		 3498 edir->dyn_relocs = eind->dyn_relocs;
3499 eind->dyn_relocs = NULL;
906e58ca
NC		 3500 }
3501
3502 if (ind->root.type == bfd_link_hash_indirect)
3503 {
3504 /* Copy over PLT info. */
34e77a92
RS		 3505 edir->plt.thumb_refcount += eind->plt.thumb_refcount;
3506 eind->plt.thumb_refcount = 0;
3507 edir->plt.maybe_thumb_refcount += eind->plt.maybe_thumb_refcount;
3508 eind->plt.maybe_thumb_refcount = 0;
3509 edir->plt.noncall_refcount += eind->plt.noncall_refcount;
3510 eind->plt.noncall_refcount = 0;
3511
3512 /* We should only allocate a function to .iplt once the final
3513 symbol information is known. */
3514 BFD_ASSERT (!eind->is_iplt);
906e58ca
NC		 3515
3516 if (dir->got.refcount <= 0)
3517 {
3518 edir->tls_type = eind->tls_type;
3519 eind->tls_type = GOT_UNKNOWN;
3520 }
3521 }
3522
3523 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3524}
3525
68faa637
AM		 3526/* Destroy an ARM elf linker hash table. */
3527
3528static void
d495ab0d 3529elf32_arm_link_hash_table_free (bfd *obfd)
68faa637
AM		 3530{
3531 struct elf32_arm_link_hash_table *ret
d495ab0d 3532 = (struct elf32_arm_link_hash_table *) obfd->link.hash;
68faa637
AM		 3533
3534 bfd_hash_table_free (&ret->stub_hash_table);
d495ab0d 3535 _bfd_elf_link_hash_table_free (obfd);
68faa637
AM		 3536}
3537
906e58ca
NC		 3538/* Create an ARM elf linker hash table. */
3539
3540static struct bfd_link_hash_table *
3541elf32_arm_link_hash_table_create (bfd *abfd)
3542{
3543 struct elf32_arm_link_hash_table *ret;
3544 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
3545
7bf52ea2 3546 ret = (struct elf32_arm_link_hash_table *) bfd_zmalloc (amt);
906e58ca
NC		 3547 if (ret == NULL)
3548 return NULL;
3549
3550 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
3551 elf32_arm_link_hash_newfunc,
4dfe6ac6
NC		 3552 sizeof (struct elf32_arm_link_hash_entry),
3553 ARM_ELF_DATA))
906e58ca
NC		 3554 {
3555 free (ret);
3556 return NULL;
3557 }
3558
906e58ca 3559 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
906e58ca
NC		 3560#ifdef FOUR_WORD_PLT
3561 ret->plt_header_size = 16;
3562 ret->plt_entry_size = 16;
3563#else
3564 ret->plt_header_size = 20;
1db37fe6 3565 ret->plt_entry_size = elf32_arm_use_long_plt_entry ? 16 : 12;
906e58ca 3566#endif
906e58ca 3567 ret->use_rel = 1;
906e58ca 3568 ret->obfd = abfd;
906e58ca
NC		 3569
3570 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc,
3571 sizeof (struct elf32_arm_stub_hash_entry)))
3572 {
d495ab0d 3573 _bfd_elf_link_hash_table_free (abfd);
906e58ca
NC		 3574 return NULL;
3575 }
d495ab0d 3576 ret->root.root.hash_table_free = elf32_arm_link_hash_table_free;
906e58ca
NC		 3577
3578 return &ret->root.root;
3579}
3580
cd1dac3d
DG		 3581/* Determine what kind of NOPs are available. */
3582
3583static bfd_boolean
3584arch_has_arm_nop (struct elf32_arm_link_hash_table *globals)
3585{
3586 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3587 Tag_CPU_arch);
3588 return arch == TAG_CPU_ARCH_V6T2
3589 || arch == TAG_CPU_ARCH_V6K
9e3c6df6
PB		 3590 || arch == TAG_CPU_ARCH_V7
3591 || arch == TAG_CPU_ARCH_V7E_M;
cd1dac3d
DG		 3592}
3593
3594static bfd_boolean
3595arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals)
3596{
3597 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3598 Tag_CPU_arch);
9e3c6df6
PB		 3599 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7
3600 || arch == TAG_CPU_ARCH_V7E_M);
cd1dac3d
DG		 3601}
3602
f4ac8484
DJ		 3603static bfd_boolean
3604arm_stub_is_thumb (enum elf32_arm_stub_type stub_type)
3605{
3606 switch (stub_type)
3607 {
fea2b4d6
CL		 3608 case arm_stub_long_branch_thumb_only:
3609 case arm_stub_long_branch_v4t_thumb_arm:
3610 case arm_stub_short_branch_v4t_thumb_arm:
ebe24dd4 3611 case arm_stub_long_branch_v4t_thumb_arm_pic:
12352d3f 3612 case arm_stub_long_branch_v4t_thumb_tls_pic:
ebe24dd4 3613 case arm_stub_long_branch_thumb_only_pic:
f4ac8484
DJ		 3614 return TRUE;
3615 case arm_stub_none:
3616 BFD_FAIL ();
3617 return FALSE;
3618 break;
3619 default:
3620 return FALSE;
3621 }
3622}
3623
906e58ca
NC		 3624/* Determine the type of stub needed, if any, for a call. */
3625
3626static enum elf32_arm_stub_type
3627arm_type_of_stub (struct bfd_link_info *info,
3628 asection *input_sec,
3629 const Elf_Internal_Rela *rel,
34e77a92 3630 unsigned char st_type,
35fc36a8 3631 enum arm_st_branch_type *actual_branch_type,
906e58ca 3632 struct elf32_arm_link_hash_entry *hash,
c820be07
NC		 3633 bfd_vma destination,
3634 asection *sym_sec,
3635 bfd *input_bfd,
3636 const char *name)
906e58ca
NC		 3637{
3638 bfd_vma location;
3639 bfd_signed_vma branch_offset;
3640 unsigned int r_type;
3641 struct elf32_arm_link_hash_table * globals;
3642 int thumb2;
3643 int thumb_only;
3644 enum elf32_arm_stub_type stub_type = arm_stub_none;
5fa9e92f 3645 int use_plt = 0;
35fc36a8 3646 enum arm_st_branch_type branch_type = *actual_branch_type;
34e77a92
RS		 3647 union gotplt_union *root_plt;
3648 struct arm_plt_info *arm_plt;
906e58ca 3649
35fc36a8 3650 if (branch_type == ST_BRANCH_LONG)
da5938a2
NC		 3651 return stub_type;
3652
906e58ca 3653 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 3654 if (globals == NULL)
3655 return stub_type;
906e58ca
NC		 3656
3657 thumb_only = using_thumb_only (globals);
3658
3659 thumb2 = using_thumb2 (globals);
3660
3661 /* Determine where the call point is. */
3662 location = (input_sec->output_offset
3663 + input_sec->output_section->vma
3664 + rel->r_offset);
3665
906e58ca
NC		 3666 r_type = ELF32_R_TYPE (rel->r_info);
3667
39f21624
NC		 3668 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
3669 are considering a function call relocation. */
3670 if (thumb_only && (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
3671 && branch_type == ST_BRANCH_TO_ARM)
3672 branch_type = ST_BRANCH_TO_THUMB;
3673
34e77a92
RS		 3674 /* For TLS call relocs, it is the caller's responsibility to provide
3675 the address of the appropriate trampoline. */
3676 if (r_type != R_ARM_TLS_CALL
3677 && r_type != R_ARM_THM_TLS_CALL
3678 && elf32_arm_get_plt_info (input_bfd, hash, ELF32_R_SYM (rel->r_info),
3679 &root_plt, &arm_plt)
3680 && root_plt->offset != (bfd_vma) -1)
5fa9e92f 3681 {
34e77a92 3682 asection *splt;
fe33d2fa 3683
34e77a92
RS		 3684 if (hash == NULL || hash->is_iplt)
3685 splt = globals->root.iplt;
3686 else
3687 splt = globals->root.splt;
3688 if (splt != NULL)
b38cadfb 3689 {
34e77a92
RS		 3690 use_plt = 1;
3691
3692 /* Note when dealing with PLT entries: the main PLT stub is in
3693 ARM mode, so if the branch is in Thumb mode, another
3694 Thumb->ARM stub will be inserted later just before the ARM
3695 PLT stub. We don't take this extra distance into account
3696 here, because if a long branch stub is needed, we'll add a
3697 Thumb->Arm one and branch directly to the ARM PLT entry
3698 because it avoids spreading offset corrections in several
3699 places. */
3700
3701 destination = (splt->output_section->vma
3702 + splt->output_offset
3703 + root_plt->offset);
3704 st_type = STT_FUNC;
3705 branch_type = ST_BRANCH_TO_ARM;
3706 }
5fa9e92f 3707 }
34e77a92
RS		 3708 /* Calls to STT_GNU_IFUNC symbols should go through a PLT. */
3709 BFD_ASSERT (st_type != STT_GNU_IFUNC);
906e58ca 3710
fe33d2fa
CL		 3711 branch_offset = (bfd_signed_vma)(destination - location);
3712
0855e32b
NS		 3713 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24
3714 || r_type == R_ARM_THM_TLS_CALL)
906e58ca 3715 {
5fa9e92f
CL		 3716 /* Handle cases where:
3717 - this call goes too far (different Thumb/Thumb2 max
99059e56 3718 distance)
155d87d7 3719 - it's a Thumb->Arm call and blx is not available, or it's a
99059e56
RM		 3720 Thumb->Arm branch (not bl). A stub is needed in this case,
3721 but only if this call is not through a PLT entry. Indeed,
3722 PLT stubs handle mode switching already.
5fa9e92f 3723 */
906e58ca
NC		 3724 if ((!thumb2
3725 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
3726 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
3727 || (thumb2
3728 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
3729 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
35fc36a8 3730 || (branch_type == ST_BRANCH_TO_ARM
0855e32b
NS		 3731 && (((r_type == R_ARM_THM_CALL
3732 || r_type == R_ARM_THM_TLS_CALL) && !globals->use_blx)
155d87d7 3733 || (r_type == R_ARM_THM_JUMP24))
5fa9e92f 3734 && !use_plt))
906e58ca 3735 {
35fc36a8 3736 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3737 {
3738 /* Thumb to thumb. */
3739 if (!thumb_only)
3740 {
3741 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3742 /* PIC stubs. */
155d87d7 3743 ? ((globals->use_blx
9553db3c 3744 && (r_type == R_ARM_THM_CALL))
155d87d7
CL		 3745 /* V5T and above. Stub starts with ARM code, so
3746 we must be able to switch mode before
3747 reaching it, which is only possible for 'bl'
3748 (ie R_ARM_THM_CALL relocation). */
cf3eccff 3749 ? arm_stub_long_branch_any_thumb_pic
ebe24dd4 3750 /* On V4T, use Thumb code only. */
d3626fb0 3751 : arm_stub_long_branch_v4t_thumb_thumb_pic)
c2b4a39d
CL		 3752
3753 /* non-PIC stubs. */
155d87d7 3754 : ((globals->use_blx
9553db3c 3755 && (r_type == R_ARM_THM_CALL))
c2b4a39d
CL		 3756 /* V5T and above. */
3757 ? arm_stub_long_branch_any_any
3758 /* V4T. */
d3626fb0 3759 : arm_stub_long_branch_v4t_thumb_thumb);
906e58ca
NC		 3760 }
3761 else
3762 {
3763 stub_type = (info->shared | globals->pic_veneer)
ebe24dd4
CL		 3764 /* PIC stub. */
3765 ? arm_stub_long_branch_thumb_only_pic
c2b4a39d
CL		 3766 /* non-PIC stub. */
3767 : arm_stub_long_branch_thumb_only;
906e58ca
NC		 3768 }
3769 }
3770 else
3771 {
3772 /* Thumb to arm. */
c820be07
NC		 3773 if (sym_sec != NULL
3774 && sym_sec->owner != NULL
3775 && !INTERWORK_FLAG (sym_sec->owner))
3776 {
3777 (*_bfd_error_handler)
3778 (_("%B(%s): warning: interworking not enabled.\n"
3779 " first occurrence: %B: Thumb call to ARM"),
3780 sym_sec->owner, input_bfd, name);
3781 }
3782
0855e32b
NS		 3783 stub_type =
3784 (info->shared | globals->pic_veneer)
c2b4a39d 3785 /* PIC stubs. */
0855e32b 3786 ? (r_type == R_ARM_THM_TLS_CALL
6a631e86 3787 /* TLS PIC stubs. */
0855e32b
NS		 3788 ? (globals->use_blx ? arm_stub_long_branch_any_tls_pic
3789 : arm_stub_long_branch_v4t_thumb_tls_pic)
3790 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
3791 /* V5T PIC and above. */
3792 ? arm_stub_long_branch_any_arm_pic
3793 /* V4T PIC stub. */
3794 : arm_stub_long_branch_v4t_thumb_arm_pic))
c2b4a39d
CL		 3795
3796 /* non-PIC stubs. */
0855e32b 3797 : ((globals->use_blx && r_type == R_ARM_THM_CALL)
c2b4a39d
CL		 3798 /* V5T and above. */
3799 ? arm_stub_long_branch_any_any
3800 /* V4T. */
3801 : arm_stub_long_branch_v4t_thumb_arm);
c820be07
NC		 3802
3803 /* Handle v4t short branches. */
fea2b4d6 3804 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
c820be07
NC		 3805 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
3806 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
fea2b4d6 3807 stub_type = arm_stub_short_branch_v4t_thumb_arm;
906e58ca
NC		 3808 }
3809 }
3810 }
fe33d2fa
CL		 3811 else if (r_type == R_ARM_CALL
3812 || r_type == R_ARM_JUMP24
0855e32b
NS		 3813 || r_type == R_ARM_PLT32
3814 || r_type == R_ARM_TLS_CALL)
906e58ca 3815 {
35fc36a8 3816 if (branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 3817 {
3818 /* Arm to thumb. */
c820be07
NC		 3819
3820 if (sym_sec != NULL
3821 && sym_sec->owner != NULL
3822 && !INTERWORK_FLAG (sym_sec->owner))
3823 {
3824 (*_bfd_error_handler)
3825 (_("%B(%s): warning: interworking not enabled.\n"
c2b4a39d 3826 " first occurrence: %B: ARM call to Thumb"),
c820be07
NC		 3827 sym_sec->owner, input_bfd, name);
3828 }
3829
3830 /* We have an extra 2-bytes reach because of
3831 the mode change (bit 24 (H) of BLX encoding). */
4116d8d7
PB		 3832 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
3833 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
0855e32b 3834 || (r_type == R_ARM_CALL && !globals->use_blx)
4116d8d7
PB		 3835 || (r_type == R_ARM_JUMP24)
3836 || (r_type == R_ARM_PLT32))
906e58ca
NC		 3837 {
3838 stub_type = (info->shared | globals->pic_veneer)
c2b4a39d 3839 /* PIC stubs. */
ebe24dd4
CL		 3840 ? ((globals->use_blx)
3841 /* V5T and above. */
3842 ? arm_stub_long_branch_any_thumb_pic
3843 /* V4T stub. */
3844 : arm_stub_long_branch_v4t_arm_thumb_pic)
3845
c2b4a39d
CL		 3846 /* non-PIC stubs. */
3847 : ((globals->use_blx)
3848 /* V5T and above. */
3849 ? arm_stub_long_branch_any_any
3850 /* V4T. */
3851 : arm_stub_long_branch_v4t_arm_thumb);
906e58ca
NC		 3852 }
3853 }
3854 else
3855 {
3856 /* Arm to arm. */
3857 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
3858 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
3859 {
0855e32b
NS		 3860 stub_type =
3861 (info->shared | globals->pic_veneer)
c2b4a39d 3862 /* PIC stubs. */
0855e32b 3863 ? (r_type == R_ARM_TLS_CALL
6a631e86 3864 /* TLS PIC Stub. */
0855e32b 3865 ? arm_stub_long_branch_any_tls_pic
7a89b94e
NC		 3866 : (globals->nacl_p
3867 ? arm_stub_long_branch_arm_nacl_pic
3868 : arm_stub_long_branch_any_arm_pic))
c2b4a39d 3869 /* non-PIC stubs. */
7a89b94e
NC		 3870 : (globals->nacl_p
3871 ? arm_stub_long_branch_arm_nacl
3872 : arm_stub_long_branch_any_any);
906e58ca
NC		 3873 }
3874 }
3875 }
3876
fe33d2fa
CL		 3877 /* If a stub is needed, record the actual destination type. */
3878 if (stub_type != arm_stub_none)
35fc36a8 3879 *actual_branch_type = branch_type;
fe33d2fa 3880
906e58ca
NC		 3881 return stub_type;
3882}
3883
3884/* Build a name for an entry in the stub hash table. */
3885
3886static char *
3887elf32_arm_stub_name (const asection *input_section,
3888 const asection *sym_sec,
3889 const struct elf32_arm_link_hash_entry *hash,
fe33d2fa
CL		 3890 const Elf_Internal_Rela *rel,
3891 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3892{
3893 char *stub_name;
3894 bfd_size_type len;
3895
3896 if (hash)
3897 {
fe33d2fa 3898 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1;
21d799b5 3899 stub_name = (char *) bfd_malloc (len);
906e58ca 3900 if (stub_name != NULL)
fe33d2fa 3901 sprintf (stub_name, "%08x_%s+%x_%d",
906e58ca
NC		 3902 input_section->id & 0xffffffff,
3903 hash->root.root.root.string,
fe33d2fa
CL		 3904 (int) rel->r_addend & 0xffffffff,
3905 (int) stub_type);
906e58ca
NC		 3906 }
3907 else
3908 {
fe33d2fa 3909 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1;
21d799b5 3910 stub_name = (char *) bfd_malloc (len);
906e58ca 3911 if (stub_name != NULL)
fe33d2fa 3912 sprintf (stub_name, "%08x_%x:%x+%x_%d",
906e58ca
NC		 3913 input_section->id & 0xffffffff,
3914 sym_sec->id & 0xffffffff,
0855e32b
NS		 3915 ELF32_R_TYPE (rel->r_info) == R_ARM_TLS_CALL
3916 || ELF32_R_TYPE (rel->r_info) == R_ARM_THM_TLS_CALL
3917 ? 0 : (int) ELF32_R_SYM (rel->r_info) & 0xffffffff,
fe33d2fa
CL		 3918 (int) rel->r_addend & 0xffffffff,
3919 (int) stub_type);
906e58ca
NC		 3920 }
3921
3922 return stub_name;
3923}
3924
3925/* Look up an entry in the stub hash. Stub entries are cached because
3926 creating the stub name takes a bit of time. */
3927
3928static struct elf32_arm_stub_hash_entry *
3929elf32_arm_get_stub_entry (const asection *input_section,
3930 const asection *sym_sec,
3931 struct elf_link_hash_entry *hash,
3932 const Elf_Internal_Rela *rel,
fe33d2fa
CL		 3933 struct elf32_arm_link_hash_table *htab,
3934 enum elf32_arm_stub_type stub_type)
906e58ca
NC		 3935{
3936 struct elf32_arm_stub_hash_entry *stub_entry;
3937 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash;
3938 const asection *id_sec;
3939
3940 if ((input_section->flags & SEC_CODE) == 0)
3941 return NULL;
3942
3943 /* If this input section is part of a group of sections sharing one
3944 stub section, then use the id of the first section in the group.
3945 Stub names need to include a section id, as there may well be
3946 more than one stub used to reach say, printf, and we need to
3947 distinguish between them. */
3948 id_sec = htab->stub_group[input_section->id].link_sec;
3949
3950 if (h != NULL && h->stub_cache != NULL
3951 && h->stub_cache->h == h
fe33d2fa
CL		 3952 && h->stub_cache->id_sec == id_sec
3953 && h->stub_cache->stub_type == stub_type)
906e58ca
NC		 3954 {
3955 stub_entry = h->stub_cache;
3956 }
3957 else
3958 {
3959 char *stub_name;
3960
fe33d2fa 3961 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type);
906e58ca
NC		 3962 if (stub_name == NULL)
3963 return NULL;
3964
3965 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table,
3966 stub_name, FALSE, FALSE);
3967 if (h != NULL)
3968 h->stub_cache = stub_entry;
3969
3970 free (stub_name);
3971 }
3972
3973 return stub_entry;
3974}
3975
48229727 3976/* Find or create a stub section. Returns a pointer to the stub section, and
b38cadfb 3977 the section to which the stub section will be attached (in *LINK_SEC_P).
48229727 3978 LINK_SEC_P may be NULL. */
906e58ca 3979
48229727
JB		 3980static asection *
3981elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section,
3982 struct elf32_arm_link_hash_table *htab)
906e58ca
NC		 3983{
3984 asection *link_sec;
3985 asection *stub_sec;
906e58ca
NC		 3986
3987 link_sec = htab->stub_group[section->id].link_sec;
9553db3c 3988 BFD_ASSERT (link_sec != NULL);
906e58ca 3989 stub_sec = htab->stub_group[section->id].stub_sec;
9553db3c 3990
906e58ca
NC		 3991 if (stub_sec == NULL)
3992 {
3993 stub_sec = htab->stub_group[link_sec->id].stub_sec;
3994 if (stub_sec == NULL)
3995 {
3996 size_t namelen;
3997 bfd_size_type len;
3998 char *s_name;
3999
4000 namelen = strlen (link_sec->name);
4001 len = namelen + sizeof (STUB_SUFFIX);
21d799b5 4002 s_name = (char *) bfd_alloc (htab->stub_bfd, len);
906e58ca
NC		 4003 if (s_name == NULL)
4004 return NULL;
4005
4006 memcpy (s_name, link_sec->name, namelen);
4007 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX));
7a89b94e
NC		 4008 stub_sec = (*htab->add_stub_section) (s_name, link_sec,
4009 htab->nacl_p ? 4 : 3);
906e58ca
NC		 4010 if (stub_sec == NULL)
4011 return NULL;
4012 htab->stub_group[link_sec->id].stub_sec = stub_sec;
4013 }
4014 htab->stub_group[section->id].stub_sec = stub_sec;
4015 }
b38cadfb 4016
48229727
JB		 4017 if (link_sec_p)
4018 *link_sec_p = link_sec;
b38cadfb 4019
48229727
JB		 4020 return stub_sec;
4021}
4022
4023/* Add a new stub entry to the stub hash. Not all fields of the new
4024 stub entry are initialised. */
4025
4026static struct elf32_arm_stub_hash_entry *
4027elf32_arm_add_stub (const char *stub_name,
4028 asection *section,
4029 struct elf32_arm_link_hash_table *htab)
4030{
4031 asection *link_sec;
4032 asection *stub_sec;
4033 struct elf32_arm_stub_hash_entry *stub_entry;
4034
4035 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab);
4036 if (stub_sec == NULL)
4037 return NULL;
906e58ca
NC		 4038
4039 /* Enter this entry into the linker stub hash table. */
4040 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
4041 TRUE, FALSE);
4042 if (stub_entry == NULL)
4043 {
4044 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
4045 section->owner,
4046 stub_name);
4047 return NULL;
4048 }
4049
4050 stub_entry->stub_sec = stub_sec;
4051 stub_entry->stub_offset = 0;
4052 stub_entry->id_sec = link_sec;
4053
906e58ca
NC		 4054 return stub_entry;
4055}
4056
4057/* Store an Arm insn into an output section not processed by
4058 elf32_arm_write_section. */
4059
4060static void
8029a119
NC		 4061put_arm_insn (struct elf32_arm_link_hash_table * htab,
4062 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4063{
4064 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4065 bfd_putl32 (val, ptr);
4066 else
4067 bfd_putb32 (val, ptr);
4068}
4069
4070/* Store a 16-bit Thumb insn into an output section not processed by
4071 elf32_arm_write_section. */
4072
4073static void
8029a119
NC		 4074put_thumb_insn (struct elf32_arm_link_hash_table * htab,
4075 bfd * output_bfd, bfd_vma val, void * ptr)
906e58ca
NC		 4076{
4077 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4078 bfd_putl16 (val, ptr);
4079 else
4080 bfd_putb16 (val, ptr);
4081}
4082
0855e32b
NS		 4083/* If it's possible to change R_TYPE to a more efficient access
4084 model, return the new reloc type. */
4085
4086static unsigned
b38cadfb 4087elf32_arm_tls_transition (struct bfd_link_info *info, int r_type,
0855e32b
NS		 4088 struct elf_link_hash_entry *h)
4089{
4090 int is_local = (h == NULL);
4091
4092 if (info->shared || (h && h->root.type == bfd_link_hash_undefweak))
4093 return r_type;
4094
b38cadfb 4095 /* We do not support relaxations for Old TLS models. */
0855e32b
NS		 4096 switch (r_type)
4097 {
4098 case R_ARM_TLS_GOTDESC:
4099 case R_ARM_TLS_CALL:
4100 case R_ARM_THM_TLS_CALL:
4101 case R_ARM_TLS_DESCSEQ:
4102 case R_ARM_THM_TLS_DESCSEQ:
4103 return is_local ? R_ARM_TLS_LE32 : R_ARM_TLS_IE32;
4104 }
4105
4106 return r_type;
4107}
4108
48229727
JB		 4109static bfd_reloc_status_type elf32_arm_final_link_relocate
4110 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *,
4111 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *,
34e77a92
RS		 4112 const char *, unsigned char, enum arm_st_branch_type,
4113 struct elf_link_hash_entry *, bfd_boolean *, char **);
48229727 4114
4563a860
JB		 4115static unsigned int
4116arm_stub_required_alignment (enum elf32_arm_stub_type stub_type)
4117{
4118 switch (stub_type)
4119 {
4120 case arm_stub_a8_veneer_b_cond:
4121 case arm_stub_a8_veneer_b:
4122 case arm_stub_a8_veneer_bl:
4123 return 2;
4124
4125 case arm_stub_long_branch_any_any:
4126 case arm_stub_long_branch_v4t_arm_thumb:
4127 case arm_stub_long_branch_thumb_only:
4128 case arm_stub_long_branch_v4t_thumb_thumb:
4129 case arm_stub_long_branch_v4t_thumb_arm:
4130 case arm_stub_short_branch_v4t_thumb_arm:
4131 case arm_stub_long_branch_any_arm_pic:
4132 case arm_stub_long_branch_any_thumb_pic:
4133 case arm_stub_long_branch_v4t_thumb_thumb_pic:
4134 case arm_stub_long_branch_v4t_arm_thumb_pic:
4135 case arm_stub_long_branch_v4t_thumb_arm_pic:
4136 case arm_stub_long_branch_thumb_only_pic:
0855e32b
NS		 4137 case arm_stub_long_branch_any_tls_pic:
4138 case arm_stub_long_branch_v4t_thumb_tls_pic:
4563a860
JB		 4139 case arm_stub_a8_veneer_blx:
4140 return 4;
b38cadfb 4141
7a89b94e
NC		 4142 case arm_stub_long_branch_arm_nacl:
4143 case arm_stub_long_branch_arm_nacl_pic:
4144 return 16;
4145
4563a860
JB		 4146 default:
4147 abort (); /* Should be unreachable. */
4148 }
4149}
4150
906e58ca
NC		 4151static bfd_boolean
4152arm_build_one_stub (struct bfd_hash_entry *gen_entry,
4153 void * in_arg)
4154{
7a89b94e 4155#define MAXRELOCS 3
906e58ca 4156 struct elf32_arm_stub_hash_entry *stub_entry;
4dfe6ac6 4157 struct elf32_arm_link_hash_table *globals;
906e58ca 4158 struct bfd_link_info *info;
906e58ca
NC		 4159 asection *stub_sec;
4160 bfd *stub_bfd;
906e58ca
NC		 4161 bfd_byte *loc;
4162 bfd_vma sym_value;
4163 int template_size;
4164 int size;
d3ce72d0 4165 const insn_sequence *template_sequence;
906e58ca 4166 int i;
48229727
JB		 4167 int stub_reloc_idx[MAXRELOCS] = {-1, -1};
4168 int stub_reloc_offset[MAXRELOCS] = {0, 0};
4169 int nrelocs = 0;
906e58ca
NC		 4170
4171 /* Massage our args to the form they really have. */
4172 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
4173 info = (struct bfd_link_info *) in_arg;
4174
4175 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 4176 if (globals == NULL)
4177 return FALSE;
906e58ca 4178
906e58ca
NC		 4179 stub_sec = stub_entry->stub_sec;
4180
4dfe6ac6 4181 if ((globals->fix_cortex_a8 < 0)
4563a860
JB		 4182 != (arm_stub_required_alignment (stub_entry->stub_type) == 2))
4183 /* We have to do less-strictly-aligned fixes last. */
eb7c4339 4184 return TRUE;
fe33d2fa 4185
906e58ca
NC		 4186 /* Make a note of the offset within the stubs for this entry. */
4187 stub_entry->stub_offset = stub_sec->size;
4188 loc = stub_sec->contents + stub_entry->stub_offset;
4189
4190 stub_bfd = stub_sec->owner;
4191
906e58ca
NC		 4192 /* This is the address of the stub destination. */
4193 sym_value = (stub_entry->target_value
4194 + stub_entry->target_section->output_offset
4195 + stub_entry->target_section->output_section->vma);
4196
d3ce72d0 4197 template_sequence = stub_entry->stub_template;
461a49ca 4198 template_size = stub_entry->stub_template_size;
906e58ca
NC		 4199
4200 size = 0;
461a49ca 4201 for (i = 0; i < template_size; i++)
906e58ca 4202 {
d3ce72d0 4203 switch (template_sequence[i].type)
461a49ca
DJ		 4204 {
4205 case THUMB16_TYPE:
48229727 4206 {
d3ce72d0
NC		 4207 bfd_vma data = (bfd_vma) template_sequence[i].data;
4208 if (template_sequence[i].reloc_addend != 0)
48229727 4209 {
99059e56
RM		 4210 /* We've borrowed the reloc_addend field to mean we should
4211 insert a condition code into this (Thumb-1 branch)
4212 instruction. See THUMB16_BCOND_INSN. */
4213 BFD_ASSERT ((data & 0xff00) == 0xd000);
4214 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8;
48229727 4215 }
fe33d2fa 4216 bfd_put_16 (stub_bfd, data, loc + size);
48229727
JB		 4217 size += 2;
4218 }
461a49ca 4219 break;
906e58ca 4220
48229727 4221 case THUMB32_TYPE:
fe33d2fa
CL		 4222 bfd_put_16 (stub_bfd,
4223 (template_sequence[i].data >> 16) & 0xffff,
4224 loc + size);
4225 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff,
4226 loc + size + 2);
99059e56
RM		 4227 if (template_sequence[i].r_type != R_ARM_NONE)
4228 {
4229 stub_reloc_idx[nrelocs] = i;
4230 stub_reloc_offset[nrelocs++] = size;
4231 }
4232 size += 4;
4233 break;
48229727 4234
461a49ca 4235 case ARM_TYPE:
fe33d2fa
CL		 4236 bfd_put_32 (stub_bfd, template_sequence[i].data,
4237 loc + size);
461a49ca
DJ		 4238 /* Handle cases where the target is encoded within the
4239 instruction. */
d3ce72d0 4240 if (template_sequence[i].r_type == R_ARM_JUMP24)
461a49ca 4241 {
48229727
JB		 4242 stub_reloc_idx[nrelocs] = i;
4243 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4244 }
4245 size += 4;
4246 break;
4247
4248 case DATA_TYPE:
d3ce72d0 4249 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size);
48229727
JB		 4250 stub_reloc_idx[nrelocs] = i;
4251 stub_reloc_offset[nrelocs++] = size;
461a49ca
DJ		 4252 size += 4;
4253 break;
4254
4255 default:
4256 BFD_FAIL ();
4257 return FALSE;
4258 }
906e58ca 4259 }
461a49ca 4260
906e58ca
NC		 4261 stub_sec->size += size;
4262
461a49ca
DJ		 4263 /* Stub size has already been computed in arm_size_one_stub. Check
4264 consistency. */
4265 BFD_ASSERT (size == stub_entry->stub_size);
4266
906e58ca 4267 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */
35fc36a8 4268 if (stub_entry->branch_type == ST_BRANCH_TO_THUMB)
906e58ca
NC		 4269 sym_value |= 1;
4270
48229727
JB		 4271 /* Assume there is at least one and at most MAXRELOCS entries to relocate
4272 in each stub. */
4273 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS);
c820be07 4274
48229727 4275 for (i = 0; i < nrelocs; i++)
d3ce72d0
NC		 4276 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24
4277 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19
4278 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL
4279 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22)
48229727
JB		 4280 {
4281 Elf_Internal_Rela rel;
4282 bfd_boolean unresolved_reloc;
4283 char *error_message;
35fc36a8
RS		 4284 enum arm_st_branch_type branch_type
4285 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22
4286 ? ST_BRANCH_TO_THUMB : ST_BRANCH_TO_ARM);
48229727
JB		 4287 bfd_vma points_to = sym_value + stub_entry->target_addend;
4288
4289 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
d3ce72d0 4290 rel.r_info = ELF32_R_INFO (0,
99059e56 4291 template_sequence[stub_reloc_idx[i]].r_type);
d3ce72d0 4292 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend;
48229727
JB		 4293
4294 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0)
4295 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[]
4296 template should refer back to the instruction after the original
4297 branch. */
4298 points_to = sym_value;
4299
33c6a8fc
JB		 4300 /* There may be unintended consequences if this is not true. */
4301 BFD_ASSERT (stub_entry->h == NULL);
4302
48229727
JB		 4303 /* Note: _bfd_final_link_relocate doesn't handle these relocations
4304 properly. We should probably use this function unconditionally,
4305 rather than only for certain relocations listed in the enclosing
4306 conditional, for the sake of consistency. */
4307 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
d3ce72d0 4308 (template_sequence[stub_reloc_idx[i]].r_type),
48229727 4309 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92
RS		 4310 points_to, info, stub_entry->target_section, "", STT_FUNC,
4311 branch_type, (struct elf_link_hash_entry *) stub_entry->h,
4312 &unresolved_reloc, &error_message);
48229727
JB		 4313 }
4314 else
4315 {
fe33d2fa
CL		 4316 Elf_Internal_Rela rel;
4317 bfd_boolean unresolved_reloc;
4318 char *error_message;
4319 bfd_vma points_to = sym_value + stub_entry->target_addend
4320 + template_sequence[stub_reloc_idx[i]].reloc_addend;
4321
4322 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i];
4323 rel.r_info = ELF32_R_INFO (0,
99059e56 4324 template_sequence[stub_reloc_idx[i]].r_type);
fe33d2fa
CL		 4325 rel.r_addend = 0;
4326
4327 elf32_arm_final_link_relocate (elf32_arm_howto_from_type
4328 (template_sequence[stub_reloc_idx[i]].r_type),
4329 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel,
34e77a92 4330 points_to, info, stub_entry->target_section, "", STT_FUNC,
35fc36a8 4331 stub_entry->branch_type,
fe33d2fa
CL		 4332 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc,
4333 &error_message);
48229727 4334 }
906e58ca
NC		 4335
4336 return TRUE;
48229727 4337#undef MAXRELOCS
906e58ca
NC		 4338}
4339
48229727
JB		 4340/* Calculate the template, template size and instruction size for a stub.
4341 Return value is the instruction size. */
906e58ca 4342
48229727
JB		 4343static unsigned int
4344find_stub_size_and_template (enum elf32_arm_stub_type stub_type,
4345 const insn_sequence **stub_template,
4346 int *stub_template_size)
906e58ca 4347{
d3ce72d0 4348 const insn_sequence *template_sequence = NULL;
48229727
JB		 4349 int template_size = 0, i;
4350 unsigned int size;
906e58ca 4351
d3ce72d0 4352 template_sequence = stub_definitions[stub_type].template_sequence;
2a229407
AM		 4353 if (stub_template)
4354 *stub_template = template_sequence;
4355
48229727 4356 template_size = stub_definitions[stub_type].template_size;
2a229407
AM		 4357 if (stub_template_size)
4358 *stub_template_size = template_size;
906e58ca
NC		 4359
4360 size = 0;
461a49ca
DJ		 4361 for (i = 0; i < template_size; i++)
4362 {
d3ce72d0 4363 switch (template_sequence[i].type)
461a49ca
DJ		 4364 {
4365 case THUMB16_TYPE:
4366 size += 2;
4367 break;
4368
4369 case ARM_TYPE:
48229727 4370 case THUMB32_TYPE:
461a49ca
DJ		 4371 case DATA_TYPE:
4372 size += 4;
4373 break;
4374
4375 default:
4376 BFD_FAIL ();
2a229407 4377 return 0;
461a49ca
DJ		 4378 }
4379 }
4380
48229727
JB		 4381 return size;
4382}
4383
4384/* As above, but don't actually build the stub. Just bump offset so
4385 we know stub section sizes. */
4386
4387static bfd_boolean
4388arm_size_one_stub (struct bfd_hash_entry *gen_entry,
c7e2358a 4389 void *in_arg ATTRIBUTE_UNUSED)
48229727
JB		 4390{
4391 struct elf32_arm_stub_hash_entry *stub_entry;
d3ce72d0 4392 const insn_sequence *template_sequence;
48229727
JB		 4393 int template_size, size;
4394
4395 /* Massage our args to the form they really have. */
4396 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
48229727
JB		 4397
4398 BFD_ASSERT((stub_entry->stub_type > arm_stub_none)
4399 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions));
4400
d3ce72d0 4401 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence,
48229727
JB		 4402 &template_size);
4403
461a49ca 4404 stub_entry->stub_size = size;
d3ce72d0 4405 stub_entry->stub_template = template_sequence;
461a49ca
DJ		 4406 stub_entry->stub_template_size = template_size;
4407
906e58ca
NC		 4408 size = (size + 7) & ~7;
4409 stub_entry->stub_sec->size += size;
461a49ca 4410
906e58ca
NC		 4411 return TRUE;
4412}
4413
4414/* External entry points for sizing and building linker stubs. */
4415
4416/* Set up various things so that we can make a list of input sections
4417 for each output section included in the link. Returns -1 on error,
4418 0 when no stubs will be needed, and 1 on success. */
4419
4420int
4421elf32_arm_setup_section_lists (bfd *output_bfd,
4422 struct bfd_link_info *info)
4423{
4424 bfd *input_bfd;
4425 unsigned int bfd_count;
4426 int top_id, top_index;
4427 asection *section;
4428 asection **input_list, **list;
4429 bfd_size_type amt;
4430 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4431
4dfe6ac6
NC		 4432 if (htab == NULL)
4433 return 0;
906e58ca
NC		 4434 if (! is_elf_hash_table (htab))
4435 return 0;
4436
4437 /* Count the number of input BFDs and find the top input section id. */
4438 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0;
4439 input_bfd != NULL;
c72f2fb2 4440 input_bfd = input_bfd->link.next)
906e58ca
NC		 4441 {
4442 bfd_count += 1;
4443 for (section = input_bfd->sections;
4444 section != NULL;
4445 section = section->next)
4446 {
4447 if (top_id < section->id)
4448 top_id = section->id;
4449 }
4450 }
4451 htab->bfd_count = bfd_count;
4452
4453 amt = sizeof (struct map_stub) * (top_id + 1);
21d799b5 4454 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt);
906e58ca
NC		 4455 if (htab->stub_group == NULL)
4456 return -1;
fe33d2fa 4457 htab->top_id = top_id;
906e58ca
NC		 4458
4459 /* We can't use output_bfd->section_count here to find the top output
4460 section index as some sections may have been removed, and
4461 _bfd_strip_section_from_output doesn't renumber the indices. */
4462 for (section = output_bfd->sections, top_index = 0;
4463 section != NULL;
4464 section = section->next)
4465 {
4466 if (top_index < section->index)
4467 top_index = section->index;
4468 }
4469
4470 htab->top_index = top_index;
4471 amt = sizeof (asection *) * (top_index + 1);
21d799b5 4472 input_list = (asection **) bfd_malloc (amt);
906e58ca
NC		 4473 htab->input_list = input_list;
4474 if (input_list == NULL)
4475 return -1;
4476
4477 /* For sections we aren't interested in, mark their entries with a
4478 value we can check later. */
4479 list = input_list + top_index;
4480 do
4481 *list = bfd_abs_section_ptr;
4482 while (list-- != input_list);
4483
4484 for (section = output_bfd->sections;
4485 section != NULL;
4486 section = section->next)
4487 {
4488 if ((section->flags & SEC_CODE) != 0)
4489 input_list[section->index] = NULL;
4490 }
4491
4492 return 1;
4493}
4494
4495/* The linker repeatedly calls this function for each input section,
4496 in the order that input sections are linked into output sections.
4497 Build lists of input sections to determine groupings between which
4498 we may insert linker stubs. */
4499
4500void
4501elf32_arm_next_input_section (struct bfd_link_info *info,
4502 asection *isec)
4503{
4504 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4505
4dfe6ac6
NC		 4506 if (htab == NULL)
4507 return;
4508
906e58ca
NC		 4509 if (isec->output_section->index <= htab->top_index)
4510 {
4511 asection **list = htab->input_list + isec->output_section->index;
4512
a7470592 4513 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0)
906e58ca
NC		 4514 {
4515 /* Steal the link_sec pointer for our list. */
4516#define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec)
4517 /* This happens to make the list in reverse order,
07d72278 4518 which we reverse later. */
906e58ca
NC		 4519 PREV_SEC (isec) = *list;
4520 *list = isec;
4521 }
4522 }
4523}
4524
4525/* See whether we can group stub sections together. Grouping stub
4526 sections may result in fewer stubs. More importantly, we need to
07d72278 4527 put all .init* and .fini* stubs at the end of the .init or
906e58ca
NC		 4528 .fini output sections respectively, because glibc splits the
4529 _init and _fini functions into multiple parts. Putting a stub in
4530 the middle of a function is not a good idea. */
4531
4532static void
4533group_sections (struct elf32_arm_link_hash_table *htab,
4534 bfd_size_type stub_group_size,
07d72278 4535 bfd_boolean stubs_always_after_branch)
906e58ca 4536{
07d72278 4537 asection **list = htab->input_list;
906e58ca
NC		 4538
4539 do
4540 {
4541 asection *tail = *list;
07d72278 4542 asection *head;
906e58ca
NC		 4543
4544 if (tail == bfd_abs_section_ptr)
4545 continue;
4546
07d72278
DJ		 4547 /* Reverse the list: we must avoid placing stubs at the
4548 beginning of the section because the beginning of the text
4549 section may be required for an interrupt vector in bare metal
4550 code. */
4551#define NEXT_SEC PREV_SEC
e780aef2
CL		 4552 head = NULL;
4553 while (tail != NULL)
99059e56
RM		 4554 {
4555 /* Pop from tail. */
4556 asection *item = tail;
4557 tail = PREV_SEC (item);
e780aef2 4558
99059e56
RM		 4559 /* Push on head. */
4560 NEXT_SEC (item) = head;
4561 head = item;
4562 }
07d72278
DJ		 4563
4564 while (head != NULL)
906e58ca
NC		 4565 {
4566 asection *curr;
07d72278 4567 asection *next;
e780aef2
CL		 4568 bfd_vma stub_group_start = head->output_offset;
4569 bfd_vma end_of_next;
906e58ca 4570
07d72278 4571 curr = head;
e780aef2 4572 while (NEXT_SEC (curr) != NULL)
8cd931b7 4573 {
e780aef2
CL		 4574 next = NEXT_SEC (curr);
4575 end_of_next = next->output_offset + next->size;
4576 if (end_of_next - stub_group_start >= stub_group_size)
4577 /* End of NEXT is too far from start, so stop. */
8cd931b7 4578 break;
e780aef2
CL		 4579 /* Add NEXT to the group. */
4580 curr = next;
8cd931b7 4581 }
906e58ca 4582
07d72278 4583 /* OK, the size from the start to the start of CURR is less
906e58ca 4584 than stub_group_size and thus can be handled by one stub
07d72278 4585 section. (Or the head section is itself larger than
906e58ca
NC		 4586 stub_group_size, in which case we may be toast.)
4587 We should really be keeping track of the total size of
4588 stubs added here, as stubs contribute to the final output
7fb9f789 4589 section size. */
906e58ca
NC		 4590 do
4591 {
07d72278 4592 next = NEXT_SEC (head);
906e58ca 4593 /* Set up this stub group. */
07d72278 4594 htab->stub_group[head->id].link_sec = curr;
906e58ca 4595 }
07d72278 4596 while (head != curr && (head = next) != NULL);
906e58ca
NC		 4597
4598 /* But wait, there's more! Input sections up to stub_group_size
07d72278
DJ		 4599 bytes after the stub section can be handled by it too. */
4600 if (!stubs_always_after_branch)
906e58ca 4601 {
e780aef2
CL		 4602 stub_group_start = curr->output_offset + curr->size;
4603
8cd931b7 4604 while (next != NULL)
906e58ca 4605 {
e780aef2
CL		 4606 end_of_next = next->output_offset + next->size;
4607 if (end_of_next - stub_group_start >= stub_group_size)
4608 /* End of NEXT is too far from stubs, so stop. */
8cd931b7 4609 break;
e780aef2 4610 /* Add NEXT to the stub group. */
07d72278
DJ		 4611 head = next;
4612 next = NEXT_SEC (head);
4613 htab->stub_group[head->id].link_sec = curr;
906e58ca
NC		 4614 }
4615 }
07d72278 4616 head = next;
906e58ca
NC		 4617 }
4618 }
07d72278 4619 while (list++ != htab->input_list + htab->top_index);
906e58ca
NC		 4620
4621 free (htab->input_list);
4622#undef PREV_SEC
07d72278 4623#undef NEXT_SEC
906e58ca
NC		 4624}
4625
48229727
JB		 4626/* Comparison function for sorting/searching relocations relating to Cortex-A8
4627 erratum fix. */
4628
4629static int
4630a8_reloc_compare (const void *a, const void *b)
4631{
21d799b5
NC		 4632 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a;
4633 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b;
48229727
JB		 4634
4635 if (ra->from < rb->from)
4636 return -1;
4637 else if (ra->from > rb->from)
4638 return 1;
4639 else
4640 return 0;
4641}
4642
4643static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *,
4644 const char *, char **);
4645
4646/* Helper function to scan code for sequences which might trigger the Cortex-A8
4647 branch/TLB erratum. Fill in the table described by A8_FIXES_P,
81694485 4648 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false
48229727
JB		 4649 otherwise. */
4650
81694485
NC		 4651static bfd_boolean
4652cortex_a8_erratum_scan (bfd *input_bfd,
4653 struct bfd_link_info *info,
48229727
JB		 4654 struct a8_erratum_fix **a8_fixes_p,
4655 unsigned int *num_a8_fixes_p,
4656 unsigned int *a8_fix_table_size_p,
4657 struct a8_erratum_reloc *a8_relocs,
eb7c4339
NS		 4658 unsigned int num_a8_relocs,
4659 unsigned prev_num_a8_fixes,
4660 bfd_boolean *stub_changed_p)
48229727
JB		 4661{
4662 asection *section;
4663 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
4664 struct a8_erratum_fix *a8_fixes = *a8_fixes_p;
4665 unsigned int num_a8_fixes = *num_a8_fixes_p;
4666 unsigned int a8_fix_table_size = *a8_fix_table_size_p;
4667
4dfe6ac6
NC		 4668 if (htab == NULL)
4669 return FALSE;
4670
48229727
JB		 4671 for (section = input_bfd->sections;
4672 section != NULL;
4673 section = section->next)
4674 {
4675 bfd_byte *contents = NULL;
4676 struct _arm_elf_section_data *sec_data;
4677 unsigned int span;
4678 bfd_vma base_vma;
4679
4680 if (elf_section_type (section) != SHT_PROGBITS
99059e56
RM		 4681 || (elf_section_flags (section) & SHF_EXECINSTR) == 0
4682 || (section->flags & SEC_EXCLUDE) != 0
4683 || (section->sec_info_type == SEC_INFO_TYPE_JUST_SYMS)
4684 || (section->output_section == bfd_abs_section_ptr))
4685 continue;
48229727
JB		 4686
4687 base_vma = section->output_section->vma + section->output_offset;
4688
4689 if (elf_section_data (section)->this_hdr.contents != NULL)
99059e56 4690 contents = elf_section_data (section)->this_hdr.contents;
48229727 4691 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents))
99059e56 4692 return TRUE;
48229727
JB		 4693
4694 sec_data = elf32_arm_section_data (section);
4695
4696 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 4697 {
4698 unsigned int span_start = sec_data->map[span].vma;
4699 unsigned int span_end = (span == sec_data->mapcount - 1)
4700 ? section->size : sec_data->map[span + 1].vma;
4701 unsigned int i;
4702 char span_type = sec_data->map[span].type;
4703 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE;
4704
4705 if (span_type != 't')
4706 continue;
4707
4708 /* Span is entirely within a single 4KB region: skip scanning. */
4709 if (((base_vma + span_start) & ~0xfff)
48229727 4710 == ((base_vma + span_end) & ~0xfff))
99059e56
RM		 4711 continue;
4712
4713 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
4714
4715 * The opcode is BLX.W, BL.W, B.W, Bcc.W
4716 * The branch target is in the same 4KB region as the
4717 first half of the branch.
4718 * The instruction before the branch is a 32-bit
4719 length non-branch instruction. */
4720 for (i = span_start; i < span_end;)
4721 {
4722 unsigned int insn = bfd_getl16 (&contents[i]);
4723 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE;
48229727
JB		 4724 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch;
4725
99059e56
RM		 4726 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000)
4727 insn_32bit = TRUE;
48229727
JB		 4728
4729 if (insn_32bit)
99059e56
RM		 4730 {
4731 /* Load the rest of the insn (in manual-friendly order). */
4732 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]);
4733
4734 /* Encoding T4: B<c>.W. */
4735 is_b = (insn & 0xf800d000) == 0xf0009000;
4736 /* Encoding T1: BL<c>.W. */
4737 is_bl = (insn & 0xf800d000) == 0xf000d000;
4738 /* Encoding T2: BLX<c>.W. */
4739 is_blx = (insn & 0xf800d000) == 0xf000c000;
48229727
JB		 4740 /* Encoding T3: B<c>.W (not permitted in IT block). */
4741 is_bcc = (insn & 0xf800d000) == 0xf0008000
4742 && (insn & 0x07f00000) != 0x03800000;
4743 }
4744
4745 is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
fe33d2fa 4746
99059e56 4747 if (((base_vma + i) & 0xfff) == 0xffe
81694485
NC		 4748 && insn_32bit
4749 && is_32bit_branch
4750 && last_was_32bit
4751 && ! last_was_branch)
99059e56
RM		 4752 {
4753 bfd_signed_vma offset = 0;
4754 bfd_boolean force_target_arm = FALSE;
48229727 4755 bfd_boolean force_target_thumb = FALSE;
99059e56
RM		 4756 bfd_vma target;
4757 enum elf32_arm_stub_type stub_type = arm_stub_none;
4758 struct a8_erratum_reloc key, *found;
4759 bfd_boolean use_plt = FALSE;
48229727 4760
99059e56
RM		 4761 key.from = base_vma + i;
4762 found = (struct a8_erratum_reloc *)
4763 bsearch (&key, a8_relocs, num_a8_relocs,
4764 sizeof (struct a8_erratum_reloc),
4765 &a8_reloc_compare);
48229727
JB		 4766
4767 if (found)
4768 {
4769 char *error_message = NULL;
4770 struct elf_link_hash_entry *entry;
4771
4772 /* We don't care about the error returned from this
99059e56 4773 function, only if there is glue or not. */
48229727
JB		 4774 entry = find_thumb_glue (info, found->sym_name,
4775 &error_message);
4776
4777 if (entry)
4778 found->non_a8_stub = TRUE;
4779
92750f34 4780 /* Keep a simpler condition, for the sake of clarity. */
362d30a1 4781 if (htab->root.splt != NULL && found->hash != NULL
92750f34
DJ		 4782 && found->hash->root.plt.offset != (bfd_vma) -1)
4783 use_plt = TRUE;
4784
4785 if (found->r_type == R_ARM_THM_CALL)
4786 {
35fc36a8
RS		 4787 if (found->branch_type == ST_BRANCH_TO_ARM
4788 || use_plt)
92750f34
DJ		 4789 force_target_arm = TRUE;
4790 else
4791 force_target_thumb = TRUE;
4792 }
48229727
JB		 4793 }
4794
99059e56 4795 /* Check if we have an offending branch instruction. */
48229727
JB		 4796
4797 if (found && found->non_a8_stub)
4798 /* We've already made a stub for this instruction, e.g.
4799 it's a long branch or a Thumb->ARM stub. Assume that
4800 stub will suffice to work around the A8 erratum (see
4801 setting of always_after_branch above). */
4802 ;
99059e56
RM		 4803 else if (is_bcc)
4804 {
4805 offset = (insn & 0x7ff) << 1;
4806 offset |= (insn & 0x3f0000) >> 4;
4807 offset |= (insn & 0x2000) ? 0x40000 : 0;
4808 offset |= (insn & 0x800) ? 0x80000 : 0;
4809 offset |= (insn & 0x4000000) ? 0x100000 : 0;
4810 if (offset & 0x100000)
4811 offset |= ~ ((bfd_signed_vma) 0xfffff);
4812 stub_type = arm_stub_a8_veneer_b_cond;
4813 }
4814 else if (is_b || is_bl || is_blx)
4815 {
4816 int s = (insn & 0x4000000) != 0;
4817 int j1 = (insn & 0x2000) != 0;
4818 int j2 = (insn & 0x800) != 0;
4819 int i1 = !(j1 ^ s);
4820 int i2 = !(j2 ^ s);
4821
4822 offset = (insn & 0x7ff) << 1;
4823 offset |= (insn & 0x3ff0000) >> 4;
4824 offset |= i2 << 22;
4825 offset |= i1 << 23;
4826 offset |= s << 24;
4827 if (offset & 0x1000000)
4828 offset |= ~ ((bfd_signed_vma) 0xffffff);
4829
4830 if (is_blx)
4831 offset &= ~ ((bfd_signed_vma) 3);
4832
4833 stub_type = is_blx ? arm_stub_a8_veneer_blx :
4834 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b;
4835 }
4836
4837 if (stub_type != arm_stub_none)
4838 {
4839 bfd_vma pc_for_insn = base_vma + i + 4;
48229727
JB		 4840
4841 /* The original instruction is a BL, but the target is
99059e56 4842 an ARM instruction. If we were not making a stub,
48229727
JB		 4843 the BL would have been converted to a BLX. Use the
4844 BLX stub instead in that case. */
4845 if (htab->use_blx && force_target_arm
4846 && stub_type == arm_stub_a8_veneer_bl)
4847 {
4848 stub_type = arm_stub_a8_veneer_blx;
4849 is_blx = TRUE;
4850 is_bl = FALSE;
4851 }
4852 /* Conversely, if the original instruction was
4853 BLX but the target is Thumb mode, use the BL
4854 stub. */
4855 else if (force_target_thumb
4856 && stub_type == arm_stub_a8_veneer_blx)
4857 {
4858 stub_type = arm_stub_a8_veneer_bl;
4859 is_blx = FALSE;
4860 is_bl = TRUE;
4861 }
4862
99059e56
RM		 4863 if (is_blx)
4864 pc_for_insn &= ~ ((bfd_vma) 3);
48229727 4865
99059e56
RM		 4866 /* If we found a relocation, use the proper destination,
4867 not the offset in the (unrelocated) instruction.
48229727
JB		 4868 Note this is always done if we switched the stub type
4869 above. */
99059e56
RM		 4870 if (found)
4871 offset =
81694485 4872 (bfd_signed_vma) (found->destination - pc_for_insn);
48229727 4873
99059e56
RM		 4874 /* If the stub will use a Thumb-mode branch to a
4875 PLT target, redirect it to the preceding Thumb
4876 entry point. */
4877 if (stub_type != arm_stub_a8_veneer_blx && use_plt)
4878 offset -= PLT_THUMB_STUB_SIZE;
7d24e6a6 4879
99059e56 4880 target = pc_for_insn + offset;
48229727 4881
99059e56
RM		 4882 /* The BLX stub is ARM-mode code. Adjust the offset to
4883 take the different PC value (+8 instead of +4) into
48229727 4884 account. */
99059e56
RM		 4885 if (stub_type == arm_stub_a8_veneer_blx)
4886 offset += 4;
4887
4888 if (((base_vma + i) & ~0xfff) == (target & ~0xfff))
4889 {
4890 char *stub_name = NULL;
4891
4892 if (num_a8_fixes == a8_fix_table_size)
4893 {
4894 a8_fix_table_size *= 2;
4895 a8_fixes = (struct a8_erratum_fix *)
4896 bfd_realloc (a8_fixes,
4897 sizeof (struct a8_erratum_fix)
4898 * a8_fix_table_size);
4899 }
48229727 4900
eb7c4339
NS		 4901 if (num_a8_fixes < prev_num_a8_fixes)
4902 {
4903 /* If we're doing a subsequent scan,
4904 check if we've found the same fix as
4905 before, and try and reuse the stub
4906 name. */
4907 stub_name = a8_fixes[num_a8_fixes].stub_name;
4908 if ((a8_fixes[num_a8_fixes].section != section)
4909 || (a8_fixes[num_a8_fixes].offset != i))
4910 {
4911 free (stub_name);
4912 stub_name = NULL;
4913 *stub_changed_p = TRUE;
4914 }
4915 }
4916
4917 if (!stub_name)
4918 {
21d799b5 4919 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1);
eb7c4339
NS		 4920 if (stub_name != NULL)
4921 sprintf (stub_name, "%x:%x", section->id, i);
4922 }
48229727 4923
99059e56
RM		 4924 a8_fixes[num_a8_fixes].input_bfd = input_bfd;
4925 a8_fixes[num_a8_fixes].section = section;
4926 a8_fixes[num_a8_fixes].offset = i;
4927 a8_fixes[num_a8_fixes].addend = offset;
4928 a8_fixes[num_a8_fixes].orig_insn = insn;
4929 a8_fixes[num_a8_fixes].stub_name = stub_name;
4930 a8_fixes[num_a8_fixes].stub_type = stub_type;
4931 a8_fixes[num_a8_fixes].branch_type =
35fc36a8 4932 is_blx ? ST_BRANCH_TO_ARM : ST_BRANCH_TO_THUMB;
48229727 4933
99059e56
RM		 4934 num_a8_fixes++;
4935 }
4936 }
4937 }
48229727 4938
99059e56
RM		 4939 i += insn_32bit ? 4 : 2;
4940 last_was_32bit = insn_32bit;
48229727 4941 last_was_branch = is_32bit_branch;
99059e56
RM		 4942 }
4943 }
48229727
JB		 4944
4945 if (elf_section_data (section)->this_hdr.contents == NULL)
99059e56 4946 free (contents);
48229727 4947 }
fe33d2fa 4948
48229727
JB		 4949 *a8_fixes_p = a8_fixes;
4950 *num_a8_fixes_p = num_a8_fixes;
4951 *a8_fix_table_size_p = a8_fix_table_size;
fe33d2fa 4952
81694485 4953 return FALSE;
48229727
JB		 4954}
4955
906e58ca
NC		 4956/* Determine and set the size of the stub section for a final link.
4957
4958 The basic idea here is to examine all the relocations looking for
4959 PC-relative calls to a target that is unreachable with a "bl"
4960 instruction. */
4961
4962bfd_boolean
4963elf32_arm_size_stubs (bfd *output_bfd,
4964 bfd *stub_bfd,
4965 struct bfd_link_info *info,
4966 bfd_signed_vma group_size,
7a89b94e
NC		 4967 asection * (*add_stub_section) (const char *, asection *,
4968 unsigned int),
906e58ca
NC		 4969 void (*layout_sections_again) (void))
4970{
4971 bfd_size_type stub_group_size;
07d72278 4972 bfd_boolean stubs_always_after_branch;
906e58ca 4973 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
48229727 4974 struct a8_erratum_fix *a8_fixes = NULL;
eb7c4339 4975 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10;
48229727
JB		 4976 struct a8_erratum_reloc *a8_relocs = NULL;
4977 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i;
4978
4dfe6ac6
NC		 4979 if (htab == NULL)
4980 return FALSE;
4981
48229727
JB		 4982 if (htab->fix_cortex_a8)
4983 {
21d799b5 4984 a8_fixes = (struct a8_erratum_fix *)
99059e56 4985 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size);
21d799b5 4986 a8_relocs = (struct a8_erratum_reloc *)
99059e56 4987 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size);
48229727 4988 }
906e58ca
NC		 4989
4990 /* Propagate mach to stub bfd, because it may not have been
4991 finalized when we created stub_bfd. */
4992 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd),
4993 bfd_get_mach (output_bfd));
4994
4995 /* Stash our params away. */
4996 htab->stub_bfd = stub_bfd;
4997 htab->add_stub_section = add_stub_section;
4998 htab->layout_sections_again = layout_sections_again;
07d72278 4999 stubs_always_after_branch = group_size < 0;
48229727
JB		 5000
5001 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page
5002 as the first half of a 32-bit branch straddling two 4K pages. This is a
5003 crude way of enforcing that. */
5004 if (htab->fix_cortex_a8)
5005 stubs_always_after_branch = 1;
5006
906e58ca
NC		 5007 if (group_size < 0)
5008 stub_group_size = -group_size;
5009 else
5010 stub_group_size = group_size;
5011
5012 if (stub_group_size == 1)
5013 {
5014 /* Default values. */
5015 /* Thumb branch range is +-4MB has to be used as the default
5016 maximum size (a given section can contain both ARM and Thumb
5017 code, so the worst case has to be taken into account).
5018
5019 This value is 24K less than that, which allows for 2025
5020 12-byte stubs. If we exceed that, then we will fail to link.
5021 The user will have to relink with an explicit group size
5022 option. */
5023 stub_group_size = 4170000;
5024 }
5025
07d72278 5026 group_sections (htab, stub_group_size, stubs_always_after_branch);
906e58ca 5027
3ae046cc
NS		 5028 /* If we're applying the cortex A8 fix, we need to determine the
5029 program header size now, because we cannot change it later --
5030 that could alter section placements. Notice the A8 erratum fix
5031 ends up requiring the section addresses to remain unchanged
5032 modulo the page size. That's something we cannot represent
5033 inside BFD, and we don't want to force the section alignment to
5034 be the page size. */
5035 if (htab->fix_cortex_a8)
5036 (*htab->layout_sections_again) ();
5037
906e58ca
NC		 5038 while (1)
5039 {
5040 bfd *input_bfd;
5041 unsigned int bfd_indx;
5042 asection *stub_sec;
eb7c4339
NS		 5043 bfd_boolean stub_changed = FALSE;
5044 unsigned prev_num_a8_fixes = num_a8_fixes;
906e58ca 5045
48229727 5046 num_a8_fixes = 0;
906e58ca
NC		 5047 for (input_bfd = info->input_bfds, bfd_indx = 0;
5048 input_bfd != NULL;
c72f2fb2 5049 input_bfd = input_bfd->link.next, bfd_indx++)
906e58ca
NC		 5050 {
5051 Elf_Internal_Shdr *symtab_hdr;
5052 asection *section;
5053 Elf_Internal_Sym *local_syms = NULL;
5054
99059e56
RM		 5055 if (!is_arm_elf (input_bfd))
5056 continue;
adbcc655 5057
48229727
JB		 5058 num_a8_relocs = 0;
5059
906e58ca
NC		 5060 /* We'll need the symbol table in a second. */
5061 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
5062 if (symtab_hdr->sh_info == 0)
5063 continue;
5064
5065 /* Walk over each section attached to the input bfd. */
5066 for (section = input_bfd->sections;
5067 section != NULL;
5068 section = section->next)
5069 {
5070 Elf_Internal_Rela *internal_relocs, *irelaend, *irela;
5071
5072 /* If there aren't any relocs, then there's nothing more
5073 to do. */
5074 if ((section->flags & SEC_RELOC) == 0
5075 || section->reloc_count == 0
5076 || (section->flags & SEC_CODE) == 0)
5077 continue;
5078
5079 /* If this section is a link-once section that will be
5080 discarded, then don't create any stubs. */
5081 if (section->output_section == NULL
5082 || section->output_section->owner != output_bfd)
5083 continue;
5084
5085 /* Get the relocs. */
5086 internal_relocs
5087 = _bfd_elf_link_read_relocs (input_bfd, section, NULL,
5088 NULL, info->keep_memory);
5089 if (internal_relocs == NULL)
5090 goto error_ret_free_local;
5091
5092 /* Now examine each relocation. */
5093 irela = internal_relocs;
5094 irelaend = irela + section->reloc_count;
5095 for (; irela < irelaend; irela++)
5096 {
5097 unsigned int r_type, r_indx;
5098 enum elf32_arm_stub_type stub_type;
5099 struct elf32_arm_stub_hash_entry *stub_entry;
5100 asection *sym_sec;
5101 bfd_vma sym_value;
5102 bfd_vma destination;
5103 struct elf32_arm_link_hash_entry *hash;
7413f23f 5104 const char *sym_name;
906e58ca
NC		 5105 char *stub_name;
5106 const asection *id_sec;
34e77a92 5107 unsigned char st_type;
35fc36a8 5108 enum arm_st_branch_type branch_type;
48229727 5109 bfd_boolean created_stub = FALSE;
906e58ca
NC		 5110
5111 r_type = ELF32_R_TYPE (irela->r_info);
5112 r_indx = ELF32_R_SYM (irela->r_info);
5113
5114 if (r_type >= (unsigned int) R_ARM_max)
5115 {
5116 bfd_set_error (bfd_error_bad_value);
5117 error_ret_free_internal:
5118 if (elf_section_data (section)->relocs == NULL)
5119 free (internal_relocs);
5120 goto error_ret_free_local;
5121 }
b38cadfb 5122
0855e32b
NS		 5123 hash = NULL;
5124 if (r_indx >= symtab_hdr->sh_info)
5125 hash = elf32_arm_hash_entry
5126 (elf_sym_hashes (input_bfd)
5127 [r_indx - symtab_hdr->sh_info]);
b38cadfb 5128
0855e32b
NS		 5129 /* Only look for stubs on branch instructions, or
5130 non-relaxed TLSCALL */
906e58ca 5131 if ((r_type != (unsigned int) R_ARM_CALL)
155d87d7
CL		 5132 && (r_type != (unsigned int) R_ARM_THM_CALL)
5133 && (r_type != (unsigned int) R_ARM_JUMP24)
48229727
JB		 5134 && (r_type != (unsigned int) R_ARM_THM_JUMP19)
5135 && (r_type != (unsigned int) R_ARM_THM_XPC22)
155d87d7 5136 && (r_type != (unsigned int) R_ARM_THM_JUMP24)
0855e32b
NS		 5137 && (r_type != (unsigned int) R_ARM_PLT32)
5138 && !((r_type == (unsigned int) R_ARM_TLS_CALL
5139 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5140 && r_type == elf32_arm_tls_transition
5141 (info, r_type, &hash->root)
5142 && ((hash ? hash->tls_type
5143 : (elf32_arm_local_got_tls_type
5144 (input_bfd)[r_indx]))
5145 & GOT_TLS_GDESC) != 0))
906e58ca
NC		 5146 continue;
5147
5148 /* Now determine the call target, its name, value,
5149 section. */
5150 sym_sec = NULL;
5151 sym_value = 0;
5152 destination = 0;
7413f23f 5153 sym_name = NULL;
b38cadfb 5154
0855e32b
NS		 5155 if (r_type == (unsigned int) R_ARM_TLS_CALL
5156 || r_type == (unsigned int) R_ARM_THM_TLS_CALL)
5157 {
5158 /* A non-relaxed TLS call. The target is the
5159 plt-resident trampoline and nothing to do
5160 with the symbol. */
5161 BFD_ASSERT (htab->tls_trampoline > 0);
5162 sym_sec = htab->root.splt;
5163 sym_value = htab->tls_trampoline;
5164 hash = 0;
34e77a92 5165 st_type = STT_FUNC;
35fc36a8 5166 branch_type = ST_BRANCH_TO_ARM;
0855e32b
NS		 5167 }
5168 else if (!hash)
906e58ca
NC		 5169 {
5170 /* It's a local symbol. */
5171 Elf_Internal_Sym *sym;
906e58ca
NC		 5172
5173 if (local_syms == NULL)
5174 {
5175 local_syms
5176 = (Elf_Internal_Sym *) symtab_hdr->contents;
5177 if (local_syms == NULL)
5178 local_syms
5179 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
5180 symtab_hdr->sh_info, 0,
5181 NULL, NULL, NULL);
5182 if (local_syms == NULL)
5183 goto error_ret_free_internal;
5184 }
5185
5186 sym = local_syms + r_indx;
f6d250ce
TS		 5187 if (sym->st_shndx == SHN_UNDEF)
5188 sym_sec = bfd_und_section_ptr;
5189 else if (sym->st_shndx == SHN_ABS)
5190 sym_sec = bfd_abs_section_ptr;
5191 else if (sym->st_shndx == SHN_COMMON)
5192 sym_sec = bfd_com_section_ptr;
5193 else
5194 sym_sec =
5195 bfd_section_from_elf_index (input_bfd, sym->st_shndx);
5196
ffcb4889
NS		 5197 if (!sym_sec)
5198 /* This is an undefined symbol. It can never
6a631e86 5199 be resolved. */
ffcb4889 5200 continue;
fe33d2fa 5201
906e58ca
NC		 5202 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION)
5203 sym_value = sym->st_value;
5204 destination = (sym_value + irela->r_addend
5205 + sym_sec->output_offset
5206 + sym_sec->output_section->vma);
34e77a92 5207 st_type = ELF_ST_TYPE (sym->st_info);
35fc36a8 5208 branch_type = ARM_SYM_BRANCH_TYPE (sym);
7413f23f
DJ		 5209 sym_name
5210 = bfd_elf_string_from_elf_section (input_bfd,
5211 symtab_hdr->sh_link,
5212 sym->st_name);
906e58ca
NC		 5213 }
5214 else
5215 {
5216 /* It's an external symbol. */
906e58ca
NC		 5217 while (hash->root.root.type == bfd_link_hash_indirect
5218 || hash->root.root.type == bfd_link_hash_warning)
5219 hash = ((struct elf32_arm_link_hash_entry *)
5220 hash->root.root.u.i.link);
5221
5222 if (hash->root.root.type == bfd_link_hash_defined
5223 || hash->root.root.type == bfd_link_hash_defweak)
5224 {
5225 sym_sec = hash->root.root.u.def.section;
5226 sym_value = hash->root.root.u.def.value;
022f8312
CL		 5227
5228 struct elf32_arm_link_hash_table *globals =
5229 elf32_arm_hash_table (info);
5230
5231 /* For a destination in a shared library,
5232 use the PLT stub as target address to
5233 decide whether a branch stub is
5234 needed. */
4dfe6ac6 5235 if (globals != NULL
362d30a1 5236 && globals->root.splt != NULL
4dfe6ac6 5237 && hash != NULL
022f8312
CL		 5238 && hash->root.plt.offset != (bfd_vma) -1)
5239 {
362d30a1 5240 sym_sec = globals->root.splt;
022f8312
CL		 5241 sym_value = hash->root.plt.offset;
5242 if (sym_sec->output_section != NULL)
5243 destination = (sym_value
5244 + sym_sec->output_offset
5245 + sym_sec->output_section->vma);
5246 }
5247 else if (sym_sec->output_section != NULL)
906e58ca
NC		 5248 destination = (sym_value + irela->r_addend
5249 + sym_sec->output_offset
5250 + sym_sec->output_section->vma);
5251 }
69c5861e
CL		 5252 else if ((hash->root.root.type == bfd_link_hash_undefined)
5253 || (hash->root.root.type == bfd_link_hash_undefweak))
5254 {
5255 /* For a shared library, use the PLT stub as
5256 target address to decide whether a long
5257 branch stub is needed.
5258 For absolute code, they cannot be handled. */
5259 struct elf32_arm_link_hash_table *globals =
5260 elf32_arm_hash_table (info);
5261
4dfe6ac6 5262 if (globals != NULL
362d30a1 5263 && globals->root.splt != NULL
4dfe6ac6 5264 && hash != NULL
69c5861e
CL		 5265 && hash->root.plt.offset != (bfd_vma) -1)
5266 {
362d30a1 5267 sym_sec = globals->root.splt;
69c5861e
CL		 5268 sym_value = hash->root.plt.offset;
5269 if (sym_sec->output_section != NULL)
5270 destination = (sym_value
5271 + sym_sec->output_offset
5272 + sym_sec->output_section->vma);
5273 }
5274 else
5275 continue;
5276 }
906e58ca
NC		 5277 else
5278 {
5279 bfd_set_error (bfd_error_bad_value);
5280 goto error_ret_free_internal;
5281 }
34e77a92 5282 st_type = hash->root.type;
35fc36a8 5283 branch_type = hash->root.target_internal;
7413f23f 5284 sym_name = hash->root.root.root.string;
906e58ca
NC		 5285 }
5286
48229727 5287 do
7413f23f 5288 {
48229727
JB		 5289 /* Determine what (if any) linker stub is needed. */
5290 stub_type = arm_type_of_stub (info, section, irela,
34e77a92
RS		 5291 st_type, &branch_type,
5292 hash, destination, sym_sec,
48229727
JB		 5293 input_bfd, sym_name);
5294 if (stub_type == arm_stub_none)
5295 break;
5296
5297 /* Support for grouping stub sections. */
5298 id_sec = htab->stub_group[section->id].link_sec;
5299
5300 /* Get the name of this stub. */
5301 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash,
fe33d2fa 5302 irela, stub_type);
48229727
JB		 5303 if (!stub_name)
5304 goto error_ret_free_internal;
5305
5306 /* We've either created a stub for this reloc already,
5307 or we are about to. */
5308 created_stub = TRUE;
5309
5310 stub_entry = arm_stub_hash_lookup
5311 (&htab->stub_hash_table, stub_name,
5312 FALSE, FALSE);
5313 if (stub_entry != NULL)
5314 {
5315 /* The proper stub has already been created. */
5316 free (stub_name);
eb7c4339 5317 stub_entry->target_value = sym_value;
48229727
JB		 5318 break;
5319 }
7413f23f 5320
48229727
JB		 5321 stub_entry = elf32_arm_add_stub (stub_name, section,
5322 htab);
5323 if (stub_entry == NULL)
5324 {
5325 free (stub_name);
5326 goto error_ret_free_internal;
5327 }
7413f23f 5328
99059e56
RM		 5329 stub_entry->target_value = sym_value;
5330 stub_entry->target_section = sym_sec;
5331 stub_entry->stub_type = stub_type;
5332 stub_entry->h = hash;
5333 stub_entry->branch_type = branch_type;
5334
5335 if (sym_name == NULL)
5336 sym_name = "unnamed";
5337 stub_entry->output_name = (char *)
5338 bfd_alloc (htab->stub_bfd,
5339 sizeof (THUMB2ARM_GLUE_ENTRY_NAME)
5340 + strlen (sym_name));
5341 if (stub_entry->output_name == NULL)
5342 {
5343 free (stub_name);
5344 goto error_ret_free_internal;
5345 }
5346
5347 /* For historical reasons, use the existing names for
5348 ARM-to-Thumb and Thumb-to-ARM stubs. */
5349 if ((r_type == (unsigned int) R_ARM_THM_CALL
35fc36a8
RS		 5350 || r_type == (unsigned int) R_ARM_THM_JUMP24)
5351 && branch_type == ST_BRANCH_TO_ARM)
99059e56
RM		 5352 sprintf (stub_entry->output_name,
5353 THUMB2ARM_GLUE_ENTRY_NAME, sym_name);
5354 else if ((r_type == (unsigned int) R_ARM_CALL
35fc36a8
RS		 5355 || r_type == (unsigned int) R_ARM_JUMP24)
5356 && branch_type == ST_BRANCH_TO_THUMB)
99059e56
RM		 5357 sprintf (stub_entry->output_name,
5358 ARM2THUMB_GLUE_ENTRY_NAME, sym_name);
5359 else
5360 sprintf (stub_entry->output_name, STUB_ENTRY_NAME,
5361 sym_name);
5362
5363 stub_changed = TRUE;
5364 }
5365 while (0);
5366
5367 /* Look for relocations which might trigger Cortex-A8
5368 erratum. */
5369 if (htab->fix_cortex_a8
5370 && (r_type == (unsigned int) R_ARM_THM_JUMP24
5371 || r_type == (unsigned int) R_ARM_THM_JUMP19
5372 || r_type == (unsigned int) R_ARM_THM_CALL
5373 || r_type == (unsigned int) R_ARM_THM_XPC22))
5374 {
5375 bfd_vma from = section->output_section->vma
5376 + section->output_offset
5377 + irela->r_offset;
5378
5379 if ((from & 0xfff) == 0xffe)
5380 {
5381 /* Found a candidate. Note we haven't checked the
5382 destination is within 4K here: if we do so (and
5383 don't create an entry in a8_relocs) we can't tell
5384 that a branch should have been relocated when
5385 scanning later. */
5386 if (num_a8_relocs == a8_reloc_table_size)
5387 {
5388 a8_reloc_table_size *= 2;
5389 a8_relocs = (struct a8_erratum_reloc *)
5390 bfd_realloc (a8_relocs,
5391 sizeof (struct a8_erratum_reloc)
5392 * a8_reloc_table_size);
5393 }
5394
5395 a8_relocs[num_a8_relocs].from = from;
5396 a8_relocs[num_a8_relocs].destination = destination;
5397 a8_relocs[num_a8_relocs].r_type = r_type;
5398 a8_relocs[num_a8_relocs].branch_type = branch_type;
5399 a8_relocs[num_a8_relocs].sym_name = sym_name;
5400 a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
5401 a8_relocs[num_a8_relocs].hash = hash;
5402
5403 num_a8_relocs++;
5404 }
5405 }
906e58ca
NC		 5406 }
5407
99059e56
RM		 5408 /* We're done with the internal relocs, free them. */
5409 if (elf_section_data (section)->relocs == NULL)
5410 free (internal_relocs);
5411 }
48229727 5412
99059e56 5413 if (htab->fix_cortex_a8)
48229727 5414 {
99059e56
RM		 5415 /* Sort relocs which might apply to Cortex-A8 erratum. */
5416 qsort (a8_relocs, num_a8_relocs,
eb7c4339 5417 sizeof (struct a8_erratum_reloc),
99059e56 5418 &a8_reloc_compare);
48229727 5419
99059e56
RM		 5420 /* Scan for branches which might trigger Cortex-A8 erratum. */
5421 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes,
48229727 5422 &num_a8_fixes, &a8_fix_table_size,
eb7c4339
NS		 5423 a8_relocs, num_a8_relocs,
5424 prev_num_a8_fixes, &stub_changed)
5425 != 0)
48229727 5426 goto error_ret_free_local;
5e681ec4 5427 }
5e681ec4
PB		 5428 }
5429
eb7c4339 5430 if (prev_num_a8_fixes != num_a8_fixes)
99059e56 5431 stub_changed = TRUE;
48229727 5432
906e58ca
NC		 5433 if (!stub_changed)
5434 break;
5e681ec4 5435
906e58ca
NC		 5436 /* OK, we've added some stubs. Find out the new size of the
5437 stub sections. */
5438 for (stub_sec = htab->stub_bfd->sections;
5439 stub_sec != NULL;
5440 stub_sec = stub_sec->next)
3e6b1042
DJ		 5441 {
5442 /* Ignore non-stub sections. */
5443 if (!strstr (stub_sec->name, STUB_SUFFIX))
5444 continue;
5445
5446 stub_sec->size = 0;
5447 }
b34b2d70 5448
906e58ca
NC		 5449 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab);
5450
48229727
JB		 5451 /* Add Cortex-A8 erratum veneers to stub section sizes too. */
5452 if (htab->fix_cortex_a8)
99059e56
RM		 5453 for (i = 0; i < num_a8_fixes; i++)
5454 {
48229727
JB		 5455 stub_sec = elf32_arm_create_or_find_stub_sec (NULL,
5456 a8_fixes[i].section, htab);
5457
5458 if (stub_sec == NULL)
5459 goto error_ret_free_local;
5460
99059e56
RM		 5461 stub_sec->size
5462 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL,
5463 NULL);
5464 }
48229727
JB		 5465
5466
906e58ca
NC		 5467 /* Ask the linker to do its stuff. */
5468 (*htab->layout_sections_again) ();
ba93b8ac
DJ		 5469 }
5470
48229727
JB		 5471 /* Add stubs for Cortex-A8 erratum fixes now. */
5472 if (htab->fix_cortex_a8)
5473 {
5474 for (i = 0; i < num_a8_fixes; i++)
99059e56
RM		 5475 {
5476 struct elf32_arm_stub_hash_entry *stub_entry;
5477 char *stub_name = a8_fixes[i].stub_name;
5478 asection *section = a8_fixes[i].section;
5479 unsigned int section_id = a8_fixes[i].section->id;
5480 asection *link_sec = htab->stub_group[section_id].link_sec;
5481 asection *stub_sec = htab->stub_group[section_id].stub_sec;
5482 const insn_sequence *template_sequence;
5483 int template_size, size = 0;
5484
5485 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name,
5486 TRUE, FALSE);
5487 if (stub_entry == NULL)
5488 {
5489 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"),
5490 section->owner,
5491 stub_name);
5492 return FALSE;
5493 }
5494
5495 stub_entry->stub_sec = stub_sec;
5496 stub_entry->stub_offset = 0;
5497 stub_entry->id_sec = link_sec;
5498 stub_entry->stub_type = a8_fixes[i].stub_type;
5499 stub_entry->target_section = a8_fixes[i].section;
5500 stub_entry->target_value = a8_fixes[i].offset;
5501 stub_entry->target_addend = a8_fixes[i].addend;
5502 stub_entry->orig_insn = a8_fixes[i].orig_insn;
35fc36a8 5503 stub_entry->branch_type = a8_fixes[i].branch_type;
48229727 5504
99059e56
RM		 5505 size = find_stub_size_and_template (a8_fixes[i].stub_type,
5506 &template_sequence,
5507 &template_size);
48229727 5508
99059e56
RM		 5509 stub_entry->stub_size = size;
5510 stub_entry->stub_template = template_sequence;
5511 stub_entry->stub_template_size = template_size;
5512 }
48229727
JB		 5513
5514 /* Stash the Cortex-A8 erratum fix array for use later in
99059e56 5515 elf32_arm_write_section(). */
48229727
JB		 5516 htab->a8_erratum_fixes = a8_fixes;
5517 htab->num_a8_erratum_fixes = num_a8_fixes;
5518 }
5519 else
5520 {
5521 htab->a8_erratum_fixes = NULL;
5522 htab->num_a8_erratum_fixes = 0;
5523 }
906e58ca
NC		 5524 return TRUE;
5525
5526 error_ret_free_local:
5527 return FALSE;
5e681ec4
PB		 5528}
5529
906e58ca
NC		 5530/* Build all the stubs associated with the current output file. The
5531 stubs are kept in a hash table attached to the main linker hash
5532 table. We also set up the .plt entries for statically linked PIC
5533 functions here. This function is called via arm_elf_finish in the
5534 linker. */
252b5132 5535
906e58ca
NC		 5536bfd_boolean
5537elf32_arm_build_stubs (struct bfd_link_info *info)
252b5132 5538{
906e58ca
NC		 5539 asection *stub_sec;
5540 struct bfd_hash_table *table;
5541 struct elf32_arm_link_hash_table *htab;
252b5132 5542
906e58ca 5543 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 5544 if (htab == NULL)
5545 return FALSE;
252b5132 5546
906e58ca
NC		 5547 for (stub_sec = htab->stub_bfd->sections;
5548 stub_sec != NULL;
5549 stub_sec = stub_sec->next)
252b5132 5550 {
906e58ca
NC		 5551 bfd_size_type size;
5552
8029a119 5553 /* Ignore non-stub sections. */
906e58ca
NC		 5554 if (!strstr (stub_sec->name, STUB_SUFFIX))
5555 continue;
5556
5557 /* Allocate memory to hold the linker stubs. */
5558 size = stub_sec->size;
21d799b5 5559 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size);
906e58ca
NC		 5560 if (stub_sec->contents == NULL && size != 0)
5561 return FALSE;
5562 stub_sec->size = 0;
252b5132
RH		 5563 }
5564
906e58ca
NC		 5565 /* Build the stubs as directed by the stub hash table. */
5566 table = &htab->stub_hash_table;
5567 bfd_hash_traverse (table, arm_build_one_stub, info);
eb7c4339
NS		 5568 if (htab->fix_cortex_a8)
5569 {
5570 /* Place the cortex a8 stubs last. */
5571 htab->fix_cortex_a8 = -1;
5572 bfd_hash_traverse (table, arm_build_one_stub, info);
5573 }
252b5132 5574
906e58ca 5575 return TRUE;
252b5132
RH		 5576}
5577
9b485d32
NC		 5578/* Locate the Thumb encoded calling stub for NAME. */
5579
252b5132 5580static struct elf_link_hash_entry *
57e8b36a
NC		 5581find_thumb_glue (struct bfd_link_info *link_info,
5582 const char *name,
f2a9dd69 5583 char **error_message)
252b5132
RH		 5584{
5585 char *tmp_name;
5586 struct elf_link_hash_entry *hash;
5587 struct elf32_arm_link_hash_table *hash_table;
5588
5589 /* We need a pointer to the armelf specific hash table. */
5590 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5591 if (hash_table == NULL)
5592 return NULL;
252b5132 5593
21d799b5 5594 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5595 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5596
5597 BFD_ASSERT (tmp_name);
5598
5599 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
5600
5601 hash = elf_link_hash_lookup
b34976b6 5602 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5603
b1657152
AM		 5604 if (hash == NULL
5605 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
5606 tmp_name, name) == -1)
5607 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5608
5609 free (tmp_name);
5610
5611 return hash;
5612}
5613
9b485d32
NC		 5614/* Locate the ARM encoded calling stub for NAME. */
5615
252b5132 5616static struct elf_link_hash_entry *
57e8b36a
NC		 5617find_arm_glue (struct bfd_link_info *link_info,
5618 const char *name,
f2a9dd69 5619 char **error_message)
252b5132
RH		 5620{
5621 char *tmp_name;
5622 struct elf_link_hash_entry *myh;
5623 struct elf32_arm_link_hash_table *hash_table;
5624
5625 /* We need a pointer to the elfarm specific hash table. */
5626 hash_table = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 5627 if (hash_table == NULL)
5628 return NULL;
252b5132 5629
21d799b5 5630 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5631 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5632
5633 BFD_ASSERT (tmp_name);
5634
5635 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5636
5637 myh = elf_link_hash_lookup
b34976b6 5638 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 5639
b1657152
AM		 5640 if (myh == NULL
5641 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
5642 tmp_name, name) == -1)
5643 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 5644
5645 free (tmp_name);
5646
5647 return myh;
5648}
5649
8f6277f5 5650/* ARM->Thumb glue (static images):
252b5132
RH		 5651
5652 .arm
5653 __func_from_arm:
5654 ldr r12, __func_addr
5655 bx r12
5656 __func_addr:
906e58ca 5657 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 5658
26079076
PB		 5659 (v5t static images)
5660 .arm
5661 __func_from_arm:
5662 ldr pc, __func_addr
5663 __func_addr:
906e58ca 5664 .word func @ behave as if you saw a ARM_32 reloc.
26079076 5665
8f6277f5
PB		 5666 (relocatable images)
5667 .arm
5668 __func_from_arm:
5669 ldr r12, __func_offset
5670 add r12, r12, pc
5671 bx r12
5672 __func_offset:
8029a119 5673 .word func - . */
8f6277f5
PB		 5674
5675#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 5676static const insn32 a2t1_ldr_insn = 0xe59fc000;
5677static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
5678static const insn32 a2t3_func_addr_insn = 0x00000001;
5679
26079076
PB		 5680#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
5681static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
5682static const insn32 a2t2v5_func_addr_insn = 0x00000001;
5683
8f6277f5
PB		 5684#define ARM2THUMB_PIC_GLUE_SIZE 16
5685static const insn32 a2t1p_ldr_insn = 0xe59fc004;
5686static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
5687static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
5688
9b485d32 5689/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132 5690
8029a119
NC		 5691 .thumb .thumb
5692 .align 2 .align 2
5693 __func_from_thumb: __func_from_thumb:
5694 bx pc push {r6, lr}
5695 nop ldr r6, __func_addr
5696 .arm mov lr, pc
5697 b func bx r6
99059e56
RM		 5698 .arm
5699 ;; back_to_thumb
5700 ldmia r13! {r6, lr}
5701 bx lr
5702 __func_addr:
5703 .word func */
252b5132
RH		 5704
5705#define THUMB2ARM_GLUE_SIZE 8
5706static const insn16 t2a1_bx_pc_insn = 0x4778;
5707static const insn16 t2a2_noop_insn = 0x46c0;
5708static const insn32 t2a3_b_insn = 0xea000000;
5709
c7b8f16e
JB		 5710#define VFP11_ERRATUM_VENEER_SIZE 8
5711
845b51d6
PB		 5712#define ARM_BX_VENEER_SIZE 12
5713static const insn32 armbx1_tst_insn = 0xe3100001;
5714static const insn32 armbx2_moveq_insn = 0x01a0f000;
5715static const insn32 armbx3_bx_insn = 0xe12fff10;
5716
7e392df6 5717#ifndef ELFARM_NABI_C_INCLUDED
8029a119
NC		 5718static void
5719arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name)
252b5132
RH		 5720{
5721 asection * s;
8029a119 5722 bfd_byte * contents;
252b5132 5723
8029a119 5724 if (size == 0)
3e6b1042
DJ		 5725 {
5726 /* Do not include empty glue sections in the output. */
5727 if (abfd != NULL)
5728 {
3d4d4302 5729 s = bfd_get_linker_section (abfd, name);
3e6b1042
DJ		 5730 if (s != NULL)
5731 s->flags |= SEC_EXCLUDE;
5732 }
5733 return;
5734 }
252b5132 5735
8029a119 5736 BFD_ASSERT (abfd != NULL);
252b5132 5737
3d4d4302 5738 s = bfd_get_linker_section (abfd, name);
8029a119 5739 BFD_ASSERT (s != NULL);
252b5132 5740
21d799b5 5741 contents = (bfd_byte *) bfd_alloc (abfd, size);
252b5132 5742
8029a119
NC		 5743 BFD_ASSERT (s->size == size);
5744 s->contents = contents;
5745}
906e58ca 5746
8029a119
NC		 5747bfd_boolean
5748bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
5749{
5750 struct elf32_arm_link_hash_table * globals;
906e58ca 5751
8029a119
NC		 5752 globals = elf32_arm_hash_table (info);
5753 BFD_ASSERT (globals != NULL);
906e58ca 5754
8029a119
NC		 5755 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5756 globals->arm_glue_size,
5757 ARM2THUMB_GLUE_SECTION_NAME);
906e58ca 5758
8029a119
NC		 5759 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5760 globals->thumb_glue_size,
5761 THUMB2ARM_GLUE_SECTION_NAME);
252b5132 5762
8029a119
NC		 5763 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5764 globals->vfp11_erratum_glue_size,
5765 VFP11_ERRATUM_VENEER_SECTION_NAME);
845b51d6 5766
8029a119
NC		 5767 arm_allocate_glue_section_space (globals->bfd_of_glue_owner,
5768 globals->bx_glue_size,
845b51d6
PB		 5769 ARM_BX_GLUE_SECTION_NAME);
5770
b34976b6 5771 return TRUE;
252b5132
RH		 5772}
5773
a4fd1a8e 5774/* Allocate space and symbols for calling a Thumb function from Arm mode.
906e58ca
NC		 5775 returns the symbol identifying the stub. */
5776
a4fd1a8e 5777static struct elf_link_hash_entry *
57e8b36a
NC		 5778record_arm_to_thumb_glue (struct bfd_link_info * link_info,
5779 struct elf_link_hash_entry * h)
252b5132
RH		 5780{
5781 const char * name = h->root.root.string;
63b0f745 5782 asection * s;
252b5132
RH		 5783 char * tmp_name;
5784 struct elf_link_hash_entry * myh;
14a793b2 5785 struct bfd_link_hash_entry * bh;
252b5132 5786 struct elf32_arm_link_hash_table * globals;
dc810e39 5787 bfd_vma val;
2f475487 5788 bfd_size_type size;
252b5132
RH		 5789
5790 globals = elf32_arm_hash_table (link_info);
252b5132
RH		 5791 BFD_ASSERT (globals != NULL);
5792 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5793
3d4d4302 5794 s = bfd_get_linker_section
252b5132
RH		 5795 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
5796
252b5132
RH		 5797 BFD_ASSERT (s != NULL);
5798
21d799b5 5799 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name)
99059e56 5800 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 5801
5802 BFD_ASSERT (tmp_name);
5803
5804 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
5805
5806 myh = elf_link_hash_lookup
b34976b6 5807 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 5808
5809 if (myh != NULL)
5810 {
9b485d32 5811 /* We've already seen this guy. */
252b5132 5812 free (tmp_name);
a4fd1a8e 5813 return myh;
252b5132
RH		 5814 }
5815
57e8b36a
NC		 5816 /* The only trick here is using hash_table->arm_glue_size as the value.
5817 Even though the section isn't allocated yet, this is where we will be
3dccd7b7
DJ		 5818 putting it. The +1 on the value marks that the stub has not been
5819 output yet - not that it is a Thumb function. */
14a793b2 5820 bh = NULL;
dc810e39
AM		 5821 val = globals->arm_glue_size + 1;
5822 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
5823 tmp_name, BSF_GLOBAL, s, val,
b34976b6 5824 NULL, TRUE, FALSE, &bh);
252b5132 5825
b7693d02
DJ		 5826 myh = (struct elf_link_hash_entry *) bh;
5827 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5828 myh->forced_local = 1;
5829
252b5132
RH		 5830 free (tmp_name);
5831
27e55c4d
PB		 5832 if (link_info->shared || globals->root.is_relocatable_executable
5833 || globals->pic_veneer)
2f475487 5834 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 5835 else if (globals->use_blx)
5836 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 5837 else
2f475487
AM		 5838 size = ARM2THUMB_STATIC_GLUE_SIZE;
5839
5840 s->size += size;
5841 globals->arm_glue_size += size;
252b5132 5842
a4fd1a8e 5843 return myh;
252b5132
RH		 5844}
5845
845b51d6
PB		 5846/* Allocate space for ARMv4 BX veneers. */
5847
5848static void
5849record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
5850{
5851 asection * s;
5852 struct elf32_arm_link_hash_table *globals;
5853 char *tmp_name;
5854 struct elf_link_hash_entry *myh;
5855 struct bfd_link_hash_entry *bh;
5856 bfd_vma val;
5857
5858 /* BX PC does not need a veneer. */
5859 if (reg == 15)
5860 return;
5861
5862 globals = elf32_arm_hash_table (link_info);
845b51d6
PB		 5863 BFD_ASSERT (globals != NULL);
5864 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
5865
5866 /* Check if this veneer has already been allocated. */
5867 if (globals->bx_glue_offset[reg])
5868 return;
5869
3d4d4302 5870 s = bfd_get_linker_section
845b51d6
PB		 5871 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
5872
5873 BFD_ASSERT (s != NULL);
5874
5875 /* Add symbol for veneer. */
21d799b5
NC		 5876 tmp_name = (char *)
5877 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
906e58ca 5878
845b51d6 5879 BFD_ASSERT (tmp_name);
906e58ca 5880
845b51d6 5881 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
906e58ca 5882
845b51d6
PB		 5883 myh = elf_link_hash_lookup
5884 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5885
845b51d6 5886 BFD_ASSERT (myh == NULL);
906e58ca 5887
845b51d6
PB		 5888 bh = NULL;
5889 val = globals->bx_glue_size;
5890 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
99059e56
RM		 5891 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5892 NULL, TRUE, FALSE, &bh);
845b51d6
PB		 5893
5894 myh = (struct elf_link_hash_entry *) bh;
5895 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5896 myh->forced_local = 1;
5897
5898 s->size += ARM_BX_VENEER_SIZE;
5899 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
5900 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
5901}
5902
5903
c7b8f16e
JB		 5904/* Add an entry to the code/data map for section SEC. */
5905
5906static void
5907elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
5908{
5909 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
5910 unsigned int newidx;
906e58ca 5911
c7b8f16e
JB		 5912 if (sec_data->map == NULL)
5913 {
21d799b5 5914 sec_data->map = (elf32_arm_section_map *)
99059e56 5915 bfd_malloc (sizeof (elf32_arm_section_map));
c7b8f16e
JB		 5916 sec_data->mapcount = 0;
5917 sec_data->mapsize = 1;
5918 }
906e58ca 5919
c7b8f16e 5920 newidx = sec_data->mapcount++;
906e58ca 5921
c7b8f16e
JB		 5922 if (sec_data->mapcount > sec_data->mapsize)
5923 {
5924 sec_data->mapsize *= 2;
21d799b5 5925 sec_data->map = (elf32_arm_section_map *)
99059e56
RM		 5926 bfd_realloc_or_free (sec_data->map, sec_data->mapsize
5927 * sizeof (elf32_arm_section_map));
515ef31d
NC		 5928 }
5929
5930 if (sec_data->map)
5931 {
5932 sec_data->map[newidx].vma = vma;
5933 sec_data->map[newidx].type = type;
c7b8f16e 5934 }
c7b8f16e
JB		 5935}
5936
5937
5938/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
5939 veneers are handled for now. */
5940
5941static bfd_vma
5942record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
99059e56
RM		 5943 elf32_vfp11_erratum_list *branch,
5944 bfd *branch_bfd,
5945 asection *branch_sec,
5946 unsigned int offset)
c7b8f16e
JB		 5947{
5948 asection *s;
5949 struct elf32_arm_link_hash_table *hash_table;
5950 char *tmp_name;
5951 struct elf_link_hash_entry *myh;
5952 struct bfd_link_hash_entry *bh;
5953 bfd_vma val;
5954 struct _arm_elf_section_data *sec_data;
c7b8f16e 5955 elf32_vfp11_erratum_list *newerr;
906e58ca 5956
c7b8f16e 5957 hash_table = elf32_arm_hash_table (link_info);
c7b8f16e
JB		 5958 BFD_ASSERT (hash_table != NULL);
5959 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
906e58ca 5960
3d4d4302 5961 s = bfd_get_linker_section
c7b8f16e 5962 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
906e58ca 5963
c7b8f16e 5964 sec_data = elf32_arm_section_data (s);
906e58ca 5965
c7b8f16e 5966 BFD_ASSERT (s != NULL);
906e58ca 5967
21d799b5 5968 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 5969 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
906e58ca 5970
c7b8f16e 5971 BFD_ASSERT (tmp_name);
906e58ca 5972
c7b8f16e
JB		 5973 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
5974 hash_table->num_vfp11_fixes);
906e58ca 5975
c7b8f16e
JB		 5976 myh = elf_link_hash_lookup
5977 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 5978
c7b8f16e 5979 BFD_ASSERT (myh == NULL);
906e58ca 5980
c7b8f16e
JB		 5981 bh = NULL;
5982 val = hash_table->vfp11_erratum_glue_size;
5983 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
99059e56
RM		 5984 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
5985 NULL, TRUE, FALSE, &bh);
c7b8f16e
JB		 5986
5987 myh = (struct elf_link_hash_entry *) bh;
5988 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
5989 myh->forced_local = 1;
5990
5991 /* Link veneer back to calling location. */
c7e2358a 5992 sec_data->erratumcount += 1;
21d799b5
NC		 5993 newerr = (elf32_vfp11_erratum_list *)
5994 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
906e58ca 5995
c7b8f16e
JB		 5996 newerr->type = VFP11_ERRATUM_ARM_VENEER;
5997 newerr->vma = -1;
5998 newerr->u.v.branch = branch;
5999 newerr->u.v.id = hash_table->num_vfp11_fixes;
6000 branch->u.b.veneer = newerr;
6001
6002 newerr->next = sec_data->erratumlist;
6003 sec_data->erratumlist = newerr;
6004
6005 /* A symbol for the return from the veneer. */
6006 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6007 hash_table->num_vfp11_fixes);
6008
6009 myh = elf_link_hash_lookup
6010 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
906e58ca 6011
c7b8f16e
JB		 6012 if (myh != NULL)
6013 abort ();
6014
6015 bh = NULL;
6016 val = offset + 4;
6017 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
6018 branch_sec, val, NULL, TRUE, FALSE, &bh);
906e58ca 6019
c7b8f16e
JB		 6020 myh = (struct elf_link_hash_entry *) bh;
6021 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
6022 myh->forced_local = 1;
6023
6024 free (tmp_name);
906e58ca 6025
c7b8f16e
JB		 6026 /* Generate a mapping symbol for the veneer section, and explicitly add an
6027 entry for that symbol to the code/data map for the section. */
6028 if (hash_table->vfp11_erratum_glue_size == 0)
6029 {
6030 bh = NULL;
6031 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
99059e56 6032 ever requires this erratum fix. */
c7b8f16e
JB		 6033 _bfd_generic_link_add_one_symbol (link_info,
6034 hash_table->bfd_of_glue_owner, "$a",
6035 BSF_LOCAL, s, 0, NULL,
99059e56 6036 TRUE, FALSE, &bh);
c7b8f16e
JB		 6037
6038 myh = (struct elf_link_hash_entry *) bh;
6039 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
6040 myh->forced_local = 1;
906e58ca 6041
c7b8f16e 6042 /* The elf32_arm_init_maps function only cares about symbols from input
99059e56
RM		 6043 BFDs. We must make a note of this generated mapping symbol
6044 ourselves so that code byteswapping works properly in
6045 elf32_arm_write_section. */
c7b8f16e
JB		 6046 elf32_arm_section_map_add (s, 'a', 0);
6047 }
906e58ca 6048
c7b8f16e
JB		 6049 s->size += VFP11_ERRATUM_VENEER_SIZE;
6050 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
6051 hash_table->num_vfp11_fixes++;
906e58ca 6052
c7b8f16e
JB		 6053 /* The offset of the veneer. */
6054 return val;
6055}
6056
8029a119 6057#define ARM_GLUE_SECTION_FLAGS \
3e6b1042
DJ		 6058 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \
6059 | SEC_READONLY | SEC_LINKER_CREATED)
8029a119
NC		 6060
6061/* Create a fake section for use by the ARM backend of the linker. */
6062
6063static bfd_boolean
6064arm_make_glue_section (bfd * abfd, const char * name)
6065{
6066 asection * sec;
6067
3d4d4302 6068 sec = bfd_get_linker_section (abfd, name);
8029a119
NC		 6069 if (sec != NULL)
6070 /* Already made. */
6071 return TRUE;
6072
3d4d4302 6073 sec = bfd_make_section_anyway_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS);
8029a119
NC		 6074
6075 if (sec == NULL
6076 || !bfd_set_section_alignment (abfd, sec, 2))
6077 return FALSE;
6078
6079 /* Set the gc mark to prevent the section from being removed by garbage
6080 collection, despite the fact that no relocs refer to this section. */
6081 sec->gc_mark = 1;
6082
6083 return TRUE;
6084}
6085
1db37fe6
YG		 6086/* Set size of .plt entries. This function is called from the
6087 linker scripts in ld/emultempl/{armelf}.em. */
6088
6089void
6090bfd_elf32_arm_use_long_plt (void)
6091{
6092 elf32_arm_use_long_plt_entry = TRUE;
6093}
6094
8afb0e02
NC		 6095/* Add the glue sections to ABFD. This function is called from the
6096 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 6097
b34976b6 6098bfd_boolean
57e8b36a
NC		 6099bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
6100 struct bfd_link_info *info)
252b5132 6101{
8afb0e02
NC		 6102 /* If we are only performing a partial
6103 link do not bother adding the glue. */
1049f94e 6104 if (info->relocatable)
b34976b6 6105 return TRUE;
252b5132 6106
8029a119
NC		 6107 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME)
6108 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME)
6109 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME)
6110 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME);
8afb0e02
NC		 6111}
6112
6113/* Select a BFD to be used to hold the sections used by the glue code.
6114 This function is called from the linker scripts in ld/emultempl/
8029a119 6115 {armelf/pe}.em. */
8afb0e02 6116
b34976b6 6117bfd_boolean
57e8b36a 6118bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 6119{
6120 struct elf32_arm_link_hash_table *globals;
6121
6122 /* If we are only performing a partial link
6123 do not bother getting a bfd to hold the glue. */
1049f94e 6124 if (info->relocatable)
b34976b6 6125 return TRUE;
8afb0e02 6126
b7693d02
DJ		 6127 /* Make sure we don't attach the glue sections to a dynamic object. */
6128 BFD_ASSERT (!(abfd->flags & DYNAMIC));
6129
8afb0e02 6130 globals = elf32_arm_hash_table (info);
8afb0e02
NC		 6131 BFD_ASSERT (globals != NULL);
6132
6133 if (globals->bfd_of_glue_owner != NULL)
b34976b6 6134 return TRUE;
8afb0e02 6135
252b5132
RH		 6136 /* Save the bfd for later use. */
6137 globals->bfd_of_glue_owner = abfd;
cedb70c5 6138
b34976b6 6139 return TRUE;
252b5132
RH		 6140}
6141
906e58ca
NC		 6142static void
6143check_use_blx (struct elf32_arm_link_hash_table *globals)
39b41c9c 6144{
2de70689
MGD		 6145 int cpu_arch;
6146
b38cadfb 6147 cpu_arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
2de70689
MGD		 6148 Tag_CPU_arch);
6149
6150 if (globals->fix_arm1176)
6151 {
6152 if (cpu_arch == TAG_CPU_ARCH_V6T2 || cpu_arch > TAG_CPU_ARCH_V6K)
6153 globals->use_blx = 1;
6154 }
6155 else
6156 {
6157 if (cpu_arch > TAG_CPU_ARCH_V4T)
6158 globals->use_blx = 1;
6159 }
39b41c9c
PB		 6160}
6161
b34976b6 6162bfd_boolean
57e8b36a 6163bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 6164 struct bfd_link_info *link_info)
252b5132
RH		 6165{
6166 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 6167 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 6168 Elf_Internal_Rela *irel, *irelend;
6169 bfd_byte *contents = NULL;
252b5132
RH		 6170
6171 asection *sec;
6172 struct elf32_arm_link_hash_table *globals;
6173
6174 /* If we are only performing a partial link do not bother
6175 to construct any glue. */
1049f94e 6176 if (link_info->relocatable)
b34976b6 6177 return TRUE;
252b5132 6178
39ce1a6a
NC		 6179 /* Here we have a bfd that is to be included on the link. We have a
6180 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132 6181 globals = elf32_arm_hash_table (link_info);
252b5132 6182 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 6183
6184 check_use_blx (globals);
252b5132 6185
d504ffc8 6186 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 6187 {
d003868e
AM		 6188 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
6189 abfd);
e489d0ae
PB		 6190 return FALSE;
6191 }
f21f3fe0 6192
39ce1a6a
NC		 6193 /* PR 5398: If we have not decided to include any loadable sections in
6194 the output then we will not have a glue owner bfd. This is OK, it
6195 just means that there is nothing else for us to do here. */
6196 if (globals->bfd_of_glue_owner == NULL)
6197 return TRUE;
6198
252b5132
RH		 6199 /* Rummage around all the relocs and map the glue vectors. */
6200 sec = abfd->sections;
6201
6202 if (sec == NULL)
b34976b6 6203 return TRUE;
252b5132
RH		 6204
6205 for (; sec != NULL; sec = sec->next)
6206 {
6207 if (sec->reloc_count == 0)
6208 continue;
6209
2f475487
AM		 6210 if ((sec->flags & SEC_EXCLUDE) != 0)
6211 continue;
6212
0ffa91dd 6213 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 6214
9b485d32 6215 /* Load the relocs. */
6cdc0ccc 6216 internal_relocs
906e58ca 6217 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE);
252b5132 6218
6cdc0ccc
AM		 6219 if (internal_relocs == NULL)
6220 goto error_return;
252b5132 6221
6cdc0ccc
AM		 6222 irelend = internal_relocs + sec->reloc_count;
6223 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 6224 {
6225 long r_type;
6226 unsigned long r_index;
252b5132
RH		 6227
6228 struct elf_link_hash_entry *h;
6229
6230 r_type = ELF32_R_TYPE (irel->r_info);
6231 r_index = ELF32_R_SYM (irel->r_info);
6232
9b485d32 6233 /* These are the only relocation types we care about. */
ba96a88f 6234 if ( r_type != R_ARM_PC24
845b51d6 6235 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 6236 continue;
6237
6238 /* Get the section contents if we haven't done so already. */
6239 if (contents == NULL)
6240 {
6241 /* Get cached copy if it exists. */
6242 if (elf_section_data (sec)->this_hdr.contents != NULL)
6243 contents = elf_section_data (sec)->this_hdr.contents;
6244 else
6245 {
6246 /* Go get them off disk. */
57e8b36a 6247 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 6248 goto error_return;
6249 }
6250 }
6251
845b51d6
PB		 6252 if (r_type == R_ARM_V4BX)
6253 {
6254 int reg;
6255
6256 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
6257 record_arm_bx_glue (link_info, reg);
6258 continue;
6259 }
6260
a7c10850 6261 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 6262 h = NULL;
6263
9b485d32 6264 /* We don't care about local symbols. */
252b5132
RH		 6265 if (r_index < symtab_hdr->sh_info)
6266 continue;
6267
9b485d32 6268 /* This is an external symbol. */
252b5132
RH		 6269 r_index -= symtab_hdr->sh_info;
6270 h = (struct elf_link_hash_entry *)
6271 elf_sym_hashes (abfd)[r_index];
6272
6273 /* If the relocation is against a static symbol it must be within
6274 the current section and so cannot be a cross ARM/Thumb relocation. */
6275 if (h == NULL)
6276 continue;
6277
d504ffc8
DJ		 6278 /* If the call will go through a PLT entry then we do not need
6279 glue. */
362d30a1 6280 if (globals->root.splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 6281 continue;
6282
252b5132
RH		 6283 switch (r_type)
6284 {
6285 case R_ARM_PC24:
6286 /* This one is a call from arm code. We need to look up
99059e56
RM		 6287 the target of the call. If it is a thumb target, we
6288 insert glue. */
35fc36a8 6289 if (h->target_internal == ST_BRANCH_TO_THUMB)
252b5132
RH		 6290 record_arm_to_thumb_glue (link_info, h);
6291 break;
6292
252b5132 6293 default:
c6596c5e 6294 abort ();
252b5132
RH		 6295 }
6296 }
6cdc0ccc
AM		 6297
6298 if (contents != NULL
6299 && elf_section_data (sec)->this_hdr.contents != contents)
6300 free (contents);
6301 contents = NULL;
6302
6303 if (internal_relocs != NULL
6304 && elf_section_data (sec)->relocs != internal_relocs)
6305 free (internal_relocs);
6306 internal_relocs = NULL;
252b5132
RH		 6307 }
6308
b34976b6 6309 return TRUE;
9a5aca8c 6310
252b5132 6311error_return:
6cdc0ccc
AM		 6312 if (contents != NULL
6313 && elf_section_data (sec)->this_hdr.contents != contents)
6314 free (contents);
6315 if (internal_relocs != NULL
6316 && elf_section_data (sec)->relocs != internal_relocs)
6317 free (internal_relocs);
9a5aca8c 6318
b34976b6 6319 return FALSE;
252b5132 6320}
7e392df6 6321#endif
252b5132 6322
eb043451 6323
c7b8f16e
JB		 6324/* Initialise maps of ARM/Thumb/data for input BFDs. */
6325
6326void
6327bfd_elf32_arm_init_maps (bfd *abfd)
6328{
6329 Elf_Internal_Sym *isymbuf;
6330 Elf_Internal_Shdr *hdr;
6331 unsigned int i, localsyms;
6332
af1f4419
NC		 6333 /* PR 7093: Make sure that we are dealing with an arm elf binary. */
6334 if (! is_arm_elf (abfd))
6335 return;
6336
c7b8f16e
JB		 6337 if ((abfd->flags & DYNAMIC) != 0)
6338 return;
6339
0ffa91dd 6340 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 6341 localsyms = hdr->sh_info;
6342
6343 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
6344 should contain the number of local symbols, which should come before any
6345 global symbols. Mapping symbols are always local. */
6346 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
6347 NULL);
6348
6349 /* No internal symbols read? Skip this BFD. */
6350 if (isymbuf == NULL)
6351 return;
6352
6353 for (i = 0; i < localsyms; i++)
6354 {
6355 Elf_Internal_Sym *isym = &isymbuf[i];
6356 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6357 const char *name;
906e58ca 6358
c7b8f16e 6359 if (sec != NULL
99059e56
RM		 6360 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
6361 {
6362 name = bfd_elf_string_from_elf_section (abfd,
6363 hdr->sh_link, isym->st_name);
906e58ca 6364
99059e56 6365 if (bfd_is_arm_special_symbol_name (name,
c7b8f16e 6366 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
99059e56
RM		 6367 elf32_arm_section_map_add (sec, name[1], isym->st_value);
6368 }
c7b8f16e
JB		 6369 }
6370}
6371
6372
48229727
JB		 6373/* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly
6374 say what they wanted. */
6375
6376void
6377bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info)
6378{
6379 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6380 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
6381
4dfe6ac6
NC		 6382 if (globals == NULL)
6383 return;
6384
48229727
JB		 6385 if (globals->fix_cortex_a8 == -1)
6386 {
6387 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */
6388 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7
6389 && (out_attr[Tag_CPU_arch_profile].i == 'A'
6390 || out_attr[Tag_CPU_arch_profile].i == 0))
6391 globals->fix_cortex_a8 = 1;
6392 else
6393 globals->fix_cortex_a8 = 0;
6394 }
6395}
6396
6397
c7b8f16e
JB		 6398void
6399bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
6400{
6401 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 6402 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
906e58ca 6403
4dfe6ac6
NC		 6404 if (globals == NULL)
6405 return;
c7b8f16e
JB		 6406 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
6407 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
6408 {
6409 switch (globals->vfp11_fix)
99059e56
RM		 6410 {
6411 case BFD_ARM_VFP11_FIX_DEFAULT:
6412 case BFD_ARM_VFP11_FIX_NONE:
6413 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6414 break;
6415
6416 default:
6417 /* Give a warning, but do as the user requests anyway. */
6418 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
6419 "workaround is not necessary for target architecture"), obfd);
6420 }
c7b8f16e
JB		 6421 }
6422 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
6423 /* For earlier architectures, we might need the workaround, but do not
6424 enable it by default. If users is running with broken hardware, they
6425 must enable the erratum fix explicitly. */
6426 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
6427}
6428
6429
906e58ca
NC		 6430enum bfd_arm_vfp11_pipe
6431{
c7b8f16e
JB		 6432 VFP11_FMAC,
6433 VFP11_LS,
6434 VFP11_DS,
6435 VFP11_BAD
6436};
6437
6438/* Return a VFP register number. This is encoded as RX:X for single-precision
6439 registers, or X:RX for double-precision registers, where RX is the group of
6440 four bits in the instruction encoding and X is the single extension bit.
6441 RX and X fields are specified using their lowest (starting) bit. The return
6442 value is:
6443
6444 0...31: single-precision registers s0...s31
6445 32...63: double-precision registers d0...d31.
906e58ca 6446
c7b8f16e
JB		 6447 Although X should be zero for VFP11 (encoding d0...d15 only), we might
6448 encounter VFP3 instructions, so we allow the full range for DP registers. */
906e58ca 6449
c7b8f16e
JB		 6450static unsigned int
6451bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
99059e56 6452 unsigned int x)
c7b8f16e
JB		 6453{
6454 if (is_double)
6455 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
6456 else
6457 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
6458}
6459
6460/* Set bits in *WMASK according to a register number REG as encoded by
6461 bfd_arm_vfp11_regno(). Ignore d16-d31. */
6462
6463static void
6464bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
6465{
6466 if (reg < 32)
6467 *wmask |= 1 << reg;
6468 else if (reg < 48)
6469 *wmask |= 3 << ((reg - 32) * 2);
6470}
6471
6472/* Return TRUE if WMASK overwrites anything in REGS. */
6473
6474static bfd_boolean
6475bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
6476{
6477 int i;
906e58ca 6478
c7b8f16e
JB		 6479 for (i = 0; i < numregs; i++)
6480 {
6481 unsigned int reg = regs[i];
6482
6483 if (reg < 32 && (wmask & (1 << reg)) != 0)
99059e56 6484 return TRUE;
906e58ca 6485
c7b8f16e
JB		 6486 reg -= 32;
6487
6488 if (reg >= 16)
99059e56 6489 continue;
906e58ca 6490
c7b8f16e 6491 if ((wmask & (3 << (reg * 2))) != 0)
99059e56 6492 return TRUE;
c7b8f16e 6493 }
906e58ca 6494
c7b8f16e
JB		 6495 return FALSE;
6496}
6497
6498/* In this function, we're interested in two things: finding input registers
6499 for VFP data-processing instructions, and finding the set of registers which
6500 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
6501 hold the written set, so FLDM etc. are easy to deal with (we're only
6502 interested in 32 SP registers or 16 dp registers, due to the VFP version
6503 implemented by the chip in question). DP registers are marked by setting
6504 both SP registers in the write mask). */
6505
6506static enum bfd_arm_vfp11_pipe
6507bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
99059e56 6508 int *numregs)
c7b8f16e 6509{
91d6fa6a 6510 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD;
c7b8f16e
JB		 6511 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
6512
6513 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
6514 {
6515 unsigned int pqrs;
6516 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6517 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
6518
6519 pqrs = ((insn & 0x00800000) >> 20)
99059e56
RM		 6520 | ((insn & 0x00300000) >> 19)
6521 | ((insn & 0x00000040) >> 6);
c7b8f16e
JB		 6522
6523 switch (pqrs)
99059e56
RM		 6524 {
6525 case 0: /* fmac[sd]. */
6526 case 1: /* fnmac[sd]. */
6527 case 2: /* fmsc[sd]. */
6528 case 3: /* fnmsc[sd]. */
6529 vpipe = VFP11_FMAC;
6530 bfd_arm_vfp11_write_mask (destmask, fd);
6531 regs[0] = fd;
6532 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6533 regs[2] = fm;
6534 *numregs = 3;
6535 break;
6536
6537 case 4: /* fmul[sd]. */
6538 case 5: /* fnmul[sd]. */
6539 case 6: /* fadd[sd]. */
6540 case 7: /* fsub[sd]. */
6541 vpipe = VFP11_FMAC;
6542 goto vfp_binop;
6543
6544 case 8: /* fdiv[sd]. */
6545 vpipe = VFP11_DS;
6546 vfp_binop:
6547 bfd_arm_vfp11_write_mask (destmask, fd);
6548 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
6549 regs[1] = fm;
6550 *numregs = 2;
6551 break;
6552
6553 case 15: /* extended opcode. */
6554 {
6555 unsigned int extn = ((insn >> 15) & 0x1e)
6556 | ((insn >> 7) & 1);
6557
6558 switch (extn)
6559 {
6560 case 0: /* fcpy[sd]. */
6561 case 1: /* fabs[sd]. */
6562 case 2: /* fneg[sd]. */
6563 case 8: /* fcmp[sd]. */
6564 case 9: /* fcmpe[sd]. */
6565 case 10: /* fcmpz[sd]. */
6566 case 11: /* fcmpez[sd]. */
6567 case 16: /* fuito[sd]. */
6568 case 17: /* fsito[sd]. */
6569 case 24: /* ftoui[sd]. */
6570 case 25: /* ftouiz[sd]. */
6571 case 26: /* ftosi[sd]. */
6572 case 27: /* ftosiz[sd]. */
6573 /* These instructions will not bounce due to underflow. */
6574 *numregs = 0;
6575 vpipe = VFP11_FMAC;
6576 break;
6577
6578 case 3: /* fsqrt[sd]. */
6579 /* fsqrt cannot underflow, but it can (perhaps) overwrite
6580 registers to cause the erratum in previous instructions. */
6581 bfd_arm_vfp11_write_mask (destmask, fd);
6582 vpipe = VFP11_DS;
6583 break;
6584
6585 case 15: /* fcvt{ds,sd}. */
6586 {
6587 int rnum = 0;
6588
6589 bfd_arm_vfp11_write_mask (destmask, fd);
c7b8f16e
JB		 6590
6591 /* Only FCVTSD can underflow. */
99059e56
RM		 6592 if ((insn & 0x100) != 0)
6593 regs[rnum++] = fm;
c7b8f16e 6594
99059e56 6595 *numregs = rnum;
c7b8f16e 6596
99059e56
RM		 6597 vpipe = VFP11_FMAC;
6598 }
6599 break;
c7b8f16e 6600
99059e56
RM		 6601 default:
6602 return VFP11_BAD;
6603 }
6604 }
6605 break;
c7b8f16e 6606
99059e56
RM		 6607 default:
6608 return VFP11_BAD;
6609 }
c7b8f16e
JB		 6610 }
6611 /* Two-register transfer. */
6612 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
6613 {
6614 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
906e58ca 6615
c7b8f16e
JB		 6616 if ((insn & 0x100000) == 0)
6617 {
99059e56
RM		 6618 if (is_double)
6619 bfd_arm_vfp11_write_mask (destmask, fm);
6620 else
6621 {
6622 bfd_arm_vfp11_write_mask (destmask, fm);
6623 bfd_arm_vfp11_write_mask (destmask, fm + 1);
6624 }
c7b8f16e
JB		 6625 }
6626
91d6fa6a 6627 vpipe = VFP11_LS;
c7b8f16e
JB		 6628 }
6629 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
6630 {
6631 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
6632 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
906e58ca 6633
c7b8f16e 6634 switch (puw)
99059e56
RM		 6635 {
6636 case 0: /* Two-reg transfer. We should catch these above. */
6637 abort ();
906e58ca 6638
99059e56
RM		 6639 case 2: /* fldm[sdx]. */
6640 case 3:
6641 case 5:
6642 {
6643 unsigned int i, offset = insn & 0xff;
c7b8f16e 6644
99059e56
RM		 6645 if (is_double)
6646 offset >>= 1;
c7b8f16e 6647
99059e56
RM		 6648 for (i = fd; i < fd + offset; i++)
6649 bfd_arm_vfp11_write_mask (destmask, i);
6650 }
6651 break;
906e58ca 6652
99059e56
RM		 6653 case 4: /* fld[sd]. */
6654 case 6:
6655 bfd_arm_vfp11_write_mask (destmask, fd);
6656 break;
906e58ca 6657
99059e56
RM		 6658 default:
6659 return VFP11_BAD;
6660 }
c7b8f16e 6661
91d6fa6a 6662 vpipe = VFP11_LS;
c7b8f16e
JB		 6663 }
6664 /* Single-register transfer. Note L==0. */
6665 else if ((insn & 0x0f100e10) == 0x0e000a10)
6666 {
6667 unsigned int opcode = (insn >> 21) & 7;
6668 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
6669
6670 switch (opcode)
99059e56
RM		 6671 {
6672 case 0: /* fmsr/fmdlr. */
6673 case 1: /* fmdhr. */
6674 /* Mark fmdhr and fmdlr as writing to the whole of the DP
6675 destination register. I don't know if this is exactly right,
6676 but it is the conservative choice. */
6677 bfd_arm_vfp11_write_mask (destmask, fn);
6678 break;
6679
6680 case 7: /* fmxr. */
6681 break;
6682 }
c7b8f16e 6683
91d6fa6a 6684 vpipe = VFP11_LS;
c7b8f16e
JB		 6685 }
6686
91d6fa6a 6687 return vpipe;
c7b8f16e
JB		 6688}
6689
6690
6691static int elf32_arm_compare_mapping (const void * a, const void * b);
6692
6693
6694/* Look for potentially-troublesome code sequences which might trigger the
6695 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
6696 (available from ARM) for details of the erratum. A short version is
6697 described in ld.texinfo. */
6698
6699bfd_boolean
6700bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
6701{
6702 asection *sec;
6703 bfd_byte *contents = NULL;
6704 int state = 0;
6705 int regs[3], numregs = 0;
6706 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
6707 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
906e58ca 6708
4dfe6ac6
NC		 6709 if (globals == NULL)
6710 return FALSE;
6711
c7b8f16e
JB		 6712 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
6713 The states transition as follows:
906e58ca 6714
c7b8f16e 6715 0 -> 1 (vector) or 0 -> 2 (scalar)
99059e56
RM		 6716 A VFP FMAC-pipeline instruction has been seen. Fill
6717 regs[0]..regs[numregs-1] with its input operands. Remember this
6718 instruction in 'first_fmac'.
c7b8f16e
JB		 6719
6720 1 -> 2
99059e56
RM		 6721 Any instruction, except for a VFP instruction which overwrites
6722 regs[*].
906e58ca 6723
c7b8f16e
JB		 6724 1 -> 3 [ -> 0 ] or
6725 2 -> 3 [ -> 0 ]
99059e56
RM		 6726 A VFP instruction has been seen which overwrites any of regs[*].
6727 We must make a veneer! Reset state to 0 before examining next
6728 instruction.
906e58ca 6729
c7b8f16e 6730 2 -> 0
99059e56
RM		 6731 If we fail to match anything in state 2, reset to state 0 and reset
6732 the instruction pointer to the instruction after 'first_fmac'.
c7b8f16e
JB		 6733
6734 If the VFP11 vector mode is in use, there must be at least two unrelated
6735 instructions between anti-dependent VFP11 instructions to properly avoid
906e58ca 6736 triggering the erratum, hence the use of the extra state 1. */
c7b8f16e
JB		 6737
6738 /* If we are only performing a partial link do not bother
6739 to construct any glue. */
6740 if (link_info->relocatable)
6741 return TRUE;
6742
0ffa91dd
NC		 6743 /* Skip if this bfd does not correspond to an ELF image. */
6744 if (! is_arm_elf (abfd))
6745 return TRUE;
906e58ca 6746
c7b8f16e
JB		 6747 /* We should have chosen a fix type by the time we get here. */
6748 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
6749
6750 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
6751 return TRUE;
2e6030b9 6752
33a7ffc2
JM		 6753 /* Skip this BFD if it corresponds to an executable or dynamic object. */
6754 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
6755 return TRUE;
6756
c7b8f16e
JB		 6757 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6758 {
6759 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
6760 struct _arm_elf_section_data *sec_data;
6761
6762 /* If we don't have executable progbits, we're not interested in this
99059e56 6763 section. Also skip if section is to be excluded. */
c7b8f16e 6764 if (elf_section_type (sec) != SHT_PROGBITS
99059e56
RM		 6765 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
6766 || (sec->flags & SEC_EXCLUDE) != 0
dbaa2011 6767 || sec->sec_info_type == SEC_INFO_TYPE_JUST_SYMS
33a7ffc2 6768 || sec->output_section == bfd_abs_section_ptr
99059e56
RM		 6769 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
6770 continue;
c7b8f16e
JB		 6771
6772 sec_data = elf32_arm_section_data (sec);
906e58ca 6773
c7b8f16e 6774 if (sec_data->mapcount == 0)
99059e56 6775 continue;
906e58ca 6776
c7b8f16e
JB		 6777 if (elf_section_data (sec)->this_hdr.contents != NULL)
6778 contents = elf_section_data (sec)->this_hdr.contents;
6779 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
6780 goto error_return;
6781
6782 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
6783 elf32_arm_compare_mapping);
6784
6785 for (span = 0; span < sec_data->mapcount; span++)
99059e56
RM		 6786 {
6787 unsigned int span_start = sec_data->map[span].vma;
6788 unsigned int span_end = (span == sec_data->mapcount - 1)
c7b8f16e 6789 ? sec->size : sec_data->map[span + 1].vma;
99059e56
RM		 6790 char span_type = sec_data->map[span].type;
6791
6792 /* FIXME: Only ARM mode is supported at present. We may need to
6793 support Thumb-2 mode also at some point. */
6794 if (span_type != 'a')
6795 continue;
6796
6797 for (i = span_start; i < span_end;)
6798 {
6799 unsigned int next_i = i + 4;
6800 unsigned int insn = bfd_big_endian (abfd)
6801 ? (contents[i] << 24)
6802 | (contents[i + 1] << 16)
6803 | (contents[i + 2] << 8)
6804 | contents[i + 3]
6805 : (contents[i + 3] << 24)
6806 | (contents[i + 2] << 16)
6807 | (contents[i + 1] << 8)
6808 | contents[i];
6809 unsigned int writemask = 0;
6810 enum bfd_arm_vfp11_pipe vpipe;
6811
6812 switch (state)
6813 {
6814 case 0:
6815 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
6816 &numregs);
6817 /* I'm assuming the VFP11 erratum can trigger with denorm
6818 operands on either the FMAC or the DS pipeline. This might
6819 lead to slightly overenthusiastic veneer insertion. */
6820 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS)
6821 {
6822 state = use_vector ? 1 : 2;
6823 first_fmac = i;
6824 veneer_of_insn = insn;
6825 }
6826 break;
6827
6828 case 1:
6829 {
6830 int other_regs[3], other_numregs;
6831 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6832 other_regs,
99059e56
RM		 6833 &other_numregs);
6834 if (vpipe != VFP11_BAD
6835 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6836 numregs))
99059e56
RM		 6837 state = 3;
6838 else
6839 state = 2;
6840 }
6841 break;
6842
6843 case 2:
6844 {
6845 int other_regs[3], other_numregs;
6846 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
c7b8f16e 6847 other_regs,
99059e56
RM		 6848 &other_numregs);
6849 if (vpipe != VFP11_BAD
6850 && bfd_arm_vfp11_antidependency (writemask, regs,
c7b8f16e 6851 numregs))
99059e56
RM		 6852 state = 3;
6853 else
6854 {
6855 state = 0;
6856 next_i = first_fmac + 4;
6857 }
6858 }
6859 break;
6860
6861 case 3:
6862 abort (); /* Should be unreachable. */
6863 }
6864
6865 if (state == 3)
6866 {
6867 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *)
6868 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
6869
6870 elf32_arm_section_data (sec)->erratumcount += 1;
6871
6872 newerr->u.b.vfp_insn = veneer_of_insn;
6873
6874 switch (span_type)
6875 {
6876 case 'a':
6877 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
6878 break;
6879
6880 default:
6881 abort ();
6882 }
6883
6884 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
c7b8f16e
JB		 6885 first_fmac);
6886
99059e56 6887 newerr->vma = -1;
c7b8f16e 6888
99059e56
RM		 6889 newerr->next = sec_data->erratumlist;
6890 sec_data->erratumlist = newerr;
c7b8f16e 6891
99059e56
RM		 6892 state = 0;
6893 }
c7b8f16e 6894
99059e56
RM		 6895 i = next_i;
6896 }
6897 }
906e58ca 6898
c7b8f16e 6899 if (contents != NULL
99059e56
RM		 6900 && elf_section_data (sec)->this_hdr.contents != contents)
6901 free (contents);
c7b8f16e
JB		 6902 contents = NULL;
6903 }
6904
6905 return TRUE;
6906
6907error_return:
6908 if (contents != NULL
6909 && elf_section_data (sec)->this_hdr.contents != contents)
6910 free (contents);
906e58ca 6911
c7b8f16e
JB		 6912 return FALSE;
6913}
6914
6915/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
6916 after sections have been laid out, using specially-named symbols. */
6917
6918void
6919bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
6920 struct bfd_link_info *link_info)
6921{
6922 asection *sec;
6923 struct elf32_arm_link_hash_table *globals;
6924 char *tmp_name;
906e58ca 6925
c7b8f16e
JB		 6926 if (link_info->relocatable)
6927 return;
2e6030b9
MS		 6928
6929 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 6930 if (! is_arm_elf (abfd))
2e6030b9
MS		 6931 return;
6932
c7b8f16e 6933 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 6934 if (globals == NULL)
6935 return;
906e58ca 6936
21d799b5 6937 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen
99059e56 6938 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
c7b8f16e
JB		 6939
6940 for (sec = abfd->sections; sec != NULL; sec = sec->next)
6941 {
6942 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
6943 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
906e58ca 6944
c7b8f16e 6945 for (; errnode != NULL; errnode = errnode->next)
99059e56
RM		 6946 {
6947 struct elf_link_hash_entry *myh;
6948 bfd_vma vma;
6949
6950 switch (errnode->type)
6951 {
6952 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
6953 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
6954 /* Find veneer symbol. */
6955 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
c7b8f16e
JB		 6956 errnode->u.b.veneer->u.v.id);
6957
99059e56
RM		 6958 myh = elf_link_hash_lookup
6959 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6960
99059e56
RM		 6961 if (myh == NULL)
6962 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
6963 "`%s'"), abfd, tmp_name);
c7b8f16e 6964
99059e56
RM		 6965 vma = myh->root.u.def.section->output_section->vma
6966 + myh->root.u.def.section->output_offset
6967 + myh->root.u.def.value;
c7b8f16e 6968
99059e56
RM		 6969 errnode->u.b.veneer->vma = vma;
6970 break;
c7b8f16e
JB		 6971
6972 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 6973 case VFP11_ERRATUM_THUMB_VENEER:
6974 /* Find return location. */
6975 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
6976 errnode->u.v.id);
c7b8f16e 6977
99059e56
RM		 6978 myh = elf_link_hash_lookup
6979 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
c7b8f16e 6980
99059e56
RM		 6981 if (myh == NULL)
6982 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
c7b8f16e
JB		 6983 "`%s'"), abfd, tmp_name);
6984
99059e56
RM		 6985 vma = myh->root.u.def.section->output_section->vma
6986 + myh->root.u.def.section->output_offset
6987 + myh->root.u.def.value;
c7b8f16e 6988
99059e56
RM		 6989 errnode->u.v.branch->vma = vma;
6990 break;
906e58ca 6991
99059e56
RM		 6992 default:
6993 abort ();
6994 }
6995 }
c7b8f16e 6996 }
906e58ca 6997
c7b8f16e
JB		 6998 free (tmp_name);
6999}
7000
7001
eb043451
PB		 7002/* Set target relocation values needed during linking. */
7003
7004void
bf21ed78
MS		 7005bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
7006 struct bfd_link_info *link_info,
eb043451 7007 int target1_is_rel,
319850b4 7008 char * target2_type,
99059e56 7009 int fix_v4bx,
c7b8f16e 7010 int use_blx,
99059e56 7011 bfd_arm_vfp11_fix vfp11_fix,
a9dc9481 7012 int no_enum_warn, int no_wchar_warn,
2de70689
MGD		 7013 int pic_veneer, int fix_cortex_a8,
7014 int fix_arm1176)
eb043451
PB		 7015{
7016 struct elf32_arm_link_hash_table *globals;
7017
7018 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7019 if (globals == NULL)
7020 return;
eb043451
PB		 7021
7022 globals->target1_is_rel = target1_is_rel;
7023 if (strcmp (target2_type, "rel") == 0)
7024 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 7025 else if (strcmp (target2_type, "abs") == 0)
7026 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 7027 else if (strcmp (target2_type, "got-rel") == 0)
7028 globals->target2_reloc = R_ARM_GOT_PREL;
7029 else
7030 {
7031 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
7032 target2_type);
7033 }
319850b4 7034 globals->fix_v4bx = fix_v4bx;
33bfe774 7035 globals->use_blx |= use_blx;
c7b8f16e 7036 globals->vfp11_fix = vfp11_fix;
27e55c4d 7037 globals->pic_veneer = pic_veneer;
48229727 7038 globals->fix_cortex_a8 = fix_cortex_a8;
2de70689 7039 globals->fix_arm1176 = fix_arm1176;
bf21ed78 7040
0ffa91dd
NC		 7041 BFD_ASSERT (is_arm_elf (output_bfd));
7042 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
a9dc9481 7043 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn;
eb043451 7044}
eb043451 7045
12a0a0fd 7046/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 7047
12a0a0fd
PB		 7048static void
7049insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
7050{
7051 bfd_vma upper;
7052 bfd_vma lower;
7053 int reloc_sign;
7054
7055 BFD_ASSERT ((offset & 1) == 0);
7056
7057 upper = bfd_get_16 (abfd, insn);
7058 lower = bfd_get_16 (abfd, insn + 2);
7059 reloc_sign = (offset < 0) ? 1 : 0;
7060 upper = (upper & ~(bfd_vma) 0x7ff)
7061 | ((offset >> 12) & 0x3ff)
7062 | (reloc_sign << 10);
906e58ca 7063 lower = (lower & ~(bfd_vma) 0x2fff)
12a0a0fd
PB		 7064 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
7065 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
7066 | ((offset >> 1) & 0x7ff);
7067 bfd_put_16 (abfd, upper, insn);
7068 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 7069}
7070
9b485d32
NC		 7071/* Thumb code calling an ARM function. */
7072
252b5132 7073static int
57e8b36a
NC		 7074elf32_thumb_to_arm_stub (struct bfd_link_info * info,
7075 const char * name,
7076 bfd * input_bfd,
7077 bfd * output_bfd,
7078 asection * input_section,
7079 bfd_byte * hit_data,
7080 asection * sym_sec,
7081 bfd_vma offset,
7082 bfd_signed_vma addend,
f2a9dd69
DJ		 7083 bfd_vma val,
7084 char **error_message)
252b5132 7085{
bcbdc74c 7086 asection * s = 0;
dc810e39 7087 bfd_vma my_offset;
252b5132 7088 long int ret_offset;
bcbdc74c
NC		 7089 struct elf_link_hash_entry * myh;
7090 struct elf32_arm_link_hash_table * globals;
252b5132 7091
f2a9dd69 7092 myh = find_thumb_glue (info, name, error_message);
252b5132 7093 if (myh == NULL)
b34976b6 7094 return FALSE;
252b5132
RH		 7095
7096 globals = elf32_arm_hash_table (info);
252b5132
RH		 7097 BFD_ASSERT (globals != NULL);
7098 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7099
7100 my_offset = myh->root.u.def.value;
7101
3d4d4302
AM		 7102 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7103 THUMB2ARM_GLUE_SECTION_NAME);
252b5132
RH		 7104
7105 BFD_ASSERT (s != NULL);
7106 BFD_ASSERT (s->contents != NULL);
7107 BFD_ASSERT (s->output_section != NULL);
7108
7109 if ((my_offset & 0x01) == 0x01)
7110 {
7111 if (sym_sec != NULL
7112 && sym_sec->owner != NULL
7113 && !INTERWORK_FLAG (sym_sec->owner))
7114 {
8f615d07 7115 (*_bfd_error_handler)
d003868e 7116 (_("%B(%s): warning: interworking not enabled.\n"
3aaeb7d3 7117 " first occurrence: %B: Thumb call to ARM"),
d003868e 7118 sym_sec->owner, input_bfd, name);
252b5132 7119
b34976b6 7120 return FALSE;
252b5132
RH		 7121 }
7122
7123 --my_offset;
7124 myh->root.u.def.value = my_offset;
7125
52ab56c2
PB		 7126 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
7127 s->contents + my_offset);
252b5132 7128
52ab56c2
PB		 7129 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
7130 s->contents + my_offset + 2);
252b5132
RH		 7131
7132 ret_offset =
9b485d32
NC		 7133 /* Address of destination of the stub. */
7134 ((bfd_signed_vma) val)
252b5132 7135 - ((bfd_signed_vma)
57e8b36a
NC		 7136 /* Offset from the start of the current section
7137 to the start of the stubs. */
9b485d32
NC		 7138 (s->output_offset
7139 /* Offset of the start of this stub from the start of the stubs. */
7140 + my_offset
7141 /* Address of the start of the current section. */
7142 + s->output_section->vma)
7143 /* The branch instruction is 4 bytes into the stub. */
7144 + 4
7145 /* ARM branches work from the pc of the instruction + 8. */
7146 + 8);
252b5132 7147
52ab56c2
PB		 7148 put_arm_insn (globals, output_bfd,
7149 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
7150 s->contents + my_offset + 4);
252b5132
RH		 7151 }
7152
7153 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
7154
427bfd90
NC		 7155 /* Now go back and fix up the original BL insn to point to here. */
7156 ret_offset =
7157 /* Address of where the stub is located. */
7158 (s->output_section->vma + s->output_offset + my_offset)
7159 /* Address of where the BL is located. */
57e8b36a
NC		 7160 - (input_section->output_section->vma + input_section->output_offset
7161 + offset)
427bfd90
NC		 7162 /* Addend in the relocation. */
7163 - addend
7164 /* Biassing for PC-relative addressing. */
7165 - 8;
252b5132 7166
12a0a0fd 7167 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 7168
b34976b6 7169 return TRUE;
252b5132
RH		 7170}
7171
a4fd1a8e 7172/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 7173
a4fd1a8e
PB		 7174static struct elf_link_hash_entry *
7175elf32_arm_create_thumb_stub (struct bfd_link_info * info,
7176 const char * name,
7177 bfd * input_bfd,
7178 bfd * output_bfd,
7179 asection * sym_sec,
7180 bfd_vma val,
8029a119
NC		 7181 asection * s,
7182 char ** error_message)
252b5132 7183{
dc810e39 7184 bfd_vma my_offset;
252b5132 7185 long int ret_offset;
bcbdc74c
NC		 7186 struct elf_link_hash_entry * myh;
7187 struct elf32_arm_link_hash_table * globals;
252b5132 7188
f2a9dd69 7189 myh = find_arm_glue (info, name, error_message);
252b5132 7190 if (myh == NULL)
a4fd1a8e 7191 return NULL;
252b5132
RH		 7192
7193 globals = elf32_arm_hash_table (info);
252b5132
RH		 7194 BFD_ASSERT (globals != NULL);
7195 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7196
7197 my_offset = myh->root.u.def.value;
252b5132
RH		 7198
7199 if ((my_offset & 0x01) == 0x01)
7200 {
7201 if (sym_sec != NULL
7202 && sym_sec->owner != NULL
7203 && !INTERWORK_FLAG (sym_sec->owner))
7204 {
8f615d07 7205 (*_bfd_error_handler)
d003868e
AM		 7206 (_("%B(%s): warning: interworking not enabled.\n"
7207 " first occurrence: %B: arm call to thumb"),
7208 sym_sec->owner, input_bfd, name);
252b5132 7209 }
9b485d32 7210
252b5132
RH		 7211 --my_offset;
7212 myh->root.u.def.value = my_offset;
7213
27e55c4d
PB		 7214 if (info->shared || globals->root.is_relocatable_executable
7215 || globals->pic_veneer)
8f6277f5
PB		 7216 {
7217 /* For relocatable objects we can't use absolute addresses,
7218 so construct the address from a relative offset. */
7219 /* TODO: If the offset is small it's probably worth
7220 constructing the address with adds. */
52ab56c2
PB		 7221 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
7222 s->contents + my_offset);
7223 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
7224 s->contents + my_offset + 4);
7225 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
7226 s->contents + my_offset + 8);
8f6277f5
PB		 7227 /* Adjust the offset by 4 for the position of the add,
7228 and 8 for the pipeline offset. */
7229 ret_offset = (val - (s->output_offset
7230 + s->output_section->vma
7231 + my_offset + 12))
7232 | 1;
7233 bfd_put_32 (output_bfd, ret_offset,
7234 s->contents + my_offset + 12);
7235 }
26079076
PB		 7236 else if (globals->use_blx)
7237 {
7238 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
7239 s->contents + my_offset);
7240
7241 /* It's a thumb address. Add the low order bit. */
7242 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
7243 s->contents + my_offset + 4);
7244 }
8f6277f5
PB		 7245 else
7246 {
52ab56c2
PB		 7247 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
7248 s->contents + my_offset);
252b5132 7249
52ab56c2
PB		 7250 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
7251 s->contents + my_offset + 4);
252b5132 7252
8f6277f5
PB		 7253 /* It's a thumb address. Add the low order bit. */
7254 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
7255 s->contents + my_offset + 8);
8029a119
NC		 7256
7257 my_offset += 12;
8f6277f5 7258 }
252b5132
RH		 7259 }
7260
7261 BFD_ASSERT (my_offset <= globals->arm_glue_size);
7262
a4fd1a8e
PB		 7263 return myh;
7264}
7265
7266/* Arm code calling a Thumb function. */
7267
7268static int
7269elf32_arm_to_thumb_stub (struct bfd_link_info * info,
7270 const char * name,
7271 bfd * input_bfd,
7272 bfd * output_bfd,
7273 asection * input_section,
7274 bfd_byte * hit_data,
7275 asection * sym_sec,
7276 bfd_vma offset,
7277 bfd_signed_vma addend,
f2a9dd69
DJ		 7278 bfd_vma val,
7279 char **error_message)
a4fd1a8e
PB		 7280{
7281 unsigned long int tmp;
7282 bfd_vma my_offset;
7283 asection * s;
7284 long int ret_offset;
7285 struct elf_link_hash_entry * myh;
7286 struct elf32_arm_link_hash_table * globals;
7287
7288 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7289 BFD_ASSERT (globals != NULL);
7290 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7291
3d4d4302
AM		 7292 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7293 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7294 BFD_ASSERT (s != NULL);
7295 BFD_ASSERT (s->contents != NULL);
7296 BFD_ASSERT (s->output_section != NULL);
7297
7298 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 7299 sym_sec, val, s, error_message);
a4fd1a8e
PB		 7300 if (!myh)
7301 return FALSE;
7302
7303 my_offset = myh->root.u.def.value;
252b5132
RH		 7304 tmp = bfd_get_32 (input_bfd, hit_data);
7305 tmp = tmp & 0xFF000000;
7306
9b485d32 7307 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 7308 ret_offset = (s->output_offset
7309 + my_offset
7310 + s->output_section->vma
7311 - (input_section->output_offset
7312 + input_section->output_section->vma
7313 + offset + addend)
7314 - 8);
9a5aca8c 7315
252b5132
RH		 7316 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
7317
dc810e39 7318 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 7319
b34976b6 7320 return TRUE;
252b5132
RH		 7321}
7322
a4fd1a8e
PB		 7323/* Populate Arm stub for an exported Thumb function. */
7324
7325static bfd_boolean
7326elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
7327{
7328 struct bfd_link_info * info = (struct bfd_link_info *) inf;
7329 asection * s;
7330 struct elf_link_hash_entry * myh;
7331 struct elf32_arm_link_hash_entry *eh;
7332 struct elf32_arm_link_hash_table * globals;
7333 asection *sec;
7334 bfd_vma val;
f2a9dd69 7335 char *error_message;
a4fd1a8e 7336
906e58ca 7337 eh = elf32_arm_hash_entry (h);
a4fd1a8e
PB		 7338 /* Allocate stubs for exported Thumb functions on v4t. */
7339 if (eh->export_glue == NULL)
7340 return TRUE;
7341
7342 globals = elf32_arm_hash_table (info);
a4fd1a8e
PB		 7343 BFD_ASSERT (globals != NULL);
7344 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7345
3d4d4302
AM		 7346 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7347 ARM2THUMB_GLUE_SECTION_NAME);
a4fd1a8e
PB		 7348 BFD_ASSERT (s != NULL);
7349 BFD_ASSERT (s->contents != NULL);
7350 BFD_ASSERT (s->output_section != NULL);
7351
7352 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 7353
7354 BFD_ASSERT (sec->output_section != NULL);
7355
a4fd1a8e
PB		 7356 val = eh->export_glue->root.u.def.value + sec->output_offset
7357 + sec->output_section->vma;
8029a119 7358
a4fd1a8e
PB		 7359 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
7360 h->root.u.def.section->owner,
f2a9dd69
DJ		 7361 globals->obfd, sec, val, s,
7362 &error_message);
a4fd1a8e
PB		 7363 BFD_ASSERT (myh);
7364 return TRUE;
7365}
7366
845b51d6
PB		 7367/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
7368
7369static bfd_vma
7370elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
7371{
7372 bfd_byte *p;
7373 bfd_vma glue_addr;
7374 asection *s;
7375 struct elf32_arm_link_hash_table *globals;
7376
7377 globals = elf32_arm_hash_table (info);
845b51d6
PB		 7378 BFD_ASSERT (globals != NULL);
7379 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
7380
3d4d4302
AM		 7381 s = bfd_get_linker_section (globals->bfd_of_glue_owner,
7382 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 7383 BFD_ASSERT (s != NULL);
7384 BFD_ASSERT (s->contents != NULL);
7385 BFD_ASSERT (s->output_section != NULL);
7386
7387 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
7388
7389 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
7390
7391 if ((globals->bx_glue_offset[reg] & 1) == 0)
7392 {
7393 p = s->contents + glue_addr;
7394 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
7395 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
7396 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
7397 globals->bx_glue_offset[reg] |= 1;
7398 }
7399
7400 return glue_addr + s->output_section->vma + s->output_offset;
7401}
7402
a4fd1a8e
PB		 7403/* Generate Arm stubs for exported Thumb symbols. */
7404static void
906e58ca 7405elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
a4fd1a8e
PB		 7406 struct bfd_link_info *link_info)
7407{
7408 struct elf32_arm_link_hash_table * globals;
7409
8029a119
NC		 7410 if (link_info == NULL)
7411 /* Ignore this if we are not called by the ELF backend linker. */
a4fd1a8e
PB		 7412 return;
7413
7414 globals = elf32_arm_hash_table (link_info);
4dfe6ac6
NC		 7415 if (globals == NULL)
7416 return;
7417
84c08195
PB		 7418 /* If blx is available then exported Thumb symbols are OK and there is
7419 nothing to do. */
a4fd1a8e
PB		 7420 if (globals->use_blx)
7421 return;
7422
7423 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
7424 link_info);
7425}
7426
47beaa6a
RS		 7427/* Reserve space for COUNT dynamic relocations in relocation selection
7428 SRELOC. */
7429
7430static void
7431elf32_arm_allocate_dynrelocs (struct bfd_link_info *info, asection *sreloc,
7432 bfd_size_type count)
7433{
7434 struct elf32_arm_link_hash_table *htab;
7435
7436 htab = elf32_arm_hash_table (info);
7437 BFD_ASSERT (htab->root.dynamic_sections_created);
7438 if (sreloc == NULL)
7439 abort ();
7440 sreloc->size += RELOC_SIZE (htab) * count;
7441}
7442
34e77a92
RS		 7443/* Reserve space for COUNT R_ARM_IRELATIVE relocations. If the link is
7444 dynamic, the relocations should go in SRELOC, otherwise they should
7445 go in the special .rel.iplt section. */
7446
7447static void
7448elf32_arm_allocate_irelocs (struct bfd_link_info *info, asection *sreloc,
7449 bfd_size_type count)
7450{
7451 struct elf32_arm_link_hash_table *htab;
7452
7453 htab = elf32_arm_hash_table (info);
7454 if (!htab->root.dynamic_sections_created)
7455 htab->root.irelplt->size += RELOC_SIZE (htab) * count;
7456 else
7457 {
7458 BFD_ASSERT (sreloc != NULL);
7459 sreloc->size += RELOC_SIZE (htab) * count;
7460 }
7461}
7462
47beaa6a
RS		 7463/* Add relocation REL to the end of relocation section SRELOC. */
7464
7465static void
7466elf32_arm_add_dynreloc (bfd *output_bfd, struct bfd_link_info *info,
7467 asection *sreloc, Elf_Internal_Rela *rel)
7468{
7469 bfd_byte *loc;
7470 struct elf32_arm_link_hash_table *htab;
7471
7472 htab = elf32_arm_hash_table (info);
34e77a92
RS		 7473 if (!htab->root.dynamic_sections_created
7474 && ELF32_R_TYPE (rel->r_info) == R_ARM_IRELATIVE)
7475 sreloc = htab->root.irelplt;
47beaa6a
RS		 7476 if (sreloc == NULL)
7477 abort ();
7478 loc = sreloc->contents;
7479 loc += sreloc->reloc_count++ * RELOC_SIZE (htab);
7480 if (sreloc->reloc_count * RELOC_SIZE (htab) > sreloc->size)
7481 abort ();
7482 SWAP_RELOC_OUT (htab) (output_bfd, rel, loc);
7483}
7484
34e77a92
RS		 7485/* Allocate room for a PLT entry described by ROOT_PLT and ARM_PLT.
7486 IS_IPLT_ENTRY says whether the entry belongs to .iplt rather than
7487 to .plt. */
7488
7489static void
7490elf32_arm_allocate_plt_entry (struct bfd_link_info *info,
7491 bfd_boolean is_iplt_entry,
7492 union gotplt_union *root_plt,
7493 struct arm_plt_info *arm_plt)
7494{
7495 struct elf32_arm_link_hash_table *htab;
7496 asection *splt;
7497 asection *sgotplt;
7498
7499 htab = elf32_arm_hash_table (info);
7500
7501 if (is_iplt_entry)
7502 {
7503 splt = htab->root.iplt;
7504 sgotplt = htab->root.igotplt;
7505
99059e56
RM		 7506 /* NaCl uses a special first entry in .iplt too. */
7507 if (htab->nacl_p && splt->size == 0)
7508 splt->size += htab->plt_header_size;
7509
34e77a92
RS		 7510 /* Allocate room for an R_ARM_IRELATIVE relocation in .rel.iplt. */
7511 elf32_arm_allocate_irelocs (info, htab->root.irelplt, 1);
7512 }
7513 else
7514 {
7515 splt = htab->root.splt;
7516 sgotplt = htab->root.sgotplt;
7517
7518 /* Allocate room for an R_JUMP_SLOT relocation in .rel.plt. */
7519 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
7520
7521 /* If this is the first .plt entry, make room for the special
7522 first entry. */
7523 if (splt->size == 0)
7524 splt->size += htab->plt_header_size;
7525 }
7526
7527 /* Allocate the PLT entry itself, including any leading Thumb stub. */
7528 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7529 splt->size += PLT_THUMB_STUB_SIZE;
7530 root_plt->offset = splt->size;
7531 splt->size += htab->plt_entry_size;
7532
7533 if (!htab->symbian_p)
7534 {
7535 /* We also need to make an entry in the .got.plt section, which
7536 will be placed in the .got section by the linker script. */
7537 arm_plt->got_offset = sgotplt->size - 8 * htab->num_tls_desc;
7538 sgotplt->size += 4;
7539 }
7540}
7541
b38cadfb
NC		 7542static bfd_vma
7543arm_movw_immediate (bfd_vma value)
7544{
7545 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
7546}
7547
7548static bfd_vma
7549arm_movt_immediate (bfd_vma value)
7550{
7551 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
7552}
7553
34e77a92
RS		 7554/* Fill in a PLT entry and its associated GOT slot. If DYNINDX == -1,
7555 the entry lives in .iplt and resolves to (*SYM_VALUE)().
7556 Otherwise, DYNINDX is the index of the symbol in the dynamic
7557 symbol table and SYM_VALUE is undefined.
7558
7559 ROOT_PLT points to the offset of the PLT entry from the start of its
7560 section (.iplt or .plt). ARM_PLT points to the symbol's ARM-specific
57460bcf 7561 bookkeeping information.
34e77a92 7562
57460bcf
NC		 7563 Returns FALSE if there was a problem. */
7564
7565static bfd_boolean
34e77a92
RS		 7566elf32_arm_populate_plt_entry (bfd *output_bfd, struct bfd_link_info *info,
7567 union gotplt_union *root_plt,
7568 struct arm_plt_info *arm_plt,
7569 int dynindx, bfd_vma sym_value)
7570{
7571 struct elf32_arm_link_hash_table *htab;
7572 asection *sgot;
7573 asection *splt;
7574 asection *srel;
7575 bfd_byte *loc;
7576 bfd_vma plt_index;
7577 Elf_Internal_Rela rel;
7578 bfd_vma plt_header_size;
7579 bfd_vma got_header_size;
7580
7581 htab = elf32_arm_hash_table (info);
7582
7583 /* Pick the appropriate sections and sizes. */
7584 if (dynindx == -1)
7585 {
7586 splt = htab->root.iplt;
7587 sgot = htab->root.igotplt;
7588 srel = htab->root.irelplt;
7589
7590 /* There are no reserved entries in .igot.plt, and no special
7591 first entry in .iplt. */
7592 got_header_size = 0;
7593 plt_header_size = 0;
7594 }
7595 else
7596 {
7597 splt = htab->root.splt;
7598 sgot = htab->root.sgotplt;
7599 srel = htab->root.srelplt;
7600
7601 got_header_size = get_elf_backend_data (output_bfd)->got_header_size;
7602 plt_header_size = htab->plt_header_size;
7603 }
7604 BFD_ASSERT (splt != NULL && srel != NULL);
7605
7606 /* Fill in the entry in the procedure linkage table. */
7607 if (htab->symbian_p)
7608 {
7609 BFD_ASSERT (dynindx >= 0);
7610 put_arm_insn (htab, output_bfd,
7611 elf32_arm_symbian_plt_entry[0],
7612 splt->contents + root_plt->offset);
7613 bfd_put_32 (output_bfd,
7614 elf32_arm_symbian_plt_entry[1],
7615 splt->contents + root_plt->offset + 4);
7616
7617 /* Fill in the entry in the .rel.plt section. */
7618 rel.r_offset = (splt->output_section->vma
7619 + splt->output_offset
7620 + root_plt->offset + 4);
7621 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_GLOB_DAT);
7622
7623 /* Get the index in the procedure linkage table which
7624 corresponds to this symbol. This is the index of this symbol
7625 in all the symbols for which we are making plt entries. The
7626 first entry in the procedure linkage table is reserved. */
7627 plt_index = ((root_plt->offset - plt_header_size)
7628 / htab->plt_entry_size);
7629 }
7630 else
7631 {
7632 bfd_vma got_offset, got_address, plt_address;
7633 bfd_vma got_displacement, initial_got_entry;
7634 bfd_byte * ptr;
7635
7636 BFD_ASSERT (sgot != NULL);
7637
7638 /* Get the offset into the .(i)got.plt table of the entry that
7639 corresponds to this function. */
7640 got_offset = (arm_plt->got_offset & -2);
7641
7642 /* Get the index in the procedure linkage table which
7643 corresponds to this symbol. This is the index of this symbol
7644 in all the symbols for which we are making plt entries.
7645 After the reserved .got.plt entries, all symbols appear in
7646 the same order as in .plt. */
7647 plt_index = (got_offset - got_header_size) / 4;
7648
7649 /* Calculate the address of the GOT entry. */
7650 got_address = (sgot->output_section->vma
7651 + sgot->output_offset
7652 + got_offset);
7653
7654 /* ...and the address of the PLT entry. */
7655 plt_address = (splt->output_section->vma
7656 + splt->output_offset
7657 + root_plt->offset);
7658
7659 ptr = splt->contents + root_plt->offset;
7660 if (htab->vxworks_p && info->shared)
7661 {
7662 unsigned int i;
7663 bfd_vma val;
7664
7665 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7666 {
7667 val = elf32_arm_vxworks_shared_plt_entry[i];
7668 if (i == 2)
7669 val |= got_address - sgot->output_section->vma;
7670 if (i == 5)
7671 val |= plt_index * RELOC_SIZE (htab);
7672 if (i == 2 || i == 5)
7673 bfd_put_32 (output_bfd, val, ptr);
7674 else
7675 put_arm_insn (htab, output_bfd, val, ptr);
7676 }
7677 }
7678 else if (htab->vxworks_p)
7679 {
7680 unsigned int i;
7681 bfd_vma val;
7682
7683 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
7684 {
7685 val = elf32_arm_vxworks_exec_plt_entry[i];
7686 if (i == 2)
7687 val |= got_address;
7688 if (i == 4)
7689 val |= 0xffffff & -((root_plt->offset + i * 4 + 8) >> 2);
7690 if (i == 5)
7691 val |= plt_index * RELOC_SIZE (htab);
7692 if (i == 2 || i == 5)
7693 bfd_put_32 (output_bfd, val, ptr);
7694 else
7695 put_arm_insn (htab, output_bfd, val, ptr);
7696 }
7697
7698 loc = (htab->srelplt2->contents
7699 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
7700
7701 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
7702 referencing the GOT for this PLT entry. */
7703 rel.r_offset = plt_address + 8;
7704 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
7705 rel.r_addend = got_offset;
7706 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7707 loc += RELOC_SIZE (htab);
7708
7709 /* Create the R_ARM_ABS32 relocation referencing the
7710 beginning of the PLT for this GOT entry. */
7711 rel.r_offset = got_address;
7712 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
7713 rel.r_addend = 0;
7714 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7715 }
b38cadfb
NC		 7716 else if (htab->nacl_p)
7717 {
7718 /* Calculate the displacement between the PLT slot and the
7719 common tail that's part of the special initial PLT slot. */
6034aab8 7720 int32_t tail_displacement
b38cadfb
NC		 7721 = ((splt->output_section->vma + splt->output_offset
7722 + ARM_NACL_PLT_TAIL_OFFSET)
7723 - (plt_address + htab->plt_entry_size + 4));
7724 BFD_ASSERT ((tail_displacement & 3) == 0);
7725 tail_displacement >>= 2;
7726
7727 BFD_ASSERT ((tail_displacement & 0xff000000) == 0
7728 || (-tail_displacement & 0xff000000) == 0);
7729
7730 /* Calculate the displacement between the PLT slot and the entry
7731 in the GOT. The offset accounts for the value produced by
7732 adding to pc in the penultimate instruction of the PLT stub. */
6034aab8 7733 got_displacement = (got_address
99059e56 7734 - (plt_address + htab->plt_entry_size));
b38cadfb
NC		 7735
7736 /* NaCl does not support interworking at all. */
7737 BFD_ASSERT (!elf32_arm_plt_needs_thumb_stub_p (info, arm_plt));
7738
7739 put_arm_insn (htab, output_bfd,
7740 elf32_arm_nacl_plt_entry[0]
7741 | arm_movw_immediate (got_displacement),
7742 ptr + 0);
7743 put_arm_insn (htab, output_bfd,
7744 elf32_arm_nacl_plt_entry[1]
7745 | arm_movt_immediate (got_displacement),
7746 ptr + 4);
7747 put_arm_insn (htab, output_bfd,
7748 elf32_arm_nacl_plt_entry[2],
7749 ptr + 8);
7750 put_arm_insn (htab, output_bfd,
7751 elf32_arm_nacl_plt_entry[3]
7752 | (tail_displacement & 0x00ffffff),
7753 ptr + 12);
7754 }
57460bcf
NC		 7755 else if (using_thumb_only (htab))
7756 {
eed94f8f
NC		 7757 /* PR ld/16017: Generate thumb only PLT entries. */
7758 if (!using_thumb2 (htab))
7759 {
7760 /* FIXME: We ought to be able to generate thumb-1 PLT
7761 instructions... */
7762 _bfd_error_handler (_("%B: Warning: thumb-1 mode PLT generation not currently supported"),
7763 output_bfd);
7764 return FALSE;
7765 }
57460bcf 7766
eed94f8f
NC		 7767 /* Calculate the displacement between the PLT slot and the entry in
7768 the GOT. The 12-byte offset accounts for the value produced by
7769 adding to pc in the 3rd instruction of the PLT stub. */
7770 got_displacement = got_address - (plt_address + 12);
7771
7772 /* As we are using 32 bit instructions we have to use 'put_arm_insn'
7773 instead of 'put_thumb_insn'. */
7774 put_arm_insn (htab, output_bfd,
7775 elf32_thumb2_plt_entry[0]
7776 | ((got_displacement & 0x000000ff) << 16)
7777 | ((got_displacement & 0x00000700) << 20)
7778 | ((got_displacement & 0x00000800) >> 1)
7779 | ((got_displacement & 0x0000f000) >> 12),
7780 ptr + 0);
7781 put_arm_insn (htab, output_bfd,
7782 elf32_thumb2_plt_entry[1]
7783 | ((got_displacement & 0x00ff0000) )
7784 | ((got_displacement & 0x07000000) << 4)
7785 | ((got_displacement & 0x08000000) >> 17)
7786 | ((got_displacement & 0xf0000000) >> 28),
7787 ptr + 4);
7788 put_arm_insn (htab, output_bfd,
7789 elf32_thumb2_plt_entry[2],
7790 ptr + 8);
7791 put_arm_insn (htab, output_bfd,
7792 elf32_thumb2_plt_entry[3],
7793 ptr + 12);
57460bcf 7794 }
34e77a92
RS		 7795 else
7796 {
7797 /* Calculate the displacement between the PLT slot and the
7798 entry in the GOT. The eight-byte offset accounts for the
7799 value produced by adding to pc in the first instruction
7800 of the PLT stub. */
7801 got_displacement = got_address - (plt_address + 8);
7802
34e77a92
RS		 7803 if (elf32_arm_plt_needs_thumb_stub_p (info, arm_plt))
7804 {
7805 put_thumb_insn (htab, output_bfd,
7806 elf32_arm_plt_thumb_stub[0], ptr - 4);
7807 put_thumb_insn (htab, output_bfd,
7808 elf32_arm_plt_thumb_stub[1], ptr - 2);
7809 }
7810
1db37fe6
YG		 7811 if (!elf32_arm_use_long_plt_entry)
7812 {
7813 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
7814
7815 put_arm_insn (htab, output_bfd,
7816 elf32_arm_plt_entry_short[0]
7817 | ((got_displacement & 0x0ff00000) >> 20),
7818 ptr + 0);
7819 put_arm_insn (htab, output_bfd,
7820 elf32_arm_plt_entry_short[1]
7821 | ((got_displacement & 0x000ff000) >> 12),
7822 ptr+ 4);
7823 put_arm_insn (htab, output_bfd,
7824 elf32_arm_plt_entry_short[2]
7825 | (got_displacement & 0x00000fff),
7826 ptr + 8);
34e77a92 7827#ifdef FOUR_WORD_PLT
1db37fe6 7828 bfd_put_32 (output_bfd, elf32_arm_plt_entry_short[3], ptr + 12);
34e77a92 7829#endif
1db37fe6
YG		 7830 }
7831 else
7832 {
7833 put_arm_insn (htab, output_bfd,
7834 elf32_arm_plt_entry_long[0]
7835 | ((got_displacement & 0xf0000000) >> 28),
7836 ptr + 0);
7837 put_arm_insn (htab, output_bfd,
7838 elf32_arm_plt_entry_long[1]
7839 | ((got_displacement & 0x0ff00000) >> 20),
7840 ptr + 4);
7841 put_arm_insn (htab, output_bfd,
7842 elf32_arm_plt_entry_long[2]
7843 | ((got_displacement & 0x000ff000) >> 12),
7844 ptr+ 8);
7845 put_arm_insn (htab, output_bfd,
7846 elf32_arm_plt_entry_long[3]
7847 | (got_displacement & 0x00000fff),
7848 ptr + 12);
7849 }
34e77a92
RS		 7850 }
7851
7852 /* Fill in the entry in the .rel(a).(i)plt section. */
7853 rel.r_offset = got_address;
7854 rel.r_addend = 0;
7855 if (dynindx == -1)
7856 {
7857 /* .igot.plt entries use IRELATIVE relocations against SYM_VALUE.
7858 The dynamic linker or static executable then calls SYM_VALUE
7859 to determine the correct run-time value of the .igot.plt entry. */
7860 rel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
7861 initial_got_entry = sym_value;
7862 }
7863 else
7864 {
7865 rel.r_info = ELF32_R_INFO (dynindx, R_ARM_JUMP_SLOT);
7866 initial_got_entry = (splt->output_section->vma
7867 + splt->output_offset);
7868 }
7869
7870 /* Fill in the entry in the global offset table. */
7871 bfd_put_32 (output_bfd, initial_got_entry,
7872 sgot->contents + got_offset);
7873 }
7874
aba8c3de
WN		 7875 if (dynindx == -1)
7876 elf32_arm_add_dynreloc (output_bfd, info, srel, &rel);
7877 else
7878 {
7879 loc = srel->contents + plt_index * RELOC_SIZE (htab);
7880 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
7881 }
57460bcf
NC		 7882
7883 return TRUE;
34e77a92
RS		 7884}
7885
eb043451
PB		 7886/* Some relocations map to different relocations depending on the
7887 target. Return the real relocation. */
8029a119 7888
eb043451
PB		 7889static int
7890arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
7891 int r_type)
7892{
7893 switch (r_type)
7894 {
7895 case R_ARM_TARGET1:
7896 if (globals->target1_is_rel)
7897 return R_ARM_REL32;
7898 else
7899 return R_ARM_ABS32;
7900
7901 case R_ARM_TARGET2:
7902 return globals->target2_reloc;
7903
7904 default:
7905 return r_type;
7906 }
7907}
eb043451 7908
ba93b8ac
DJ		 7909/* Return the base VMA address which should be subtracted from real addresses
7910 when resolving @dtpoff relocation.
7911 This is PT_TLS segment p_vaddr. */
7912
7913static bfd_vma
7914dtpoff_base (struct bfd_link_info *info)
7915{
7916 /* If tls_sec is NULL, we should have signalled an error already. */
7917 if (elf_hash_table (info)->tls_sec == NULL)
7918 return 0;
7919 return elf_hash_table (info)->tls_sec->vma;
7920}
7921
7922/* Return the relocation value for @tpoff relocation
7923 if STT_TLS virtual address is ADDRESS. */
7924
7925static bfd_vma
7926tpoff (struct bfd_link_info *info, bfd_vma address)
7927{
7928 struct elf_link_hash_table *htab = elf_hash_table (info);
7929 bfd_vma base;
7930
7931 /* If tls_sec is NULL, we should have signalled an error already. */
7932 if (htab->tls_sec == NULL)
7933 return 0;
7934 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
7935 return address - htab->tls_sec->vma + base;
7936}
7937
00a97672
RS		 7938/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
7939 VALUE is the relocation value. */
7940
7941static bfd_reloc_status_type
7942elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
7943{
7944 if (value > 0xfff)
7945 return bfd_reloc_overflow;
7946
7947 value |= bfd_get_32 (abfd, data) & 0xfffff000;
7948 bfd_put_32 (abfd, value, data);
7949 return bfd_reloc_ok;
7950}
7951
0855e32b
NS		 7952/* Handle TLS relaxations. Relaxing is possible for symbols that use
7953 R_ARM_GOTDESC, R_ARM_{,THM_}TLS_CALL or
7954 R_ARM_{,THM_}TLS_DESCSEQ relocations, during a static link.
7955
7956 Return bfd_reloc_ok if we're done, bfd_reloc_continue if the caller
7957 is to then call final_link_relocate. Return other values in the
62672b10
NS		 7958 case of error.
7959
7960 FIXME:When --emit-relocs is in effect, we'll emit relocs describing
7961 the pre-relaxed code. It would be nice if the relocs were updated
7962 to match the optimization. */
0855e32b 7963
b38cadfb 7964static bfd_reloc_status_type
0855e32b 7965elf32_arm_tls_relax (struct elf32_arm_link_hash_table *globals,
b38cadfb 7966 bfd *input_bfd, asection *input_sec, bfd_byte *contents,
0855e32b
NS		 7967 Elf_Internal_Rela *rel, unsigned long is_local)
7968{
7969 unsigned long insn;
b38cadfb 7970
0855e32b
NS		 7971 switch (ELF32_R_TYPE (rel->r_info))
7972 {
7973 default:
7974 return bfd_reloc_notsupported;
b38cadfb 7975
0855e32b
NS		 7976 case R_ARM_TLS_GOTDESC:
7977 if (is_local)
7978 insn = 0;
7979 else
7980 {
7981 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
7982 if (insn & 1)
7983 insn -= 5; /* THUMB */
7984 else
7985 insn -= 8; /* ARM */
7986 }
7987 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
7988 return bfd_reloc_continue;
7989
7990 case R_ARM_THM_TLS_DESCSEQ:
7991 /* Thumb insn. */
7992 insn = bfd_get_16 (input_bfd, contents + rel->r_offset);
7993 if ((insn & 0xff78) == 0x4478) /* add rx, pc */
7994 {
7995 if (is_local)
7996 /* nop */
7997 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
7998 }
7999 else if ((insn & 0xffc0) == 0x6840) /* ldr rx,[ry,#4] */
8000 {
8001 if (is_local)
8002 /* nop */
8003 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8004 else
8005 /* ldr rx,[ry] */
8006 bfd_put_16 (input_bfd, insn & 0xf83f, contents + rel->r_offset);
8007 }
8008 else if ((insn & 0xff87) == 0x4780) /* blx rx */
8009 {
8010 if (is_local)
8011 /* nop */
8012 bfd_put_16 (input_bfd, 0x46c0, contents + rel->r_offset);
8013 else
8014 /* mov r0, rx */
8015 bfd_put_16 (input_bfd, 0x4600 | (insn & 0x78),
8016 contents + rel->r_offset);
8017 }
8018 else
8019 {
8020 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
8021 /* It's a 32 bit instruction, fetch the rest of it for
8022 error generation. */
8023 insn = (insn << 16)
8024 | bfd_get_16 (input_bfd, contents + rel->r_offset + 2);
8025 (*_bfd_error_handler)
8026 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' in TLS trampoline"),
8027 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8028 return bfd_reloc_notsupported;
8029 }
8030 break;
b38cadfb 8031
0855e32b
NS		 8032 case R_ARM_TLS_DESCSEQ:
8033 /* arm insn. */
8034 insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
8035 if ((insn & 0xffff0ff0) == 0xe08f0000) /* add rx,pc,ry */
8036 {
8037 if (is_local)
8038 /* mov rx, ry */
8039 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xffff),
8040 contents + rel->r_offset);
8041 }
8042 else if ((insn & 0xfff00fff) == 0xe5900004) /* ldr rx,[ry,#4]*/
8043 {
8044 if (is_local)
8045 /* nop */
8046 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8047 else
8048 /* ldr rx,[ry] */
8049 bfd_put_32 (input_bfd, insn & 0xfffff000,
8050 contents + rel->r_offset);
8051 }
8052 else if ((insn & 0xfffffff0) == 0xe12fff30) /* blx rx */
8053 {
8054 if (is_local)
8055 /* nop */
8056 bfd_put_32 (input_bfd, 0xe1a00000, contents + rel->r_offset);
8057 else
8058 /* mov r0, rx */
8059 bfd_put_32 (input_bfd, 0xe1a00000 | (insn & 0xf),
8060 contents + rel->r_offset);
8061 }
8062 else
8063 {
8064 (*_bfd_error_handler)
8065 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' in TLS trampoline"),
8066 input_bfd, input_sec, (unsigned long)rel->r_offset, insn);
8067 return bfd_reloc_notsupported;
8068 }
8069 break;
8070
8071 case R_ARM_TLS_CALL:
8072 /* GD->IE relaxation, turn the instruction into 'nop' or
8073 'ldr r0, [pc,r0]' */
8074 insn = is_local ? 0xe1a00000 : 0xe79f0000;
8075 bfd_put_32 (input_bfd, insn, contents + rel->r_offset);
8076 break;
b38cadfb 8077
0855e32b 8078 case R_ARM_THM_TLS_CALL:
6a631e86 8079 /* GD->IE relaxation. */
0855e32b
NS		 8080 if (!is_local)
8081 /* add r0,pc; ldr r0, [r0] */
8082 insn = 0x44786800;
8083 else if (arch_has_thumb2_nop (globals))
8084 /* nop.w */
8085 insn = 0xf3af8000;
8086 else
8087 /* nop; nop */
8088 insn = 0xbf00bf00;
b38cadfb 8089
0855e32b
NS		 8090 bfd_put_16 (input_bfd, insn >> 16, contents + rel->r_offset);
8091 bfd_put_16 (input_bfd, insn & 0xffff, contents + rel->r_offset + 2);
8092 break;
8093 }
8094 return bfd_reloc_ok;
8095}
8096
4962c51a
MS		 8097/* For a given value of n, calculate the value of G_n as required to
8098 deal with group relocations. We return it in the form of an
8099 encoded constant-and-rotation, together with the final residual. If n is
8100 specified as less than zero, then final_residual is filled with the
8101 input value and no further action is performed. */
8102
8103static bfd_vma
8104calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
8105{
8106 int current_n;
8107 bfd_vma g_n;
8108 bfd_vma encoded_g_n = 0;
8109 bfd_vma residual = value; /* Also known as Y_n. */
8110
8111 for (current_n = 0; current_n <= n; current_n++)
8112 {
8113 int shift;
8114
8115 /* Calculate which part of the value to mask. */
8116 if (residual == 0)
99059e56 8117 shift = 0;
4962c51a 8118 else
99059e56
RM		 8119 {
8120 int msb;
8121
8122 /* Determine the most significant bit in the residual and
8123 align the resulting value to a 2-bit boundary. */
8124 for (msb = 30; msb >= 0; msb -= 2)
8125 if (residual & (3 << msb))
8126 break;
8127
8128 /* The desired shift is now (msb - 6), or zero, whichever
8129 is the greater. */
8130 shift = msb - 6;
8131 if (shift < 0)
8132 shift = 0;
8133 }
4962c51a
MS		 8134
8135 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
8136 g_n = residual & (0xff << shift);
8137 encoded_g_n = (g_n >> shift)
99059e56 8138 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4962c51a
MS		 8139
8140 /* Calculate the residual for the next time around. */
8141 residual &= ~g_n;
8142 }
8143
8144 *final_residual = residual;
8145
8146 return encoded_g_n;
8147}
8148
8149/* Given an ARM instruction, determine whether it is an ADD or a SUB.
8150 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
906e58ca 8151
4962c51a 8152static int
906e58ca 8153identify_add_or_sub (bfd_vma insn)
4962c51a
MS		 8154{
8155 int opcode = insn & 0x1e00000;
8156
8157 if (opcode == 1 << 23) /* ADD */
8158 return 1;
8159
8160 if (opcode == 1 << 22) /* SUB */
8161 return -1;
8162
8163 return 0;
8164}
8165
252b5132 8166/* Perform a relocation as part of a final link. */
9b485d32 8167
252b5132 8168static bfd_reloc_status_type
57e8b36a
NC		 8169elf32_arm_final_link_relocate (reloc_howto_type * howto,
8170 bfd * input_bfd,
8171 bfd * output_bfd,
8172 asection * input_section,
8173 bfd_byte * contents,
8174 Elf_Internal_Rela * rel,
8175 bfd_vma value,
8176 struct bfd_link_info * info,
8177 asection * sym_sec,
8178 const char * sym_name,
34e77a92
RS		 8179 unsigned char st_type,
8180 enum arm_st_branch_type branch_type,
0945cdfd 8181 struct elf_link_hash_entry * h,
f2a9dd69 8182 bfd_boolean * unresolved_reloc_p,
8029a119 8183 char ** error_message)
252b5132
RH		 8184{
8185 unsigned long r_type = howto->type;
8186 unsigned long r_symndx;
8187 bfd_byte * hit_data = contents + rel->r_offset;
252b5132 8188 bfd_vma * local_got_offsets;
0855e32b 8189 bfd_vma * local_tlsdesc_gotents;
34e77a92
RS		 8190 asection * sgot;
8191 asection * splt;
252b5132 8192 asection * sreloc = NULL;
362d30a1 8193 asection * srelgot;
252b5132 8194 bfd_vma addend;
ba96a88f 8195 bfd_signed_vma signed_addend;
34e77a92
RS		 8196 unsigned char dynreloc_st_type;
8197 bfd_vma dynreloc_value;
ba96a88f 8198 struct elf32_arm_link_hash_table * globals;
34e77a92
RS		 8199 struct elf32_arm_link_hash_entry *eh;
8200 union gotplt_union *root_plt;
8201 struct arm_plt_info *arm_plt;
8202 bfd_vma plt_offset;
8203 bfd_vma gotplt_offset;
8204 bfd_boolean has_iplt_entry;
f21f3fe0 8205
9c504268 8206 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 8207 if (globals == NULL)
8208 return bfd_reloc_notsupported;
9c504268 8209
0ffa91dd
NC		 8210 BFD_ASSERT (is_arm_elf (input_bfd));
8211
8212 /* Some relocation types map to different relocations depending on the
9c504268 8213 target. We pick the right one here. */
eb043451 8214 r_type = arm_real_reloc_type (globals, r_type);
0855e32b
NS		 8215
8216 /* It is possible to have linker relaxations on some TLS access
8217 models. Update our information here. */
8218 r_type = elf32_arm_tls_transition (info, r_type, h);
8219
eb043451
PB		 8220 if (r_type != howto->type)
8221 howto = elf32_arm_howto_from_type (r_type);
9c504268 8222
cac15327
NC		 8223 /* If the start address has been set, then set the EF_ARM_HASENTRY
8224 flag. Setting this more than once is redundant, but the cost is
8225 not too high, and it keeps the code simple.
99e4ae17 8226
cac15327
NC		 8227 The test is done here, rather than somewhere else, because the
8228 start address is only set just before the final link commences.
8229
8230 Note - if the user deliberately sets a start address of 0, the
8231 flag will not be set. */
8232 if (bfd_get_start_address (output_bfd) != 0)
8233 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 8234
34e77a92 8235 eh = (struct elf32_arm_link_hash_entry *) h;
362d30a1 8236 sgot = globals->root.sgot;
252b5132 8237 local_got_offsets = elf_local_got_offsets (input_bfd);
0855e32b
NS		 8238 local_tlsdesc_gotents = elf32_arm_local_tlsdesc_gotent (input_bfd);
8239
34e77a92
RS		 8240 if (globals->root.dynamic_sections_created)
8241 srelgot = globals->root.srelgot;
8242 else
8243 srelgot = NULL;
8244
252b5132
RH		 8245 r_symndx = ELF32_R_SYM (rel->r_info);
8246
4e7fd91e 8247 if (globals->use_rel)
ba96a88f 8248 {
4e7fd91e
PB		 8249 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
8250
8251 if (addend & ((howto->src_mask + 1) >> 1))
8252 {
8253 signed_addend = -1;
8254 signed_addend &= ~ howto->src_mask;
8255 signed_addend |= addend;
8256 }
8257 else
8258 signed_addend = addend;
ba96a88f
NC		 8259 }
8260 else
4e7fd91e 8261 addend = signed_addend = rel->r_addend;
f21f3fe0 8262
39f21624
NC		 8263 /* ST_BRANCH_TO_ARM is nonsense to thumb-only targets when we
8264 are resolving a function call relocation. */
8265 if (using_thumb_only (globals)
8266 && (r_type == R_ARM_THM_CALL
8267 || r_type == R_ARM_THM_JUMP24)
8268 && branch_type == ST_BRANCH_TO_ARM)
8269 branch_type = ST_BRANCH_TO_THUMB;
8270
34e77a92
RS		 8271 /* Record the symbol information that should be used in dynamic
8272 relocations. */
8273 dynreloc_st_type = st_type;
8274 dynreloc_value = value;
8275 if (branch_type == ST_BRANCH_TO_THUMB)
8276 dynreloc_value |= 1;
8277
8278 /* Find out whether the symbol has a PLT. Set ST_VALUE, BRANCH_TYPE and
8279 VALUE appropriately for relocations that we resolve at link time. */
8280 has_iplt_entry = FALSE;
8281 if (elf32_arm_get_plt_info (input_bfd, eh, r_symndx, &root_plt, &arm_plt)
8282 && root_plt->offset != (bfd_vma) -1)
8283 {
8284 plt_offset = root_plt->offset;
8285 gotplt_offset = arm_plt->got_offset;
8286
8287 if (h == NULL || eh->is_iplt)
8288 {
8289 has_iplt_entry = TRUE;
8290 splt = globals->root.iplt;
8291
8292 /* Populate .iplt entries here, because not all of them will
8293 be seen by finish_dynamic_symbol. The lower bit is set if
8294 we have already populated the entry. */
8295 if (plt_offset & 1)
8296 plt_offset--;
8297 else
8298 {
57460bcf
NC		 8299 if (elf32_arm_populate_plt_entry (output_bfd, info, root_plt, arm_plt,
8300 -1, dynreloc_value))
8301 root_plt->offset |= 1;
8302 else
8303 return bfd_reloc_notsupported;
34e77a92
RS		 8304 }
8305
8306 /* Static relocations always resolve to the .iplt entry. */
8307 st_type = STT_FUNC;
8308 value = (splt->output_section->vma
8309 + splt->output_offset
8310 + plt_offset);
8311 branch_type = ST_BRANCH_TO_ARM;
8312
8313 /* If there are non-call relocations that resolve to the .iplt
8314 entry, then all dynamic ones must too. */
8315 if (arm_plt->noncall_refcount != 0)
8316 {
8317 dynreloc_st_type = st_type;
8318 dynreloc_value = value;
8319 }
8320 }
8321 else
8322 /* We populate the .plt entry in finish_dynamic_symbol. */
8323 splt = globals->root.splt;
8324 }
8325 else
8326 {
8327 splt = NULL;
8328 plt_offset = (bfd_vma) -1;
8329 gotplt_offset = (bfd_vma) -1;
8330 }
8331
252b5132
RH		 8332 switch (r_type)
8333 {
8334 case R_ARM_NONE:
28a094c2
DJ		 8335 /* We don't need to find a value for this symbol. It's just a
8336 marker. */
8337 *unresolved_reloc_p = FALSE;
252b5132
RH		 8338 return bfd_reloc_ok;
8339
00a97672
RS		 8340 case R_ARM_ABS12:
8341 if (!globals->vxworks_p)
8342 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8343
252b5132
RH		 8344 case R_ARM_PC24:
8345 case R_ARM_ABS32:
bb224fc3 8346 case R_ARM_ABS32_NOI:
252b5132 8347 case R_ARM_REL32:
bb224fc3 8348 case R_ARM_REL32_NOI:
5b5bb741
PB		 8349 case R_ARM_CALL:
8350 case R_ARM_JUMP24:
dfc5f959 8351 case R_ARM_XPC25:
eb043451 8352 case R_ARM_PREL31:
7359ea65 8353 case R_ARM_PLT32:
7359ea65
DJ		 8354 /* Handle relocations which should use the PLT entry. ABS32/REL32
8355 will use the symbol's value, which may point to a PLT entry, but we
8356 don't need to handle that here. If we created a PLT entry, all
5fa9e92f
CL		 8357 branches in this object should go to it, except if the PLT is too
8358 far away, in which case a long branch stub should be inserted. */
bb224fc3 8359 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
99059e56 8360 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI
155d87d7
CL		 8361 && r_type != R_ARM_CALL
8362 && r_type != R_ARM_JUMP24
8363 && r_type != R_ARM_PLT32)
34e77a92 8364 && plt_offset != (bfd_vma) -1)
7359ea65 8365 {
34e77a92
RS		 8366 /* If we've created a .plt section, and assigned a PLT entry
8367 to this function, it must either be a STT_GNU_IFUNC reference
8368 or not be known to bind locally. In other cases, we should
8369 have cleared the PLT entry by now. */
8370 BFD_ASSERT (has_iplt_entry || !SYMBOL_CALLS_LOCAL (info, h));
7359ea65
DJ		 8371
8372 value = (splt->output_section->vma
8373 + splt->output_offset
34e77a92 8374 + plt_offset);
0945cdfd 8375 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 8376 return _bfd_final_link_relocate (howto, input_bfd, input_section,
8377 contents, rel->r_offset, value,
00a97672 8378 rel->r_addend);
7359ea65
DJ		 8379 }
8380
67687978
PB		 8381 /* When generating a shared object or relocatable executable, these
8382 relocations are copied into the output file to be resolved at
8383 run time. */
8384 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 8385 && (input_section->flags & SEC_ALLOC)
4dfe6ac6 8386 && !(globals->vxworks_p
3348747a
NS		 8387 && strcmp (input_section->output_section->name,
8388 ".tls_vars") == 0)
bb224fc3 8389 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 8390 || !SYMBOL_CALLS_LOCAL (info, h))
ca6b5f82
AM		 8391 && !(input_bfd == globals->stub_bfd
8392 && strstr (input_section->name, STUB_SUFFIX))
7359ea65
DJ		 8393 && (h == NULL
8394 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8395 || h->root.type != bfd_link_hash_undefweak)
8396 && r_type != R_ARM_PC24
5b5bb741
PB		 8397 && r_type != R_ARM_CALL
8398 && r_type != R_ARM_JUMP24
ee06dc07 8399 && r_type != R_ARM_PREL31
7359ea65 8400 && r_type != R_ARM_PLT32)
252b5132 8401 {
947216bf 8402 Elf_Internal_Rela outrel;
b34976b6 8403 bfd_boolean skip, relocate;
f21f3fe0 8404
0945cdfd
DJ		 8405 *unresolved_reloc_p = FALSE;
8406
34e77a92 8407 if (sreloc == NULL && globals->root.dynamic_sections_created)
252b5132 8408 {
83bac4b0
NC		 8409 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section,
8410 ! globals->use_rel);
f21f3fe0 8411
83bac4b0 8412 if (sreloc == NULL)
252b5132 8413 return bfd_reloc_notsupported;
252b5132 8414 }
f21f3fe0 8415
b34976b6
AM		 8416 skip = FALSE;
8417 relocate = FALSE;
f21f3fe0 8418
00a97672 8419 outrel.r_addend = addend;
c629eae0
JJ		 8420 outrel.r_offset =
8421 _bfd_elf_section_offset (output_bfd, info, input_section,
8422 rel->r_offset);
8423 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 8424 skip = TRUE;
0bb2d96a 8425 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 8426 skip = TRUE, relocate = TRUE;
252b5132
RH		 8427 outrel.r_offset += (input_section->output_section->vma
8428 + input_section->output_offset);
f21f3fe0 8429
252b5132 8430 if (skip)
0bb2d96a 8431 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 8432 else if (h != NULL
8433 && h->dynindx != -1
7359ea65 8434 && (!info->shared
5e681ec4 8435 || !info->symbolic
f5385ebf 8436 || !h->def_regular))
5e681ec4 8437 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 8438 else
8439 {
a16385dc
MM		 8440 int symbol;
8441
5e681ec4 8442 /* This symbol is local, or marked to become local. */
34e77a92 8443 BFD_ASSERT (r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI);
a16385dc 8444 if (globals->symbian_p)
6366ff1e 8445 {
74541ad4
AM		 8446 asection *osec;
8447
6366ff1e
MM		 8448 /* On Symbian OS, the data segment and text segement
8449 can be relocated independently. Therefore, we
8450 must indicate the segment to which this
8451 relocation is relative. The BPABI allows us to
8452 use any symbol in the right segment; we just use
8453 the section symbol as it is convenient. (We
8454 cannot use the symbol given by "h" directly as it
74541ad4
AM		 8455 will not appear in the dynamic symbol table.)
8456
8457 Note that the dynamic linker ignores the section
8458 symbol value, so we don't subtract osec->vma
8459 from the emitted reloc addend. */
10dbd1f3 8460 if (sym_sec)
74541ad4 8461 osec = sym_sec->output_section;
10dbd1f3 8462 else
74541ad4
AM		 8463 osec = input_section->output_section;
8464 symbol = elf_section_data (osec)->dynindx;
8465 if (symbol == 0)
8466 {
8467 struct elf_link_hash_table *htab = elf_hash_table (info);
8468
8469 if ((osec->flags & SEC_READONLY) == 0
8470 && htab->data_index_section != NULL)
8471 osec = htab->data_index_section;
8472 else
8473 osec = htab->text_index_section;
8474 symbol = elf_section_data (osec)->dynindx;
8475 }
6366ff1e
MM		 8476 BFD_ASSERT (symbol != 0);
8477 }
a16385dc
MM		 8478 else
8479 /* On SVR4-ish systems, the dynamic loader cannot
8480 relocate the text and data segments independently,
8481 so the symbol does not matter. */
8482 symbol = 0;
34e77a92
RS		 8483 if (dynreloc_st_type == STT_GNU_IFUNC)
8484 /* We have an STT_GNU_IFUNC symbol that doesn't resolve
8485 to the .iplt entry. Instead, every non-call reference
8486 must use an R_ARM_IRELATIVE relocation to obtain the
8487 correct run-time address. */
8488 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_IRELATIVE);
8489 else
8490 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 8491 if (globals->use_rel)
8492 relocate = TRUE;
8493 else
34e77a92 8494 outrel.r_addend += dynreloc_value;
252b5132 8495 }
f21f3fe0 8496
47beaa6a 8497 elf32_arm_add_dynreloc (output_bfd, info, sreloc, &outrel);
9a5aca8c 8498
f21f3fe0 8499 /* If this reloc is against an external symbol, we do not want to
252b5132 8500 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 8501 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 8502 if (! relocate)
8503 return bfd_reloc_ok;
9a5aca8c 8504
f21f3fe0 8505 return _bfd_final_link_relocate (howto, input_bfd, input_section,
34e77a92
RS		 8506 contents, rel->r_offset,
8507 dynreloc_value, (bfd_vma) 0);
252b5132
RH		 8508 }
8509 else switch (r_type)
8510 {
00a97672
RS		 8511 case R_ARM_ABS12:
8512 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
8513
dfc5f959 8514 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 8515 case R_ARM_CALL:
8516 case R_ARM_JUMP24:
8029a119 8517 case R_ARM_PC24: /* Arm B/BL instruction. */
7359ea65 8518 case R_ARM_PLT32:
906e58ca 8519 {
906e58ca
NC		 8520 struct elf32_arm_stub_hash_entry *stub_entry = NULL;
8521
dfc5f959 8522 if (r_type == R_ARM_XPC25)
252b5132 8523 {
dfc5f959
NC		 8524 /* Check for Arm calling Arm function. */
8525 /* FIXME: Should we translate the instruction into a BL
8526 instruction instead ? */
35fc36a8 8527 if (branch_type != ST_BRANCH_TO_THUMB)
d003868e
AM		 8528 (*_bfd_error_handler)
8529 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
8530 input_bfd,
8531 h ? h->root.root.string : "(local)");
dfc5f959 8532 }
155d87d7 8533 else if (r_type == R_ARM_PC24)
dfc5f959
NC		 8534 {
8535 /* Check for Arm calling Thumb function. */
35fc36a8 8536 if (branch_type == ST_BRANCH_TO_THUMB)
dfc5f959 8537 {
f2a9dd69
DJ		 8538 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
8539 output_bfd, input_section,
8540 hit_data, sym_sec, rel->r_offset,
8541 signed_addend, value,
8542 error_message))
8543 return bfd_reloc_ok;
8544 else
8545 return bfd_reloc_dangerous;
dfc5f959 8546 }
252b5132 8547 }
ba96a88f 8548
906e58ca 8549 /* Check if a stub has to be inserted because the
8029a119 8550 destination is too far or we are changing mode. */
155d87d7
CL		 8551 if ( r_type == R_ARM_CALL
8552 || r_type == R_ARM_JUMP24
8553 || r_type == R_ARM_PLT32)
906e58ca 8554 {
fe33d2fa
CL		 8555 enum elf32_arm_stub_type stub_type = arm_stub_none;
8556 struct elf32_arm_link_hash_entry *hash;
8557
8558 hash = (struct elf32_arm_link_hash_entry *) h;
8559 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8560 st_type, &branch_type,
8561 hash, value, sym_sec,
fe33d2fa 8562 input_bfd, sym_name);
5fa9e92f 8563
fe33d2fa 8564 if (stub_type != arm_stub_none)
906e58ca
NC		 8565 {
8566 /* The target is out of reach, so redirect the
8567 branch to the local stub for this function. */
906e58ca
NC		 8568 stub_entry = elf32_arm_get_stub_entry (input_section,
8569 sym_sec, h,
fe33d2fa
CL		 8570 rel, globals,
8571 stub_type);
9cd3e4e5
NC		 8572 {
8573 if (stub_entry != NULL)
8574 value = (stub_entry->stub_offset
8575 + stub_entry->stub_sec->output_offset
8576 + stub_entry->stub_sec->output_section->vma);
8577
8578 if (plt_offset != (bfd_vma) -1)
8579 *unresolved_reloc_p = FALSE;
8580 }
906e58ca 8581 }
fe33d2fa
CL		 8582 else
8583 {
8584 /* If the call goes through a PLT entry, make sure to
8585 check distance to the right destination address. */
34e77a92 8586 if (plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 8587 {
8588 value = (splt->output_section->vma
8589 + splt->output_offset
34e77a92 8590 + plt_offset);
fe33d2fa
CL		 8591 *unresolved_reloc_p = FALSE;
8592 /* The PLT entry is in ARM mode, regardless of the
8593 target function. */
35fc36a8 8594 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 8595 }
8596 }
906e58ca
NC		 8597 }
8598
dea514f5
PB		 8599 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
8600 where:
8601 S is the address of the symbol in the relocation.
8602 P is address of the instruction being relocated.
8603 A is the addend (extracted from the instruction) in bytes.
8604
8605 S is held in 'value'.
8606 P is the base address of the section containing the
8607 instruction plus the offset of the reloc into that
8608 section, ie:
8609 (input_section->output_section->vma +
8610 input_section->output_offset +
8611 rel->r_offset).
8612 A is the addend, converted into bytes, ie:
8613 (signed_addend * 4)
8614
8615 Note: None of these operations have knowledge of the pipeline
8616 size of the processor, thus it is up to the assembler to
8617 encode this information into the addend. */
8618 value -= (input_section->output_section->vma
8619 + input_section->output_offset);
8620 value -= rel->r_offset;
4e7fd91e
PB		 8621 if (globals->use_rel)
8622 value += (signed_addend << howto->size);
8623 else
8624 /* RELA addends do not have to be adjusted by howto->size. */
8625 value += signed_addend;
23080146 8626
dcb5e6e6
NC		 8627 signed_addend = value;
8628 signed_addend >>= howto->rightshift;
9a5aca8c 8629
5ab79981 8630 /* A branch to an undefined weak symbol is turned into a jump to
ffcb4889 8631 the next instruction unless a PLT entry will be created.
77b4f08f 8632 Do the same for local undefined symbols (but not for STN_UNDEF).
cd1dac3d
DG		 8633 The jump to the next instruction is optimized as a NOP depending
8634 on the architecture. */
ffcb4889 8635 if (h ? (h->root.type == bfd_link_hash_undefweak
34e77a92 8636 && plt_offset == (bfd_vma) -1)
77b4f08f 8637 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec))
5ab79981 8638 {
cd1dac3d
DG		 8639 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000);
8640
8641 if (arch_has_arm_nop (globals))
8642 value |= 0x0320f000;
8643 else
8644 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */
5ab79981
PB		 8645 }
8646 else
59f2c4e7 8647 {
9b485d32 8648 /* Perform a signed range check. */
dcb5e6e6 8649 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 8650 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
8651 return bfd_reloc_overflow;
9a5aca8c 8652
5ab79981 8653 addend = (value & 2);
39b41c9c 8654
5ab79981
PB		 8655 value = (signed_addend & howto->dst_mask)
8656 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 8657
5ab79981
PB		 8658 if (r_type == R_ARM_CALL)
8659 {
155d87d7 8660 /* Set the H bit in the BLX instruction. */
35fc36a8 8661 if (branch_type == ST_BRANCH_TO_THUMB)
155d87d7
CL		 8662 {
8663 if (addend)
8664 value |= (1 << 24);
8665 else
8666 value &= ~(bfd_vma)(1 << 24);
8667 }
8668
5ab79981 8669 /* Select the correct instruction (BL or BLX). */
906e58ca 8670 /* Only if we are not handling a BL to a stub. In this
8029a119 8671 case, mode switching is performed by the stub. */
35fc36a8 8672 if (branch_type == ST_BRANCH_TO_THUMB && !stub_entry)
5ab79981 8673 value |= (1 << 28);
63e1a0fc 8674 else if (stub_entry || branch_type != ST_BRANCH_UNKNOWN)
5ab79981
PB		 8675 {
8676 value &= ~(bfd_vma)(1 << 28);
8677 value |= (1 << 24);
8678 }
39b41c9c
PB		 8679 }
8680 }
906e58ca 8681 }
252b5132 8682 break;
f21f3fe0 8683
252b5132
RH		 8684 case R_ARM_ABS32:
8685 value += addend;
35fc36a8 8686 if (branch_type == ST_BRANCH_TO_THUMB)
252b5132
RH		 8687 value |= 1;
8688 break;
f21f3fe0 8689
bb224fc3
MS		 8690 case R_ARM_ABS32_NOI:
8691 value += addend;
8692 break;
8693
252b5132 8694 case R_ARM_REL32:
a8bc6c78 8695 value += addend;
35fc36a8 8696 if (branch_type == ST_BRANCH_TO_THUMB)
a8bc6c78 8697 value |= 1;
252b5132 8698 value -= (input_section->output_section->vma
62efb346 8699 + input_section->output_offset + rel->r_offset);
252b5132 8700 break;
eb043451 8701
bb224fc3
MS		 8702 case R_ARM_REL32_NOI:
8703 value += addend;
8704 value -= (input_section->output_section->vma
8705 + input_section->output_offset + rel->r_offset);
8706 break;
8707
eb043451
PB		 8708 case R_ARM_PREL31:
8709 value -= (input_section->output_section->vma
8710 + input_section->output_offset + rel->r_offset);
8711 value += signed_addend;
8712 if (! h || h->root.type != bfd_link_hash_undefweak)
8713 {
8029a119 8714 /* Check for overflow. */
eb043451
PB		 8715 if ((value ^ (value >> 1)) & (1 << 30))
8716 return bfd_reloc_overflow;
8717 }
8718 value &= 0x7fffffff;
8719 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
35fc36a8 8720 if (branch_type == ST_BRANCH_TO_THUMB)
eb043451
PB		 8721 value |= 1;
8722 break;
252b5132 8723 }
f21f3fe0 8724
252b5132
RH		 8725 bfd_put_32 (input_bfd, value, hit_data);
8726 return bfd_reloc_ok;
8727
8728 case R_ARM_ABS8:
fd0fd00c
MJ		 8729 /* PR 16202: Refectch the addend using the correct size. */
8730 if (globals->use_rel)
8731 addend = bfd_get_8 (input_bfd, hit_data);
252b5132 8732 value += addend;
4e67d4ca
DG		 8733
8734 /* There is no way to tell whether the user intended to use a signed or
8735 unsigned addend. When checking for overflow we accept either,
8736 as specified by the AAELF. */
8737 if ((long) value > 0xff || (long) value < -0x80)
252b5132
RH		 8738 return bfd_reloc_overflow;
8739
8740 bfd_put_8 (input_bfd, value, hit_data);
8741 return bfd_reloc_ok;
8742
8743 case R_ARM_ABS16:
fd0fd00c
MJ		 8744 /* PR 16202: Refectch the addend using the correct size. */
8745 if (globals->use_rel)
8746 addend = bfd_get_16 (input_bfd, hit_data);
252b5132
RH		 8747 value += addend;
8748
4e67d4ca
DG		 8749 /* See comment for R_ARM_ABS8. */
8750 if ((long) value > 0xffff || (long) value < -0x8000)
252b5132
RH		 8751 return bfd_reloc_overflow;
8752
8753 bfd_put_16 (input_bfd, value, hit_data);
8754 return bfd_reloc_ok;
8755
252b5132 8756 case R_ARM_THM_ABS5:
9b485d32 8757 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 8758 if (globals->use_rel)
8759 {
8760 /* Need to refetch addend. */
8761 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
8762 /* ??? Need to determine shift amount from operand size. */
8763 addend >>= howto->rightshift;
8764 }
252b5132
RH		 8765 value += addend;
8766
8767 /* ??? Isn't value unsigned? */
8768 if ((long) value > 0x1f || (long) value < -0x10)
8769 return bfd_reloc_overflow;
8770
8771 /* ??? Value needs to be properly shifted into place first. */
8772 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
8773 bfd_put_16 (input_bfd, value, hit_data);
8774 return bfd_reloc_ok;
8775
2cab6cc3
MS		 8776 case R_ARM_THM_ALU_PREL_11_0:
8777 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
8778 {
8779 bfd_vma insn;
8780 bfd_signed_vma relocation;
8781
8782 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8783 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8784
99059e56
RM		 8785 if (globals->use_rel)
8786 {
8787 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
8788 | ((insn & (1 << 26)) >> 15);
8789 if (insn & 0xf00000)
8790 signed_addend = -signed_addend;
8791 }
2cab6cc3
MS		 8792
8793 relocation = value + signed_addend;
79f08007 8794 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8795 + input_section->output_offset
8796 + rel->r_offset);
2cab6cc3 8797
99059e56 8798 value = abs (relocation);
2cab6cc3 8799
99059e56
RM		 8800 if (value >= 0x1000)
8801 return bfd_reloc_overflow;
2cab6cc3
MS		 8802
8803 insn = (insn & 0xfb0f8f00) | (value & 0xff)
99059e56
RM		 8804 | ((value & 0x700) << 4)
8805 | ((value & 0x800) << 15);
8806 if (relocation < 0)
8807 insn |= 0xa00000;
2cab6cc3
MS		 8808
8809 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8810 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8811
99059e56 8812 return bfd_reloc_ok;
2cab6cc3
MS		 8813 }
8814
e1ec24c6
NC		 8815 case R_ARM_THM_PC8:
8816 /* PR 10073: This reloc is not generated by the GNU toolchain,
8817 but it is supported for compatibility with third party libraries
8818 generated by other compilers, specifically the ARM/IAR. */
8819 {
8820 bfd_vma insn;
8821 bfd_signed_vma relocation;
8822
8823 insn = bfd_get_16 (input_bfd, hit_data);
8824
99059e56 8825 if (globals->use_rel)
79f08007 8826 addend = ((((insn & 0x00ff) << 2) + 4) & 0x3ff) -4;
e1ec24c6
NC		 8827
8828 relocation = value + addend;
79f08007 8829 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8830 + input_section->output_offset
8831 + rel->r_offset);
e1ec24c6 8832
99059e56 8833 value = abs (relocation);
e1ec24c6
NC		 8834
8835 /* We do not check for overflow of this reloc. Although strictly
8836 speaking this is incorrect, it appears to be necessary in order
8837 to work with IAR generated relocs. Since GCC and GAS do not
8838 generate R_ARM_THM_PC8 relocs, the lack of a check should not be
8839 a problem for them. */
8840 value &= 0x3fc;
8841
8842 insn = (insn & 0xff00) | (value >> 2);
8843
8844 bfd_put_16 (input_bfd, insn, hit_data);
8845
99059e56 8846 return bfd_reloc_ok;
e1ec24c6
NC		 8847 }
8848
2cab6cc3
MS		 8849 case R_ARM_THM_PC12:
8850 /* Corresponds to: ldr.w reg, [pc, #offset]. */
8851 {
8852 bfd_vma insn;
8853 bfd_signed_vma relocation;
8854
8855 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
99059e56 8856 | bfd_get_16 (input_bfd, hit_data + 2);
2cab6cc3 8857
99059e56
RM		 8858 if (globals->use_rel)
8859 {
8860 signed_addend = insn & 0xfff;
8861 if (!(insn & (1 << 23)))
8862 signed_addend = -signed_addend;
8863 }
2cab6cc3
MS		 8864
8865 relocation = value + signed_addend;
79f08007 8866 relocation -= Pa (input_section->output_section->vma
99059e56
RM		 8867 + input_section->output_offset
8868 + rel->r_offset);
2cab6cc3 8869
99059e56 8870 value = abs (relocation);
2cab6cc3 8871
99059e56
RM		 8872 if (value >= 0x1000)
8873 return bfd_reloc_overflow;
2cab6cc3
MS		 8874
8875 insn = (insn & 0xff7ff000) | value;
99059e56
RM		 8876 if (relocation >= 0)
8877 insn |= (1 << 23);
2cab6cc3
MS		 8878
8879 bfd_put_16 (input_bfd, insn >> 16, hit_data);
8880 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
8881
99059e56 8882 return bfd_reloc_ok;
2cab6cc3
MS		 8883 }
8884
dfc5f959 8885 case R_ARM_THM_XPC22:
c19d1205 8886 case R_ARM_THM_CALL:
bd97cb95 8887 case R_ARM_THM_JUMP24:
dfc5f959 8888 /* Thumb BL (branch long instruction). */
252b5132 8889 {
b34976b6 8890 bfd_vma relocation;
99059e56 8891 bfd_vma reloc_sign;
b34976b6
AM		 8892 bfd_boolean overflow = FALSE;
8893 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
8894 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 8895 bfd_signed_vma reloc_signed_max;
8896 bfd_signed_vma reloc_signed_min;
b34976b6 8897 bfd_vma check;
252b5132 8898 bfd_signed_vma signed_check;
e95de063 8899 int bitsize;
cd1dac3d 8900 const int thumb2 = using_thumb2 (globals);
252b5132 8901
5ab79981 8902 /* A branch to an undefined weak symbol is turned into a jump to
cd1dac3d
DG		 8903 the next instruction unless a PLT entry will be created.
8904 The jump to the next instruction is optimized as a NOP.W for
8905 Thumb-2 enabled architectures. */
19540007 8906 if (h && h->root.type == bfd_link_hash_undefweak
34e77a92 8907 && plt_offset == (bfd_vma) -1)
5ab79981 8908 {
cd1dac3d
DG		 8909 if (arch_has_thumb2_nop (globals))
8910 {
8911 bfd_put_16 (input_bfd, 0xf3af, hit_data);
8912 bfd_put_16 (input_bfd, 0x8000, hit_data + 2);
8913 }
8914 else
8915 {
8916 bfd_put_16 (input_bfd, 0xe000, hit_data);
8917 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
8918 }
5ab79981
PB		 8919 return bfd_reloc_ok;
8920 }
8921
e95de063 8922 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
99059e56 8923 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 8924 if (globals->use_rel)
8925 {
99059e56
RM		 8926 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
8927 bfd_vma upper = upper_insn & 0x3ff;
8928 bfd_vma lower = lower_insn & 0x7ff;
e95de063
MS		 8929 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
8930 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
99059e56
RM		 8931 bfd_vma i1 = j1 ^ s ? 0 : 1;
8932 bfd_vma i2 = j2 ^ s ? 0 : 1;
e95de063 8933
99059e56
RM		 8934 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
8935 /* Sign extend. */
8936 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
e95de063 8937
4e7fd91e
PB		 8938 signed_addend = addend;
8939 }
cb1afa5c 8940
dfc5f959
NC		 8941 if (r_type == R_ARM_THM_XPC22)
8942 {
8943 /* Check for Thumb to Thumb call. */
8944 /* FIXME: Should we translate the instruction into a BL
8945 instruction instead ? */
35fc36a8 8946 if (branch_type == ST_BRANCH_TO_THUMB)
d003868e
AM		 8947 (*_bfd_error_handler)
8948 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
8949 input_bfd,
8950 h ? h->root.root.string : "(local)");
dfc5f959
NC		 8951 }
8952 else
252b5132 8953 {
dfc5f959
NC		 8954 /* If it is not a call to Thumb, assume call to Arm.
8955 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 8956 function call at all, but rather a long jump. Calls through
8957 the PLT do not require stubs. */
34e77a92 8958 if (branch_type == ST_BRANCH_TO_ARM && plt_offset == (bfd_vma) -1)
dfc5f959 8959 {
bd97cb95 8960 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8961 {
8962 /* Convert BL to BLX. */
8963 lower_insn = (lower_insn & ~0x1000) | 0x0800;
8964 }
155d87d7
CL		 8965 else if (( r_type != R_ARM_THM_CALL)
8966 && (r_type != R_ARM_THM_JUMP24))
8029a119
NC		 8967 {
8968 if (elf32_thumb_to_arm_stub
8969 (info, sym_name, input_bfd, output_bfd, input_section,
8970 hit_data, sym_sec, rel->r_offset, signed_addend, value,
8971 error_message))
8972 return bfd_reloc_ok;
8973 else
8974 return bfd_reloc_dangerous;
8975 }
da5938a2 8976 }
35fc36a8
RS		 8977 else if (branch_type == ST_BRANCH_TO_THUMB
8978 && globals->use_blx
bd97cb95 8979 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 8980 {
8981 /* Make sure this is a BL. */
8982 lower_insn |= 0x1800;
8983 }
252b5132 8984 }
f21f3fe0 8985
fe33d2fa 8986 enum elf32_arm_stub_type stub_type = arm_stub_none;
155d87d7 8987 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24)
906e58ca
NC		 8988 {
8989 /* Check if a stub has to be inserted because the destination
8029a119 8990 is too far. */
fe33d2fa
CL		 8991 struct elf32_arm_stub_hash_entry *stub_entry;
8992 struct elf32_arm_link_hash_entry *hash;
8993
8994 hash = (struct elf32_arm_link_hash_entry *) h;
8995
8996 stub_type = arm_type_of_stub (info, input_section, rel,
34e77a92
RS		 8997 st_type, &branch_type,
8998 hash, value, sym_sec,
fe33d2fa
CL		 8999 input_bfd, sym_name);
9000
9001 if (stub_type != arm_stub_none)
906e58ca
NC		 9002 {
9003 /* The target is out of reach or we are changing modes, so
9004 redirect the branch to the local stub for this
9005 function. */
9006 stub_entry = elf32_arm_get_stub_entry (input_section,
9007 sym_sec, h,
fe33d2fa
CL		 9008 rel, globals,
9009 stub_type);
906e58ca 9010 if (stub_entry != NULL)
9cd3e4e5
NC		 9011 {
9012 value = (stub_entry->stub_offset
9013 + stub_entry->stub_sec->output_offset
9014 + stub_entry->stub_sec->output_section->vma);
9015
9016 if (plt_offset != (bfd_vma) -1)
9017 *unresolved_reloc_p = FALSE;
9018 }
906e58ca 9019
f4ac8484 9020 /* If this call becomes a call to Arm, force BLX. */
155d87d7 9021 if (globals->use_blx && (r_type == R_ARM_THM_CALL))
f4ac8484
DJ		 9022 {
9023 if ((stub_entry
9024 && !arm_stub_is_thumb (stub_entry->stub_type))
35fc36a8 9025 || branch_type != ST_BRANCH_TO_THUMB)
f4ac8484
DJ		 9026 lower_insn = (lower_insn & ~0x1000) | 0x0800;
9027 }
906e58ca
NC		 9028 }
9029 }
9030
fe33d2fa 9031 /* Handle calls via the PLT. */
34e77a92 9032 if (stub_type == arm_stub_none && plt_offset != (bfd_vma) -1)
fe33d2fa
CL		 9033 {
9034 value = (splt->output_section->vma
9035 + splt->output_offset
34e77a92 9036 + plt_offset);
fe33d2fa 9037
eed94f8f
NC		 9038 if (globals->use_blx
9039 && r_type == R_ARM_THM_CALL
9040 && ! using_thumb_only (globals))
fe33d2fa
CL		 9041 {
9042 /* If the Thumb BLX instruction is available, convert
9043 the BL to a BLX instruction to call the ARM-mode
9044 PLT entry. */
9045 lower_insn = (lower_insn & ~0x1000) | 0x0800;
35fc36a8 9046 branch_type = ST_BRANCH_TO_ARM;
fe33d2fa
CL		 9047 }
9048 else
9049 {
eed94f8f
NC		 9050 if (! using_thumb_only (globals))
9051 /* Target the Thumb stub before the ARM PLT entry. */
9052 value -= PLT_THUMB_STUB_SIZE;
35fc36a8 9053 branch_type = ST_BRANCH_TO_THUMB;
fe33d2fa
CL		 9054 }
9055 *unresolved_reloc_p = FALSE;
9056 }
9057
ba96a88f 9058 relocation = value + signed_addend;
f21f3fe0 9059
252b5132 9060 relocation -= (input_section->output_section->vma
ba96a88f
NC		 9061 + input_section->output_offset
9062 + rel->r_offset);
9a5aca8c 9063
252b5132
RH		 9064 check = relocation >> howto->rightshift;
9065
9066 /* If this is a signed value, the rightshift just dropped
9067 leading 1 bits (assuming twos complement). */
9068 if ((bfd_signed_vma) relocation >= 0)
9069 signed_check = check;
9070 else
9071 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
9072
e95de063
MS		 9073 /* Calculate the permissable maximum and minimum values for
9074 this relocation according to whether we're relocating for
9075 Thumb-2 or not. */
9076 bitsize = howto->bitsize;
9077 if (!thumb2)
9078 bitsize -= 2;
f6ebfac0 9079 reloc_signed_max = (1 << (bitsize - 1)) - 1;
e95de063
MS		 9080 reloc_signed_min = ~reloc_signed_max;
9081
252b5132 9082 /* Assumes two's complement. */
ba96a88f 9083 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 9084 overflow = TRUE;
252b5132 9085
bd97cb95 9086 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 9087 /* For a BLX instruction, make sure that the relocation is rounded up
9088 to a word boundary. This follows the semantics of the instruction
9089 which specifies that bit 1 of the target address will come from bit
9090 1 of the base address. */
9091 relocation = (relocation + 2) & ~ 3;
cb1afa5c 9092
e95de063
MS		 9093 /* Put RELOCATION back into the insn. Assumes two's complement.
9094 We use the Thumb-2 encoding, which is safe even if dealing with
9095 a Thumb-1 instruction by virtue of our overflow check above. */
99059e56 9096 reloc_sign = (signed_check < 0) ? 1 : 0;
e95de063 9097 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
99059e56
RM		 9098 | ((relocation >> 12) & 0x3ff)
9099 | (reloc_sign << 10);
906e58ca 9100 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
99059e56
RM		 9101 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
9102 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
9103 | ((relocation >> 1) & 0x7ff);
c62e1cc3 9104
252b5132
RH		 9105 /* Put the relocated value back in the object file: */
9106 bfd_put_16 (input_bfd, upper_insn, hit_data);
9107 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9108
9109 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9110 }
9111 break;
9112
c19d1205
ZW		 9113 case R_ARM_THM_JUMP19:
9114 /* Thumb32 conditional branch instruction. */
9115 {
9116 bfd_vma relocation;
9117 bfd_boolean overflow = FALSE;
9118 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
9119 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 9120 bfd_signed_vma reloc_signed_max = 0xffffe;
9121 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 9122 bfd_signed_vma signed_check;
9123
9124 /* Need to refetch the addend, reconstruct the top three bits,
9125 and squish the two 11 bit pieces together. */
9126 if (globals->use_rel)
9127 {
9128 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 9129 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 9130 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
9131 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
9132 bfd_vma lower = (lower_insn & 0x07ff);
9133
a00a1f35
MS		 9134 upper |= J1 << 6;
9135 upper |= J2 << 7;
9136 upper |= (!S) << 8;
c19d1205
ZW		 9137 upper -= 0x0100; /* Sign extend. */
9138
9139 addend = (upper << 12) | (lower << 1);
9140 signed_addend = addend;
9141 }
9142
bd97cb95 9143 /* Handle calls via the PLT. */
34e77a92 9144 if (plt_offset != (bfd_vma) -1)
bd97cb95
DJ		 9145 {
9146 value = (splt->output_section->vma
9147 + splt->output_offset
34e77a92 9148 + plt_offset);
bd97cb95
DJ		 9149 /* Target the Thumb stub before the ARM PLT entry. */
9150 value -= PLT_THUMB_STUB_SIZE;
9151 *unresolved_reloc_p = FALSE;
9152 }
9153
c19d1205
ZW		 9154 /* ??? Should handle interworking? GCC might someday try to
9155 use this for tail calls. */
9156
99059e56 9157 relocation = value + signed_addend;
c19d1205
ZW		 9158 relocation -= (input_section->output_section->vma
9159 + input_section->output_offset
9160 + rel->r_offset);
a00a1f35 9161 signed_check = (bfd_signed_vma) relocation;
c19d1205 9162
c19d1205
ZW		 9163 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9164 overflow = TRUE;
9165
9166 /* Put RELOCATION back into the insn. */
9167 {
9168 bfd_vma S = (relocation & 0x00100000) >> 20;
9169 bfd_vma J2 = (relocation & 0x00080000) >> 19;
9170 bfd_vma J1 = (relocation & 0x00040000) >> 18;
9171 bfd_vma hi = (relocation & 0x0003f000) >> 12;
9172 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
9173
a00a1f35 9174 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 9175 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
9176 }
9177
9178 /* Put the relocated value back in the object file: */
9179 bfd_put_16 (input_bfd, upper_insn, hit_data);
9180 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9181
9182 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
9183 }
9184
9185 case R_ARM_THM_JUMP11:
9186 case R_ARM_THM_JUMP8:
9187 case R_ARM_THM_JUMP6:
51c5503b
NC		 9188 /* Thumb B (branch) instruction). */
9189 {
6cf9e9fe 9190 bfd_signed_vma relocation;
51c5503b
NC		 9191 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
9192 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 9193 bfd_signed_vma signed_check;
9194
c19d1205
ZW		 9195 /* CZB cannot jump backward. */
9196 if (r_type == R_ARM_THM_JUMP6)
9197 reloc_signed_min = 0;
9198
4e7fd91e 9199 if (globals->use_rel)
6cf9e9fe 9200 {
4e7fd91e
PB		 9201 /* Need to refetch addend. */
9202 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
9203 if (addend & ((howto->src_mask + 1) >> 1))
9204 {
9205 signed_addend = -1;
9206 signed_addend &= ~ howto->src_mask;
9207 signed_addend |= addend;
9208 }
9209 else
9210 signed_addend = addend;
9211 /* The value in the insn has been right shifted. We need to
9212 undo this, so that we can perform the address calculation
9213 in terms of bytes. */
9214 signed_addend <<= howto->rightshift;
6cf9e9fe 9215 }
6cf9e9fe 9216 relocation = value + signed_addend;
51c5503b
NC		 9217
9218 relocation -= (input_section->output_section->vma
9219 + input_section->output_offset
9220 + rel->r_offset);
9221
6cf9e9fe
NC		 9222 relocation >>= howto->rightshift;
9223 signed_check = relocation;
c19d1205
ZW		 9224
9225 if (r_type == R_ARM_THM_JUMP6)
9226 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
9227 else
9228 relocation &= howto->dst_mask;
51c5503b 9229 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 9230
51c5503b
NC		 9231 bfd_put_16 (input_bfd, relocation, hit_data);
9232
9233 /* Assumes two's complement. */
9234 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
9235 return bfd_reloc_overflow;
9236
9237 return bfd_reloc_ok;
9238 }
cedb70c5 9239
8375c36b
PB		 9240 case R_ARM_ALU_PCREL7_0:
9241 case R_ARM_ALU_PCREL15_8:
9242 case R_ARM_ALU_PCREL23_15:
9243 {
9244 bfd_vma insn;
9245 bfd_vma relocation;
9246
9247 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 9248 if (globals->use_rel)
9249 {
9250 /* Extract the addend. */
9251 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
9252 signed_addend = addend;
9253 }
8375c36b
PB		 9254 relocation = value + signed_addend;
9255
9256 relocation -= (input_section->output_section->vma
9257 + input_section->output_offset
9258 + rel->r_offset);
9259 insn = (insn & ~0xfff)
9260 | ((howto->bitpos << 7) & 0xf00)
9261 | ((relocation >> howto->bitpos) & 0xff);
9262 bfd_put_32 (input_bfd, value, hit_data);
9263 }
9264 return bfd_reloc_ok;
9265
252b5132
RH		 9266 case R_ARM_GNU_VTINHERIT:
9267 case R_ARM_GNU_VTENTRY:
9268 return bfd_reloc_ok;
9269
c19d1205 9270 case R_ARM_GOTOFF32:
252b5132 9271 /* Relocation is relative to the start of the
99059e56 9272 global offset table. */
252b5132
RH		 9273
9274 BFD_ASSERT (sgot != NULL);
9275 if (sgot == NULL)
99059e56 9276 return bfd_reloc_notsupported;
9a5aca8c 9277
cedb70c5 9278 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 9279 address by one, so that attempts to call the function pointer will
9280 correctly interpret it as Thumb code. */
35fc36a8 9281 if (branch_type == ST_BRANCH_TO_THUMB)
ee29b9fb
RE		 9282 value += 1;
9283
252b5132 9284 /* Note that sgot->output_offset is not involved in this
99059e56
RM		 9285 calculation. We always want the start of .got. If we
9286 define _GLOBAL_OFFSET_TABLE in a different way, as is
9287 permitted by the ABI, we might have to change this
9288 calculation. */
252b5132 9289 value -= sgot->output_section->vma;
f21f3fe0 9290 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9291 contents, rel->r_offset, value,
00a97672 9292 rel->r_addend);
252b5132
RH		 9293
9294 case R_ARM_GOTPC:
a7c10850 9295 /* Use global offset table as symbol value. */
252b5132 9296 BFD_ASSERT (sgot != NULL);
f21f3fe0 9297
252b5132 9298 if (sgot == NULL)
99059e56 9299 return bfd_reloc_notsupported;
252b5132 9300
0945cdfd 9301 *unresolved_reloc_p = FALSE;
252b5132 9302 value = sgot->output_section->vma;
f21f3fe0 9303 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9304 contents, rel->r_offset, value,
00a97672 9305 rel->r_addend);
f21f3fe0 9306
252b5132 9307 case R_ARM_GOT32:
eb043451 9308 case R_ARM_GOT_PREL:
252b5132 9309 /* Relocation is to the entry for this symbol in the
99059e56 9310 global offset table. */
252b5132
RH		 9311 if (sgot == NULL)
9312 return bfd_reloc_notsupported;
f21f3fe0 9313
34e77a92
RS		 9314 if (dynreloc_st_type == STT_GNU_IFUNC
9315 && plt_offset != (bfd_vma) -1
9316 && (h == NULL || SYMBOL_REFERENCES_LOCAL (info, h)))
9317 {
9318 /* We have a relocation against a locally-binding STT_GNU_IFUNC
9319 symbol, and the relocation resolves directly to the runtime
9320 target rather than to the .iplt entry. This means that any
9321 .got entry would be the same value as the .igot.plt entry,
9322 so there's no point creating both. */
9323 sgot = globals->root.igotplt;
9324 value = sgot->output_offset + gotplt_offset;
9325 }
9326 else if (h != NULL)
252b5132
RH		 9327 {
9328 bfd_vma off;
f21f3fe0 9329
252b5132
RH		 9330 off = h->got.offset;
9331 BFD_ASSERT (off != (bfd_vma) -1);
b436d854 9332 if ((off & 1) != 0)
252b5132 9333 {
b436d854
RS		 9334 /* We have already processsed one GOT relocation against
9335 this symbol. */
9336 off &= ~1;
9337 if (globals->root.dynamic_sections_created
9338 && !SYMBOL_REFERENCES_LOCAL (info, h))
9339 *unresolved_reloc_p = FALSE;
9340 }
9341 else
9342 {
9343 Elf_Internal_Rela outrel;
9344
6f820c85 9345 if (h->dynindx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 9346 {
9347 /* If the symbol doesn't resolve locally in a static
9348 object, we have an undefined reference. If the
9349 symbol doesn't resolve locally in a dynamic object,
9350 it should be resolved by the dynamic linker. */
9351 if (globals->root.dynamic_sections_created)
9352 {
9353 outrel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9354 *unresolved_reloc_p = FALSE;
9355 }
9356 else
9357 outrel.r_info = 0;
9358 outrel.r_addend = 0;
9359 }
252b5132
RH		 9360 else
9361 {
34e77a92 9362 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9363 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
31943882
WN		 9364 else if (info->shared &&
9365 (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9366 || h->root.type != bfd_link_hash_undefweak))
99059e56
RM		 9367 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
9368 else
9369 outrel.r_info = 0;
34e77a92 9370 outrel.r_addend = dynreloc_value;
b436d854 9371 }
ee29b9fb 9372
b436d854
RS		 9373 /* The GOT entry is initialized to zero by default.
9374 See if we should install a different value. */
9375 if (outrel.r_addend != 0
9376 && (outrel.r_info == 0 || globals->use_rel))
9377 {
9378 bfd_put_32 (output_bfd, outrel.r_addend,
9379 sgot->contents + off);
9380 outrel.r_addend = 0;
252b5132 9381 }
f21f3fe0 9382
b436d854
RS		 9383 if (outrel.r_info != 0)
9384 {
9385 outrel.r_offset = (sgot->output_section->vma
9386 + sgot->output_offset
9387 + off);
9388 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
9389 }
9390 h->got.offset |= 1;
9391 }
252b5132
RH		 9392 value = sgot->output_offset + off;
9393 }
9394 else
9395 {
9396 bfd_vma off;
f21f3fe0 9397
252b5132
RH		 9398 BFD_ASSERT (local_got_offsets != NULL &&
9399 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 9400
252b5132 9401 off = local_got_offsets[r_symndx];
f21f3fe0 9402
252b5132
RH		 9403 /* The offset must always be a multiple of 4. We use the
9404 least significant bit to record whether we have already
9b485d32 9405 generated the necessary reloc. */
252b5132
RH		 9406 if ((off & 1) != 0)
9407 off &= ~1;
9408 else
9409 {
00a97672 9410 if (globals->use_rel)
34e77a92 9411 bfd_put_32 (output_bfd, dynreloc_value, sgot->contents + off);
f21f3fe0 9412
34e77a92 9413 if (info->shared || dynreloc_st_type == STT_GNU_IFUNC)
252b5132 9414 {
947216bf 9415 Elf_Internal_Rela outrel;
f21f3fe0 9416
34e77a92 9417 outrel.r_addend = addend + dynreloc_value;
252b5132 9418 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 9419 + sgot->output_offset
252b5132 9420 + off);
34e77a92 9421 if (dynreloc_st_type == STT_GNU_IFUNC)
99059e56 9422 outrel.r_info = ELF32_R_INFO (0, R_ARM_IRELATIVE);
34e77a92
RS		 9423 else
9424 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
47beaa6a 9425 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
252b5132 9426 }
f21f3fe0 9427
252b5132
RH		 9428 local_got_offsets[r_symndx] |= 1;
9429 }
f21f3fe0 9430
252b5132
RH		 9431 value = sgot->output_offset + off;
9432 }
eb043451
PB		 9433 if (r_type != R_ARM_GOT32)
9434 value += sgot->output_section->vma;
9a5aca8c 9435
f21f3fe0 9436 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 9437 contents, rel->r_offset, value,
00a97672 9438 rel->r_addend);
f21f3fe0 9439
ba93b8ac
DJ		 9440 case R_ARM_TLS_LDO32:
9441 value = value - dtpoff_base (info);
9442
9443 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9444 contents, rel->r_offset, value,
9445 rel->r_addend);
ba93b8ac
DJ		 9446
9447 case R_ARM_TLS_LDM32:
9448 {
9449 bfd_vma off;
9450
362d30a1 9451 if (sgot == NULL)
ba93b8ac
DJ		 9452 abort ();
9453
9454 off = globals->tls_ldm_got.offset;
9455
9456 if ((off & 1) != 0)
9457 off &= ~1;
9458 else
9459 {
9460 /* If we don't know the module number, create a relocation
9461 for it. */
9462 if (info->shared)
9463 {
9464 Elf_Internal_Rela outrel;
ba93b8ac 9465
362d30a1 9466 if (srelgot == NULL)
ba93b8ac
DJ		 9467 abort ();
9468
00a97672 9469 outrel.r_addend = 0;
362d30a1
RS		 9470 outrel.r_offset = (sgot->output_section->vma
9471 + sgot->output_offset + off);
ba93b8ac
DJ		 9472 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
9473
00a97672
RS		 9474 if (globals->use_rel)
9475 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9476 sgot->contents + off);
ba93b8ac 9477
47beaa6a 9478 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9479 }
9480 else
362d30a1 9481 bfd_put_32 (output_bfd, 1, sgot->contents + off);
ba93b8ac
DJ		 9482
9483 globals->tls_ldm_got.offset |= 1;
9484 }
9485
362d30a1 9486 value = sgot->output_section->vma + sgot->output_offset + off
ba93b8ac
DJ		 9487 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
9488
9489 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9490 contents, rel->r_offset, value,
00a97672 9491 rel->r_addend);
ba93b8ac
DJ		 9492 }
9493
0855e32b
NS		 9494 case R_ARM_TLS_CALL:
9495 case R_ARM_THM_TLS_CALL:
ba93b8ac
DJ		 9496 case R_ARM_TLS_GD32:
9497 case R_ARM_TLS_IE32:
0855e32b
NS		 9498 case R_ARM_TLS_GOTDESC:
9499 case R_ARM_TLS_DESCSEQ:
9500 case R_ARM_THM_TLS_DESCSEQ:
ba93b8ac 9501 {
0855e32b
NS		 9502 bfd_vma off, offplt;
9503 int indx = 0;
ba93b8ac
DJ		 9504 char tls_type;
9505
0855e32b 9506 BFD_ASSERT (sgot != NULL);
ba93b8ac 9507
ba93b8ac
DJ		 9508 if (h != NULL)
9509 {
9510 bfd_boolean dyn;
9511 dyn = globals->root.dynamic_sections_created;
9512 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
9513 && (!info->shared
9514 || !SYMBOL_REFERENCES_LOCAL (info, h)))
9515 {
9516 *unresolved_reloc_p = FALSE;
9517 indx = h->dynindx;
9518 }
9519 off = h->got.offset;
0855e32b 9520 offplt = elf32_arm_hash_entry (h)->tlsdesc_got;
ba93b8ac
DJ		 9521 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
9522 }
9523 else
9524 {
0855e32b 9525 BFD_ASSERT (local_got_offsets != NULL);
ba93b8ac 9526 off = local_got_offsets[r_symndx];
0855e32b 9527 offplt = local_tlsdesc_gotents[r_symndx];
ba93b8ac
DJ		 9528 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
9529 }
9530
0855e32b 9531 /* Linker relaxations happens from one of the
b38cadfb 9532 R_ARM_{GOTDESC,CALL,DESCSEQ} relocations to IE or LE. */
0855e32b 9533 if (ELF32_R_TYPE(rel->r_info) != r_type)
b38cadfb 9534 tls_type = GOT_TLS_IE;
0855e32b
NS		 9535
9536 BFD_ASSERT (tls_type != GOT_UNKNOWN);
ba93b8ac
DJ		 9537
9538 if ((off & 1) != 0)
9539 off &= ~1;
9540 else
9541 {
9542 bfd_boolean need_relocs = FALSE;
9543 Elf_Internal_Rela outrel;
ba93b8ac
DJ		 9544 int cur_off = off;
9545
9546 /* The GOT entries have not been initialized yet. Do it
9547 now, and emit any relocations. If both an IE GOT and a
9548 GD GOT are necessary, we emit the GD first. */
9549
9550 if ((info->shared || indx != 0)
9551 && (h == NULL
9552 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
9553 || h->root.type != bfd_link_hash_undefweak))
9554 {
9555 need_relocs = TRUE;
0855e32b 9556 BFD_ASSERT (srelgot != NULL);
ba93b8ac
DJ		 9557 }
9558
0855e32b
NS		 9559 if (tls_type & GOT_TLS_GDESC)
9560 {
47beaa6a
RS		 9561 bfd_byte *loc;
9562
0855e32b
NS		 9563 /* We should have relaxed, unless this is an undefined
9564 weak symbol. */
9565 BFD_ASSERT ((h && (h->root.type == bfd_link_hash_undefweak))
9566 || info->shared);
9567 BFD_ASSERT (globals->sgotplt_jump_table_size + offplt + 8
99059e56 9568 <= globals->root.sgotplt->size);
0855e32b
NS		 9569
9570 outrel.r_addend = 0;
9571 outrel.r_offset = (globals->root.sgotplt->output_section->vma
9572 + globals->root.sgotplt->output_offset
9573 + offplt
9574 + globals->sgotplt_jump_table_size);
b38cadfb 9575
0855e32b
NS		 9576 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DESC);
9577 sreloc = globals->root.srelplt;
9578 loc = sreloc->contents;
9579 loc += globals->next_tls_desc_index++ * RELOC_SIZE (globals);
9580 BFD_ASSERT (loc + RELOC_SIZE (globals)
99059e56 9581 <= sreloc->contents + sreloc->size);
0855e32b
NS		 9582
9583 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9584
9585 /* For globals, the first word in the relocation gets
9586 the relocation index and the top bit set, or zero,
9587 if we're binding now. For locals, it gets the
9588 symbol's offset in the tls section. */
99059e56 9589 bfd_put_32 (output_bfd,
0855e32b
NS		 9590 !h ? value - elf_hash_table (info)->tls_sec->vma
9591 : info->flags & DF_BIND_NOW ? 0
9592 : 0x80000000 | ELF32_R_SYM (outrel.r_info),
b38cadfb
NC		 9593 globals->root.sgotplt->contents + offplt
9594 + globals->sgotplt_jump_table_size);
9595
0855e32b 9596 /* Second word in the relocation is always zero. */
99059e56 9597 bfd_put_32 (output_bfd, 0,
b38cadfb
NC		 9598 globals->root.sgotplt->contents + offplt
9599 + globals->sgotplt_jump_table_size + 4);
0855e32b 9600 }
ba93b8ac
DJ		 9601 if (tls_type & GOT_TLS_GD)
9602 {
9603 if (need_relocs)
9604 {
00a97672 9605 outrel.r_addend = 0;
362d30a1
RS		 9606 outrel.r_offset = (sgot->output_section->vma
9607 + sgot->output_offset
00a97672 9608 + cur_off);
ba93b8ac 9609 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 9610
00a97672
RS		 9611 if (globals->use_rel)
9612 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9613 sgot->contents + cur_off);
00a97672 9614
47beaa6a 9615 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9616
9617 if (indx == 0)
9618 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9619 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9620 else
9621 {
00a97672 9622 outrel.r_addend = 0;
ba93b8ac
DJ		 9623 outrel.r_info = ELF32_R_INFO (indx,
9624 R_ARM_TLS_DTPOFF32);
9625 outrel.r_offset += 4;
00a97672
RS		 9626
9627 if (globals->use_rel)
9628 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9629 sgot->contents + cur_off + 4);
00a97672 9630
47beaa6a
RS		 9631 elf32_arm_add_dynreloc (output_bfd, info,
9632 srelgot, &outrel);
ba93b8ac
DJ		 9633 }
9634 }
9635 else
9636 {
9637 /* If we are not emitting relocations for a
9638 general dynamic reference, then we must be in a
9639 static link or an executable link with the
9640 symbol binding locally. Mark it as belonging
9641 to module 1, the executable. */
9642 bfd_put_32 (output_bfd, 1,
362d30a1 9643 sgot->contents + cur_off);
ba93b8ac 9644 bfd_put_32 (output_bfd, value - dtpoff_base (info),
362d30a1 9645 sgot->contents + cur_off + 4);
ba93b8ac
DJ		 9646 }
9647
9648 cur_off += 8;
9649 }
9650
9651 if (tls_type & GOT_TLS_IE)
9652 {
9653 if (need_relocs)
9654 {
00a97672
RS		 9655 if (indx == 0)
9656 outrel.r_addend = value - dtpoff_base (info);
9657 else
9658 outrel.r_addend = 0;
362d30a1
RS		 9659 outrel.r_offset = (sgot->output_section->vma
9660 + sgot->output_offset
ba93b8ac
DJ		 9661 + cur_off);
9662 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
9663
00a97672
RS		 9664 if (globals->use_rel)
9665 bfd_put_32 (output_bfd, outrel.r_addend,
362d30a1 9666 sgot->contents + cur_off);
ba93b8ac 9667
47beaa6a 9668 elf32_arm_add_dynreloc (output_bfd, info, srelgot, &outrel);
ba93b8ac
DJ		 9669 }
9670 else
9671 bfd_put_32 (output_bfd, tpoff (info, value),
362d30a1 9672 sgot->contents + cur_off);
ba93b8ac
DJ		 9673 cur_off += 4;
9674 }
9675
9676 if (h != NULL)
9677 h->got.offset |= 1;
9678 else
9679 local_got_offsets[r_symndx] |= 1;
9680 }
9681
9682 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
9683 off += 8;
0855e32b
NS		 9684 else if (tls_type & GOT_TLS_GDESC)
9685 off = offplt;
9686
9687 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL
9688 || ELF32_R_TYPE(rel->r_info) == R_ARM_THM_TLS_CALL)
9689 {
9690 bfd_signed_vma offset;
12352d3f
PB		 9691 /* TLS stubs are arm mode. The original symbol is a
9692 data object, so branch_type is bogus. */
9693 branch_type = ST_BRANCH_TO_ARM;
0855e32b 9694 enum elf32_arm_stub_type stub_type
34e77a92
RS		 9695 = arm_type_of_stub (info, input_section, rel,
9696 st_type, &branch_type,
0855e32b
NS		 9697 (struct elf32_arm_link_hash_entry *)h,
9698 globals->tls_trampoline, globals->root.splt,
9699 input_bfd, sym_name);
9700
9701 if (stub_type != arm_stub_none)
9702 {
9703 struct elf32_arm_stub_hash_entry *stub_entry
9704 = elf32_arm_get_stub_entry
9705 (input_section, globals->root.splt, 0, rel,
9706 globals, stub_type);
9707 offset = (stub_entry->stub_offset
9708 + stub_entry->stub_sec->output_offset
9709 + stub_entry->stub_sec->output_section->vma);
9710 }
9711 else
9712 offset = (globals->root.splt->output_section->vma
9713 + globals->root.splt->output_offset
9714 + globals->tls_trampoline);
9715
9716 if (ELF32_R_TYPE(rel->r_info) == R_ARM_TLS_CALL)
9717 {
9718 unsigned long inst;
b38cadfb
NC		 9719
9720 offset -= (input_section->output_section->vma
9721 + input_section->output_offset
9722 + rel->r_offset + 8);
0855e32b
NS		 9723
9724 inst = offset >> 2;
9725 inst &= 0x00ffffff;
9726 value = inst | (globals->use_blx ? 0xfa000000 : 0xeb000000);
9727 }
9728 else
9729 {
9730 /* Thumb blx encodes the offset in a complicated
9731 fashion. */
9732 unsigned upper_insn, lower_insn;
9733 unsigned neg;
9734
b38cadfb
NC		 9735 offset -= (input_section->output_section->vma
9736 + input_section->output_offset
0855e32b 9737 + rel->r_offset + 4);
b38cadfb 9738
12352d3f
PB		 9739 if (stub_type != arm_stub_none
9740 && arm_stub_is_thumb (stub_type))
9741 {
9742 lower_insn = 0xd000;
9743 }
9744 else
9745 {
9746 lower_insn = 0xc000;
6a631e86 9747 /* Round up the offset to a word boundary. */
12352d3f
PB		 9748 offset = (offset + 2) & ~2;
9749 }
9750
0855e32b
NS		 9751 neg = offset < 0;
9752 upper_insn = (0xf000
9753 | ((offset >> 12) & 0x3ff)
9754 | (neg << 10));
12352d3f 9755 lower_insn |= (((!((offset >> 23) & 1)) ^ neg) << 13)
0855e32b 9756 | (((!((offset >> 22) & 1)) ^ neg) << 11)
12352d3f 9757 | ((offset >> 1) & 0x7ff);
0855e32b
NS		 9758 bfd_put_16 (input_bfd, upper_insn, hit_data);
9759 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
9760 return bfd_reloc_ok;
9761 }
9762 }
9763 /* These relocations needs special care, as besides the fact
9764 they point somewhere in .gotplt, the addend must be
9765 adjusted accordingly depending on the type of instruction
6a631e86 9766 we refer to. */
0855e32b
NS		 9767 else if ((r_type == R_ARM_TLS_GOTDESC) && (tls_type & GOT_TLS_GDESC))
9768 {
9769 unsigned long data, insn;
9770 unsigned thumb;
b38cadfb 9771
0855e32b
NS		 9772 data = bfd_get_32 (input_bfd, hit_data);
9773 thumb = data & 1;
9774 data &= ~1u;
b38cadfb 9775
0855e32b
NS		 9776 if (thumb)
9777 {
9778 insn = bfd_get_16 (input_bfd, contents + rel->r_offset - data);
9779 if ((insn & 0xf000) == 0xf000 || (insn & 0xf800) == 0xe800)
9780 insn = (insn << 16)
9781 | bfd_get_16 (input_bfd,
9782 contents + rel->r_offset - data + 2);
9783 if ((insn & 0xf800c000) == 0xf000c000)
9784 /* bl/blx */
9785 value = -6;
9786 else if ((insn & 0xffffff00) == 0x4400)
9787 /* add */
9788 value = -5;
9789 else
9790 {
9791 (*_bfd_error_handler)
9792 (_("%B(%A+0x%lx):unexpected Thumb instruction '0x%x' referenced by TLS_GOTDESC"),
9793 input_bfd, input_section,
9794 (unsigned long)rel->r_offset, insn);
9795 return bfd_reloc_notsupported;
9796 }
9797 }
9798 else
9799 {
9800 insn = bfd_get_32 (input_bfd, contents + rel->r_offset - data);
9801
9802 switch (insn >> 24)
9803 {
9804 case 0xeb: /* bl */
9805 case 0xfa: /* blx */
9806 value = -4;
9807 break;
9808
9809 case 0xe0: /* add */
9810 value = -8;
9811 break;
b38cadfb 9812
0855e32b
NS		 9813 default:
9814 (*_bfd_error_handler)
9815 (_("%B(%A+0x%lx):unexpected ARM instruction '0x%x' referenced by TLS_GOTDESC"),
9816 input_bfd, input_section,
9817 (unsigned long)rel->r_offset, insn);
9818 return bfd_reloc_notsupported;
9819 }
9820 }
b38cadfb 9821
0855e32b
NS		 9822 value += ((globals->root.sgotplt->output_section->vma
9823 + globals->root.sgotplt->output_offset + off)
9824 - (input_section->output_section->vma
9825 + input_section->output_offset
9826 + rel->r_offset)
9827 + globals->sgotplt_jump_table_size);
9828 }
9829 else
9830 value = ((globals->root.sgot->output_section->vma
9831 + globals->root.sgot->output_offset + off)
9832 - (input_section->output_section->vma
9833 + input_section->output_offset + rel->r_offset));
ba93b8ac
DJ		 9834
9835 return _bfd_final_link_relocate (howto, input_bfd, input_section,
9836 contents, rel->r_offset, value,
00a97672 9837 rel->r_addend);
ba93b8ac
DJ		 9838 }
9839
9840 case R_ARM_TLS_LE32:
9ec0c936 9841 if (info->shared && !info->pie)
ba93b8ac
DJ		 9842 {
9843 (*_bfd_error_handler)
9844 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
9845 input_bfd, input_section,
9846 (long) rel->r_offset, howto->name);
46691134 9847 return bfd_reloc_notsupported;
ba93b8ac
DJ		 9848 }
9849 else
9850 value = tpoff (info, value);
906e58ca 9851
ba93b8ac 9852 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 9853 contents, rel->r_offset, value,
9854 rel->r_addend);
ba93b8ac 9855
319850b4
JB		 9856 case R_ARM_V4BX:
9857 if (globals->fix_v4bx)
845b51d6
PB		 9858 {
9859 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 9860
845b51d6
PB		 9861 /* Ensure that we have a BX instruction. */
9862 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 9863
845b51d6
PB		 9864 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
9865 {
9866 /* Branch to veneer. */
9867 bfd_vma glue_addr;
9868 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
9869 glue_addr -= input_section->output_section->vma
9870 + input_section->output_offset
9871 + rel->r_offset + 8;
9872 insn = (insn & 0xf0000000) | 0x0a000000
9873 | ((glue_addr >> 2) & 0x00ffffff);
9874 }
9875 else
9876 {
9877 /* Preserve Rm (lowest four bits) and the condition code
9878 (highest four bits). Other bits encode MOV PC,Rm. */
9879 insn = (insn & 0xf000000f) | 0x01a0f000;
9880 }
319850b4 9881
845b51d6
PB		 9882 bfd_put_32 (input_bfd, insn, hit_data);
9883 }
319850b4
JB		 9884 return bfd_reloc_ok;
9885
b6895b4f
PB		 9886 case R_ARM_MOVW_ABS_NC:
9887 case R_ARM_MOVT_ABS:
9888 case R_ARM_MOVW_PREL_NC:
9889 case R_ARM_MOVT_PREL:
92f5d02b
MS		 9890 /* Until we properly support segment-base-relative addressing then
9891 we assume the segment base to be zero, as for the group relocations.
9892 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
9893 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
9894 case R_ARM_MOVW_BREL_NC:
9895 case R_ARM_MOVW_BREL:
9896 case R_ARM_MOVT_BREL:
b6895b4f
PB		 9897 {
9898 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
9899
9900 if (globals->use_rel)
9901 {
9902 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 9903 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9904 }
92f5d02b 9905
b6895b4f 9906 value += signed_addend;
b6895b4f
PB		 9907
9908 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
9909 value -= (input_section->output_section->vma
9910 + input_section->output_offset + rel->r_offset);
9911
92f5d02b 9912 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
99059e56 9913 return bfd_reloc_overflow;
92f5d02b 9914
35fc36a8 9915 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9916 value |= 1;
9917
9918 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
99059e56 9919 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 9920 value >>= 16;
9921
9922 insn &= 0xfff0f000;
9923 insn |= value & 0xfff;
9924 insn |= (value & 0xf000) << 4;
9925 bfd_put_32 (input_bfd, insn, hit_data);
9926 }
9927 return bfd_reloc_ok;
9928
9929 case R_ARM_THM_MOVW_ABS_NC:
9930 case R_ARM_THM_MOVT_ABS:
9931 case R_ARM_THM_MOVW_PREL_NC:
9932 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 9933 /* Until we properly support segment-base-relative addressing then
9934 we assume the segment base to be zero, as for the above relocations.
9935 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
9936 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
9937 as R_ARM_THM_MOVT_ABS. */
9938 case R_ARM_THM_MOVW_BREL_NC:
9939 case R_ARM_THM_MOVW_BREL:
9940 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 9941 {
9942 bfd_vma insn;
906e58ca 9943
b6895b4f
PB		 9944 insn = bfd_get_16 (input_bfd, hit_data) << 16;
9945 insn |= bfd_get_16 (input_bfd, hit_data + 2);
9946
9947 if (globals->use_rel)
9948 {
9949 addend = ((insn >> 4) & 0xf000)
9950 | ((insn >> 15) & 0x0800)
9951 | ((insn >> 4) & 0x0700)
9952 | (insn & 0x00ff);
39623e12 9953 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 9954 }
92f5d02b 9955
b6895b4f 9956 value += signed_addend;
b6895b4f
PB		 9957
9958 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
9959 value -= (input_section->output_section->vma
9960 + input_section->output_offset + rel->r_offset);
9961
92f5d02b 9962 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
99059e56 9963 return bfd_reloc_overflow;
92f5d02b 9964
35fc36a8 9965 if (branch_type == ST_BRANCH_TO_THUMB)
92f5d02b
MS		 9966 value |= 1;
9967
9968 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
99059e56 9969 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 9970 value >>= 16;
9971
9972 insn &= 0xfbf08f00;
9973 insn |= (value & 0xf000) << 4;
9974 insn |= (value & 0x0800) << 15;
9975 insn |= (value & 0x0700) << 4;
9976 insn |= (value & 0x00ff);
9977
9978 bfd_put_16 (input_bfd, insn >> 16, hit_data);
9979 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
9980 }
9981 return bfd_reloc_ok;
9982
4962c51a
MS		 9983 case R_ARM_ALU_PC_G0_NC:
9984 case R_ARM_ALU_PC_G1_NC:
9985 case R_ARM_ALU_PC_G0:
9986 case R_ARM_ALU_PC_G1:
9987 case R_ARM_ALU_PC_G2:
9988 case R_ARM_ALU_SB_G0_NC:
9989 case R_ARM_ALU_SB_G1_NC:
9990 case R_ARM_ALU_SB_G0:
9991 case R_ARM_ALU_SB_G1:
9992 case R_ARM_ALU_SB_G2:
9993 {
9994 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 9995 bfd_vma pc = input_section->output_section->vma
4962c51a 9996 + input_section->output_offset + rel->r_offset;
31a91d61 9997 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 9998 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56
RM		 9999 bfd_vma residual;
10000 bfd_vma g_n;
4962c51a 10001 bfd_signed_vma signed_value;
99059e56
RM		 10002 int group = 0;
10003
10004 /* Determine which group of bits to select. */
10005 switch (r_type)
10006 {
10007 case R_ARM_ALU_PC_G0_NC:
10008 case R_ARM_ALU_PC_G0:
10009 case R_ARM_ALU_SB_G0_NC:
10010 case R_ARM_ALU_SB_G0:
10011 group = 0;
10012 break;
10013
10014 case R_ARM_ALU_PC_G1_NC:
10015 case R_ARM_ALU_PC_G1:
10016 case R_ARM_ALU_SB_G1_NC:
10017 case R_ARM_ALU_SB_G1:
10018 group = 1;
10019 break;
10020
10021 case R_ARM_ALU_PC_G2:
10022 case R_ARM_ALU_SB_G2:
10023 group = 2;
10024 break;
10025
10026 default:
10027 abort ();
10028 }
10029
10030 /* If REL, extract the addend from the insn. If RELA, it will
10031 have already been fetched for us. */
4962c51a 10032 if (globals->use_rel)
99059e56
RM		 10033 {
10034 int negative;
10035 bfd_vma constant = insn & 0xff;
10036 bfd_vma rotation = (insn & 0xf00) >> 8;
10037
10038 if (rotation == 0)
10039 signed_addend = constant;
10040 else
10041 {
10042 /* Compensate for the fact that in the instruction, the
10043 rotation is stored in multiples of 2 bits. */
10044 rotation *= 2;
10045
10046 /* Rotate "constant" right by "rotation" bits. */
10047 signed_addend = (constant >> rotation) |
10048 (constant << (8 * sizeof (bfd_vma) - rotation));
10049 }
10050
10051 /* Determine if the instruction is an ADD or a SUB.
10052 (For REL, this determines the sign of the addend.) */
10053 negative = identify_add_or_sub (insn);
10054 if (negative == 0)
10055 {
10056 (*_bfd_error_handler)
10057 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
10058 input_bfd, input_section,
10059 (long) rel->r_offset, howto->name);
10060 return bfd_reloc_overflow;
10061 }
10062
10063 signed_addend *= negative;
10064 }
4962c51a
MS		 10065
10066 /* Compute the value (X) to go in the place. */
99059e56
RM		 10067 if (r_type == R_ARM_ALU_PC_G0_NC
10068 || r_type == R_ARM_ALU_PC_G1_NC
10069 || r_type == R_ARM_ALU_PC_G0
10070 || r_type == R_ARM_ALU_PC_G1
10071 || r_type == R_ARM_ALU_PC_G2)
10072 /* PC relative. */
10073 signed_value = value - pc + signed_addend;
10074 else
10075 /* Section base relative. */
10076 signed_value = value - sb + signed_addend;
10077
10078 /* If the target symbol is a Thumb function, then set the
10079 Thumb bit in the address. */
35fc36a8 10080 if (branch_type == ST_BRANCH_TO_THUMB)
4962c51a
MS		 10081 signed_value |= 1;
10082
99059e56
RM		 10083 /* Calculate the value of the relevant G_n, in encoded
10084 constant-with-rotation format. */
10085 g_n = calculate_group_reloc_mask (abs (signed_value), group,
10086 &residual);
10087
10088 /* Check for overflow if required. */
10089 if ((r_type == R_ARM_ALU_PC_G0
10090 || r_type == R_ARM_ALU_PC_G1
10091 || r_type == R_ARM_ALU_PC_G2
10092 || r_type == R_ARM_ALU_SB_G0
10093 || r_type == R_ARM_ALU_SB_G1
10094 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
10095 {
10096 (*_bfd_error_handler)
10097 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10098 input_bfd, input_section,
10099 (long) rel->r_offset, abs (signed_value), howto->name);
10100 return bfd_reloc_overflow;
10101 }
10102
10103 /* Mask out the value and the ADD/SUB part of the opcode; take care
10104 not to destroy the S bit. */
10105 insn &= 0xff1ff000;
10106
10107 /* Set the opcode according to whether the value to go in the
10108 place is negative. */
10109 if (signed_value < 0)
10110 insn |= 1 << 22;
10111 else
10112 insn |= 1 << 23;
10113
10114 /* Encode the offset. */
10115 insn |= g_n;
4962c51a
MS		 10116
10117 bfd_put_32 (input_bfd, insn, hit_data);
10118 }
10119 return bfd_reloc_ok;
10120
10121 case R_ARM_LDR_PC_G0:
10122 case R_ARM_LDR_PC_G1:
10123 case R_ARM_LDR_PC_G2:
10124 case R_ARM_LDR_SB_G0:
10125 case R_ARM_LDR_SB_G1:
10126 case R_ARM_LDR_SB_G2:
10127 {
10128 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10129 bfd_vma pc = input_section->output_section->vma
4962c51a 10130 + input_section->output_offset + rel->r_offset;
31a91d61 10131 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10132 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10133 bfd_vma residual;
4962c51a 10134 bfd_signed_vma signed_value;
99059e56
RM		 10135 int group = 0;
10136
10137 /* Determine which groups of bits to calculate. */
10138 switch (r_type)
10139 {
10140 case R_ARM_LDR_PC_G0:
10141 case R_ARM_LDR_SB_G0:
10142 group = 0;
10143 break;
10144
10145 case R_ARM_LDR_PC_G1:
10146 case R_ARM_LDR_SB_G1:
10147 group = 1;
10148 break;
10149
10150 case R_ARM_LDR_PC_G2:
10151 case R_ARM_LDR_SB_G2:
10152 group = 2;
10153 break;
10154
10155 default:
10156 abort ();
10157 }
10158
10159 /* If REL, extract the addend from the insn. If RELA, it will
10160 have already been fetched for us. */
4962c51a 10161 if (globals->use_rel)
99059e56
RM		 10162 {
10163 int negative = (insn & (1 << 23)) ? 1 : -1;
10164 signed_addend = negative * (insn & 0xfff);
10165 }
4962c51a
MS		 10166
10167 /* Compute the value (X) to go in the place. */
99059e56
RM		 10168 if (r_type == R_ARM_LDR_PC_G0
10169 || r_type == R_ARM_LDR_PC_G1
10170 || r_type == R_ARM_LDR_PC_G2)
10171 /* PC relative. */
10172 signed_value = value - pc + signed_addend;
10173 else
10174 /* Section base relative. */
10175 signed_value = value - sb + signed_addend;
10176
10177 /* Calculate the value of the relevant G_{n-1} to obtain
10178 the residual at that stage. */
10179 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10180
10181 /* Check for overflow. */
10182 if (residual >= 0x1000)
10183 {
10184 (*_bfd_error_handler)
10185 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10186 input_bfd, input_section,
10187 (long) rel->r_offset, abs (signed_value), howto->name);
10188 return bfd_reloc_overflow;
10189 }
10190
10191 /* Mask out the value and U bit. */
10192 insn &= 0xff7ff000;
10193
10194 /* Set the U bit if the value to go in the place is non-negative. */
10195 if (signed_value >= 0)
10196 insn |= 1 << 23;
10197
10198 /* Encode the offset. */
10199 insn |= residual;
4962c51a
MS		 10200
10201 bfd_put_32 (input_bfd, insn, hit_data);
10202 }
10203 return bfd_reloc_ok;
10204
10205 case R_ARM_LDRS_PC_G0:
10206 case R_ARM_LDRS_PC_G1:
10207 case R_ARM_LDRS_PC_G2:
10208 case R_ARM_LDRS_SB_G0:
10209 case R_ARM_LDRS_SB_G1:
10210 case R_ARM_LDRS_SB_G2:
10211 {
10212 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10213 bfd_vma pc = input_section->output_section->vma
4962c51a 10214 + input_section->output_offset + rel->r_offset;
31a91d61 10215 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10216 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10217 bfd_vma residual;
4962c51a 10218 bfd_signed_vma signed_value;
99059e56
RM		 10219 int group = 0;
10220
10221 /* Determine which groups of bits to calculate. */
10222 switch (r_type)
10223 {
10224 case R_ARM_LDRS_PC_G0:
10225 case R_ARM_LDRS_SB_G0:
10226 group = 0;
10227 break;
10228
10229 case R_ARM_LDRS_PC_G1:
10230 case R_ARM_LDRS_SB_G1:
10231 group = 1;
10232 break;
10233
10234 case R_ARM_LDRS_PC_G2:
10235 case R_ARM_LDRS_SB_G2:
10236 group = 2;
10237 break;
10238
10239 default:
10240 abort ();
10241 }
10242
10243 /* If REL, extract the addend from the insn. If RELA, it will
10244 have already been fetched for us. */
4962c51a 10245 if (globals->use_rel)
99059e56
RM		 10246 {
10247 int negative = (insn & (1 << 23)) ? 1 : -1;
10248 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
10249 }
4962c51a
MS		 10250
10251 /* Compute the value (X) to go in the place. */
99059e56
RM		 10252 if (r_type == R_ARM_LDRS_PC_G0
10253 || r_type == R_ARM_LDRS_PC_G1
10254 || r_type == R_ARM_LDRS_PC_G2)
10255 /* PC relative. */
10256 signed_value = value - pc + signed_addend;
10257 else
10258 /* Section base relative. */
10259 signed_value = value - sb + signed_addend;
10260
10261 /* Calculate the value of the relevant G_{n-1} to obtain
10262 the residual at that stage. */
10263 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10264
10265 /* Check for overflow. */
10266 if (residual >= 0x100)
10267 {
10268 (*_bfd_error_handler)
10269 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10270 input_bfd, input_section,
10271 (long) rel->r_offset, abs (signed_value), howto->name);
10272 return bfd_reloc_overflow;
10273 }
10274
10275 /* Mask out the value and U bit. */
10276 insn &= 0xff7ff0f0;
10277
10278 /* Set the U bit if the value to go in the place is non-negative. */
10279 if (signed_value >= 0)
10280 insn |= 1 << 23;
10281
10282 /* Encode the offset. */
10283 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
4962c51a
MS		 10284
10285 bfd_put_32 (input_bfd, insn, hit_data);
10286 }
10287 return bfd_reloc_ok;
10288
10289 case R_ARM_LDC_PC_G0:
10290 case R_ARM_LDC_PC_G1:
10291 case R_ARM_LDC_PC_G2:
10292 case R_ARM_LDC_SB_G0:
10293 case R_ARM_LDC_SB_G1:
10294 case R_ARM_LDC_SB_G2:
10295 {
10296 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
99059e56 10297 bfd_vma pc = input_section->output_section->vma
4962c51a 10298 + input_section->output_offset + rel->r_offset;
31a91d61 10299 /* sb is the origin of the *segment* containing the symbol. */
62c34db3 10300 bfd_vma sb = sym_sec ? sym_sec->output_section->vma : 0;
99059e56 10301 bfd_vma residual;
4962c51a 10302 bfd_signed_vma signed_value;
99059e56
RM		 10303 int group = 0;
10304
10305 /* Determine which groups of bits to calculate. */
10306 switch (r_type)
10307 {
10308 case R_ARM_LDC_PC_G0:
10309 case R_ARM_LDC_SB_G0:
10310 group = 0;
10311 break;
10312
10313 case R_ARM_LDC_PC_G1:
10314 case R_ARM_LDC_SB_G1:
10315 group = 1;
10316 break;
10317
10318 case R_ARM_LDC_PC_G2:
10319 case R_ARM_LDC_SB_G2:
10320 group = 2;
10321 break;
10322
10323 default:
10324 abort ();
10325 }
10326
10327 /* If REL, extract the addend from the insn. If RELA, it will
10328 have already been fetched for us. */
4962c51a 10329 if (globals->use_rel)
99059e56
RM		 10330 {
10331 int negative = (insn & (1 << 23)) ? 1 : -1;
10332 signed_addend = negative * ((insn & 0xff) << 2);
10333 }
4962c51a
MS		 10334
10335 /* Compute the value (X) to go in the place. */
99059e56
RM		 10336 if (r_type == R_ARM_LDC_PC_G0
10337 || r_type == R_ARM_LDC_PC_G1
10338 || r_type == R_ARM_LDC_PC_G2)
10339 /* PC relative. */
10340 signed_value = value - pc + signed_addend;
10341 else
10342 /* Section base relative. */
10343 signed_value = value - sb + signed_addend;
10344
10345 /* Calculate the value of the relevant G_{n-1} to obtain
10346 the residual at that stage. */
10347 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
10348
10349 /* Check for overflow. (The absolute value to go in the place must be
10350 divisible by four and, after having been divided by four, must
10351 fit in eight bits.) */
10352 if ((residual & 0x3) != 0 || residual >= 0x400)
10353 {
10354 (*_bfd_error_handler)
10355 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
10356 input_bfd, input_section,
10357 (long) rel->r_offset, abs (signed_value), howto->name);
10358 return bfd_reloc_overflow;
10359 }
10360
10361 /* Mask out the value and U bit. */
10362 insn &= 0xff7fff00;
10363
10364 /* Set the U bit if the value to go in the place is non-negative. */
10365 if (signed_value >= 0)
10366 insn |= 1 << 23;
10367
10368 /* Encode the offset. */
10369 insn |= residual >> 2;
4962c51a
MS		 10370
10371 bfd_put_32 (input_bfd, insn, hit_data);
10372 }
10373 return bfd_reloc_ok;
10374
252b5132
RH		 10375 default:
10376 return bfd_reloc_notsupported;
10377 }
10378}
10379
98c1d4aa
NC		 10380/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
10381static void
57e8b36a
NC		 10382arm_add_to_rel (bfd * abfd,
10383 bfd_byte * address,
10384 reloc_howto_type * howto,
10385 bfd_signed_vma increment)
98c1d4aa 10386{
98c1d4aa
NC		 10387 bfd_signed_vma addend;
10388
bd97cb95
DJ		 10389 if (howto->type == R_ARM_THM_CALL
10390 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 10391 {
9a5aca8c
AM		 10392 int upper_insn, lower_insn;
10393 int upper, lower;
98c1d4aa 10394
9a5aca8c
AM		 10395 upper_insn = bfd_get_16 (abfd, address);
10396 lower_insn = bfd_get_16 (abfd, address + 2);
10397 upper = upper_insn & 0x7ff;
10398 lower = lower_insn & 0x7ff;
10399
10400 addend = (upper << 12) | (lower << 1);
ddda4409 10401 addend += increment;
9a5aca8c 10402 addend >>= 1;
98c1d4aa 10403
9a5aca8c
AM		 10404 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
10405 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
10406
dc810e39
AM		 10407 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
10408 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 10409 }
10410 else
10411 {
10412 bfd_vma contents;
10413
10414 contents = bfd_get_32 (abfd, address);
10415
10416 /* Get the (signed) value from the instruction. */
10417 addend = contents & howto->src_mask;
10418 if (addend & ((howto->src_mask + 1) >> 1))
10419 {
10420 bfd_signed_vma mask;
10421
10422 mask = -1;
10423 mask &= ~ howto->src_mask;
10424 addend |= mask;
10425 }
10426
10427 /* Add in the increment, (which is a byte value). */
10428 switch (howto->type)
10429 {
10430 default:
10431 addend += increment;
10432 break;
10433
10434 case R_ARM_PC24:
c6596c5e 10435 case R_ARM_PLT32:
5b5bb741
PB		 10436 case R_ARM_CALL:
10437 case R_ARM_JUMP24:
9a5aca8c 10438 addend <<= howto->size;
dc810e39 10439 addend += increment;
9a5aca8c
AM		 10440
10441 /* Should we check for overflow here ? */
10442
10443 /* Drop any undesired bits. */
10444 addend >>= howto->rightshift;
10445 break;
10446 }
10447
10448 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
10449
10450 bfd_put_32 (abfd, contents, address);
ddda4409 10451 }
98c1d4aa 10452}
252b5132 10453
ba93b8ac
DJ		 10454#define IS_ARM_TLS_RELOC(R_TYPE) \
10455 ((R_TYPE) == R_ARM_TLS_GD32 \
10456 || (R_TYPE) == R_ARM_TLS_LDO32 \
10457 || (R_TYPE) == R_ARM_TLS_LDM32 \
10458 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
10459 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
10460 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
10461 || (R_TYPE) == R_ARM_TLS_LE32 \
0855e32b
NS		 10462 || (R_TYPE) == R_ARM_TLS_IE32 \
10463 || IS_ARM_TLS_GNU_RELOC (R_TYPE))
10464
10465/* Specific set of relocations for the gnu tls dialect. */
10466#define IS_ARM_TLS_GNU_RELOC(R_TYPE) \
10467 ((R_TYPE) == R_ARM_TLS_GOTDESC \
10468 || (R_TYPE) == R_ARM_TLS_CALL \
10469 || (R_TYPE) == R_ARM_THM_TLS_CALL \
10470 || (R_TYPE) == R_ARM_TLS_DESCSEQ \
10471 || (R_TYPE) == R_ARM_THM_TLS_DESCSEQ)
ba93b8ac 10472
252b5132 10473/* Relocate an ARM ELF section. */
906e58ca 10474
b34976b6 10475static bfd_boolean
57e8b36a
NC		 10476elf32_arm_relocate_section (bfd * output_bfd,
10477 struct bfd_link_info * info,
10478 bfd * input_bfd,
10479 asection * input_section,
10480 bfd_byte * contents,
10481 Elf_Internal_Rela * relocs,
10482 Elf_Internal_Sym * local_syms,
10483 asection ** local_sections)
252b5132 10484{
b34976b6
AM		 10485 Elf_Internal_Shdr *symtab_hdr;
10486 struct elf_link_hash_entry **sym_hashes;
10487 Elf_Internal_Rela *rel;
10488 Elf_Internal_Rela *relend;
10489 const char *name;
b32d3aa2 10490 struct elf32_arm_link_hash_table * globals;
252b5132 10491
4e7fd91e 10492 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 10493 if (globals == NULL)
10494 return FALSE;
b491616a 10495
0ffa91dd 10496 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 10497 sym_hashes = elf_sym_hashes (input_bfd);
10498
10499 rel = relocs;
10500 relend = relocs + input_section->reloc_count;
10501 for (; rel < relend; rel++)
10502 {
ba96a88f
NC		 10503 int r_type;
10504 reloc_howto_type * howto;
10505 unsigned long r_symndx;
10506 Elf_Internal_Sym * sym;
10507 asection * sec;
252b5132 10508 struct elf_link_hash_entry * h;
ba96a88f
NC		 10509 bfd_vma relocation;
10510 bfd_reloc_status_type r;
10511 arelent bfd_reloc;
ba93b8ac 10512 char sym_type;
0945cdfd 10513 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 10514 char *error_message = NULL;
f21f3fe0 10515
252b5132 10516 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 10517 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 10518 r_type = arm_real_reloc_type (globals, r_type);
252b5132 10519
ba96a88f 10520 if ( r_type == R_ARM_GNU_VTENTRY
99059e56
RM		 10521 || r_type == R_ARM_GNU_VTINHERIT)
10522 continue;
252b5132 10523
b32d3aa2 10524 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 10525 howto = bfd_reloc.howto;
252b5132 10526
252b5132
RH		 10527 h = NULL;
10528 sym = NULL;
10529 sec = NULL;
9b485d32 10530
252b5132
RH		 10531 if (r_symndx < symtab_hdr->sh_info)
10532 {
10533 sym = local_syms + r_symndx;
ba93b8ac 10534 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 10535 sec = local_sections[r_symndx];
ffcb4889
NS		 10536
10537 /* An object file might have a reference to a local
10538 undefined symbol. This is a daft object file, but we
10539 should at least do something about it. V4BX & NONE
10540 relocations do not use the symbol and are explicitly
77b4f08f
TS		 10541 allowed to use the undefined symbol, so allow those.
10542 Likewise for relocations against STN_UNDEF. */
ffcb4889
NS		 10543 if (r_type != R_ARM_V4BX
10544 && r_type != R_ARM_NONE
77b4f08f 10545 && r_symndx != STN_UNDEF
ffcb4889
NS		 10546 && bfd_is_und_section (sec)
10547 && ELF_ST_BIND (sym->st_info) != STB_WEAK)
10548 {
10549 if (!info->callbacks->undefined_symbol
10550 (info, bfd_elf_string_from_elf_section
10551 (input_bfd, symtab_hdr->sh_link, sym->st_name),
10552 input_bfd, input_section,
10553 rel->r_offset, TRUE))
10554 return FALSE;
10555 }
b38cadfb 10556
4e7fd91e 10557 if (globals->use_rel)
f8df10f4 10558 {
4e7fd91e
PB		 10559 relocation = (sec->output_section->vma
10560 + sec->output_offset
10561 + sym->st_value);
ab96bf03
AM		 10562 if (!info->relocatable
10563 && (sec->flags & SEC_MERGE)
10564 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 10565 {
4e7fd91e
PB		 10566 asection *msec;
10567 bfd_vma addend, value;
10568
39623e12 10569 switch (r_type)
4e7fd91e 10570 {
39623e12
PB		 10571 case R_ARM_MOVW_ABS_NC:
10572 case R_ARM_MOVT_ABS:
10573 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10574 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
10575 addend = (addend ^ 0x8000) - 0x8000;
10576 break;
f8df10f4 10577
39623e12
PB		 10578 case R_ARM_THM_MOVW_ABS_NC:
10579 case R_ARM_THM_MOVT_ABS:
10580 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
10581 << 16;
10582 value |= bfd_get_16 (input_bfd,
10583 contents + rel->r_offset + 2);
10584 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
10585 | ((value & 0x04000000) >> 15);
10586 addend = (addend ^ 0x8000) - 0x8000;
10587 break;
f8df10f4 10588
39623e12
PB		 10589 default:
10590 if (howto->rightshift
10591 || (howto->src_mask & (howto->src_mask + 1)))
10592 {
10593 (*_bfd_error_handler)
10594 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
10595 input_bfd, input_section,
10596 (long) rel->r_offset, howto->name);
10597 return FALSE;
10598 }
10599
10600 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
10601
10602 /* Get the (signed) value from the instruction. */
10603 addend = value & howto->src_mask;
10604 if (addend & ((howto->src_mask + 1) >> 1))
10605 {
10606 bfd_signed_vma mask;
10607
10608 mask = -1;
10609 mask &= ~ howto->src_mask;
10610 addend |= mask;
10611 }
10612 break;
4e7fd91e 10613 }
39623e12 10614
4e7fd91e
PB		 10615 msec = sec;
10616 addend =
10617 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
10618 - relocation;
10619 addend += msec->output_section->vma + msec->output_offset;
39623e12 10620
cc643b88 10621 /* Cases here must match those in the preceding
39623e12
PB		 10622 switch statement. */
10623 switch (r_type)
10624 {
10625 case R_ARM_MOVW_ABS_NC:
10626 case R_ARM_MOVT_ABS:
10627 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
10628 | (addend & 0xfff);
10629 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10630 break;
10631
10632 case R_ARM_THM_MOVW_ABS_NC:
10633 case R_ARM_THM_MOVT_ABS:
10634 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
10635 | (addend & 0xff) | ((addend & 0x0800) << 15);
10636 bfd_put_16 (input_bfd, value >> 16,
10637 contents + rel->r_offset);
10638 bfd_put_16 (input_bfd, value,
10639 contents + rel->r_offset + 2);
10640 break;
10641
10642 default:
10643 value = (value & ~ howto->dst_mask)
10644 | (addend & howto->dst_mask);
10645 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
10646 break;
10647 }
f8df10f4 10648 }
f8df10f4 10649 }
4e7fd91e
PB		 10650 else
10651 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 10652 }
10653 else
10654 {
62d887d4 10655 bfd_boolean warned, ignored;
560e09e9 10656
b2a8e766
AM		 10657 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
10658 r_symndx, symtab_hdr, sym_hashes,
10659 h, sec, relocation,
62d887d4 10660 unresolved_reloc, warned, ignored);
ba93b8ac
DJ		 10661
10662 sym_type = h->type;
252b5132
RH		 10663 }
10664
dbaa2011 10665 if (sec != NULL && discarded_section (sec))
e4067dbb 10666 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 10667 rel, 1, relend, howto, 0, contents);
ab96bf03
AM		 10668
10669 if (info->relocatable)
10670 {
10671 /* This is a relocatable link. We don't have to change
10672 anything, unless the reloc is against a section symbol,
10673 in which case we have to adjust according to where the
10674 section symbol winds up in the output section. */
10675 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
10676 {
10677 if (globals->use_rel)
10678 arm_add_to_rel (input_bfd, contents + rel->r_offset,
10679 howto, (bfd_signed_vma) sec->output_offset);
10680 else
10681 rel->r_addend += sec->output_offset;
10682 }
10683 continue;
10684 }
10685
252b5132
RH		 10686 if (h != NULL)
10687 name = h->root.root.string;
10688 else
10689 {
10690 name = (bfd_elf_string_from_elf_section
10691 (input_bfd, symtab_hdr->sh_link, sym->st_name));
10692 if (name == NULL || *name == '\0')
10693 name = bfd_section_name (input_bfd, sec);
10694 }
f21f3fe0 10695
cf35638d 10696 if (r_symndx != STN_UNDEF
ba93b8ac
DJ		 10697 && r_type != R_ARM_NONE
10698 && (h == NULL
10699 || h->root.type == bfd_link_hash_defined
10700 || h->root.type == bfd_link_hash_defweak)
10701 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
10702 {
10703 (*_bfd_error_handler)
10704 ((sym_type == STT_TLS
10705 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
10706 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
10707 input_bfd,
10708 input_section,
10709 (long) rel->r_offset,
10710 howto->name,
10711 name);
10712 }
10713
0855e32b 10714 /* We call elf32_arm_final_link_relocate unless we're completely
99059e56
RM		 10715 done, i.e., the relaxation produced the final output we want,
10716 and we won't let anybody mess with it. Also, we have to do
10717 addend adjustments in case of a R_ARM_TLS_GOTDESC relocation
6a631e86 10718 both in relaxed and non-relaxed cases. */
0855e32b
NS		 10719 if ((elf32_arm_tls_transition (info, r_type, h) != (unsigned)r_type)
10720 || (IS_ARM_TLS_GNU_RELOC (r_type)
b38cadfb 10721 && !((h ? elf32_arm_hash_entry (h)->tls_type :
0855e32b
NS		 10722 elf32_arm_local_got_tls_type (input_bfd)[r_symndx])
10723 & GOT_TLS_GDESC)))
10724 {
10725 r = elf32_arm_tls_relax (globals, input_bfd, input_section,
10726 contents, rel, h == NULL);
10727 /* This may have been marked unresolved because it came from
10728 a shared library. But we've just dealt with that. */
10729 unresolved_reloc = 0;
10730 }
10731 else
10732 r = bfd_reloc_continue;
b38cadfb 10733
0855e32b
NS		 10734 if (r == bfd_reloc_continue)
10735 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
10736 input_section, contents, rel,
34e77a92 10737 relocation, info, sec, name, sym_type,
35fc36a8
RS		 10738 (h ? h->target_internal
10739 : ARM_SYM_BRANCH_TYPE (sym)), h,
0855e32b 10740 &unresolved_reloc, &error_message);
0945cdfd
DJ		 10741
10742 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
10743 because such sections are not SEC_ALLOC and thus ld.so will
10744 not process them. */
10745 if (unresolved_reloc
99059e56
RM		 10746 && !((input_section->flags & SEC_DEBUGGING) != 0
10747 && h->def_dynamic)
1d5316ab
AM		 10748 && _bfd_elf_section_offset (output_bfd, info, input_section,
10749 rel->r_offset) != (bfd_vma) -1)
0945cdfd
DJ		 10750 {
10751 (*_bfd_error_handler)
843fe662
L		 10752 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
10753 input_bfd,
10754 input_section,
10755 (long) rel->r_offset,
10756 howto->name,
10757 h->root.root.string);
0945cdfd
DJ		 10758 return FALSE;
10759 }
252b5132
RH		 10760
10761 if (r != bfd_reloc_ok)
10762 {
252b5132
RH		 10763 switch (r)
10764 {
10765 case bfd_reloc_overflow:
cf919dfd
PB		 10766 /* If the overflowing reloc was to an undefined symbol,
10767 we have already printed one error message and there
10768 is no point complaining again. */
10769 if ((! h ||
10770 h->root.type != bfd_link_hash_undefined)
10771 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 10772 (info, (h ? &h->root : NULL), name, howto->name,
10773 (bfd_vma) 0, input_bfd, input_section,
10774 rel->r_offset))))
b34976b6 10775 return FALSE;
252b5132
RH		 10776 break;
10777
10778 case bfd_reloc_undefined:
10779 if (!((*info->callbacks->undefined_symbol)
10780 (info, name, input_bfd, input_section,
b34976b6
AM		 10781 rel->r_offset, TRUE)))
10782 return FALSE;
252b5132
RH		 10783 break;
10784
10785 case bfd_reloc_outofrange:
f2a9dd69 10786 error_message = _("out of range");
252b5132
RH		 10787 goto common_error;
10788
10789 case bfd_reloc_notsupported:
f2a9dd69 10790 error_message = _("unsupported relocation");
252b5132
RH		 10791 goto common_error;
10792
10793 case bfd_reloc_dangerous:
f2a9dd69 10794 /* error_message should already be set. */
252b5132
RH		 10795 goto common_error;
10796
10797 default:
f2a9dd69 10798 error_message = _("unknown error");
8029a119 10799 /* Fall through. */
252b5132
RH		 10800
10801 common_error:
f2a9dd69
DJ		 10802 BFD_ASSERT (error_message != NULL);
10803 if (!((*info->callbacks->reloc_dangerous)
10804 (info, error_message, input_bfd, input_section,
252b5132 10805 rel->r_offset)))
b34976b6 10806 return FALSE;
252b5132
RH		 10807 break;
10808 }
10809 }
10810 }
10811
b34976b6 10812 return TRUE;
252b5132
RH		 10813}
10814
91d6fa6a 10815/* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero,
2468f9c9 10816 adds the edit to the start of the list. (The list must be built in order of
91d6fa6a 10817 ascending TINDEX: the function's callers are primarily responsible for
2468f9c9
PB		 10818 maintaining that condition). */
10819
10820static void
10821add_unwind_table_edit (arm_unwind_table_edit **head,
10822 arm_unwind_table_edit **tail,
10823 arm_unwind_edit_type type,
10824 asection *linked_section,
91d6fa6a 10825 unsigned int tindex)
2468f9c9 10826{
21d799b5
NC		 10827 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *)
10828 xmalloc (sizeof (arm_unwind_table_edit));
b38cadfb 10829
2468f9c9
PB		 10830 new_edit->type = type;
10831 new_edit->linked_section = linked_section;
91d6fa6a 10832 new_edit->index = tindex;
b38cadfb 10833
91d6fa6a 10834 if (tindex > 0)
2468f9c9
PB		 10835 {
10836 new_edit->next = NULL;
10837
10838 if (*tail)
10839 (*tail)->next = new_edit;
10840
10841 (*tail) = new_edit;
10842
10843 if (!*head)
10844 (*head) = new_edit;
10845 }
10846 else
10847 {
10848 new_edit->next = *head;
10849
10850 if (!*tail)
10851 *tail = new_edit;
10852
10853 *head = new_edit;
10854 }
10855}
10856
10857static _arm_elf_section_data *get_arm_elf_section_data (asection *);
10858
10859/* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */
10860static void
10861adjust_exidx_size(asection *exidx_sec, int adjust)
10862{
10863 asection *out_sec;
10864
10865 if (!exidx_sec->rawsize)
10866 exidx_sec->rawsize = exidx_sec->size;
10867
10868 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust);
10869 out_sec = exidx_sec->output_section;
10870 /* Adjust size of output section. */
10871 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust);
10872}
10873
10874/* Insert an EXIDX_CANTUNWIND marker at the end of a section. */
10875static void
10876insert_cantunwind_after(asection *text_sec, asection *exidx_sec)
10877{
10878 struct _arm_elf_section_data *exidx_arm_data;
10879
10880 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10881 add_unwind_table_edit (
10882 &exidx_arm_data->u.exidx.unwind_edit_list,
10883 &exidx_arm_data->u.exidx.unwind_edit_tail,
10884 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX);
10885
10886 adjust_exidx_size(exidx_sec, 8);
10887}
10888
10889/* Scan .ARM.exidx tables, and create a list describing edits which should be
10890 made to those tables, such that:
b38cadfb 10891
2468f9c9
PB		 10892 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries.
10893 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind
99059e56 10894 codes which have been inlined into the index).
2468f9c9 10895
85fdf906
AH		 10896 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged.
10897
2468f9c9 10898 The edits are applied when the tables are written
b38cadfb 10899 (in elf32_arm_write_section). */
2468f9c9
PB		 10900
10901bfd_boolean
10902elf32_arm_fix_exidx_coverage (asection **text_section_order,
10903 unsigned int num_text_sections,
85fdf906
AH		 10904 struct bfd_link_info *info,
10905 bfd_boolean merge_exidx_entries)
2468f9c9
PB		 10906{
10907 bfd *inp;
10908 unsigned int last_second_word = 0, i;
10909 asection *last_exidx_sec = NULL;
10910 asection *last_text_sec = NULL;
10911 int last_unwind_type = -1;
10912
10913 /* Walk over all EXIDX sections, and create backlinks from the corrsponding
10914 text sections. */
c72f2fb2 10915 for (inp = info->input_bfds; inp != NULL; inp = inp->link.next)
2468f9c9
PB		 10916 {
10917 asection *sec;
b38cadfb 10918
2468f9c9 10919 for (sec = inp->sections; sec != NULL; sec = sec->next)
99059e56 10920 {
2468f9c9
PB		 10921 struct bfd_elf_section_data *elf_sec = elf_section_data (sec);
10922 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr;
b38cadfb 10923
dec9d5df 10924 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX)
2468f9c9 10925 continue;
b38cadfb 10926
2468f9c9
PB		 10927 if (elf_sec->linked_to)
10928 {
10929 Elf_Internal_Shdr *linked_hdr
99059e56 10930 = &elf_section_data (elf_sec->linked_to)->this_hdr;
2468f9c9 10931 struct _arm_elf_section_data *linked_sec_arm_data
99059e56 10932 = get_arm_elf_section_data (linked_hdr->bfd_section);
2468f9c9
PB		 10933
10934 if (linked_sec_arm_data == NULL)
99059e56 10935 continue;
2468f9c9
PB		 10936
10937 /* Link this .ARM.exidx section back from the text section it
99059e56 10938 describes. */
2468f9c9
PB		 10939 linked_sec_arm_data->u.text.arm_exidx_sec = sec;
10940 }
10941 }
10942 }
10943
10944 /* Walk all text sections in order of increasing VMA. Eilminate duplicate
10945 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes),
91d6fa6a 10946 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */
2468f9c9
PB		 10947
10948 for (i = 0; i < num_text_sections; i++)
10949 {
10950 asection *sec = text_section_order[i];
10951 asection *exidx_sec;
10952 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec);
10953 struct _arm_elf_section_data *exidx_arm_data;
10954 bfd_byte *contents = NULL;
10955 int deleted_exidx_bytes = 0;
10956 bfd_vma j;
10957 arm_unwind_table_edit *unwind_edit_head = NULL;
10958 arm_unwind_table_edit *unwind_edit_tail = NULL;
10959 Elf_Internal_Shdr *hdr;
10960 bfd *ibfd;
10961
10962 if (arm_data == NULL)
99059e56 10963 continue;
2468f9c9
PB		 10964
10965 exidx_sec = arm_data->u.text.arm_exidx_sec;
10966 if (exidx_sec == NULL)
10967 {
10968 /* Section has no unwind data. */
10969 if (last_unwind_type == 0 || !last_exidx_sec)
10970 continue;
10971
10972 /* Ignore zero sized sections. */
10973 if (sec->size == 0)
10974 continue;
10975
10976 insert_cantunwind_after(last_text_sec, last_exidx_sec);
10977 last_unwind_type = 0;
10978 continue;
10979 }
10980
22a8f80e
PB		 10981 /* Skip /DISCARD/ sections. */
10982 if (bfd_is_abs_section (exidx_sec->output_section))
10983 continue;
10984
2468f9c9
PB		 10985 hdr = &elf_section_data (exidx_sec)->this_hdr;
10986 if (hdr->sh_type != SHT_ARM_EXIDX)
99059e56 10987 continue;
b38cadfb 10988
2468f9c9
PB		 10989 exidx_arm_data = get_arm_elf_section_data (exidx_sec);
10990 if (exidx_arm_data == NULL)
99059e56 10991 continue;
b38cadfb 10992
2468f9c9 10993 ibfd = exidx_sec->owner;
b38cadfb 10994
2468f9c9
PB		 10995 if (hdr->contents != NULL)
10996 contents = hdr->contents;
10997 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents))
10998 /* An error? */
10999 continue;
11000
11001 for (j = 0; j < hdr->sh_size; j += 8)
11002 {
11003 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4);
11004 int unwind_type;
11005 int elide = 0;
11006
11007 /* An EXIDX_CANTUNWIND entry. */
11008 if (second_word == 1)
11009 {
11010 if (last_unwind_type == 0)
11011 elide = 1;
11012 unwind_type = 0;
11013 }
11014 /* Inlined unwinding data. Merge if equal to previous. */
11015 else if ((second_word & 0x80000000) != 0)
11016 {
85fdf906
AH		 11017 if (merge_exidx_entries
11018 && last_second_word == second_word && last_unwind_type == 1)
2468f9c9
PB		 11019 elide = 1;
11020 unwind_type = 1;
11021 last_second_word = second_word;
11022 }
11023 /* Normal table entry. In theory we could merge these too,
11024 but duplicate entries are likely to be much less common. */
11025 else
11026 unwind_type = 2;
11027
11028 if (elide)
11029 {
11030 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail,
11031 DELETE_EXIDX_ENTRY, NULL, j / 8);
11032
11033 deleted_exidx_bytes += 8;
11034 }
11035
11036 last_unwind_type = unwind_type;
11037 }
11038
11039 /* Free contents if we allocated it ourselves. */
11040 if (contents != hdr->contents)
99059e56 11041 free (contents);
2468f9c9
PB		 11042
11043 /* Record edits to be applied later (in elf32_arm_write_section). */
11044 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head;
11045 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail;
b38cadfb 11046
2468f9c9
PB		 11047 if (deleted_exidx_bytes > 0)
11048 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes);
11049
11050 last_exidx_sec = exidx_sec;
11051 last_text_sec = sec;
11052 }
11053
11054 /* Add terminating CANTUNWIND entry. */
11055 if (last_exidx_sec && last_unwind_type != 0)
11056 insert_cantunwind_after(last_text_sec, last_exidx_sec);
11057
11058 return TRUE;
11059}
11060
3e6b1042
DJ		 11061static bfd_boolean
11062elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd,
11063 bfd *ibfd, const char *name)
11064{
11065 asection *sec, *osec;
11066
3d4d4302 11067 sec = bfd_get_linker_section (ibfd, name);
3e6b1042
DJ		 11068 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0)
11069 return TRUE;
11070
11071 osec = sec->output_section;
11072 if (elf32_arm_write_section (obfd, info, sec, sec->contents))
11073 return TRUE;
11074
11075 if (! bfd_set_section_contents (obfd, osec, sec->contents,
11076 sec->output_offset, sec->size))
11077 return FALSE;
11078
11079 return TRUE;
11080}
11081
11082static bfd_boolean
11083elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info)
11084{
11085 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info);
fe33d2fa 11086 asection *sec, *osec;
3e6b1042 11087
4dfe6ac6
NC		 11088 if (globals == NULL)
11089 return FALSE;
11090
3e6b1042
DJ		 11091 /* Invoke the regular ELF backend linker to do all the work. */
11092 if (!bfd_elf_final_link (abfd, info))
11093 return FALSE;
11094
fe33d2fa
CL		 11095 /* Process stub sections (eg BE8 encoding, ...). */
11096 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info);
11097 int i;
cdb21a0a
NS		 11098 for (i=0; i<htab->top_id; i++)
11099 {
11100 sec = htab->stub_group[i].stub_sec;
11101 /* Only process it once, in its link_sec slot. */
11102 if (sec && i == htab->stub_group[i].link_sec->id)
11103 {
11104 osec = sec->output_section;
11105 elf32_arm_write_section (abfd, info, sec, sec->contents);
11106 if (! bfd_set_section_contents (abfd, osec, sec->contents,
11107 sec->output_offset, sec->size))
11108 return FALSE;
11109 }
fe33d2fa 11110 }
fe33d2fa 11111
3e6b1042
DJ		 11112 /* Write out any glue sections now that we have created all the
11113 stubs. */
11114 if (globals->bfd_of_glue_owner != NULL)
11115 {
11116 if (! elf32_arm_output_glue_section (info, abfd,
11117 globals->bfd_of_glue_owner,
11118 ARM2THUMB_GLUE_SECTION_NAME))
11119 return FALSE;
11120
11121 if (! elf32_arm_output_glue_section (info, abfd,
11122 globals->bfd_of_glue_owner,
11123 THUMB2ARM_GLUE_SECTION_NAME))
11124 return FALSE;
11125
11126 if (! elf32_arm_output_glue_section (info, abfd,
11127 globals->bfd_of_glue_owner,
11128 VFP11_ERRATUM_VENEER_SECTION_NAME))
11129 return FALSE;
11130
11131 if (! elf32_arm_output_glue_section (info, abfd,
11132 globals->bfd_of_glue_owner,
11133 ARM_BX_GLUE_SECTION_NAME))
11134 return FALSE;
11135 }
11136
11137 return TRUE;
11138}
11139
5968a7b8
NC		 11140/* Return a best guess for the machine number based on the attributes. */
11141
11142static unsigned int
11143bfd_arm_get_mach_from_attributes (bfd * abfd)
11144{
11145 int arch = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_CPU_arch);
11146
11147 switch (arch)
11148 {
11149 case TAG_CPU_ARCH_V4: return bfd_mach_arm_4;
11150 case TAG_CPU_ARCH_V4T: return bfd_mach_arm_4T;
11151 case TAG_CPU_ARCH_V5T: return bfd_mach_arm_5T;
11152
11153 case TAG_CPU_ARCH_V5TE:
11154 {
11155 char * name;
11156
11157 BFD_ASSERT (Tag_CPU_name < NUM_KNOWN_OBJ_ATTRIBUTES);
11158 name = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_CPU_name].s;
11159
11160 if (name)
11161 {
11162 if (strcmp (name, "IWMMXT2") == 0)
11163 return bfd_mach_arm_iWMMXt2;
11164
11165 if (strcmp (name, "IWMMXT") == 0)
6034aab8 11166 return bfd_mach_arm_iWMMXt;
088ca6c1
NC		 11167
11168 if (strcmp (name, "XSCALE") == 0)
11169 {
11170 int wmmx;
11171
11172 BFD_ASSERT (Tag_WMMX_arch < NUM_KNOWN_OBJ_ATTRIBUTES);
11173 wmmx = elf_known_obj_attributes (abfd) [OBJ_ATTR_PROC][Tag_WMMX_arch].i;
11174 switch (wmmx)
11175 {
11176 case 1: return bfd_mach_arm_iWMMXt;
11177 case 2: return bfd_mach_arm_iWMMXt2;
11178 default: return bfd_mach_arm_XScale;
11179 }
11180 }
5968a7b8
NC		 11181 }
11182
11183 return bfd_mach_arm_5TE;
11184 }
11185
11186 default:
11187 return bfd_mach_arm_unknown;
11188 }
11189}
11190
c178919b
NC		 11191/* Set the right machine number. */
11192
11193static bfd_boolean
57e8b36a 11194elf32_arm_object_p (bfd *abfd)
c178919b 11195{
5a6c6817 11196 unsigned int mach;
57e8b36a 11197
5a6c6817 11198 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 11199
5968a7b8
NC		 11200 if (mach == bfd_mach_arm_unknown)
11201 {
11202 if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
11203 mach = bfd_mach_arm_ep9312;
11204 else
11205 mach = bfd_arm_get_mach_from_attributes (abfd);
11206 }
c178919b 11207
5968a7b8 11208 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 11209 return TRUE;
11210}
11211
fc830a83 11212/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 11213
b34976b6 11214static bfd_boolean
57e8b36a 11215elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 11216{
11217 if (elf_flags_init (abfd)
11218 && elf_elfheader (abfd)->e_flags != flags)
11219 {
fc830a83
NC		 11220 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
11221 {
fd2ec330 11222 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 11223 (*_bfd_error_handler)
11224 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
11225 abfd);
fc830a83 11226 else
d003868e
AM		 11227 _bfd_error_handler
11228 (_("Warning: Clearing the interworking flag of %B due to outside request"),
11229 abfd);
fc830a83 11230 }
252b5132
RH		 11231 }
11232 else
11233 {
11234 elf_elfheader (abfd)->e_flags = flags;
b34976b6 11235 elf_flags_init (abfd) = TRUE;
252b5132
RH		 11236 }
11237
b34976b6 11238 return TRUE;
252b5132
RH		 11239}
11240
fc830a83 11241/* Copy backend specific data from one object module to another. */
9b485d32 11242
b34976b6 11243static bfd_boolean
57e8b36a 11244elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 11245{
11246 flagword in_flags;
11247 flagword out_flags;
11248
0ffa91dd 11249 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 11250 return TRUE;
252b5132 11251
fc830a83 11252 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 11253 out_flags = elf_elfheader (obfd)->e_flags;
11254
fc830a83
NC		 11255 if (elf_flags_init (obfd)
11256 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
11257 && in_flags != out_flags)
252b5132 11258 {
252b5132 11259 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 11260 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 11261 return FALSE;
252b5132
RH		 11262
11263 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 11264 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 11265 return FALSE;
252b5132
RH		 11266
11267 /* If the src and dest have different interworking flags
99059e56 11268 then turn off the interworking bit. */
fd2ec330 11269 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 11270 {
fd2ec330 11271 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 11272 _bfd_error_handler
11273 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
11274 obfd, ibfd);
252b5132 11275
fd2ec330 11276 in_flags &= ~EF_ARM_INTERWORK;
252b5132 11277 }
1006ba19
PB		 11278
11279 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 11280 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
11281 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 11282 }
11283
11284 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 11285 elf_flags_init (obfd) = TRUE;
252b5132 11286
e2349352 11287 return _bfd_elf_copy_private_bfd_data (ibfd, obfd);
ee065d83
PB		 11288}
11289
11290/* Values for Tag_ABI_PCS_R9_use. */
11291enum
11292{
11293 AEABI_R9_V6,
11294 AEABI_R9_SB,
11295 AEABI_R9_TLS,
11296 AEABI_R9_unused
11297};
11298
11299/* Values for Tag_ABI_PCS_RW_data. */
11300enum
11301{
11302 AEABI_PCS_RW_data_absolute,
11303 AEABI_PCS_RW_data_PCrel,
11304 AEABI_PCS_RW_data_SBrel,
11305 AEABI_PCS_RW_data_unused
11306};
11307
11308/* Values for Tag_ABI_enum_size. */
11309enum
11310{
11311 AEABI_enum_unused,
11312 AEABI_enum_short,
11313 AEABI_enum_wide,
11314 AEABI_enum_forced_wide
11315};
11316
104d59d1
JM		 11317/* Determine whether an object attribute tag takes an integer, a
11318 string or both. */
906e58ca 11319
104d59d1
JM		 11320static int
11321elf32_arm_obj_attrs_arg_type (int tag)
11322{
11323 if (tag == Tag_compatibility)
3483fe2e 11324 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL;
2d0bb761 11325 else if (tag == Tag_nodefaults)
3483fe2e
AS		 11326 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT;
11327 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name)
11328 return ATTR_TYPE_FLAG_STR_VAL;
104d59d1 11329 else if (tag < 32)
3483fe2e 11330 return ATTR_TYPE_FLAG_INT_VAL;
104d59d1 11331 else
3483fe2e 11332 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL;
104d59d1
JM		 11333}
11334
5aa6ff7c
AS		 11335/* The ABI defines that Tag_conformance should be emitted first, and that
11336 Tag_nodefaults should be second (if either is defined). This sets those
11337 two positions, and bumps up the position of all the remaining tags to
11338 compensate. */
11339static int
11340elf32_arm_obj_attrs_order (int num)
11341{
3de4a297 11342 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE)
5aa6ff7c 11343 return Tag_conformance;
3de4a297 11344 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1)
5aa6ff7c
AS		 11345 return Tag_nodefaults;
11346 if ((num - 2) < Tag_nodefaults)
11347 return num - 2;
11348 if ((num - 1) < Tag_conformance)
11349 return num - 1;
11350 return num;
11351}
11352
e8b36cd1
JM		 11353/* Attribute numbers >=64 (mod 128) can be safely ignored. */
11354static bfd_boolean
11355elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag)
11356{
11357 if ((tag & 127) < 64)
11358 {
11359 _bfd_error_handler
11360 (_("%B: Unknown mandatory EABI object attribute %d"),
11361 abfd, tag);
11362 bfd_set_error (bfd_error_bad_value);
11363 return FALSE;
11364 }
11365 else
11366 {
11367 _bfd_error_handler
11368 (_("Warning: %B: Unknown EABI object attribute %d"),
11369 abfd, tag);
11370 return TRUE;
11371 }
11372}
11373
91e22acd
AS		 11374/* Read the architecture from the Tag_also_compatible_with attribute, if any.
11375 Returns -1 if no architecture could be read. */
11376
11377static int
11378get_secondary_compatible_arch (bfd *abfd)
11379{
11380 obj_attribute *attr =
11381 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
11382
11383 /* Note: the tag and its argument below are uleb128 values, though
11384 currently-defined values fit in one byte for each. */
11385 if (attr->s
11386 && attr->s[0] == Tag_CPU_arch
11387 && (attr->s[1] & 128) != 128
11388 && attr->s[2] == 0)
11389 return attr->s[1];
11390
11391 /* This tag is "safely ignorable", so don't complain if it looks funny. */
11392 return -1;
11393}
11394
11395/* Set, or unset, the architecture of the Tag_also_compatible_with attribute.
11396 The tag is removed if ARCH is -1. */
11397
8e79c3df 11398static void
91e22acd 11399set_secondary_compatible_arch (bfd *abfd, int arch)
8e79c3df 11400{
91e22acd
AS		 11401 obj_attribute *attr =
11402 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with];
8e79c3df 11403
91e22acd
AS		 11404 if (arch == -1)
11405 {
11406 attr->s = NULL;
11407 return;
8e79c3df 11408 }
91e22acd
AS		 11409
11410 /* Note: the tag and its argument below are uleb128 values, though
11411 currently-defined values fit in one byte for each. */
11412 if (!attr->s)
21d799b5 11413 attr->s = (char *) bfd_alloc (abfd, 3);
91e22acd
AS		 11414 attr->s[0] = Tag_CPU_arch;
11415 attr->s[1] = arch;
11416 attr->s[2] = '\0';
8e79c3df
CM		 11417}
11418
91e22acd
AS		 11419/* Combine two values for Tag_CPU_arch, taking secondary compatibility tags
11420 into account. */
11421
11422static int
11423tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out,
11424 int newtag, int secondary_compat)
8e79c3df 11425{
91e22acd
AS		 11426#define T(X) TAG_CPU_ARCH_##X
11427 int tagl, tagh, result;
11428 const int v6t2[] =
11429 {
11430 T(V6T2), /* PRE_V4. */
11431 T(V6T2), /* V4. */
11432 T(V6T2), /* V4T. */
11433 T(V6T2), /* V5T. */
11434 T(V6T2), /* V5TE. */
11435 T(V6T2), /* V5TEJ. */
11436 T(V6T2), /* V6. */
11437 T(V7), /* V6KZ. */
11438 T(V6T2) /* V6T2. */
11439 };
11440 const int v6k[] =
11441 {
11442 T(V6K), /* PRE_V4. */
11443 T(V6K), /* V4. */
11444 T(V6K), /* V4T. */
11445 T(V6K), /* V5T. */
11446 T(V6K), /* V5TE. */
11447 T(V6K), /* V5TEJ. */
11448 T(V6K), /* V6. */
11449 T(V6KZ), /* V6KZ. */
11450 T(V7), /* V6T2. */
11451 T(V6K) /* V6K. */
11452 };
11453 const int v7[] =
11454 {
11455 T(V7), /* PRE_V4. */
11456 T(V7), /* V4. */
11457 T(V7), /* V4T. */
11458 T(V7), /* V5T. */
11459 T(V7), /* V5TE. */
11460 T(V7), /* V5TEJ. */
11461 T(V7), /* V6. */
11462 T(V7), /* V6KZ. */
11463 T(V7), /* V6T2. */
11464 T(V7), /* V6K. */
11465 T(V7) /* V7. */
11466 };
11467 const int v6_m[] =
11468 {
11469 -1, /* PRE_V4. */
11470 -1, /* V4. */
11471 T(V6K), /* V4T. */
11472 T(V6K), /* V5T. */
11473 T(V6K), /* V5TE. */
11474 T(V6K), /* V5TEJ. */
11475 T(V6K), /* V6. */
11476 T(V6KZ), /* V6KZ. */
11477 T(V7), /* V6T2. */
11478 T(V6K), /* V6K. */
11479 T(V7), /* V7. */
11480 T(V6_M) /* V6_M. */
11481 };
11482 const int v6s_m[] =
11483 {
11484 -1, /* PRE_V4. */
11485 -1, /* V4. */
11486 T(V6K), /* V4T. */
11487 T(V6K), /* V5T. */
11488 T(V6K), /* V5TE. */
11489 T(V6K), /* V5TEJ. */
11490 T(V6K), /* V6. */
11491 T(V6KZ), /* V6KZ. */
11492 T(V7), /* V6T2. */
11493 T(V6K), /* V6K. */
11494 T(V7), /* V7. */
11495 T(V6S_M), /* V6_M. */
11496 T(V6S_M) /* V6S_M. */
11497 };
9e3c6df6
PB		 11498 const int v7e_m[] =
11499 {
11500 -1, /* PRE_V4. */
11501 -1, /* V4. */
11502 T(V7E_M), /* V4T. */
11503 T(V7E_M), /* V5T. */
11504 T(V7E_M), /* V5TE. */
11505 T(V7E_M), /* V5TEJ. */
11506 T(V7E_M), /* V6. */
11507 T(V7E_M), /* V6KZ. */
11508 T(V7E_M), /* V6T2. */
11509 T(V7E_M), /* V6K. */
11510 T(V7E_M), /* V7. */
11511 T(V7E_M), /* V6_M. */
11512 T(V7E_M), /* V6S_M. */
11513 T(V7E_M) /* V7E_M. */
11514 };
bca38921
MGD		 11515 const int v8[] =
11516 {
11517 T(V8), /* PRE_V4. */
11518 T(V8), /* V4. */
11519 T(V8), /* V4T. */
11520 T(V8), /* V5T. */
11521 T(V8), /* V5TE. */
11522 T(V8), /* V5TEJ. */
11523 T(V8), /* V6. */
11524 T(V8), /* V6KZ. */
11525 T(V8), /* V6T2. */
11526 T(V8), /* V6K. */
11527 T(V8), /* V7. */
11528 T(V8), /* V6_M. */
11529 T(V8), /* V6S_M. */
11530 T(V8), /* V7E_M. */
11531 T(V8) /* V8. */
11532 };
91e22acd
AS		 11533 const int v4t_plus_v6_m[] =
11534 {
11535 -1, /* PRE_V4. */
11536 -1, /* V4. */
11537 T(V4T), /* V4T. */
11538 T(V5T), /* V5T. */
11539 T(V5TE), /* V5TE. */
11540 T(V5TEJ), /* V5TEJ. */
11541 T(V6), /* V6. */
11542 T(V6KZ), /* V6KZ. */
11543 T(V6T2), /* V6T2. */
11544 T(V6K), /* V6K. */
11545 T(V7), /* V7. */
11546 T(V6_M), /* V6_M. */
11547 T(V6S_M), /* V6S_M. */
9e3c6df6 11548 T(V7E_M), /* V7E_M. */
bca38921 11549 T(V8), /* V8. */
91e22acd
AS		 11550 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */
11551 };
11552 const int *comb[] =
11553 {
11554 v6t2,
11555 v6k,
11556 v7,
11557 v6_m,
11558 v6s_m,
9e3c6df6 11559 v7e_m,
bca38921 11560 v8,
91e22acd
AS		 11561 /* Pseudo-architecture. */
11562 v4t_plus_v6_m
11563 };
11564
11565 /* Check we've not got a higher architecture than we know about. */
11566
9e3c6df6 11567 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH)
91e22acd 11568 {
3895f852 11569 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd);
91e22acd
AS		 11570 return -1;
11571 }
11572
11573 /* Override old tag if we have a Tag_also_compatible_with on the output. */
11574
11575 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11576 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11577 oldtag = T(V4T_PLUS_V6_M);
11578
11579 /* And override the new tag if we have a Tag_also_compatible_with on the
11580 input. */
11581
11582 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11583 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11584 newtag = T(V4T_PLUS_V6_M);
11585
11586 tagl = (oldtag < newtag) ? oldtag : newtag;
11587 result = tagh = (oldtag > newtag) ? oldtag : newtag;
11588
11589 /* Architectures before V6KZ add features monotonically. */
11590 if (tagh <= TAG_CPU_ARCH_V6KZ)
11591 return result;
11592
11593 result = comb[tagh - T(V6T2)][tagl];
11594
11595 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11596 as the canonical version. */
11597 if (result == T(V4T_PLUS_V6_M))
11598 {
11599 result = T(V4T);
11600 *secondary_compat_out = T(V6_M);
11601 }
11602 else
11603 *secondary_compat_out = -1;
11604
11605 if (result == -1)
11606 {
3895f852 11607 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"),
91e22acd
AS		 11608 ibfd, oldtag, newtag);
11609 return -1;
11610 }
11611
11612 return result;
11613#undef T
8e79c3df
CM		 11614}
11615
ac56ee8f
MGD		 11616/* Query attributes object to see if integer divide instructions may be
11617 present in an object. */
11618static bfd_boolean
11619elf32_arm_attributes_accept_div (const obj_attribute *attr)
11620{
11621 int arch = attr[Tag_CPU_arch].i;
11622 int profile = attr[Tag_CPU_arch_profile].i;
11623
11624 switch (attr[Tag_DIV_use].i)
11625 {
11626 case 0:
11627 /* Integer divide allowed if instruction contained in archetecture. */
11628 if (arch == TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11629 return TRUE;
11630 else if (arch >= TAG_CPU_ARCH_V7E_M)
11631 return TRUE;
11632 else
11633 return FALSE;
11634
11635 case 1:
11636 /* Integer divide explicitly prohibited. */
11637 return FALSE;
11638
11639 default:
11640 /* Unrecognised case - treat as allowing divide everywhere. */
11641 case 2:
11642 /* Integer divide allowed in ARM state. */
11643 return TRUE;
11644 }
11645}
11646
11647/* Query attributes object to see if integer divide instructions are
11648 forbidden to be in the object. This is not the inverse of
11649 elf32_arm_attributes_accept_div. */
11650static bfd_boolean
11651elf32_arm_attributes_forbid_div (const obj_attribute *attr)
11652{
11653 return attr[Tag_DIV_use].i == 1;
11654}
11655
ee065d83
PB		 11656/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
11657 are conflicting attributes. */
906e58ca 11658
ee065d83
PB		 11659static bfd_boolean
11660elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
11661{
104d59d1
JM		 11662 obj_attribute *in_attr;
11663 obj_attribute *out_attr;
ee065d83
PB		 11664 /* Some tags have 0 = don't care, 1 = strong requirement,
11665 2 = weak requirement. */
91e22acd 11666 static const int order_021[3] = {0, 2, 1};
ee065d83 11667 int i;
91e22acd 11668 bfd_boolean result = TRUE;
ee065d83 11669
3e6b1042
DJ		 11670 /* Skip the linker stubs file. This preserves previous behavior
11671 of accepting unknown attributes in the first input file - but
11672 is that a bug? */
11673 if (ibfd->flags & BFD_LINKER_CREATED)
11674 return TRUE;
11675
104d59d1 11676 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 11677 {
11678 /* This is the first object. Copy the attributes. */
104d59d1 11679 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526 11680
cd21e546
MGD		 11681 out_attr = elf_known_obj_attributes_proc (obfd);
11682
004ae526
PB		 11683 /* Use the Tag_null value to indicate the attributes have been
11684 initialized. */
cd21e546 11685 out_attr[0].i = 1;
004ae526 11686
cd21e546
MGD		 11687 /* We do not output objects with Tag_MPextension_use_legacy - we move
11688 the attribute's value to Tag_MPextension_use. */
11689 if (out_attr[Tag_MPextension_use_legacy].i != 0)
11690 {
11691 if (out_attr[Tag_MPextension_use].i != 0
11692 && out_attr[Tag_MPextension_use_legacy].i
99059e56 11693 != out_attr[Tag_MPextension_use].i)
cd21e546
MGD		 11694 {
11695 _bfd_error_handler
11696 (_("Error: %B has both the current and legacy "
11697 "Tag_MPextension_use attributes"), ibfd);
11698 result = FALSE;
11699 }
11700
11701 out_attr[Tag_MPextension_use] =
11702 out_attr[Tag_MPextension_use_legacy];
11703 out_attr[Tag_MPextension_use_legacy].type = 0;
11704 out_attr[Tag_MPextension_use_legacy].i = 0;
11705 }
11706
11707 return result;
ee065d83
PB		 11708 }
11709
104d59d1
JM		 11710 in_attr = elf_known_obj_attributes_proc (ibfd);
11711 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 11712 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
11713 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
11714 {
8e79c3df 11715 /* Ignore mismatches if the object doesn't use floating point. */
ee065d83
PB		 11716 if (out_attr[Tag_ABI_FP_number_model].i == 0)
11717 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
11718 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
11719 {
11720 _bfd_error_handler
3895f852 11721 (_("error: %B uses VFP register arguments, %B does not"),
deddc40b
NS		 11722 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd,
11723 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd);
91e22acd 11724 result = FALSE;
ee065d83
PB		 11725 }
11726 }
11727
3de4a297 11728 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 11729 {
11730 /* Merge this attribute with existing attributes. */
11731 switch (i)
11732 {
11733 case Tag_CPU_raw_name:
11734 case Tag_CPU_name:
6a631e86 11735 /* These are merged after Tag_CPU_arch. */
ee065d83
PB		 11736 break;
11737
11738 case Tag_ABI_optimization_goals:
11739 case Tag_ABI_FP_optimization_goals:
11740 /* Use the first value seen. */
11741 break;
11742
11743 case Tag_CPU_arch:
91e22acd
AS		 11744 {
11745 int secondary_compat = -1, secondary_compat_out = -1;
11746 unsigned int saved_out_attr = out_attr[i].i;
11747 static const char *name_table[] = {
11748 /* These aren't real CPU names, but we can't guess
11749 that from the architecture version alone. */
11750 "Pre v4",
11751 "ARM v4",
11752 "ARM v4T",
11753 "ARM v5T",
11754 "ARM v5TE",
11755 "ARM v5TEJ",
11756 "ARM v6",
11757 "ARM v6KZ",
11758 "ARM v6T2",
11759 "ARM v6K",
11760 "ARM v7",
11761 "ARM v6-M",
bca38921
MGD		 11762 "ARM v6S-M",
11763 "ARM v8"
91e22acd
AS		 11764 };
11765
11766 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */
11767 secondary_compat = get_secondary_compatible_arch (ibfd);
11768 secondary_compat_out = get_secondary_compatible_arch (obfd);
11769 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i,
11770 &secondary_compat_out,
11771 in_attr[i].i,
11772 secondary_compat);
11773 set_secondary_compatible_arch (obfd, secondary_compat_out);
11774
11775 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */
11776 if (out_attr[i].i == saved_out_attr)
11777 ; /* Leave the names alone. */
11778 else if (out_attr[i].i == in_attr[i].i)
11779 {
11780 /* The output architecture has been changed to match the
11781 input architecture. Use the input names. */
11782 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s
11783 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s)
11784 : NULL;
11785 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s
11786 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s)
11787 : NULL;
11788 }
11789 else
11790 {
11791 out_attr[Tag_CPU_name].s = NULL;
11792 out_attr[Tag_CPU_raw_name].s = NULL;
11793 }
11794
11795 /* If we still don't have a value for Tag_CPU_name,
11796 make one up now. Tag_CPU_raw_name remains blank. */
11797 if (out_attr[Tag_CPU_name].s == NULL
11798 && out_attr[i].i < ARRAY_SIZE (name_table))
11799 out_attr[Tag_CPU_name].s =
11800 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]);
11801 }
11802 break;
11803
ee065d83
PB		 11804 case Tag_ARM_ISA_use:
11805 case Tag_THUMB_ISA_use:
ee065d83 11806 case Tag_WMMX_arch:
91e22acd
AS		 11807 case Tag_Advanced_SIMD_arch:
11808 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */
ee065d83 11809 case Tag_ABI_FP_rounding:
ee065d83
PB		 11810 case Tag_ABI_FP_exceptions:
11811 case Tag_ABI_FP_user_exceptions:
11812 case Tag_ABI_FP_number_model:
75375b3e 11813 case Tag_FP_HP_extension:
91e22acd
AS		 11814 case Tag_CPU_unaligned_access:
11815 case Tag_T2EE_use:
91e22acd 11816 case Tag_MPextension_use:
ee065d83
PB		 11817 /* Use the largest value specified. */
11818 if (in_attr[i].i > out_attr[i].i)
11819 out_attr[i].i = in_attr[i].i;
11820 break;
11821
75375b3e 11822 case Tag_ABI_align_preserved:
91e22acd
AS		 11823 case Tag_ABI_PCS_RO_data:
11824 /* Use the smallest value specified. */
11825 if (in_attr[i].i < out_attr[i].i)
11826 out_attr[i].i = in_attr[i].i;
11827 break;
11828
75375b3e 11829 case Tag_ABI_align_needed:
91e22acd 11830 if ((in_attr[i].i > 0 || out_attr[i].i > 0)
75375b3e
MGD		 11831 && (in_attr[Tag_ABI_align_preserved].i == 0
11832 || out_attr[Tag_ABI_align_preserved].i == 0))
ee065d83 11833 {
91e22acd
AS		 11834 /* This error message should be enabled once all non-conformant
11835 binaries in the toolchain have had the attributes set
11836 properly.
ee065d83 11837 _bfd_error_handler
3895f852 11838 (_("error: %B: 8-byte data alignment conflicts with %B"),
91e22acd
AS		 11839 obfd, ibfd);
11840 result = FALSE; */
ee065d83 11841 }
91e22acd
AS		 11842 /* Fall through. */
11843 case Tag_ABI_FP_denormal:
11844 case Tag_ABI_PCS_GOT_use:
11845 /* Use the "greatest" from the sequence 0, 2, 1, or the largest
11846 value if greater than 2 (for future-proofing). */
11847 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i)
11848 || (in_attr[i].i <= 2 && out_attr[i].i <= 2
11849 && order_021[in_attr[i].i] > order_021[out_attr[i].i]))
ee065d83
PB		 11850 out_attr[i].i = in_attr[i].i;
11851 break;
91e22acd 11852
75375b3e
MGD		 11853 case Tag_Virtualization_use:
11854 /* The virtualization tag effectively stores two bits of
11855 information: the intended use of TrustZone (in bit 0), and the
11856 intended use of Virtualization (in bit 1). */
11857 if (out_attr[i].i == 0)
11858 out_attr[i].i = in_attr[i].i;
11859 else if (in_attr[i].i != 0
11860 && in_attr[i].i != out_attr[i].i)
11861 {
11862 if (in_attr[i].i <= 3 && out_attr[i].i <= 3)
11863 out_attr[i].i = 3;
11864 else
11865 {
11866 _bfd_error_handler
11867 (_("error: %B: unable to merge virtualization attributes "
11868 "with %B"),
11869 obfd, ibfd);
11870 result = FALSE;
11871 }
11872 }
11873 break;
91e22acd
AS		 11874
11875 case Tag_CPU_arch_profile:
11876 if (out_attr[i].i != in_attr[i].i)
11877 {
11878 /* 0 will merge with anything.
11879 'A' and 'S' merge to 'A'.
11880 'R' and 'S' merge to 'R'.
99059e56 11881 'M' and 'A|R|S' is an error. */
91e22acd
AS		 11882 if (out_attr[i].i == 0
11883 || (out_attr[i].i == 'S'
11884 && (in_attr[i].i == 'A' || in_attr[i].i == 'R')))
11885 out_attr[i].i = in_attr[i].i;
11886 else if (in_attr[i].i == 0
11887 || (in_attr[i].i == 'S'
11888 && (out_attr[i].i == 'A' || out_attr[i].i == 'R')))
6a631e86 11889 ; /* Do nothing. */
91e22acd
AS		 11890 else
11891 {
11892 _bfd_error_handler
3895f852 11893 (_("error: %B: Conflicting architecture profiles %c/%c"),
91e22acd
AS		 11894 ibfd,
11895 in_attr[i].i ? in_attr[i].i : '0',
11896 out_attr[i].i ? out_attr[i].i : '0');
11897 result = FALSE;
11898 }
11899 }
11900 break;
75375b3e 11901 case Tag_FP_arch:
62f3b8c8 11902 {
4547cb56
NC		 11903 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since
11904 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch
11905 when it's 0. It might mean absence of FP hardware if
11906 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */
11907
bca38921 11908#define VFP_VERSION_COUNT 8
62f3b8c8
PB		 11909 static const struct
11910 {
11911 int ver;
11912 int regs;
bca38921 11913 } vfp_versions[VFP_VERSION_COUNT] =
62f3b8c8
PB		 11914 {
11915 {0, 0},
11916 {1, 16},
11917 {2, 16},
11918 {3, 32},
11919 {3, 16},
11920 {4, 32},
bca38921
MGD		 11921 {4, 16},
11922 {8, 32}
62f3b8c8
PB		 11923 };
11924 int ver;
11925 int regs;
11926 int newval;
11927
4547cb56
NC		 11928 /* If the output has no requirement about FP hardware,
11929 follow the requirement of the input. */
11930 if (out_attr[i].i == 0)
11931 {
11932 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0);
11933 out_attr[i].i = in_attr[i].i;
11934 out_attr[Tag_ABI_HardFP_use].i
11935 = in_attr[Tag_ABI_HardFP_use].i;
11936 break;
11937 }
11938 /* If the input has no requirement about FP hardware, do
11939 nothing. */
11940 else if (in_attr[i].i == 0)
11941 {
11942 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0);
11943 break;
11944 }
11945
11946 /* Both the input and the output have nonzero Tag_FP_arch.
11947 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */
11948
11949 /* If both the input and the output have zero Tag_ABI_HardFP_use,
11950 do nothing. */
11951 if (in_attr[Tag_ABI_HardFP_use].i == 0
11952 && out_attr[Tag_ABI_HardFP_use].i == 0)
11953 ;
11954 /* If the input and the output have different Tag_ABI_HardFP_use,
11955 the combination of them is 3 (SP & DP). */
11956 else if (in_attr[Tag_ABI_HardFP_use].i
11957 != out_attr[Tag_ABI_HardFP_use].i)
11958 out_attr[Tag_ABI_HardFP_use].i = 3;
11959
11960 /* Now we can handle Tag_FP_arch. */
11961
bca38921
MGD		 11962 /* Values of VFP_VERSION_COUNT or more aren't defined, so just
11963 pick the biggest. */
11964 if (in_attr[i].i >= VFP_VERSION_COUNT
11965 && in_attr[i].i > out_attr[i].i)
62f3b8c8
PB		 11966 {
11967 out_attr[i] = in_attr[i];
11968 break;
11969 }
11970 /* The output uses the superset of input features
11971 (ISA version) and registers. */
11972 ver = vfp_versions[in_attr[i].i].ver;
11973 if (ver < vfp_versions[out_attr[i].i].ver)
11974 ver = vfp_versions[out_attr[i].i].ver;
11975 regs = vfp_versions[in_attr[i].i].regs;
11976 if (regs < vfp_versions[out_attr[i].i].regs)
11977 regs = vfp_versions[out_attr[i].i].regs;
11978 /* This assumes all possible supersets are also a valid
99059e56 11979 options. */
bca38921 11980 for (newval = VFP_VERSION_COUNT - 1; newval > 0; newval--)
62f3b8c8
PB		 11981 {
11982 if (regs == vfp_versions[newval].regs
11983 && ver == vfp_versions[newval].ver)
11984 break;
11985 }
11986 out_attr[i].i = newval;
11987 }
b1cc4aeb 11988 break;
ee065d83
PB		 11989 case Tag_PCS_config:
11990 if (out_attr[i].i == 0)
11991 out_attr[i].i = in_attr[i].i;
b6009aca 11992 else if (in_attr[i].i != 0 && out_attr[i].i != in_attr[i].i)
ee065d83
PB		 11993 {
11994 /* It's sometimes ok to mix different configs, so this is only
99059e56 11995 a warning. */
ee065d83
PB		 11996 _bfd_error_handler
11997 (_("Warning: %B: Conflicting platform configuration"), ibfd);
11998 }
11999 break;
12000 case Tag_ABI_PCS_R9_use:
004ae526
PB		 12001 if (in_attr[i].i != out_attr[i].i
12002 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 12003 && in_attr[i].i != AEABI_R9_unused)
12004 {
12005 _bfd_error_handler
3895f852 12006 (_("error: %B: Conflicting use of R9"), ibfd);
91e22acd 12007 result = FALSE;
ee065d83
PB		 12008 }
12009 if (out_attr[i].i == AEABI_R9_unused)
12010 out_attr[i].i = in_attr[i].i;
12011 break;
12012 case Tag_ABI_PCS_RW_data:
12013 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
12014 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
12015 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
12016 {
12017 _bfd_error_handler
3895f852 12018 (_("error: %B: SB relative addressing conflicts with use of R9"),
ee065d83 12019 ibfd);
91e22acd 12020 result = FALSE;
ee065d83
PB		 12021 }
12022 /* Use the smallest value specified. */
12023 if (in_attr[i].i < out_attr[i].i)
12024 out_attr[i].i = in_attr[i].i;
12025 break;
ee065d83 12026 case Tag_ABI_PCS_wchar_t:
a9dc9481
JM		 12027 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i
12028 && !elf_arm_tdata (obfd)->no_wchar_size_warning)
ee065d83
PB		 12029 {
12030 _bfd_error_handler
a9dc9481
JM		 12031 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"),
12032 ibfd, in_attr[i].i, out_attr[i].i);
ee065d83 12033 }
a9dc9481 12034 else if (in_attr[i].i && !out_attr[i].i)
ee065d83
PB		 12035 out_attr[i].i = in_attr[i].i;
12036 break;
ee065d83
PB		 12037 case Tag_ABI_enum_size:
12038 if (in_attr[i].i != AEABI_enum_unused)
12039 {
12040 if (out_attr[i].i == AEABI_enum_unused
12041 || out_attr[i].i == AEABI_enum_forced_wide)
12042 {
12043 /* The existing object is compatible with anything.
12044 Use whatever requirements the new object has. */
12045 out_attr[i].i = in_attr[i].i;
12046 }
12047 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 12048 && out_attr[i].i != in_attr[i].i
0ffa91dd 12049 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 12050 {
91e22acd 12051 static const char *aeabi_enum_names[] =
bf21ed78 12052 { "", "variable-size", "32-bit", "" };
91e22acd
AS		 12053 const char *in_name =
12054 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12055 ? aeabi_enum_names[in_attr[i].i]
12056 : "<unknown>";
12057 const char *out_name =
12058 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names)
12059 ? aeabi_enum_names[out_attr[i].i]
12060 : "<unknown>";
ee065d83 12061 _bfd_error_handler
bf21ed78 12062 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
91e22acd 12063 ibfd, in_name, out_name);
ee065d83
PB		 12064 }
12065 }
12066 break;
12067 case Tag_ABI_VFP_args:
12068 /* Aready done. */
12069 break;
12070 case Tag_ABI_WMMX_args:
12071 if (in_attr[i].i != out_attr[i].i)
12072 {
12073 _bfd_error_handler
3895f852 12074 (_("error: %B uses iWMMXt register arguments, %B does not"),
ee065d83 12075 ibfd, obfd);
91e22acd 12076 result = FALSE;
ee065d83
PB		 12077 }
12078 break;
7b86a9fa
AS		 12079 case Tag_compatibility:
12080 /* Merged in target-independent code. */
12081 break;
91e22acd 12082 case Tag_ABI_HardFP_use:
4547cb56 12083 /* This is handled along with Tag_FP_arch. */
91e22acd
AS		 12084 break;
12085 case Tag_ABI_FP_16bit_format:
12086 if (in_attr[i].i != 0 && out_attr[i].i != 0)
12087 {
12088 if (in_attr[i].i != out_attr[i].i)
12089 {
12090 _bfd_error_handler
3895f852 12091 (_("error: fp16 format mismatch between %B and %B"),
91e22acd
AS		 12092 ibfd, obfd);
12093 result = FALSE;
12094 }
12095 }
12096 if (in_attr[i].i != 0)
12097 out_attr[i].i = in_attr[i].i;
12098 break;
7b86a9fa 12099
cd21e546 12100 case Tag_DIV_use:
ac56ee8f
MGD		 12101 /* A value of zero on input means that the divide instruction may
12102 be used if available in the base architecture as specified via
12103 Tag_CPU_arch and Tag_CPU_arch_profile. A value of 1 means that
12104 the user did not want divide instructions. A value of 2
12105 explicitly means that divide instructions were allowed in ARM
12106 and Thumb state. */
12107 if (in_attr[i].i == out_attr[i].i)
12108 /* Do nothing. */ ;
12109 else if (elf32_arm_attributes_forbid_div (in_attr)
12110 && !elf32_arm_attributes_accept_div (out_attr))
12111 out_attr[i].i = 1;
12112 else if (elf32_arm_attributes_forbid_div (out_attr)
12113 && elf32_arm_attributes_accept_div (in_attr))
12114 out_attr[i].i = in_attr[i].i;
12115 else if (in_attr[i].i == 2)
12116 out_attr[i].i = in_attr[i].i;
cd21e546
MGD		 12117 break;
12118
12119 case Tag_MPextension_use_legacy:
12120 /* We don't output objects with Tag_MPextension_use_legacy - we
12121 move the value to Tag_MPextension_use. */
12122 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0)
12123 {
12124 if (in_attr[Tag_MPextension_use].i != in_attr[i].i)
12125 {
12126 _bfd_error_handler
12127 (_("%B has has both the current and legacy "
b38cadfb 12128 "Tag_MPextension_use attributes"),
cd21e546
MGD		 12129 ibfd);
12130 result = FALSE;
12131 }
12132 }
12133
12134 if (in_attr[i].i > out_attr[Tag_MPextension_use].i)
12135 out_attr[Tag_MPextension_use] = in_attr[i];
12136
12137 break;
12138
91e22acd 12139 case Tag_nodefaults:
2d0bb761
AS		 12140 /* This tag is set if it exists, but the value is unused (and is
12141 typically zero). We don't actually need to do anything here -
12142 the merge happens automatically when the type flags are merged
12143 below. */
91e22acd
AS		 12144 break;
12145 case Tag_also_compatible_with:
12146 /* Already done in Tag_CPU_arch. */
12147 break;
12148 case Tag_conformance:
12149 /* Keep the attribute if it matches. Throw it away otherwise.
12150 No attribute means no claim to conform. */
12151 if (!in_attr[i].s || !out_attr[i].s
12152 || strcmp (in_attr[i].s, out_attr[i].s) != 0)
12153 out_attr[i].s = NULL;
12154 break;
3cfad14c 12155
91e22acd 12156 default:
e8b36cd1
JM		 12157 result
12158 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i);
91e22acd
AS		 12159 }
12160
12161 /* If out_attr was copied from in_attr then it won't have a type yet. */
12162 if (in_attr[i].type && !out_attr[i].type)
12163 out_attr[i].type = in_attr[i].type;
ee065d83
PB		 12164 }
12165
104d59d1 12166 /* Merge Tag_compatibility attributes and any common GNU ones. */
5488d830
MGD		 12167 if (!_bfd_elf_merge_object_attributes (ibfd, obfd))
12168 return FALSE;
ee065d83 12169
104d59d1 12170 /* Check for any attributes not known on ARM. */
e8b36cd1 12171 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd);
91e22acd 12172
91e22acd 12173 return result;
252b5132
RH		 12174}
12175
3a4a14e9
PB		 12176
12177/* Return TRUE if the two EABI versions are incompatible. */
12178
12179static bfd_boolean
12180elf32_arm_versions_compatible (unsigned iver, unsigned over)
12181{
12182 /* v4 and v5 are the same spec before and after it was released,
12183 so allow mixing them. */
12184 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
12185 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
12186 return TRUE;
12187
12188 return (iver == over);
12189}
12190
252b5132
RH		 12191/* Merge backend specific data from an object file to the output
12192 object file when linking. */
9b485d32 12193
b34976b6 12194static bfd_boolean
21d799b5 12195elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd);
252b5132 12196
9b485d32
NC		 12197/* Display the flags field. */
12198
b34976b6 12199static bfd_boolean
57e8b36a 12200elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 12201{
fc830a83
NC		 12202 FILE * file = (FILE *) ptr;
12203 unsigned long flags;
252b5132
RH		 12204
12205 BFD_ASSERT (abfd != NULL && ptr != NULL);
12206
12207 /* Print normal ELF private data. */
12208 _bfd_elf_print_private_bfd_data (abfd, ptr);
12209
fc830a83 12210 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 12211 /* Ignore init flag - it may not be set, despite the flags field
12212 containing valid data. */
252b5132
RH		 12213
12214 /* xgettext:c-format */
9b485d32 12215 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 12216
fc830a83
NC		 12217 switch (EF_ARM_EABI_VERSION (flags))
12218 {
12219 case EF_ARM_EABI_UNKNOWN:
4cc11e76 12220 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 12221 official ARM ELF extended ABI. Hence they are only decoded if
12222 the EABI version is not set. */
fd2ec330 12223 if (flags & EF_ARM_INTERWORK)
9b485d32 12224 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 12225
fd2ec330 12226 if (flags & EF_ARM_APCS_26)
6c571f00 12227 fprintf (file, " [APCS-26]");
fc830a83 12228 else
6c571f00 12229 fprintf (file, " [APCS-32]");
9a5aca8c 12230
96a846ea
RE		 12231 if (flags & EF_ARM_VFP_FLOAT)
12232 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 12233 else if (flags & EF_ARM_MAVERICK_FLOAT)
12234 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 12235 else
12236 fprintf (file, _(" [FPA float format]"));
12237
fd2ec330 12238 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 12239 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 12240
fd2ec330 12241 if (flags & EF_ARM_PIC)
9b485d32 12242 fprintf (file, _(" [position independent]"));
fc830a83 12243
fd2ec330 12244 if (flags & EF_ARM_NEW_ABI)
9b485d32 12245 fprintf (file, _(" [new ABI]"));
9a5aca8c 12246
fd2ec330 12247 if (flags & EF_ARM_OLD_ABI)
9b485d32 12248 fprintf (file, _(" [old ABI]"));
9a5aca8c 12249
fd2ec330 12250 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 12251 fprintf (file, _(" [software FP]"));
9a5aca8c 12252
96a846ea
RE		 12253 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
12254 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 12255 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
12256 | EF_ARM_MAVERICK_FLOAT);
fc830a83 12257 break;
9a5aca8c 12258
fc830a83 12259 case EF_ARM_EABI_VER1:
9b485d32 12260 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 12261
fc830a83 12262 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 12263 fprintf (file, _(" [sorted symbol table]"));
fc830a83 12264 else
9b485d32 12265 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 12266
fc830a83
NC		 12267 flags &= ~ EF_ARM_SYMSARESORTED;
12268 break;
9a5aca8c 12269
fd2ec330
PB		 12270 case EF_ARM_EABI_VER2:
12271 fprintf (file, _(" [Version2 EABI]"));
12272
12273 if (flags & EF_ARM_SYMSARESORTED)
12274 fprintf (file, _(" [sorted symbol table]"));
12275 else
12276 fprintf (file, _(" [unsorted symbol table]"));
12277
12278 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
12279 fprintf (file, _(" [dynamic symbols use segment index]"));
12280
12281 if (flags & EF_ARM_MAPSYMSFIRST)
12282 fprintf (file, _(" [mapping symbols precede others]"));
12283
99e4ae17 12284 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 12285 | EF_ARM_MAPSYMSFIRST);
12286 break;
12287
d507cf36
PB		 12288 case EF_ARM_EABI_VER3:
12289 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 12290 break;
12291
12292 case EF_ARM_EABI_VER4:
12293 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 12294 goto eabi;
d507cf36 12295
3a4a14e9
PB		 12296 case EF_ARM_EABI_VER5:
12297 fprintf (file, _(" [Version5 EABI]"));
3bfcb652
NC		 12298
12299 if (flags & EF_ARM_ABI_FLOAT_SOFT)
12300 fprintf (file, _(" [soft-float ABI]"));
12301
12302 if (flags & EF_ARM_ABI_FLOAT_HARD)
12303 fprintf (file, _(" [hard-float ABI]"));
12304
12305 flags &= ~(EF_ARM_ABI_FLOAT_SOFT | EF_ARM_ABI_FLOAT_HARD);
12306
3a4a14e9 12307 eabi:
d507cf36
PB		 12308 if (flags & EF_ARM_BE8)
12309 fprintf (file, _(" [BE8]"));
12310
12311 if (flags & EF_ARM_LE8)
12312 fprintf (file, _(" [LE8]"));
12313
12314 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
12315 break;
12316
fc830a83 12317 default:
9b485d32 12318 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 12319 break;
12320 }
252b5132 12321
fc830a83 12322 flags &= ~ EF_ARM_EABIMASK;
252b5132 12323
fc830a83 12324 if (flags & EF_ARM_RELEXEC)
9b485d32 12325 fprintf (file, _(" [relocatable executable]"));
252b5132 12326
fc830a83 12327 if (flags & EF_ARM_HASENTRY)
9b485d32 12328 fprintf (file, _(" [has entry point]"));
252b5132 12329
fc830a83
NC		 12330 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
12331
12332 if (flags)
9b485d32 12333 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 12334
252b5132
RH		 12335 fputc ('\n', file);
12336
b34976b6 12337 return TRUE;
252b5132
RH		 12338}
12339
12340static int
57e8b36a 12341elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 12342{
2f0ca46a
NC		 12343 switch (ELF_ST_TYPE (elf_sym->st_info))
12344 {
12345 case STT_ARM_TFUNC:
12346 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 12347
2f0ca46a
NC		 12348 case STT_ARM_16BIT:
12349 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
12350 This allows us to distinguish between data used by Thumb instructions
12351 and non-data (which is probably code) inside Thumb regions of an
12352 executable. */
1a0eb693 12353 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 12354 return ELF_ST_TYPE (elf_sym->st_info);
12355 break;
9a5aca8c 12356
ce855c42
NC		 12357 default:
12358 break;
2f0ca46a
NC		 12359 }
12360
12361 return type;
252b5132 12362}
f21f3fe0 12363
252b5132 12364static asection *
07adf181
AM		 12365elf32_arm_gc_mark_hook (asection *sec,
12366 struct bfd_link_info *info,
12367 Elf_Internal_Rela *rel,
12368 struct elf_link_hash_entry *h,
12369 Elf_Internal_Sym *sym)
252b5132
RH		 12370{
12371 if (h != NULL)
07adf181 12372 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 12373 {
12374 case R_ARM_GNU_VTINHERIT:
12375 case R_ARM_GNU_VTENTRY:
07adf181
AM		 12376 return NULL;
12377 }
9ad5cbcf 12378
07adf181 12379 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 12380}
12381
780a67af
NC		 12382/* Update the got entry reference counts for the section being removed. */
12383
b34976b6 12384static bfd_boolean
ba93b8ac
DJ		 12385elf32_arm_gc_sweep_hook (bfd * abfd,
12386 struct bfd_link_info * info,
12387 asection * sec,
12388 const Elf_Internal_Rela * relocs)
252b5132 12389{
5e681ec4
PB		 12390 Elf_Internal_Shdr *symtab_hdr;
12391 struct elf_link_hash_entry **sym_hashes;
12392 bfd_signed_vma *local_got_refcounts;
12393 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 12394 struct elf32_arm_link_hash_table * globals;
12395
7dda2462
TG		 12396 if (info->relocatable)
12397 return TRUE;
12398
eb043451 12399 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12400 if (globals == NULL)
12401 return FALSE;
5e681ec4
PB		 12402
12403 elf_section_data (sec)->local_dynrel = NULL;
12404
0ffa91dd 12405 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 12406 sym_hashes = elf_sym_hashes (abfd);
12407 local_got_refcounts = elf_local_got_refcounts (abfd);
12408
906e58ca 12409 check_use_blx (globals);
bd97cb95 12410
5e681ec4
PB		 12411 relend = relocs + sec->reloc_count;
12412 for (rel = relocs; rel < relend; rel++)
eb043451 12413 {
3eb128b2
AM		 12414 unsigned long r_symndx;
12415 struct elf_link_hash_entry *h = NULL;
f6e32f6d 12416 struct elf32_arm_link_hash_entry *eh;
eb043451 12417 int r_type;
34e77a92 12418 bfd_boolean call_reloc_p;
f6e32f6d
RS		 12419 bfd_boolean may_become_dynamic_p;
12420 bfd_boolean may_need_local_target_p;
34e77a92
RS		 12421 union gotplt_union *root_plt;
12422 struct arm_plt_info *arm_plt;
5e681ec4 12423
3eb128b2
AM		 12424 r_symndx = ELF32_R_SYM (rel->r_info);
12425 if (r_symndx >= symtab_hdr->sh_info)
12426 {
12427 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12428 while (h->root.type == bfd_link_hash_indirect
12429 || h->root.type == bfd_link_hash_warning)
12430 h = (struct elf_link_hash_entry *) h->root.u.i.link;
12431 }
f6e32f6d
RS		 12432 eh = (struct elf32_arm_link_hash_entry *) h;
12433
34e77a92 12434 call_reloc_p = FALSE;
f6e32f6d
RS		 12435 may_become_dynamic_p = FALSE;
12436 may_need_local_target_p = FALSE;
3eb128b2 12437
eb043451 12438 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12439 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 12440 switch (r_type)
12441 {
12442 case R_ARM_GOT32:
eb043451 12443 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12444 case R_ARM_TLS_GD32:
12445 case R_ARM_TLS_IE32:
3eb128b2 12446 if (h != NULL)
eb043451 12447 {
eb043451
PB		 12448 if (h->got.refcount > 0)
12449 h->got.refcount -= 1;
12450 }
12451 else if (local_got_refcounts != NULL)
12452 {
12453 if (local_got_refcounts[r_symndx] > 0)
12454 local_got_refcounts[r_symndx] -= 1;
12455 }
12456 break;
12457
ba93b8ac 12458 case R_ARM_TLS_LDM32:
4dfe6ac6 12459 globals->tls_ldm_got.refcount -= 1;
ba93b8ac
DJ		 12460 break;
12461
eb043451
PB		 12462 case R_ARM_PC24:
12463 case R_ARM_PLT32:
5b5bb741
PB		 12464 case R_ARM_CALL:
12465 case R_ARM_JUMP24:
eb043451 12466 case R_ARM_PREL31:
c19d1205 12467 case R_ARM_THM_CALL:
bd97cb95
DJ		 12468 case R_ARM_THM_JUMP24:
12469 case R_ARM_THM_JUMP19:
34e77a92 12470 call_reloc_p = TRUE;
f6e32f6d
RS		 12471 may_need_local_target_p = TRUE;
12472 break;
12473
12474 case R_ARM_ABS12:
12475 if (!globals->vxworks_p)
12476 {
12477 may_need_local_target_p = TRUE;
12478 break;
12479 }
12480 /* Fall through. */
12481 case R_ARM_ABS32:
12482 case R_ARM_ABS32_NOI:
12483 case R_ARM_REL32:
12484 case R_ARM_REL32_NOI:
b6895b4f
PB		 12485 case R_ARM_MOVW_ABS_NC:
12486 case R_ARM_MOVT_ABS:
12487 case R_ARM_MOVW_PREL_NC:
12488 case R_ARM_MOVT_PREL:
12489 case R_ARM_THM_MOVW_ABS_NC:
12490 case R_ARM_THM_MOVT_ABS:
12491 case R_ARM_THM_MOVW_PREL_NC:
12492 case R_ARM_THM_MOVT_PREL:
b7693d02 12493 /* Should the interworking branches be here also? */
f6e32f6d 12494 if ((info->shared || globals->root.is_relocatable_executable)
34e77a92
RS		 12495 && (sec->flags & SEC_ALLOC) != 0)
12496 {
12497 if (h == NULL
12498 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12499 {
12500 call_reloc_p = TRUE;
12501 may_need_local_target_p = TRUE;
12502 }
12503 else
12504 may_become_dynamic_p = TRUE;
12505 }
f6e32f6d
RS		 12506 else
12507 may_need_local_target_p = TRUE;
12508 break;
b7693d02 12509
f6e32f6d
RS		 12510 default:
12511 break;
12512 }
5e681ec4 12513
34e77a92
RS		 12514 if (may_need_local_target_p
12515 && elf32_arm_get_plt_info (abfd, eh, r_symndx, &root_plt, &arm_plt))
f6e32f6d 12516 {
27586251
HPN		 12517 /* If PLT refcount book-keeping is wrong and too low, we'll
12518 see a zero value (going to -1) for the root PLT reference
12519 count. */
12520 if (root_plt->refcount >= 0)
12521 {
12522 BFD_ASSERT (root_plt->refcount != 0);
12523 root_plt->refcount -= 1;
12524 }
12525 else
12526 /* A value of -1 means the symbol has become local, forced
12527 or seeing a hidden definition. Any other negative value
12528 is an error. */
12529 BFD_ASSERT (root_plt->refcount == -1);
34e77a92
RS		 12530
12531 if (!call_reloc_p)
12532 arm_plt->noncall_refcount--;
5e681ec4 12533
f6e32f6d 12534 if (r_type == R_ARM_THM_CALL)
34e77a92 12535 arm_plt->maybe_thumb_refcount--;
bd97cb95 12536
f6e32f6d
RS		 12537 if (r_type == R_ARM_THM_JUMP24
12538 || r_type == R_ARM_THM_JUMP19)
34e77a92 12539 arm_plt->thumb_refcount--;
f6e32f6d 12540 }
5e681ec4 12541
34e77a92 12542 if (may_become_dynamic_p)
f6e32f6d
RS		 12543 {
12544 struct elf_dyn_relocs **pp;
12545 struct elf_dyn_relocs *p;
5e681ec4 12546
34e77a92 12547 if (h != NULL)
9c489990 12548 pp = &(eh->dyn_relocs);
34e77a92
RS		 12549 else
12550 {
12551 Elf_Internal_Sym *isym;
12552
12553 isym = bfd_sym_from_r_symndx (&globals->sym_cache,
12554 abfd, r_symndx);
12555 if (isym == NULL)
12556 return FALSE;
12557 pp = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12558 if (pp == NULL)
12559 return FALSE;
12560 }
9c489990 12561 for (; (p = *pp) != NULL; pp = &p->next)
f6e32f6d
RS		 12562 if (p->sec == sec)
12563 {
12564 /* Everything must go for SEC. */
12565 *pp = p->next;
12566 break;
12567 }
eb043451
PB		 12568 }
12569 }
5e681ec4 12570
b34976b6 12571 return TRUE;
252b5132
RH		 12572}
12573
780a67af
NC		 12574/* Look through the relocs for a section during the first phase. */
12575
b34976b6 12576static bfd_boolean
57e8b36a
NC		 12577elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
12578 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 12579{
b34976b6
AM		 12580 Elf_Internal_Shdr *symtab_hdr;
12581 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 12582 const Elf_Internal_Rela *rel;
12583 const Elf_Internal_Rela *rel_end;
12584 bfd *dynobj;
5e681ec4 12585 asection *sreloc;
5e681ec4 12586 struct elf32_arm_link_hash_table *htab;
f6e32f6d
RS		 12587 bfd_boolean call_reloc_p;
12588 bfd_boolean may_become_dynamic_p;
12589 bfd_boolean may_need_local_target_p;
ce98a316 12590 unsigned long nsyms;
9a5aca8c 12591
1049f94e 12592 if (info->relocatable)
b34976b6 12593 return TRUE;
9a5aca8c 12594
0ffa91dd
NC		 12595 BFD_ASSERT (is_arm_elf (abfd));
12596
5e681ec4 12597 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 12598 if (htab == NULL)
12599 return FALSE;
12600
5e681ec4 12601 sreloc = NULL;
9a5aca8c 12602
67687978
PB		 12603 /* Create dynamic sections for relocatable executables so that we can
12604 copy relocations. */
12605 if (htab->root.is_relocatable_executable
12606 && ! htab->root.dynamic_sections_created)
12607 {
12608 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
12609 return FALSE;
12610 }
12611
cbc704f3
RS		 12612 if (htab->root.dynobj == NULL)
12613 htab->root.dynobj = abfd;
34e77a92
RS		 12614 if (!create_ifunc_sections (info))
12615 return FALSE;
cbc704f3
RS		 12616
12617 dynobj = htab->root.dynobj;
12618
0ffa91dd 12619 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 12620 sym_hashes = elf_sym_hashes (abfd);
ce98a316 12621 nsyms = NUM_SHDR_ENTRIES (symtab_hdr);
b38cadfb 12622
252b5132
RH		 12623 rel_end = relocs + sec->reloc_count;
12624 for (rel = relocs; rel < rel_end; rel++)
12625 {
34e77a92 12626 Elf_Internal_Sym *isym;
252b5132 12627 struct elf_link_hash_entry *h;
b7693d02 12628 struct elf32_arm_link_hash_entry *eh;
252b5132 12629 unsigned long r_symndx;
eb043451 12630 int r_type;
9a5aca8c 12631
252b5132 12632 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 12633 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 12634 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac 12635
ce98a316
NC		 12636 if (r_symndx >= nsyms
12637 /* PR 9934: It is possible to have relocations that do not
12638 refer to symbols, thus it is also possible to have an
12639 object file containing relocations but no symbol table. */
cf35638d 12640 && (r_symndx > STN_UNDEF || nsyms > 0))
ba93b8ac
DJ		 12641 {
12642 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
ce98a316 12643 r_symndx);
ba93b8ac
DJ		 12644 return FALSE;
12645 }
12646
34e77a92
RS		 12647 h = NULL;
12648 isym = NULL;
12649 if (nsyms > 0)
973a3492 12650 {
34e77a92
RS		 12651 if (r_symndx < symtab_hdr->sh_info)
12652 {
12653 /* A local symbol. */
12654 isym = bfd_sym_from_r_symndx (&htab->sym_cache,
12655 abfd, r_symndx);
12656 if (isym == NULL)
12657 return FALSE;
12658 }
12659 else
12660 {
12661 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
12662 while (h->root.type == bfd_link_hash_indirect
12663 || h->root.type == bfd_link_hash_warning)
12664 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 12665
12666 /* PR15323, ref flags aren't set for references in the
12667 same object. */
12668 h->root.non_ir_ref = 1;
34e77a92 12669 }
973a3492 12670 }
9a5aca8c 12671
b7693d02
DJ		 12672 eh = (struct elf32_arm_link_hash_entry *) h;
12673
f6e32f6d
RS		 12674 call_reloc_p = FALSE;
12675 may_become_dynamic_p = FALSE;
12676 may_need_local_target_p = FALSE;
12677
0855e32b
NS		 12678 /* Could be done earlier, if h were already available. */
12679 r_type = elf32_arm_tls_transition (info, r_type, h);
eb043451 12680 switch (r_type)
99059e56 12681 {
5e681ec4 12682 case R_ARM_GOT32:
eb043451 12683 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 12684 case R_ARM_TLS_GD32:
12685 case R_ARM_TLS_IE32:
0855e32b
NS		 12686 case R_ARM_TLS_GOTDESC:
12687 case R_ARM_TLS_DESCSEQ:
12688 case R_ARM_THM_TLS_DESCSEQ:
12689 case R_ARM_TLS_CALL:
12690 case R_ARM_THM_TLS_CALL:
5e681ec4 12691 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 12692 {
12693 int tls_type, old_tls_type;
5e681ec4 12694
ba93b8ac
DJ		 12695 switch (r_type)
12696 {
12697 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
b38cadfb 12698
ba93b8ac 12699 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
b38cadfb 12700
0855e32b
NS		 12701 case R_ARM_TLS_GOTDESC:
12702 case R_ARM_TLS_CALL: case R_ARM_THM_TLS_CALL:
12703 case R_ARM_TLS_DESCSEQ: case R_ARM_THM_TLS_DESCSEQ:
12704 tls_type = GOT_TLS_GDESC; break;
b38cadfb 12705
ba93b8ac
DJ		 12706 default: tls_type = GOT_NORMAL; break;
12707 }
252b5132 12708
ba93b8ac
DJ		 12709 if (h != NULL)
12710 {
12711 h->got.refcount++;
12712 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
12713 }
12714 else
12715 {
ba93b8ac 12716 /* This is a global offset table entry for a local symbol. */
34e77a92
RS		 12717 if (!elf32_arm_allocate_local_sym_info (abfd))
12718 return FALSE;
12719 elf_local_got_refcounts (abfd)[r_symndx] += 1;
ba93b8ac
DJ		 12720 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
12721 }
12722
0855e32b 12723 /* If a variable is accessed with both tls methods, two
99059e56 12724 slots may be created. */
0855e32b
NS		 12725 if (GOT_TLS_GD_ANY_P (old_tls_type)
12726 && GOT_TLS_GD_ANY_P (tls_type))
12727 tls_type |= old_tls_type;
12728
12729 /* We will already have issued an error message if there
12730 is a TLS/non-TLS mismatch, based on the symbol
12731 type. So just combine any TLS types needed. */
ba93b8ac
DJ		 12732 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
12733 && tls_type != GOT_NORMAL)
12734 tls_type |= old_tls_type;
12735
0855e32b 12736 /* If the symbol is accessed in both IE and GDESC
99059e56
RM		 12737 method, we're able to relax. Turn off the GDESC flag,
12738 without messing up with any other kind of tls types
6a631e86 12739 that may be involved. */
0855e32b
NS		 12740 if ((tls_type & GOT_TLS_IE) && (tls_type & GOT_TLS_GDESC))
12741 tls_type &= ~GOT_TLS_GDESC;
12742
ba93b8ac
DJ		 12743 if (old_tls_type != tls_type)
12744 {
12745 if (h != NULL)
12746 elf32_arm_hash_entry (h)->tls_type = tls_type;
12747 else
12748 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
12749 }
12750 }
8029a119 12751 /* Fall through. */
ba93b8ac
DJ		 12752
12753 case R_ARM_TLS_LDM32:
12754 if (r_type == R_ARM_TLS_LDM32)
12755 htab->tls_ldm_got.refcount++;
8029a119 12756 /* Fall through. */
252b5132 12757
c19d1205 12758 case R_ARM_GOTOFF32:
5e681ec4 12759 case R_ARM_GOTPC:
cbc704f3
RS		 12760 if (htab->root.sgot == NULL
12761 && !create_got_section (htab->root.dynobj, info))
12762 return FALSE;
252b5132
RH		 12763 break;
12764
252b5132 12765 case R_ARM_PC24:
7359ea65 12766 case R_ARM_PLT32:
5b5bb741
PB		 12767 case R_ARM_CALL:
12768 case R_ARM_JUMP24:
eb043451 12769 case R_ARM_PREL31:
c19d1205 12770 case R_ARM_THM_CALL:
bd97cb95
DJ		 12771 case R_ARM_THM_JUMP24:
12772 case R_ARM_THM_JUMP19:
f6e32f6d
RS		 12773 call_reloc_p = TRUE;
12774 may_need_local_target_p = TRUE;
12775 break;
12776
12777 case R_ARM_ABS12:
12778 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
12779 ldr __GOTT_INDEX__ offsets. */
12780 if (!htab->vxworks_p)
12781 {
12782 may_need_local_target_p = TRUE;
12783 break;
12784 }
12785 /* Fall through. */
39623e12 12786
96c23d59
JM		 12787 case R_ARM_MOVW_ABS_NC:
12788 case R_ARM_MOVT_ABS:
12789 case R_ARM_THM_MOVW_ABS_NC:
12790 case R_ARM_THM_MOVT_ABS:
12791 if (info->shared)
12792 {
12793 (*_bfd_error_handler)
12794 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"),
12795 abfd, elf32_arm_howto_table_1[r_type].name,
12796 (h) ? h->root.root.string : "a local symbol");
12797 bfd_set_error (bfd_error_bad_value);
12798 return FALSE;
12799 }
12800
12801 /* Fall through. */
39623e12
PB		 12802 case R_ARM_ABS32:
12803 case R_ARM_ABS32_NOI:
97323ad1
WN		 12804 if (h != NULL && info->executable)
12805 {
12806 h->pointer_equality_needed = 1;
12807 }
12808 /* Fall through. */
39623e12
PB		 12809 case R_ARM_REL32:
12810 case R_ARM_REL32_NOI:
b6895b4f
PB		 12811 case R_ARM_MOVW_PREL_NC:
12812 case R_ARM_MOVT_PREL:
b6895b4f
PB		 12813 case R_ARM_THM_MOVW_PREL_NC:
12814 case R_ARM_THM_MOVT_PREL:
39623e12 12815
b7693d02 12816 /* Should the interworking branches be listed here? */
67687978 12817 if ((info->shared || htab->root.is_relocatable_executable)
34e77a92
RS		 12818 && (sec->flags & SEC_ALLOC) != 0)
12819 {
12820 if (h == NULL
12821 && (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI))
12822 {
12823 /* In shared libraries and relocatable executables,
12824 we treat local relative references as calls;
12825 see the related SYMBOL_CALLS_LOCAL code in
12826 allocate_dynrelocs. */
12827 call_reloc_p = TRUE;
12828 may_need_local_target_p = TRUE;
12829 }
12830 else
12831 /* We are creating a shared library or relocatable
12832 executable, and this is a reloc against a global symbol,
12833 or a non-PC-relative reloc against a local symbol.
12834 We may need to copy the reloc into the output. */
12835 may_become_dynamic_p = TRUE;
12836 }
f6e32f6d
RS		 12837 else
12838 may_need_local_target_p = TRUE;
252b5132
RH		 12839 break;
12840
99059e56
RM		 12841 /* This relocation describes the C++ object vtable hierarchy.
12842 Reconstruct it for later use during GC. */
12843 case R_ARM_GNU_VTINHERIT:
12844 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
12845 return FALSE;
12846 break;
12847
12848 /* This relocation describes which C++ vtable entries are actually
12849 used. Record for later use during GC. */
12850 case R_ARM_GNU_VTENTRY:
12851 BFD_ASSERT (h != NULL);
12852 if (h != NULL
12853 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
12854 return FALSE;
12855 break;
12856 }
f6e32f6d
RS		 12857
12858 if (h != NULL)
12859 {
12860 if (call_reloc_p)
12861 /* We may need a .plt entry if the function this reloc
12862 refers to is in a different object, regardless of the
12863 symbol's type. We can't tell for sure yet, because
12864 something later might force the symbol local. */
12865 h->needs_plt = 1;
12866 else if (may_need_local_target_p)
12867 /* If this reloc is in a read-only section, we might
12868 need a copy reloc. We can't check reliably at this
12869 stage whether the section is read-only, as input
12870 sections have not yet been mapped to output sections.
12871 Tentatively set the flag for now, and correct in
12872 adjust_dynamic_symbol. */
12873 h->non_got_ref = 1;
12874 }
12875
34e77a92
RS		 12876 if (may_need_local_target_p
12877 && (h != NULL || ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC))
f6e32f6d 12878 {
34e77a92
RS		 12879 union gotplt_union *root_plt;
12880 struct arm_plt_info *arm_plt;
12881 struct arm_local_iplt_info *local_iplt;
12882
12883 if (h != NULL)
12884 {
12885 root_plt = &h->plt;
12886 arm_plt = &eh->plt;
12887 }
12888 else
12889 {
12890 local_iplt = elf32_arm_create_local_iplt (abfd, r_symndx);
12891 if (local_iplt == NULL)
12892 return FALSE;
12893 root_plt = &local_iplt->root;
12894 arm_plt = &local_iplt->arm;
12895 }
12896
f6e32f6d
RS		 12897 /* If the symbol is a function that doesn't bind locally,
12898 this relocation will need a PLT entry. */
a8c887dd
NC		 12899 if (root_plt->refcount != -1)
12900 root_plt->refcount += 1;
34e77a92
RS		 12901
12902 if (!call_reloc_p)
12903 arm_plt->noncall_refcount++;
f6e32f6d
RS		 12904
12905 /* It's too early to use htab->use_blx here, so we have to
12906 record possible blx references separately from
12907 relocs that definitely need a thumb stub. */
12908
12909 if (r_type == R_ARM_THM_CALL)
34e77a92 12910 arm_plt->maybe_thumb_refcount += 1;
f6e32f6d
RS		 12911
12912 if (r_type == R_ARM_THM_JUMP24
12913 || r_type == R_ARM_THM_JUMP19)
34e77a92 12914 arm_plt->thumb_refcount += 1;
f6e32f6d
RS		 12915 }
12916
12917 if (may_become_dynamic_p)
12918 {
12919 struct elf_dyn_relocs *p, **head;
12920
12921 /* Create a reloc section in dynobj. */
12922 if (sreloc == NULL)
12923 {
12924 sreloc = _bfd_elf_make_dynamic_reloc_section
12925 (sec, dynobj, 2, abfd, ! htab->use_rel);
12926
12927 if (sreloc == NULL)
12928 return FALSE;
12929
12930 /* BPABI objects never have dynamic relocations mapped. */
12931 if (htab->symbian_p)
12932 {
12933 flagword flags;
12934
12935 flags = bfd_get_section_flags (dynobj, sreloc);
12936 flags &= ~(SEC_LOAD | SEC_ALLOC);
12937 bfd_set_section_flags (dynobj, sreloc, flags);
12938 }
12939 }
12940
12941 /* If this is a global symbol, count the number of
12942 relocations we need for this symbol. */
12943 if (h != NULL)
12944 head = &((struct elf32_arm_link_hash_entry *) h)->dyn_relocs;
12945 else
12946 {
34e77a92
RS		 12947 head = elf32_arm_get_local_dynreloc_list (abfd, r_symndx, isym);
12948 if (head == NULL)
f6e32f6d 12949 return FALSE;
f6e32f6d
RS		 12950 }
12951
12952 p = *head;
12953 if (p == NULL || p->sec != sec)
12954 {
12955 bfd_size_type amt = sizeof *p;
12956
12957 p = (struct elf_dyn_relocs *) bfd_alloc (htab->root.dynobj, amt);
12958 if (p == NULL)
12959 return FALSE;
12960 p->next = *head;
12961 *head = p;
12962 p->sec = sec;
12963 p->count = 0;
12964 p->pc_count = 0;
12965 }
12966
12967 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
12968 p->pc_count += 1;
12969 p->count += 1;
12970 }
252b5132 12971 }
f21f3fe0 12972
b34976b6 12973 return TRUE;
252b5132
RH		 12974}
12975
6a5bb875
PB		 12976/* Unwinding tables are not referenced directly. This pass marks them as
12977 required if the corresponding code section is marked. */
12978
12979static bfd_boolean
906e58ca
NC		 12980elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info,
12981 elf_gc_mark_hook_fn gc_mark_hook)
6a5bb875
PB		 12982{
12983 bfd *sub;
12984 Elf_Internal_Shdr **elf_shdrp;
12985 bfd_boolean again;
12986
7f6ab9f8
AM		 12987 _bfd_elf_gc_mark_extra_sections (info, gc_mark_hook);
12988
6a5bb875
PB		 12989 /* Marking EH data may cause additional code sections to be marked,
12990 requiring multiple passes. */
12991 again = TRUE;
12992 while (again)
12993 {
12994 again = FALSE;
c72f2fb2 12995 for (sub = info->input_bfds; sub != NULL; sub = sub->link.next)
6a5bb875
PB		 12996 {
12997 asection *o;
12998
0ffa91dd 12999 if (! is_arm_elf (sub))
6a5bb875
PB		 13000 continue;
13001
13002 elf_shdrp = elf_elfsections (sub);
13003 for (o = sub->sections; o != NULL; o = o->next)
13004 {
13005 Elf_Internal_Shdr *hdr;
0ffa91dd 13006
6a5bb875 13007 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 13008 if (hdr->sh_type == SHT_ARM_EXIDX
13009 && hdr->sh_link
13010 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 13011 && !o->gc_mark
13012 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
13013 {
13014 again = TRUE;
13015 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
13016 return FALSE;
13017 }
13018 }
13019 }
13020 }
13021
13022 return TRUE;
13023}
13024
3c9458e9
NC		 13025/* Treat mapping symbols as special target symbols. */
13026
13027static bfd_boolean
13028elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
13029{
b0796911
PB		 13030 return bfd_is_arm_special_symbol_name (sym->name,
13031 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 13032}
13033
0367ecfb
NC		 13034/* This is a copy of elf_find_function() from elf.c except that
13035 ARM mapping symbols are ignored when looking for function names
13036 and STT_ARM_TFUNC is considered to a function type. */
252b5132 13037
0367ecfb
NC		 13038static bfd_boolean
13039arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
13040 asection * section,
13041 asymbol ** symbols,
13042 bfd_vma offset,
13043 const char ** filename_ptr,
13044 const char ** functionname_ptr)
13045{
13046 const char * filename = NULL;
13047 asymbol * func = NULL;
13048 bfd_vma low_func = 0;
13049 asymbol ** p;
252b5132
RH		 13050
13051 for (p = symbols; *p != NULL; p++)
13052 {
13053 elf_symbol_type *q;
13054
13055 q = (elf_symbol_type *) *p;
13056
252b5132
RH		 13057 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
13058 {
13059 default:
13060 break;
13061 case STT_FILE:
13062 filename = bfd_asymbol_name (&q->symbol);
13063 break;
252b5132
RH		 13064 case STT_FUNC:
13065 case STT_ARM_TFUNC:
9d2da7ca 13066 case STT_NOTYPE:
b0796911 13067 /* Skip mapping symbols. */
0367ecfb 13068 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 13069 && bfd_is_arm_special_symbol_name (q->symbol.name,
13070 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 13071 continue;
13072 /* Fall through. */
6b40fcba 13073 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 13074 && q->symbol.value >= low_func
13075 && q->symbol.value <= offset)
13076 {
13077 func = (asymbol *) q;
13078 low_func = q->symbol.value;
13079 }
13080 break;
13081 }
13082 }
13083
13084 if (func == NULL)
b34976b6 13085 return FALSE;
252b5132 13086
0367ecfb
NC		 13087 if (filename_ptr)
13088 *filename_ptr = filename;
13089 if (functionname_ptr)
13090 *functionname_ptr = bfd_asymbol_name (func);
13091
13092 return TRUE;
906e58ca 13093}
0367ecfb
NC		 13094
13095
13096/* Find the nearest line to a particular section and offset, for error
13097 reporting. This code is a duplicate of the code in elf.c, except
13098 that it uses arm_elf_find_function. */
13099
13100static bfd_boolean
13101elf32_arm_find_nearest_line (bfd * abfd,
13102 asection * section,
13103 asymbol ** symbols,
13104 bfd_vma offset,
13105 const char ** filename_ptr,
13106 const char ** functionname_ptr,
13107 unsigned int * line_ptr)
13108{
13109 bfd_boolean found = FALSE;
13110
13111 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
13112
fc28f9aa 13113 if (_bfd_dwarf2_find_nearest_line (abfd, dwarf_debug_sections,
99059e56 13114 section, symbols, offset,
0367ecfb 13115 filename_ptr, functionname_ptr,
9b8d1a36 13116 line_ptr, NULL, 0,
0367ecfb
NC		 13117 & elf_tdata (abfd)->dwarf2_find_line_info))
13118 {
13119 if (!*functionname_ptr)
13120 arm_elf_find_function (abfd, section, symbols, offset,
13121 *filename_ptr ? NULL : filename_ptr,
13122 functionname_ptr);
f21f3fe0 13123
0367ecfb
NC		 13124 return TRUE;
13125 }
13126
13127 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
13128 & found, filename_ptr,
13129 functionname_ptr, line_ptr,
13130 & elf_tdata (abfd)->line_info))
13131 return FALSE;
13132
13133 if (found && (*functionname_ptr || *line_ptr))
13134 return TRUE;
13135
13136 if (symbols == NULL)
13137 return FALSE;
13138
13139 if (! arm_elf_find_function (abfd, section, symbols, offset,
13140 filename_ptr, functionname_ptr))
13141 return FALSE;
13142
13143 *line_ptr = 0;
b34976b6 13144 return TRUE;
252b5132
RH		 13145}
13146
4ab527b0
FF		 13147static bfd_boolean
13148elf32_arm_find_inliner_info (bfd * abfd,
13149 const char ** filename_ptr,
13150 const char ** functionname_ptr,
13151 unsigned int * line_ptr)
13152{
13153 bfd_boolean found;
13154 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
13155 functionname_ptr, line_ptr,
13156 & elf_tdata (abfd)->dwarf2_find_line_info);
13157 return found;
13158}
13159
252b5132
RH		 13160/* Adjust a symbol defined by a dynamic object and referenced by a
13161 regular object. The current definition is in some section of the
13162 dynamic object, but we're not including those sections. We have to
13163 change the definition to something the rest of the link can
13164 understand. */
13165
b34976b6 13166static bfd_boolean
57e8b36a
NC		 13167elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
13168 struct elf_link_hash_entry * h)
252b5132
RH		 13169{
13170 bfd * dynobj;
13171 asection * s;
b7693d02 13172 struct elf32_arm_link_hash_entry * eh;
67687978 13173 struct elf32_arm_link_hash_table *globals;
252b5132 13174
67687978 13175 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13176 if (globals == NULL)
13177 return FALSE;
13178
252b5132
RH		 13179 dynobj = elf_hash_table (info)->dynobj;
13180
13181 /* Make sure we know what is going on here. */
13182 BFD_ASSERT (dynobj != NULL
f5385ebf 13183 && (h->needs_plt
34e77a92 13184 || h->type == STT_GNU_IFUNC
f6e332e6 13185 || h->u.weakdef != NULL
f5385ebf
AM		 13186 || (h->def_dynamic
13187 && h->ref_regular
13188 && !h->def_regular)));
252b5132 13189
b7693d02
DJ		 13190 eh = (struct elf32_arm_link_hash_entry *) h;
13191
252b5132
RH		 13192 /* If this is a function, put it in the procedure linkage table. We
13193 will fill in the contents of the procedure linkage table later,
13194 when we know the address of the .got section. */
34e77a92 13195 if (h->type == STT_FUNC || h->type == STT_GNU_IFUNC || h->needs_plt)
252b5132 13196 {
34e77a92
RS		 13197 /* Calls to STT_GNU_IFUNC symbols always use a PLT, even if the
13198 symbol binds locally. */
5e681ec4 13199 if (h->plt.refcount <= 0
34e77a92
RS		 13200 || (h->type != STT_GNU_IFUNC
13201 && (SYMBOL_CALLS_LOCAL (info, h)
13202 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
13203 && h->root.type == bfd_link_hash_undefweak))))
252b5132
RH		 13204 {
13205 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 13206 file, but the symbol was never referred to by a dynamic
13207 object, or if all references were garbage collected. In
13208 such a case, we don't actually need to build a procedure
13209 linkage table, and we can just do a PC24 reloc instead. */
13210 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13211 eh->plt.thumb_refcount = 0;
13212 eh->plt.maybe_thumb_refcount = 0;
13213 eh->plt.noncall_refcount = 0;
f5385ebf 13214 h->needs_plt = 0;
252b5132
RH		 13215 }
13216
b34976b6 13217 return TRUE;
252b5132 13218 }
5e681ec4 13219 else
b7693d02
DJ		 13220 {
13221 /* It's possible that we incorrectly decided a .plt reloc was
13222 needed for an R_ARM_PC24 or similar reloc to a non-function sym
13223 in check_relocs. We can't decide accurately between function
13224 and non-function syms in check-relocs; Objects loaded later in
13225 the link may change h->type. So fix it now. */
13226 h->plt.offset = (bfd_vma) -1;
34e77a92
RS		 13227 eh->plt.thumb_refcount = 0;
13228 eh->plt.maybe_thumb_refcount = 0;
13229 eh->plt.noncall_refcount = 0;
b7693d02 13230 }
252b5132
RH		 13231
13232 /* If this is a weak symbol, and there is a real definition, the
13233 processor independent code will have arranged for us to see the
13234 real definition first, and we can just use the same value. */
f6e332e6 13235 if (h->u.weakdef != NULL)
252b5132 13236 {
f6e332e6
AM		 13237 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
13238 || h->u.weakdef->root.type == bfd_link_hash_defweak);
13239 h->root.u.def.section = h->u.weakdef->root.u.def.section;
13240 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 13241 return TRUE;
252b5132
RH		 13242 }
13243
ba93b8ac
DJ		 13244 /* If there are no non-GOT references, we do not need a copy
13245 relocation. */
13246 if (!h->non_got_ref)
13247 return TRUE;
13248
252b5132
RH		 13249 /* This is a reference to a symbol defined by a dynamic object which
13250 is not a function. */
13251
13252 /* If we are creating a shared library, we must presume that the
13253 only references to the symbol are via the global offset table.
13254 For such cases we need not do anything here; the relocations will
67687978
PB		 13255 be handled correctly by relocate_section. Relocatable executables
13256 can reference data in shared objects directly, so we don't need to
13257 do anything here. */
13258 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 13259 return TRUE;
252b5132
RH		 13260
13261 /* We must allocate the symbol in our .dynbss section, which will
13262 become part of the .bss section of the executable. There will be
13263 an entry for this symbol in the .dynsym section. The dynamic
13264 object will contain position independent code, so all references
13265 from the dynamic object to this symbol will go through the global
13266 offset table. The dynamic linker will use the .dynsym entry to
13267 determine the address it must put in the global offset table, so
13268 both the dynamic object and the regular object will refer to the
13269 same memory location for the variable. */
3d4d4302 13270 s = bfd_get_linker_section (dynobj, ".dynbss");
252b5132
RH		 13271 BFD_ASSERT (s != NULL);
13272
13273 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
13274 copy the initial value out of the dynamic object and into the
13275 runtime process image. We need to remember the offset into the
00a97672 13276 .rel(a).bss section we are going to use. */
1d7e9d18 13277 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
252b5132
RH		 13278 {
13279 asection *srel;
13280
3d4d4302 13281 srel = bfd_get_linker_section (dynobj, RELOC_SECTION (globals, ".bss"));
47beaa6a 13282 elf32_arm_allocate_dynrelocs (info, srel, 1);
f5385ebf 13283 h->needs_copy = 1;
252b5132
RH		 13284 }
13285
027297b7 13286 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 13287}
13288
5e681ec4
PB		 13289/* Allocate space in .plt, .got and associated reloc sections for
13290 dynamic relocs. */
13291
13292static bfd_boolean
47beaa6a 13293allocate_dynrelocs_for_symbol (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 13294{
13295 struct bfd_link_info *info;
13296 struct elf32_arm_link_hash_table *htab;
13297 struct elf32_arm_link_hash_entry *eh;
0bdcacaf 13298 struct elf_dyn_relocs *p;
5e681ec4
PB		 13299
13300 if (h->root.type == bfd_link_hash_indirect)
13301 return TRUE;
13302
e6a6bb22
AM		 13303 eh = (struct elf32_arm_link_hash_entry *) h;
13304
5e681ec4
PB		 13305 info = (struct bfd_link_info *) inf;
13306 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13307 if (htab == NULL)
13308 return FALSE;
5e681ec4 13309
34e77a92 13310 if ((htab->root.dynamic_sections_created || h->type == STT_GNU_IFUNC)
5e681ec4
PB		 13311 && h->plt.refcount > 0)
13312 {
13313 /* Make sure this symbol is output as a dynamic symbol.
13314 Undefined weak syms won't yet be marked as dynamic. */
13315 if (h->dynindx == -1
f5385ebf 13316 && !h->forced_local)
5e681ec4 13317 {
c152c796 13318 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13319 return FALSE;
13320 }
13321
34e77a92
RS		 13322 /* If the call in the PLT entry binds locally, the associated
13323 GOT entry should use an R_ARM_IRELATIVE relocation instead of
13324 the usual R_ARM_JUMP_SLOT. Put it in the .iplt section rather
13325 than the .plt section. */
13326 if (h->type == STT_GNU_IFUNC && SYMBOL_CALLS_LOCAL (info, h))
13327 {
13328 eh->is_iplt = 1;
13329 if (eh->plt.noncall_refcount == 0
13330 && SYMBOL_REFERENCES_LOCAL (info, h))
13331 /* All non-call references can be resolved directly.
13332 This means that they can (and in some cases, must)
13333 resolve directly to the run-time target, rather than
13334 to the PLT. That in turns means that any .got entry
13335 would be equal to the .igot.plt entry, so there's
13336 no point having both. */
13337 h->got.refcount = 0;
13338 }
13339
5e681ec4 13340 if (info->shared
34e77a92 13341 || eh->is_iplt
7359ea65 13342 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4 13343 {
34e77a92 13344 elf32_arm_allocate_plt_entry (info, eh->is_iplt, &h->plt, &eh->plt);
b7693d02 13345
5e681ec4
PB		 13346 /* If this symbol is not defined in a regular file, and we are
13347 not generating a shared library, then set the symbol to this
13348 location in the .plt. This is required to make function
13349 pointers compare as equal between the normal executable and
13350 the shared library. */
13351 if (! info->shared
f5385ebf 13352 && !h->def_regular)
5e681ec4 13353 {
34e77a92 13354 h->root.u.def.section = htab->root.splt;
5e681ec4 13355 h->root.u.def.value = h->plt.offset;
5e681ec4 13356
67d74e43
DJ		 13357 /* Make sure the function is not marked as Thumb, in case
13358 it is the target of an ABS32 relocation, which will
13359 point to the PLT entry. */
35fc36a8 13360 h->target_internal = ST_BRANCH_TO_ARM;
67d74e43 13361 }
022f8312 13362
0855e32b 13363 htab->next_tls_desc_index++;
00a97672
RS		 13364
13365 /* VxWorks executables have a second set of relocations for
13366 each PLT entry. They go in a separate relocation section,
13367 which is processed by the kernel loader. */
13368 if (htab->vxworks_p && !info->shared)
13369 {
13370 /* There is a relocation for the initial PLT entry:
13371 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
13372 if (h->plt.offset == htab->plt_header_size)
47beaa6a 13373 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 1);
00a97672
RS		 13374
13375 /* There are two extra relocations for each subsequent
13376 PLT entry: an R_ARM_32 relocation for the GOT entry,
13377 and an R_ARM_32 relocation for the PLT entry. */
47beaa6a 13378 elf32_arm_allocate_dynrelocs (info, htab->srelplt2, 2);
00a97672 13379 }
5e681ec4
PB		 13380 }
13381 else
13382 {
13383 h->plt.offset = (bfd_vma) -1;
f5385ebf 13384 h->needs_plt = 0;
5e681ec4
PB		 13385 }
13386 }
13387 else
13388 {
13389 h->plt.offset = (bfd_vma) -1;
f5385ebf 13390 h->needs_plt = 0;
5e681ec4
PB		 13391 }
13392
0855e32b
NS		 13393 eh = (struct elf32_arm_link_hash_entry *) h;
13394 eh->tlsdesc_got = (bfd_vma) -1;
13395
5e681ec4
PB		 13396 if (h->got.refcount > 0)
13397 {
13398 asection *s;
13399 bfd_boolean dyn;
ba93b8ac
DJ		 13400 int tls_type = elf32_arm_hash_entry (h)->tls_type;
13401 int indx;
5e681ec4
PB		 13402
13403 /* Make sure this symbol is output as a dynamic symbol.
13404 Undefined weak syms won't yet be marked as dynamic. */
13405 if (h->dynindx == -1
f5385ebf 13406 && !h->forced_local)
5e681ec4 13407 {
c152c796 13408 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13409 return FALSE;
13410 }
13411
e5a52504
MM		 13412 if (!htab->symbian_p)
13413 {
362d30a1 13414 s = htab->root.sgot;
e5a52504 13415 h->got.offset = s->size;
ba93b8ac
DJ		 13416
13417 if (tls_type == GOT_UNKNOWN)
13418 abort ();
13419
13420 if (tls_type == GOT_NORMAL)
13421 /* Non-TLS symbols need one GOT slot. */
13422 s->size += 4;
13423 else
13424 {
99059e56
RM		 13425 if (tls_type & GOT_TLS_GDESC)
13426 {
0855e32b 13427 /* R_ARM_TLS_DESC needs 2 GOT slots. */
99059e56 13428 eh->tlsdesc_got
0855e32b
NS		 13429 = (htab->root.sgotplt->size
13430 - elf32_arm_compute_jump_table_size (htab));
99059e56
RM		 13431 htab->root.sgotplt->size += 8;
13432 h->got.offset = (bfd_vma) -2;
34e77a92 13433 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13434 reloc in the middle of .got.plt. */
99059e56
RM		 13435 htab->num_tls_desc++;
13436 }
0855e32b 13437
ba93b8ac 13438 if (tls_type & GOT_TLS_GD)
0855e32b
NS		 13439 {
13440 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. If
13441 the symbol is both GD and GDESC, got.offset may
13442 have been overwritten. */
13443 h->got.offset = s->size;
13444 s->size += 8;
13445 }
13446
ba93b8ac
DJ		 13447 if (tls_type & GOT_TLS_IE)
13448 /* R_ARM_TLS_IE32 needs one GOT slot. */
13449 s->size += 4;
13450 }
13451
e5a52504 13452 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 13453
13454 indx = 0;
13455 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
13456 && (!info->shared
13457 || !SYMBOL_REFERENCES_LOCAL (info, h)))
13458 indx = h->dynindx;
13459
13460 if (tls_type != GOT_NORMAL
13461 && (info->shared || indx != 0)
13462 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13463 || h->root.type != bfd_link_hash_undefweak))
13464 {
13465 if (tls_type & GOT_TLS_IE)
47beaa6a 13466 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13467
13468 if (tls_type & GOT_TLS_GD)
47beaa6a 13469 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13470
b38cadfb 13471 if (tls_type & GOT_TLS_GDESC)
0855e32b 13472 {
47beaa6a 13473 elf32_arm_allocate_dynrelocs (info, htab->root.srelplt, 1);
0855e32b
NS		 13474 /* GDESC needs a trampoline to jump to. */
13475 htab->tls_trampoline = -1;
13476 }
13477
13478 /* Only GD needs it. GDESC just emits one relocation per
13479 2 entries. */
b38cadfb 13480 if ((tls_type & GOT_TLS_GD) && indx != 0)
47beaa6a 13481 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac 13482 }
6f820c85 13483 else if (indx != -1 && !SYMBOL_REFERENCES_LOCAL (info, h))
b436d854
RS		 13484 {
13485 if (htab->root.dynamic_sections_created)
13486 /* Reserve room for the GOT entry's R_ARM_GLOB_DAT relocation. */
13487 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
13488 }
34e77a92
RS		 13489 else if (h->type == STT_GNU_IFUNC
13490 && eh->plt.noncall_refcount == 0)
13491 /* No non-call references resolve the STT_GNU_IFUNC's PLT entry;
13492 they all resolve dynamically instead. Reserve room for the
13493 GOT entry's R_ARM_IRELATIVE relocation. */
13494 elf32_arm_allocate_irelocs (info, htab->root.srelgot, 1);
31943882
WN		 13495 else if (info->shared && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
13496 || h->root.type != bfd_link_hash_undefweak))
b436d854 13497 /* Reserve room for the GOT entry's R_ARM_RELATIVE relocation. */
47beaa6a 13498 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
e5a52504 13499 }
5e681ec4
PB		 13500 }
13501 else
13502 h->got.offset = (bfd_vma) -1;
13503
a4fd1a8e
PB		 13504 /* Allocate stubs for exported Thumb functions on v4t. */
13505 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 13506 && h->def_regular
35fc36a8 13507 && h->target_internal == ST_BRANCH_TO_THUMB
a4fd1a8e
PB		 13508 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
13509 {
13510 struct elf_link_hash_entry * th;
13511 struct bfd_link_hash_entry * bh;
13512 struct elf_link_hash_entry * myh;
13513 char name[1024];
13514 asection *s;
13515 bh = NULL;
13516 /* Create a new symbol to regist the real location of the function. */
13517 s = h->root.u.def.section;
906e58ca 13518 sprintf (name, "__real_%s", h->root.root.string);
a4fd1a8e
PB		 13519 _bfd_generic_link_add_one_symbol (info, s->owner,
13520 name, BSF_GLOBAL, s,
13521 h->root.u.def.value,
13522 NULL, TRUE, FALSE, &bh);
13523
13524 myh = (struct elf_link_hash_entry *) bh;
35fc36a8 13525 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
a4fd1a8e 13526 myh->forced_local = 1;
35fc36a8 13527 myh->target_internal = ST_BRANCH_TO_THUMB;
a4fd1a8e
PB		 13528 eh->export_glue = myh;
13529 th = record_arm_to_thumb_glue (info, h);
13530 /* Point the symbol at the stub. */
13531 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
35fc36a8 13532 h->target_internal = ST_BRANCH_TO_ARM;
a4fd1a8e
PB		 13533 h->root.u.def.section = th->root.u.def.section;
13534 h->root.u.def.value = th->root.u.def.value & ~1;
13535 }
13536
0bdcacaf 13537 if (eh->dyn_relocs == NULL)
5e681ec4
PB		 13538 return TRUE;
13539
13540 /* In the shared -Bsymbolic case, discard space allocated for
13541 dynamic pc-relative relocs against symbols which turn out to be
13542 defined in regular objects. For the normal shared case, discard
13543 space for pc-relative relocs that have become local due to symbol
13544 visibility changes. */
13545
67687978 13546 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 13547 {
7bdca076 13548 /* The only relocs that use pc_count are R_ARM_REL32 and
99059e56
RM		 13549 R_ARM_REL32_NOI, which will appear on something like
13550 ".long foo - .". We want calls to protected symbols to resolve
13551 directly to the function rather than going via the plt. If people
13552 want function pointer comparisons to work as expected then they
13553 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 13554 if (SYMBOL_CALLS_LOCAL (info, h))
13555 {
0bdcacaf 13556 struct elf_dyn_relocs **pp;
ba93b8ac 13557
0bdcacaf 13558 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
ba93b8ac
DJ		 13559 {
13560 p->count -= p->pc_count;
13561 p->pc_count = 0;
13562 if (p->count == 0)
13563 *pp = p->next;
13564 else
13565 pp = &p->next;
13566 }
13567 }
13568
4dfe6ac6 13569 if (htab->vxworks_p)
3348747a 13570 {
0bdcacaf 13571 struct elf_dyn_relocs **pp;
3348747a 13572
0bdcacaf 13573 for (pp = &eh->dyn_relocs; (p = *pp) != NULL; )
3348747a 13574 {
0bdcacaf 13575 if (strcmp (p->sec->output_section->name, ".tls_vars") == 0)
3348747a
NS		 13576 *pp = p->next;
13577 else
13578 pp = &p->next;
13579 }
13580 }
13581
ba93b8ac 13582 /* Also discard relocs on undefined weak syms with non-default
99059e56 13583 visibility. */
0bdcacaf 13584 if (eh->dyn_relocs != NULL
5e681ec4 13585 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 13586 {
13587 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
0bdcacaf 13588 eh->dyn_relocs = NULL;
22d606e9
AM		 13589
13590 /* Make sure undefined weak symbols are output as a dynamic
13591 symbol in PIEs. */
13592 else if (h->dynindx == -1
13593 && !h->forced_local)
13594 {
13595 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13596 return FALSE;
13597 }
13598 }
13599
67687978
PB		 13600 else if (htab->root.is_relocatable_executable && h->dynindx == -1
13601 && h->root.type == bfd_link_hash_new)
13602 {
13603 /* Output absolute symbols so that we can create relocations
13604 against them. For normal symbols we output a relocation
13605 against the section that contains them. */
13606 if (! bfd_elf_link_record_dynamic_symbol (info, h))
13607 return FALSE;
13608 }
13609
5e681ec4
PB		 13610 }
13611 else
13612 {
13613 /* For the non-shared case, discard space for relocs against
13614 symbols which turn out to need copy relocs or are not
13615 dynamic. */
13616
f5385ebf
AM		 13617 if (!h->non_got_ref
13618 && ((h->def_dynamic
13619 && !h->def_regular)
5e681ec4
PB		 13620 || (htab->root.dynamic_sections_created
13621 && (h->root.type == bfd_link_hash_undefweak
13622 || h->root.type == bfd_link_hash_undefined))))
13623 {
13624 /* Make sure this symbol is output as a dynamic symbol.
13625 Undefined weak syms won't yet be marked as dynamic. */
13626 if (h->dynindx == -1
f5385ebf 13627 && !h->forced_local)
5e681ec4 13628 {
c152c796 13629 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 13630 return FALSE;
13631 }
13632
13633 /* If that succeeded, we know we'll be keeping all the
13634 relocs. */
13635 if (h->dynindx != -1)
13636 goto keep;
13637 }
13638
0bdcacaf 13639 eh->dyn_relocs = NULL;
5e681ec4
PB		 13640
13641 keep: ;
13642 }
13643
13644 /* Finally, allocate space. */
0bdcacaf 13645 for (p = eh->dyn_relocs; p != NULL; p = p->next)
5e681ec4 13646 {
0bdcacaf 13647 asection *sreloc = elf_section_data (p->sec)->sreloc;
34e77a92
RS		 13648 if (h->type == STT_GNU_IFUNC
13649 && eh->plt.noncall_refcount == 0
13650 && SYMBOL_REFERENCES_LOCAL (info, h))
13651 elf32_arm_allocate_irelocs (info, sreloc, p->count);
13652 else
13653 elf32_arm_allocate_dynrelocs (info, sreloc, p->count);
5e681ec4
PB		 13654 }
13655
13656 return TRUE;
13657}
13658
08d1f311
DJ		 13659/* Find any dynamic relocs that apply to read-only sections. */
13660
13661static bfd_boolean
8029a119 13662elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf)
08d1f311 13663{
8029a119 13664 struct elf32_arm_link_hash_entry * eh;
0bdcacaf 13665 struct elf_dyn_relocs * p;
08d1f311 13666
08d1f311 13667 eh = (struct elf32_arm_link_hash_entry *) h;
0bdcacaf 13668 for (p = eh->dyn_relocs; p != NULL; p = p->next)
08d1f311 13669 {
0bdcacaf 13670 asection *s = p->sec;
08d1f311
DJ		 13671
13672 if (s != NULL && (s->flags & SEC_READONLY) != 0)
13673 {
13674 struct bfd_link_info *info = (struct bfd_link_info *) inf;
13675
13676 info->flags |= DF_TEXTREL;
13677
13678 /* Not an error, just cut short the traversal. */
13679 return FALSE;
13680 }
13681 }
13682 return TRUE;
13683}
13684
d504ffc8
DJ		 13685void
13686bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
13687 int byteswap_code)
13688{
13689 struct elf32_arm_link_hash_table *globals;
13690
13691 globals = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13692 if (globals == NULL)
13693 return;
13694
d504ffc8
DJ		 13695 globals->byteswap_code = byteswap_code;
13696}
13697
252b5132
RH		 13698/* Set the sizes of the dynamic sections. */
13699
b34976b6 13700static bfd_boolean
57e8b36a
NC		 13701elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
13702 struct bfd_link_info * info)
252b5132
RH		 13703{
13704 bfd * dynobj;
13705 asection * s;
b34976b6
AM		 13706 bfd_boolean plt;
13707 bfd_boolean relocs;
5e681ec4
PB		 13708 bfd *ibfd;
13709 struct elf32_arm_link_hash_table *htab;
252b5132 13710
5e681ec4 13711 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 13712 if (htab == NULL)
13713 return FALSE;
13714
252b5132
RH		 13715 dynobj = elf_hash_table (info)->dynobj;
13716 BFD_ASSERT (dynobj != NULL);
39b41c9c 13717 check_use_blx (htab);
252b5132
RH		 13718
13719 if (elf_hash_table (info)->dynamic_sections_created)
13720 {
13721 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 13722 if (info->executable)
252b5132 13723 {
3d4d4302 13724 s = bfd_get_linker_section (dynobj, ".interp");
252b5132 13725 BFD_ASSERT (s != NULL);
eea6121a 13726 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 13727 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
13728 }
13729 }
5e681ec4
PB		 13730
13731 /* Set up .got offsets for local syms, and space for local dynamic
13732 relocs. */
c72f2fb2 13733 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
252b5132 13734 {
5e681ec4
PB		 13735 bfd_signed_vma *local_got;
13736 bfd_signed_vma *end_local_got;
34e77a92 13737 struct arm_local_iplt_info **local_iplt_ptr, *local_iplt;
5e681ec4 13738 char *local_tls_type;
0855e32b 13739 bfd_vma *local_tlsdesc_gotent;
5e681ec4
PB		 13740 bfd_size_type locsymcount;
13741 Elf_Internal_Shdr *symtab_hdr;
13742 asection *srel;
4dfe6ac6 13743 bfd_boolean is_vxworks = htab->vxworks_p;
34e77a92 13744 unsigned int symndx;
5e681ec4 13745
0ffa91dd 13746 if (! is_arm_elf (ibfd))
5e681ec4
PB		 13747 continue;
13748
13749 for (s = ibfd->sections; s != NULL; s = s->next)
13750 {
0bdcacaf 13751 struct elf_dyn_relocs *p;
5e681ec4 13752
0bdcacaf 13753 for (p = (struct elf_dyn_relocs *)
99059e56 13754 elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4 13755 {
0bdcacaf
RS		 13756 if (!bfd_is_abs_section (p->sec)
13757 && bfd_is_abs_section (p->sec->output_section))
5e681ec4
PB		 13758 {
13759 /* Input section has been discarded, either because
13760 it is a copy of a linkonce section or due to
13761 linker script /DISCARD/, so we'll be discarding
13762 the relocs too. */
13763 }
3348747a 13764 else if (is_vxworks
0bdcacaf 13765 && strcmp (p->sec->output_section->name,
3348747a
NS		 13766 ".tls_vars") == 0)
13767 {
13768 /* Relocations in vxworks .tls_vars sections are
13769 handled specially by the loader. */
13770 }
5e681ec4
PB		 13771 else if (p->count != 0)
13772 {
0bdcacaf 13773 srel = elf_section_data (p->sec)->sreloc;
47beaa6a 13774 elf32_arm_allocate_dynrelocs (info, srel, p->count);
0bdcacaf 13775 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
5e681ec4
PB		 13776 info->flags |= DF_TEXTREL;
13777 }
13778 }
13779 }
13780
13781 local_got = elf_local_got_refcounts (ibfd);
13782 if (!local_got)
13783 continue;
13784
0ffa91dd 13785 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 13786 locsymcount = symtab_hdr->sh_info;
13787 end_local_got = local_got + locsymcount;
34e77a92 13788 local_iplt_ptr = elf32_arm_local_iplt (ibfd);
ba93b8ac 13789 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
0855e32b 13790 local_tlsdesc_gotent = elf32_arm_local_tlsdesc_gotent (ibfd);
34e77a92 13791 symndx = 0;
362d30a1
RS		 13792 s = htab->root.sgot;
13793 srel = htab->root.srelgot;
0855e32b 13794 for (; local_got < end_local_got;
34e77a92
RS		 13795 ++local_got, ++local_iplt_ptr, ++local_tls_type,
13796 ++local_tlsdesc_gotent, ++symndx)
5e681ec4 13797 {
0855e32b 13798 *local_tlsdesc_gotent = (bfd_vma) -1;
34e77a92
RS		 13799 local_iplt = *local_iplt_ptr;
13800 if (local_iplt != NULL)
13801 {
13802 struct elf_dyn_relocs *p;
13803
13804 if (local_iplt->root.refcount > 0)
13805 {
13806 elf32_arm_allocate_plt_entry (info, TRUE,
13807 &local_iplt->root,
13808 &local_iplt->arm);
13809 if (local_iplt->arm.noncall_refcount == 0)
13810 /* All references to the PLT are calls, so all
13811 non-call references can resolve directly to the
13812 run-time target. This means that the .got entry
13813 would be the same as the .igot.plt entry, so there's
13814 no point creating both. */
13815 *local_got = 0;
13816 }
13817 else
13818 {
13819 BFD_ASSERT (local_iplt->arm.noncall_refcount == 0);
13820 local_iplt->root.offset = (bfd_vma) -1;
13821 }
13822
13823 for (p = local_iplt->dyn_relocs; p != NULL; p = p->next)
13824 {
13825 asection *psrel;
13826
13827 psrel = elf_section_data (p->sec)->sreloc;
13828 if (local_iplt->arm.noncall_refcount == 0)
13829 elf32_arm_allocate_irelocs (info, psrel, p->count);
13830 else
13831 elf32_arm_allocate_dynrelocs (info, psrel, p->count);
13832 }
13833 }
5e681ec4
PB		 13834 if (*local_got > 0)
13835 {
34e77a92
RS		 13836 Elf_Internal_Sym *isym;
13837
eea6121a 13838 *local_got = s->size;
ba93b8ac
DJ		 13839 if (*local_tls_type & GOT_TLS_GD)
13840 /* TLS_GD relocs need an 8-byte structure in the GOT. */
13841 s->size += 8;
0855e32b
NS		 13842 if (*local_tls_type & GOT_TLS_GDESC)
13843 {
13844 *local_tlsdesc_gotent = htab->root.sgotplt->size
13845 - elf32_arm_compute_jump_table_size (htab);
13846 htab->root.sgotplt->size += 8;
13847 *local_got = (bfd_vma) -2;
34e77a92 13848 /* plt.got_offset needs to know there's a TLS_DESC
0855e32b 13849 reloc in the middle of .got.plt. */
99059e56 13850 htab->num_tls_desc++;
0855e32b 13851 }
ba93b8ac
DJ		 13852 if (*local_tls_type & GOT_TLS_IE)
13853 s->size += 4;
ba93b8ac 13854
0855e32b
NS		 13855 if (*local_tls_type & GOT_NORMAL)
13856 {
13857 /* If the symbol is both GD and GDESC, *local_got
13858 may have been overwritten. */
13859 *local_got = s->size;
13860 s->size += 4;
13861 }
13862
34e77a92
RS		 13863 isym = bfd_sym_from_r_symndx (&htab->sym_cache, ibfd, symndx);
13864 if (isym == NULL)
13865 return FALSE;
13866
13867 /* If all references to an STT_GNU_IFUNC PLT are calls,
13868 then all non-call references, including this GOT entry,
13869 resolve directly to the run-time target. */
13870 if (ELF32_ST_TYPE (isym->st_info) == STT_GNU_IFUNC
13871 && (local_iplt == NULL
13872 || local_iplt->arm.noncall_refcount == 0))
13873 elf32_arm_allocate_irelocs (info, srel, 1);
3064e1ff 13874 else if (info->shared || output_bfd->flags & DYNAMIC)
0855e32b 13875 {
3064e1ff
JB		 13876 if ((info->shared && !(*local_tls_type & GOT_TLS_GDESC))
13877 || *local_tls_type & GOT_TLS_GD)
13878 elf32_arm_allocate_dynrelocs (info, srel, 1);
99059e56 13879
3064e1ff
JB		 13880 if (info->shared && *local_tls_type & GOT_TLS_GDESC)
13881 {
13882 elf32_arm_allocate_dynrelocs (info,
13883 htab->root.srelplt, 1);
13884 htab->tls_trampoline = -1;
13885 }
0855e32b 13886 }
5e681ec4
PB		 13887 }
13888 else
13889 *local_got = (bfd_vma) -1;
13890 }
252b5132
RH		 13891 }
13892
ba93b8ac
DJ		 13893 if (htab->tls_ldm_got.refcount > 0)
13894 {
13895 /* Allocate two GOT entries and one dynamic relocation (if necessary)
13896 for R_ARM_TLS_LDM32 relocations. */
362d30a1
RS		 13897 htab->tls_ldm_got.offset = htab->root.sgot->size;
13898 htab->root.sgot->size += 8;
ba93b8ac 13899 if (info->shared)
47beaa6a 13900 elf32_arm_allocate_dynrelocs (info, htab->root.srelgot, 1);
ba93b8ac
DJ		 13901 }
13902 else
13903 htab->tls_ldm_got.offset = -1;
13904
5e681ec4
PB		 13905 /* Allocate global sym .plt and .got entries, and space for global
13906 sym dynamic relocs. */
47beaa6a 13907 elf_link_hash_traverse (& htab->root, allocate_dynrelocs_for_symbol, info);
252b5132 13908
d504ffc8 13909 /* Here we rummage through the found bfds to collect glue information. */
c72f2fb2 13910 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
c7b8f16e 13911 {
0ffa91dd 13912 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 13913 continue;
13914
c7b8f16e
JB		 13915 /* Initialise mapping tables for code/data. */
13916 bfd_elf32_arm_init_maps (ibfd);
906e58ca 13917
c7b8f16e
JB		 13918 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
13919 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
99059e56
RM		 13920 /* xgettext:c-format */
13921 _bfd_error_handler (_("Errors encountered processing file %s"),
c7b8f16e
JB		 13922 ibfd->filename);
13923 }
d504ffc8 13924
3e6b1042
DJ		 13925 /* Allocate space for the glue sections now that we've sized them. */
13926 bfd_elf32_arm_allocate_interworking_sections (info);
13927
0855e32b
NS		 13928 /* For every jump slot reserved in the sgotplt, reloc_count is
13929 incremented. However, when we reserve space for TLS descriptors,
13930 it's not incremented, so in order to compute the space reserved
13931 for them, it suffices to multiply the reloc count by the jump
13932 slot size. */
13933 if (htab->root.srelplt)
13934 htab->sgotplt_jump_table_size = elf32_arm_compute_jump_table_size(htab);
13935
13936 if (htab->tls_trampoline)
13937 {
13938 if (htab->root.splt->size == 0)
13939 htab->root.splt->size += htab->plt_header_size;
b38cadfb 13940
0855e32b
NS		 13941 htab->tls_trampoline = htab->root.splt->size;
13942 htab->root.splt->size += htab->plt_entry_size;
b38cadfb 13943
0855e32b 13944 /* If we're not using lazy TLS relocations, don't generate the
99059e56 13945 PLT and GOT entries they require. */
0855e32b
NS		 13946 if (!(info->flags & DF_BIND_NOW))
13947 {
13948 htab->dt_tlsdesc_got = htab->root.sgot->size;
13949 htab->root.sgot->size += 4;
13950
13951 htab->dt_tlsdesc_plt = htab->root.splt->size;
13952 htab->root.splt->size += 4 * ARRAY_SIZE (dl_tlsdesc_lazy_trampoline);
13953 }
13954 }
13955
252b5132
RH		 13956 /* The check_relocs and adjust_dynamic_symbol entry points have
13957 determined the sizes of the various dynamic sections. Allocate
13958 memory for them. */
b34976b6
AM		 13959 plt = FALSE;
13960 relocs = FALSE;
252b5132
RH		 13961 for (s = dynobj->sections; s != NULL; s = s->next)
13962 {
13963 const char * name;
252b5132
RH		 13964
13965 if ((s->flags & SEC_LINKER_CREATED) == 0)
13966 continue;
13967
13968 /* It's OK to base decisions on the section name, because none
13969 of the dynobj section names depend upon the input files. */
13970 name = bfd_get_section_name (dynobj, s);
13971
34e77a92 13972 if (s == htab->root.splt)
252b5132 13973 {
c456f082
AM		 13974 /* Remember whether there is a PLT. */
13975 plt = s->size != 0;
252b5132 13976 }
0112cd26 13977 else if (CONST_STRNEQ (name, ".rel"))
252b5132 13978 {
c456f082 13979 if (s->size != 0)
252b5132 13980 {
252b5132 13981 /* Remember whether there are any reloc sections other
00a97672 13982 than .rel(a).plt and .rela.plt.unloaded. */
362d30a1 13983 if (s != htab->root.srelplt && s != htab->srelplt2)
b34976b6 13984 relocs = TRUE;
252b5132
RH		 13985
13986 /* We use the reloc_count field as a counter if we need
13987 to copy relocs into the output file. */
13988 s->reloc_count = 0;
13989 }
13990 }
34e77a92
RS		 13991 else if (s != htab->root.sgot
13992 && s != htab->root.sgotplt
13993 && s != htab->root.iplt
13994 && s != htab->root.igotplt
13995 && s != htab->sdynbss)
252b5132
RH		 13996 {
13997 /* It's not one of our sections, so don't allocate space. */
13998 continue;
13999 }
14000
c456f082 14001 if (s->size == 0)
252b5132 14002 {
c456f082 14003 /* If we don't need this section, strip it from the
00a97672
RS		 14004 output file. This is mostly to handle .rel(a).bss and
14005 .rel(a).plt. We must create both sections in
c456f082
AM		 14006 create_dynamic_sections, because they must be created
14007 before the linker maps input sections to output
14008 sections. The linker does that before
14009 adjust_dynamic_symbol is called, and it is that
14010 function which decides whether anything needs to go
14011 into these sections. */
8423293d 14012 s->flags |= SEC_EXCLUDE;
252b5132
RH		 14013 continue;
14014 }
14015
c456f082
AM		 14016 if ((s->flags & SEC_HAS_CONTENTS) == 0)
14017 continue;
14018
252b5132 14019 /* Allocate memory for the section contents. */
21d799b5 14020 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size);
c456f082 14021 if (s->contents == NULL)
b34976b6 14022 return FALSE;
252b5132
RH		 14023 }
14024
14025 if (elf_hash_table (info)->dynamic_sections_created)
14026 {
14027 /* Add some entries to the .dynamic section. We fill in the
14028 values later, in elf32_arm_finish_dynamic_sections, but we
14029 must add the entries now so that we get the correct size for
14030 the .dynamic section. The DT_DEBUG entry is filled in by the
14031 dynamic linker and used by the debugger. */
dc810e39 14032#define add_dynamic_entry(TAG, VAL) \
5a580b3a 14033 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 14034
8532796c 14035 if (info->executable)
252b5132 14036 {
dc810e39 14037 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 14038 return FALSE;
252b5132
RH		 14039 }
14040
14041 if (plt)
14042 {
dc810e39
AM		 14043 if ( !add_dynamic_entry (DT_PLTGOT, 0)
14044 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 14045 || !add_dynamic_entry (DT_PLTREL,
14046 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 14047 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 14048 return FALSE;
0855e32b
NS		 14049
14050 if (htab->dt_tlsdesc_plt &&
b38cadfb 14051 (!add_dynamic_entry (DT_TLSDESC_PLT,0)
0855e32b 14052 || !add_dynamic_entry (DT_TLSDESC_GOT,0)))
b38cadfb 14053 return FALSE;
252b5132
RH		 14054 }
14055
14056 if (relocs)
14057 {
00a97672
RS		 14058 if (htab->use_rel)
14059 {
14060 if (!add_dynamic_entry (DT_REL, 0)
14061 || !add_dynamic_entry (DT_RELSZ, 0)
14062 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
14063 return FALSE;
14064 }
14065 else
14066 {
14067 if (!add_dynamic_entry (DT_RELA, 0)
14068 || !add_dynamic_entry (DT_RELASZ, 0)
14069 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
14070 return FALSE;
14071 }
252b5132
RH		 14072 }
14073
08d1f311
DJ		 14074 /* If any dynamic relocs apply to a read-only section,
14075 then we need a DT_TEXTREL entry. */
14076 if ((info->flags & DF_TEXTREL) == 0)
8029a119
NC		 14077 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs,
14078 info);
08d1f311 14079
99e4ae17 14080 if ((info->flags & DF_TEXTREL) != 0)
252b5132 14081 {
dc810e39 14082 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 14083 return FALSE;
252b5132 14084 }
7a2b07ff
NS		 14085 if (htab->vxworks_p
14086 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
14087 return FALSE;
252b5132 14088 }
8532796c 14089#undef add_dynamic_entry
252b5132 14090
b34976b6 14091 return TRUE;
252b5132
RH		 14092}
14093
0855e32b
NS		 14094/* Size sections even though they're not dynamic. We use it to setup
14095 _TLS_MODULE_BASE_, if needed. */
14096
14097static bfd_boolean
14098elf32_arm_always_size_sections (bfd *output_bfd,
99059e56 14099 struct bfd_link_info *info)
0855e32b
NS		 14100{
14101 asection *tls_sec;
14102
14103 if (info->relocatable)
14104 return TRUE;
14105
14106 tls_sec = elf_hash_table (info)->tls_sec;
14107
14108 if (tls_sec)
14109 {
14110 struct elf_link_hash_entry *tlsbase;
14111
14112 tlsbase = elf_link_hash_lookup
14113 (elf_hash_table (info), "_TLS_MODULE_BASE_", TRUE, TRUE, FALSE);
14114
14115 if (tlsbase)
99059e56
RM		 14116 {
14117 struct bfd_link_hash_entry *bh = NULL;
0855e32b 14118 const struct elf_backend_data *bed
99059e56 14119 = get_elf_backend_data (output_bfd);
0855e32b 14120
99059e56 14121 if (!(_bfd_generic_link_add_one_symbol
0855e32b
NS		 14122 (info, output_bfd, "_TLS_MODULE_BASE_", BSF_LOCAL,
14123 tls_sec, 0, NULL, FALSE,
14124 bed->collect, &bh)))
14125 return FALSE;
b38cadfb 14126
99059e56
RM		 14127 tlsbase->type = STT_TLS;
14128 tlsbase = (struct elf_link_hash_entry *)bh;
14129 tlsbase->def_regular = 1;
14130 tlsbase->other = STV_HIDDEN;
14131 (*bed->elf_backend_hide_symbol) (info, tlsbase, TRUE);
0855e32b
NS		 14132 }
14133 }
14134 return TRUE;
14135}
14136
252b5132
RH		 14137/* Finish up dynamic symbol handling. We set the contents of various
14138 dynamic sections here. */
14139
b34976b6 14140static bfd_boolean
906e58ca
NC		 14141elf32_arm_finish_dynamic_symbol (bfd * output_bfd,
14142 struct bfd_link_info * info,
14143 struct elf_link_hash_entry * h,
14144 Elf_Internal_Sym * sym)
252b5132 14145{
e5a52504 14146 struct elf32_arm_link_hash_table *htab;
b7693d02 14147 struct elf32_arm_link_hash_entry *eh;
252b5132 14148
e5a52504 14149 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 14150 if (htab == NULL)
14151 return FALSE;
14152
b7693d02 14153 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 14154
14155 if (h->plt.offset != (bfd_vma) -1)
14156 {
34e77a92 14157 if (!eh->is_iplt)
e5a52504 14158 {
34e77a92 14159 BFD_ASSERT (h->dynindx != -1);
57460bcf
NC		 14160 if (! elf32_arm_populate_plt_entry (output_bfd, info, &h->plt, &eh->plt,
14161 h->dynindx, 0))
14162 return FALSE;
e5a52504 14163 }
57e8b36a 14164
f5385ebf 14165 if (!h->def_regular)
252b5132
RH		 14166 {
14167 /* Mark the symbol as undefined, rather than as defined in
14168 the .plt section. Leave the value alone. */
14169 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 14170 /* If the symbol is weak, we do need to clear the value.
14171 Otherwise, the PLT entry would provide a definition for
14172 the symbol even if the symbol wasn't defined anywhere,
14173 and so the symbol would never be NULL. */
97323ad1 14174 if (!h->ref_regular_nonweak || !h->pointer_equality_needed)
d982ba73 14175 sym->st_value = 0;
252b5132 14176 }
34e77a92
RS		 14177 else if (eh->is_iplt && eh->plt.noncall_refcount != 0)
14178 {
14179 /* At least one non-call relocation references this .iplt entry,
14180 so the .iplt entry is the function's canonical address. */
14181 sym->st_info = ELF_ST_INFO (ELF_ST_BIND (sym->st_info), STT_FUNC);
14182 sym->st_target_internal = ST_BRANCH_TO_ARM;
14183 sym->st_shndx = (_bfd_elf_section_from_bfd_section
14184 (output_bfd, htab->root.iplt->output_section));
14185 sym->st_value = (h->plt.offset
14186 + htab->root.iplt->output_section->vma
14187 + htab->root.iplt->output_offset);
14188 }
252b5132
RH		 14189 }
14190
f5385ebf 14191 if (h->needs_copy)
252b5132
RH		 14192 {
14193 asection * s;
947216bf 14194 Elf_Internal_Rela rel;
252b5132
RH		 14195
14196 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 14197 BFD_ASSERT (h->dynindx != -1
14198 && (h->root.type == bfd_link_hash_defined
14199 || h->root.type == bfd_link_hash_defweak));
14200
362d30a1 14201 s = htab->srelbss;
252b5132
RH		 14202 BFD_ASSERT (s != NULL);
14203
00a97672 14204 rel.r_addend = 0;
252b5132
RH		 14205 rel.r_offset = (h->root.u.def.value
14206 + h->root.u.def.section->output_section->vma
14207 + h->root.u.def.section->output_offset);
14208 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
47beaa6a 14209 elf32_arm_add_dynreloc (output_bfd, info, s, &rel);
252b5132
RH		 14210 }
14211
00a97672
RS		 14212 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
14213 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
14214 to the ".got" section. */
9637f6ef 14215 if (h == htab->root.hdynamic
00a97672 14216 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 14217 sym->st_shndx = SHN_ABS;
14218
b34976b6 14219 return TRUE;
252b5132
RH		 14220}
14221
0855e32b
NS		 14222static void
14223arm_put_trampoline (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14224 void *contents,
14225 const unsigned long *template, unsigned count)
14226{
14227 unsigned ix;
b38cadfb 14228
0855e32b
NS		 14229 for (ix = 0; ix != count; ix++)
14230 {
14231 unsigned long insn = template[ix];
14232
14233 /* Emit mov pc,rx if bx is not permitted. */
14234 if (htab->fix_v4bx == 1 && (insn & 0x0ffffff0) == 0x012fff10)
14235 insn = (insn & 0xf000000f) | 0x01a0f000;
14236 put_arm_insn (htab, output_bfd, insn, (char *)contents + ix*4);
14237 }
14238}
14239
99059e56
RM		 14240/* Install the special first PLT entry for elf32-arm-nacl. Unlike
14241 other variants, NaCl needs this entry in a static executable's
14242 .iplt too. When we're handling that case, GOT_DISPLACEMENT is
14243 zero. For .iplt really only the last bundle is useful, and .iplt
14244 could have a shorter first entry, with each individual PLT entry's
14245 relative branch calculated differently so it targets the last
14246 bundle instead of the instruction before it (labelled .Lplt_tail
14247 above). But it's simpler to keep the size and layout of PLT0
14248 consistent with the dynamic case, at the cost of some dead code at
14249 the start of .iplt and the one dead store to the stack at the start
14250 of .Lplt_tail. */
14251static void
14252arm_nacl_put_plt0 (struct elf32_arm_link_hash_table *htab, bfd *output_bfd,
14253 asection *plt, bfd_vma got_displacement)
14254{
14255 unsigned int i;
14256
14257 put_arm_insn (htab, output_bfd,
14258 elf32_arm_nacl_plt0_entry[0]
14259 | arm_movw_immediate (got_displacement),
14260 plt->contents + 0);
14261 put_arm_insn (htab, output_bfd,
14262 elf32_arm_nacl_plt0_entry[1]
14263 | arm_movt_immediate (got_displacement),
14264 plt->contents + 4);
14265
14266 for (i = 2; i < ARRAY_SIZE (elf32_arm_nacl_plt0_entry); ++i)
14267 put_arm_insn (htab, output_bfd,
14268 elf32_arm_nacl_plt0_entry[i],
14269 plt->contents + (i * 4));
14270}
14271
252b5132
RH		 14272/* Finish up the dynamic sections. */
14273
b34976b6 14274static bfd_boolean
57e8b36a 14275elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 14276{
14277 bfd * dynobj;
14278 asection * sgot;
14279 asection * sdyn;
4dfe6ac6
NC		 14280 struct elf32_arm_link_hash_table *htab;
14281
14282 htab = elf32_arm_hash_table (info);
14283 if (htab == NULL)
14284 return FALSE;
252b5132
RH		 14285
14286 dynobj = elf_hash_table (info)->dynobj;
14287
362d30a1 14288 sgot = htab->root.sgotplt;
894891db
NC		 14289 /* A broken linker script might have discarded the dynamic sections.
14290 Catch this here so that we do not seg-fault later on. */
14291 if (sgot != NULL && bfd_is_abs_section (sgot->output_section))
14292 return FALSE;
3d4d4302 14293 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
252b5132
RH		 14294
14295 if (elf_hash_table (info)->dynamic_sections_created)
14296 {
14297 asection *splt;
14298 Elf32_External_Dyn *dyncon, *dynconend;
14299
362d30a1 14300 splt = htab->root.splt;
24a1ba0f 14301 BFD_ASSERT (splt != NULL && sdyn != NULL);
cbc704f3 14302 BFD_ASSERT (htab->symbian_p || sgot != NULL);
252b5132
RH		 14303
14304 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 14305 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 14306
252b5132
RH		 14307 for (; dyncon < dynconend; dyncon++)
14308 {
14309 Elf_Internal_Dyn dyn;
14310 const char * name;
14311 asection * s;
14312
14313 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
14314
14315 switch (dyn.d_tag)
14316 {
229fcec5
MM		 14317 unsigned int type;
14318
252b5132 14319 default:
7a2b07ff
NS		 14320 if (htab->vxworks_p
14321 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
14322 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 14323 break;
14324
229fcec5
MM		 14325 case DT_HASH:
14326 name = ".hash";
14327 goto get_vma_if_bpabi;
14328 case DT_STRTAB:
14329 name = ".dynstr";
14330 goto get_vma_if_bpabi;
14331 case DT_SYMTAB:
14332 name = ".dynsym";
14333 goto get_vma_if_bpabi;
c0042f5d
MM		 14334 case DT_VERSYM:
14335 name = ".gnu.version";
14336 goto get_vma_if_bpabi;
14337 case DT_VERDEF:
14338 name = ".gnu.version_d";
14339 goto get_vma_if_bpabi;
14340 case DT_VERNEED:
14341 name = ".gnu.version_r";
14342 goto get_vma_if_bpabi;
14343
252b5132
RH		 14344 case DT_PLTGOT:
14345 name = ".got";
14346 goto get_vma;
14347 case DT_JMPREL:
00a97672 14348 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 14349 get_vma:
14350 s = bfd_get_section_by_name (output_bfd, name);
05456594
NC		 14351 if (s == NULL)
14352 {
14353 /* PR ld/14397: Issue an error message if a required section is missing. */
14354 (*_bfd_error_handler)
14355 (_("error: required section '%s' not found in the linker script"), name);
14356 bfd_set_error (bfd_error_invalid_operation);
14357 return FALSE;
14358 }
229fcec5
MM		 14359 if (!htab->symbian_p)
14360 dyn.d_un.d_ptr = s->vma;
14361 else
14362 /* In the BPABI, tags in the PT_DYNAMIC section point
14363 at the file offset, not the memory address, for the
14364 convenience of the post linker. */
14365 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 14366 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14367 break;
14368
229fcec5
MM		 14369 get_vma_if_bpabi:
14370 if (htab->symbian_p)
14371 goto get_vma;
14372 break;
14373
252b5132 14374 case DT_PLTRELSZ:
362d30a1 14375 s = htab->root.srelplt;
252b5132 14376 BFD_ASSERT (s != NULL);
eea6121a 14377 dyn.d_un.d_val = s->size;
252b5132
RH		 14378 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14379 break;
906e58ca 14380
252b5132 14381 case DT_RELSZ:
00a97672 14382 case DT_RELASZ:
229fcec5
MM		 14383 if (!htab->symbian_p)
14384 {
14385 /* My reading of the SVR4 ABI indicates that the
14386 procedure linkage table relocs (DT_JMPREL) should be
14387 included in the overall relocs (DT_REL). This is
14388 what Solaris does. However, UnixWare can not handle
14389 that case. Therefore, we override the DT_RELSZ entry
14390 here to make it not include the JMPREL relocs. Since
00a97672 14391 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 14392 other relocation sections, we don't have to worry
14393 about changing the DT_REL entry. */
362d30a1 14394 s = htab->root.srelplt;
229fcec5
MM		 14395 if (s != NULL)
14396 dyn.d_un.d_val -= s->size;
14397 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14398 break;
14399 }
8029a119 14400 /* Fall through. */
229fcec5
MM		 14401
14402 case DT_REL:
14403 case DT_RELA:
229fcec5
MM		 14404 /* In the BPABI, the DT_REL tag must point at the file
14405 offset, not the VMA, of the first relocation
14406 section. So, we use code similar to that in
14407 elflink.c, but do not check for SHF_ALLOC on the
14408 relcoation section, since relocations sections are
14409 never allocated under the BPABI. The comments above
14410 about Unixware notwithstanding, we include all of the
14411 relocations here. */
14412 if (htab->symbian_p)
14413 {
14414 unsigned int i;
14415 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
14416 ? SHT_REL : SHT_RELA);
14417 dyn.d_un.d_val = 0;
14418 for (i = 1; i < elf_numsections (output_bfd); i++)
14419 {
906e58ca 14420 Elf_Internal_Shdr *hdr
229fcec5
MM		 14421 = elf_elfsections (output_bfd)[i];
14422 if (hdr->sh_type == type)
14423 {
906e58ca 14424 if (dyn.d_tag == DT_RELSZ
229fcec5
MM		 14425 || dyn.d_tag == DT_RELASZ)
14426 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 14427 else if ((ufile_ptr) hdr->sh_offset
14428 <= dyn.d_un.d_val - 1)
229fcec5
MM		 14429 dyn.d_un.d_val = hdr->sh_offset;
14430 }
14431 }
14432 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14433 }
252b5132 14434 break;
88f7bcd5 14435
0855e32b 14436 case DT_TLSDESC_PLT:
99059e56 14437 s = htab->root.splt;
0855e32b
NS		 14438 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
14439 + htab->dt_tlsdesc_plt);
14440 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14441 break;
14442
14443 case DT_TLSDESC_GOT:
99059e56 14444 s = htab->root.sgot;
0855e32b 14445 dyn.d_un.d_ptr = (s->output_section->vma + s->output_offset
99059e56 14446 + htab->dt_tlsdesc_got);
0855e32b
NS		 14447 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
14448 break;
14449
88f7bcd5
NC		 14450 /* Set the bottom bit of DT_INIT/FINI if the
14451 corresponding function is Thumb. */
14452 case DT_INIT:
14453 name = info->init_function;
14454 goto get_sym;
14455 case DT_FINI:
14456 name = info->fini_function;
14457 get_sym:
14458 /* If it wasn't set by elf_bfd_final_link
4cc11e76 14459 then there is nothing to adjust. */
88f7bcd5
NC		 14460 if (dyn.d_un.d_val != 0)
14461 {
14462 struct elf_link_hash_entry * eh;
14463
14464 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 14465 FALSE, FALSE, TRUE);
35fc36a8 14466 if (eh != NULL && eh->target_internal == ST_BRANCH_TO_THUMB)
88f7bcd5
NC		 14467 {
14468 dyn.d_un.d_val |= 1;
b34976b6 14469 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 14470 }
14471 }
14472 break;
252b5132
RH		 14473 }
14474 }
14475
24a1ba0f 14476 /* Fill in the first entry in the procedure linkage table. */
4dfe6ac6 14477 if (splt->size > 0 && htab->plt_header_size)
f7a74f8c 14478 {
00a97672
RS		 14479 const bfd_vma *plt0_entry;
14480 bfd_vma got_address, plt_address, got_displacement;
14481
14482 /* Calculate the addresses of the GOT and PLT. */
14483 got_address = sgot->output_section->vma + sgot->output_offset;
14484 plt_address = splt->output_section->vma + splt->output_offset;
14485
14486 if (htab->vxworks_p)
14487 {
14488 /* The VxWorks GOT is relocated by the dynamic linker.
14489 Therefore, we must emit relocations rather than simply
14490 computing the values now. */
14491 Elf_Internal_Rela rel;
14492
14493 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 14494 put_arm_insn (htab, output_bfd, plt0_entry[0],
14495 splt->contents + 0);
14496 put_arm_insn (htab, output_bfd, plt0_entry[1],
14497 splt->contents + 4);
14498 put_arm_insn (htab, output_bfd, plt0_entry[2],
14499 splt->contents + 8);
00a97672
RS		 14500 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
14501
8029a119 14502 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
00a97672
RS		 14503 rel.r_offset = plt_address + 12;
14504 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14505 rel.r_addend = 0;
14506 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
14507 htab->srelplt2->contents);
14508 }
b38cadfb 14509 else if (htab->nacl_p)
99059e56
RM		 14510 arm_nacl_put_plt0 (htab, output_bfd, splt,
14511 got_address + 8 - (plt_address + 16));
eed94f8f
NC		 14512 else if (using_thumb_only (htab))
14513 {
14514 got_displacement = got_address - (plt_address + 12);
14515
14516 plt0_entry = elf32_thumb2_plt0_entry;
14517 put_arm_insn (htab, output_bfd, plt0_entry[0],
14518 splt->contents + 0);
14519 put_arm_insn (htab, output_bfd, plt0_entry[1],
14520 splt->contents + 4);
14521 put_arm_insn (htab, output_bfd, plt0_entry[2],
14522 splt->contents + 8);
14523
14524 bfd_put_32 (output_bfd, got_displacement, splt->contents + 12);
14525 }
00a97672
RS		 14526 else
14527 {
14528 got_displacement = got_address - (plt_address + 16);
14529
14530 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 14531 put_arm_insn (htab, output_bfd, plt0_entry[0],
14532 splt->contents + 0);
14533 put_arm_insn (htab, output_bfd, plt0_entry[1],
14534 splt->contents + 4);
14535 put_arm_insn (htab, output_bfd, plt0_entry[2],
14536 splt->contents + 8);
14537 put_arm_insn (htab, output_bfd, plt0_entry[3],
14538 splt->contents + 12);
5e681ec4 14539
5e681ec4 14540#ifdef FOUR_WORD_PLT
00a97672
RS		 14541 /* The displacement value goes in the otherwise-unused
14542 last word of the second entry. */
14543 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 14544#else
00a97672 14545 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 14546#endif
00a97672 14547 }
f7a74f8c 14548 }
252b5132
RH		 14549
14550 /* UnixWare sets the entsize of .plt to 4, although that doesn't
14551 really seem like the right value. */
74541ad4
AM		 14552 if (splt->output_section->owner == output_bfd)
14553 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672 14554
0855e32b
NS		 14555 if (htab->dt_tlsdesc_plt)
14556 {
14557 bfd_vma got_address
14558 = sgot->output_section->vma + sgot->output_offset;
14559 bfd_vma gotplt_address = (htab->root.sgot->output_section->vma
14560 + htab->root.sgot->output_offset);
14561 bfd_vma plt_address
14562 = splt->output_section->vma + splt->output_offset;
14563
b38cadfb 14564 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14565 splt->contents + htab->dt_tlsdesc_plt,
14566 dl_tlsdesc_lazy_trampoline, 6);
14567
14568 bfd_put_32 (output_bfd,
14569 gotplt_address + htab->dt_tlsdesc_got
14570 - (plt_address + htab->dt_tlsdesc_plt)
14571 - dl_tlsdesc_lazy_trampoline[6],
14572 splt->contents + htab->dt_tlsdesc_plt + 24);
14573 bfd_put_32 (output_bfd,
14574 got_address - (plt_address + htab->dt_tlsdesc_plt)
14575 - dl_tlsdesc_lazy_trampoline[7],
14576 splt->contents + htab->dt_tlsdesc_plt + 24 + 4);
14577 }
14578
14579 if (htab->tls_trampoline)
14580 {
b38cadfb 14581 arm_put_trampoline (htab, output_bfd,
0855e32b
NS		 14582 splt->contents + htab->tls_trampoline,
14583 tls_trampoline, 3);
14584#ifdef FOUR_WORD_PLT
14585 bfd_put_32 (output_bfd, 0x00000000,
14586 splt->contents + htab->tls_trampoline + 12);
b38cadfb 14587#endif
0855e32b
NS		 14588 }
14589
362d30a1 14590 if (htab->vxworks_p && !info->shared && htab->root.splt->size > 0)
00a97672
RS		 14591 {
14592 /* Correct the .rel(a).plt.unloaded relocations. They will have
14593 incorrect symbol indexes. */
14594 int num_plts;
eed62c48 14595 unsigned char *p;
00a97672 14596
362d30a1 14597 num_plts = ((htab->root.splt->size - htab->plt_header_size)
00a97672
RS		 14598 / htab->plt_entry_size);
14599 p = htab->srelplt2->contents + RELOC_SIZE (htab);
14600
14601 for (; num_plts; num_plts--)
14602 {
14603 Elf_Internal_Rela rel;
14604
14605 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14606 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
14607 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14608 p += RELOC_SIZE (htab);
14609
14610 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
14611 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
14612 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
14613 p += RELOC_SIZE (htab);
14614 }
14615 }
252b5132
RH		 14616 }
14617
99059e56
RM		 14618 if (htab->nacl_p && htab->root.iplt != NULL && htab->root.iplt->size > 0)
14619 /* NaCl uses a special first entry in .iplt too. */
14620 arm_nacl_put_plt0 (htab, output_bfd, htab->root.iplt, 0);
14621
252b5132 14622 /* Fill in the first three entries in the global offset table. */
229fcec5 14623 if (sgot)
252b5132 14624 {
229fcec5
MM		 14625 if (sgot->size > 0)
14626 {
14627 if (sdyn == NULL)
14628 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
14629 else
14630 bfd_put_32 (output_bfd,
14631 sdyn->output_section->vma + sdyn->output_offset,
14632 sgot->contents);
14633 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
14634 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
14635 }
252b5132 14636
229fcec5
MM		 14637 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
14638 }
252b5132 14639
b34976b6 14640 return TRUE;
252b5132
RH		 14641}
14642
ba96a88f 14643static void
57e8b36a 14644elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 14645{
9b485d32 14646 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 14647 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 14648
14649 i_ehdrp = elf_elfheader (abfd);
14650
94a3258f
PB		 14651 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
14652 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
14653 else
7394f108 14654 _bfd_elf_post_process_headers (abfd, link_info);
ba96a88f 14655 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 14656
93204d3a
PB		 14657 if (link_info)
14658 {
14659 globals = elf32_arm_hash_table (link_info);
4dfe6ac6 14660 if (globals != NULL && globals->byteswap_code)
93204d3a
PB		 14661 i_ehdrp->e_flags |= EF_ARM_BE8;
14662 }
3bfcb652
NC		 14663
14664 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_VER5
14665 && ((i_ehdrp->e_type == ET_DYN) || (i_ehdrp->e_type == ET_EXEC)))
14666 {
14667 int abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_PROC, Tag_ABI_VFP_args);
14668 if (abi)
14669 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_HARD;
14670 else
14671 i_ehdrp->e_flags |= EF_ARM_ABI_FLOAT_SOFT;
14672 }
ba96a88f
NC		 14673}
14674
99e4ae17 14675static enum elf_reloc_type_class
7e612e98
AM		 14676elf32_arm_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
14677 const asection *rel_sec ATTRIBUTE_UNUSED,
14678 const Elf_Internal_Rela *rela)
99e4ae17 14679{
f51e552e 14680 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 14681 {
14682 case R_ARM_RELATIVE:
14683 return reloc_class_relative;
14684 case R_ARM_JUMP_SLOT:
14685 return reloc_class_plt;
14686 case R_ARM_COPY:
14687 return reloc_class_copy;
14688 default:
14689 return reloc_class_normal;
14690 }
14691}
14692
e489d0ae 14693static void
57e8b36a 14694elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 14695{
5a6c6817 14696 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 14697}
14698
40a18ebd
NC		 14699/* Return TRUE if this is an unwinding table entry. */
14700
14701static bfd_boolean
14702is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
14703{
0112cd26
NC		 14704 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
14705 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 14706}
14707
14708
14709/* Set the type and flags for an ARM section. We do this by
14710 the section name, which is a hack, but ought to work. */
14711
14712static bfd_boolean
14713elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
14714{
14715 const char * name;
14716
14717 name = bfd_get_section_name (abfd, sec);
14718
14719 if (is_arm_elf_unwind_section_name (abfd, name))
14720 {
14721 hdr->sh_type = SHT_ARM_EXIDX;
14722 hdr->sh_flags |= SHF_LINK_ORDER;
14723 }
14724 return TRUE;
14725}
14726
6dc132d9
L		 14727/* Handle an ARM specific section when reading an object file. This is
14728 called when bfd_section_from_shdr finds a section with an unknown
14729 type. */
40a18ebd
NC		 14730
14731static bfd_boolean
14732elf32_arm_section_from_shdr (bfd *abfd,
14733 Elf_Internal_Shdr * hdr,
6dc132d9
L		 14734 const char *name,
14735 int shindex)
40a18ebd
NC		 14736{
14737 /* There ought to be a place to keep ELF backend specific flags, but
14738 at the moment there isn't one. We just keep track of the
14739 sections by their name, instead. Fortunately, the ABI gives
14740 names for all the ARM specific sections, so we will probably get
14741 away with this. */
14742 switch (hdr->sh_type)
14743 {
14744 case SHT_ARM_EXIDX:
0951f019
RE		 14745 case SHT_ARM_PREEMPTMAP:
14746 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 14747 break;
14748
14749 default:
14750 return FALSE;
14751 }
14752
6dc132d9 14753 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 14754 return FALSE;
14755
14756 return TRUE;
14757}
e489d0ae 14758
44444f50
NC		 14759static _arm_elf_section_data *
14760get_arm_elf_section_data (asection * sec)
14761{
47b2e99c
JZ		 14762 if (sec && sec->owner && is_arm_elf (sec->owner))
14763 return elf32_arm_section_data (sec);
44444f50
NC		 14764 else
14765 return NULL;
8e3de13a
NC		 14766}
14767
4e617b1e
PB		 14768typedef struct
14769{
57402f1e 14770 void *flaginfo;
4e617b1e 14771 struct bfd_link_info *info;
91a5743d
PB		 14772 asection *sec;
14773 int sec_shndx;
6e0b88f1
AM		 14774 int (*func) (void *, const char *, Elf_Internal_Sym *,
14775 asection *, struct elf_link_hash_entry *);
4e617b1e
PB		 14776} output_arch_syminfo;
14777
14778enum map_symbol_type
14779{
14780 ARM_MAP_ARM,
14781 ARM_MAP_THUMB,
14782 ARM_MAP_DATA
14783};
14784
14785
7413f23f 14786/* Output a single mapping symbol. */
4e617b1e
PB		 14787
14788static bfd_boolean
7413f23f
DJ		 14789elf32_arm_output_map_sym (output_arch_syminfo *osi,
14790 enum map_symbol_type type,
14791 bfd_vma offset)
4e617b1e
PB		 14792{
14793 static const char *names[3] = {"$a", "$t", "$d"};
4e617b1e
PB		 14794 Elf_Internal_Sym sym;
14795
91a5743d
PB		 14796 sym.st_value = osi->sec->output_section->vma
14797 + osi->sec->output_offset
14798 + offset;
4e617b1e
PB		 14799 sym.st_size = 0;
14800 sym.st_other = 0;
14801 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d 14802 sym.st_shndx = osi->sec_shndx;
35fc36a8 14803 sym.st_target_internal = 0;
fe33d2fa 14804 elf32_arm_section_map_add (osi->sec, names[type][1], offset);
57402f1e 14805 return osi->func (osi->flaginfo, names[type], &sym, osi->sec, NULL) == 1;
4e617b1e
PB		 14806}
14807
34e77a92
RS		 14808/* Output mapping symbols for the PLT entry described by ROOT_PLT and ARM_PLT.
14809 IS_IPLT_ENTRY_P says whether the PLT is in .iplt rather than .plt. */
4e617b1e
PB		 14810
14811static bfd_boolean
34e77a92
RS		 14812elf32_arm_output_plt_map_1 (output_arch_syminfo *osi,
14813 bfd_boolean is_iplt_entry_p,
14814 union gotplt_union *root_plt,
14815 struct arm_plt_info *arm_plt)
4e617b1e 14816{
4e617b1e 14817 struct elf32_arm_link_hash_table *htab;
34e77a92 14818 bfd_vma addr, plt_header_size;
4e617b1e 14819
34e77a92 14820 if (root_plt->offset == (bfd_vma) -1)
4e617b1e
PB		 14821 return TRUE;
14822
4dfe6ac6
NC		 14823 htab = elf32_arm_hash_table (osi->info);
14824 if (htab == NULL)
14825 return FALSE;
14826
34e77a92
RS		 14827 if (is_iplt_entry_p)
14828 {
14829 osi->sec = htab->root.iplt;
14830 plt_header_size = 0;
14831 }
14832 else
14833 {
14834 osi->sec = htab->root.splt;
14835 plt_header_size = htab->plt_header_size;
14836 }
14837 osi->sec_shndx = (_bfd_elf_section_from_bfd_section
14838 (osi->info->output_bfd, osi->sec->output_section));
14839
14840 addr = root_plt->offset & -2;
4e617b1e
PB		 14841 if (htab->symbian_p)
14842 {
7413f23f 14843 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14844 return FALSE;
7413f23f 14845 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4))
4e617b1e
PB		 14846 return FALSE;
14847 }
14848 else if (htab->vxworks_p)
14849 {
7413f23f 14850 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14851 return FALSE;
7413f23f 14852 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8))
4e617b1e 14853 return FALSE;
7413f23f 14854 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12))
4e617b1e 14855 return FALSE;
7413f23f 14856 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20))
4e617b1e
PB		 14857 return FALSE;
14858 }
b38cadfb
NC		 14859 else if (htab->nacl_p)
14860 {
14861 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
14862 return FALSE;
14863 }
eed94f8f
NC		 14864 else if (using_thumb_only (htab))
14865 {
14866 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr))
14867 return FALSE;
6a631e86 14868 }
4e617b1e
PB		 14869 else
14870 {
34e77a92 14871 bfd_boolean thumb_stub_p;
bd97cb95 14872
34e77a92
RS		 14873 thumb_stub_p = elf32_arm_plt_needs_thumb_stub_p (osi->info, arm_plt);
14874 if (thumb_stub_p)
4e617b1e 14875 {
7413f23f 14876 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4))
4e617b1e
PB		 14877 return FALSE;
14878 }
14879#ifdef FOUR_WORD_PLT
7413f23f 14880 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e 14881 return FALSE;
7413f23f 14882 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12))
4e617b1e
PB		 14883 return FALSE;
14884#else
906e58ca 14885 /* A three-word PLT with no Thumb thunk contains only Arm code,
4e617b1e
PB		 14886 so only need to output a mapping symbol for the first PLT entry and
14887 entries with thumb thunks. */
34e77a92 14888 if (thumb_stub_p || addr == plt_header_size)
4e617b1e 14889 {
7413f23f 14890 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr))
4e617b1e
PB		 14891 return FALSE;
14892 }
14893#endif
14894 }
14895
14896 return TRUE;
14897}
14898
34e77a92
RS		 14899/* Output mapping symbols for PLT entries associated with H. */
14900
14901static bfd_boolean
14902elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
14903{
14904 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
14905 struct elf32_arm_link_hash_entry *eh;
14906
14907 if (h->root.type == bfd_link_hash_indirect)
14908 return TRUE;
14909
14910 if (h->root.type == bfd_link_hash_warning)
14911 /* When warning symbols are created, they **replace** the "real"
14912 entry in the hash table, thus we never get to see the real
14913 symbol in a hash traversal. So look at it now. */
14914 h = (struct elf_link_hash_entry *) h->root.u.i.link;
14915
14916 eh = (struct elf32_arm_link_hash_entry *) h;
14917 return elf32_arm_output_plt_map_1 (osi, SYMBOL_CALLS_LOCAL (osi->info, h),
14918 &h->plt, &eh->plt);
14919}
14920
7413f23f
DJ		 14921/* Output a single local symbol for a generated stub. */
14922
14923static bfd_boolean
14924elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name,
14925 bfd_vma offset, bfd_vma size)
14926{
7413f23f
DJ		 14927 Elf_Internal_Sym sym;
14928
7413f23f
DJ		 14929 sym.st_value = osi->sec->output_section->vma
14930 + osi->sec->output_offset
14931 + offset;
14932 sym.st_size = size;
14933 sym.st_other = 0;
14934 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
14935 sym.st_shndx = osi->sec_shndx;
35fc36a8 14936 sym.st_target_internal = 0;
57402f1e 14937 return osi->func (osi->flaginfo, name, &sym, osi->sec, NULL) == 1;
7413f23f 14938}
4e617b1e 14939
da5938a2 14940static bfd_boolean
8029a119
NC		 14941arm_map_one_stub (struct bfd_hash_entry * gen_entry,
14942 void * in_arg)
da5938a2
NC		 14943{
14944 struct elf32_arm_stub_hash_entry *stub_entry;
da5938a2
NC		 14945 asection *stub_sec;
14946 bfd_vma addr;
7413f23f 14947 char *stub_name;
9a008db3 14948 output_arch_syminfo *osi;
d3ce72d0 14949 const insn_sequence *template_sequence;
461a49ca
DJ		 14950 enum stub_insn_type prev_type;
14951 int size;
14952 int i;
14953 enum map_symbol_type sym_type;
da5938a2
NC		 14954
14955 /* Massage our args to the form they really have. */
14956 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
9a008db3 14957 osi = (output_arch_syminfo *) in_arg;
da5938a2 14958
da5938a2
NC		 14959 stub_sec = stub_entry->stub_sec;
14960
14961 /* Ensure this stub is attached to the current section being
7413f23f 14962 processed. */
da5938a2
NC		 14963 if (stub_sec != osi->sec)
14964 return TRUE;
14965
7413f23f
DJ		 14966 addr = (bfd_vma) stub_entry->stub_offset;
14967 stub_name = stub_entry->output_name;
da5938a2 14968
d3ce72d0
NC		 14969 template_sequence = stub_entry->stub_template;
14970 switch (template_sequence[0].type)
7413f23f 14971 {
461a49ca
DJ		 14972 case ARM_TYPE:
14973 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size))
da5938a2
NC		 14974 return FALSE;
14975 break;
461a49ca 14976 case THUMB16_TYPE:
48229727 14977 case THUMB32_TYPE:
461a49ca
DJ		 14978 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1,
14979 stub_entry->stub_size))
da5938a2
NC		 14980 return FALSE;
14981 break;
14982 default:
14983 BFD_FAIL ();
48229727 14984 return 0;
7413f23f 14985 }
da5938a2 14986
461a49ca
DJ		 14987 prev_type = DATA_TYPE;
14988 size = 0;
14989 for (i = 0; i < stub_entry->stub_template_size; i++)
14990 {
d3ce72d0 14991 switch (template_sequence[i].type)
461a49ca
DJ		 14992 {
14993 case ARM_TYPE:
14994 sym_type = ARM_MAP_ARM;
14995 break;
14996
14997 case THUMB16_TYPE:
48229727 14998 case THUMB32_TYPE:
461a49ca
DJ		 14999 sym_type = ARM_MAP_THUMB;
15000 break;
15001
15002 case DATA_TYPE:
15003 sym_type = ARM_MAP_DATA;
15004 break;
15005
15006 default:
15007 BFD_FAIL ();
4e31c731 15008 return FALSE;
461a49ca
DJ		 15009 }
15010
d3ce72d0 15011 if (template_sequence[i].type != prev_type)
461a49ca 15012 {
d3ce72d0 15013 prev_type = template_sequence[i].type;
461a49ca
DJ		 15014 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size))
15015 return FALSE;
15016 }
15017
d3ce72d0 15018 switch (template_sequence[i].type)
461a49ca
DJ		 15019 {
15020 case ARM_TYPE:
48229727 15021 case THUMB32_TYPE:
461a49ca
DJ		 15022 size += 4;
15023 break;
15024
15025 case THUMB16_TYPE:
15026 size += 2;
15027 break;
15028
15029 case DATA_TYPE:
15030 size += 4;
15031 break;
15032
15033 default:
15034 BFD_FAIL ();
4e31c731 15035 return FALSE;
461a49ca
DJ		 15036 }
15037 }
15038
da5938a2
NC		 15039 return TRUE;
15040}
15041
33811162
DG		 15042/* Output mapping symbols for linker generated sections,
15043 and for those data-only sections that do not have a
15044 $d. */
4e617b1e
PB		 15045
15046static bfd_boolean
15047elf32_arm_output_arch_local_syms (bfd *output_bfd,
906e58ca 15048 struct bfd_link_info *info,
57402f1e 15049 void *flaginfo,
6e0b88f1
AM		 15050 int (*func) (void *, const char *,
15051 Elf_Internal_Sym *,
15052 asection *,
15053 struct elf_link_hash_entry *))
4e617b1e
PB		 15054{
15055 output_arch_syminfo osi;
15056 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 15057 bfd_vma offset;
15058 bfd_size_type size;
33811162 15059 bfd *input_bfd;
4e617b1e
PB		 15060
15061 htab = elf32_arm_hash_table (info);
4dfe6ac6
NC		 15062 if (htab == NULL)
15063 return FALSE;
15064
906e58ca 15065 check_use_blx (htab);
91a5743d 15066
57402f1e 15067 osi.flaginfo = flaginfo;
4e617b1e
PB		 15068 osi.info = info;
15069 osi.func = func;
906e58ca 15070
33811162
DG		 15071 /* Add a $d mapping symbol to data-only sections that
15072 don't have any mapping symbol. This may result in (harmless) redundant
15073 mapping symbols. */
15074 for (input_bfd = info->input_bfds;
15075 input_bfd != NULL;
c72f2fb2 15076 input_bfd = input_bfd->link.next)
33811162
DG		 15077 {
15078 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS)
15079 for (osi.sec = input_bfd->sections;
15080 osi.sec != NULL;
15081 osi.sec = osi.sec->next)
15082 {
15083 if (osi.sec->output_section != NULL
f7dd8c79
DJ		 15084 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE))
15085 != 0)
33811162
DG		 15086 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED))
15087 == SEC_HAS_CONTENTS
15088 && get_arm_elf_section_data (osi.sec) != NULL
501abfe0 15089 && get_arm_elf_section_data (osi.sec)->mapcount == 0
7d500b83
CL		 15090 && osi.sec->size > 0
15091 && (osi.sec->flags & SEC_EXCLUDE) == 0)
33811162
DG		 15092 {
15093 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15094 (output_bfd, osi.sec->output_section);
15095 if (osi.sec_shndx != (int)SHN_BAD)
15096 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0);
15097 }
15098 }
15099 }
15100
91a5743d
PB		 15101 /* ARM->Thumb glue. */
15102 if (htab->arm_glue_size > 0)
15103 {
3d4d4302
AM		 15104 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15105 ARM2THUMB_GLUE_SECTION_NAME);
91a5743d
PB		 15106
15107 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15108 (output_bfd, osi.sec->output_section);
15109 if (info->shared || htab->root.is_relocatable_executable
15110 || htab->pic_veneer)
15111 size = ARM2THUMB_PIC_GLUE_SIZE;
15112 else if (htab->use_blx)
15113 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
15114 else
15115 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 15116
91a5743d
PB		 15117 for (offset = 0; offset < htab->arm_glue_size; offset += size)
15118 {
7413f23f
DJ		 15119 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset);
15120 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
91a5743d
PB		 15121 }
15122 }
15123
15124 /* Thumb->ARM glue. */
15125 if (htab->thumb_glue_size > 0)
15126 {
3d4d4302
AM		 15127 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15128 THUMB2ARM_GLUE_SECTION_NAME);
91a5743d
PB		 15129
15130 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15131 (output_bfd, osi.sec->output_section);
15132 size = THUMB2ARM_GLUE_SIZE;
15133
15134 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
15135 {
7413f23f
DJ		 15136 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset);
15137 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4);
91a5743d
PB		 15138 }
15139 }
15140
845b51d6
PB		 15141 /* ARMv4 BX veneers. */
15142 if (htab->bx_glue_size > 0)
15143 {
3d4d4302
AM		 15144 osi.sec = bfd_get_linker_section (htab->bfd_of_glue_owner,
15145 ARM_BX_GLUE_SECTION_NAME);
845b51d6
PB		 15146
15147 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15148 (output_bfd, osi.sec->output_section);
15149
7413f23f 15150 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0);
845b51d6
PB		 15151 }
15152
8029a119
NC		 15153 /* Long calls stubs. */
15154 if (htab->stub_bfd && htab->stub_bfd->sections)
15155 {
da5938a2 15156 asection* stub_sec;
8029a119 15157
da5938a2
NC		 15158 for (stub_sec = htab->stub_bfd->sections;
15159 stub_sec != NULL;
8029a119
NC		 15160 stub_sec = stub_sec->next)
15161 {
15162 /* Ignore non-stub sections. */
15163 if (!strstr (stub_sec->name, STUB_SUFFIX))
15164 continue;
da5938a2 15165
8029a119 15166 osi.sec = stub_sec;
da5938a2 15167
8029a119
NC		 15168 osi.sec_shndx = _bfd_elf_section_from_bfd_section
15169 (output_bfd, osi.sec->output_section);
da5938a2 15170
8029a119
NC		 15171 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi);
15172 }
15173 }
da5938a2 15174
91a5743d 15175 /* Finally, output mapping symbols for the PLT. */
34e77a92 15176 if (htab->root.splt && htab->root.splt->size > 0)
4e617b1e 15177 {
34e77a92
RS		 15178 osi.sec = htab->root.splt;
15179 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15180 (output_bfd, osi.sec->output_section));
15181
15182 /* Output mapping symbols for the plt header. SymbianOS does not have a
15183 plt header. */
15184 if (htab->vxworks_p)
15185 {
15186 /* VxWorks shared libraries have no PLT header. */
15187 if (!info->shared)
15188 {
15189 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15190 return FALSE;
15191 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15192 return FALSE;
15193 }
15194 }
b38cadfb
NC		 15195 else if (htab->nacl_p)
15196 {
15197 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15198 return FALSE;
15199 }
eed94f8f
NC		 15200 else if (using_thumb_only (htab))
15201 {
15202 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 0))
15203 return FALSE;
15204 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12))
15205 return FALSE;
15206 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, 16))
15207 return FALSE;
15208 }
34e77a92 15209 else if (!htab->symbian_p)
4e617b1e 15210 {
7413f23f 15211 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
4e617b1e 15212 return FALSE;
34e77a92
RS		 15213#ifndef FOUR_WORD_PLT
15214 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16))
4e617b1e 15215 return FALSE;
34e77a92 15216#endif
4e617b1e
PB		 15217 }
15218 }
99059e56
RM		 15219 if (htab->nacl_p && htab->root.iplt && htab->root.iplt->size > 0)
15220 {
15221 /* NaCl uses a special first entry in .iplt too. */
15222 osi.sec = htab->root.iplt;
15223 osi.sec_shndx = (_bfd_elf_section_from_bfd_section
15224 (output_bfd, osi.sec->output_section));
15225 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0))
15226 return FALSE;
15227 }
34e77a92
RS		 15228 if ((htab->root.splt && htab->root.splt->size > 0)
15229 || (htab->root.iplt && htab->root.iplt->size > 0))
4e617b1e 15230 {
34e77a92
RS		 15231 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, &osi);
15232 for (input_bfd = info->input_bfds;
15233 input_bfd != NULL;
c72f2fb2 15234 input_bfd = input_bfd->link.next)
34e77a92
RS		 15235 {
15236 struct arm_local_iplt_info **local_iplt;
15237 unsigned int i, num_syms;
4e617b1e 15238
34e77a92
RS		 15239 local_iplt = elf32_arm_local_iplt (input_bfd);
15240 if (local_iplt != NULL)
15241 {
15242 num_syms = elf_symtab_hdr (input_bfd).sh_info;
15243 for (i = 0; i < num_syms; i++)
15244 if (local_iplt[i] != NULL
15245 && !elf32_arm_output_plt_map_1 (&osi, TRUE,
15246 &local_iplt[i]->root,
15247 &local_iplt[i]->arm))
15248 return FALSE;
15249 }
15250 }
15251 }
0855e32b
NS		 15252 if (htab->dt_tlsdesc_plt != 0)
15253 {
15254 /* Mapping symbols for the lazy tls trampoline. */
15255 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->dt_tlsdesc_plt))
15256 return FALSE;
b38cadfb 15257
0855e32b
NS		 15258 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15259 htab->dt_tlsdesc_plt + 24))
15260 return FALSE;
15261 }
15262 if (htab->tls_trampoline != 0)
15263 {
15264 /* Mapping symbols for the tls trampoline. */
15265 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, htab->tls_trampoline))
15266 return FALSE;
15267#ifdef FOUR_WORD_PLT
15268 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA,
15269 htab->tls_trampoline + 12))
15270 return FALSE;
b38cadfb 15271#endif
0855e32b 15272 }
b38cadfb 15273
4e617b1e
PB		 15274 return TRUE;
15275}
15276
e489d0ae
PB		 15277/* Allocate target specific section data. */
15278
15279static bfd_boolean
15280elf32_arm_new_section_hook (bfd *abfd, asection *sec)
15281{
f592407e
AM		 15282 if (!sec->used_by_bfd)
15283 {
15284 _arm_elf_section_data *sdata;
15285 bfd_size_type amt = sizeof (*sdata);
e489d0ae 15286
21d799b5 15287 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt);
f592407e
AM		 15288 if (sdata == NULL)
15289 return FALSE;
15290 sec->used_by_bfd = sdata;
15291 }
e489d0ae
PB		 15292
15293 return _bfd_elf_new_section_hook (abfd, sec);
15294}
15295
15296
15297/* Used to order a list of mapping symbols by address. */
15298
15299static int
15300elf32_arm_compare_mapping (const void * a, const void * b)
15301{
7f6a71ff
JM		 15302 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
15303 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
15304
15305 if (amap->vma > bmap->vma)
15306 return 1;
15307 else if (amap->vma < bmap->vma)
15308 return -1;
15309 else if (amap->type > bmap->type)
15310 /* Ensure results do not depend on the host qsort for objects with
15311 multiple mapping symbols at the same address by sorting on type
15312 after vma. */
15313 return 1;
15314 else if (amap->type < bmap->type)
15315 return -1;
15316 else
15317 return 0;
e489d0ae
PB		 15318}
15319
2468f9c9
PB		 15320/* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */
15321
15322static unsigned long
15323offset_prel31 (unsigned long addr, bfd_vma offset)
15324{
15325 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful);
15326}
15327
15328/* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31
15329 relocations. */
15330
15331static void
15332copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset)
15333{
15334 unsigned long first_word = bfd_get_32 (output_bfd, from);
15335 unsigned long second_word = bfd_get_32 (output_bfd, from + 4);
b38cadfb 15336
2468f9c9
PB		 15337 /* High bit of first word is supposed to be zero. */
15338 if ((first_word & 0x80000000ul) == 0)
15339 first_word = offset_prel31 (first_word, offset);
b38cadfb 15340
2468f9c9
PB		 15341 /* If the high bit of the first word is clear, and the bit pattern is not 0x1
15342 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */
15343 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0))
15344 second_word = offset_prel31 (second_word, offset);
b38cadfb 15345
2468f9c9
PB		 15346 bfd_put_32 (output_bfd, first_word, to);
15347 bfd_put_32 (output_bfd, second_word, to + 4);
15348}
e489d0ae 15349
48229727
JB		 15350/* Data for make_branch_to_a8_stub(). */
15351
b38cadfb
NC		 15352struct a8_branch_to_stub_data
15353{
48229727
JB		 15354 asection *writing_section;
15355 bfd_byte *contents;
15356};
15357
15358
15359/* Helper to insert branches to Cortex-A8 erratum stubs in the right
15360 places for a particular section. */
15361
15362static bfd_boolean
15363make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry,
99059e56 15364 void *in_arg)
48229727
JB		 15365{
15366 struct elf32_arm_stub_hash_entry *stub_entry;
15367 struct a8_branch_to_stub_data *data;
15368 bfd_byte *contents;
15369 unsigned long branch_insn;
15370 bfd_vma veneered_insn_loc, veneer_entry_loc;
15371 bfd_signed_vma branch_offset;
15372 bfd *abfd;
91d6fa6a 15373 unsigned int target;
48229727
JB		 15374
15375 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry;
15376 data = (struct a8_branch_to_stub_data *) in_arg;
15377
15378 if (stub_entry->target_section != data->writing_section
4563a860 15379 || stub_entry->stub_type < arm_stub_a8_veneer_lwm)
48229727
JB		 15380 return TRUE;
15381
15382 contents = data->contents;
15383
15384 veneered_insn_loc = stub_entry->target_section->output_section->vma
15385 + stub_entry->target_section->output_offset
15386 + stub_entry->target_value;
15387
15388 veneer_entry_loc = stub_entry->stub_sec->output_section->vma
15389 + stub_entry->stub_sec->output_offset
15390 + stub_entry->stub_offset;
15391
15392 if (stub_entry->stub_type == arm_stub_a8_veneer_blx)
15393 veneered_insn_loc &= ~3u;
15394
15395 branch_offset = veneer_entry_loc - veneered_insn_loc - 4;
15396
15397 abfd = stub_entry->target_section->owner;
91d6fa6a 15398 target = stub_entry->target_value;
48229727
JB		 15399
15400 /* We attempt to avoid this condition by setting stubs_always_after_branch
15401 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround.
15402 This check is just to be on the safe side... */
15403 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff))
15404 {
15405 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is "
15406 "allocated in unsafe location"), abfd);
15407 return FALSE;
15408 }
15409
15410 switch (stub_entry->stub_type)
15411 {
15412 case arm_stub_a8_veneer_b:
15413 case arm_stub_a8_veneer_b_cond:
15414 branch_insn = 0xf0009000;
15415 goto jump24;
15416
15417 case arm_stub_a8_veneer_blx:
15418 branch_insn = 0xf000e800;
15419 goto jump24;
15420
15421 case arm_stub_a8_veneer_bl:
15422 {
15423 unsigned int i1, j1, i2, j2, s;
15424
15425 branch_insn = 0xf000d000;
15426
15427 jump24:
15428 if (branch_offset < -16777216 || branch_offset > 16777214)
15429 {
15430 /* There's not much we can do apart from complain if this
15431 happens. */
15432 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out "
15433 "of range (input file too large)"), abfd);
15434 return FALSE;
15435 }
15436
15437 /* i1 = not(j1 eor s), so:
15438 not i1 = j1 eor s
15439 j1 = (not i1) eor s. */
15440
15441 branch_insn |= (branch_offset >> 1) & 0x7ff;
15442 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16;
15443 i2 = (branch_offset >> 22) & 1;
15444 i1 = (branch_offset >> 23) & 1;
15445 s = (branch_offset >> 24) & 1;
15446 j1 = (!i1) ^ s;
15447 j2 = (!i2) ^ s;
15448 branch_insn |= j2 << 11;
15449 branch_insn |= j1 << 13;
15450 branch_insn |= s << 26;
15451 }
15452 break;
15453
15454 default:
15455 BFD_FAIL ();
15456 return FALSE;
15457 }
15458
91d6fa6a
NC		 15459 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]);
15460 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]);
48229727
JB		 15461
15462 return TRUE;
15463}
15464
e489d0ae
PB		 15465/* Do code byteswapping. Return FALSE afterwards so that the section is
15466 written out as normal. */
15467
15468static bfd_boolean
c7b8f16e 15469elf32_arm_write_section (bfd *output_bfd,
8029a119
NC		 15470 struct bfd_link_info *link_info,
15471 asection *sec,
e489d0ae
PB		 15472 bfd_byte *contents)
15473{
48229727 15474 unsigned int mapcount, errcount;
8e3de13a 15475 _arm_elf_section_data *arm_data;
c7b8f16e 15476 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 15477 elf32_arm_section_map *map;
c7b8f16e 15478 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 15479 bfd_vma ptr;
15480 bfd_vma end;
c7b8f16e 15481 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae 15482 bfd_byte tmp;
48229727 15483 unsigned int i;
57e8b36a 15484
4dfe6ac6
NC		 15485 if (globals == NULL)
15486 return FALSE;
15487
8e3de13a
NC		 15488 /* If this section has not been allocated an _arm_elf_section_data
15489 structure then we cannot record anything. */
15490 arm_data = get_arm_elf_section_data (sec);
15491 if (arm_data == NULL)
15492 return FALSE;
15493
15494 mapcount = arm_data->mapcount;
15495 map = arm_data->map;
c7b8f16e
JB		 15496 errcount = arm_data->erratumcount;
15497
15498 if (errcount != 0)
15499 {
15500 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
15501
15502 for (errnode = arm_data->erratumlist; errnode != 0;
99059e56
RM		 15503 errnode = errnode->next)
15504 {
15505 bfd_vma target = errnode->vma - offset;
15506
15507 switch (errnode->type)
15508 {
15509 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
15510 {
15511 bfd_vma branch_to_veneer;
15512 /* Original condition code of instruction, plus bit mask for
15513 ARM B instruction. */
15514 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
15515 | 0x0a000000;
c7b8f16e
JB		 15516
15517 /* The instruction is before the label. */
91d6fa6a 15518 target -= 4;
c7b8f16e
JB		 15519
15520 /* Above offset included in -4 below. */
15521 branch_to_veneer = errnode->u.b.veneer->vma
99059e56 15522 - errnode->vma - 4;
c7b8f16e
JB		 15523
15524 if ((signed) branch_to_veneer < -(1 << 25)
15525 || (signed) branch_to_veneer >= (1 << 25))
15526 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15527 "range"), output_bfd);
15528
99059e56
RM		 15529 insn |= (branch_to_veneer >> 2) & 0xffffff;
15530 contents[endianflip ^ target] = insn & 0xff;
15531 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15532 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15533 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15534 }
15535 break;
c7b8f16e
JB		 15536
15537 case VFP11_ERRATUM_ARM_VENEER:
99059e56
RM		 15538 {
15539 bfd_vma branch_from_veneer;
15540 unsigned int insn;
c7b8f16e 15541
99059e56
RM		 15542 /* Take size of veneer into account. */
15543 branch_from_veneer = errnode->u.v.branch->vma
15544 - errnode->vma - 12;
c7b8f16e
JB		 15545
15546 if ((signed) branch_from_veneer < -(1 << 25)
15547 || (signed) branch_from_veneer >= (1 << 25))
15548 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
15549 "range"), output_bfd);
15550
99059e56
RM		 15551 /* Original instruction. */
15552 insn = errnode->u.v.branch->u.b.vfp_insn;
15553 contents[endianflip ^ target] = insn & 0xff;
15554 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff;
15555 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff;
15556 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff;
15557
15558 /* Branch back to insn after original insn. */
15559 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
15560 contents[endianflip ^ (target + 4)] = insn & 0xff;
15561 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff;
15562 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff;
15563 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff;
15564 }
15565 break;
c7b8f16e 15566
99059e56
RM		 15567 default:
15568 abort ();
15569 }
15570 }
c7b8f16e 15571 }
e489d0ae 15572
2468f9c9
PB		 15573 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX)
15574 {
15575 arm_unwind_table_edit *edit_node
99059e56 15576 = arm_data->u.exidx.unwind_edit_list;
2468f9c9 15577 /* Now, sec->size is the size of the section we will write. The original
99059e56 15578 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND
2468f9c9
PB		 15579 markers) was sec->rawsize. (This isn't the case if we perform no
15580 edits, then rawsize will be zero and we should use size). */
21d799b5 15581 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size);
2468f9c9
PB		 15582 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size;
15583 unsigned int in_index, out_index;
15584 bfd_vma add_to_offsets = 0;
15585
15586 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;)
99059e56 15587 {
2468f9c9
PB		 15588 if (edit_node)
15589 {
15590 unsigned int edit_index = edit_node->index;
b38cadfb 15591
2468f9c9 15592 if (in_index < edit_index && in_index * 8 < input_size)
99059e56 15593 {
2468f9c9
PB		 15594 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15595 contents + in_index * 8, add_to_offsets);
15596 out_index++;
15597 in_index++;
15598 }
15599 else if (in_index == edit_index
15600 || (in_index * 8 >= input_size
15601 && edit_index == UINT_MAX))
99059e56 15602 {
2468f9c9
PB		 15603 switch (edit_node->type)
15604 {
15605 case DELETE_EXIDX_ENTRY:
15606 in_index++;
15607 add_to_offsets += 8;
15608 break;
b38cadfb 15609
2468f9c9
PB		 15610 case INSERT_EXIDX_CANTUNWIND_AT_END:
15611 {
99059e56 15612 asection *text_sec = edit_node->linked_section;
2468f9c9
PB		 15613 bfd_vma text_offset = text_sec->output_section->vma
15614 + text_sec->output_offset
15615 + text_sec->size;
15616 bfd_vma exidx_offset = offset + out_index * 8;
99059e56 15617 unsigned long prel31_offset;
2468f9c9
PB		 15618
15619 /* Note: this is meant to be equivalent to an
15620 R_ARM_PREL31 relocation. These synthetic
15621 EXIDX_CANTUNWIND markers are not relocated by the
15622 usual BFD method. */
15623 prel31_offset = (text_offset - exidx_offset)
15624 & 0x7ffffffful;
15625
15626 /* First address we can't unwind. */
15627 bfd_put_32 (output_bfd, prel31_offset,
15628 &edited_contents[out_index * 8]);
15629
15630 /* Code for EXIDX_CANTUNWIND. */
15631 bfd_put_32 (output_bfd, 0x1,
15632 &edited_contents[out_index * 8 + 4]);
15633
15634 out_index++;
15635 add_to_offsets -= 8;
15636 }
15637 break;
15638 }
b38cadfb 15639
2468f9c9
PB		 15640 edit_node = edit_node->next;
15641 }
15642 }
15643 else
15644 {
15645 /* No more edits, copy remaining entries verbatim. */
15646 copy_exidx_entry (output_bfd, edited_contents + out_index * 8,
15647 contents + in_index * 8, add_to_offsets);
15648 out_index++;
15649 in_index++;
15650 }
15651 }
15652
15653 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD))
15654 bfd_set_section_contents (output_bfd, sec->output_section,
15655 edited_contents,
15656 (file_ptr) sec->output_offset, sec->size);
15657
15658 return TRUE;
15659 }
15660
48229727
JB		 15661 /* Fix code to point to Cortex-A8 erratum stubs. */
15662 if (globals->fix_cortex_a8)
15663 {
15664 struct a8_branch_to_stub_data data;
15665
15666 data.writing_section = sec;
15667 data.contents = contents;
15668
15669 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub,
15670 &data);
15671 }
15672
e489d0ae
PB		 15673 if (mapcount == 0)
15674 return FALSE;
15675
c7b8f16e 15676 if (globals->byteswap_code)
e489d0ae 15677 {
c7b8f16e 15678 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 15679
c7b8f16e
JB		 15680 ptr = map[0].vma;
15681 for (i = 0; i < mapcount; i++)
99059e56
RM		 15682 {
15683 if (i == mapcount - 1)
c7b8f16e 15684 end = sec->size;
99059e56
RM		 15685 else
15686 end = map[i + 1].vma;
e489d0ae 15687
99059e56 15688 switch (map[i].type)
e489d0ae 15689 {
c7b8f16e
JB		 15690 case 'a':
15691 /* Byte swap code words. */
15692 while (ptr + 3 < end)
99059e56
RM		 15693 {
15694 tmp = contents[ptr];
15695 contents[ptr] = contents[ptr + 3];
15696 contents[ptr + 3] = tmp;
15697 tmp = contents[ptr + 1];
15698 contents[ptr + 1] = contents[ptr + 2];
15699 contents[ptr + 2] = tmp;
15700 ptr += 4;
15701 }
c7b8f16e 15702 break;
e489d0ae 15703
c7b8f16e
JB		 15704 case 't':
15705 /* Byte swap code halfwords. */
15706 while (ptr + 1 < end)
99059e56
RM		 15707 {
15708 tmp = contents[ptr];
15709 contents[ptr] = contents[ptr + 1];
15710 contents[ptr + 1] = tmp;
15711 ptr += 2;
15712 }
c7b8f16e
JB		 15713 break;
15714
15715 case 'd':
15716 /* Leave data alone. */
15717 break;
15718 }
99059e56
RM		 15719 ptr = end;
15720 }
e489d0ae 15721 }
8e3de13a 15722
93204d3a 15723 free (map);
47b2e99c 15724 arm_data->mapcount = -1;
c7b8f16e 15725 arm_data->mapsize = 0;
8e3de13a 15726 arm_data->map = NULL;
8e3de13a 15727
e489d0ae
PB		 15728 return FALSE;
15729}
15730
0beaef2b
PB		 15731/* Mangle thumb function symbols as we read them in. */
15732
8384fb8f 15733static bfd_boolean
0beaef2b
PB		 15734elf32_arm_swap_symbol_in (bfd * abfd,
15735 const void *psrc,
15736 const void *pshn,
15737 Elf_Internal_Sym *dst)
15738{
8384fb8f
AM		 15739 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
15740 return FALSE;
0beaef2b
PB		 15741
15742 /* New EABI objects mark thumb function symbols by setting the low bit of
35fc36a8 15743 the address. */
63e1a0fc
PB		 15744 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
15745 || ELF_ST_TYPE (dst->st_info) == STT_GNU_IFUNC)
0beaef2b 15746 {
63e1a0fc
PB		 15747 if (dst->st_value & 1)
15748 {
15749 dst->st_value &= ~(bfd_vma) 1;
15750 dst->st_target_internal = ST_BRANCH_TO_THUMB;
15751 }
15752 else
15753 dst->st_target_internal = ST_BRANCH_TO_ARM;
35fc36a8
RS		 15754 }
15755 else if (ELF_ST_TYPE (dst->st_info) == STT_ARM_TFUNC)
15756 {
15757 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_FUNC);
15758 dst->st_target_internal = ST_BRANCH_TO_THUMB;
0beaef2b 15759 }
35fc36a8
RS		 15760 else if (ELF_ST_TYPE (dst->st_info) == STT_SECTION)
15761 dst->st_target_internal = ST_BRANCH_LONG;
15762 else
63e1a0fc 15763 dst->st_target_internal = ST_BRANCH_UNKNOWN;
35fc36a8 15764
8384fb8f 15765 return TRUE;
0beaef2b
PB		 15766}
15767
15768
15769/* Mangle thumb function symbols as we write them out. */
15770
15771static void
15772elf32_arm_swap_symbol_out (bfd *abfd,
15773 const Elf_Internal_Sym *src,
15774 void *cdst,
15775 void *shndx)
15776{
15777 Elf_Internal_Sym newsym;
15778
15779 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
15780 of the address set, as per the new EABI. We do this unconditionally
15781 because objcopy does not set the elf header flags until after
15782 it writes out the symbol table. */
35fc36a8 15783 if (src->st_target_internal == ST_BRANCH_TO_THUMB)
0beaef2b
PB		 15784 {
15785 newsym = *src;
34e77a92
RS		 15786 if (ELF_ST_TYPE (src->st_info) != STT_GNU_IFUNC)
15787 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad 15788 if (newsym.st_shndx != SHN_UNDEF)
99059e56
RM		 15789 {
15790 /* Do this only for defined symbols. At link type, the static
15791 linker will simulate the work of dynamic linker of resolving
15792 symbols and will carry over the thumbness of found symbols to
15793 the output symbol table. It's not clear how it happens, but
15794 the thumbness of undefined symbols can well be different at
15795 runtime, and writing '1' for them will be confusing for users
15796 and possibly for dynamic linker itself.
15797 */
15798 newsym.st_value |= 1;
15799 }
906e58ca 15800
0beaef2b
PB		 15801 src = &newsym;
15802 }
15803 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
15804}
15805
b294bdf8
MM		 15806/* Add the PT_ARM_EXIDX program header. */
15807
15808static bfd_boolean
906e58ca 15809elf32_arm_modify_segment_map (bfd *abfd,
b294bdf8
MM		 15810 struct bfd_link_info *info ATTRIBUTE_UNUSED)
15811{
15812 struct elf_segment_map *m;
15813 asection *sec;
15814
15815 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15816 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15817 {
15818 /* If there is already a PT_ARM_EXIDX header, then we do not
15819 want to add another one. This situation arises when running
15820 "strip"; the input binary already has the header. */
12bd6957 15821 m = elf_seg_map (abfd);
b294bdf8
MM		 15822 while (m && m->p_type != PT_ARM_EXIDX)
15823 m = m->next;
15824 if (!m)
15825 {
21d799b5 15826 m = (struct elf_segment_map *)
99059e56 15827 bfd_zalloc (abfd, sizeof (struct elf_segment_map));
b294bdf8
MM		 15828 if (m == NULL)
15829 return FALSE;
15830 m->p_type = PT_ARM_EXIDX;
15831 m->count = 1;
15832 m->sections[0] = sec;
15833
12bd6957
AM		 15834 m->next = elf_seg_map (abfd);
15835 elf_seg_map (abfd) = m;
b294bdf8
MM		 15836 }
15837 }
15838
15839 return TRUE;
15840}
15841
15842/* We may add a PT_ARM_EXIDX program header. */
15843
15844static int
a6b96beb
AM		 15845elf32_arm_additional_program_headers (bfd *abfd,
15846 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 15847{
15848 asection *sec;
15849
15850 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
15851 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
15852 return 1;
15853 else
15854 return 0;
15855}
15856
34e77a92
RS		 15857/* Hook called by the linker routine which adds symbols from an object
15858 file. */
15859
15860static bfd_boolean
15861elf32_arm_add_symbol_hook (bfd *abfd, struct bfd_link_info *info,
15862 Elf_Internal_Sym *sym, const char **namep,
15863 flagword *flagsp, asection **secp, bfd_vma *valp)
15864{
15865 if ((abfd->flags & DYNAMIC) == 0
f64b2e8d
NC		 15866 && (ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC
15867 || ELF_ST_BIND (sym->st_info) == STB_GNU_UNIQUE))
15868 elf_tdata (info->output_bfd)->has_gnu_symbols = TRUE;
34e77a92 15869
c792917c
NC		 15870 if (elf32_arm_hash_table (info) == NULL)
15871 return FALSE;
15872
34e77a92
RS		 15873 if (elf32_arm_hash_table (info)->vxworks_p
15874 && !elf_vxworks_add_symbol_hook (abfd, info, sym, namep,
15875 flagsp, secp, valp))
15876 return FALSE;
15877
15878 return TRUE;
15879}
15880
0beaef2b 15881/* We use this to override swap_symbol_in and swap_symbol_out. */
906e58ca
NC		 15882const struct elf_size_info elf32_arm_size_info =
15883{
0beaef2b
PB		 15884 sizeof (Elf32_External_Ehdr),
15885 sizeof (Elf32_External_Phdr),
15886 sizeof (Elf32_External_Shdr),
15887 sizeof (Elf32_External_Rel),
15888 sizeof (Elf32_External_Rela),
15889 sizeof (Elf32_External_Sym),
15890 sizeof (Elf32_External_Dyn),
15891 sizeof (Elf_External_Note),
15892 4,
15893 1,
15894 32, 2,
15895 ELFCLASS32, EV_CURRENT,
15896 bfd_elf32_write_out_phdrs,
15897 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 15898 bfd_elf32_checksum_contents,
0beaef2b
PB		 15899 bfd_elf32_write_relocs,
15900 elf32_arm_swap_symbol_in,
15901 elf32_arm_swap_symbol_out,
15902 bfd_elf32_slurp_reloc_table,
15903 bfd_elf32_slurp_symbol_table,
15904 bfd_elf32_swap_dyn_in,
15905 bfd_elf32_swap_dyn_out,
15906 bfd_elf32_swap_reloc_in,
15907 bfd_elf32_swap_reloc_out,
15908 bfd_elf32_swap_reloca_in,
15909 bfd_elf32_swap_reloca_out
15910};
15911
6a631e86
YG		 15912/* Return size of plt0 entry starting at ADDR
15913 or (bfd_vma) -1 if size can not be determined. */
15914
15915static bfd_vma
15916elf32_arm_plt0_size (const bfd *abfd, const bfd_byte *addr)
15917{
15918 bfd_vma first_word;
15919 bfd_vma plt0_size;
15920
15921 first_word = H_GET_32 (abfd, addr);
15922
15923 if (first_word == elf32_arm_plt0_entry[0])
15924 plt0_size = 4 * ARRAY_SIZE (elf32_arm_plt0_entry);
15925 else if (first_word == elf32_thumb2_plt0_entry[0])
15926 plt0_size = 4 * ARRAY_SIZE (elf32_thumb2_plt0_entry);
15927 else
15928 /* We don't yet handle this PLT format. */
15929 return (bfd_vma) -1;
15930
15931 return plt0_size;
15932}
15933
15934/* Return size of plt entry starting at offset OFFSET
15935 of plt section located at address START
15936 or (bfd_vma) -1 if size can not be determined. */
15937
15938static bfd_vma
15939elf32_arm_plt_size (const bfd *abfd, const bfd_byte *start, bfd_vma offset)
15940{
15941 bfd_vma first_insn;
15942 bfd_vma plt_size = 0;
15943 const bfd_byte *addr = start + offset;
15944
15945 /* PLT entry size if fixed on Thumb-only platforms. */
15946 if (H_GET_32(abfd, start) == elf32_thumb2_plt0_entry[0])
15947 return 4 * ARRAY_SIZE (elf32_thumb2_plt_entry);
15948
15949 /* Respect Thumb stub if necessary. */
15950 if (H_GET_16(abfd, addr) == elf32_arm_plt_thumb_stub[0])
15951 {
15952 plt_size += 2 * ARRAY_SIZE(elf32_arm_plt_thumb_stub);
15953 }
15954
15955 /* Strip immediate from first add. */
15956 first_insn = H_GET_32(abfd, addr + plt_size) & 0xffffff00;
15957
15958#ifdef FOUR_WORD_PLT
15959 if (first_insn == elf32_arm_plt_entry[0])
15960 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry);
15961#else
15962 if (first_insn == elf32_arm_plt_entry_long[0])
15963 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_long);
15964 else if (first_insn == elf32_arm_plt_entry_short[0])
15965 plt_size += 4 * ARRAY_SIZE (elf32_arm_plt_entry_short);
15966#endif
15967 else
15968 /* We don't yet handle this PLT format. */
15969 return (bfd_vma) -1;
15970
15971 return plt_size;
15972}
15973
15974/* Implementation is shamelessly borrowed from _bfd_elf_get_synthetic_symtab. */
15975
15976static long
15977elf32_arm_get_synthetic_symtab (bfd *abfd,
15978 long symcount ATTRIBUTE_UNUSED,
15979 asymbol **syms ATTRIBUTE_UNUSED,
15980 long dynsymcount,
15981 asymbol **dynsyms,
15982 asymbol **ret)
15983{
15984 asection *relplt;
15985 asymbol *s;
15986 arelent *p;
15987 long count, i, n;
15988 size_t size;
15989 Elf_Internal_Shdr *hdr;
15990 char *names;
15991 asection *plt;
15992 bfd_vma offset;
15993 bfd_byte *data;
15994
15995 *ret = NULL;
15996
15997 if ((abfd->flags & (DYNAMIC | EXEC_P)) == 0)
15998 return 0;
15999
16000 if (dynsymcount <= 0)
16001 return 0;
16002
16003 relplt = bfd_get_section_by_name (abfd, ".rel.plt");
16004 if (relplt == NULL)
16005 return 0;
16006
16007 hdr = &elf_section_data (relplt)->this_hdr;
16008 if (hdr->sh_link != elf_dynsymtab (abfd)
16009 || (hdr->sh_type != SHT_REL && hdr->sh_type != SHT_RELA))
16010 return 0;
16011
16012 plt = bfd_get_section_by_name (abfd, ".plt");
16013 if (plt == NULL)
16014 return 0;
16015
16016 if (!elf32_arm_size_info.slurp_reloc_table (abfd, relplt, dynsyms, TRUE))
16017 return -1;
16018
16019 data = plt->contents;
16020 if (data == NULL)
16021 {
16022 if (!bfd_get_full_section_contents(abfd, (asection *) plt, &data) || data == NULL)
16023 return -1;
16024 bfd_cache_section_contents((asection *) plt, data);
16025 }
16026
16027 count = relplt->size / hdr->sh_entsize;
16028 size = count * sizeof (asymbol);
16029 p = relplt->relocation;
16030 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16031 {
16032 size += strlen ((*p->sym_ptr_ptr)->name) + sizeof ("@plt");
16033 if (p->addend != 0)
16034 size += sizeof ("+0x") - 1 + 8;
16035 }
16036
16037 s = *ret = (asymbol *) bfd_malloc (size);
16038 if (s == NULL)
16039 return -1;
16040
16041 offset = elf32_arm_plt0_size (abfd, data);
16042 if (offset == (bfd_vma) -1)
16043 return -1;
16044
16045 names = (char *) (s + count);
16046 p = relplt->relocation;
16047 n = 0;
16048 for (i = 0; i < count; i++, p += elf32_arm_size_info.int_rels_per_ext_rel)
16049 {
16050 size_t len;
16051
16052 bfd_vma plt_size = elf32_arm_plt_size (abfd, data, offset);
16053 if (plt_size == (bfd_vma) -1)
16054 break;
16055
16056 *s = **p->sym_ptr_ptr;
16057 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
16058 we are defining a symbol, ensure one of them is set. */
16059 if ((s->flags & BSF_LOCAL) == 0)
16060 s->flags |= BSF_GLOBAL;
16061 s->flags |= BSF_SYNTHETIC;
16062 s->section = plt;
16063 s->value = offset;
16064 s->name = names;
16065 s->udata.p = NULL;
16066 len = strlen ((*p->sym_ptr_ptr)->name);
16067 memcpy (names, (*p->sym_ptr_ptr)->name, len);
16068 names += len;
16069 if (p->addend != 0)
16070 {
16071 char buf[30], *a;
16072
16073 memcpy (names, "+0x", sizeof ("+0x") - 1);
16074 names += sizeof ("+0x") - 1;
16075 bfd_sprintf_vma (abfd, buf, p->addend);
16076 for (a = buf; *a == '0'; ++a)
16077 ;
16078 len = strlen (a);
16079 memcpy (names, a, len);
16080 names += len;
16081 }
16082 memcpy (names, "@plt", sizeof ("@plt"));
16083 names += sizeof ("@plt");
16084 ++s, ++n;
16085 offset += plt_size;
16086 }
16087
16088 return n;
16089}
16090
252b5132 16091#define ELF_ARCH bfd_arch_arm
ae95ffa6 16092#define ELF_TARGET_ID ARM_ELF_DATA
252b5132 16093#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 16094#ifdef __QNXTARGET__
16095#define ELF_MAXPAGESIZE 0x1000
16096#else
f21f3fe0 16097#define ELF_MAXPAGESIZE 0x8000
d0facd1b 16098#endif
b1342370 16099#define ELF_MINPAGESIZE 0x1000
24718e3b 16100#define ELF_COMMONPAGESIZE 0x1000
252b5132 16101
ba93b8ac
DJ		 16102#define bfd_elf32_mkobject elf32_arm_mkobject
16103
99e4ae17
AJ		 16104#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
16105#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 16106#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
16107#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
16108#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 16109#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
b38cadfb 16110#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 16111#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 16112#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 16113#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 16114#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
3e6b1042 16115#define bfd_elf32_bfd_final_link elf32_arm_final_link
6a631e86 16116#define bfd_elf32_get_synthetic_symtab elf32_arm_get_synthetic_symtab
252b5132
RH		 16117
16118#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
16119#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 16120#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 16121#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
16122#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 16123#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 16124#define elf_backend_write_section elf32_arm_write_section
252b5132 16125#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 16126#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 16127#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
16128#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
16129#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
0855e32b 16130#define elf_backend_always_size_sections elf32_arm_always_size_sections
74541ad4 16131#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 16132#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 16133#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 16134#define elf_backend_object_p elf32_arm_object_p
40a18ebd
NC		 16135#define elf_backend_fake_sections elf32_arm_fake_sections
16136#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 16137#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 16138#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
0beaef2b 16139#define elf_backend_size_info elf32_arm_size_info
b294bdf8 16140#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
906e58ca
NC		 16141#define elf_backend_additional_program_headers elf32_arm_additional_program_headers
16142#define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms
16143#define elf_backend_begin_write_processing elf32_arm_begin_write_processing
34e77a92 16144#define elf_backend_add_symbol_hook elf32_arm_add_symbol_hook
906e58ca
NC		 16145
16146#define elf_backend_can_refcount 1
16147#define elf_backend_can_gc_sections 1
16148#define elf_backend_plt_readonly 1
16149#define elf_backend_want_got_plt 1
16150#define elf_backend_want_plt_sym 0
16151#define elf_backend_may_use_rel_p 1
16152#define elf_backend_may_use_rela_p 0
4e7fd91e 16153#define elf_backend_default_use_rela_p 0
252b5132 16154
04f7c78d 16155#define elf_backend_got_header_size 12
04f7c78d 16156
906e58ca
NC		 16157#undef elf_backend_obj_attrs_vendor
16158#define elf_backend_obj_attrs_vendor "aeabi"
16159#undef elf_backend_obj_attrs_section
16160#define elf_backend_obj_attrs_section ".ARM.attributes"
16161#undef elf_backend_obj_attrs_arg_type
16162#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
16163#undef elf_backend_obj_attrs_section_type
104d59d1 16164#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
b38cadfb
NC		 16165#define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order
16166#define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown
104d59d1 16167
252b5132 16168#include "elf32-target.h"
7f266840 16169
b38cadfb
NC		 16170/* Native Client targets. */
16171
16172#undef TARGET_LITTLE_SYM
6d00b590 16173#define TARGET_LITTLE_SYM arm_elf32_nacl_le_vec
b38cadfb
NC		 16174#undef TARGET_LITTLE_NAME
16175#define TARGET_LITTLE_NAME "elf32-littlearm-nacl"
16176#undef TARGET_BIG_SYM
6d00b590 16177#define TARGET_BIG_SYM arm_elf32_nacl_be_vec
b38cadfb
NC		 16178#undef TARGET_BIG_NAME
16179#define TARGET_BIG_NAME "elf32-bigarm-nacl"
16180
16181/* Like elf32_arm_link_hash_table_create -- but overrides
16182 appropriately for NaCl. */
16183
16184static struct bfd_link_hash_table *
16185elf32_arm_nacl_link_hash_table_create (bfd *abfd)
16186{
16187 struct bfd_link_hash_table *ret;
16188
16189 ret = elf32_arm_link_hash_table_create (abfd);
16190 if (ret)
16191 {
16192 struct elf32_arm_link_hash_table *htab
16193 = (struct elf32_arm_link_hash_table *) ret;
16194
16195 htab->nacl_p = 1;
16196
16197 htab->plt_header_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt0_entry);
16198 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_nacl_plt_entry);
16199 }
16200 return ret;
16201}
16202
16203/* Since NaCl doesn't use the ARM-specific unwind format, we don't
16204 really need to use elf32_arm_modify_segment_map. But we do it
16205 anyway just to reduce gratuitous differences with the stock ARM backend. */
16206
16207static bfd_boolean
16208elf32_arm_nacl_modify_segment_map (bfd *abfd, struct bfd_link_info *info)
16209{
16210 return (elf32_arm_modify_segment_map (abfd, info)
16211 && nacl_modify_segment_map (abfd, info));
16212}
16213
887badb3
RM		 16214static void
16215elf32_arm_nacl_final_write_processing (bfd *abfd, bfd_boolean linker)
16216{
16217 elf32_arm_final_write_processing (abfd, linker);
16218 nacl_final_write_processing (abfd, linker);
16219}
16220
6a631e86
YG		 16221static bfd_vma
16222elf32_arm_nacl_plt_sym_val (bfd_vma i, const asection *plt,
16223 const arelent *rel ATTRIBUTE_UNUSED)
16224{
16225 return plt->vma
16226 + 4 * (ARRAY_SIZE (elf32_arm_nacl_plt0_entry) +
16227 i * ARRAY_SIZE (elf32_arm_nacl_plt_entry));
16228}
887badb3 16229
b38cadfb 16230#undef elf32_bed
6a631e86 16231#define elf32_bed elf32_arm_nacl_bed
b38cadfb
NC		 16232#undef bfd_elf32_bfd_link_hash_table_create
16233#define bfd_elf32_bfd_link_hash_table_create \
16234 elf32_arm_nacl_link_hash_table_create
16235#undef elf_backend_plt_alignment
6a631e86 16236#define elf_backend_plt_alignment 4
b38cadfb
NC		 16237#undef elf_backend_modify_segment_map
16238#define elf_backend_modify_segment_map elf32_arm_nacl_modify_segment_map
16239#undef elf_backend_modify_program_headers
16240#define elf_backend_modify_program_headers nacl_modify_program_headers
887badb3
RM		 16241#undef elf_backend_final_write_processing
16242#define elf_backend_final_write_processing elf32_arm_nacl_final_write_processing
6a631e86
YG		 16243#undef bfd_elf32_get_synthetic_symtab
16244#undef elf_backend_plt_sym_val
16245#define elf_backend_plt_sym_val elf32_arm_nacl_plt_sym_val
b38cadfb
NC		 16246
16247#undef ELF_MAXPAGESIZE
16248#define ELF_MAXPAGESIZE 0x10000
887badb3
RM		 16249#undef ELF_MINPAGESIZE
16250#undef ELF_COMMONPAGESIZE
16251
b38cadfb
NC		 16252
16253#include "elf32-target.h"
16254
16255/* Reset to defaults. */
16256#undef elf_backend_plt_alignment
16257#undef elf_backend_modify_segment_map
16258#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
16259#undef elf_backend_modify_program_headers
887badb3
RM		 16260#undef elf_backend_final_write_processing
16261#define elf_backend_final_write_processing elf32_arm_final_write_processing
16262#undef ELF_MINPAGESIZE
16263#define ELF_MINPAGESIZE 0x1000
16264#undef ELF_COMMONPAGESIZE
16265#define ELF_COMMONPAGESIZE 0x1000
16266
b38cadfb 16267
906e58ca 16268/* VxWorks Targets. */
4e7fd91e 16269
906e58ca 16270#undef TARGET_LITTLE_SYM
6d00b590 16271#define TARGET_LITTLE_SYM arm_elf32_vxworks_le_vec
906e58ca 16272#undef TARGET_LITTLE_NAME
4e7fd91e 16273#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
906e58ca 16274#undef TARGET_BIG_SYM
6d00b590 16275#define TARGET_BIG_SYM arm_elf32_vxworks_be_vec
906e58ca 16276#undef TARGET_BIG_NAME
4e7fd91e
PB		 16277#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
16278
16279/* Like elf32_arm_link_hash_table_create -- but overrides
16280 appropriately for VxWorks. */
906e58ca 16281
4e7fd91e
PB		 16282static struct bfd_link_hash_table *
16283elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
16284{
16285 struct bfd_link_hash_table *ret;
16286
16287 ret = elf32_arm_link_hash_table_create (abfd);
16288 if (ret)
16289 {
16290 struct elf32_arm_link_hash_table *htab
00a97672 16291 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 16292 htab->use_rel = 0;
00a97672 16293 htab->vxworks_p = 1;
4e7fd91e
PB		 16294 }
16295 return ret;
906e58ca 16296}
4e7fd91e 16297
00a97672
RS		 16298static void
16299elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
16300{
16301 elf32_arm_final_write_processing (abfd, linker);
16302 elf_vxworks_final_write_processing (abfd, linker);
16303}
16304
906e58ca 16305#undef elf32_bed
4e7fd91e
PB		 16306#define elf32_bed elf32_arm_vxworks_bed
16307
906e58ca
NC		 16308#undef bfd_elf32_bfd_link_hash_table_create
16309#define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create
906e58ca
NC		 16310#undef elf_backend_final_write_processing
16311#define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing
16312#undef elf_backend_emit_relocs
16313#define elf_backend_emit_relocs elf_vxworks_emit_relocs
4e7fd91e 16314
906e58ca 16315#undef elf_backend_may_use_rel_p
00a97672 16316#define elf_backend_may_use_rel_p 0
906e58ca 16317#undef elf_backend_may_use_rela_p
00a97672 16318#define elf_backend_may_use_rela_p 1
906e58ca 16319#undef elf_backend_default_use_rela_p
00a97672 16320#define elf_backend_default_use_rela_p 1
906e58ca 16321#undef elf_backend_want_plt_sym
00a97672 16322#define elf_backend_want_plt_sym 1
906e58ca 16323#undef ELF_MAXPAGESIZE
00a97672 16324#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 16325
16326#include "elf32-target.h"
16327
16328
21d799b5
NC		 16329/* Merge backend specific data from an object file to the output
16330 object file when linking. */
16331
16332static bfd_boolean
16333elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
16334{
16335 flagword out_flags;
16336 flagword in_flags;
16337 bfd_boolean flags_compatible = TRUE;
16338 asection *sec;
16339
cc643b88 16340 /* Check if we have the same endianness. */
21d799b5
NC		 16341 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
16342 return FALSE;
16343
16344 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
16345 return TRUE;
16346
16347 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
16348 return FALSE;
16349
16350 /* The input BFD must have had its flags initialised. */
16351 /* The following seems bogus to me -- The flags are initialized in
16352 the assembler but I don't think an elf_flags_init field is
16353 written into the object. */
16354 /* BFD_ASSERT (elf_flags_init (ibfd)); */
16355
16356 in_flags = elf_elfheader (ibfd)->e_flags;
16357 out_flags = elf_elfheader (obfd)->e_flags;
16358
16359 /* In theory there is no reason why we couldn't handle this. However
16360 in practice it isn't even close to working and there is no real
16361 reason to want it. */
16362 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4
16363 && !(ibfd->flags & DYNAMIC)
16364 && (in_flags & EF_ARM_BE8))
16365 {
16366 _bfd_error_handler (_("error: %B is already in final BE8 format"),
16367 ibfd);
16368 return FALSE;
16369 }
16370
16371 if (!elf_flags_init (obfd))
16372 {
16373 /* If the input is the default architecture and had the default
16374 flags then do not bother setting the flags for the output
16375 architecture, instead allow future merges to do this. If no
16376 future merges ever set these flags then they will retain their
99059e56
RM		 16377 uninitialised values, which surprise surprise, correspond
16378 to the default values. */
21d799b5
NC		 16379 if (bfd_get_arch_info (ibfd)->the_default
16380 && elf_elfheader (ibfd)->e_flags == 0)
16381 return TRUE;
16382
16383 elf_flags_init (obfd) = TRUE;
16384 elf_elfheader (obfd)->e_flags = in_flags;
16385
16386 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
16387 && bfd_get_arch_info (obfd)->the_default)
16388 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
16389
16390 return TRUE;
16391 }
16392
16393 /* Determine what should happen if the input ARM architecture
16394 does not match the output ARM architecture. */
16395 if (! bfd_arm_merge_machines (ibfd, obfd))
16396 return FALSE;
16397
16398 /* Identical flags must be compatible. */
16399 if (in_flags == out_flags)
16400 return TRUE;
16401
16402 /* Check to see if the input BFD actually contains any sections. If
16403 not, its flags may not have been initialised either, but it
16404 cannot actually cause any incompatiblity. Do not short-circuit
16405 dynamic objects; their section list may be emptied by
16406 elf_link_add_object_symbols.
16407
16408 Also check to see if there are no code sections in the input.
16409 In this case there is no need to check for code specific flags.
16410 XXX - do we need to worry about floating-point format compatability
16411 in data sections ? */
16412 if (!(ibfd->flags & DYNAMIC))
16413 {
16414 bfd_boolean null_input_bfd = TRUE;
16415 bfd_boolean only_data_sections = TRUE;
16416
16417 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
16418 {
16419 /* Ignore synthetic glue sections. */
16420 if (strcmp (sec->name, ".glue_7")
16421 && strcmp (sec->name, ".glue_7t"))
16422 {
16423 if ((bfd_get_section_flags (ibfd, sec)
16424 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
16425 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
99059e56 16426 only_data_sections = FALSE;
21d799b5
NC		 16427
16428 null_input_bfd = FALSE;
16429 break;
16430 }
16431 }
16432
16433 if (null_input_bfd || only_data_sections)
16434 return TRUE;
16435 }
16436
16437 /* Complain about various flag mismatches. */
16438 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
16439 EF_ARM_EABI_VERSION (out_flags)))
16440 {
16441 _bfd_error_handler
16442 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"),
16443 ibfd, obfd,
16444 (in_flags & EF_ARM_EABIMASK) >> 24,
16445 (out_flags & EF_ARM_EABIMASK) >> 24);
16446 return FALSE;
16447 }
16448
16449 /* Not sure what needs to be checked for EABI versions >= 1. */
16450 /* VxWorks libraries do not use these flags. */
16451 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
16452 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
16453 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
16454 {
16455 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
16456 {
16457 _bfd_error_handler
16458 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
16459 ibfd, obfd,
16460 in_flags & EF_ARM_APCS_26 ? 26 : 32,
16461 out_flags & EF_ARM_APCS_26 ? 26 : 32);
16462 flags_compatible = FALSE;
16463 }
16464
16465 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
16466 {
16467 if (in_flags & EF_ARM_APCS_FLOAT)
16468 _bfd_error_handler
16469 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"),
16470 ibfd, obfd);
16471 else
16472 _bfd_error_handler
16473 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"),
16474 ibfd, obfd);
16475
16476 flags_compatible = FALSE;
16477 }
16478
16479 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
16480 {
16481 if (in_flags & EF_ARM_VFP_FLOAT)
16482 _bfd_error_handler
16483 (_("error: %B uses VFP instructions, whereas %B does not"),
16484 ibfd, obfd);
16485 else
16486 _bfd_error_handler
16487 (_("error: %B uses FPA instructions, whereas %B does not"),
16488 ibfd, obfd);
16489
16490 flags_compatible = FALSE;
16491 }
16492
16493 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
16494 {
16495 if (in_flags & EF_ARM_MAVERICK_FLOAT)
16496 _bfd_error_handler
16497 (_("error: %B uses Maverick instructions, whereas %B does not"),
16498 ibfd, obfd);
16499 else
16500 _bfd_error_handler
16501 (_("error: %B does not use Maverick instructions, whereas %B does"),
16502 ibfd, obfd);
16503
16504 flags_compatible = FALSE;
16505 }
16506
16507#ifdef EF_ARM_SOFT_FLOAT
16508 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
16509 {
16510 /* We can allow interworking between code that is VFP format
16511 layout, and uses either soft float or integer regs for
16512 passing floating point arguments and results. We already
16513 know that the APCS_FLOAT flags match; similarly for VFP
16514 flags. */
16515 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
16516 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
16517 {
16518 if (in_flags & EF_ARM_SOFT_FLOAT)
16519 _bfd_error_handler
16520 (_("error: %B uses software FP, whereas %B uses hardware FP"),
16521 ibfd, obfd);
16522 else
16523 _bfd_error_handler
16524 (_("error: %B uses hardware FP, whereas %B uses software FP"),
16525 ibfd, obfd);
16526
16527 flags_compatible = FALSE;
16528 }
16529 }
16530#endif
16531
16532 /* Interworking mismatch is only a warning. */
16533 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
16534 {
16535 if (in_flags & EF_ARM_INTERWORK)
16536 {
16537 _bfd_error_handler
16538 (_("Warning: %B supports interworking, whereas %B does not"),
16539 ibfd, obfd);
16540 }
16541 else
16542 {
16543 _bfd_error_handler
16544 (_("Warning: %B does not support interworking, whereas %B does"),
16545 ibfd, obfd);
16546 }
16547 }
16548 }
16549
16550 return flags_compatible;
16551}
16552
16553
906e58ca 16554/* Symbian OS Targets. */
7f266840 16555
906e58ca 16556#undef TARGET_LITTLE_SYM
6d00b590 16557#define TARGET_LITTLE_SYM arm_elf32_symbian_le_vec
906e58ca 16558#undef TARGET_LITTLE_NAME
7f266840 16559#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
906e58ca 16560#undef TARGET_BIG_SYM
6d00b590 16561#define TARGET_BIG_SYM arm_elf32_symbian_be_vec
906e58ca 16562#undef TARGET_BIG_NAME
7f266840
DJ		 16563#define TARGET_BIG_NAME "elf32-bigarm-symbian"
16564
16565/* Like elf32_arm_link_hash_table_create -- but overrides
16566 appropriately for Symbian OS. */
906e58ca 16567
7f266840
DJ		 16568static struct bfd_link_hash_table *
16569elf32_arm_symbian_link_hash_table_create (bfd *abfd)
16570{
16571 struct bfd_link_hash_table *ret;
16572
16573 ret = elf32_arm_link_hash_table_create (abfd);
16574 if (ret)
16575 {
16576 struct elf32_arm_link_hash_table *htab
16577 = (struct elf32_arm_link_hash_table *)ret;
16578 /* There is no PLT header for Symbian OS. */
16579 htab->plt_header_size = 0;
95720a86
DJ		 16580 /* The PLT entries are each one instruction and one word. */
16581 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry);
7f266840 16582 htab->symbian_p = 1;
33bfe774
JB		 16583 /* Symbian uses armv5t or above, so use_blx is always true. */
16584 htab->use_blx = 1;
67687978 16585 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 16586 }
16587 return ret;
906e58ca 16588}
7f266840 16589
b35d266b 16590static const struct bfd_elf_special_section
551b43fd 16591elf32_arm_symbian_special_sections[] =
7f266840 16592{
5cd3778d
MM		 16593 /* In a BPABI executable, the dynamic linking sections do not go in
16594 the loadable read-only segment. The post-linker may wish to
16595 refer to these sections, but they are not part of the final
16596 program image. */
0112cd26
NC		 16597 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
16598 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
16599 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
16600 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
16601 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 16602 /* These sections do not need to be writable as the SymbianOS
16603 postlinker will arrange things so that no dynamic relocation is
16604 required. */
0112cd26
NC		 16605 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
16606 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
16607 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
16608 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 16609};
16610
c3c76620 16611static void
906e58ca 16612elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 16613 struct bfd_link_info *link_info)
c3c76620
MM		 16614{
16615 /* BPABI objects are never loaded directly by an OS kernel; they are
16616 processed by a postlinker first, into an OS-specific format. If
16617 the D_PAGED bit is set on the file, BFD will align segments on
16618 page boundaries, so that an OS can directly map the file. With
16619 BPABI objects, that just results in wasted space. In addition,
16620 because we clear the D_PAGED bit, map_sections_to_segments will
16621 recognize that the program headers should not be mapped into any
16622 loadable segment. */
16623 abfd->flags &= ~D_PAGED;
906e58ca 16624 elf32_arm_begin_write_processing (abfd, link_info);
c3c76620 16625}
7f266840
DJ		 16626
16627static bfd_boolean
906e58ca 16628elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 16629 struct bfd_link_info *info)
7f266840
DJ		 16630{
16631 struct elf_segment_map *m;
16632 asection *dynsec;
16633
7f266840
DJ		 16634 /* BPABI shared libraries and executables should have a PT_DYNAMIC
16635 segment. However, because the .dynamic section is not marked
16636 with SEC_LOAD, the generic ELF code will not create such a
16637 segment. */
16638 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
16639 if (dynsec)
16640 {
12bd6957 16641 for (m = elf_seg_map (abfd); m != NULL; m = m->next)
8ded5a0f
AM		 16642 if (m->p_type == PT_DYNAMIC)
16643 break;
16644
16645 if (m == NULL)
16646 {
16647 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
12bd6957
AM		 16648 m->next = elf_seg_map (abfd);
16649 elf_seg_map (abfd) = m;
8ded5a0f 16650 }
7f266840
DJ		 16651 }
16652
b294bdf8
MM		 16653 /* Also call the generic arm routine. */
16654 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 16655}
16656
95720a86
DJ		 16657/* Return address for Ith PLT stub in section PLT, for relocation REL
16658 or (bfd_vma) -1 if it should not be included. */
16659
16660static bfd_vma
16661elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt,
16662 const arelent *rel ATTRIBUTE_UNUSED)
16663{
16664 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i;
16665}
16666
16667
8029a119 16668#undef elf32_bed
7f266840
DJ		 16669#define elf32_bed elf32_arm_symbian_bed
16670
16671/* The dynamic sections are not allocated on SymbianOS; the postlinker
16672 will process them and then discard them. */
906e58ca 16673#undef ELF_DYNAMIC_SEC_FLAGS
7f266840
DJ		 16674#define ELF_DYNAMIC_SEC_FLAGS \
16675 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
16676
00a97672 16677#undef elf_backend_emit_relocs
c3c76620 16678
906e58ca
NC		 16679#undef bfd_elf32_bfd_link_hash_table_create
16680#define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create
16681#undef elf_backend_special_sections
16682#define elf_backend_special_sections elf32_arm_symbian_special_sections
16683#undef elf_backend_begin_write_processing
16684#define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing
16685#undef elf_backend_final_write_processing
16686#define elf_backend_final_write_processing elf32_arm_final_write_processing
16687
16688#undef elf_backend_modify_segment_map
7f266840
DJ		 16689#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
16690
16691/* There is no .got section for BPABI objects, and hence no header. */
906e58ca 16692#undef elf_backend_got_header_size
7f266840
DJ		 16693#define elf_backend_got_header_size 0
16694
16695/* Similarly, there is no .got.plt section. */
906e58ca 16696#undef elf_backend_want_got_plt
7f266840
DJ		 16697#define elf_backend_want_got_plt 0
16698
906e58ca 16699#undef elf_backend_plt_sym_val
95720a86
DJ		 16700#define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val
16701
906e58ca 16702#undef elf_backend_may_use_rel_p
00a97672 16703#define elf_backend_may_use_rel_p 1
906e58ca 16704#undef elf_backend_may_use_rela_p
00a97672 16705#define elf_backend_may_use_rela_p 0
906e58ca 16706#undef elf_backend_default_use_rela_p
00a97672 16707#define elf_backend_default_use_rela_p 0
906e58ca 16708#undef elf_backend_want_plt_sym
00a97672 16709#define elf_backend_want_plt_sym 0
906e58ca 16710#undef ELF_MAXPAGESIZE
00a97672 16711#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 16712
7f266840 16713#include "elf32-target.h"
GDB Binutils - Deliverables
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