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* gdb.texinfo (GDB/MI Development and Front Ends):
[deliverable/binutils-gdb.git] / bfd / elf32-arm.c
CommitLineData
252b5132 1/* 32-bit ELF support for ARM
e44a2c9c
AM		 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
3 2008 Free Software Foundation, Inc.
252b5132
RH		 4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
252b5132
RH		 10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC		 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
7f266840 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
00a97672 24#include "libiberty.h"
7f266840
DJ		 25#include "libbfd.h"
26#include "elf-bfd.h"
00a97672 27#include "elf-vxworks.h"
ee065d83 28#include "elf/arm.h"
7f266840
DJ		 29
30#ifndef NUM_ELEM
31#define NUM_ELEM(a) (sizeof (a) / (sizeof (a)[0]))
32#endif
33
00a97672
RS		 34/* Return the relocation section associated with NAME. HTAB is the
35 bfd's elf32_arm_link_hash_entry. */
36#define RELOC_SECTION(HTAB, NAME) \
37 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME)
38
39/* Return size of a relocation entry. HTAB is the bfd's
40 elf32_arm_link_hash_entry. */
41#define RELOC_SIZE(HTAB) \
42 ((HTAB)->use_rel \
43 ? sizeof (Elf32_External_Rel) \
44 : sizeof (Elf32_External_Rela))
45
46/* Return function to swap relocations in. HTAB is the bfd's
47 elf32_arm_link_hash_entry. */
48#define SWAP_RELOC_IN(HTAB) \
49 ((HTAB)->use_rel \
50 ? bfd_elf32_swap_reloc_in \
51 : bfd_elf32_swap_reloca_in)
52
53/* Return function to swap relocations out. HTAB is the bfd's
54 elf32_arm_link_hash_entry. */
55#define SWAP_RELOC_OUT(HTAB) \
56 ((HTAB)->use_rel \
57 ? bfd_elf32_swap_reloc_out \
58 : bfd_elf32_swap_reloca_out)
59
7f266840
DJ		 60#define elf_info_to_howto 0
61#define elf_info_to_howto_rel elf32_arm_info_to_howto
62
63#define ARM_ELF_ABI_VERSION 0
64#define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM
65
24718e3b 66static struct elf_backend_data elf32_arm_vxworks_bed;
00a97672 67
7f266840
DJ		 68/* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g.
69 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO
70 in that slot. */
71
c19d1205 72static reloc_howto_type elf32_arm_howto_table_1[] =
7f266840
DJ		 73{
74 /* No relocation */
75 HOWTO (R_ARM_NONE, /* type */
76 0, /* rightshift */
77 0, /* size (0 = byte, 1 = short, 2 = long) */
78 0, /* bitsize */
79 FALSE, /* pc_relative */
80 0, /* bitpos */
81 complain_overflow_dont,/* complain_on_overflow */
82 bfd_elf_generic_reloc, /* special_function */
83 "R_ARM_NONE", /* name */
84 FALSE, /* partial_inplace */
85 0, /* src_mask */
86 0, /* dst_mask */
87 FALSE), /* pcrel_offset */
88
89 HOWTO (R_ARM_PC24, /* type */
90 2, /* rightshift */
91 2, /* size (0 = byte, 1 = short, 2 = long) */
92 24, /* bitsize */
93 TRUE, /* pc_relative */
94 0, /* bitpos */
95 complain_overflow_signed,/* complain_on_overflow */
96 bfd_elf_generic_reloc, /* special_function */
97 "R_ARM_PC24", /* name */
98 FALSE, /* partial_inplace */
99 0x00ffffff, /* src_mask */
100 0x00ffffff, /* dst_mask */
101 TRUE), /* pcrel_offset */
102
103 /* 32 bit absolute */
104 HOWTO (R_ARM_ABS32, /* type */
105 0, /* rightshift */
106 2, /* size (0 = byte, 1 = short, 2 = long) */
107 32, /* bitsize */
108 FALSE, /* pc_relative */
109 0, /* bitpos */
110 complain_overflow_bitfield,/* complain_on_overflow */
111 bfd_elf_generic_reloc, /* special_function */
112 "R_ARM_ABS32", /* name */
113 FALSE, /* partial_inplace */
114 0xffffffff, /* src_mask */
115 0xffffffff, /* dst_mask */
116 FALSE), /* pcrel_offset */
117
118 /* standard 32bit pc-relative reloc */
119 HOWTO (R_ARM_REL32, /* type */
120 0, /* rightshift */
121 2, /* size (0 = byte, 1 = short, 2 = long) */
122 32, /* bitsize */
123 TRUE, /* pc_relative */
124 0, /* bitpos */
125 complain_overflow_bitfield,/* complain_on_overflow */
126 bfd_elf_generic_reloc, /* special_function */
127 "R_ARM_REL32", /* name */
128 FALSE, /* partial_inplace */
129 0xffffffff, /* src_mask */
130 0xffffffff, /* dst_mask */
131 TRUE), /* pcrel_offset */
132
c19d1205 133 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */
4962c51a 134 HOWTO (R_ARM_LDR_PC_G0, /* type */
7f266840
DJ		 135 0, /* rightshift */
136 0, /* size (0 = byte, 1 = short, 2 = long) */
4962c51a
MS		 137 32, /* bitsize */
138 TRUE, /* pc_relative */
7f266840 139 0, /* bitpos */
4962c51a 140 complain_overflow_dont,/* complain_on_overflow */
7f266840 141 bfd_elf_generic_reloc, /* special_function */
4962c51a 142 "R_ARM_LDR_PC_G0", /* name */
7f266840 143 FALSE, /* partial_inplace */
4962c51a
MS		 144 0xffffffff, /* src_mask */
145 0xffffffff, /* dst_mask */
146 TRUE), /* pcrel_offset */
7f266840
DJ		 147
148 /* 16 bit absolute */
149 HOWTO (R_ARM_ABS16, /* type */
150 0, /* rightshift */
151 1, /* size (0 = byte, 1 = short, 2 = long) */
152 16, /* bitsize */
153 FALSE, /* pc_relative */
154 0, /* bitpos */
155 complain_overflow_bitfield,/* complain_on_overflow */
156 bfd_elf_generic_reloc, /* special_function */
157 "R_ARM_ABS16", /* name */
158 FALSE, /* partial_inplace */
159 0x0000ffff, /* src_mask */
160 0x0000ffff, /* dst_mask */
161 FALSE), /* pcrel_offset */
162
163 /* 12 bit absolute */
164 HOWTO (R_ARM_ABS12, /* type */
165 0, /* rightshift */
166 2, /* size (0 = byte, 1 = short, 2 = long) */
167 12, /* bitsize */
168 FALSE, /* pc_relative */
169 0, /* bitpos */
170 complain_overflow_bitfield,/* complain_on_overflow */
171 bfd_elf_generic_reloc, /* special_function */
172 "R_ARM_ABS12", /* name */
173 FALSE, /* partial_inplace */
00a97672
RS		 174 0x00000fff, /* src_mask */
175 0x00000fff, /* dst_mask */
7f266840
DJ		 176 FALSE), /* pcrel_offset */
177
178 HOWTO (R_ARM_THM_ABS5, /* type */
179 6, /* rightshift */
180 1, /* size (0 = byte, 1 = short, 2 = long) */
181 5, /* bitsize */
182 FALSE, /* pc_relative */
183 0, /* bitpos */
184 complain_overflow_bitfield,/* complain_on_overflow */
185 bfd_elf_generic_reloc, /* special_function */
186 "R_ARM_THM_ABS5", /* name */
187 FALSE, /* partial_inplace */
188 0x000007e0, /* src_mask */
189 0x000007e0, /* dst_mask */
190 FALSE), /* pcrel_offset */
191
192 /* 8 bit absolute */
193 HOWTO (R_ARM_ABS8, /* type */
194 0, /* rightshift */
195 0, /* size (0 = byte, 1 = short, 2 = long) */
196 8, /* bitsize */
197 FALSE, /* pc_relative */
198 0, /* bitpos */
199 complain_overflow_bitfield,/* complain_on_overflow */
200 bfd_elf_generic_reloc, /* special_function */
201 "R_ARM_ABS8", /* name */
202 FALSE, /* partial_inplace */
203 0x000000ff, /* src_mask */
204 0x000000ff, /* dst_mask */
205 FALSE), /* pcrel_offset */
206
207 HOWTO (R_ARM_SBREL32, /* type */
208 0, /* rightshift */
209 2, /* size (0 = byte, 1 = short, 2 = long) */
210 32, /* bitsize */
211 FALSE, /* pc_relative */
212 0, /* bitpos */
213 complain_overflow_dont,/* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_ARM_SBREL32", /* name */
216 FALSE, /* partial_inplace */
217 0xffffffff, /* src_mask */
218 0xffffffff, /* dst_mask */
219 FALSE), /* pcrel_offset */
220
c19d1205 221 HOWTO (R_ARM_THM_CALL, /* type */
7f266840
DJ		 222 1, /* rightshift */
223 2, /* size (0 = byte, 1 = short, 2 = long) */
e95de063 224 25, /* bitsize */
7f266840
DJ		 225 TRUE, /* pc_relative */
226 0, /* bitpos */
227 complain_overflow_signed,/* complain_on_overflow */
228 bfd_elf_generic_reloc, /* special_function */
c19d1205 229 "R_ARM_THM_CALL", /* name */
7f266840
DJ		 230 FALSE, /* partial_inplace */
231 0x07ff07ff, /* src_mask */
232 0x07ff07ff, /* dst_mask */
233 TRUE), /* pcrel_offset */
234
235 HOWTO (R_ARM_THM_PC8, /* type */
236 1, /* rightshift */
237 1, /* size (0 = byte, 1 = short, 2 = long) */
238 8, /* bitsize */
239 TRUE, /* pc_relative */
240 0, /* bitpos */
241 complain_overflow_signed,/* complain_on_overflow */
242 bfd_elf_generic_reloc, /* special_function */
243 "R_ARM_THM_PC8", /* name */
244 FALSE, /* partial_inplace */
245 0x000000ff, /* src_mask */
246 0x000000ff, /* dst_mask */
247 TRUE), /* pcrel_offset */
248
c19d1205 249 HOWTO (R_ARM_BREL_ADJ, /* type */
7f266840
DJ		 250 1, /* rightshift */
251 1, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 252 32, /* bitsize */
253 FALSE, /* pc_relative */
7f266840
DJ		 254 0, /* bitpos */
255 complain_overflow_signed,/* complain_on_overflow */
256 bfd_elf_generic_reloc, /* special_function */
c19d1205 257 "R_ARM_BREL_ADJ", /* name */
7f266840 258 FALSE, /* partial_inplace */
c19d1205
ZW		 259 0xffffffff, /* src_mask */
260 0xffffffff, /* dst_mask */
261 FALSE), /* pcrel_offset */
7f266840
DJ		 262
263 HOWTO (R_ARM_SWI24, /* type */
264 0, /* rightshift */
265 0, /* size (0 = byte, 1 = short, 2 = long) */
266 0, /* bitsize */
267 FALSE, /* pc_relative */
268 0, /* bitpos */
269 complain_overflow_signed,/* complain_on_overflow */
270 bfd_elf_generic_reloc, /* special_function */
271 "R_ARM_SWI24", /* name */
272 FALSE, /* partial_inplace */
273 0x00000000, /* src_mask */
274 0x00000000, /* dst_mask */
275 FALSE), /* pcrel_offset */
276
277 HOWTO (R_ARM_THM_SWI8, /* type */
278 0, /* rightshift */
279 0, /* size (0 = byte, 1 = short, 2 = long) */
280 0, /* bitsize */
281 FALSE, /* pc_relative */
282 0, /* bitpos */
283 complain_overflow_signed,/* complain_on_overflow */
284 bfd_elf_generic_reloc, /* special_function */
285 "R_ARM_SWI8", /* name */
286 FALSE, /* partial_inplace */
287 0x00000000, /* src_mask */
288 0x00000000, /* dst_mask */
289 FALSE), /* pcrel_offset */
290
291 /* BLX instruction for the ARM. */
292 HOWTO (R_ARM_XPC25, /* type */
293 2, /* rightshift */
294 2, /* size (0 = byte, 1 = short, 2 = long) */
295 25, /* bitsize */
296 TRUE, /* pc_relative */
297 0, /* bitpos */
298 complain_overflow_signed,/* complain_on_overflow */
299 bfd_elf_generic_reloc, /* special_function */
300 "R_ARM_XPC25", /* name */
301 FALSE, /* partial_inplace */
302 0x00ffffff, /* src_mask */
303 0x00ffffff, /* dst_mask */
304 TRUE), /* pcrel_offset */
305
306 /* BLX instruction for the Thumb. */
307 HOWTO (R_ARM_THM_XPC22, /* type */
308 2, /* rightshift */
309 2, /* size (0 = byte, 1 = short, 2 = long) */
310 22, /* bitsize */
311 TRUE, /* pc_relative */
312 0, /* bitpos */
313 complain_overflow_signed,/* complain_on_overflow */
314 bfd_elf_generic_reloc, /* special_function */
315 "R_ARM_THM_XPC22", /* name */
316 FALSE, /* partial_inplace */
317 0x07ff07ff, /* src_mask */
318 0x07ff07ff, /* dst_mask */
319 TRUE), /* pcrel_offset */
320
ba93b8ac 321 /* Dynamic TLS relocations. */
7f266840 322
ba93b8ac
DJ		 323 HOWTO (R_ARM_TLS_DTPMOD32, /* type */
324 0, /* rightshift */
325 2, /* size (0 = byte, 1 = short, 2 = long) */
326 32, /* bitsize */
327 FALSE, /* pc_relative */
328 0, /* bitpos */
329 complain_overflow_bitfield,/* complain_on_overflow */
330 bfd_elf_generic_reloc, /* special_function */
331 "R_ARM_TLS_DTPMOD32", /* name */
332 TRUE, /* partial_inplace */
333 0xffffffff, /* src_mask */
334 0xffffffff, /* dst_mask */
335 FALSE), /* pcrel_offset */
7f266840 336
ba93b8ac
DJ		 337 HOWTO (R_ARM_TLS_DTPOFF32, /* type */
338 0, /* rightshift */
339 2, /* size (0 = byte, 1 = short, 2 = long) */
340 32, /* bitsize */
341 FALSE, /* pc_relative */
342 0, /* bitpos */
343 complain_overflow_bitfield,/* complain_on_overflow */
344 bfd_elf_generic_reloc, /* special_function */
345 "R_ARM_TLS_DTPOFF32", /* name */
346 TRUE, /* partial_inplace */
347 0xffffffff, /* src_mask */
348 0xffffffff, /* dst_mask */
349 FALSE), /* pcrel_offset */
7f266840 350
ba93b8ac
DJ		 351 HOWTO (R_ARM_TLS_TPOFF32, /* type */
352 0, /* rightshift */
353 2, /* size (0 = byte, 1 = short, 2 = long) */
354 32, /* bitsize */
355 FALSE, /* pc_relative */
356 0, /* bitpos */
357 complain_overflow_bitfield,/* complain_on_overflow */
358 bfd_elf_generic_reloc, /* special_function */
359 "R_ARM_TLS_TPOFF32", /* name */
360 TRUE, /* partial_inplace */
361 0xffffffff, /* src_mask */
362 0xffffffff, /* dst_mask */
363 FALSE), /* pcrel_offset */
7f266840
DJ		 364
365 /* Relocs used in ARM Linux */
366
367 HOWTO (R_ARM_COPY, /* type */
368 0, /* rightshift */
369 2, /* size (0 = byte, 1 = short, 2 = long) */
370 32, /* bitsize */
371 FALSE, /* pc_relative */
372 0, /* bitpos */
373 complain_overflow_bitfield,/* complain_on_overflow */
374 bfd_elf_generic_reloc, /* special_function */
375 "R_ARM_COPY", /* name */
376 TRUE, /* partial_inplace */
377 0xffffffff, /* src_mask */
378 0xffffffff, /* dst_mask */
379 FALSE), /* pcrel_offset */
380
381 HOWTO (R_ARM_GLOB_DAT, /* type */
382 0, /* rightshift */
383 2, /* size (0 = byte, 1 = short, 2 = long) */
384 32, /* bitsize */
385 FALSE, /* pc_relative */
386 0, /* bitpos */
387 complain_overflow_bitfield,/* complain_on_overflow */
388 bfd_elf_generic_reloc, /* special_function */
389 "R_ARM_GLOB_DAT", /* name */
390 TRUE, /* partial_inplace */
391 0xffffffff, /* src_mask */
392 0xffffffff, /* dst_mask */
393 FALSE), /* pcrel_offset */
394
395 HOWTO (R_ARM_JUMP_SLOT, /* type */
396 0, /* rightshift */
397 2, /* size (0 = byte, 1 = short, 2 = long) */
398 32, /* bitsize */
399 FALSE, /* pc_relative */
400 0, /* bitpos */
401 complain_overflow_bitfield,/* complain_on_overflow */
402 bfd_elf_generic_reloc, /* special_function */
403 "R_ARM_JUMP_SLOT", /* name */
404 TRUE, /* partial_inplace */
405 0xffffffff, /* src_mask */
406 0xffffffff, /* dst_mask */
407 FALSE), /* pcrel_offset */
408
409 HOWTO (R_ARM_RELATIVE, /* type */
410 0, /* rightshift */
411 2, /* size (0 = byte, 1 = short, 2 = long) */
412 32, /* bitsize */
413 FALSE, /* pc_relative */
414 0, /* bitpos */
415 complain_overflow_bitfield,/* complain_on_overflow */
416 bfd_elf_generic_reloc, /* special_function */
417 "R_ARM_RELATIVE", /* name */
418 TRUE, /* partial_inplace */
419 0xffffffff, /* src_mask */
420 0xffffffff, /* dst_mask */
421 FALSE), /* pcrel_offset */
422
c19d1205 423 HOWTO (R_ARM_GOTOFF32, /* type */
7f266840
DJ		 424 0, /* rightshift */
425 2, /* size (0 = byte, 1 = short, 2 = long) */
426 32, /* bitsize */
427 FALSE, /* pc_relative */
428 0, /* bitpos */
429 complain_overflow_bitfield,/* complain_on_overflow */
430 bfd_elf_generic_reloc, /* special_function */
c19d1205 431 "R_ARM_GOTOFF32", /* name */
7f266840
DJ		 432 TRUE, /* partial_inplace */
433 0xffffffff, /* src_mask */
434 0xffffffff, /* dst_mask */
435 FALSE), /* pcrel_offset */
436
437 HOWTO (R_ARM_GOTPC, /* type */
438 0, /* rightshift */
439 2, /* size (0 = byte, 1 = short, 2 = long) */
440 32, /* bitsize */
441 TRUE, /* pc_relative */
442 0, /* bitpos */
443 complain_overflow_bitfield,/* complain_on_overflow */
444 bfd_elf_generic_reloc, /* special_function */
445 "R_ARM_GOTPC", /* name */
446 TRUE, /* partial_inplace */
447 0xffffffff, /* src_mask */
448 0xffffffff, /* dst_mask */
449 TRUE), /* pcrel_offset */
450
451 HOWTO (R_ARM_GOT32, /* type */
452 0, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 32, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_bitfield,/* complain_on_overflow */
458 bfd_elf_generic_reloc, /* special_function */
459 "R_ARM_GOT32", /* name */
460 TRUE, /* partial_inplace */
461 0xffffffff, /* src_mask */
462 0xffffffff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 HOWTO (R_ARM_PLT32, /* type */
466 2, /* rightshift */
467 2, /* size (0 = byte, 1 = short, 2 = long) */
ce490eda 468 24, /* bitsize */
7f266840
DJ		 469 TRUE, /* pc_relative */
470 0, /* bitpos */
471 complain_overflow_bitfield,/* complain_on_overflow */
472 bfd_elf_generic_reloc, /* special_function */
473 "R_ARM_PLT32", /* name */
ce490eda 474 FALSE, /* partial_inplace */
7f266840
DJ		 475 0x00ffffff, /* src_mask */
476 0x00ffffff, /* dst_mask */
477 TRUE), /* pcrel_offset */
478
479 HOWTO (R_ARM_CALL, /* type */
480 2, /* rightshift */
481 2, /* size (0 = byte, 1 = short, 2 = long) */
482 24, /* bitsize */
483 TRUE, /* pc_relative */
484 0, /* bitpos */
485 complain_overflow_signed,/* complain_on_overflow */
486 bfd_elf_generic_reloc, /* special_function */
487 "R_ARM_CALL", /* name */
488 FALSE, /* partial_inplace */
489 0x00ffffff, /* src_mask */
490 0x00ffffff, /* dst_mask */
491 TRUE), /* pcrel_offset */
492
493 HOWTO (R_ARM_JUMP24, /* type */
494 2, /* rightshift */
495 2, /* size (0 = byte, 1 = short, 2 = long) */
496 24, /* bitsize */
497 TRUE, /* pc_relative */
498 0, /* bitpos */
499 complain_overflow_signed,/* complain_on_overflow */
500 bfd_elf_generic_reloc, /* special_function */
501 "R_ARM_JUMP24", /* name */
502 FALSE, /* partial_inplace */
503 0x00ffffff, /* src_mask */
504 0x00ffffff, /* dst_mask */
505 TRUE), /* pcrel_offset */
506
c19d1205
ZW		 507 HOWTO (R_ARM_THM_JUMP24, /* type */
508 1, /* rightshift */
509 2, /* size (0 = byte, 1 = short, 2 = long) */
510 24, /* bitsize */
511 TRUE, /* pc_relative */
7f266840 512 0, /* bitpos */
c19d1205 513 complain_overflow_signed,/* complain_on_overflow */
7f266840 514 bfd_elf_generic_reloc, /* special_function */
c19d1205 515 "R_ARM_THM_JUMP24", /* name */
7f266840 516 FALSE, /* partial_inplace */
c19d1205
ZW		 517 0x07ff2fff, /* src_mask */
518 0x07ff2fff, /* dst_mask */
519 TRUE), /* pcrel_offset */
7f266840 520
c19d1205 521 HOWTO (R_ARM_BASE_ABS, /* type */
7f266840 522 0, /* rightshift */
c19d1205
ZW		 523 2, /* size (0 = byte, 1 = short, 2 = long) */
524 32, /* bitsize */
7f266840
DJ		 525 FALSE, /* pc_relative */
526 0, /* bitpos */
527 complain_overflow_dont,/* complain_on_overflow */
528 bfd_elf_generic_reloc, /* special_function */
c19d1205 529 "R_ARM_BASE_ABS", /* name */
7f266840 530 FALSE, /* partial_inplace */
c19d1205
ZW		 531 0xffffffff, /* src_mask */
532 0xffffffff, /* dst_mask */
7f266840
DJ		 533 FALSE), /* pcrel_offset */
534
535 HOWTO (R_ARM_ALU_PCREL7_0, /* type */
536 0, /* rightshift */
537 2, /* size (0 = byte, 1 = short, 2 = long) */
538 12, /* bitsize */
539 TRUE, /* pc_relative */
540 0, /* bitpos */
541 complain_overflow_dont,/* complain_on_overflow */
542 bfd_elf_generic_reloc, /* special_function */
543 "R_ARM_ALU_PCREL_7_0", /* name */
544 FALSE, /* partial_inplace */
545 0x00000fff, /* src_mask */
546 0x00000fff, /* dst_mask */
547 TRUE), /* pcrel_offset */
548
549 HOWTO (R_ARM_ALU_PCREL15_8, /* type */
550 0, /* rightshift */
551 2, /* size (0 = byte, 1 = short, 2 = long) */
552 12, /* bitsize */
553 TRUE, /* pc_relative */
554 8, /* bitpos */
555 complain_overflow_dont,/* complain_on_overflow */
556 bfd_elf_generic_reloc, /* special_function */
557 "R_ARM_ALU_PCREL_15_8",/* name */
558 FALSE, /* partial_inplace */
559 0x00000fff, /* src_mask */
560 0x00000fff, /* dst_mask */
561 TRUE), /* pcrel_offset */
562
563 HOWTO (R_ARM_ALU_PCREL23_15, /* type */
564 0, /* rightshift */
565 2, /* size (0 = byte, 1 = short, 2 = long) */
566 12, /* bitsize */
567 TRUE, /* pc_relative */
568 16, /* bitpos */
569 complain_overflow_dont,/* complain_on_overflow */
570 bfd_elf_generic_reloc, /* special_function */
571 "R_ARM_ALU_PCREL_23_15",/* name */
572 FALSE, /* partial_inplace */
573 0x00000fff, /* src_mask */
574 0x00000fff, /* dst_mask */
575 TRUE), /* pcrel_offset */
576
577 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */
578 0, /* rightshift */
579 2, /* size (0 = byte, 1 = short, 2 = long) */
580 12, /* bitsize */
581 FALSE, /* pc_relative */
582 0, /* bitpos */
583 complain_overflow_dont,/* complain_on_overflow */
584 bfd_elf_generic_reloc, /* special_function */
585 "R_ARM_LDR_SBREL_11_0",/* name */
586 FALSE, /* partial_inplace */
587 0x00000fff, /* src_mask */
588 0x00000fff, /* dst_mask */
589 FALSE), /* pcrel_offset */
590
591 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */
592 0, /* rightshift */
593 2, /* size (0 = byte, 1 = short, 2 = long) */
594 8, /* bitsize */
595 FALSE, /* pc_relative */
596 12, /* bitpos */
597 complain_overflow_dont,/* complain_on_overflow */
598 bfd_elf_generic_reloc, /* special_function */
599 "R_ARM_ALU_SBREL_19_12",/* name */
600 FALSE, /* partial_inplace */
601 0x000ff000, /* src_mask */
602 0x000ff000, /* dst_mask */
603 FALSE), /* pcrel_offset */
604
605 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */
606 0, /* rightshift */
607 2, /* size (0 = byte, 1 = short, 2 = long) */
608 8, /* bitsize */
609 FALSE, /* pc_relative */
610 20, /* bitpos */
611 complain_overflow_dont,/* complain_on_overflow */
612 bfd_elf_generic_reloc, /* special_function */
613 "R_ARM_ALU_SBREL_27_20",/* name */
614 FALSE, /* partial_inplace */
615 0x0ff00000, /* src_mask */
616 0x0ff00000, /* dst_mask */
617 FALSE), /* pcrel_offset */
618
619 HOWTO (R_ARM_TARGET1, /* type */
620 0, /* rightshift */
621 2, /* size (0 = byte, 1 = short, 2 = long) */
622 32, /* bitsize */
623 FALSE, /* pc_relative */
624 0, /* bitpos */
625 complain_overflow_dont,/* complain_on_overflow */
626 bfd_elf_generic_reloc, /* special_function */
627 "R_ARM_TARGET1", /* name */
628 FALSE, /* partial_inplace */
629 0xffffffff, /* src_mask */
630 0xffffffff, /* dst_mask */
631 FALSE), /* pcrel_offset */
632
633 HOWTO (R_ARM_ROSEGREL32, /* type */
634 0, /* rightshift */
635 2, /* size (0 = byte, 1 = short, 2 = long) */
636 32, /* bitsize */
637 FALSE, /* pc_relative */
638 0, /* bitpos */
639 complain_overflow_dont,/* complain_on_overflow */
640 bfd_elf_generic_reloc, /* special_function */
641 "R_ARM_ROSEGREL32", /* name */
642 FALSE, /* partial_inplace */
643 0xffffffff, /* src_mask */
644 0xffffffff, /* dst_mask */
645 FALSE), /* pcrel_offset */
646
647 HOWTO (R_ARM_V4BX, /* type */
648 0, /* rightshift */
649 2, /* size (0 = byte, 1 = short, 2 = long) */
650 32, /* bitsize */
651 FALSE, /* pc_relative */
652 0, /* bitpos */
653 complain_overflow_dont,/* complain_on_overflow */
654 bfd_elf_generic_reloc, /* special_function */
655 "R_ARM_V4BX", /* name */
656 FALSE, /* partial_inplace */
657 0xffffffff, /* src_mask */
658 0xffffffff, /* dst_mask */
659 FALSE), /* pcrel_offset */
660
661 HOWTO (R_ARM_TARGET2, /* type */
662 0, /* rightshift */
663 2, /* size (0 = byte, 1 = short, 2 = long) */
664 32, /* bitsize */
665 FALSE, /* pc_relative */
666 0, /* bitpos */
667 complain_overflow_signed,/* complain_on_overflow */
668 bfd_elf_generic_reloc, /* special_function */
669 "R_ARM_TARGET2", /* name */
670 FALSE, /* partial_inplace */
671 0xffffffff, /* src_mask */
672 0xffffffff, /* dst_mask */
673 TRUE), /* pcrel_offset */
674
675 HOWTO (R_ARM_PREL31, /* type */
676 0, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 31, /* bitsize */
679 TRUE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_signed,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_ARM_PREL31", /* name */
684 FALSE, /* partial_inplace */
685 0x7fffffff, /* src_mask */
686 0x7fffffff, /* dst_mask */
687 TRUE), /* pcrel_offset */
c19d1205
ZW		 688
689 HOWTO (R_ARM_MOVW_ABS_NC, /* type */
690 0, /* rightshift */
691 2, /* size (0 = byte, 1 = short, 2 = long) */
692 16, /* bitsize */
693 FALSE, /* pc_relative */
694 0, /* bitpos */
695 complain_overflow_dont,/* complain_on_overflow */
696 bfd_elf_generic_reloc, /* special_function */
697 "R_ARM_MOVW_ABS_NC", /* name */
698 FALSE, /* partial_inplace */
39623e12
PB		 699 0x000f0fff, /* src_mask */
700 0x000f0fff, /* dst_mask */
c19d1205
ZW		 701 FALSE), /* pcrel_offset */
702
703 HOWTO (R_ARM_MOVT_ABS, /* type */
704 0, /* rightshift */
705 2, /* size (0 = byte, 1 = short, 2 = long) */
706 16, /* bitsize */
707 FALSE, /* pc_relative */
708 0, /* bitpos */
709 complain_overflow_bitfield,/* complain_on_overflow */
710 bfd_elf_generic_reloc, /* special_function */
711 "R_ARM_MOVT_ABS", /* name */
712 FALSE, /* partial_inplace */
39623e12
PB		 713 0x000f0fff, /* src_mask */
714 0x000f0fff, /* dst_mask */
c19d1205
ZW		 715 FALSE), /* pcrel_offset */
716
717 HOWTO (R_ARM_MOVW_PREL_NC, /* type */
718 0, /* rightshift */
719 2, /* size (0 = byte, 1 = short, 2 = long) */
720 16, /* bitsize */
721 TRUE, /* pc_relative */
722 0, /* bitpos */
723 complain_overflow_dont,/* complain_on_overflow */
724 bfd_elf_generic_reloc, /* special_function */
725 "R_ARM_MOVW_PREL_NC", /* name */
726 FALSE, /* partial_inplace */
39623e12
PB		 727 0x000f0fff, /* src_mask */
728 0x000f0fff, /* dst_mask */
c19d1205
ZW		 729 TRUE), /* pcrel_offset */
730
731 HOWTO (R_ARM_MOVT_PREL, /* type */
732 0, /* rightshift */
733 2, /* size (0 = byte, 1 = short, 2 = long) */
734 16, /* bitsize */
735 TRUE, /* pc_relative */
736 0, /* bitpos */
737 complain_overflow_bitfield,/* complain_on_overflow */
738 bfd_elf_generic_reloc, /* special_function */
739 "R_ARM_MOVT_PREL", /* name */
740 FALSE, /* partial_inplace */
39623e12
PB		 741 0x000f0fff, /* src_mask */
742 0x000f0fff, /* dst_mask */
c19d1205
ZW		 743 TRUE), /* pcrel_offset */
744
745 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */
746 0, /* rightshift */
747 2, /* size (0 = byte, 1 = short, 2 = long) */
748 16, /* bitsize */
749 FALSE, /* pc_relative */
750 0, /* bitpos */
751 complain_overflow_dont,/* complain_on_overflow */
752 bfd_elf_generic_reloc, /* special_function */
753 "R_ARM_THM_MOVW_ABS_NC",/* name */
754 FALSE, /* partial_inplace */
755 0x040f70ff, /* src_mask */
756 0x040f70ff, /* dst_mask */
757 FALSE), /* pcrel_offset */
758
759 HOWTO (R_ARM_THM_MOVT_ABS, /* type */
760 0, /* rightshift */
761 2, /* size (0 = byte, 1 = short, 2 = long) */
762 16, /* bitsize */
763 FALSE, /* pc_relative */
764 0, /* bitpos */
765 complain_overflow_bitfield,/* complain_on_overflow */
766 bfd_elf_generic_reloc, /* special_function */
767 "R_ARM_THM_MOVT_ABS", /* name */
768 FALSE, /* partial_inplace */
769 0x040f70ff, /* src_mask */
770 0x040f70ff, /* dst_mask */
771 FALSE), /* pcrel_offset */
772
773 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */
774 0, /* rightshift */
775 2, /* size (0 = byte, 1 = short, 2 = long) */
776 16, /* bitsize */
777 TRUE, /* pc_relative */
778 0, /* bitpos */
779 complain_overflow_dont,/* complain_on_overflow */
780 bfd_elf_generic_reloc, /* special_function */
781 "R_ARM_THM_MOVW_PREL_NC",/* name */
782 FALSE, /* partial_inplace */
783 0x040f70ff, /* src_mask */
784 0x040f70ff, /* dst_mask */
785 TRUE), /* pcrel_offset */
786
787 HOWTO (R_ARM_THM_MOVT_PREL, /* type */
788 0, /* rightshift */
789 2, /* size (0 = byte, 1 = short, 2 = long) */
790 16, /* bitsize */
791 TRUE, /* pc_relative */
792 0, /* bitpos */
793 complain_overflow_bitfield,/* complain_on_overflow */
794 bfd_elf_generic_reloc, /* special_function */
795 "R_ARM_THM_MOVT_PREL", /* name */
796 FALSE, /* partial_inplace */
797 0x040f70ff, /* src_mask */
798 0x040f70ff, /* dst_mask */
799 TRUE), /* pcrel_offset */
800
801 HOWTO (R_ARM_THM_JUMP19, /* type */
802 1, /* rightshift */
803 2, /* size (0 = byte, 1 = short, 2 = long) */
804 19, /* bitsize */
805 TRUE, /* pc_relative */
806 0, /* bitpos */
807 complain_overflow_signed,/* complain_on_overflow */
808 bfd_elf_generic_reloc, /* special_function */
809 "R_ARM_THM_JUMP19", /* name */
810 FALSE, /* partial_inplace */
811 0x043f2fff, /* src_mask */
812 0x043f2fff, /* dst_mask */
813 TRUE), /* pcrel_offset */
814
815 HOWTO (R_ARM_THM_JUMP6, /* type */
816 1, /* rightshift */
817 1, /* size (0 = byte, 1 = short, 2 = long) */
818 6, /* bitsize */
819 TRUE, /* pc_relative */
820 0, /* bitpos */
821 complain_overflow_unsigned,/* complain_on_overflow */
822 bfd_elf_generic_reloc, /* special_function */
823 "R_ARM_THM_JUMP6", /* name */
824 FALSE, /* partial_inplace */
825 0x02f8, /* src_mask */
826 0x02f8, /* dst_mask */
827 TRUE), /* pcrel_offset */
828
829 /* These are declared as 13-bit signed relocations because we can
830 address -4095 .. 4095(base) by altering ADDW to SUBW or vice
831 versa. */
832 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */
833 0, /* rightshift */
834 2, /* size (0 = byte, 1 = short, 2 = long) */
835 13, /* bitsize */
836 TRUE, /* pc_relative */
837 0, /* bitpos */
2cab6cc3 838 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 839 bfd_elf_generic_reloc, /* special_function */
840 "R_ARM_THM_ALU_PREL_11_0",/* name */
841 FALSE, /* partial_inplace */
2cab6cc3
MS		 842 0xffffffff, /* src_mask */
843 0xffffffff, /* dst_mask */
c19d1205
ZW		 844 TRUE), /* pcrel_offset */
845
846 HOWTO (R_ARM_THM_PC12, /* type */
847 0, /* rightshift */
848 2, /* size (0 = byte, 1 = short, 2 = long) */
849 13, /* bitsize */
850 TRUE, /* pc_relative */
851 0, /* bitpos */
2cab6cc3 852 complain_overflow_dont,/* complain_on_overflow */
c19d1205
ZW		 853 bfd_elf_generic_reloc, /* special_function */
854 "R_ARM_THM_PC12", /* name */
855 FALSE, /* partial_inplace */
2cab6cc3
MS		 856 0xffffffff, /* src_mask */
857 0xffffffff, /* dst_mask */
c19d1205
ZW		 858 TRUE), /* pcrel_offset */
859
860 HOWTO (R_ARM_ABS32_NOI, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_dont,/* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_ARM_ABS32_NOI", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 HOWTO (R_ARM_REL32_NOI, /* type */
875 0, /* rightshift */
876 2, /* size (0 = byte, 1 = short, 2 = long) */
877 32, /* bitsize */
878 TRUE, /* pc_relative */
879 0, /* bitpos */
880 complain_overflow_dont,/* complain_on_overflow */
881 bfd_elf_generic_reloc, /* special_function */
882 "R_ARM_REL32_NOI", /* name */
883 FALSE, /* partial_inplace */
884 0xffffffff, /* src_mask */
885 0xffffffff, /* dst_mask */
886 FALSE), /* pcrel_offset */
7f266840 887
4962c51a
MS		 888 /* Group relocations. */
889
890 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */
891 0, /* rightshift */
892 2, /* size (0 = byte, 1 = short, 2 = long) */
893 32, /* bitsize */
894 TRUE, /* pc_relative */
895 0, /* bitpos */
896 complain_overflow_dont,/* complain_on_overflow */
897 bfd_elf_generic_reloc, /* special_function */
898 "R_ARM_ALU_PC_G0_NC", /* name */
899 FALSE, /* partial_inplace */
900 0xffffffff, /* src_mask */
901 0xffffffff, /* dst_mask */
902 TRUE), /* pcrel_offset */
903
904 HOWTO (R_ARM_ALU_PC_G0, /* type */
905 0, /* rightshift */
906 2, /* size (0 = byte, 1 = short, 2 = long) */
907 32, /* bitsize */
908 TRUE, /* pc_relative */
909 0, /* bitpos */
910 complain_overflow_dont,/* complain_on_overflow */
911 bfd_elf_generic_reloc, /* special_function */
912 "R_ARM_ALU_PC_G0", /* name */
913 FALSE, /* partial_inplace */
914 0xffffffff, /* src_mask */
915 0xffffffff, /* dst_mask */
916 TRUE), /* pcrel_offset */
917
918 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */
919 0, /* rightshift */
920 2, /* size (0 = byte, 1 = short, 2 = long) */
921 32, /* bitsize */
922 TRUE, /* pc_relative */
923 0, /* bitpos */
924 complain_overflow_dont,/* complain_on_overflow */
925 bfd_elf_generic_reloc, /* special_function */
926 "R_ARM_ALU_PC_G1_NC", /* name */
927 FALSE, /* partial_inplace */
928 0xffffffff, /* src_mask */
929 0xffffffff, /* dst_mask */
930 TRUE), /* pcrel_offset */
931
932 HOWTO (R_ARM_ALU_PC_G1, /* type */
933 0, /* rightshift */
934 2, /* size (0 = byte, 1 = short, 2 = long) */
935 32, /* bitsize */
936 TRUE, /* pc_relative */
937 0, /* bitpos */
938 complain_overflow_dont,/* complain_on_overflow */
939 bfd_elf_generic_reloc, /* special_function */
940 "R_ARM_ALU_PC_G1", /* name */
941 FALSE, /* partial_inplace */
942 0xffffffff, /* src_mask */
943 0xffffffff, /* dst_mask */
944 TRUE), /* pcrel_offset */
945
946 HOWTO (R_ARM_ALU_PC_G2, /* type */
947 0, /* rightshift */
948 2, /* size (0 = byte, 1 = short, 2 = long) */
949 32, /* bitsize */
950 TRUE, /* pc_relative */
951 0, /* bitpos */
952 complain_overflow_dont,/* complain_on_overflow */
953 bfd_elf_generic_reloc, /* special_function */
954 "R_ARM_ALU_PC_G2", /* name */
955 FALSE, /* partial_inplace */
956 0xffffffff, /* src_mask */
957 0xffffffff, /* dst_mask */
958 TRUE), /* pcrel_offset */
959
960 HOWTO (R_ARM_LDR_PC_G1, /* type */
961 0, /* rightshift */
962 2, /* size (0 = byte, 1 = short, 2 = long) */
963 32, /* bitsize */
964 TRUE, /* pc_relative */
965 0, /* bitpos */
966 complain_overflow_dont,/* complain_on_overflow */
967 bfd_elf_generic_reloc, /* special_function */
968 "R_ARM_LDR_PC_G1", /* name */
969 FALSE, /* partial_inplace */
970 0xffffffff, /* src_mask */
971 0xffffffff, /* dst_mask */
972 TRUE), /* pcrel_offset */
973
974 HOWTO (R_ARM_LDR_PC_G2, /* type */
975 0, /* rightshift */
976 2, /* size (0 = byte, 1 = short, 2 = long) */
977 32, /* bitsize */
978 TRUE, /* pc_relative */
979 0, /* bitpos */
980 complain_overflow_dont,/* complain_on_overflow */
981 bfd_elf_generic_reloc, /* special_function */
982 "R_ARM_LDR_PC_G2", /* name */
983 FALSE, /* partial_inplace */
984 0xffffffff, /* src_mask */
985 0xffffffff, /* dst_mask */
986 TRUE), /* pcrel_offset */
987
988 HOWTO (R_ARM_LDRS_PC_G0, /* type */
989 0, /* rightshift */
990 2, /* size (0 = byte, 1 = short, 2 = long) */
991 32, /* bitsize */
992 TRUE, /* pc_relative */
993 0, /* bitpos */
994 complain_overflow_dont,/* complain_on_overflow */
995 bfd_elf_generic_reloc, /* special_function */
996 "R_ARM_LDRS_PC_G0", /* name */
997 FALSE, /* partial_inplace */
998 0xffffffff, /* src_mask */
999 0xffffffff, /* dst_mask */
1000 TRUE), /* pcrel_offset */
1001
1002 HOWTO (R_ARM_LDRS_PC_G1, /* type */
1003 0, /* rightshift */
1004 2, /* size (0 = byte, 1 = short, 2 = long) */
1005 32, /* bitsize */
1006 TRUE, /* pc_relative */
1007 0, /* bitpos */
1008 complain_overflow_dont,/* complain_on_overflow */
1009 bfd_elf_generic_reloc, /* special_function */
1010 "R_ARM_LDRS_PC_G1", /* name */
1011 FALSE, /* partial_inplace */
1012 0xffffffff, /* src_mask */
1013 0xffffffff, /* dst_mask */
1014 TRUE), /* pcrel_offset */
1015
1016 HOWTO (R_ARM_LDRS_PC_G2, /* type */
1017 0, /* rightshift */
1018 2, /* size (0 = byte, 1 = short, 2 = long) */
1019 32, /* bitsize */
1020 TRUE, /* pc_relative */
1021 0, /* bitpos */
1022 complain_overflow_dont,/* complain_on_overflow */
1023 bfd_elf_generic_reloc, /* special_function */
1024 "R_ARM_LDRS_PC_G2", /* name */
1025 FALSE, /* partial_inplace */
1026 0xffffffff, /* src_mask */
1027 0xffffffff, /* dst_mask */
1028 TRUE), /* pcrel_offset */
1029
1030 HOWTO (R_ARM_LDC_PC_G0, /* type */
1031 0, /* rightshift */
1032 2, /* size (0 = byte, 1 = short, 2 = long) */
1033 32, /* bitsize */
1034 TRUE, /* pc_relative */
1035 0, /* bitpos */
1036 complain_overflow_dont,/* complain_on_overflow */
1037 bfd_elf_generic_reloc, /* special_function */
1038 "R_ARM_LDC_PC_G0", /* name */
1039 FALSE, /* partial_inplace */
1040 0xffffffff, /* src_mask */
1041 0xffffffff, /* dst_mask */
1042 TRUE), /* pcrel_offset */
1043
1044 HOWTO (R_ARM_LDC_PC_G1, /* type */
1045 0, /* rightshift */
1046 2, /* size (0 = byte, 1 = short, 2 = long) */
1047 32, /* bitsize */
1048 TRUE, /* pc_relative */
1049 0, /* bitpos */
1050 complain_overflow_dont,/* complain_on_overflow */
1051 bfd_elf_generic_reloc, /* special_function */
1052 "R_ARM_LDC_PC_G1", /* name */
1053 FALSE, /* partial_inplace */
1054 0xffffffff, /* src_mask */
1055 0xffffffff, /* dst_mask */
1056 TRUE), /* pcrel_offset */
1057
1058 HOWTO (R_ARM_LDC_PC_G2, /* type */
1059 0, /* rightshift */
1060 2, /* size (0 = byte, 1 = short, 2 = long) */
1061 32, /* bitsize */
1062 TRUE, /* pc_relative */
1063 0, /* bitpos */
1064 complain_overflow_dont,/* complain_on_overflow */
1065 bfd_elf_generic_reloc, /* special_function */
1066 "R_ARM_LDC_PC_G2", /* name */
1067 FALSE, /* partial_inplace */
1068 0xffffffff, /* src_mask */
1069 0xffffffff, /* dst_mask */
1070 TRUE), /* pcrel_offset */
1071
1072 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */
1073 0, /* rightshift */
1074 2, /* size (0 = byte, 1 = short, 2 = long) */
1075 32, /* bitsize */
1076 TRUE, /* pc_relative */
1077 0, /* bitpos */
1078 complain_overflow_dont,/* complain_on_overflow */
1079 bfd_elf_generic_reloc, /* special_function */
1080 "R_ARM_ALU_SB_G0_NC", /* name */
1081 FALSE, /* partial_inplace */
1082 0xffffffff, /* src_mask */
1083 0xffffffff, /* dst_mask */
1084 TRUE), /* pcrel_offset */
1085
1086 HOWTO (R_ARM_ALU_SB_G0, /* type */
1087 0, /* rightshift */
1088 2, /* size (0 = byte, 1 = short, 2 = long) */
1089 32, /* bitsize */
1090 TRUE, /* pc_relative */
1091 0, /* bitpos */
1092 complain_overflow_dont,/* complain_on_overflow */
1093 bfd_elf_generic_reloc, /* special_function */
1094 "R_ARM_ALU_SB_G0", /* name */
1095 FALSE, /* partial_inplace */
1096 0xffffffff, /* src_mask */
1097 0xffffffff, /* dst_mask */
1098 TRUE), /* pcrel_offset */
1099
1100 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 TRUE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 bfd_elf_generic_reloc, /* special_function */
1108 "R_ARM_ALU_SB_G1_NC", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 TRUE), /* pcrel_offset */
1113
1114 HOWTO (R_ARM_ALU_SB_G1, /* type */
1115 0, /* rightshift */
1116 2, /* size (0 = byte, 1 = short, 2 = long) */
1117 32, /* bitsize */
1118 TRUE, /* pc_relative */
1119 0, /* bitpos */
1120 complain_overflow_dont,/* complain_on_overflow */
1121 bfd_elf_generic_reloc, /* special_function */
1122 "R_ARM_ALU_SB_G1", /* name */
1123 FALSE, /* partial_inplace */
1124 0xffffffff, /* src_mask */
1125 0xffffffff, /* dst_mask */
1126 TRUE), /* pcrel_offset */
1127
1128 HOWTO (R_ARM_ALU_SB_G2, /* type */
1129 0, /* rightshift */
1130 2, /* size (0 = byte, 1 = short, 2 = long) */
1131 32, /* bitsize */
1132 TRUE, /* pc_relative */
1133 0, /* bitpos */
1134 complain_overflow_dont,/* complain_on_overflow */
1135 bfd_elf_generic_reloc, /* special_function */
1136 "R_ARM_ALU_SB_G2", /* name */
1137 FALSE, /* partial_inplace */
1138 0xffffffff, /* src_mask */
1139 0xffffffff, /* dst_mask */
1140 TRUE), /* pcrel_offset */
1141
1142 HOWTO (R_ARM_LDR_SB_G0, /* type */
1143 0, /* rightshift */
1144 2, /* size (0 = byte, 1 = short, 2 = long) */
1145 32, /* bitsize */
1146 TRUE, /* pc_relative */
1147 0, /* bitpos */
1148 complain_overflow_dont,/* complain_on_overflow */
1149 bfd_elf_generic_reloc, /* special_function */
1150 "R_ARM_LDR_SB_G0", /* name */
1151 FALSE, /* partial_inplace */
1152 0xffffffff, /* src_mask */
1153 0xffffffff, /* dst_mask */
1154 TRUE), /* pcrel_offset */
1155
1156 HOWTO (R_ARM_LDR_SB_G1, /* type */
1157 0, /* rightshift */
1158 2, /* size (0 = byte, 1 = short, 2 = long) */
1159 32, /* bitsize */
1160 TRUE, /* pc_relative */
1161 0, /* bitpos */
1162 complain_overflow_dont,/* complain_on_overflow */
1163 bfd_elf_generic_reloc, /* special_function */
1164 "R_ARM_LDR_SB_G1", /* name */
1165 FALSE, /* partial_inplace */
1166 0xffffffff, /* src_mask */
1167 0xffffffff, /* dst_mask */
1168 TRUE), /* pcrel_offset */
1169
1170 HOWTO (R_ARM_LDR_SB_G2, /* type */
1171 0, /* rightshift */
1172 2, /* size (0 = byte, 1 = short, 2 = long) */
1173 32, /* bitsize */
1174 TRUE, /* pc_relative */
1175 0, /* bitpos */
1176 complain_overflow_dont,/* complain_on_overflow */
1177 bfd_elf_generic_reloc, /* special_function */
1178 "R_ARM_LDR_SB_G2", /* name */
1179 FALSE, /* partial_inplace */
1180 0xffffffff, /* src_mask */
1181 0xffffffff, /* dst_mask */
1182 TRUE), /* pcrel_offset */
1183
1184 HOWTO (R_ARM_LDRS_SB_G0, /* type */
1185 0, /* rightshift */
1186 2, /* size (0 = byte, 1 = short, 2 = long) */
1187 32, /* bitsize */
1188 TRUE, /* pc_relative */
1189 0, /* bitpos */
1190 complain_overflow_dont,/* complain_on_overflow */
1191 bfd_elf_generic_reloc, /* special_function */
1192 "R_ARM_LDRS_SB_G0", /* name */
1193 FALSE, /* partial_inplace */
1194 0xffffffff, /* src_mask */
1195 0xffffffff, /* dst_mask */
1196 TRUE), /* pcrel_offset */
1197
1198 HOWTO (R_ARM_LDRS_SB_G1, /* type */
1199 0, /* rightshift */
1200 2, /* size (0 = byte, 1 = short, 2 = long) */
1201 32, /* bitsize */
1202 TRUE, /* pc_relative */
1203 0, /* bitpos */
1204 complain_overflow_dont,/* complain_on_overflow */
1205 bfd_elf_generic_reloc, /* special_function */
1206 "R_ARM_LDRS_SB_G1", /* name */
1207 FALSE, /* partial_inplace */
1208 0xffffffff, /* src_mask */
1209 0xffffffff, /* dst_mask */
1210 TRUE), /* pcrel_offset */
1211
1212 HOWTO (R_ARM_LDRS_SB_G2, /* type */
1213 0, /* rightshift */
1214 2, /* size (0 = byte, 1 = short, 2 = long) */
1215 32, /* bitsize */
1216 TRUE, /* pc_relative */
1217 0, /* bitpos */
1218 complain_overflow_dont,/* complain_on_overflow */
1219 bfd_elf_generic_reloc, /* special_function */
1220 "R_ARM_LDRS_SB_G2", /* name */
1221 FALSE, /* partial_inplace */
1222 0xffffffff, /* src_mask */
1223 0xffffffff, /* dst_mask */
1224 TRUE), /* pcrel_offset */
1225
1226 HOWTO (R_ARM_LDC_SB_G0, /* type */
1227 0, /* rightshift */
1228 2, /* size (0 = byte, 1 = short, 2 = long) */
1229 32, /* bitsize */
1230 TRUE, /* pc_relative */
1231 0, /* bitpos */
1232 complain_overflow_dont,/* complain_on_overflow */
1233 bfd_elf_generic_reloc, /* special_function */
1234 "R_ARM_LDC_SB_G0", /* name */
1235 FALSE, /* partial_inplace */
1236 0xffffffff, /* src_mask */
1237 0xffffffff, /* dst_mask */
1238 TRUE), /* pcrel_offset */
1239
1240 HOWTO (R_ARM_LDC_SB_G1, /* type */
1241 0, /* rightshift */
1242 2, /* size (0 = byte, 1 = short, 2 = long) */
1243 32, /* bitsize */
1244 TRUE, /* pc_relative */
1245 0, /* bitpos */
1246 complain_overflow_dont,/* complain_on_overflow */
1247 bfd_elf_generic_reloc, /* special_function */
1248 "R_ARM_LDC_SB_G1", /* name */
1249 FALSE, /* partial_inplace */
1250 0xffffffff, /* src_mask */
1251 0xffffffff, /* dst_mask */
1252 TRUE), /* pcrel_offset */
1253
1254 HOWTO (R_ARM_LDC_SB_G2, /* type */
1255 0, /* rightshift */
1256 2, /* size (0 = byte, 1 = short, 2 = long) */
1257 32, /* bitsize */
1258 TRUE, /* pc_relative */
1259 0, /* bitpos */
1260 complain_overflow_dont,/* complain_on_overflow */
1261 bfd_elf_generic_reloc, /* special_function */
1262 "R_ARM_LDC_SB_G2", /* name */
1263 FALSE, /* partial_inplace */
1264 0xffffffff, /* src_mask */
1265 0xffffffff, /* dst_mask */
1266 TRUE), /* pcrel_offset */
1267
1268 /* End of group relocations. */
c19d1205 1269
c19d1205
ZW		 1270 HOWTO (R_ARM_MOVW_BREL_NC, /* type */
1271 0, /* rightshift */
1272 2, /* size (0 = byte, 1 = short, 2 = long) */
1273 16, /* bitsize */
1274 FALSE, /* pc_relative */
1275 0, /* bitpos */
1276 complain_overflow_dont,/* complain_on_overflow */
1277 bfd_elf_generic_reloc, /* special_function */
1278 "R_ARM_MOVW_BREL_NC", /* name */
1279 FALSE, /* partial_inplace */
1280 0x0000ffff, /* src_mask */
1281 0x0000ffff, /* dst_mask */
1282 FALSE), /* pcrel_offset */
1283
1284 HOWTO (R_ARM_MOVT_BREL, /* type */
1285 0, /* rightshift */
1286 2, /* size (0 = byte, 1 = short, 2 = long) */
1287 16, /* bitsize */
1288 FALSE, /* pc_relative */
1289 0, /* bitpos */
1290 complain_overflow_bitfield,/* complain_on_overflow */
1291 bfd_elf_generic_reloc, /* special_function */
1292 "R_ARM_MOVT_BREL", /* name */
1293 FALSE, /* partial_inplace */
1294 0x0000ffff, /* src_mask */
1295 0x0000ffff, /* dst_mask */
1296 FALSE), /* pcrel_offset */
1297
1298 HOWTO (R_ARM_MOVW_BREL, /* type */
1299 0, /* rightshift */
1300 2, /* size (0 = byte, 1 = short, 2 = long) */
1301 16, /* bitsize */
1302 FALSE, /* pc_relative */
1303 0, /* bitpos */
1304 complain_overflow_dont,/* complain_on_overflow */
1305 bfd_elf_generic_reloc, /* special_function */
1306 "R_ARM_MOVW_BREL", /* name */
1307 FALSE, /* partial_inplace */
1308 0x0000ffff, /* src_mask */
1309 0x0000ffff, /* dst_mask */
1310 FALSE), /* pcrel_offset */
1311
1312 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */
1313 0, /* rightshift */
1314 2, /* size (0 = byte, 1 = short, 2 = long) */
1315 16, /* bitsize */
1316 FALSE, /* pc_relative */
1317 0, /* bitpos */
1318 complain_overflow_dont,/* complain_on_overflow */
1319 bfd_elf_generic_reloc, /* special_function */
1320 "R_ARM_THM_MOVW_BREL_NC",/* name */
1321 FALSE, /* partial_inplace */
1322 0x040f70ff, /* src_mask */
1323 0x040f70ff, /* dst_mask */
1324 FALSE), /* pcrel_offset */
1325
1326 HOWTO (R_ARM_THM_MOVT_BREL, /* type */
1327 0, /* rightshift */
1328 2, /* size (0 = byte, 1 = short, 2 = long) */
1329 16, /* bitsize */
1330 FALSE, /* pc_relative */
1331 0, /* bitpos */
1332 complain_overflow_bitfield,/* complain_on_overflow */
1333 bfd_elf_generic_reloc, /* special_function */
1334 "R_ARM_THM_MOVT_BREL", /* name */
1335 FALSE, /* partial_inplace */
1336 0x040f70ff, /* src_mask */
1337 0x040f70ff, /* dst_mask */
1338 FALSE), /* pcrel_offset */
1339
1340 HOWTO (R_ARM_THM_MOVW_BREL, /* type */
1341 0, /* rightshift */
1342 2, /* size (0 = byte, 1 = short, 2 = long) */
1343 16, /* bitsize */
1344 FALSE, /* pc_relative */
1345 0, /* bitpos */
1346 complain_overflow_dont,/* complain_on_overflow */
1347 bfd_elf_generic_reloc, /* special_function */
1348 "R_ARM_THM_MOVW_BREL", /* name */
1349 FALSE, /* partial_inplace */
1350 0x040f70ff, /* src_mask */
1351 0x040f70ff, /* dst_mask */
1352 FALSE), /* pcrel_offset */
1353
1354 EMPTY_HOWTO (90), /* unallocated */
1355 EMPTY_HOWTO (91),
1356 EMPTY_HOWTO (92),
1357 EMPTY_HOWTO (93),
1358
1359 HOWTO (R_ARM_PLT32_ABS, /* type */
1360 0, /* rightshift */
1361 2, /* size (0 = byte, 1 = short, 2 = long) */
1362 32, /* bitsize */
1363 FALSE, /* pc_relative */
1364 0, /* bitpos */
1365 complain_overflow_dont,/* complain_on_overflow */
1366 bfd_elf_generic_reloc, /* special_function */
1367 "R_ARM_PLT32_ABS", /* name */
1368 FALSE, /* partial_inplace */
1369 0xffffffff, /* src_mask */
1370 0xffffffff, /* dst_mask */
1371 FALSE), /* pcrel_offset */
1372
1373 HOWTO (R_ARM_GOT_ABS, /* type */
1374 0, /* rightshift */
1375 2, /* size (0 = byte, 1 = short, 2 = long) */
1376 32, /* bitsize */
1377 FALSE, /* pc_relative */
1378 0, /* bitpos */
1379 complain_overflow_dont,/* complain_on_overflow */
1380 bfd_elf_generic_reloc, /* special_function */
1381 "R_ARM_GOT_ABS", /* name */
1382 FALSE, /* partial_inplace */
1383 0xffffffff, /* src_mask */
1384 0xffffffff, /* dst_mask */
1385 FALSE), /* pcrel_offset */
1386
1387 HOWTO (R_ARM_GOT_PREL, /* type */
1388 0, /* rightshift */
1389 2, /* size (0 = byte, 1 = short, 2 = long) */
1390 32, /* bitsize */
1391 TRUE, /* pc_relative */
1392 0, /* bitpos */
1393 complain_overflow_dont, /* complain_on_overflow */
1394 bfd_elf_generic_reloc, /* special_function */
1395 "R_ARM_GOT_PREL", /* name */
1396 FALSE, /* partial_inplace */
1397 0xffffffff, /* src_mask */
1398 0xffffffff, /* dst_mask */
1399 TRUE), /* pcrel_offset */
1400
1401 HOWTO (R_ARM_GOT_BREL12, /* type */
1402 0, /* rightshift */
1403 2, /* size (0 = byte, 1 = short, 2 = long) */
1404 12, /* bitsize */
1405 FALSE, /* pc_relative */
1406 0, /* bitpos */
1407 complain_overflow_bitfield,/* complain_on_overflow */
1408 bfd_elf_generic_reloc, /* special_function */
1409 "R_ARM_GOT_BREL12", /* name */
1410 FALSE, /* partial_inplace */
1411 0x00000fff, /* src_mask */
1412 0x00000fff, /* dst_mask */
1413 FALSE), /* pcrel_offset */
1414
1415 HOWTO (R_ARM_GOTOFF12, /* type */
1416 0, /* rightshift */
1417 2, /* size (0 = byte, 1 = short, 2 = long) */
1418 12, /* bitsize */
1419 FALSE, /* pc_relative */
1420 0, /* bitpos */
1421 complain_overflow_bitfield,/* complain_on_overflow */
1422 bfd_elf_generic_reloc, /* special_function */
1423 "R_ARM_GOTOFF12", /* name */
1424 FALSE, /* partial_inplace */
1425 0x00000fff, /* src_mask */
1426 0x00000fff, /* dst_mask */
1427 FALSE), /* pcrel_offset */
1428
1429 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */
1430
1431 /* GNU extension to record C++ vtable member usage */
1432 HOWTO (R_ARM_GNU_VTENTRY, /* type */
ba93b8ac
DJ		 1433 0, /* rightshift */
1434 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1435 0, /* bitsize */
ba93b8ac
DJ		 1436 FALSE, /* pc_relative */
1437 0, /* bitpos */
c19d1205
ZW		 1438 complain_overflow_dont, /* complain_on_overflow */
1439 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
1440 "R_ARM_GNU_VTENTRY", /* name */
1441 FALSE, /* partial_inplace */
1442 0, /* src_mask */
1443 0, /* dst_mask */
1444 FALSE), /* pcrel_offset */
1445
1446 /* GNU extension to record C++ vtable hierarchy */
1447 HOWTO (R_ARM_GNU_VTINHERIT, /* type */
1448 0, /* rightshift */
1449 2, /* size (0 = byte, 1 = short, 2 = long) */
1450 0, /* bitsize */
1451 FALSE, /* pc_relative */
1452 0, /* bitpos */
1453 complain_overflow_dont, /* complain_on_overflow */
1454 NULL, /* special_function */
1455 "R_ARM_GNU_VTINHERIT", /* name */
1456 FALSE, /* partial_inplace */
1457 0, /* src_mask */
1458 0, /* dst_mask */
1459 FALSE), /* pcrel_offset */
1460
1461 HOWTO (R_ARM_THM_JUMP11, /* type */
1462 1, /* rightshift */
1463 1, /* size (0 = byte, 1 = short, 2 = long) */
1464 11, /* bitsize */
1465 TRUE, /* pc_relative */
1466 0, /* bitpos */
1467 complain_overflow_signed, /* complain_on_overflow */
1468 bfd_elf_generic_reloc, /* special_function */
1469 "R_ARM_THM_JUMP11", /* name */
1470 FALSE, /* partial_inplace */
1471 0x000007ff, /* src_mask */
1472 0x000007ff, /* dst_mask */
1473 TRUE), /* pcrel_offset */
1474
1475 HOWTO (R_ARM_THM_JUMP8, /* type */
1476 1, /* rightshift */
1477 1, /* size (0 = byte, 1 = short, 2 = long) */
1478 8, /* bitsize */
1479 TRUE, /* pc_relative */
1480 0, /* bitpos */
1481 complain_overflow_signed, /* complain_on_overflow */
1482 bfd_elf_generic_reloc, /* special_function */
1483 "R_ARM_THM_JUMP8", /* name */
1484 FALSE, /* partial_inplace */
1485 0x000000ff, /* src_mask */
1486 0x000000ff, /* dst_mask */
1487 TRUE), /* pcrel_offset */
ba93b8ac 1488
c19d1205
ZW		 1489 /* TLS relocations */
1490 HOWTO (R_ARM_TLS_GD32, /* type */
ba93b8ac
DJ		 1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 32, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_bitfield,/* complain_on_overflow */
c19d1205
ZW		 1497 NULL, /* special_function */
1498 "R_ARM_TLS_GD32", /* name */
ba93b8ac
DJ		 1499 TRUE, /* partial_inplace */
1500 0xffffffff, /* src_mask */
1501 0xffffffff, /* dst_mask */
c19d1205 1502 FALSE), /* pcrel_offset */
ba93b8ac 1503
ba93b8ac
DJ		 1504 HOWTO (R_ARM_TLS_LDM32, /* type */
1505 0, /* rightshift */
1506 2, /* size (0 = byte, 1 = short, 2 = long) */
1507 32, /* bitsize */
1508 FALSE, /* pc_relative */
1509 0, /* bitpos */
1510 complain_overflow_bitfield,/* complain_on_overflow */
1511 bfd_elf_generic_reloc, /* special_function */
1512 "R_ARM_TLS_LDM32", /* name */
1513 TRUE, /* partial_inplace */
1514 0xffffffff, /* src_mask */
1515 0xffffffff, /* dst_mask */
c19d1205 1516 FALSE), /* pcrel_offset */
ba93b8ac 1517
c19d1205 1518 HOWTO (R_ARM_TLS_LDO32, /* type */
ba93b8ac
DJ		 1519 0, /* rightshift */
1520 2, /* size (0 = byte, 1 = short, 2 = long) */
1521 32, /* bitsize */
1522 FALSE, /* pc_relative */
1523 0, /* bitpos */
1524 complain_overflow_bitfield,/* complain_on_overflow */
1525 bfd_elf_generic_reloc, /* special_function */
c19d1205 1526 "R_ARM_TLS_LDO32", /* name */
ba93b8ac
DJ		 1527 TRUE, /* partial_inplace */
1528 0xffffffff, /* src_mask */
1529 0xffffffff, /* dst_mask */
c19d1205 1530 FALSE), /* pcrel_offset */
ba93b8ac 1531
ba93b8ac
DJ		 1532 HOWTO (R_ARM_TLS_IE32, /* type */
1533 0, /* rightshift */
1534 2, /* size (0 = byte, 1 = short, 2 = long) */
1535 32, /* bitsize */
1536 FALSE, /* pc_relative */
1537 0, /* bitpos */
1538 complain_overflow_bitfield,/* complain_on_overflow */
1539 NULL, /* special_function */
1540 "R_ARM_TLS_IE32", /* name */
1541 TRUE, /* partial_inplace */
1542 0xffffffff, /* src_mask */
1543 0xffffffff, /* dst_mask */
c19d1205 1544 FALSE), /* pcrel_offset */
7f266840 1545
c19d1205 1546 HOWTO (R_ARM_TLS_LE32, /* type */
7f266840
DJ		 1547 0, /* rightshift */
1548 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205 1549 32, /* bitsize */
7f266840
DJ		 1550 FALSE, /* pc_relative */
1551 0, /* bitpos */
c19d1205
ZW		 1552 complain_overflow_bitfield,/* complain_on_overflow */
1553 bfd_elf_generic_reloc, /* special_function */
1554 "R_ARM_TLS_LE32", /* name */
1555 TRUE, /* partial_inplace */
1556 0xffffffff, /* src_mask */
1557 0xffffffff, /* dst_mask */
1558 FALSE), /* pcrel_offset */
7f266840 1559
c19d1205
ZW		 1560 HOWTO (R_ARM_TLS_LDO12, /* type */
1561 0, /* rightshift */
1562 2, /* size (0 = byte, 1 = short, 2 = long) */
1563 12, /* bitsize */
1564 FALSE, /* pc_relative */
7f266840 1565 0, /* bitpos */
c19d1205 1566 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1567 bfd_elf_generic_reloc, /* special_function */
c19d1205 1568 "R_ARM_TLS_LDO12", /* name */
7f266840 1569 FALSE, /* partial_inplace */
c19d1205
ZW		 1570 0x00000fff, /* src_mask */
1571 0x00000fff, /* dst_mask */
1572 FALSE), /* pcrel_offset */
7f266840 1573
c19d1205
ZW		 1574 HOWTO (R_ARM_TLS_LE12, /* type */
1575 0, /* rightshift */
1576 2, /* size (0 = byte, 1 = short, 2 = long) */
1577 12, /* bitsize */
1578 FALSE, /* pc_relative */
7f266840 1579 0, /* bitpos */
c19d1205 1580 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1581 bfd_elf_generic_reloc, /* special_function */
c19d1205 1582 "R_ARM_TLS_LE12", /* name */
7f266840 1583 FALSE, /* partial_inplace */
c19d1205
ZW		 1584 0x00000fff, /* src_mask */
1585 0x00000fff, /* dst_mask */
1586 FALSE), /* pcrel_offset */
7f266840 1587
c19d1205 1588 HOWTO (R_ARM_TLS_IE12GP, /* type */
7f266840
DJ		 1589 0, /* rightshift */
1590 2, /* size (0 = byte, 1 = short, 2 = long) */
c19d1205
ZW		 1591 12, /* bitsize */
1592 FALSE, /* pc_relative */
7f266840 1593 0, /* bitpos */
c19d1205 1594 complain_overflow_bitfield,/* complain_on_overflow */
7f266840 1595 bfd_elf_generic_reloc, /* special_function */
c19d1205 1596 "R_ARM_TLS_IE12GP", /* name */
7f266840 1597 FALSE, /* partial_inplace */
c19d1205
ZW		 1598 0x00000fff, /* src_mask */
1599 0x00000fff, /* dst_mask */
1600 FALSE), /* pcrel_offset */
1601};
1602
1603/* 112-127 private relocations
1604 128 R_ARM_ME_TOO, obsolete
1605 129-255 unallocated in AAELF.
7f266840 1606
c19d1205
ZW		 1607 249-255 extended, currently unused, relocations: */
1608
4962c51a 1609static reloc_howto_type elf32_arm_howto_table_2[4] =
7f266840
DJ		 1610{
1611 HOWTO (R_ARM_RREL32, /* type */
1612 0, /* rightshift */
1613 0, /* size (0 = byte, 1 = short, 2 = long) */
1614 0, /* bitsize */
1615 FALSE, /* pc_relative */
1616 0, /* bitpos */
1617 complain_overflow_dont,/* complain_on_overflow */
1618 bfd_elf_generic_reloc, /* special_function */
1619 "R_ARM_RREL32", /* name */
1620 FALSE, /* partial_inplace */
1621 0, /* src_mask */
1622 0, /* dst_mask */
1623 FALSE), /* pcrel_offset */
1624
1625 HOWTO (R_ARM_RABS32, /* type */
1626 0, /* rightshift */
1627 0, /* size (0 = byte, 1 = short, 2 = long) */
1628 0, /* bitsize */
1629 FALSE, /* pc_relative */
1630 0, /* bitpos */
1631 complain_overflow_dont,/* complain_on_overflow */
1632 bfd_elf_generic_reloc, /* special_function */
1633 "R_ARM_RABS32", /* name */
1634 FALSE, /* partial_inplace */
1635 0, /* src_mask */
1636 0, /* dst_mask */
1637 FALSE), /* pcrel_offset */
1638
1639 HOWTO (R_ARM_RPC24, /* type */
1640 0, /* rightshift */
1641 0, /* size (0 = byte, 1 = short, 2 = long) */
1642 0, /* bitsize */
1643 FALSE, /* pc_relative */
1644 0, /* bitpos */
1645 complain_overflow_dont,/* complain_on_overflow */
1646 bfd_elf_generic_reloc, /* special_function */
1647 "R_ARM_RPC24", /* name */
1648 FALSE, /* partial_inplace */
1649 0, /* src_mask */
1650 0, /* dst_mask */
1651 FALSE), /* pcrel_offset */
1652
1653 HOWTO (R_ARM_RBASE, /* type */
1654 0, /* rightshift */
1655 0, /* size (0 = byte, 1 = short, 2 = long) */
1656 0, /* bitsize */
1657 FALSE, /* pc_relative */
1658 0, /* bitpos */
1659 complain_overflow_dont,/* complain_on_overflow */
1660 bfd_elf_generic_reloc, /* special_function */
1661 "R_ARM_RBASE", /* name */
1662 FALSE, /* partial_inplace */
1663 0, /* src_mask */
1664 0, /* dst_mask */
1665 FALSE) /* pcrel_offset */
1666};
1667
1668static reloc_howto_type *
1669elf32_arm_howto_from_type (unsigned int r_type)
1670{
c19d1205
ZW		 1671 if (r_type < NUM_ELEM (elf32_arm_howto_table_1))
1672 return &elf32_arm_howto_table_1[r_type];
ba93b8ac 1673
c19d1205
ZW		 1674 if (r_type >= R_ARM_RREL32
1675 && r_type < R_ARM_RREL32 + NUM_ELEM (elf32_arm_howto_table_2))
4962c51a 1676 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32];
7f266840 1677
c19d1205 1678 return NULL;
7f266840
DJ		 1679}
1680
1681static void
1682elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc,
1683 Elf_Internal_Rela * elf_reloc)
1684{
1685 unsigned int r_type;
1686
1687 r_type = ELF32_R_TYPE (elf_reloc->r_info);
1688 bfd_reloc->howto = elf32_arm_howto_from_type (r_type);
1689}
1690
1691struct elf32_arm_reloc_map
1692 {
1693 bfd_reloc_code_real_type bfd_reloc_val;
1694 unsigned char elf_reloc_val;
1695 };
1696
1697/* All entries in this list must also be present in elf32_arm_howto_table. */
1698static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] =
1699 {
1700 {BFD_RELOC_NONE, R_ARM_NONE},
1701 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24},
39b41c9c
PB		 1702 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL},
1703 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24},
7f266840
DJ		 1704 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25},
1705 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22},
1706 {BFD_RELOC_32, R_ARM_ABS32},
1707 {BFD_RELOC_32_PCREL, R_ARM_REL32},
1708 {BFD_RELOC_8, R_ARM_ABS8},
1709 {BFD_RELOC_16, R_ARM_ABS16},
1710 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12},
1711 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5},
c19d1205
ZW		 1712 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24},
1713 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL},
1714 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11},
1715 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19},
1716 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8},
1717 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6},
7f266840
DJ		 1718 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT},
1719 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT},
1720 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE},
c19d1205 1721 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32},
7f266840
DJ		 1722 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC},
1723 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32},
1724 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1725 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1},
1726 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32},
1727 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32},
1728 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31},
ba93b8ac
DJ		 1729 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2},
1730 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32},
1731 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32},
1732 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32},
1733 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32},
1734 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32},
1735 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32},
1736 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32},
1737 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32},
1738 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32},
c19d1205
ZW		 1739 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT},
1740 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY},
b6895b4f
PB		 1741 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC},
1742 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS},
1743 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC},
1744 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL},
1745 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC},
1746 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS},
1747 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC},
1748 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL},
4962c51a
MS		 1749 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC},
1750 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0},
1751 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC},
1752 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1},
1753 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2},
1754 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0},
1755 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1},
1756 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2},
1757 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0},
1758 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1},
1759 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2},
1760 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0},
1761 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1},
1762 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2},
1763 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC},
1764 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0},
1765 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC},
1766 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1},
1767 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2},
1768 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0},
1769 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1},
1770 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2},
1771 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0},
1772 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1},
1773 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2},
1774 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0},
1775 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1},
845b51d6
PB		 1776 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2},
1777 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX}
7f266840
DJ		 1778 };
1779
1780static reloc_howto_type *
f1c71a59
ZW		 1781elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1782 bfd_reloc_code_real_type code)
7f266840
DJ		 1783{
1784 unsigned int i;
c19d1205
ZW		 1785 for (i = 0; i < NUM_ELEM (elf32_arm_reloc_map); i ++)
1786 if (elf32_arm_reloc_map[i].bfd_reloc_val == code)
1787 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val);
7f266840 1788
c19d1205 1789 return NULL;
7f266840
DJ		 1790}
1791
157090f7
AM		 1792static reloc_howto_type *
1793elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
1794 const char *r_name)
1795{
1796 unsigned int i;
1797
1798 for (i = 0;
1799 i < (sizeof (elf32_arm_howto_table_1)
1800 / sizeof (elf32_arm_howto_table_1[0]));
1801 i++)
1802 if (elf32_arm_howto_table_1[i].name != NULL
1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0)
1804 return &elf32_arm_howto_table_1[i];
1805
1806 for (i = 0;
1807 i < (sizeof (elf32_arm_howto_table_2)
1808 / sizeof (elf32_arm_howto_table_2[0]));
1809 i++)
1810 if (elf32_arm_howto_table_2[i].name != NULL
1811 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0)
1812 return &elf32_arm_howto_table_2[i];
1813
1814 return NULL;
1815}
1816
7f266840
DJ		 1817/* Support for core dump NOTE sections */
1818static bfd_boolean
f1c71a59 1819elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1820{
1821 int offset;
1822 size_t size;
1823
1824 switch (note->descsz)
1825 {
1826 default:
1827 return FALSE;
1828
1829 case 148: /* Linux/ARM 32-bit*/
1830 /* pr_cursig */
1831 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12);
1832
1833 /* pr_pid */
1834 elf_tdata (abfd)->core_pid = bfd_get_32 (abfd, note->descdata + 24);
1835
1836 /* pr_reg */
1837 offset = 72;
1838 size = 72;
1839
1840 break;
1841 }
1842
1843 /* Make a ".reg/999" section. */
1844 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
1845 size, note->descpos + offset);
1846}
1847
1848static bfd_boolean
f1c71a59 1849elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
7f266840
DJ		 1850{
1851 switch (note->descsz)
1852 {
1853 default:
1854 return FALSE;
1855
1856 case 124: /* Linux/ARM elf_prpsinfo */
1857 elf_tdata (abfd)->core_program
1858 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
1859 elf_tdata (abfd)->core_command
1860 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
1861 }
1862
1863 /* Note that for some reason, a spurious space is tacked
1864 onto the end of the args in some (at least one anyway)
1865 implementations, so strip it off if it exists. */
1866
1867 {
1868 char *command = elf_tdata (abfd)->core_command;
1869 int n = strlen (command);
1870
1871 if (0 < n && command[n - 1] == ' ')
1872 command[n - 1] = '\0';
1873 }
1874
1875 return TRUE;
1876}
1877
1878#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec
1879#define TARGET_LITTLE_NAME "elf32-littlearm"
1880#define TARGET_BIG_SYM bfd_elf32_bigarm_vec
1881#define TARGET_BIG_NAME "elf32-bigarm"
1882
1883#define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus
1884#define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo
1885
252b5132
RH		 1886typedef unsigned long int insn32;
1887typedef unsigned short int insn16;
1888
3a4a14e9
PB		 1889/* In lieu of proper flags, assume all EABIv4 or later objects are
1890 interworkable. */
57e8b36a 1891#define INTERWORK_FLAG(abfd) \
3a4a14e9 1892 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \
85a84e7a 1893 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK))
9b485d32 1894
252b5132
RH		 1895/* The linker script knows the section names for placement.
1896 The entry_names are used to do simple name mangling on the stubs.
1897 Given a function name, and its type, the stub can be found. The
9b485d32 1898 name can be changed. The only requirement is the %s be present. */
252b5132
RH		 1899#define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t"
1900#define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb"
1901
1902#define ARM2THUMB_GLUE_SECTION_NAME ".glue_7"
1903#define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm"
1904
c7b8f16e
JB		 1905#define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer"
1906#define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x"
1907
845b51d6
PB		 1908#define ARM_BX_GLUE_SECTION_NAME ".v4_bx"
1909#define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d"
1910
252b5132
RH		 1911/* The name of the dynamic interpreter. This is put in the .interp
1912 section. */
1913#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
1914
5e681ec4
PB		 1915#ifdef FOUR_WORD_PLT
1916
252b5132
RH		 1917/* The first entry in a procedure linkage table looks like
1918 this. It is set up so that any shared library function that is
59f2c4e7 1919 called before the relocation has been set up calls the dynamic
9b485d32 1920 linker first. */
e5a52504 1921static const bfd_vma elf32_arm_plt0_entry [] =
5e681ec4
PB		 1922 {
1923 0xe52de004, /* str lr, [sp, #-4]! */
1924 0xe59fe010, /* ldr lr, [pc, #16] */
1925 0xe08fe00e, /* add lr, pc, lr */
1926 0xe5bef008, /* ldr pc, [lr, #8]! */
1927 };
1928
1929/* Subsequent entries in a procedure linkage table look like
1930 this. */
e5a52504 1931static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1932 {
1933 0xe28fc600, /* add ip, pc, #NN */
1934 0xe28cca00, /* add ip, ip, #NN */
1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */
1936 0x00000000, /* unused */
1937 };
1938
1939#else
1940
5e681ec4
PB		 1941/* The first entry in a procedure linkage table looks like
1942 this. It is set up so that any shared library function that is
1943 called before the relocation has been set up calls the dynamic
1944 linker first. */
e5a52504 1945static const bfd_vma elf32_arm_plt0_entry [] =
917583ad 1946 {
5e681ec4
PB		 1947 0xe52de004, /* str lr, [sp, #-4]! */
1948 0xe59fe004, /* ldr lr, [pc, #4] */
1949 0xe08fe00e, /* add lr, pc, lr */
1950 0xe5bef008, /* ldr pc, [lr, #8]! */
1951 0x00000000, /* &GOT[0] - . */
917583ad 1952 };
252b5132
RH		 1953
1954/* Subsequent entries in a procedure linkage table look like
1955 this. */
e5a52504 1956static const bfd_vma elf32_arm_plt_entry [] =
5e681ec4
PB		 1957 {
1958 0xe28fc600, /* add ip, pc, #0xNN00000 */
1959 0xe28cca00, /* add ip, ip, #0xNN000 */
1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */
1961 };
1962
1963#endif
252b5132 1964
00a97672
RS		 1965/* The format of the first entry in the procedure linkage table
1966 for a VxWorks executable. */
1967static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] =
1968 {
1969 0xe52dc008, /* str ip,[sp,#-8]! */
1970 0xe59fc000, /* ldr ip,[pc] */
1971 0xe59cf008, /* ldr pc,[ip,#8] */
1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */
1973 };
1974
1975/* The format of subsequent entries in a VxWorks executable. */
1976static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] =
1977 {
1978 0xe59fc000, /* ldr ip,[pc] */
1979 0xe59cf000, /* ldr pc,[ip] */
1980 0x00000000, /* .long @got */
1981 0xe59fc000, /* ldr ip,[pc] */
1982 0xea000000, /* b _PLT */
1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1984 };
1985
1986/* The format of entries in a VxWorks shared library. */
1987static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] =
1988 {
1989 0xe59fc000, /* ldr ip,[pc] */
1990 0xe79cf009, /* ldr pc,[ip,r9] */
1991 0x00000000, /* .long @got */
1992 0xe59fc000, /* ldr ip,[pc] */
1993 0xe599f008, /* ldr pc,[r9,#8] */
1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */
1995 };
1996
b7693d02
DJ		 1997/* An initial stub used if the PLT entry is referenced from Thumb code. */
1998#define PLT_THUMB_STUB_SIZE 4
1999static const bfd_vma elf32_arm_plt_thumb_stub [] =
2000 {
2001 0x4778, /* bx pc */
2002 0x46c0 /* nop */
2003 };
2004
e5a52504
MM		 2005/* The entries in a PLT when using a DLL-based target with multiple
2006 address spaces. */
2007static const bfd_vma elf32_arm_symbian_plt_entry [] =
2008 {
83a358aa 2009 0xe51ff004, /* ldr pc, [pc, #-4] */
e5a52504
MM		 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */
2011 };
2012
e489d0ae
PB		 2013/* Used to build a map of a section. This is required for mixed-endian
2014 code/data. */
2015
2016typedef struct elf32_elf_section_map
2017{
2018 bfd_vma vma;
2019 char type;
2020}
2021elf32_arm_section_map;
2022
c7b8f16e
JB		 2023/* Information about a VFP11 erratum veneer, or a branch to such a veneer. */
2024
2025typedef enum
2026{
2027 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER,
2028 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER,
2029 VFP11_ERRATUM_ARM_VENEER,
2030 VFP11_ERRATUM_THUMB_VENEER
2031}
2032elf32_vfp11_erratum_type;
2033
2034typedef struct elf32_vfp11_erratum_list
2035{
2036 struct elf32_vfp11_erratum_list *next;
2037 bfd_vma vma;
2038 union
2039 {
2040 struct
2041 {
2042 struct elf32_vfp11_erratum_list *veneer;
2043 unsigned int vfp_insn;
2044 } b;
2045 struct
2046 {
2047 struct elf32_vfp11_erratum_list *branch;
2048 unsigned int id;
2049 } v;
2050 } u;
2051 elf32_vfp11_erratum_type type;
2052}
2053elf32_vfp11_erratum_list;
2054
8e3de13a 2055typedef struct _arm_elf_section_data
e489d0ae
PB		 2056{
2057 struct bfd_elf_section_data elf;
8e3de13a 2058 unsigned int mapcount;
c7b8f16e 2059 unsigned int mapsize;
e489d0ae 2060 elf32_arm_section_map *map;
c7b8f16e
JB		 2061 unsigned int erratumcount;
2062 elf32_vfp11_erratum_list *erratumlist;
8e3de13a
NC		 2063}
2064_arm_elf_section_data;
e489d0ae
PB		 2065
2066#define elf32_arm_section_data(sec) \
8e3de13a 2067 ((_arm_elf_section_data *) elf_section_data (sec))
e489d0ae 2068
ba93b8ac
DJ		 2069/* The size of the thread control block. */
2070#define TCB_SIZE 8
2071
0ffa91dd 2072struct elf_arm_obj_tdata
ba93b8ac
DJ		 2073{
2074 struct elf_obj_tdata root;
2075
2076 /* tls_type for each local got entry. */
2077 char *local_got_tls_type;
ee065d83 2078
bf21ed78
MS		 2079 /* Zero to warn when linking objects with incompatible enum sizes. */
2080 int no_enum_size_warning;
ba93b8ac
DJ		 2081};
2082
0ffa91dd
NC		 2083#define elf_arm_tdata(bfd) \
2084 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any)
ba93b8ac 2085
0ffa91dd
NC		 2086#define elf32_arm_local_got_tls_type(bfd) \
2087 (elf_arm_tdata (bfd)->local_got_tls_type)
2088
2089#define is_arm_elf(bfd) \
2090 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
2091 && elf_tdata (bfd) != NULL \
2092 && elf_object_id (bfd) == ARM_ELF_TDATA)
ba93b8ac
DJ		 2093
2094static bfd_boolean
2095elf32_arm_mkobject (bfd *abfd)
2096{
0ffa91dd
NC		 2097 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata),
2098 ARM_ELF_TDATA);
ba93b8ac
DJ		 2099}
2100
252b5132
RH		 2101/* The ARM linker needs to keep track of the number of relocs that it
2102 decides to copy in check_relocs for each symbol. This is so that
2103 it can discard PC relative relocs if it doesn't need them when
2104 linking with -Bsymbolic. We store the information in a field
2105 extending the regular ELF linker hash table. */
2106
ba93b8ac
DJ		 2107/* This structure keeps track of the number of relocs we have copied
2108 for a given symbol. */
5e681ec4 2109struct elf32_arm_relocs_copied
917583ad
NC		 2110 {
2111 /* Next section. */
5e681ec4 2112 struct elf32_arm_relocs_copied * next;
917583ad
NC		 2113 /* A section in dynobj. */
2114 asection * section;
2115 /* Number of relocs copied in this section. */
2116 bfd_size_type count;
ba93b8ac
DJ		 2117 /* Number of PC-relative relocs copied in this section. */
2118 bfd_size_type pc_count;
917583ad 2119 };
252b5132 2120
ba93b8ac
DJ		 2121#define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent))
2122
ba96a88f 2123/* Arm ELF linker hash entry. */
252b5132 2124struct elf32_arm_link_hash_entry
917583ad
NC		 2125 {
2126 struct elf_link_hash_entry root;
252b5132 2127
917583ad 2128 /* Number of PC relative relocs copied for this symbol. */
5e681ec4 2129 struct elf32_arm_relocs_copied * relocs_copied;
b7693d02
DJ		 2130
2131 /* We reference count Thumb references to a PLT entry separately,
2132 so that we can emit the Thumb trampoline only if needed. */
2133 bfd_signed_vma plt_thumb_refcount;
2134
bd97cb95
DJ		 2135 /* Some references from Thumb code may be eliminated by BL->BLX
2136 conversion, so record them separately. */
2137 bfd_signed_vma plt_maybe_thumb_refcount;
2138
b7693d02
DJ		 2139 /* Since PLT entries have variable size if the Thumb prologue is
2140 used, we need to record the index into .got.plt instead of
2141 recomputing it from the PLT offset. */
2142 bfd_signed_vma plt_got_offset;
ba93b8ac
DJ		 2143
2144#define GOT_UNKNOWN 0
2145#define GOT_NORMAL 1
2146#define GOT_TLS_GD 2
2147#define GOT_TLS_IE 4
2148 unsigned char tls_type;
a4fd1a8e
PB		 2149
2150 /* The symbol marking the real symbol location for exported thumb
2151 symbols with Arm stubs. */
2152 struct elf_link_hash_entry *export_glue;
917583ad 2153 };
252b5132 2154
252b5132 2155/* Traverse an arm ELF linker hash table. */
252b5132
RH		 2156#define elf32_arm_link_hash_traverse(table, func, info) \
2157 (elf_link_hash_traverse \
2158 (&(table)->root, \
b7693d02 2159 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \
252b5132
RH		 2160 (info)))
2161
2162/* Get the ARM elf linker hash table from a link_info structure. */
2163#define elf32_arm_hash_table(info) \
2164 ((struct elf32_arm_link_hash_table *) ((info)->hash))
2165
9b485d32 2166/* ARM ELF linker hash table. */
252b5132 2167struct elf32_arm_link_hash_table
917583ad
NC		 2168 {
2169 /* The main hash table. */
2170 struct elf_link_hash_table root;
252b5132 2171
4cc11e76 2172 /* The size in bytes of the section containing the Thumb-to-ARM glue. */
dc810e39 2173 bfd_size_type thumb_glue_size;
252b5132 2174
4cc11e76 2175 /* The size in bytes of the section containing the ARM-to-Thumb glue. */
dc810e39 2176 bfd_size_type arm_glue_size;
252b5132 2177
845b51d6
PB		 2178 /* The size in bytes of section containing the ARMv4 BX veneers. */
2179 bfd_size_type bx_glue_size;
2180
2181 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when
2182 veneer has been populated. */
2183 bfd_vma bx_glue_offset[15];
2184
c7b8f16e
JB		 2185 /* The size in bytes of the section containing glue for VFP11 erratum
2186 veneers. */
2187 bfd_size_type vfp11_erratum_glue_size;
2188
4cc11e76 2189 /* An arbitrary input BFD chosen to hold the glue sections. */
917583ad 2190 bfd * bfd_of_glue_owner;
ba96a88f 2191
e489d0ae
PB		 2192 /* Nonzero to output a BE8 image. */
2193 int byteswap_code;
2194
9c504268 2195 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32.
87bc043a 2196 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */
9c504268
PB		 2197 int target1_is_rel;
2198
eb043451
PB		 2199 /* The relocation to use for R_ARM_TARGET2 relocations. */
2200 int target2_reloc;
2201
845b51d6
PB		 2202 /* 0 = Ignore R_ARM_V4BX.
2203 1 = Convert BX to MOV PC.
2204 2 = Generate v4 interworing stubs. */
319850b4
JB		 2205 int fix_v4bx;
2206
33bfe774
JB		 2207 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */
2208 int use_blx;
2209
c7b8f16e
JB		 2210 /* What sort of code sequences we should look for which may trigger the
2211 VFP11 denorm erratum. */
2212 bfd_arm_vfp11_fix vfp11_fix;
2213
2214 /* Global counter for the number of fixes we have emitted. */
2215 int num_vfp11_fixes;
2216
27e55c4d
PB		 2217 /* Nonzero to force PIC branch veneers. */
2218 int pic_veneer;
2219
e5a52504
MM		 2220 /* The number of bytes in the initial entry in the PLT. */
2221 bfd_size_type plt_header_size;
2222
2223 /* The number of bytes in the subsequent PLT etries. */
2224 bfd_size_type plt_entry_size;
2225
00a97672
RS		 2226 /* True if the target system is VxWorks. */
2227 int vxworks_p;
2228
e5a52504
MM		 2229 /* True if the target system is Symbian OS. */
2230 int symbian_p;
2231
4e7fd91e
PB		 2232 /* True if the target uses REL relocations. */
2233 int use_rel;
2234
5e681ec4
PB		 2235 /* Short-cuts to get to dynamic linker sections. */
2236 asection *sgot;
2237 asection *sgotplt;
2238 asection *srelgot;
2239 asection *splt;
2240 asection *srelplt;
2241 asection *sdynbss;
2242 asection *srelbss;
2243
00a97672
RS		 2244 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */
2245 asection *srelplt2;
2246
ba93b8ac
DJ		 2247 /* Data for R_ARM_TLS_LDM32 relocations. */
2248 union {
2249 bfd_signed_vma refcount;
2250 bfd_vma offset;
2251 } tls_ldm_got;
2252
5e681ec4
PB		 2253 /* Small local sym to section mapping cache. */
2254 struct sym_sec_cache sym_sec;
b7693d02
DJ		 2255
2256 /* For convenience in allocate_dynrelocs. */
2257 bfd * obfd;
917583ad 2258 };
252b5132 2259
780a67af
NC		 2260/* Create an entry in an ARM ELF linker hash table. */
2261
2262static struct bfd_hash_entry *
57e8b36a
NC		 2263elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry,
2264 struct bfd_hash_table * table,
2265 const char * string)
780a67af
NC		 2266{
2267 struct elf32_arm_link_hash_entry * ret =
2268 (struct elf32_arm_link_hash_entry *) entry;
2269
2270 /* Allocate the structure if it has not already been allocated by a
2271 subclass. */
2272 if (ret == (struct elf32_arm_link_hash_entry *) NULL)
57e8b36a
NC		 2273 ret = bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry));
2274 if (ret == NULL)
780a67af
NC		 2275 return (struct bfd_hash_entry *) ret;
2276
2277 /* Call the allocation method of the superclass. */
2278 ret = ((struct elf32_arm_link_hash_entry *)
2279 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
2280 table, string));
57e8b36a 2281 if (ret != NULL)
b7693d02
DJ		 2282 {
2283 ret->relocs_copied = NULL;
ba93b8ac 2284 ret->tls_type = GOT_UNKNOWN;
b7693d02 2285 ret->plt_thumb_refcount = 0;
bd97cb95 2286 ret->plt_maybe_thumb_refcount = 0;
b7693d02 2287 ret->plt_got_offset = -1;
a4fd1a8e 2288 ret->export_glue = NULL;
b7693d02 2289 }
780a67af
NC		 2290
2291 return (struct bfd_hash_entry *) ret;
2292}
2293
00a97672
RS		 2294/* Return true if NAME is the name of the relocation section associated
2295 with S. */
2296
2297static bfd_boolean
2298reloc_section_p (struct elf32_arm_link_hash_table *htab,
2299 const char *name, asection *s)
2300{
2301 if (htab->use_rel)
0112cd26 2302 return CONST_STRNEQ (name, ".rel") && strcmp (s->name, name + 4) == 0;
00a97672 2303 else
0112cd26 2304 return CONST_STRNEQ (name, ".rela") && strcmp (s->name, name + 5) == 0;
00a97672
RS		 2305}
2306
2307/* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up
5e681ec4
PB		 2308 shortcuts to them in our hash table. */
2309
2310static bfd_boolean
57e8b36a 2311create_got_section (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2312{
2313 struct elf32_arm_link_hash_table *htab;
2314
e5a52504
MM		 2315 htab = elf32_arm_hash_table (info);
2316 /* BPABI objects never have a GOT, or associated sections. */
2317 if (htab->symbian_p)
2318 return TRUE;
2319
5e681ec4
PB		 2320 if (! _bfd_elf_create_got_section (dynobj, info))
2321 return FALSE;
2322
5e681ec4
PB		 2323 htab->sgot = bfd_get_section_by_name (dynobj, ".got");
2324 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt");
2325 if (!htab->sgot || !htab->sgotplt)
2326 abort ();
2327
00a97672
RS		 2328 htab->srelgot = bfd_make_section_with_flags (dynobj,
2329 RELOC_SECTION (htab, ".got"),
3496cb2a
L		 2330 (SEC_ALLOC | SEC_LOAD
2331 | SEC_HAS_CONTENTS
2332 | SEC_IN_MEMORY
2333 | SEC_LINKER_CREATED
2334 | SEC_READONLY));
5e681ec4 2335 if (htab->srelgot == NULL
5e681ec4
PB		 2336 || ! bfd_set_section_alignment (dynobj, htab->srelgot, 2))
2337 return FALSE;
2338 return TRUE;
2339}
2340
00a97672
RS		 2341/* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and
2342 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our
5e681ec4
PB		 2343 hash table. */
2344
2345static bfd_boolean
57e8b36a 2346elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info)
5e681ec4
PB		 2347{
2348 struct elf32_arm_link_hash_table *htab;
2349
2350 htab = elf32_arm_hash_table (info);
2351 if (!htab->sgot && !create_got_section (dynobj, info))
2352 return FALSE;
2353
2354 if (!_bfd_elf_create_dynamic_sections (dynobj, info))
2355 return FALSE;
2356
2357 htab->splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672
RS		 2358 htab->srelplt = bfd_get_section_by_name (dynobj,
2359 RELOC_SECTION (htab, ".plt"));
5e681ec4
PB		 2360 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss");
2361 if (!info->shared)
00a97672
RS		 2362 htab->srelbss = bfd_get_section_by_name (dynobj,
2363 RELOC_SECTION (htab, ".bss"));
2364
2365 if (htab->vxworks_p)
2366 {
2367 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2))
2368 return FALSE;
2369
2370 if (info->shared)
2371 {
2372 htab->plt_header_size = 0;
2373 htab->plt_entry_size
2374 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry);
2375 }
2376 else
2377 {
2378 htab->plt_header_size
2379 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry);
2380 htab->plt_entry_size
2381 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry);
2382 }
2383 }
5e681ec4 2384
e5a52504
MM		 2385 if (!htab->splt
2386 || !htab->srelplt
2387 || !htab->sdynbss
5e681ec4
PB		 2388 || (!info->shared && !htab->srelbss))
2389 abort ();
2390
2391 return TRUE;
2392}
2393
2394/* Copy the extra info we tack onto an elf_link_hash_entry. */
2395
2396static void
fcfa13d2 2397elf32_arm_copy_indirect_symbol (struct bfd_link_info *info,
5e681ec4
PB		 2398 struct elf_link_hash_entry *dir,
2399 struct elf_link_hash_entry *ind)
2400{
2401 struct elf32_arm_link_hash_entry *edir, *eind;
2402
2403 edir = (struct elf32_arm_link_hash_entry *) dir;
2404 eind = (struct elf32_arm_link_hash_entry *) ind;
2405
2406 if (eind->relocs_copied != NULL)
2407 {
2408 if (edir->relocs_copied != NULL)
2409 {
2410 struct elf32_arm_relocs_copied **pp;
2411 struct elf32_arm_relocs_copied *p;
2412
fcfa13d2 2413 /* Add reloc counts against the indirect sym to the direct sym
5e681ec4
PB		 2414 list. Merge any entries against the same section. */
2415 for (pp = &eind->relocs_copied; (p = *pp) != NULL; )
2416 {
2417 struct elf32_arm_relocs_copied *q;
2418
2419 for (q = edir->relocs_copied; q != NULL; q = q->next)
2420 if (q->section == p->section)
2421 {
ba93b8ac 2422 q->pc_count += p->pc_count;
5e681ec4
PB		 2423 q->count += p->count;
2424 *pp = p->next;
2425 break;
2426 }
2427 if (q == NULL)
2428 pp = &p->next;
2429 }
2430 *pp = edir->relocs_copied;
2431 }
2432
2433 edir->relocs_copied = eind->relocs_copied;
2434 eind->relocs_copied = NULL;
2435 }
2436
b34b2d70 2437 if (ind->root.type == bfd_link_hash_indirect)
ba93b8ac 2438 {
b34b2d70
DJ		 2439 /* Copy over PLT info. */
2440 edir->plt_thumb_refcount += eind->plt_thumb_refcount;
2441 eind->plt_thumb_refcount = 0;
bd97cb95
DJ		 2442 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount;
2443 eind->plt_maybe_thumb_refcount = 0;
b34b2d70
DJ		 2444
2445 if (dir->got.refcount <= 0)
2446 {
2447 edir->tls_type = eind->tls_type;
2448 eind->tls_type = GOT_UNKNOWN;
2449 }
ba93b8ac
DJ		 2450 }
2451
fcfa13d2 2452 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
5e681ec4
PB		 2453}
2454
9b485d32 2455/* Create an ARM elf linker hash table. */
252b5132
RH		 2456
2457static struct bfd_link_hash_table *
57e8b36a 2458elf32_arm_link_hash_table_create (bfd *abfd)
252b5132
RH		 2459{
2460 struct elf32_arm_link_hash_table *ret;
dc810e39 2461 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table);
252b5132 2462
57e8b36a
NC		 2463 ret = bfd_malloc (amt);
2464 if (ret == NULL)
252b5132
RH		 2465 return NULL;
2466
57e8b36a 2467 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd,
66eb6687
AM		 2468 elf32_arm_link_hash_newfunc,
2469 sizeof (struct elf32_arm_link_hash_entry)))
252b5132 2470 {
e2d34d7d 2471 free (ret);
252b5132
RH		 2472 return NULL;
2473 }
2474
5e681ec4
PB		 2475 ret->sgot = NULL;
2476 ret->sgotplt = NULL;
2477 ret->srelgot = NULL;
2478 ret->splt = NULL;
2479 ret->srelplt = NULL;
2480 ret->sdynbss = NULL;
2481 ret->srelbss = NULL;
00a97672 2482 ret->srelplt2 = NULL;
252b5132
RH		 2483 ret->thumb_glue_size = 0;
2484 ret->arm_glue_size = 0;
845b51d6
PB		 2485 ret->bx_glue_size = 0;
2486 memset (ret->bx_glue_offset, 0, sizeof(ret->bx_glue_offset));
c7b8f16e
JB		 2487 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
2488 ret->vfp11_erratum_glue_size = 0;
2489 ret->num_vfp11_fixes = 0;
252b5132 2490 ret->bfd_of_glue_owner = NULL;
e489d0ae 2491 ret->byteswap_code = 0;
9c504268 2492 ret->target1_is_rel = 0;
eb043451 2493 ret->target2_reloc = R_ARM_NONE;
e5a52504
MM		 2494#ifdef FOUR_WORD_PLT
2495 ret->plt_header_size = 16;
2496 ret->plt_entry_size = 16;
2497#else
2498 ret->plt_header_size = 20;
2499 ret->plt_entry_size = 12;
2500#endif
33bfe774
JB		 2501 ret->fix_v4bx = 0;
2502 ret->use_blx = 0;
00a97672 2503 ret->vxworks_p = 0;
e5a52504 2504 ret->symbian_p = 0;
4e7fd91e 2505 ret->use_rel = 1;
5e681ec4 2506 ret->sym_sec.abfd = NULL;
b7693d02 2507 ret->obfd = abfd;
ba93b8ac 2508 ret->tls_ldm_got.refcount = 0;
252b5132
RH		 2509
2510 return &ret->root.root;
2511}
2512
9b485d32
NC		 2513/* Locate the Thumb encoded calling stub for NAME. */
2514
252b5132 2515static struct elf_link_hash_entry *
57e8b36a
NC		 2516find_thumb_glue (struct bfd_link_info *link_info,
2517 const char *name,
f2a9dd69 2518 char **error_message)
252b5132
RH		 2519{
2520 char *tmp_name;
2521 struct elf_link_hash_entry *hash;
2522 struct elf32_arm_link_hash_table *hash_table;
2523
2524 /* We need a pointer to the armelf specific hash table. */
2525 hash_table = elf32_arm_hash_table (link_info);
2526
57e8b36a
NC		 2527 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2528 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2529
2530 BFD_ASSERT (tmp_name);
2531
2532 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2533
2534 hash = elf_link_hash_lookup
b34976b6 2535 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2536
b1657152
AM		 2537 if (hash == NULL
2538 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"),
2539 tmp_name, name) == -1)
2540 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2541
2542 free (tmp_name);
2543
2544 return hash;
2545}
2546
9b485d32
NC		 2547/* Locate the ARM encoded calling stub for NAME. */
2548
252b5132 2549static struct elf_link_hash_entry *
57e8b36a
NC		 2550find_arm_glue (struct bfd_link_info *link_info,
2551 const char *name,
f2a9dd69 2552 char **error_message)
252b5132
RH		 2553{
2554 char *tmp_name;
2555 struct elf_link_hash_entry *myh;
2556 struct elf32_arm_link_hash_table *hash_table;
2557
2558 /* We need a pointer to the elfarm specific hash table. */
2559 hash_table = elf32_arm_hash_table (link_info);
2560
57e8b36a
NC		 2561 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2562 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2563
2564 BFD_ASSERT (tmp_name);
2565
2566 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2567
2568 myh = elf_link_hash_lookup
b34976b6 2569 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132 2570
b1657152
AM		 2571 if (myh == NULL
2572 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"),
2573 tmp_name, name) == -1)
2574 *error_message = (char *) bfd_errmsg (bfd_error_system_call);
252b5132
RH		 2575
2576 free (tmp_name);
2577
2578 return myh;
2579}
2580
8f6277f5 2581/* ARM->Thumb glue (static images):
252b5132
RH		 2582
2583 .arm
2584 __func_from_arm:
2585 ldr r12, __func_addr
2586 bx r12
2587 __func_addr:
8f6277f5 2588 .word func @ behave as if you saw a ARM_32 reloc.
252b5132 2589
26079076
PB		 2590 (v5t static images)
2591 .arm
2592 __func_from_arm:
2593 ldr pc, __func_addr
2594 __func_addr:
2595 .word func @ behave as if you saw a ARM_32 reloc.
2596
8f6277f5
PB		 2597 (relocatable images)
2598 .arm
2599 __func_from_arm:
2600 ldr r12, __func_offset
2601 add r12, r12, pc
2602 bx r12
2603 __func_offset:
2604 .word func - .
2605 */
2606
2607#define ARM2THUMB_STATIC_GLUE_SIZE 12
252b5132
RH		 2608static const insn32 a2t1_ldr_insn = 0xe59fc000;
2609static const insn32 a2t2_bx_r12_insn = 0xe12fff1c;
2610static const insn32 a2t3_func_addr_insn = 0x00000001;
2611
26079076
PB		 2612#define ARM2THUMB_V5_STATIC_GLUE_SIZE 8
2613static const insn32 a2t1v5_ldr_insn = 0xe51ff004;
2614static const insn32 a2t2v5_func_addr_insn = 0x00000001;
2615
8f6277f5
PB		 2616#define ARM2THUMB_PIC_GLUE_SIZE 16
2617static const insn32 a2t1p_ldr_insn = 0xe59fc004;
2618static const insn32 a2t2p_add_pc_insn = 0xe08cc00f;
2619static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c;
2620
9b485d32 2621/* Thumb->ARM: Thumb->(non-interworking aware) ARM
252b5132
RH		 2622
2623 .thumb .thumb
2624 .align 2 .align 2
2625 __func_from_thumb: __func_from_thumb:
2626 bx pc push {r6, lr}
2627 nop ldr r6, __func_addr
2628 .arm mov lr, pc
2629 __func_change_to_arm: bx r6
2630 b func .arm
2631 __func_back_to_thumb:
2632 ldmia r13! {r6, lr}
2633 bx lr
2634 __func_addr:
9b485d32 2635 .word func */
252b5132
RH		 2636
2637#define THUMB2ARM_GLUE_SIZE 8
2638static const insn16 t2a1_bx_pc_insn = 0x4778;
2639static const insn16 t2a2_noop_insn = 0x46c0;
2640static const insn32 t2a3_b_insn = 0xea000000;
2641
c7b8f16e
JB		 2642#define VFP11_ERRATUM_VENEER_SIZE 8
2643
845b51d6
PB		 2644#define ARM_BX_VENEER_SIZE 12
2645static const insn32 armbx1_tst_insn = 0xe3100001;
2646static const insn32 armbx2_moveq_insn = 0x01a0f000;
2647static const insn32 armbx3_bx_insn = 0xe12fff10;
2648
7e392df6 2649#ifndef ELFARM_NABI_C_INCLUDED
b34976b6 2650bfd_boolean
57e8b36a 2651bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info)
252b5132
RH		 2652{
2653 asection * s;
2654 bfd_byte * foo;
2655 struct elf32_arm_link_hash_table * globals;
2656
2657 globals = elf32_arm_hash_table (info);
2658
2659 BFD_ASSERT (globals != NULL);
2660
2661 if (globals->arm_glue_size != 0)
2662 {
2663 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2664
dc810e39
AM		 2665 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2666 ARM2THUMB_GLUE_SECTION_NAME);
252b5132
RH		 2667
2668 BFD_ASSERT (s != NULL);
2669
57e8b36a 2670 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->arm_glue_size);
252b5132 2671
2f475487 2672 BFD_ASSERT (s->size == globals->arm_glue_size);
252b5132
RH		 2673 s->contents = foo;
2674 }
2675
2676 if (globals->thumb_glue_size != 0)
2677 {
2678 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2679
2680 s = bfd_get_section_by_name
2681 (globals->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2682
2683 BFD_ASSERT (s != NULL);
2684
57e8b36a 2685 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->thumb_glue_size);
252b5132 2686
2f475487 2687 BFD_ASSERT (s->size == globals->thumb_glue_size);
252b5132
RH		 2688 s->contents = foo;
2689 }
c7b8f16e
JB		 2690
2691 if (globals->vfp11_erratum_glue_size != 0)
2692 {
2693 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2694
2695 s = bfd_get_section_by_name
2696 (globals->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2697
2698 BFD_ASSERT (s != NULL);
2699
2700 foo = bfd_alloc (globals->bfd_of_glue_owner,
2701 globals->vfp11_erratum_glue_size);
2702
2703 BFD_ASSERT (s->size == globals->vfp11_erratum_glue_size);
2704 s->contents = foo;
2705 }
252b5132 2706
845b51d6
PB		 2707 if (globals->bx_glue_size != 0)
2708 {
2709 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2710
2711 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
2712 ARM_BX_GLUE_SECTION_NAME);
2713
2714 BFD_ASSERT (s != NULL);
2715
2716 foo = bfd_alloc (globals->bfd_of_glue_owner, globals->bx_glue_size);
2717
2718 BFD_ASSERT (s->size == globals->bx_glue_size);
2719 s->contents = foo;
2720 }
2721
b34976b6 2722 return TRUE;
252b5132
RH		 2723}
2724
a4fd1a8e
PB		 2725/* Allocate space and symbols for calling a Thumb function from Arm mode.
2726 returns the symbol identifying teh stub. */
2727static struct elf_link_hash_entry *
57e8b36a
NC		 2728record_arm_to_thumb_glue (struct bfd_link_info * link_info,
2729 struct elf_link_hash_entry * h)
252b5132
RH		 2730{
2731 const char * name = h->root.root.string;
63b0f745 2732 asection * s;
252b5132
RH		 2733 char * tmp_name;
2734 struct elf_link_hash_entry * myh;
14a793b2 2735 struct bfd_link_hash_entry * bh;
252b5132 2736 struct elf32_arm_link_hash_table * globals;
dc810e39 2737 bfd_vma val;
2f475487 2738 bfd_size_type size;
252b5132
RH		 2739
2740 globals = elf32_arm_hash_table (link_info);
2741
2742 BFD_ASSERT (globals != NULL);
2743 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2744
2745 s = bfd_get_section_by_name
2746 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME);
2747
252b5132
RH		 2748 BFD_ASSERT (s != NULL);
2749
57e8b36a 2750 tmp_name = bfd_malloc ((bfd_size_type) strlen (name) + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2751
2752 BFD_ASSERT (tmp_name);
2753
2754 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name);
2755
2756 myh = elf_link_hash_lookup
b34976b6 2757 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2758
2759 if (myh != NULL)
2760 {
9b485d32 2761 /* We've already seen this guy. */
252b5132 2762 free (tmp_name);
a4fd1a8e 2763 return myh;
252b5132
RH		 2764 }
2765
57e8b36a
NC		 2766 /* The only trick here is using hash_table->arm_glue_size as the value.
2767 Even though the section isn't allocated yet, this is where we will be
2768 putting it. */
14a793b2 2769 bh = NULL;
dc810e39
AM		 2770 val = globals->arm_glue_size + 1;
2771 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2772 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2773 NULL, TRUE, FALSE, &bh);
252b5132 2774
b7693d02
DJ		 2775 myh = (struct elf_link_hash_entry *) bh;
2776 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2777 myh->forced_local = 1;
2778
252b5132
RH		 2779 free (tmp_name);
2780
27e55c4d
PB		 2781 if (link_info->shared || globals->root.is_relocatable_executable
2782 || globals->pic_veneer)
2f475487 2783 size = ARM2THUMB_PIC_GLUE_SIZE;
26079076
PB		 2784 else if (globals->use_blx)
2785 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
8f6277f5 2786 else
2f475487
AM		 2787 size = ARM2THUMB_STATIC_GLUE_SIZE;
2788
2789 s->size += size;
2790 globals->arm_glue_size += size;
252b5132 2791
a4fd1a8e 2792 return myh;
252b5132
RH		 2793}
2794
2795static void
57e8b36a
NC		 2796record_thumb_to_arm_glue (struct bfd_link_info *link_info,
2797 struct elf_link_hash_entry *h)
252b5132
RH		 2798{
2799 const char *name = h->root.root.string;
63b0f745 2800 asection *s;
252b5132
RH		 2801 char *tmp_name;
2802 struct elf_link_hash_entry *myh;
14a793b2 2803 struct bfd_link_hash_entry *bh;
252b5132 2804 struct elf32_arm_link_hash_table *hash_table;
dc810e39 2805 bfd_vma val;
252b5132
RH		 2806
2807 hash_table = elf32_arm_hash_table (link_info);
2808
2809 BFD_ASSERT (hash_table != NULL);
2810 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2811
2812 s = bfd_get_section_by_name
2813 (hash_table->bfd_of_glue_owner, THUMB2ARM_GLUE_SECTION_NAME);
2814
2815 BFD_ASSERT (s != NULL);
2816
57e8b36a
NC		 2817 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2818 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1);
252b5132
RH		 2819
2820 BFD_ASSERT (tmp_name);
2821
2822 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name);
2823
2824 myh = elf_link_hash_lookup
b34976b6 2825 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE);
252b5132
RH		 2826
2827 if (myh != NULL)
2828 {
9b485d32 2829 /* We've already seen this guy. */
252b5132 2830 free (tmp_name);
9b485d32 2831 return;
252b5132
RH		 2832 }
2833
14a793b2 2834 bh = NULL;
dc810e39
AM		 2835 val = hash_table->thumb_glue_size + 1;
2836 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2837 tmp_name, BSF_GLOBAL, s, val,
b34976b6 2838 NULL, TRUE, FALSE, &bh);
252b5132 2839
9b485d32 2840 /* If we mark it 'Thumb', the disassembler will do a better job. */
14a793b2 2841 myh = (struct elf_link_hash_entry *) bh;
b7693d02
DJ		 2842 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
2843 myh->forced_local = 1;
252b5132
RH		 2844
2845 free (tmp_name);
2846
252b5132
RH		 2847#define CHANGE_TO_ARM "__%s_change_to_arm"
2848#define BACK_FROM_ARM "__%s_back_from_arm"
2849
9b485d32 2850 /* Allocate another symbol to mark where we switch to Arm mode. */
57e8b36a
NC		 2851 tmp_name = bfd_malloc ((bfd_size_type) strlen (name)
2852 + strlen (CHANGE_TO_ARM) + 1);
252b5132
RH		 2853
2854 BFD_ASSERT (tmp_name);
2855
2856 sprintf (tmp_name, CHANGE_TO_ARM, name);
2857
14a793b2 2858 bh = NULL;
dc810e39
AM		 2859 val = hash_table->thumb_glue_size + 4,
2860 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
2861 tmp_name, BSF_LOCAL, s, val,
b34976b6 2862 NULL, TRUE, FALSE, &bh);
252b5132
RH		 2863
2864 free (tmp_name);
2865
2f475487 2866 s->size += THUMB2ARM_GLUE_SIZE;
252b5132
RH		 2867 hash_table->thumb_glue_size += THUMB2ARM_GLUE_SIZE;
2868
2869 return;
2870}
2871
c7b8f16e 2872
845b51d6
PB		 2873/* Allocate space for ARMv4 BX veneers. */
2874
2875static void
2876record_arm_bx_glue (struct bfd_link_info * link_info, int reg)
2877{
2878 asection * s;
2879 struct elf32_arm_link_hash_table *globals;
2880 char *tmp_name;
2881 struct elf_link_hash_entry *myh;
2882 struct bfd_link_hash_entry *bh;
2883 bfd_vma val;
2884
2885 /* BX PC does not need a veneer. */
2886 if (reg == 15)
2887 return;
2888
2889 globals = elf32_arm_hash_table (link_info);
2890
2891 BFD_ASSERT (globals != NULL);
2892 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
2893
2894 /* Check if this veneer has already been allocated. */
2895 if (globals->bx_glue_offset[reg])
2896 return;
2897
2898 s = bfd_get_section_by_name
2899 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME);
2900
2901 BFD_ASSERT (s != NULL);
2902
2903 /* Add symbol for veneer. */
2904 tmp_name = bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1);
2905
2906 BFD_ASSERT (tmp_name);
2907
2908 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg);
2909
2910 myh = elf_link_hash_lookup
2911 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE);
2912
2913 BFD_ASSERT (myh == NULL);
2914
2915 bh = NULL;
2916 val = globals->bx_glue_size;
2917 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner,
2918 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
2919 NULL, TRUE, FALSE, &bh);
2920
2921 myh = (struct elf_link_hash_entry *) bh;
2922 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
2923 myh->forced_local = 1;
2924
2925 s->size += ARM_BX_VENEER_SIZE;
2926 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2;
2927 globals->bx_glue_size += ARM_BX_VENEER_SIZE;
2928}
2929
2930
c7b8f16e
JB		 2931/* Add an entry to the code/data map for section SEC. */
2932
2933static void
2934elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma)
2935{
2936 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
2937 unsigned int newidx;
2938
2939 if (sec_data->map == NULL)
2940 {
2941 sec_data->map = bfd_malloc (sizeof (elf32_arm_section_map));
2942 sec_data->mapcount = 0;
2943 sec_data->mapsize = 1;
2944 }
2945
2946 newidx = sec_data->mapcount++;
2947
2948 if (sec_data->mapcount > sec_data->mapsize)
2949 {
2950 sec_data->mapsize *= 2;
515ef31d
NC		 2951 sec_data->map = bfd_realloc_or_free (sec_data->map, sec_data->mapsize
2952 * sizeof (elf32_arm_section_map));
2953 }
2954
2955 if (sec_data->map)
2956 {
2957 sec_data->map[newidx].vma = vma;
2958 sec_data->map[newidx].type = type;
c7b8f16e 2959 }
c7b8f16e
JB		 2960}
2961
2962
2963/* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode
2964 veneers are handled for now. */
2965
2966static bfd_vma
2967record_vfp11_erratum_veneer (struct bfd_link_info *link_info,
2968 elf32_vfp11_erratum_list *branch,
2969 bfd *branch_bfd,
2970 asection *branch_sec,
2971 unsigned int offset)
2972{
2973 asection *s;
2974 struct elf32_arm_link_hash_table *hash_table;
2975 char *tmp_name;
2976 struct elf_link_hash_entry *myh;
2977 struct bfd_link_hash_entry *bh;
2978 bfd_vma val;
2979 struct _arm_elf_section_data *sec_data;
2980 int errcount;
2981 elf32_vfp11_erratum_list *newerr;
2982
2983 hash_table = elf32_arm_hash_table (link_info);
2984
2985 BFD_ASSERT (hash_table != NULL);
2986 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL);
2987
2988 s = bfd_get_section_by_name
2989 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME);
2990
2991 sec_data = elf32_arm_section_data (s);
2992
2993 BFD_ASSERT (s != NULL);
2994
2995 tmp_name = bfd_malloc ((bfd_size_type) strlen
2996 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
2997
2998 BFD_ASSERT (tmp_name);
2999
3000 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3001 hash_table->num_vfp11_fixes);
3002
3003 myh = elf_link_hash_lookup
3004 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3005
3006 BFD_ASSERT (myh == NULL);
3007
3008 bh = NULL;
3009 val = hash_table->vfp11_erratum_glue_size;
3010 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner,
3011 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val,
3012 NULL, TRUE, FALSE, &bh);
3013
3014 myh = (struct elf_link_hash_entry *) bh;
3015 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3016 myh->forced_local = 1;
3017
3018 /* Link veneer back to calling location. */
3019 errcount = ++(sec_data->erratumcount);
3020 newerr = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3021
3022 newerr->type = VFP11_ERRATUM_ARM_VENEER;
3023 newerr->vma = -1;
3024 newerr->u.v.branch = branch;
3025 newerr->u.v.id = hash_table->num_vfp11_fixes;
3026 branch->u.b.veneer = newerr;
3027
3028 newerr->next = sec_data->erratumlist;
3029 sec_data->erratumlist = newerr;
3030
3031 /* A symbol for the return from the veneer. */
3032 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
3033 hash_table->num_vfp11_fixes);
3034
3035 myh = elf_link_hash_lookup
3036 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE);
3037
3038 if (myh != NULL)
3039 abort ();
3040
3041 bh = NULL;
3042 val = offset + 4;
3043 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL,
3044 branch_sec, val, NULL, TRUE, FALSE, &bh);
3045
3046 myh = (struct elf_link_hash_entry *) bh;
3047 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC);
3048 myh->forced_local = 1;
3049
3050 free (tmp_name);
3051
3052 /* Generate a mapping symbol for the veneer section, and explicitly add an
3053 entry for that symbol to the code/data map for the section. */
3054 if (hash_table->vfp11_erratum_glue_size == 0)
3055 {
3056 bh = NULL;
3057 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it
3058 ever requires this erratum fix. */
3059 _bfd_generic_link_add_one_symbol (link_info,
3060 hash_table->bfd_of_glue_owner, "$a",
3061 BSF_LOCAL, s, 0, NULL,
3062 TRUE, FALSE, &bh);
3063
3064 myh = (struct elf_link_hash_entry *) bh;
3065 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
3066 myh->forced_local = 1;
3067
3068 /* The elf32_arm_init_maps function only cares about symbols from input
3069 BFDs. We must make a note of this generated mapping symbol
3070 ourselves so that code byteswapping works properly in
3071 elf32_arm_write_section. */
3072 elf32_arm_section_map_add (s, 'a', 0);
3073 }
3074
3075 s->size += VFP11_ERRATUM_VENEER_SIZE;
3076 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE;
3077 hash_table->num_vfp11_fixes++;
3078
3079 /* The offset of the veneer. */
3080 return val;
3081}
3082
8afb0e02
NC		 3083/* Add the glue sections to ABFD. This function is called from the
3084 linker scripts in ld/emultempl/{armelf}.em. */
9b485d32 3085
b34976b6 3086bfd_boolean
57e8b36a
NC		 3087bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd,
3088 struct bfd_link_info *info)
252b5132 3089{
252b5132
RH		 3090 flagword flags;
3091 asection *sec;
3092
8afb0e02
NC		 3093 /* If we are only performing a partial
3094 link do not bother adding the glue. */
1049f94e 3095 if (info->relocatable)
b34976b6 3096 return TRUE;
252b5132 3097
252b5132
RH		 3098 sec = bfd_get_section_by_name (abfd, ARM2THUMB_GLUE_SECTION_NAME);
3099
3100 if (sec == NULL)
3101 {
57db232e
NC		 3102 /* Note: we do not include the flag SEC_LINKER_CREATED, as this
3103 will prevent elf_link_input_bfd() from processing the contents
3104 of this section. */
2f475487
AM		 3105 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3106 | SEC_CODE | SEC_READONLY);
252b5132 3107
3496cb2a
L		 3108 sec = bfd_make_section_with_flags (abfd,
3109 ARM2THUMB_GLUE_SECTION_NAME,
3110 flags);
252b5132
RH		 3111
3112 if (sec == NULL
252b5132 3113 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3114 return FALSE;
9a5aca8c 3115
57db232e
NC		 3116 /* Set the gc mark to prevent the section from being removed by garbage
3117 collection, despite the fact that no relocs refer to this section. */
3118 sec->gc_mark = 1;
252b5132
RH		 3119 }
3120
3121 sec = bfd_get_section_by_name (abfd, THUMB2ARM_GLUE_SECTION_NAME);
3122
3123 if (sec == NULL)
3124 {
2f475487
AM		 3125 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3126 | SEC_CODE | SEC_READONLY);
252b5132 3127
3496cb2a
L		 3128 sec = bfd_make_section_with_flags (abfd,
3129 THUMB2ARM_GLUE_SECTION_NAME,
3130 flags);
252b5132
RH		 3131
3132 if (sec == NULL
252b5132 3133 || !bfd_set_section_alignment (abfd, sec, 2))
b34976b6 3134 return FALSE;
9a5aca8c 3135
57db232e 3136 sec->gc_mark = 1;
252b5132
RH		 3137 }
3138
c7b8f16e
JB		 3139 sec = bfd_get_section_by_name (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME);
3140
3141 if (sec == NULL)
3142 {
3143 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3144 | SEC_CODE | SEC_READONLY);
3145
3146 sec = bfd_make_section_with_flags (abfd,
3147 VFP11_ERRATUM_VENEER_SECTION_NAME,
3148 flags);
3149
3150 if (sec == NULL
3151 || !bfd_set_section_alignment (abfd, sec, 2))
3152 return FALSE;
3153
3154 sec->gc_mark = 1;
3155 }
3156
845b51d6
PB		 3157 sec = bfd_get_section_by_name (abfd, ARM_BX_GLUE_SECTION_NAME);
3158
3159 if (sec == NULL)
3160 {
3161 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3162 | SEC_CODE | SEC_READONLY);
3163
3164 sec = bfd_make_section_with_flags (abfd,
3165 ARM_BX_GLUE_SECTION_NAME,
3166 flags);
3167
3168 if (sec == NULL
3169 || !bfd_set_section_alignment (abfd, sec, 2))
3170 return FALSE;
3171
3172 sec->gc_mark = 1;
3173 }
3174
b34976b6 3175 return TRUE;
8afb0e02
NC		 3176}
3177
3178/* Select a BFD to be used to hold the sections used by the glue code.
3179 This function is called from the linker scripts in ld/emultempl/
3180 {armelf/pe}.em */
3181
b34976b6 3182bfd_boolean
57e8b36a 3183bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info)
8afb0e02
NC		 3184{
3185 struct elf32_arm_link_hash_table *globals;
3186
3187 /* If we are only performing a partial link
3188 do not bother getting a bfd to hold the glue. */
1049f94e 3189 if (info->relocatable)
b34976b6 3190 return TRUE;
8afb0e02 3191
b7693d02
DJ		 3192 /* Make sure we don't attach the glue sections to a dynamic object. */
3193 BFD_ASSERT (!(abfd->flags & DYNAMIC));
3194
8afb0e02
NC		 3195 globals = elf32_arm_hash_table (info);
3196
3197 BFD_ASSERT (globals != NULL);
3198
3199 if (globals->bfd_of_glue_owner != NULL)
b34976b6 3200 return TRUE;
8afb0e02 3201
252b5132
RH		 3202 /* Save the bfd for later use. */
3203 globals->bfd_of_glue_owner = abfd;
cedb70c5 3204
b34976b6 3205 return TRUE;
252b5132
RH		 3206}
3207
39b41c9c
PB		 3208static void check_use_blx(struct elf32_arm_link_hash_table *globals)
3209{
104d59d1
JM		 3210 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
3211 Tag_CPU_arch) > 2)
39b41c9c
PB		 3212 globals->use_blx = 1;
3213}
3214
b34976b6 3215bfd_boolean
57e8b36a 3216bfd_elf32_arm_process_before_allocation (bfd *abfd,
d504ffc8 3217 struct bfd_link_info *link_info)
252b5132
RH		 3218{
3219 Elf_Internal_Shdr *symtab_hdr;
6cdc0ccc 3220 Elf_Internal_Rela *internal_relocs = NULL;
252b5132
RH		 3221 Elf_Internal_Rela *irel, *irelend;
3222 bfd_byte *contents = NULL;
252b5132
RH		 3223
3224 asection *sec;
3225 struct elf32_arm_link_hash_table *globals;
3226
3227 /* If we are only performing a partial link do not bother
3228 to construct any glue. */
1049f94e 3229 if (link_info->relocatable)
b34976b6 3230 return TRUE;
252b5132 3231
39ce1a6a
NC		 3232 /* Here we have a bfd that is to be included on the link. We have a
3233 hook to do reloc rummaging, before section sizes are nailed down. */
252b5132
RH		 3234 globals = elf32_arm_hash_table (link_info);
3235
3236 BFD_ASSERT (globals != NULL);
39ce1a6a
NC		 3237
3238 check_use_blx (globals);
252b5132 3239
d504ffc8 3240 if (globals->byteswap_code && !bfd_big_endian (abfd))
e489d0ae 3241 {
d003868e
AM		 3242 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."),
3243 abfd);
e489d0ae
PB		 3244 return FALSE;
3245 }
f21f3fe0 3246
39ce1a6a
NC		 3247 /* PR 5398: If we have not decided to include any loadable sections in
3248 the output then we will not have a glue owner bfd. This is OK, it
3249 just means that there is nothing else for us to do here. */
3250 if (globals->bfd_of_glue_owner == NULL)
3251 return TRUE;
3252
252b5132
RH		 3253 /* Rummage around all the relocs and map the glue vectors. */
3254 sec = abfd->sections;
3255
3256 if (sec == NULL)
b34976b6 3257 return TRUE;
252b5132
RH		 3258
3259 for (; sec != NULL; sec = sec->next)
3260 {
3261 if (sec->reloc_count == 0)
3262 continue;
3263
2f475487
AM		 3264 if ((sec->flags & SEC_EXCLUDE) != 0)
3265 continue;
3266
0ffa91dd 3267 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 3268
9b485d32 3269 /* Load the relocs. */
6cdc0ccc 3270 internal_relocs
57e8b36a 3271 = _bfd_elf_link_read_relocs (abfd, sec, (void *) NULL,
45d6a902 3272 (Elf_Internal_Rela *) NULL, FALSE);
252b5132 3273
6cdc0ccc
AM		 3274 if (internal_relocs == NULL)
3275 goto error_return;
252b5132 3276
6cdc0ccc
AM		 3277 irelend = internal_relocs + sec->reloc_count;
3278 for (irel = internal_relocs; irel < irelend; irel++)
252b5132
RH		 3279 {
3280 long r_type;
3281 unsigned long r_index;
252b5132
RH		 3282
3283 struct elf_link_hash_entry *h;
3284
3285 r_type = ELF32_R_TYPE (irel->r_info);
3286 r_index = ELF32_R_SYM (irel->r_info);
3287
9b485d32 3288 /* These are the only relocation types we care about. */
ba96a88f 3289 if ( r_type != R_ARM_PC24
b7693d02 3290 && r_type != R_ARM_PLT32
5b5bb741
PB		 3291 && r_type != R_ARM_CALL
3292 && r_type != R_ARM_JUMP24
bd97cb95 3293 && r_type != R_ARM_THM_CALL
845b51d6
PB		 3294 && r_type != R_ARM_THM_JUMP24
3295 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2))
252b5132
RH		 3296 continue;
3297
3298 /* Get the section contents if we haven't done so already. */
3299 if (contents == NULL)
3300 {
3301 /* Get cached copy if it exists. */
3302 if (elf_section_data (sec)->this_hdr.contents != NULL)
3303 contents = elf_section_data (sec)->this_hdr.contents;
3304 else
3305 {
3306 /* Go get them off disk. */
57e8b36a 3307 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
252b5132
RH		 3308 goto error_return;
3309 }
3310 }
3311
845b51d6
PB		 3312 if (r_type == R_ARM_V4BX)
3313 {
3314 int reg;
3315
3316 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf;
3317 record_arm_bx_glue (link_info, reg);
3318 continue;
3319 }
3320
a7c10850 3321 /* If the relocation is not against a symbol it cannot concern us. */
252b5132
RH		 3322 h = NULL;
3323
9b485d32 3324 /* We don't care about local symbols. */
252b5132
RH		 3325 if (r_index < symtab_hdr->sh_info)
3326 continue;
3327
9b485d32 3328 /* This is an external symbol. */
252b5132
RH		 3329 r_index -= symtab_hdr->sh_info;
3330 h = (struct elf_link_hash_entry *)
3331 elf_sym_hashes (abfd)[r_index];
3332
3333 /* If the relocation is against a static symbol it must be within
3334 the current section and so cannot be a cross ARM/Thumb relocation. */
3335 if (h == NULL)
3336 continue;
3337
d504ffc8
DJ		 3338 /* If the call will go through a PLT entry then we do not need
3339 glue. */
3340 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1)
b7693d02
DJ		 3341 continue;
3342
252b5132
RH		 3343 switch (r_type)
3344 {
3345 case R_ARM_PC24:
c6596c5e 3346 case R_ARM_PLT32:
5b5bb741
PB		 3347 case R_ARM_CALL:
3348 case R_ARM_JUMP24:
252b5132 3349 /* This one is a call from arm code. We need to look up
2f0ca46a 3350 the target of the call. If it is a thumb target, we
252b5132 3351 insert glue. */
39b41c9c
PB		 3352 if (ELF_ST_TYPE(h->type) == STT_ARM_TFUNC
3353 && !(r_type == R_ARM_CALL && globals->use_blx))
252b5132
RH		 3354 record_arm_to_thumb_glue (link_info, h);
3355 break;
3356
c19d1205 3357 case R_ARM_THM_CALL:
bd97cb95 3358 case R_ARM_THM_JUMP24:
f21f3fe0 3359 /* This one is a call from thumb code. We look
2f0ca46a 3360 up the target of the call. If it is not a thumb
bcbdc74c 3361 target, we insert glue. */
bd97cb95
DJ		 3362 if (ELF_ST_TYPE (h->type) != STT_ARM_TFUNC
3363 && !(globals->use_blx && r_type == R_ARM_THM_CALL)
5ab79981 3364 && h->root.type != bfd_link_hash_undefweak)
252b5132
RH		 3365 record_thumb_to_arm_glue (link_info, h);
3366 break;
3367
3368 default:
c6596c5e 3369 abort ();
252b5132
RH		 3370 }
3371 }
6cdc0ccc
AM		 3372
3373 if (contents != NULL
3374 && elf_section_data (sec)->this_hdr.contents != contents)
3375 free (contents);
3376 contents = NULL;
3377
3378 if (internal_relocs != NULL
3379 && elf_section_data (sec)->relocs != internal_relocs)
3380 free (internal_relocs);
3381 internal_relocs = NULL;
252b5132
RH		 3382 }
3383
b34976b6 3384 return TRUE;
9a5aca8c 3385
252b5132 3386error_return:
6cdc0ccc
AM		 3387 if (contents != NULL
3388 && elf_section_data (sec)->this_hdr.contents != contents)
3389 free (contents);
3390 if (internal_relocs != NULL
3391 && elf_section_data (sec)->relocs != internal_relocs)
3392 free (internal_relocs);
9a5aca8c 3393
b34976b6 3394 return FALSE;
252b5132 3395}
7e392df6 3396#endif
252b5132 3397
eb043451 3398
c7b8f16e
JB		 3399/* Initialise maps of ARM/Thumb/data for input BFDs. */
3400
3401void
3402bfd_elf32_arm_init_maps (bfd *abfd)
3403{
3404 Elf_Internal_Sym *isymbuf;
3405 Elf_Internal_Shdr *hdr;
3406 unsigned int i, localsyms;
3407
3408 if ((abfd->flags & DYNAMIC) != 0)
3409 return;
3410
0ffa91dd 3411 hdr = & elf_symtab_hdr (abfd);
c7b8f16e
JB		 3412 localsyms = hdr->sh_info;
3413
3414 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field
3415 should contain the number of local symbols, which should come before any
3416 global symbols. Mapping symbols are always local. */
3417 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL,
3418 NULL);
3419
3420 /* No internal symbols read? Skip this BFD. */
3421 if (isymbuf == NULL)
3422 return;
3423
3424 for (i = 0; i < localsyms; i++)
3425 {
3426 Elf_Internal_Sym *isym = &isymbuf[i];
3427 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
3428 const char *name;
3429
3430 if (sec != NULL
3431 && ELF_ST_BIND (isym->st_info) == STB_LOCAL)
3432 {
3433 name = bfd_elf_string_from_elf_section (abfd,
3434 hdr->sh_link, isym->st_name);
3435
3436 if (bfd_is_arm_special_symbol_name (name,
3437 BFD_ARM_SPECIAL_SYM_TYPE_MAP))
3438 elf32_arm_section_map_add (sec, name[1], isym->st_value);
3439 }
3440 }
3441}
3442
3443
3444void
3445bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info)
3446{
3447 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
104d59d1 3448 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd);
c7b8f16e
JB		 3449
3450 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */
3451 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7)
3452 {
3453 switch (globals->vfp11_fix)
3454 {
3455 case BFD_ARM_VFP11_FIX_DEFAULT:
3456 case BFD_ARM_VFP11_FIX_NONE:
3457 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3458 break;
3459
3460 default:
3461 /* Give a warning, but do as the user requests anyway. */
3462 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum "
3463 "workaround is not necessary for target architecture"), obfd);
3464 }
3465 }
3466 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT)
3467 /* For earlier architectures, we might need the workaround, but do not
3468 enable it by default. If users is running with broken hardware, they
3469 must enable the erratum fix explicitly. */
3470 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE;
3471}
3472
3473
3474enum bfd_arm_vfp11_pipe {
3475 VFP11_FMAC,
3476 VFP11_LS,
3477 VFP11_DS,
3478 VFP11_BAD
3479};
3480
3481/* Return a VFP register number. This is encoded as RX:X for single-precision
3482 registers, or X:RX for double-precision registers, where RX is the group of
3483 four bits in the instruction encoding and X is the single extension bit.
3484 RX and X fields are specified using their lowest (starting) bit. The return
3485 value is:
3486
3487 0...31: single-precision registers s0...s31
3488 32...63: double-precision registers d0...d31.
3489
3490 Although X should be zero for VFP11 (encoding d0...d15 only), we might
3491 encounter VFP3 instructions, so we allow the full range for DP registers. */
3492
3493static unsigned int
3494bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx,
3495 unsigned int x)
3496{
3497 if (is_double)
3498 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32;
3499 else
3500 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1);
3501}
3502
3503/* Set bits in *WMASK according to a register number REG as encoded by
3504 bfd_arm_vfp11_regno(). Ignore d16-d31. */
3505
3506static void
3507bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg)
3508{
3509 if (reg < 32)
3510 *wmask |= 1 << reg;
3511 else if (reg < 48)
3512 *wmask |= 3 << ((reg - 32) * 2);
3513}
3514
3515/* Return TRUE if WMASK overwrites anything in REGS. */
3516
3517static bfd_boolean
3518bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs)
3519{
3520 int i;
3521
3522 for (i = 0; i < numregs; i++)
3523 {
3524 unsigned int reg = regs[i];
3525
3526 if (reg < 32 && (wmask & (1 << reg)) != 0)
3527 return TRUE;
3528
3529 reg -= 32;
3530
3531 if (reg >= 16)
3532 continue;
3533
3534 if ((wmask & (3 << (reg * 2))) != 0)
3535 return TRUE;
3536 }
3537
3538 return FALSE;
3539}
3540
3541/* In this function, we're interested in two things: finding input registers
3542 for VFP data-processing instructions, and finding the set of registers which
3543 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to
3544 hold the written set, so FLDM etc. are easy to deal with (we're only
3545 interested in 32 SP registers or 16 dp registers, due to the VFP version
3546 implemented by the chip in question). DP registers are marked by setting
3547 both SP registers in the write mask). */
3548
3549static enum bfd_arm_vfp11_pipe
3550bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs,
3551 int *numregs)
3552{
3553 enum bfd_arm_vfp11_pipe pipe = VFP11_BAD;
3554 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0;
3555
3556 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */
3557 {
3558 unsigned int pqrs;
3559 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3560 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3561
3562 pqrs = ((insn & 0x00800000) >> 20)
3563 | ((insn & 0x00300000) >> 19)
3564 | ((insn & 0x00000040) >> 6);
3565
3566 switch (pqrs)
3567 {
3568 case 0: /* fmac[sd]. */
3569 case 1: /* fnmac[sd]. */
3570 case 2: /* fmsc[sd]. */
3571 case 3: /* fnmsc[sd]. */
3572 pipe = VFP11_FMAC;
3573 bfd_arm_vfp11_write_mask (destmask, fd);
3574 regs[0] = fd;
3575 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3576 regs[2] = fm;
3577 *numregs = 3;
3578 break;
3579
3580 case 4: /* fmul[sd]. */
3581 case 5: /* fnmul[sd]. */
3582 case 6: /* fadd[sd]. */
3583 case 7: /* fsub[sd]. */
3584 pipe = VFP11_FMAC;
3585 goto vfp_binop;
3586
3587 case 8: /* fdiv[sd]. */
3588 pipe = VFP11_DS;
3589 vfp_binop:
3590 bfd_arm_vfp11_write_mask (destmask, fd);
3591 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */
3592 regs[1] = fm;
3593 *numregs = 2;
3594 break;
3595
3596 case 15: /* extended opcode. */
3597 {
3598 unsigned int extn = ((insn >> 15) & 0x1e)
3599 | ((insn >> 7) & 1);
3600
3601 switch (extn)
3602 {
3603 case 0: /* fcpy[sd]. */
3604 case 1: /* fabs[sd]. */
3605 case 2: /* fneg[sd]. */
3606 case 8: /* fcmp[sd]. */
3607 case 9: /* fcmpe[sd]. */
3608 case 10: /* fcmpz[sd]. */
3609 case 11: /* fcmpez[sd]. */
3610 case 16: /* fuito[sd]. */
3611 case 17: /* fsito[sd]. */
3612 case 24: /* ftoui[sd]. */
3613 case 25: /* ftouiz[sd]. */
3614 case 26: /* ftosi[sd]. */
3615 case 27: /* ftosiz[sd]. */
3616 /* These instructions will not bounce due to underflow. */
3617 *numregs = 0;
3618 pipe = VFP11_FMAC;
3619 break;
3620
3621 case 3: /* fsqrt[sd]. */
3622 /* fsqrt cannot underflow, but it can (perhaps) overwrite
3623 registers to cause the erratum in previous instructions. */
3624 bfd_arm_vfp11_write_mask (destmask, fd);
3625 pipe = VFP11_DS;
3626 break;
3627
3628 case 15: /* fcvt{ds,sd}. */
3629 {
3630 int rnum = 0;
3631
3632 bfd_arm_vfp11_write_mask (destmask, fd);
3633
3634 /* Only FCVTSD can underflow. */
3635 if ((insn & 0x100) != 0)
3636 regs[rnum++] = fm;
3637
3638 *numregs = rnum;
3639
3640 pipe = VFP11_FMAC;
3641 }
3642 break;
3643
3644 default:
3645 return VFP11_BAD;
3646 }
3647 }
3648 break;
3649
3650 default:
3651 return VFP11_BAD;
3652 }
3653 }
3654 /* Two-register transfer. */
3655 else if ((insn & 0x0fe00ed0) == 0x0c400a10)
3656 {
3657 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5);
3658
3659 if ((insn & 0x100000) == 0)
3660 {
3661 if (is_double)
3662 bfd_arm_vfp11_write_mask (destmask, fm);
3663 else
3664 {
3665 bfd_arm_vfp11_write_mask (destmask, fm);
3666 bfd_arm_vfp11_write_mask (destmask, fm + 1);
3667 }
3668 }
3669
3670 pipe = VFP11_LS;
3671 }
3672 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */
3673 {
3674 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22);
3675 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1);
3676
3677 switch (puw)
3678 {
3679 case 0: /* Two-reg transfer. We should catch these above. */
3680 abort ();
3681
3682 case 2: /* fldm[sdx]. */
3683 case 3:
3684 case 5:
3685 {
3686 unsigned int i, offset = insn & 0xff;
3687
3688 if (is_double)
3689 offset >>= 1;
3690
3691 for (i = fd; i < fd + offset; i++)
3692 bfd_arm_vfp11_write_mask (destmask, i);
3693 }
3694 break;
3695
3696 case 4: /* fld[sd]. */
3697 case 6:
3698 bfd_arm_vfp11_write_mask (destmask, fd);
3699 break;
3700
3701 default:
3702 return VFP11_BAD;
3703 }
3704
3705 pipe = VFP11_LS;
3706 }
3707 /* Single-register transfer. Note L==0. */
3708 else if ((insn & 0x0f100e10) == 0x0e000a10)
3709 {
3710 unsigned int opcode = (insn >> 21) & 7;
3711 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7);
3712
3713 switch (opcode)
3714 {
3715 case 0: /* fmsr/fmdlr. */
3716 case 1: /* fmdhr. */
3717 /* Mark fmdhr and fmdlr as writing to the whole of the DP
3718 destination register. I don't know if this is exactly right,
3719 but it is the conservative choice. */
3720 bfd_arm_vfp11_write_mask (destmask, fn);
3721 break;
3722
3723 case 7: /* fmxr. */
3724 break;
3725 }
3726
3727 pipe = VFP11_LS;
3728 }
3729
3730 return pipe;
3731}
3732
3733
3734static int elf32_arm_compare_mapping (const void * a, const void * b);
3735
3736
3737/* Look for potentially-troublesome code sequences which might trigger the
3738 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet
3739 (available from ARM) for details of the erratum. A short version is
3740 described in ld.texinfo. */
3741
3742bfd_boolean
3743bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info)
3744{
3745 asection *sec;
3746 bfd_byte *contents = NULL;
3747 int state = 0;
3748 int regs[3], numregs = 0;
3749 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
3750 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR);
3751
3752 /* We use a simple FSM to match troublesome VFP11 instruction sequences.
3753 The states transition as follows:
3754
3755 0 -> 1 (vector) or 0 -> 2 (scalar)
3756 A VFP FMAC-pipeline instruction has been seen. Fill
3757 regs[0]..regs[numregs-1] with its input operands. Remember this
3758 instruction in 'first_fmac'.
3759
3760 1 -> 2
3761 Any instruction, except for a VFP instruction which overwrites
3762 regs[*].
3763
3764 1 -> 3 [ -> 0 ] or
3765 2 -> 3 [ -> 0 ]
3766 A VFP instruction has been seen which overwrites any of regs[*].
3767 We must make a veneer! Reset state to 0 before examining next
3768 instruction.
3769
3770 2 -> 0
3771 If we fail to match anything in state 2, reset to state 0 and reset
3772 the instruction pointer to the instruction after 'first_fmac'.
3773
3774 If the VFP11 vector mode is in use, there must be at least two unrelated
3775 instructions between anti-dependent VFP11 instructions to properly avoid
3776 triggering the erratum, hence the use of the extra state 1.
3777 */
3778
3779 /* If we are only performing a partial link do not bother
3780 to construct any glue. */
3781 if (link_info->relocatable)
3782 return TRUE;
3783
0ffa91dd
NC		 3784 /* Skip if this bfd does not correspond to an ELF image. */
3785 if (! is_arm_elf (abfd))
3786 return TRUE;
3787
c7b8f16e
JB		 3788 /* We should have chosen a fix type by the time we get here. */
3789 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT);
3790
3791 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE)
3792 return TRUE;
2e6030b9 3793
c7b8f16e
JB		 3794 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3795 {
3796 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0;
3797 struct _arm_elf_section_data *sec_data;
3798
3799 /* If we don't have executable progbits, we're not interested in this
3800 section. Also skip if section is to be excluded. */
3801 if (elf_section_type (sec) != SHT_PROGBITS
3802 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0
3803 || (sec->flags & SEC_EXCLUDE) != 0
3804 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0)
3805 continue;
3806
3807 sec_data = elf32_arm_section_data (sec);
3808
3809 if (sec_data->mapcount == 0)
3810 continue;
3811
3812 if (elf_section_data (sec)->this_hdr.contents != NULL)
3813 contents = elf_section_data (sec)->this_hdr.contents;
3814 else if (! bfd_malloc_and_get_section (abfd, sec, &contents))
3815 goto error_return;
3816
3817 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map),
3818 elf32_arm_compare_mapping);
3819
3820 for (span = 0; span < sec_data->mapcount; span++)
3821 {
3822 unsigned int span_start = sec_data->map[span].vma;
3823 unsigned int span_end = (span == sec_data->mapcount - 1)
3824 ? sec->size : sec_data->map[span + 1].vma;
3825 char span_type = sec_data->map[span].type;
3826
3827 /* FIXME: Only ARM mode is supported at present. We may need to
3828 support Thumb-2 mode also at some point. */
3829 if (span_type != 'a')
3830 continue;
3831
3832 for (i = span_start; i < span_end;)
3833 {
3834 unsigned int next_i = i + 4;
3835 unsigned int insn = bfd_big_endian (abfd)
3836 ? (contents[i] << 24)
3837 | (contents[i + 1] << 16)
3838 | (contents[i + 2] << 8)
3839 | contents[i + 3]
3840 : (contents[i + 3] << 24)
3841 | (contents[i + 2] << 16)
3842 | (contents[i + 1] << 8)
3843 | contents[i];
3844 unsigned int writemask = 0;
3845 enum bfd_arm_vfp11_pipe pipe;
3846
3847 switch (state)
3848 {
3849 case 0:
3850 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs,
3851 &numregs);
3852 /* I'm assuming the VFP11 erratum can trigger with denorm
3853 operands on either the FMAC or the DS pipeline. This might
3854 lead to slightly overenthusiastic veneer insertion. */
3855 if (pipe == VFP11_FMAC || pipe == VFP11_DS)
3856 {
3857 state = use_vector ? 1 : 2;
3858 first_fmac = i;
3859 veneer_of_insn = insn;
3860 }
3861 break;
3862
3863 case 1:
3864 {
3865 int other_regs[3], other_numregs;
3866 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3867 other_regs,
3868 &other_numregs);
3869 if (pipe != VFP11_BAD
3870 && bfd_arm_vfp11_antidependency (writemask, regs,
3871 numregs))
3872 state = 3;
3873 else
3874 state = 2;
3875 }
3876 break;
3877
3878 case 2:
3879 {
3880 int other_regs[3], other_numregs;
3881 pipe = bfd_arm_vfp11_insn_decode (insn, &writemask,
3882 other_regs,
3883 &other_numregs);
3884 if (pipe != VFP11_BAD
3885 && bfd_arm_vfp11_antidependency (writemask, regs,
3886 numregs))
3887 state = 3;
3888 else
3889 {
3890 state = 0;
3891 next_i = first_fmac + 4;
3892 }
3893 }
3894 break;
3895
3896 case 3:
3897 abort (); /* Should be unreachable. */
3898 }
3899
3900 if (state == 3)
3901 {
3902 elf32_vfp11_erratum_list *newerr
3903 = bfd_zmalloc (sizeof (elf32_vfp11_erratum_list));
3904 int errcount;
3905
3906 errcount = ++(elf32_arm_section_data (sec)->erratumcount);
3907
3908 newerr->u.b.vfp_insn = veneer_of_insn;
3909
3910 switch (span_type)
3911 {
3912 case 'a':
3913 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER;
3914 break;
3915
3916 default:
3917 abort ();
3918 }
3919
3920 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec,
3921 first_fmac);
3922
3923 newerr->vma = -1;
3924
3925 newerr->next = sec_data->erratumlist;
3926 sec_data->erratumlist = newerr;
3927
3928 state = 0;
3929 }
3930
3931 i = next_i;
3932 }
3933 }
3934
3935 if (contents != NULL
3936 && elf_section_data (sec)->this_hdr.contents != contents)
3937 free (contents);
3938 contents = NULL;
3939 }
3940
3941 return TRUE;
3942
3943error_return:
3944 if (contents != NULL
3945 && elf_section_data (sec)->this_hdr.contents != contents)
3946 free (contents);
3947
3948 return FALSE;
3949}
3950
3951/* Find virtual-memory addresses for VFP11 erratum veneers and return locations
3952 after sections have been laid out, using specially-named symbols. */
3953
3954void
3955bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd,
3956 struct bfd_link_info *link_info)
3957{
3958 asection *sec;
3959 struct elf32_arm_link_hash_table *globals;
3960 char *tmp_name;
3961
3962 if (link_info->relocatable)
3963 return;
2e6030b9
MS		 3964
3965 /* Skip if this bfd does not correspond to an ELF image. */
0ffa91dd 3966 if (! is_arm_elf (abfd))
2e6030b9
MS		 3967 return;
3968
c7b8f16e
JB		 3969 globals = elf32_arm_hash_table (link_info);
3970
3971 tmp_name = bfd_malloc ((bfd_size_type) strlen
3972 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10);
3973
3974 for (sec = abfd->sections; sec != NULL; sec = sec->next)
3975 {
3976 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec);
3977 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist;
3978
3979 for (; errnode != NULL; errnode = errnode->next)
3980 {
3981 struct elf_link_hash_entry *myh;
3982 bfd_vma vma;
3983
3984 switch (errnode->type)
3985 {
3986 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
3987 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER:
3988 /* Find veneer symbol. */
3989 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME,
3990 errnode->u.b.veneer->u.v.id);
3991
3992 myh = elf_link_hash_lookup
3993 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
3994
3995 if (myh == NULL)
3996 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
3997 "`%s'"), abfd, tmp_name);
3998
3999 vma = myh->root.u.def.section->output_section->vma
4000 + myh->root.u.def.section->output_offset
4001 + myh->root.u.def.value;
4002
4003 errnode->u.b.veneer->vma = vma;
4004 break;
4005
4006 case VFP11_ERRATUM_ARM_VENEER:
4007 case VFP11_ERRATUM_THUMB_VENEER:
4008 /* Find return location. */
4009 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r",
4010 errnode->u.v.id);
4011
4012 myh = elf_link_hash_lookup
4013 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE);
4014
4015 if (myh == NULL)
4016 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer "
4017 "`%s'"), abfd, tmp_name);
4018
4019 vma = myh->root.u.def.section->output_section->vma
4020 + myh->root.u.def.section->output_offset
4021 + myh->root.u.def.value;
4022
4023 errnode->u.v.branch->vma = vma;
4024 break;
4025
4026 default:
4027 abort ();
4028 }
4029 }
4030 }
4031
4032 free (tmp_name);
4033}
4034
4035
eb043451
PB		 4036/* Set target relocation values needed during linking. */
4037
4038void
bf21ed78
MS		 4039bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd,
4040 struct bfd_link_info *link_info,
eb043451 4041 int target1_is_rel,
319850b4 4042 char * target2_type,
33bfe774 4043 int fix_v4bx,
c7b8f16e 4044 int use_blx,
bf21ed78 4045 bfd_arm_vfp11_fix vfp11_fix,
27e55c4d 4046 int no_enum_warn, int pic_veneer)
eb043451
PB		 4047{
4048 struct elf32_arm_link_hash_table *globals;
4049
4050 globals = elf32_arm_hash_table (link_info);
4051
4052 globals->target1_is_rel = target1_is_rel;
4053 if (strcmp (target2_type, "rel") == 0)
4054 globals->target2_reloc = R_ARM_REL32;
eeac373a
PB		 4055 else if (strcmp (target2_type, "abs") == 0)
4056 globals->target2_reloc = R_ARM_ABS32;
eb043451
PB		 4057 else if (strcmp (target2_type, "got-rel") == 0)
4058 globals->target2_reloc = R_ARM_GOT_PREL;
4059 else
4060 {
4061 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."),
4062 target2_type);
4063 }
319850b4 4064 globals->fix_v4bx = fix_v4bx;
33bfe774 4065 globals->use_blx |= use_blx;
c7b8f16e 4066 globals->vfp11_fix = vfp11_fix;
27e55c4d 4067 globals->pic_veneer = pic_veneer;
bf21ed78 4068
0ffa91dd
NC		 4069 BFD_ASSERT (is_arm_elf (output_bfd));
4070 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn;
eb043451 4071}
eb043451 4072
12a0a0fd 4073/* Replace the target offset of a Thumb bl or b.w instruction. */
252b5132 4074
12a0a0fd
PB		 4075static void
4076insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn)
4077{
4078 bfd_vma upper;
4079 bfd_vma lower;
4080 int reloc_sign;
4081
4082 BFD_ASSERT ((offset & 1) == 0);
4083
4084 upper = bfd_get_16 (abfd, insn);
4085 lower = bfd_get_16 (abfd, insn + 2);
4086 reloc_sign = (offset < 0) ? 1 : 0;
4087 upper = (upper & ~(bfd_vma) 0x7ff)
4088 | ((offset >> 12) & 0x3ff)
4089 | (reloc_sign << 10);
4090 lower = (lower & ~(bfd_vma) 0x2fff)
4091 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13)
4092 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11)
4093 | ((offset >> 1) & 0x7ff);
4094 bfd_put_16 (abfd, upper, insn);
4095 bfd_put_16 (abfd, lower, insn + 2);
252b5132
RH		 4096}
4097
52ab56c2
PB		 4098
4099/* Store an Arm insn into an output section not processed by
4100 elf32_arm_write_section. */
4101
4102static void
4103put_arm_insn (struct elf32_arm_link_hash_table *htab,
4104 bfd * output_bfd, bfd_vma val, void * ptr)
4105{
4106 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4107 bfd_putl32 (val, ptr);
4108 else
4109 bfd_putb32 (val, ptr);
4110}
4111
4112
4113/* Store a 16-bit Thumb insn into an output section not processed by
4114 elf32_arm_write_section. */
4115
4116static void
4117put_thumb_insn (struct elf32_arm_link_hash_table *htab,
4118 bfd * output_bfd, bfd_vma val, void * ptr)
4119{
4120 if (htab->byteswap_code != bfd_little_endian (output_bfd))
4121 bfd_putl16 (val, ptr);
4122 else
4123 bfd_putb16 (val, ptr);
4124}
4125
4126
9b485d32
NC		 4127/* Thumb code calling an ARM function. */
4128
252b5132 4129static int
57e8b36a
NC		 4130elf32_thumb_to_arm_stub (struct bfd_link_info * info,
4131 const char * name,
4132 bfd * input_bfd,
4133 bfd * output_bfd,
4134 asection * input_section,
4135 bfd_byte * hit_data,
4136 asection * sym_sec,
4137 bfd_vma offset,
4138 bfd_signed_vma addend,
f2a9dd69
DJ		 4139 bfd_vma val,
4140 char **error_message)
252b5132 4141{
bcbdc74c 4142 asection * s = 0;
dc810e39 4143 bfd_vma my_offset;
252b5132 4144 long int ret_offset;
bcbdc74c
NC		 4145 struct elf_link_hash_entry * myh;
4146 struct elf32_arm_link_hash_table * globals;
252b5132 4147
f2a9dd69 4148 myh = find_thumb_glue (info, name, error_message);
252b5132 4149 if (myh == NULL)
b34976b6 4150 return FALSE;
252b5132
RH		 4151
4152 globals = elf32_arm_hash_table (info);
4153
4154 BFD_ASSERT (globals != NULL);
4155 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4156
4157 my_offset = myh->root.u.def.value;
4158
4159 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4160 THUMB2ARM_GLUE_SECTION_NAME);
4161
4162 BFD_ASSERT (s != NULL);
4163 BFD_ASSERT (s->contents != NULL);
4164 BFD_ASSERT (s->output_section != NULL);
4165
4166 if ((my_offset & 0x01) == 0x01)
4167 {
4168 if (sym_sec != NULL
4169 && sym_sec->owner != NULL
4170 && !INTERWORK_FLAG (sym_sec->owner))
4171 {
8f615d07 4172 (*_bfd_error_handler)
d003868e
AM		 4173 (_("%B(%s): warning: interworking not enabled.\n"
4174 " first occurrence: %B: thumb call to arm"),
4175 sym_sec->owner, input_bfd, name);
252b5132 4176
b34976b6 4177 return FALSE;
252b5132
RH		 4178 }
4179
4180 --my_offset;
4181 myh->root.u.def.value = my_offset;
4182
52ab56c2
PB		 4183 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn,
4184 s->contents + my_offset);
252b5132 4185
52ab56c2
PB		 4186 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn,
4187 s->contents + my_offset + 2);
252b5132
RH		 4188
4189 ret_offset =
9b485d32
NC		 4190 /* Address of destination of the stub. */
4191 ((bfd_signed_vma) val)
252b5132 4192 - ((bfd_signed_vma)
57e8b36a
NC		 4193 /* Offset from the start of the current section
4194 to the start of the stubs. */
9b485d32
NC		 4195 (s->output_offset
4196 /* Offset of the start of this stub from the start of the stubs. */
4197 + my_offset
4198 /* Address of the start of the current section. */
4199 + s->output_section->vma)
4200 /* The branch instruction is 4 bytes into the stub. */
4201 + 4
4202 /* ARM branches work from the pc of the instruction + 8. */
4203 + 8);
252b5132 4204
52ab56c2
PB		 4205 put_arm_insn (globals, output_bfd,
4206 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF),
4207 s->contents + my_offset + 4);
252b5132
RH		 4208 }
4209
4210 BFD_ASSERT (my_offset <= globals->thumb_glue_size);
4211
427bfd90
NC		 4212 /* Now go back and fix up the original BL insn to point to here. */
4213 ret_offset =
4214 /* Address of where the stub is located. */
4215 (s->output_section->vma + s->output_offset + my_offset)
4216 /* Address of where the BL is located. */
57e8b36a
NC		 4217 - (input_section->output_section->vma + input_section->output_offset
4218 + offset)
427bfd90
NC		 4219 /* Addend in the relocation. */
4220 - addend
4221 /* Biassing for PC-relative addressing. */
4222 - 8;
252b5132 4223
12a0a0fd 4224 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma);
252b5132 4225
b34976b6 4226 return TRUE;
252b5132
RH		 4227}
4228
a4fd1a8e 4229/* Populate an Arm to Thumb stub. Returns the stub symbol. */
9b485d32 4230
a4fd1a8e
PB		 4231static struct elf_link_hash_entry *
4232elf32_arm_create_thumb_stub (struct bfd_link_info * info,
4233 const char * name,
4234 bfd * input_bfd,
4235 bfd * output_bfd,
4236 asection * sym_sec,
4237 bfd_vma val,
f2a9dd69
DJ		 4238 asection *s,
4239 char **error_message)
252b5132 4240{
dc810e39 4241 bfd_vma my_offset;
252b5132 4242 long int ret_offset;
bcbdc74c
NC		 4243 struct elf_link_hash_entry * myh;
4244 struct elf32_arm_link_hash_table * globals;
252b5132 4245
f2a9dd69 4246 myh = find_arm_glue (info, name, error_message);
252b5132 4247 if (myh == NULL)
a4fd1a8e 4248 return NULL;
252b5132
RH		 4249
4250 globals = elf32_arm_hash_table (info);
4251
4252 BFD_ASSERT (globals != NULL);
4253 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4254
4255 my_offset = myh->root.u.def.value;
252b5132
RH		 4256
4257 if ((my_offset & 0x01) == 0x01)
4258 {
4259 if (sym_sec != NULL
4260 && sym_sec->owner != NULL
4261 && !INTERWORK_FLAG (sym_sec->owner))
4262 {
8f615d07 4263 (*_bfd_error_handler)
d003868e
AM		 4264 (_("%B(%s): warning: interworking not enabled.\n"
4265 " first occurrence: %B: arm call to thumb"),
4266 sym_sec->owner, input_bfd, name);
252b5132 4267 }
9b485d32 4268
252b5132
RH		 4269 --my_offset;
4270 myh->root.u.def.value = my_offset;
4271
27e55c4d
PB		 4272 if (info->shared || globals->root.is_relocatable_executable
4273 || globals->pic_veneer)
8f6277f5
PB		 4274 {
4275 /* For relocatable objects we can't use absolute addresses,
4276 so construct the address from a relative offset. */
4277 /* TODO: If the offset is small it's probably worth
4278 constructing the address with adds. */
52ab56c2
PB		 4279 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn,
4280 s->contents + my_offset);
4281 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn,
4282 s->contents + my_offset + 4);
4283 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn,
4284 s->contents + my_offset + 8);
8f6277f5
PB		 4285 /* Adjust the offset by 4 for the position of the add,
4286 and 8 for the pipeline offset. */
4287 ret_offset = (val - (s->output_offset
4288 + s->output_section->vma
4289 + my_offset + 12))
4290 | 1;
4291 bfd_put_32 (output_bfd, ret_offset,
4292 s->contents + my_offset + 12);
4293 }
26079076
PB		 4294 else if (globals->use_blx)
4295 {
4296 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn,
4297 s->contents + my_offset);
4298
4299 /* It's a thumb address. Add the low order bit. */
4300 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn,
4301 s->contents + my_offset + 4);
4302 }
8f6277f5
PB		 4303 else
4304 {
52ab56c2
PB		 4305 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn,
4306 s->contents + my_offset);
252b5132 4307
52ab56c2
PB		 4308 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn,
4309 s->contents + my_offset + 4);
252b5132 4310
8f6277f5
PB		 4311 /* It's a thumb address. Add the low order bit. */
4312 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn,
4313 s->contents + my_offset + 8);
4314 }
252b5132
RH		 4315 }
4316
4317 BFD_ASSERT (my_offset <= globals->arm_glue_size);
4318
a4fd1a8e
PB		 4319 return myh;
4320}
4321
4322/* Arm code calling a Thumb function. */
4323
4324static int
4325elf32_arm_to_thumb_stub (struct bfd_link_info * info,
4326 const char * name,
4327 bfd * input_bfd,
4328 bfd * output_bfd,
4329 asection * input_section,
4330 bfd_byte * hit_data,
4331 asection * sym_sec,
4332 bfd_vma offset,
4333 bfd_signed_vma addend,
f2a9dd69
DJ		 4334 bfd_vma val,
4335 char **error_message)
a4fd1a8e
PB		 4336{
4337 unsigned long int tmp;
4338 bfd_vma my_offset;
4339 asection * s;
4340 long int ret_offset;
4341 struct elf_link_hash_entry * myh;
4342 struct elf32_arm_link_hash_table * globals;
4343
4344 globals = elf32_arm_hash_table (info);
4345
4346 BFD_ASSERT (globals != NULL);
4347 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4348
4349 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4350 ARM2THUMB_GLUE_SECTION_NAME);
4351 BFD_ASSERT (s != NULL);
4352 BFD_ASSERT (s->contents != NULL);
4353 BFD_ASSERT (s->output_section != NULL);
4354
4355 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd,
f2a9dd69 4356 sym_sec, val, s, error_message);
a4fd1a8e
PB		 4357 if (!myh)
4358 return FALSE;
4359
4360 my_offset = myh->root.u.def.value;
252b5132
RH		 4361 tmp = bfd_get_32 (input_bfd, hit_data);
4362 tmp = tmp & 0xFF000000;
4363
9b485d32 4364 /* Somehow these are both 4 too far, so subtract 8. */
dc810e39
AM		 4365 ret_offset = (s->output_offset
4366 + my_offset
4367 + s->output_section->vma
4368 - (input_section->output_offset
4369 + input_section->output_section->vma
4370 + offset + addend)
4371 - 8);
9a5aca8c 4372
252b5132
RH		 4373 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF);
4374
dc810e39 4375 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma);
252b5132 4376
b34976b6 4377 return TRUE;
252b5132
RH		 4378}
4379
a4fd1a8e
PB		 4380/* Populate Arm stub for an exported Thumb function. */
4381
4382static bfd_boolean
4383elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf)
4384{
4385 struct bfd_link_info * info = (struct bfd_link_info *) inf;
4386 asection * s;
4387 struct elf_link_hash_entry * myh;
4388 struct elf32_arm_link_hash_entry *eh;
4389 struct elf32_arm_link_hash_table * globals;
4390 asection *sec;
4391 bfd_vma val;
f2a9dd69 4392 char *error_message;
a4fd1a8e
PB		 4393
4394 eh = elf32_arm_hash_entry(h);
4395 /* Allocate stubs for exported Thumb functions on v4t. */
4396 if (eh->export_glue == NULL)
4397 return TRUE;
4398
4399 globals = elf32_arm_hash_table (info);
4400
4401 BFD_ASSERT (globals != NULL);
4402 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4403
4404 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4405 ARM2THUMB_GLUE_SECTION_NAME);
4406 BFD_ASSERT (s != NULL);
4407 BFD_ASSERT (s->contents != NULL);
4408 BFD_ASSERT (s->output_section != NULL);
4409
4410 sec = eh->export_glue->root.u.def.section;
0eaedd0e
PB		 4411
4412 BFD_ASSERT (sec->output_section != NULL);
4413
a4fd1a8e
PB		 4414 val = eh->export_glue->root.u.def.value + sec->output_offset
4415 + sec->output_section->vma;
4416 myh = elf32_arm_create_thumb_stub (info, h->root.root.string,
4417 h->root.u.def.section->owner,
f2a9dd69
DJ		 4418 globals->obfd, sec, val, s,
4419 &error_message);
a4fd1a8e
PB		 4420 BFD_ASSERT (myh);
4421 return TRUE;
4422}
4423
845b51d6
PB		 4424/* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */
4425
4426static bfd_vma
4427elf32_arm_bx_glue (struct bfd_link_info * info, int reg)
4428{
4429 bfd_byte *p;
4430 bfd_vma glue_addr;
4431 asection *s;
4432 struct elf32_arm_link_hash_table *globals;
4433
4434 globals = elf32_arm_hash_table (info);
4435
4436 BFD_ASSERT (globals != NULL);
4437 BFD_ASSERT (globals->bfd_of_glue_owner != NULL);
4438
4439 s = bfd_get_section_by_name (globals->bfd_of_glue_owner,
4440 ARM_BX_GLUE_SECTION_NAME);
4441 BFD_ASSERT (s != NULL);
4442 BFD_ASSERT (s->contents != NULL);
4443 BFD_ASSERT (s->output_section != NULL);
4444
4445 BFD_ASSERT (globals->bx_glue_offset[reg] & 2);
4446
4447 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3;
4448
4449 if ((globals->bx_glue_offset[reg] & 1) == 0)
4450 {
4451 p = s->contents + glue_addr;
4452 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p);
4453 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4);
4454 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8);
4455 globals->bx_glue_offset[reg] |= 1;
4456 }
4457
4458 return glue_addr + s->output_section->vma + s->output_offset;
4459}
4460
a4fd1a8e
PB		 4461/* Generate Arm stubs for exported Thumb symbols. */
4462static void
4463elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED,
4464 struct bfd_link_info *link_info)
4465{
4466 struct elf32_arm_link_hash_table * globals;
4467
4468 if (!link_info)
4469 return;
4470
4471 globals = elf32_arm_hash_table (link_info);
84c08195
PB		 4472 /* If blx is available then exported Thumb symbols are OK and there is
4473 nothing to do. */
a4fd1a8e
PB		 4474 if (globals->use_blx)
4475 return;
4476
4477 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub,
4478 link_info);
4479}
4480
eb043451
PB		 4481/* Some relocations map to different relocations depending on the
4482 target. Return the real relocation. */
4483static int
4484arm_real_reloc_type (struct elf32_arm_link_hash_table * globals,
4485 int r_type)
4486{
4487 switch (r_type)
4488 {
4489 case R_ARM_TARGET1:
4490 if (globals->target1_is_rel)
4491 return R_ARM_REL32;
4492 else
4493 return R_ARM_ABS32;
4494
4495 case R_ARM_TARGET2:
4496 return globals->target2_reloc;
4497
4498 default:
4499 return r_type;
4500 }
4501}
eb043451 4502
ba93b8ac
DJ		 4503/* Return the base VMA address which should be subtracted from real addresses
4504 when resolving @dtpoff relocation.
4505 This is PT_TLS segment p_vaddr. */
4506
4507static bfd_vma
4508dtpoff_base (struct bfd_link_info *info)
4509{
4510 /* If tls_sec is NULL, we should have signalled an error already. */
4511 if (elf_hash_table (info)->tls_sec == NULL)
4512 return 0;
4513 return elf_hash_table (info)->tls_sec->vma;
4514}
4515
4516/* Return the relocation value for @tpoff relocation
4517 if STT_TLS virtual address is ADDRESS. */
4518
4519static bfd_vma
4520tpoff (struct bfd_link_info *info, bfd_vma address)
4521{
4522 struct elf_link_hash_table *htab = elf_hash_table (info);
4523 bfd_vma base;
4524
4525 /* If tls_sec is NULL, we should have signalled an error already. */
4526 if (htab->tls_sec == NULL)
4527 return 0;
4528 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power);
4529 return address - htab->tls_sec->vma + base;
4530}
4531
00a97672
RS		 4532/* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA.
4533 VALUE is the relocation value. */
4534
4535static bfd_reloc_status_type
4536elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value)
4537{
4538 if (value > 0xfff)
4539 return bfd_reloc_overflow;
4540
4541 value |= bfd_get_32 (abfd, data) & 0xfffff000;
4542 bfd_put_32 (abfd, value, data);
4543 return bfd_reloc_ok;
4544}
4545
4962c51a
MS		 4546/* For a given value of n, calculate the value of G_n as required to
4547 deal with group relocations. We return it in the form of an
4548 encoded constant-and-rotation, together with the final residual. If n is
4549 specified as less than zero, then final_residual is filled with the
4550 input value and no further action is performed. */
4551
4552static bfd_vma
4553calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual)
4554{
4555 int current_n;
4556 bfd_vma g_n;
4557 bfd_vma encoded_g_n = 0;
4558 bfd_vma residual = value; /* Also known as Y_n. */
4559
4560 for (current_n = 0; current_n <= n; current_n++)
4561 {
4562 int shift;
4563
4564 /* Calculate which part of the value to mask. */
4565 if (residual == 0)
4566 shift = 0;
4567 else
4568 {
4569 int msb;
4570
4571 /* Determine the most significant bit in the residual and
4572 align the resulting value to a 2-bit boundary. */
4573 for (msb = 30; msb >= 0; msb -= 2)
4574 if (residual & (3 << msb))
4575 break;
4576
4577 /* The desired shift is now (msb - 6), or zero, whichever
4578 is the greater. */
4579 shift = msb - 6;
4580 if (shift < 0)
4581 shift = 0;
4582 }
4583
4584 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */
4585 g_n = residual & (0xff << shift);
4586 encoded_g_n = (g_n >> shift)
4587 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8);
4588
4589 /* Calculate the residual for the next time around. */
4590 residual &= ~g_n;
4591 }
4592
4593 *final_residual = residual;
4594
4595 return encoded_g_n;
4596}
4597
4598/* Given an ARM instruction, determine whether it is an ADD or a SUB.
4599 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */
4600static int
4601identify_add_or_sub(bfd_vma insn)
4602{
4603 int opcode = insn & 0x1e00000;
4604
4605 if (opcode == 1 << 23) /* ADD */
4606 return 1;
4607
4608 if (opcode == 1 << 22) /* SUB */
4609 return -1;
4610
4611 return 0;
4612}
4613
e95de063
MS		 4614/* Determine if we're dealing with a Thumb-2 object. */
4615
4616static int using_thumb2 (struct elf32_arm_link_hash_table *globals)
4617{
104d59d1
JM		 4618 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC,
4619 Tag_CPU_arch);
e95de063
MS		 4620 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7;
4621}
4622
252b5132 4623/* Perform a relocation as part of a final link. */
9b485d32 4624
252b5132 4625static bfd_reloc_status_type
57e8b36a
NC		 4626elf32_arm_final_link_relocate (reloc_howto_type * howto,
4627 bfd * input_bfd,
4628 bfd * output_bfd,
4629 asection * input_section,
4630 bfd_byte * contents,
4631 Elf_Internal_Rela * rel,
4632 bfd_vma value,
4633 struct bfd_link_info * info,
4634 asection * sym_sec,
4635 const char * sym_name,
4636 int sym_flags,
0945cdfd 4637 struct elf_link_hash_entry * h,
f2a9dd69
DJ		 4638 bfd_boolean * unresolved_reloc_p,
4639 char **error_message)
252b5132
RH		 4640{
4641 unsigned long r_type = howto->type;
4642 unsigned long r_symndx;
4643 bfd_byte * hit_data = contents + rel->r_offset;
4644 bfd * dynobj = NULL;
4645 Elf_Internal_Shdr * symtab_hdr;
4646 struct elf_link_hash_entry ** sym_hashes;
4647 bfd_vma * local_got_offsets;
4648 asection * sgot = NULL;
4649 asection * splt = NULL;
4650 asection * sreloc = NULL;
252b5132 4651 bfd_vma addend;
ba96a88f
NC		 4652 bfd_signed_vma signed_addend;
4653 struct elf32_arm_link_hash_table * globals;
f21f3fe0 4654
9c504268
PB		 4655 globals = elf32_arm_hash_table (info);
4656
0ffa91dd
NC		 4657 BFD_ASSERT (is_arm_elf (input_bfd));
4658
4659 /* Some relocation types map to different relocations depending on the
9c504268 4660 target. We pick the right one here. */
eb043451
PB		 4661 r_type = arm_real_reloc_type (globals, r_type);
4662 if (r_type != howto->type)
4663 howto = elf32_arm_howto_from_type (r_type);
9c504268 4664
cac15327
NC		 4665 /* If the start address has been set, then set the EF_ARM_HASENTRY
4666 flag. Setting this more than once is redundant, but the cost is
4667 not too high, and it keeps the code simple.
99e4ae17 4668
cac15327
NC		 4669 The test is done here, rather than somewhere else, because the
4670 start address is only set just before the final link commences.
4671
4672 Note - if the user deliberately sets a start address of 0, the
4673 flag will not be set. */
4674 if (bfd_get_start_address (output_bfd) != 0)
4675 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY;
99e4ae17 4676
252b5132
RH		 4677 dynobj = elf_hash_table (info)->dynobj;
4678 if (dynobj)
4679 {
4680 sgot = bfd_get_section_by_name (dynobj, ".got");
4681 splt = bfd_get_section_by_name (dynobj, ".plt");
4682 }
0ffa91dd 4683 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 4684 sym_hashes = elf_sym_hashes (input_bfd);
4685 local_got_offsets = elf_local_got_offsets (input_bfd);
4686 r_symndx = ELF32_R_SYM (rel->r_info);
4687
4e7fd91e 4688 if (globals->use_rel)
ba96a88f 4689 {
4e7fd91e
PB		 4690 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask;
4691
4692 if (addend & ((howto->src_mask + 1) >> 1))
4693 {
4694 signed_addend = -1;
4695 signed_addend &= ~ howto->src_mask;
4696 signed_addend |= addend;
4697 }
4698 else
4699 signed_addend = addend;
ba96a88f
NC		 4700 }
4701 else
4e7fd91e 4702 addend = signed_addend = rel->r_addend;
f21f3fe0 4703
252b5132
RH		 4704 switch (r_type)
4705 {
4706 case R_ARM_NONE:
28a094c2
DJ		 4707 /* We don't need to find a value for this symbol. It's just a
4708 marker. */
4709 *unresolved_reloc_p = FALSE;
252b5132
RH		 4710 return bfd_reloc_ok;
4711
00a97672
RS		 4712 case R_ARM_ABS12:
4713 if (!globals->vxworks_p)
4714 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4715
252b5132
RH		 4716 case R_ARM_PC24:
4717 case R_ARM_ABS32:
bb224fc3 4718 case R_ARM_ABS32_NOI:
252b5132 4719 case R_ARM_REL32:
bb224fc3 4720 case R_ARM_REL32_NOI:
5b5bb741
PB		 4721 case R_ARM_CALL:
4722 case R_ARM_JUMP24:
dfc5f959 4723 case R_ARM_XPC25:
eb043451 4724 case R_ARM_PREL31:
7359ea65 4725 case R_ARM_PLT32:
7359ea65
DJ		 4726 /* Handle relocations which should use the PLT entry. ABS32/REL32
4727 will use the symbol's value, which may point to a PLT entry, but we
4728 don't need to handle that here. If we created a PLT entry, all
4729 branches in this object should go to it. */
bb224fc3
MS		 4730 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32
4731 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI)
7359ea65 4732 && h != NULL
c84cd8ee 4733 && splt != NULL
7359ea65
DJ		 4734 && h->plt.offset != (bfd_vma) -1)
4735 {
c84cd8ee
DJ		 4736 /* If we've created a .plt section, and assigned a PLT entry to
4737 this function, it should not be known to bind locally. If
4738 it were, we would have cleared the PLT entry. */
7359ea65
DJ		 4739 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h));
4740
4741 value = (splt->output_section->vma
4742 + splt->output_offset
4743 + h->plt.offset);
0945cdfd 4744 *unresolved_reloc_p = FALSE;
7359ea65
DJ		 4745 return _bfd_final_link_relocate (howto, input_bfd, input_section,
4746 contents, rel->r_offset, value,
00a97672 4747 rel->r_addend);
7359ea65
DJ		 4748 }
4749
67687978
PB		 4750 /* When generating a shared object or relocatable executable, these
4751 relocations are copied into the output file to be resolved at
4752 run time. */
4753 if ((info->shared || globals->root.is_relocatable_executable)
7359ea65 4754 && (input_section->flags & SEC_ALLOC)
3348747a
NS		 4755 && !(elf32_arm_hash_table (info)->vxworks_p
4756 && strcmp (input_section->output_section->name,
4757 ".tls_vars") == 0)
bb224fc3 4758 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI)
ee06dc07 4759 || !SYMBOL_CALLS_LOCAL (info, h))
7359ea65
DJ		 4760 && (h == NULL
4761 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
4762 || h->root.type != bfd_link_hash_undefweak)
4763 && r_type != R_ARM_PC24
5b5bb741
PB		 4764 && r_type != R_ARM_CALL
4765 && r_type != R_ARM_JUMP24
ee06dc07 4766 && r_type != R_ARM_PREL31
7359ea65 4767 && r_type != R_ARM_PLT32)
252b5132 4768 {
947216bf
AM		 4769 Elf_Internal_Rela outrel;
4770 bfd_byte *loc;
b34976b6 4771 bfd_boolean skip, relocate;
f21f3fe0 4772
0945cdfd
DJ		 4773 *unresolved_reloc_p = FALSE;
4774
252b5132
RH		 4775 if (sreloc == NULL)
4776 {
4777 const char * name;
f21f3fe0 4778
252b5132
RH		 4779 name = (bfd_elf_string_from_elf_section
4780 (input_bfd,
4781 elf_elfheader (input_bfd)->e_shstrndx,
4782 elf_section_data (input_section)->rel_hdr.sh_name));
4783 if (name == NULL)
4784 return bfd_reloc_notsupported;
f21f3fe0 4785
00a97672 4786 BFD_ASSERT (reloc_section_p (globals, name, input_section));
f21f3fe0 4787
252b5132
RH		 4788 sreloc = bfd_get_section_by_name (dynobj, name);
4789 BFD_ASSERT (sreloc != NULL);
4790 }
f21f3fe0 4791
b34976b6
AM		 4792 skip = FALSE;
4793 relocate = FALSE;
f21f3fe0 4794
00a97672 4795 outrel.r_addend = addend;
c629eae0
JJ		 4796 outrel.r_offset =
4797 _bfd_elf_section_offset (output_bfd, info, input_section,
4798 rel->r_offset);
4799 if (outrel.r_offset == (bfd_vma) -1)
b34976b6 4800 skip = TRUE;
0bb2d96a 4801 else if (outrel.r_offset == (bfd_vma) -2)
b34976b6 4802 skip = TRUE, relocate = TRUE;
252b5132
RH		 4803 outrel.r_offset += (input_section->output_section->vma
4804 + input_section->output_offset);
f21f3fe0 4805
252b5132 4806 if (skip)
0bb2d96a 4807 memset (&outrel, 0, sizeof outrel);
5e681ec4
PB		 4808 else if (h != NULL
4809 && h->dynindx != -1
7359ea65 4810 && (!info->shared
5e681ec4 4811 || !info->symbolic
f5385ebf 4812 || !h->def_regular))
5e681ec4 4813 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
252b5132
RH		 4814 else
4815 {
a16385dc
MM		 4816 int symbol;
4817
5e681ec4 4818 /* This symbol is local, or marked to become local. */
b7693d02
DJ		 4819 if (sym_flags == STT_ARM_TFUNC)
4820 value |= 1;
a16385dc 4821 if (globals->symbian_p)
6366ff1e 4822 {
74541ad4
AM		 4823 asection *osec;
4824
6366ff1e
MM		 4825 /* On Symbian OS, the data segment and text segement
4826 can be relocated independently. Therefore, we
4827 must indicate the segment to which this
4828 relocation is relative. The BPABI allows us to
4829 use any symbol in the right segment; we just use
4830 the section symbol as it is convenient. (We
4831 cannot use the symbol given by "h" directly as it
74541ad4
AM		 4832 will not appear in the dynamic symbol table.)
4833
4834 Note that the dynamic linker ignores the section
4835 symbol value, so we don't subtract osec->vma
4836 from the emitted reloc addend. */
10dbd1f3 4837 if (sym_sec)
74541ad4 4838 osec = sym_sec->output_section;
10dbd1f3 4839 else
74541ad4
AM		 4840 osec = input_section->output_section;
4841 symbol = elf_section_data (osec)->dynindx;
4842 if (symbol == 0)
4843 {
4844 struct elf_link_hash_table *htab = elf_hash_table (info);
4845
4846 if ((osec->flags & SEC_READONLY) == 0
4847 && htab->data_index_section != NULL)
4848 osec = htab->data_index_section;
4849 else
4850 osec = htab->text_index_section;
4851 symbol = elf_section_data (osec)->dynindx;
4852 }
6366ff1e
MM		 4853 BFD_ASSERT (symbol != 0);
4854 }
a16385dc
MM		 4855 else
4856 /* On SVR4-ish systems, the dynamic loader cannot
4857 relocate the text and data segments independently,
4858 so the symbol does not matter. */
4859 symbol = 0;
4860 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE);
00a97672
RS		 4861 if (globals->use_rel)
4862 relocate = TRUE;
4863 else
4864 outrel.r_addend += value;
252b5132 4865 }
f21f3fe0 4866
947216bf 4867 loc = sreloc->contents;
00a97672
RS		 4868 loc += sreloc->reloc_count++ * RELOC_SIZE (globals);
4869 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
9a5aca8c 4870
f21f3fe0 4871 /* If this reloc is against an external symbol, we do not want to
252b5132 4872 fiddle with the addend. Otherwise, we need to include the symbol
9b485d32 4873 value so that it becomes an addend for the dynamic reloc. */
252b5132
RH		 4874 if (! relocate)
4875 return bfd_reloc_ok;
9a5aca8c 4876
f21f3fe0 4877 return _bfd_final_link_relocate (howto, input_bfd, input_section,
252b5132
RH		 4878 contents, rel->r_offset, value,
4879 (bfd_vma) 0);
4880 }
4881 else switch (r_type)
4882 {
00a97672
RS		 4883 case R_ARM_ABS12:
4884 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend);
4885
dfc5f959 4886 case R_ARM_XPC25: /* Arm BLX instruction. */
5b5bb741
PB		 4887 case R_ARM_CALL:
4888 case R_ARM_JUMP24:
dfc5f959 4889 case R_ARM_PC24: /* Arm B/BL instruction */
7359ea65 4890 case R_ARM_PLT32:
dfc5f959 4891 if (r_type == R_ARM_XPC25)
252b5132 4892 {
dfc5f959
NC		 4893 /* Check for Arm calling Arm function. */
4894 /* FIXME: Should we translate the instruction into a BL
4895 instruction instead ? */
4896 if (sym_flags != STT_ARM_TFUNC)
d003868e
AM		 4897 (*_bfd_error_handler)
4898 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."),
4899 input_bfd,
4900 h ? h->root.root.string : "(local)");
dfc5f959 4901 }
39b41c9c 4902 else if (r_type != R_ARM_CALL || !globals->use_blx)
dfc5f959
NC		 4903 {
4904 /* Check for Arm calling Thumb function. */
4905 if (sym_flags == STT_ARM_TFUNC)
4906 {
f2a9dd69
DJ		 4907 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd,
4908 output_bfd, input_section,
4909 hit_data, sym_sec, rel->r_offset,
4910 signed_addend, value,
4911 error_message))
4912 return bfd_reloc_ok;
4913 else
4914 return bfd_reloc_dangerous;
dfc5f959 4915 }
252b5132 4916 }
ba96a88f 4917
dea514f5
PB		 4918 /* The ARM ELF ABI says that this reloc is computed as: S - P + A
4919 where:
4920 S is the address of the symbol in the relocation.
4921 P is address of the instruction being relocated.
4922 A is the addend (extracted from the instruction) in bytes.
4923
4924 S is held in 'value'.
4925 P is the base address of the section containing the
4926 instruction plus the offset of the reloc into that
4927 section, ie:
4928 (input_section->output_section->vma +
4929 input_section->output_offset +
4930 rel->r_offset).
4931 A is the addend, converted into bytes, ie:
4932 (signed_addend * 4)
4933
4934 Note: None of these operations have knowledge of the pipeline
4935 size of the processor, thus it is up to the assembler to
4936 encode this information into the addend. */
4937 value -= (input_section->output_section->vma
4938 + input_section->output_offset);
4939 value -= rel->r_offset;
4e7fd91e
PB		 4940 if (globals->use_rel)
4941 value += (signed_addend << howto->size);
4942 else
4943 /* RELA addends do not have to be adjusted by howto->size. */
4944 value += signed_addend;
23080146 4945
dcb5e6e6
NC		 4946 signed_addend = value;
4947 signed_addend >>= howto->rightshift;
9a5aca8c 4948
5ab79981
PB		 4949 /* A branch to an undefined weak symbol is turned into a jump to
4950 the next instruction. */
4951 if (h && h->root.type == bfd_link_hash_undefweak)
4952 {
4953 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000)
4954 | 0x0affffff;
4955 }
4956 else
59f2c4e7 4957 {
9b485d32 4958 /* Perform a signed range check. */
dcb5e6e6 4959 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1))
59f2c4e7
NC		 4960 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1)))
4961 return bfd_reloc_overflow;
9a5aca8c 4962
5ab79981 4963 addend = (value & 2);
39b41c9c 4964
5ab79981
PB		 4965 value = (signed_addend & howto->dst_mask)
4966 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask));
39b41c9c 4967
5ab79981 4968 /* Set the H bit in the BLX instruction. */
39b41c9c 4969 if (sym_flags == STT_ARM_TFUNC)
39b41c9c 4970 {
5ab79981
PB		 4971 if (addend)
4972 value |= (1 << 24);
4973 else
4974 value &= ~(bfd_vma)(1 << 24);
4975 }
4976 if (r_type == R_ARM_CALL)
4977 {
4978 /* Select the correct instruction (BL or BLX). */
4979 if (sym_flags == STT_ARM_TFUNC)
4980 value |= (1 << 28);
4981 else
4982 {
4983 value &= ~(bfd_vma)(1 << 28);
4984 value |= (1 << 24);
4985 }
39b41c9c
PB		 4986 }
4987 }
252b5132 4988 break;
f21f3fe0 4989
252b5132
RH		 4990 case R_ARM_ABS32:
4991 value += addend;
4992 if (sym_flags == STT_ARM_TFUNC)
4993 value |= 1;
4994 break;
f21f3fe0 4995
bb224fc3
MS		 4996 case R_ARM_ABS32_NOI:
4997 value += addend;
4998 break;
4999
252b5132 5000 case R_ARM_REL32:
a8bc6c78
PB		 5001 value += addend;
5002 if (sym_flags == STT_ARM_TFUNC)
5003 value |= 1;
252b5132 5004 value -= (input_section->output_section->vma
62efb346 5005 + input_section->output_offset + rel->r_offset);
252b5132 5006 break;
eb043451 5007
bb224fc3
MS		 5008 case R_ARM_REL32_NOI:
5009 value += addend;
5010 value -= (input_section->output_section->vma
5011 + input_section->output_offset + rel->r_offset);
5012 break;
5013
eb043451
PB		 5014 case R_ARM_PREL31:
5015 value -= (input_section->output_section->vma
5016 + input_section->output_offset + rel->r_offset);
5017 value += signed_addend;
5018 if (! h || h->root.type != bfd_link_hash_undefweak)
5019 {
5020 /* Check for overflow */
5021 if ((value ^ (value >> 1)) & (1 << 30))
5022 return bfd_reloc_overflow;
5023 }
5024 value &= 0x7fffffff;
5025 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000);
5026 if (sym_flags == STT_ARM_TFUNC)
5027 value |= 1;
5028 break;
252b5132 5029 }
f21f3fe0 5030
252b5132
RH		 5031 bfd_put_32 (input_bfd, value, hit_data);
5032 return bfd_reloc_ok;
5033
5034 case R_ARM_ABS8:
5035 value += addend;
5036 if ((long) value > 0x7f || (long) value < -0x80)
5037 return bfd_reloc_overflow;
5038
5039 bfd_put_8 (input_bfd, value, hit_data);
5040 return bfd_reloc_ok;
5041
5042 case R_ARM_ABS16:
5043 value += addend;
5044
5045 if ((long) value > 0x7fff || (long) value < -0x8000)
5046 return bfd_reloc_overflow;
5047
5048 bfd_put_16 (input_bfd, value, hit_data);
5049 return bfd_reloc_ok;
5050
252b5132 5051 case R_ARM_THM_ABS5:
9b485d32 5052 /* Support ldr and str instructions for the thumb. */
4e7fd91e
PB		 5053 if (globals->use_rel)
5054 {
5055 /* Need to refetch addend. */
5056 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5057 /* ??? Need to determine shift amount from operand size. */
5058 addend >>= howto->rightshift;
5059 }
252b5132
RH		 5060 value += addend;
5061
5062 /* ??? Isn't value unsigned? */
5063 if ((long) value > 0x1f || (long) value < -0x10)
5064 return bfd_reloc_overflow;
5065
5066 /* ??? Value needs to be properly shifted into place first. */
5067 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f;
5068 bfd_put_16 (input_bfd, value, hit_data);
5069 return bfd_reloc_ok;
5070
2cab6cc3
MS		 5071 case R_ARM_THM_ALU_PREL_11_0:
5072 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */
5073 {
5074 bfd_vma insn;
5075 bfd_signed_vma relocation;
5076
5077 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5078 | bfd_get_16 (input_bfd, hit_data + 2);
5079
5080 if (globals->use_rel)
5081 {
5082 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4)
5083 | ((insn & (1 << 26)) >> 15);
5084 if (insn & 0xf00000)
5085 signed_addend = -signed_addend;
5086 }
5087
5088 relocation = value + signed_addend;
5089 relocation -= (input_section->output_section->vma
5090 + input_section->output_offset
5091 + rel->r_offset);
5092
5093 value = abs (relocation);
5094
5095 if (value >= 0x1000)
5096 return bfd_reloc_overflow;
5097
5098 insn = (insn & 0xfb0f8f00) | (value & 0xff)
5099 | ((value & 0x700) << 4)
5100 | ((value & 0x800) << 15);
5101 if (relocation < 0)
5102 insn |= 0xa00000;
5103
5104 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5105 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5106
5107 return bfd_reloc_ok;
5108 }
5109
5110 case R_ARM_THM_PC12:
5111 /* Corresponds to: ldr.w reg, [pc, #offset]. */
5112 {
5113 bfd_vma insn;
5114 bfd_signed_vma relocation;
5115
5116 insn = (bfd_get_16 (input_bfd, hit_data) << 16)
5117 | bfd_get_16 (input_bfd, hit_data + 2);
5118
5119 if (globals->use_rel)
5120 {
5121 signed_addend = insn & 0xfff;
5122 if (!(insn & (1 << 23)))
5123 signed_addend = -signed_addend;
5124 }
5125
5126 relocation = value + signed_addend;
5127 relocation -= (input_section->output_section->vma
5128 + input_section->output_offset
5129 + rel->r_offset);
5130
5131 value = abs (relocation);
5132
5133 if (value >= 0x1000)
5134 return bfd_reloc_overflow;
5135
5136 insn = (insn & 0xff7ff000) | value;
5137 if (relocation >= 0)
5138 insn |= (1 << 23);
5139
5140 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5141 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5142
5143 return bfd_reloc_ok;
5144 }
5145
dfc5f959 5146 case R_ARM_THM_XPC22:
c19d1205 5147 case R_ARM_THM_CALL:
bd97cb95 5148 case R_ARM_THM_JUMP24:
dfc5f959 5149 /* Thumb BL (branch long instruction). */
252b5132 5150 {
b34976b6 5151 bfd_vma relocation;
e95de063 5152 bfd_vma reloc_sign;
b34976b6
AM		 5153 bfd_boolean overflow = FALSE;
5154 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5155 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
e95de063
MS		 5156 bfd_signed_vma reloc_signed_max;
5157 bfd_signed_vma reloc_signed_min;
b34976b6 5158 bfd_vma check;
252b5132 5159 bfd_signed_vma signed_check;
e95de063
MS		 5160 int bitsize;
5161 int thumb2 = using_thumb2 (globals);
252b5132 5162
5ab79981
PB		 5163 /* A branch to an undefined weak symbol is turned into a jump to
5164 the next instruction. */
5165 if (h && h->root.type == bfd_link_hash_undefweak)
5166 {
5167 bfd_put_16 (input_bfd, 0xe000, hit_data);
5168 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2);
5169 return bfd_reloc_ok;
5170 }
5171
e95de063
MS		 5172 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible
5173 with Thumb-1) involving the J1 and J2 bits. */
4e7fd91e
PB		 5174 if (globals->use_rel)
5175 {
e95de063
MS		 5176 bfd_vma s = (upper_insn & (1 << 10)) >> 10;
5177 bfd_vma upper = upper_insn & 0x3ff;
5178 bfd_vma lower = lower_insn & 0x7ff;
5179 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13;
5180 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11;
5181 bfd_vma i1 = j1 ^ s ? 0 : 1;
5182 bfd_vma i2 = j2 ^ s ? 0 : 1;
5183
5184 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1);
5185 /* Sign extend. */
5186 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24);
5187
4e7fd91e
PB		 5188 signed_addend = addend;
5189 }
cb1afa5c 5190
dfc5f959
NC		 5191 if (r_type == R_ARM_THM_XPC22)
5192 {
5193 /* Check for Thumb to Thumb call. */
5194 /* FIXME: Should we translate the instruction into a BL
5195 instruction instead ? */
5196 if (sym_flags == STT_ARM_TFUNC)
d003868e
AM		 5197 (*_bfd_error_handler)
5198 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."),
5199 input_bfd,
5200 h ? h->root.root.string : "(local)");
dfc5f959
NC		 5201 }
5202 else
252b5132 5203 {
dfc5f959
NC		 5204 /* If it is not a call to Thumb, assume call to Arm.
5205 If it is a call relative to a section name, then it is not a
b7693d02
DJ		 5206 function call at all, but rather a long jump. Calls through
5207 the PLT do not require stubs. */
5208 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION
5209 && (h == NULL || splt == NULL
5210 || h->plt.offset == (bfd_vma) -1))
dfc5f959 5211 {
bd97cb95 5212 if (globals->use_blx && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5213 {
5214 /* Convert BL to BLX. */
5215 lower_insn = (lower_insn & ~0x1000) | 0x0800;
5216 }
5217 else if (elf32_thumb_to_arm_stub
dfc5f959 5218 (info, sym_name, input_bfd, output_bfd, input_section,
f2a9dd69
DJ		 5219 hit_data, sym_sec, rel->r_offset, signed_addend, value,
5220 error_message))
dfc5f959
NC		 5221 return bfd_reloc_ok;
5222 else
5223 return bfd_reloc_dangerous;
5224 }
bd97cb95
DJ		 5225 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx
5226 && r_type == R_ARM_THM_CALL)
39b41c9c
PB		 5227 {
5228 /* Make sure this is a BL. */
5229 lower_insn |= 0x1800;
5230 }
252b5132 5231 }
f21f3fe0 5232
b7693d02
DJ		 5233 /* Handle calls via the PLT. */
5234 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5235 {
5236 value = (splt->output_section->vma
5237 + splt->output_offset
5238 + h->plt.offset);
bd97cb95 5239 if (globals->use_blx && r_type == R_ARM_THM_CALL)
33bfe774
JB		 5240 {
5241 /* If the Thumb BLX instruction is available, convert the
5242 BL to a BLX instruction to call the ARM-mode PLT entry. */
39b41c9c 5243 lower_insn = (lower_insn & ~0x1000) | 0x0800;
33bfe774
JB		 5244 }
5245 else
5246 /* Target the Thumb stub before the ARM PLT entry. */
5247 value -= PLT_THUMB_STUB_SIZE;
0945cdfd 5248 *unresolved_reloc_p = FALSE;
b7693d02
DJ		 5249 }
5250
ba96a88f 5251 relocation = value + signed_addend;
f21f3fe0 5252
252b5132 5253 relocation -= (input_section->output_section->vma
ba96a88f
NC		 5254 + input_section->output_offset
5255 + rel->r_offset);
9a5aca8c 5256
252b5132
RH		 5257 check = relocation >> howto->rightshift;
5258
5259 /* If this is a signed value, the rightshift just dropped
5260 leading 1 bits (assuming twos complement). */
5261 if ((bfd_signed_vma) relocation >= 0)
5262 signed_check = check;
5263 else
5264 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift);
5265
e95de063
MS		 5266 /* Calculate the permissable maximum and minimum values for
5267 this relocation according to whether we're relocating for
5268 Thumb-2 or not. */
5269 bitsize = howto->bitsize;
5270 if (!thumb2)
5271 bitsize -= 2;
5272 reloc_signed_max = ((1 << (bitsize - 1)) - 1) >> howto->rightshift;
5273 reloc_signed_min = ~reloc_signed_max;
5274
252b5132 5275 /* Assumes two's complement. */
ba96a88f 5276 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
b34976b6 5277 overflow = TRUE;
252b5132 5278
bd97cb95 5279 if ((lower_insn & 0x5000) == 0x4000)
c62e1cc3
NC		 5280 /* For a BLX instruction, make sure that the relocation is rounded up
5281 to a word boundary. This follows the semantics of the instruction
5282 which specifies that bit 1 of the target address will come from bit
5283 1 of the base address. */
5284 relocation = (relocation + 2) & ~ 3;
cb1afa5c 5285
e95de063
MS		 5286 /* Put RELOCATION back into the insn. Assumes two's complement.
5287 We use the Thumb-2 encoding, which is safe even if dealing with
5288 a Thumb-1 instruction by virtue of our overflow check above. */
5289 reloc_sign = (signed_check < 0) ? 1 : 0;
5290 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff)
5291 | ((relocation >> 12) & 0x3ff)
5292 | (reloc_sign << 10);
5293 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff)
5294 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13)
5295 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11)
5296 | ((relocation >> 1) & 0x7ff);
c62e1cc3 5297
252b5132
RH		 5298 /* Put the relocated value back in the object file: */
5299 bfd_put_16 (input_bfd, upper_insn, hit_data);
5300 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5301
5302 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5303 }
5304 break;
5305
c19d1205
ZW		 5306 case R_ARM_THM_JUMP19:
5307 /* Thumb32 conditional branch instruction. */
5308 {
5309 bfd_vma relocation;
5310 bfd_boolean overflow = FALSE;
5311 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data);
5312 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2);
a00a1f35
MS		 5313 bfd_signed_vma reloc_signed_max = 0xffffe;
5314 bfd_signed_vma reloc_signed_min = -0x100000;
c19d1205
ZW		 5315 bfd_signed_vma signed_check;
5316
5317 /* Need to refetch the addend, reconstruct the top three bits,
5318 and squish the two 11 bit pieces together. */
5319 if (globals->use_rel)
5320 {
5321 bfd_vma S = (upper_insn & 0x0400) >> 10;
a00a1f35 5322 bfd_vma upper = (upper_insn & 0x003f);
c19d1205
ZW		 5323 bfd_vma J1 = (lower_insn & 0x2000) >> 13;
5324 bfd_vma J2 = (lower_insn & 0x0800) >> 11;
5325 bfd_vma lower = (lower_insn & 0x07ff);
5326
a00a1f35
MS		 5327 upper |= J1 << 6;
5328 upper |= J2 << 7;
5329 upper |= (!S) << 8;
c19d1205
ZW		 5330 upper -= 0x0100; /* Sign extend. */
5331
5332 addend = (upper << 12) | (lower << 1);
5333 signed_addend = addend;
5334 }
5335
bd97cb95
DJ		 5336 /* Handle calls via the PLT. */
5337 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1)
5338 {
5339 value = (splt->output_section->vma
5340 + splt->output_offset
5341 + h->plt.offset);
5342 /* Target the Thumb stub before the ARM PLT entry. */
5343 value -= PLT_THUMB_STUB_SIZE;
5344 *unresolved_reloc_p = FALSE;
5345 }
5346
c19d1205
ZW		 5347 /* ??? Should handle interworking? GCC might someday try to
5348 use this for tail calls. */
5349
5350 relocation = value + signed_addend;
5351 relocation -= (input_section->output_section->vma
5352 + input_section->output_offset
5353 + rel->r_offset);
a00a1f35 5354 signed_check = (bfd_signed_vma) relocation;
c19d1205 5355
c19d1205
ZW		 5356 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5357 overflow = TRUE;
5358
5359 /* Put RELOCATION back into the insn. */
5360 {
5361 bfd_vma S = (relocation & 0x00100000) >> 20;
5362 bfd_vma J2 = (relocation & 0x00080000) >> 19;
5363 bfd_vma J1 = (relocation & 0x00040000) >> 18;
5364 bfd_vma hi = (relocation & 0x0003f000) >> 12;
5365 bfd_vma lo = (relocation & 0x00000ffe) >> 1;
5366
a00a1f35 5367 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi;
c19d1205
ZW		 5368 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo;
5369 }
5370
5371 /* Put the relocated value back in the object file: */
5372 bfd_put_16 (input_bfd, upper_insn, hit_data);
5373 bfd_put_16 (input_bfd, lower_insn, hit_data + 2);
5374
5375 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok);
5376 }
5377
5378 case R_ARM_THM_JUMP11:
5379 case R_ARM_THM_JUMP8:
5380 case R_ARM_THM_JUMP6:
51c5503b
NC		 5381 /* Thumb B (branch) instruction). */
5382 {
6cf9e9fe 5383 bfd_signed_vma relocation;
51c5503b
NC		 5384 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1;
5385 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max;
51c5503b
NC		 5386 bfd_signed_vma signed_check;
5387
c19d1205
ZW		 5388 /* CZB cannot jump backward. */
5389 if (r_type == R_ARM_THM_JUMP6)
5390 reloc_signed_min = 0;
5391
4e7fd91e 5392 if (globals->use_rel)
6cf9e9fe 5393 {
4e7fd91e
PB		 5394 /* Need to refetch addend. */
5395 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask;
5396 if (addend & ((howto->src_mask + 1) >> 1))
5397 {
5398 signed_addend = -1;
5399 signed_addend &= ~ howto->src_mask;
5400 signed_addend |= addend;
5401 }
5402 else
5403 signed_addend = addend;
5404 /* The value in the insn has been right shifted. We need to
5405 undo this, so that we can perform the address calculation
5406 in terms of bytes. */
5407 signed_addend <<= howto->rightshift;
6cf9e9fe 5408 }
6cf9e9fe 5409 relocation = value + signed_addend;
51c5503b
NC		 5410
5411 relocation -= (input_section->output_section->vma
5412 + input_section->output_offset
5413 + rel->r_offset);
5414
6cf9e9fe
NC		 5415 relocation >>= howto->rightshift;
5416 signed_check = relocation;
c19d1205
ZW		 5417
5418 if (r_type == R_ARM_THM_JUMP6)
5419 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3);
5420 else
5421 relocation &= howto->dst_mask;
51c5503b 5422 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask));
cedb70c5 5423
51c5503b
NC		 5424 bfd_put_16 (input_bfd, relocation, hit_data);
5425
5426 /* Assumes two's complement. */
5427 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min)
5428 return bfd_reloc_overflow;
5429
5430 return bfd_reloc_ok;
5431 }
cedb70c5 5432
8375c36b
PB		 5433 case R_ARM_ALU_PCREL7_0:
5434 case R_ARM_ALU_PCREL15_8:
5435 case R_ARM_ALU_PCREL23_15:
5436 {
5437 bfd_vma insn;
5438 bfd_vma relocation;
5439
5440 insn = bfd_get_32 (input_bfd, hit_data);
4e7fd91e
PB		 5441 if (globals->use_rel)
5442 {
5443 /* Extract the addend. */
5444 addend = (insn & 0xff) << ((insn & 0xf00) >> 7);
5445 signed_addend = addend;
5446 }
8375c36b
PB		 5447 relocation = value + signed_addend;
5448
5449 relocation -= (input_section->output_section->vma
5450 + input_section->output_offset
5451 + rel->r_offset);
5452 insn = (insn & ~0xfff)
5453 | ((howto->bitpos << 7) & 0xf00)
5454 | ((relocation >> howto->bitpos) & 0xff);
5455 bfd_put_32 (input_bfd, value, hit_data);
5456 }
5457 return bfd_reloc_ok;
5458
252b5132
RH		 5459 case R_ARM_GNU_VTINHERIT:
5460 case R_ARM_GNU_VTENTRY:
5461 return bfd_reloc_ok;
5462
c19d1205 5463 case R_ARM_GOTOFF32:
252b5132
RH		 5464 /* Relocation is relative to the start of the
5465 global offset table. */
5466
5467 BFD_ASSERT (sgot != NULL);
5468 if (sgot == NULL)
5469 return bfd_reloc_notsupported;
9a5aca8c 5470
cedb70c5 5471 /* If we are addressing a Thumb function, we need to adjust the
ee29b9fb
RE		 5472 address by one, so that attempts to call the function pointer will
5473 correctly interpret it as Thumb code. */
5474 if (sym_flags == STT_ARM_TFUNC)
5475 value += 1;
5476
252b5132
RH		 5477 /* Note that sgot->output_offset is not involved in this
5478 calculation. We always want the start of .got. If we
5479 define _GLOBAL_OFFSET_TABLE in a different way, as is
5480 permitted by the ABI, we might have to change this
9b485d32 5481 calculation. */
252b5132 5482 value -= sgot->output_section->vma;
f21f3fe0 5483 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5484 contents, rel->r_offset, value,
00a97672 5485 rel->r_addend);
252b5132
RH		 5486
5487 case R_ARM_GOTPC:
a7c10850 5488 /* Use global offset table as symbol value. */
252b5132 5489 BFD_ASSERT (sgot != NULL);
f21f3fe0 5490
252b5132
RH		 5491 if (sgot == NULL)
5492 return bfd_reloc_notsupported;
5493
0945cdfd 5494 *unresolved_reloc_p = FALSE;
252b5132 5495 value = sgot->output_section->vma;
f21f3fe0 5496 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5497 contents, rel->r_offset, value,
00a97672 5498 rel->r_addend);
f21f3fe0 5499
252b5132 5500 case R_ARM_GOT32:
eb043451 5501 case R_ARM_GOT_PREL:
252b5132 5502 /* Relocation is to the entry for this symbol in the
9b485d32 5503 global offset table. */
252b5132
RH		 5504 if (sgot == NULL)
5505 return bfd_reloc_notsupported;
f21f3fe0 5506
252b5132
RH		 5507 if (h != NULL)
5508 {
5509 bfd_vma off;
5e681ec4 5510 bfd_boolean dyn;
f21f3fe0 5511
252b5132
RH		 5512 off = h->got.offset;
5513 BFD_ASSERT (off != (bfd_vma) -1);
5e681ec4 5514 dyn = globals->root.dynamic_sections_created;
f21f3fe0 5515
5e681ec4 5516 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
50d6c878 5517 || (info->shared
5e681ec4
PB		 5518 && SYMBOL_REFERENCES_LOCAL (info, h))
5519 || (ELF_ST_VISIBILITY (h->other)
5520 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 5521 {
5522 /* This is actually a static link, or it is a -Bsymbolic link
5523 and the symbol is defined locally. We must initialize this
5524 entry in the global offset table. Since the offset must
5525 always be a multiple of 4, we use the least significant bit
5526 to record whether we have initialized it already.
f21f3fe0 5527
00a97672 5528 When doing a dynamic link, we create a .rel(a).got relocation
f21f3fe0 5529 entry to initialize the value. This is done in the
9b485d32 5530 finish_dynamic_symbol routine. */
252b5132
RH		 5531 if ((off & 1) != 0)
5532 off &= ~1;
5533 else
5534 {
ee29b9fb
RE		 5535 /* If we are addressing a Thumb function, we need to
5536 adjust the address by one, so that attempts to
5537 call the function pointer will correctly
5538 interpret it as Thumb code. */
5539 if (sym_flags == STT_ARM_TFUNC)
5540 value |= 1;
5541
252b5132
RH		 5542 bfd_put_32 (output_bfd, value, sgot->contents + off);
5543 h->got.offset |= 1;
5544 }
5545 }
0945cdfd
DJ		 5546 else
5547 *unresolved_reloc_p = FALSE;
f21f3fe0 5548
252b5132
RH		 5549 value = sgot->output_offset + off;
5550 }
5551 else
5552 {
5553 bfd_vma off;
f21f3fe0 5554
252b5132
RH		 5555 BFD_ASSERT (local_got_offsets != NULL &&
5556 local_got_offsets[r_symndx] != (bfd_vma) -1);
f21f3fe0 5557
252b5132 5558 off = local_got_offsets[r_symndx];
f21f3fe0 5559
252b5132
RH		 5560 /* The offset must always be a multiple of 4. We use the
5561 least significant bit to record whether we have already
9b485d32 5562 generated the necessary reloc. */
252b5132
RH		 5563 if ((off & 1) != 0)
5564 off &= ~1;
5565 else
5566 {
b7693d02
DJ		 5567 /* If we are addressing a Thumb function, we need to
5568 adjust the address by one, so that attempts to
5569 call the function pointer will correctly
5570 interpret it as Thumb code. */
5571 if (sym_flags == STT_ARM_TFUNC)
5572 value |= 1;
5573
00a97672
RS		 5574 if (globals->use_rel)
5575 bfd_put_32 (output_bfd, value, sgot->contents + off);
f21f3fe0 5576
252b5132
RH		 5577 if (info->shared)
5578 {
5579 asection * srelgot;
947216bf
AM		 5580 Elf_Internal_Rela outrel;
5581 bfd_byte *loc;
f21f3fe0 5582
00a97672
RS		 5583 srelgot = (bfd_get_section_by_name
5584 (dynobj, RELOC_SECTION (globals, ".got")));
252b5132 5585 BFD_ASSERT (srelgot != NULL);
f21f3fe0 5586
00a97672 5587 outrel.r_addend = addend + value;
252b5132 5588 outrel.r_offset = (sgot->output_section->vma
f21f3fe0 5589 + sgot->output_offset
252b5132
RH		 5590 + off);
5591 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
947216bf 5592 loc = srelgot->contents;
00a97672
RS		 5593 loc += srelgot->reloc_count++ * RELOC_SIZE (globals);
5594 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
252b5132 5595 }
f21f3fe0 5596
252b5132
RH		 5597 local_got_offsets[r_symndx] |= 1;
5598 }
f21f3fe0 5599
252b5132
RH		 5600 value = sgot->output_offset + off;
5601 }
eb043451
PB		 5602 if (r_type != R_ARM_GOT32)
5603 value += sgot->output_section->vma;
9a5aca8c 5604
f21f3fe0 5605 return _bfd_final_link_relocate (howto, input_bfd, input_section,
99e4ae17 5606 contents, rel->r_offset, value,
00a97672 5607 rel->r_addend);
f21f3fe0 5608
ba93b8ac
DJ		 5609 case R_ARM_TLS_LDO32:
5610 value = value - dtpoff_base (info);
5611
5612 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5613 contents, rel->r_offset, value,
5614 rel->r_addend);
ba93b8ac
DJ		 5615
5616 case R_ARM_TLS_LDM32:
5617 {
5618 bfd_vma off;
5619
5620 if (globals->sgot == NULL)
5621 abort ();
5622
5623 off = globals->tls_ldm_got.offset;
5624
5625 if ((off & 1) != 0)
5626 off &= ~1;
5627 else
5628 {
5629 /* If we don't know the module number, create a relocation
5630 for it. */
5631 if (info->shared)
5632 {
5633 Elf_Internal_Rela outrel;
5634 bfd_byte *loc;
5635
5636 if (globals->srelgot == NULL)
5637 abort ();
5638
00a97672 5639 outrel.r_addend = 0;
ba93b8ac
DJ		 5640 outrel.r_offset = (globals->sgot->output_section->vma
5641 + globals->sgot->output_offset + off);
5642 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32);
5643
00a97672
RS		 5644 if (globals->use_rel)
5645 bfd_put_32 (output_bfd, outrel.r_addend,
5646 globals->sgot->contents + off);
ba93b8ac
DJ		 5647
5648 loc = globals->srelgot->contents;
00a97672
RS		 5649 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals);
5650 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac
DJ		 5651 }
5652 else
5653 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off);
5654
5655 globals->tls_ldm_got.offset |= 1;
5656 }
5657
5658 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5659 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5660
5661 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5662 contents, rel->r_offset, value,
00a97672 5663 rel->r_addend);
ba93b8ac
DJ		 5664 }
5665
5666 case R_ARM_TLS_GD32:
5667 case R_ARM_TLS_IE32:
5668 {
5669 bfd_vma off;
5670 int indx;
5671 char tls_type;
5672
5673 if (globals->sgot == NULL)
5674 abort ();
5675
5676 indx = 0;
5677 if (h != NULL)
5678 {
5679 bfd_boolean dyn;
5680 dyn = globals->root.dynamic_sections_created;
5681 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
5682 && (!info->shared
5683 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5684 {
5685 *unresolved_reloc_p = FALSE;
5686 indx = h->dynindx;
5687 }
5688 off = h->got.offset;
5689 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type;
5690 }
5691 else
5692 {
5693 if (local_got_offsets == NULL)
5694 abort ();
5695 off = local_got_offsets[r_symndx];
5696 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx];
5697 }
5698
5699 if (tls_type == GOT_UNKNOWN)
5700 abort ();
5701
5702 if ((off & 1) != 0)
5703 off &= ~1;
5704 else
5705 {
5706 bfd_boolean need_relocs = FALSE;
5707 Elf_Internal_Rela outrel;
5708 bfd_byte *loc = NULL;
5709 int cur_off = off;
5710
5711 /* The GOT entries have not been initialized yet. Do it
5712 now, and emit any relocations. If both an IE GOT and a
5713 GD GOT are necessary, we emit the GD first. */
5714
5715 if ((info->shared || indx != 0)
5716 && (h == NULL
5717 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5718 || h->root.type != bfd_link_hash_undefweak))
5719 {
5720 need_relocs = TRUE;
5721 if (globals->srelgot == NULL)
5722 abort ();
5723 loc = globals->srelgot->contents;
00a97672 5724 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals);
ba93b8ac
DJ		 5725 }
5726
5727 if (tls_type & GOT_TLS_GD)
5728 {
5729 if (need_relocs)
5730 {
00a97672 5731 outrel.r_addend = 0;
ba93b8ac 5732 outrel.r_offset = (globals->sgot->output_section->vma
00a97672
RS		 5733 + globals->sgot->output_offset
5734 + cur_off);
ba93b8ac 5735 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32);
ba93b8ac 5736
00a97672
RS		 5737 if (globals->use_rel)
5738 bfd_put_32 (output_bfd, outrel.r_addend,
5739 globals->sgot->contents + cur_off);
5740
5741 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5742 globals->srelgot->reloc_count++;
00a97672 5743 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5744
5745 if (indx == 0)
5746 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5747 globals->sgot->contents + cur_off + 4);
5748 else
5749 {
00a97672 5750 outrel.r_addend = 0;
ba93b8ac
DJ		 5751 outrel.r_info = ELF32_R_INFO (indx,
5752 R_ARM_TLS_DTPOFF32);
5753 outrel.r_offset += 4;
00a97672
RS		 5754
5755 if (globals->use_rel)
5756 bfd_put_32 (output_bfd, outrel.r_addend,
5757 globals->sgot->contents + cur_off + 4);
5758
5759
5760 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5761 globals->srelgot->reloc_count++;
00a97672 5762 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5763 }
5764 }
5765 else
5766 {
5767 /* If we are not emitting relocations for a
5768 general dynamic reference, then we must be in a
5769 static link or an executable link with the
5770 symbol binding locally. Mark it as belonging
5771 to module 1, the executable. */
5772 bfd_put_32 (output_bfd, 1,
5773 globals->sgot->contents + cur_off);
5774 bfd_put_32 (output_bfd, value - dtpoff_base (info),
5775 globals->sgot->contents + cur_off + 4);
5776 }
5777
5778 cur_off += 8;
5779 }
5780
5781 if (tls_type & GOT_TLS_IE)
5782 {
5783 if (need_relocs)
5784 {
00a97672
RS		 5785 if (indx == 0)
5786 outrel.r_addend = value - dtpoff_base (info);
5787 else
5788 outrel.r_addend = 0;
ba93b8ac
DJ		 5789 outrel.r_offset = (globals->sgot->output_section->vma
5790 + globals->sgot->output_offset
5791 + cur_off);
5792 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32);
5793
00a97672
RS		 5794 if (globals->use_rel)
5795 bfd_put_32 (output_bfd, outrel.r_addend,
ba93b8ac
DJ		 5796 globals->sgot->contents + cur_off);
5797
00a97672 5798 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc);
ba93b8ac 5799 globals->srelgot->reloc_count++;
00a97672 5800 loc += RELOC_SIZE (globals);
ba93b8ac
DJ		 5801 }
5802 else
5803 bfd_put_32 (output_bfd, tpoff (info, value),
5804 globals->sgot->contents + cur_off);
5805 cur_off += 4;
5806 }
5807
5808 if (h != NULL)
5809 h->got.offset |= 1;
5810 else
5811 local_got_offsets[r_symndx] |= 1;
5812 }
5813
5814 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32)
5815 off += 8;
5816 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off
5817 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset);
5818
5819 return _bfd_final_link_relocate (howto, input_bfd, input_section,
5820 contents, rel->r_offset, value,
00a97672 5821 rel->r_addend);
ba93b8ac
DJ		 5822 }
5823
5824 case R_ARM_TLS_LE32:
5825 if (info->shared)
5826 {
5827 (*_bfd_error_handler)
5828 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"),
5829 input_bfd, input_section,
5830 (long) rel->r_offset, howto->name);
5831 return FALSE;
5832 }
5833 else
5834 value = tpoff (info, value);
5835
5836 return _bfd_final_link_relocate (howto, input_bfd, input_section,
00a97672
RS		 5837 contents, rel->r_offset, value,
5838 rel->r_addend);
ba93b8ac 5839
319850b4
JB		 5840 case R_ARM_V4BX:
5841 if (globals->fix_v4bx)
845b51d6
PB		 5842 {
5843 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
319850b4 5844
845b51d6
PB		 5845 /* Ensure that we have a BX instruction. */
5846 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10);
319850b4 5847
845b51d6
PB		 5848 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf)
5849 {
5850 /* Branch to veneer. */
5851 bfd_vma glue_addr;
5852 glue_addr = elf32_arm_bx_glue (info, insn & 0xf);
5853 glue_addr -= input_section->output_section->vma
5854 + input_section->output_offset
5855 + rel->r_offset + 8;
5856 insn = (insn & 0xf0000000) | 0x0a000000
5857 | ((glue_addr >> 2) & 0x00ffffff);
5858 }
5859 else
5860 {
5861 /* Preserve Rm (lowest four bits) and the condition code
5862 (highest four bits). Other bits encode MOV PC,Rm. */
5863 insn = (insn & 0xf000000f) | 0x01a0f000;
5864 }
319850b4 5865
845b51d6
PB		 5866 bfd_put_32 (input_bfd, insn, hit_data);
5867 }
319850b4
JB		 5868 return bfd_reloc_ok;
5869
b6895b4f
PB		 5870 case R_ARM_MOVW_ABS_NC:
5871 case R_ARM_MOVT_ABS:
5872 case R_ARM_MOVW_PREL_NC:
5873 case R_ARM_MOVT_PREL:
92f5d02b
MS		 5874 /* Until we properly support segment-base-relative addressing then
5875 we assume the segment base to be zero, as for the group relocations.
5876 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC
5877 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */
5878 case R_ARM_MOVW_BREL_NC:
5879 case R_ARM_MOVW_BREL:
5880 case R_ARM_MOVT_BREL:
b6895b4f
PB		 5881 {
5882 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5883
5884 if (globals->use_rel)
5885 {
5886 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff);
39623e12 5887 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 5888 }
92f5d02b 5889
b6895b4f 5890 value += signed_addend;
b6895b4f
PB		 5891
5892 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL)
5893 value -= (input_section->output_section->vma
5894 + input_section->output_offset + rel->r_offset);
5895
92f5d02b
MS		 5896 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000)
5897 return bfd_reloc_overflow;
5898
5899 if (sym_flags == STT_ARM_TFUNC)
5900 value |= 1;
5901
5902 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL
5903 || r_type == R_ARM_MOVT_BREL)
b6895b4f
PB		 5904 value >>= 16;
5905
5906 insn &= 0xfff0f000;
5907 insn |= value & 0xfff;
5908 insn |= (value & 0xf000) << 4;
5909 bfd_put_32 (input_bfd, insn, hit_data);
5910 }
5911 return bfd_reloc_ok;
5912
5913 case R_ARM_THM_MOVW_ABS_NC:
5914 case R_ARM_THM_MOVT_ABS:
5915 case R_ARM_THM_MOVW_PREL_NC:
5916 case R_ARM_THM_MOVT_PREL:
92f5d02b
MS		 5917 /* Until we properly support segment-base-relative addressing then
5918 we assume the segment base to be zero, as for the above relocations.
5919 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as
5920 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics
5921 as R_ARM_THM_MOVT_ABS. */
5922 case R_ARM_THM_MOVW_BREL_NC:
5923 case R_ARM_THM_MOVW_BREL:
5924 case R_ARM_THM_MOVT_BREL:
b6895b4f
PB		 5925 {
5926 bfd_vma insn;
5927
5928 insn = bfd_get_16 (input_bfd, hit_data) << 16;
5929 insn |= bfd_get_16 (input_bfd, hit_data + 2);
5930
5931 if (globals->use_rel)
5932 {
5933 addend = ((insn >> 4) & 0xf000)
5934 | ((insn >> 15) & 0x0800)
5935 | ((insn >> 4) & 0x0700)
5936 | (insn & 0x00ff);
39623e12 5937 signed_addend = (addend ^ 0x8000) - 0x8000;
b6895b4f 5938 }
92f5d02b 5939
b6895b4f 5940 value += signed_addend;
b6895b4f
PB		 5941
5942 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL)
5943 value -= (input_section->output_section->vma
5944 + input_section->output_offset + rel->r_offset);
5945
92f5d02b
MS		 5946 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000)
5947 return bfd_reloc_overflow;
5948
5949 if (sym_flags == STT_ARM_TFUNC)
5950 value |= 1;
5951
5952 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL
5953 || r_type == R_ARM_THM_MOVT_BREL)
b6895b4f
PB		 5954 value >>= 16;
5955
5956 insn &= 0xfbf08f00;
5957 insn |= (value & 0xf000) << 4;
5958 insn |= (value & 0x0800) << 15;
5959 insn |= (value & 0x0700) << 4;
5960 insn |= (value & 0x00ff);
5961
5962 bfd_put_16 (input_bfd, insn >> 16, hit_data);
5963 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2);
5964 }
5965 return bfd_reloc_ok;
5966
4962c51a
MS		 5967 case R_ARM_ALU_PC_G0_NC:
5968 case R_ARM_ALU_PC_G1_NC:
5969 case R_ARM_ALU_PC_G0:
5970 case R_ARM_ALU_PC_G1:
5971 case R_ARM_ALU_PC_G2:
5972 case R_ARM_ALU_SB_G0_NC:
5973 case R_ARM_ALU_SB_G1_NC:
5974 case R_ARM_ALU_SB_G0:
5975 case R_ARM_ALU_SB_G1:
5976 case R_ARM_ALU_SB_G2:
5977 {
5978 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
5979 bfd_vma pc = input_section->output_section->vma
5980 + input_section->output_offset + rel->r_offset;
5981 /* sb should be the origin of the *segment* containing the symbol.
5982 It is not clear how to obtain this OS-dependent value, so we
5983 make an arbitrary choice of zero. */
5984 bfd_vma sb = 0;
5985 bfd_vma residual;
5986 bfd_vma g_n;
5987 bfd_signed_vma signed_value;
5988 int group = 0;
5989
5990 /* Determine which group of bits to select. */
5991 switch (r_type)
5992 {
5993 case R_ARM_ALU_PC_G0_NC:
5994 case R_ARM_ALU_PC_G0:
5995 case R_ARM_ALU_SB_G0_NC:
5996 case R_ARM_ALU_SB_G0:
5997 group = 0;
5998 break;
5999
6000 case R_ARM_ALU_PC_G1_NC:
6001 case R_ARM_ALU_PC_G1:
6002 case R_ARM_ALU_SB_G1_NC:
6003 case R_ARM_ALU_SB_G1:
6004 group = 1;
6005 break;
6006
6007 case R_ARM_ALU_PC_G2:
6008 case R_ARM_ALU_SB_G2:
6009 group = 2;
6010 break;
6011
6012 default:
6013 abort();
6014 }
6015
6016 /* If REL, extract the addend from the insn. If RELA, it will
6017 have already been fetched for us. */
6018 if (globals->use_rel)
6019 {
6020 int negative;
6021 bfd_vma constant = insn & 0xff;
6022 bfd_vma rotation = (insn & 0xf00) >> 8;
6023
6024 if (rotation == 0)
6025 signed_addend = constant;
6026 else
6027 {
6028 /* Compensate for the fact that in the instruction, the
6029 rotation is stored in multiples of 2 bits. */
6030 rotation *= 2;
6031
6032 /* Rotate "constant" right by "rotation" bits. */
6033 signed_addend = (constant >> rotation) |
6034 (constant << (8 * sizeof (bfd_vma) - rotation));
6035 }
6036
6037 /* Determine if the instruction is an ADD or a SUB.
6038 (For REL, this determines the sign of the addend.) */
6039 negative = identify_add_or_sub (insn);
6040 if (negative == 0)
6041 {
6042 (*_bfd_error_handler)
6043 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"),
6044 input_bfd, input_section,
6045 (long) rel->r_offset, howto->name);
6046 return bfd_reloc_overflow;
6047 }
6048
6049 signed_addend *= negative;
6050 }
6051
6052 /* Compute the value (X) to go in the place. */
6053 if (r_type == R_ARM_ALU_PC_G0_NC
6054 || r_type == R_ARM_ALU_PC_G1_NC
6055 || r_type == R_ARM_ALU_PC_G0
6056 || r_type == R_ARM_ALU_PC_G1
6057 || r_type == R_ARM_ALU_PC_G2)
6058 /* PC relative. */
6059 signed_value = value - pc + signed_addend;
6060 else
6061 /* Section base relative. */
6062 signed_value = value - sb + signed_addend;
6063
6064 /* If the target symbol is a Thumb function, then set the
6065 Thumb bit in the address. */
6066 if (sym_flags == STT_ARM_TFUNC)
6067 signed_value |= 1;
6068
6069 /* Calculate the value of the relevant G_n, in encoded
6070 constant-with-rotation format. */
6071 g_n = calculate_group_reloc_mask (abs (signed_value), group,
6072 &residual);
6073
6074 /* Check for overflow if required. */
6075 if ((r_type == R_ARM_ALU_PC_G0
6076 || r_type == R_ARM_ALU_PC_G1
6077 || r_type == R_ARM_ALU_PC_G2
6078 || r_type == R_ARM_ALU_SB_G0
6079 || r_type == R_ARM_ALU_SB_G1
6080 || r_type == R_ARM_ALU_SB_G2) && residual != 0)
6081 {
6082 (*_bfd_error_handler)
6083 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6084 input_bfd, input_section,
6085 (long) rel->r_offset, abs (signed_value), howto->name);
6086 return bfd_reloc_overflow;
6087 }
6088
6089 /* Mask out the value and the ADD/SUB part of the opcode; take care
6090 not to destroy the S bit. */
6091 insn &= 0xff1ff000;
6092
6093 /* Set the opcode according to whether the value to go in the
6094 place is negative. */
6095 if (signed_value < 0)
6096 insn |= 1 << 22;
6097 else
6098 insn |= 1 << 23;
6099
6100 /* Encode the offset. */
6101 insn |= g_n;
6102
6103 bfd_put_32 (input_bfd, insn, hit_data);
6104 }
6105 return bfd_reloc_ok;
6106
6107 case R_ARM_LDR_PC_G0:
6108 case R_ARM_LDR_PC_G1:
6109 case R_ARM_LDR_PC_G2:
6110 case R_ARM_LDR_SB_G0:
6111 case R_ARM_LDR_SB_G1:
6112 case R_ARM_LDR_SB_G2:
6113 {
6114 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6115 bfd_vma pc = input_section->output_section->vma
6116 + input_section->output_offset + rel->r_offset;
6117 bfd_vma sb = 0; /* See note above. */
6118 bfd_vma residual;
6119 bfd_signed_vma signed_value;
6120 int group = 0;
6121
6122 /* Determine which groups of bits to calculate. */
6123 switch (r_type)
6124 {
6125 case R_ARM_LDR_PC_G0:
6126 case R_ARM_LDR_SB_G0:
6127 group = 0;
6128 break;
6129
6130 case R_ARM_LDR_PC_G1:
6131 case R_ARM_LDR_SB_G1:
6132 group = 1;
6133 break;
6134
6135 case R_ARM_LDR_PC_G2:
6136 case R_ARM_LDR_SB_G2:
6137 group = 2;
6138 break;
6139
6140 default:
6141 abort();
6142 }
6143
6144 /* If REL, extract the addend from the insn. If RELA, it will
6145 have already been fetched for us. */
6146 if (globals->use_rel)
6147 {
6148 int negative = (insn & (1 << 23)) ? 1 : -1;
6149 signed_addend = negative * (insn & 0xfff);
6150 }
6151
6152 /* Compute the value (X) to go in the place. */
6153 if (r_type == R_ARM_LDR_PC_G0
6154 || r_type == R_ARM_LDR_PC_G1
6155 || r_type == R_ARM_LDR_PC_G2)
6156 /* PC relative. */
6157 signed_value = value - pc + signed_addend;
6158 else
6159 /* Section base relative. */
6160 signed_value = value - sb + signed_addend;
6161
6162 /* Calculate the value of the relevant G_{n-1} to obtain
6163 the residual at that stage. */
6164 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6165
6166 /* Check for overflow. */
6167 if (residual >= 0x1000)
6168 {
6169 (*_bfd_error_handler)
6170 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6171 input_bfd, input_section,
6172 (long) rel->r_offset, abs (signed_value), howto->name);
6173 return bfd_reloc_overflow;
6174 }
6175
6176 /* Mask out the value and U bit. */
6177 insn &= 0xff7ff000;
6178
6179 /* Set the U bit if the value to go in the place is non-negative. */
6180 if (signed_value >= 0)
6181 insn |= 1 << 23;
6182
6183 /* Encode the offset. */
6184 insn |= residual;
6185
6186 bfd_put_32 (input_bfd, insn, hit_data);
6187 }
6188 return bfd_reloc_ok;
6189
6190 case R_ARM_LDRS_PC_G0:
6191 case R_ARM_LDRS_PC_G1:
6192 case R_ARM_LDRS_PC_G2:
6193 case R_ARM_LDRS_SB_G0:
6194 case R_ARM_LDRS_SB_G1:
6195 case R_ARM_LDRS_SB_G2:
6196 {
6197 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6198 bfd_vma pc = input_section->output_section->vma
6199 + input_section->output_offset + rel->r_offset;
6200 bfd_vma sb = 0; /* See note above. */
6201 bfd_vma residual;
6202 bfd_signed_vma signed_value;
6203 int group = 0;
6204
6205 /* Determine which groups of bits to calculate. */
6206 switch (r_type)
6207 {
6208 case R_ARM_LDRS_PC_G0:
6209 case R_ARM_LDRS_SB_G0:
6210 group = 0;
6211 break;
6212
6213 case R_ARM_LDRS_PC_G1:
6214 case R_ARM_LDRS_SB_G1:
6215 group = 1;
6216 break;
6217
6218 case R_ARM_LDRS_PC_G2:
6219 case R_ARM_LDRS_SB_G2:
6220 group = 2;
6221 break;
6222
6223 default:
6224 abort();
6225 }
6226
6227 /* If REL, extract the addend from the insn. If RELA, it will
6228 have already been fetched for us. */
6229 if (globals->use_rel)
6230 {
6231 int negative = (insn & (1 << 23)) ? 1 : -1;
6232 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf));
6233 }
6234
6235 /* Compute the value (X) to go in the place. */
6236 if (r_type == R_ARM_LDRS_PC_G0
6237 || r_type == R_ARM_LDRS_PC_G1
6238 || r_type == R_ARM_LDRS_PC_G2)
6239 /* PC relative. */
6240 signed_value = value - pc + signed_addend;
6241 else
6242 /* Section base relative. */
6243 signed_value = value - sb + signed_addend;
6244
6245 /* Calculate the value of the relevant G_{n-1} to obtain
6246 the residual at that stage. */
6247 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6248
6249 /* Check for overflow. */
6250 if (residual >= 0x100)
6251 {
6252 (*_bfd_error_handler)
6253 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6254 input_bfd, input_section,
6255 (long) rel->r_offset, abs (signed_value), howto->name);
6256 return bfd_reloc_overflow;
6257 }
6258
6259 /* Mask out the value and U bit. */
6260 insn &= 0xff7ff0f0;
6261
6262 /* Set the U bit if the value to go in the place is non-negative. */
6263 if (signed_value >= 0)
6264 insn |= 1 << 23;
6265
6266 /* Encode the offset. */
6267 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
6268
6269 bfd_put_32 (input_bfd, insn, hit_data);
6270 }
6271 return bfd_reloc_ok;
6272
6273 case R_ARM_LDC_PC_G0:
6274 case R_ARM_LDC_PC_G1:
6275 case R_ARM_LDC_PC_G2:
6276 case R_ARM_LDC_SB_G0:
6277 case R_ARM_LDC_SB_G1:
6278 case R_ARM_LDC_SB_G2:
6279 {
6280 bfd_vma insn = bfd_get_32 (input_bfd, hit_data);
6281 bfd_vma pc = input_section->output_section->vma
6282 + input_section->output_offset + rel->r_offset;
6283 bfd_vma sb = 0; /* See note above. */
6284 bfd_vma residual;
6285 bfd_signed_vma signed_value;
6286 int group = 0;
6287
6288 /* Determine which groups of bits to calculate. */
6289 switch (r_type)
6290 {
6291 case R_ARM_LDC_PC_G0:
6292 case R_ARM_LDC_SB_G0:
6293 group = 0;
6294 break;
6295
6296 case R_ARM_LDC_PC_G1:
6297 case R_ARM_LDC_SB_G1:
6298 group = 1;
6299 break;
6300
6301 case R_ARM_LDC_PC_G2:
6302 case R_ARM_LDC_SB_G2:
6303 group = 2;
6304 break;
6305
6306 default:
6307 abort();
6308 }
6309
6310 /* If REL, extract the addend from the insn. If RELA, it will
6311 have already been fetched for us. */
6312 if (globals->use_rel)
6313 {
6314 int negative = (insn & (1 << 23)) ? 1 : -1;
6315 signed_addend = negative * ((insn & 0xff) << 2);
6316 }
6317
6318 /* Compute the value (X) to go in the place. */
6319 if (r_type == R_ARM_LDC_PC_G0
6320 || r_type == R_ARM_LDC_PC_G1
6321 || r_type == R_ARM_LDC_PC_G2)
6322 /* PC relative. */
6323 signed_value = value - pc + signed_addend;
6324 else
6325 /* Section base relative. */
6326 signed_value = value - sb + signed_addend;
6327
6328 /* Calculate the value of the relevant G_{n-1} to obtain
6329 the residual at that stage. */
6330 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual);
6331
6332 /* Check for overflow. (The absolute value to go in the place must be
6333 divisible by four and, after having been divided by four, must
6334 fit in eight bits.) */
6335 if ((residual & 0x3) != 0 || residual >= 0x400)
6336 {
6337 (*_bfd_error_handler)
6338 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"),
6339 input_bfd, input_section,
6340 (long) rel->r_offset, abs (signed_value), howto->name);
6341 return bfd_reloc_overflow;
6342 }
6343
6344 /* Mask out the value and U bit. */
6345 insn &= 0xff7fff00;
6346
6347 /* Set the U bit if the value to go in the place is non-negative. */
6348 if (signed_value >= 0)
6349 insn |= 1 << 23;
6350
6351 /* Encode the offset. */
6352 insn |= residual >> 2;
6353
6354 bfd_put_32 (input_bfd, insn, hit_data);
6355 }
6356 return bfd_reloc_ok;
6357
252b5132
RH		 6358 default:
6359 return bfd_reloc_notsupported;
6360 }
6361}
6362
98c1d4aa
NC		 6363/* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */
6364static void
57e8b36a
NC		 6365arm_add_to_rel (bfd * abfd,
6366 bfd_byte * address,
6367 reloc_howto_type * howto,
6368 bfd_signed_vma increment)
98c1d4aa 6369{
98c1d4aa
NC		 6370 bfd_signed_vma addend;
6371
bd97cb95
DJ		 6372 if (howto->type == R_ARM_THM_CALL
6373 || howto->type == R_ARM_THM_JUMP24)
98c1d4aa 6374 {
9a5aca8c
AM		 6375 int upper_insn, lower_insn;
6376 int upper, lower;
98c1d4aa 6377
9a5aca8c
AM		 6378 upper_insn = bfd_get_16 (abfd, address);
6379 lower_insn = bfd_get_16 (abfd, address + 2);
6380 upper = upper_insn & 0x7ff;
6381 lower = lower_insn & 0x7ff;
6382
6383 addend = (upper << 12) | (lower << 1);
ddda4409 6384 addend += increment;
9a5aca8c 6385 addend >>= 1;
98c1d4aa 6386
9a5aca8c
AM		 6387 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff);
6388 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff);
6389
dc810e39
AM		 6390 bfd_put_16 (abfd, (bfd_vma) upper_insn, address);
6391 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2);
9a5aca8c
AM		 6392 }
6393 else
6394 {
6395 bfd_vma contents;
6396
6397 contents = bfd_get_32 (abfd, address);
6398
6399 /* Get the (signed) value from the instruction. */
6400 addend = contents & howto->src_mask;
6401 if (addend & ((howto->src_mask + 1) >> 1))
6402 {
6403 bfd_signed_vma mask;
6404
6405 mask = -1;
6406 mask &= ~ howto->src_mask;
6407 addend |= mask;
6408 }
6409
6410 /* Add in the increment, (which is a byte value). */
6411 switch (howto->type)
6412 {
6413 default:
6414 addend += increment;
6415 break;
6416
6417 case R_ARM_PC24:
c6596c5e 6418 case R_ARM_PLT32:
5b5bb741
PB		 6419 case R_ARM_CALL:
6420 case R_ARM_JUMP24:
9a5aca8c 6421 addend <<= howto->size;
dc810e39 6422 addend += increment;
9a5aca8c
AM		 6423
6424 /* Should we check for overflow here ? */
6425
6426 /* Drop any undesired bits. */
6427 addend >>= howto->rightshift;
6428 break;
6429 }
6430
6431 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask);
6432
6433 bfd_put_32 (abfd, contents, address);
ddda4409 6434 }
98c1d4aa 6435}
252b5132 6436
ba93b8ac
DJ		 6437#define IS_ARM_TLS_RELOC(R_TYPE) \
6438 ((R_TYPE) == R_ARM_TLS_GD32 \
6439 || (R_TYPE) == R_ARM_TLS_LDO32 \
6440 || (R_TYPE) == R_ARM_TLS_LDM32 \
6441 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \
6442 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \
6443 || (R_TYPE) == R_ARM_TLS_TPOFF32 \
6444 || (R_TYPE) == R_ARM_TLS_LE32 \
6445 || (R_TYPE) == R_ARM_TLS_IE32)
6446
252b5132 6447/* Relocate an ARM ELF section. */
b34976b6 6448static bfd_boolean
57e8b36a
NC		 6449elf32_arm_relocate_section (bfd * output_bfd,
6450 struct bfd_link_info * info,
6451 bfd * input_bfd,
6452 asection * input_section,
6453 bfd_byte * contents,
6454 Elf_Internal_Rela * relocs,
6455 Elf_Internal_Sym * local_syms,
6456 asection ** local_sections)
252b5132 6457{
b34976b6
AM		 6458 Elf_Internal_Shdr *symtab_hdr;
6459 struct elf_link_hash_entry **sym_hashes;
6460 Elf_Internal_Rela *rel;
6461 Elf_Internal_Rela *relend;
6462 const char *name;
b32d3aa2 6463 struct elf32_arm_link_hash_table * globals;
252b5132 6464
4e7fd91e 6465 globals = elf32_arm_hash_table (info);
b491616a 6466
0ffa91dd 6467 symtab_hdr = & elf_symtab_hdr (input_bfd);
252b5132
RH		 6468 sym_hashes = elf_sym_hashes (input_bfd);
6469
6470 rel = relocs;
6471 relend = relocs + input_section->reloc_count;
6472 for (; rel < relend; rel++)
6473 {
ba96a88f
NC		 6474 int r_type;
6475 reloc_howto_type * howto;
6476 unsigned long r_symndx;
6477 Elf_Internal_Sym * sym;
6478 asection * sec;
252b5132 6479 struct elf_link_hash_entry * h;
ba96a88f
NC		 6480 bfd_vma relocation;
6481 bfd_reloc_status_type r;
6482 arelent bfd_reloc;
ba93b8ac 6483 char sym_type;
0945cdfd 6484 bfd_boolean unresolved_reloc = FALSE;
f2a9dd69 6485 char *error_message = NULL;
f21f3fe0 6486
252b5132 6487 r_symndx = ELF32_R_SYM (rel->r_info);
ba96a88f 6488 r_type = ELF32_R_TYPE (rel->r_info);
b32d3aa2 6489 r_type = arm_real_reloc_type (globals, r_type);
252b5132 6490
ba96a88f
NC		 6491 if ( r_type == R_ARM_GNU_VTENTRY
6492 || r_type == R_ARM_GNU_VTINHERIT)
252b5132
RH		 6493 continue;
6494
b32d3aa2 6495 bfd_reloc.howto = elf32_arm_howto_from_type (r_type);
ba96a88f 6496 howto = bfd_reloc.howto;
252b5132 6497
252b5132
RH		 6498 h = NULL;
6499 sym = NULL;
6500 sec = NULL;
9b485d32 6501
252b5132
RH		 6502 if (r_symndx < symtab_hdr->sh_info)
6503 {
6504 sym = local_syms + r_symndx;
ba93b8ac 6505 sym_type = ELF32_ST_TYPE (sym->st_info);
252b5132 6506 sec = local_sections[r_symndx];
4e7fd91e 6507 if (globals->use_rel)
f8df10f4 6508 {
4e7fd91e
PB		 6509 relocation = (sec->output_section->vma
6510 + sec->output_offset
6511 + sym->st_value);
ab96bf03
AM		 6512 if (!info->relocatable
6513 && (sec->flags & SEC_MERGE)
6514 && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
f8df10f4 6515 {
4e7fd91e
PB		 6516 asection *msec;
6517 bfd_vma addend, value;
6518
39623e12 6519 switch (r_type)
4e7fd91e 6520 {
39623e12
PB		 6521 case R_ARM_MOVW_ABS_NC:
6522 case R_ARM_MOVT_ABS:
6523 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
6524 addend = ((value & 0xf0000) >> 4) | (value & 0xfff);
6525 addend = (addend ^ 0x8000) - 0x8000;
6526 break;
f8df10f4 6527
39623e12
PB		 6528 case R_ARM_THM_MOVW_ABS_NC:
6529 case R_ARM_THM_MOVT_ABS:
6530 value = bfd_get_16 (input_bfd, contents + rel->r_offset)
6531 << 16;
6532 value |= bfd_get_16 (input_bfd,
6533 contents + rel->r_offset + 2);
6534 addend = ((value & 0xf7000) >> 4) | (value & 0xff)
6535 | ((value & 0x04000000) >> 15);
6536 addend = (addend ^ 0x8000) - 0x8000;
6537 break;
f8df10f4 6538
39623e12
PB		 6539 default:
6540 if (howto->rightshift
6541 || (howto->src_mask & (howto->src_mask + 1)))
6542 {
6543 (*_bfd_error_handler)
6544 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"),
6545 input_bfd, input_section,
6546 (long) rel->r_offset, howto->name);
6547 return FALSE;
6548 }
6549
6550 value = bfd_get_32 (input_bfd, contents + rel->r_offset);
6551
6552 /* Get the (signed) value from the instruction. */
6553 addend = value & howto->src_mask;
6554 if (addend & ((howto->src_mask + 1) >> 1))
6555 {
6556 bfd_signed_vma mask;
6557
6558 mask = -1;
6559 mask &= ~ howto->src_mask;
6560 addend |= mask;
6561 }
6562 break;
4e7fd91e 6563 }
39623e12 6564
4e7fd91e
PB		 6565 msec = sec;
6566 addend =
6567 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend)
6568 - relocation;
6569 addend += msec->output_section->vma + msec->output_offset;
39623e12
PB		 6570
6571 /* Cases here must match those in the preceeding
6572 switch statement. */
6573 switch (r_type)
6574 {
6575 case R_ARM_MOVW_ABS_NC:
6576 case R_ARM_MOVT_ABS:
6577 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4)
6578 | (addend & 0xfff);
6579 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
6580 break;
6581
6582 case R_ARM_THM_MOVW_ABS_NC:
6583 case R_ARM_THM_MOVT_ABS:
6584 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4)
6585 | (addend & 0xff) | ((addend & 0x0800) << 15);
6586 bfd_put_16 (input_bfd, value >> 16,
6587 contents + rel->r_offset);
6588 bfd_put_16 (input_bfd, value,
6589 contents + rel->r_offset + 2);
6590 break;
6591
6592 default:
6593 value = (value & ~ howto->dst_mask)
6594 | (addend & howto->dst_mask);
6595 bfd_put_32 (input_bfd, value, contents + rel->r_offset);
6596 break;
6597 }
f8df10f4 6598 }
f8df10f4 6599 }
4e7fd91e
PB		 6600 else
6601 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH		 6602 }
6603 else
6604 {
560e09e9 6605 bfd_boolean warned;
560e09e9 6606
b2a8e766
AM		 6607 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
6608 r_symndx, symtab_hdr, sym_hashes,
6609 h, sec, relocation,
6610 unresolved_reloc, warned);
ba93b8ac
DJ		 6611
6612 sym_type = h->type;
252b5132
RH		 6613 }
6614
ab96bf03
AM		 6615 if (sec != NULL && elf_discarded_section (sec))
6616 {
6617 /* For relocs against symbols from removed linkonce sections,
6618 or sections discarded by a linker script, we just want the
6619 section contents zeroed. Avoid any special processing. */
6620 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
6621 rel->r_info = 0;
6622 rel->r_addend = 0;
6623 continue;
6624 }
6625
6626 if (info->relocatable)
6627 {
6628 /* This is a relocatable link. We don't have to change
6629 anything, unless the reloc is against a section symbol,
6630 in which case we have to adjust according to where the
6631 section symbol winds up in the output section. */
6632 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
6633 {
6634 if (globals->use_rel)
6635 arm_add_to_rel (input_bfd, contents + rel->r_offset,
6636 howto, (bfd_signed_vma) sec->output_offset);
6637 else
6638 rel->r_addend += sec->output_offset;
6639 }
6640 continue;
6641 }
6642
252b5132
RH		 6643 if (h != NULL)
6644 name = h->root.root.string;
6645 else
6646 {
6647 name = (bfd_elf_string_from_elf_section
6648 (input_bfd, symtab_hdr->sh_link, sym->st_name));
6649 if (name == NULL || *name == '\0')
6650 name = bfd_section_name (input_bfd, sec);
6651 }
f21f3fe0 6652
ba93b8ac
DJ		 6653 if (r_symndx != 0
6654 && r_type != R_ARM_NONE
6655 && (h == NULL
6656 || h->root.type == bfd_link_hash_defined
6657 || h->root.type == bfd_link_hash_defweak)
6658 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS))
6659 {
6660 (*_bfd_error_handler)
6661 ((sym_type == STT_TLS
6662 ? _("%B(%A+0x%lx): %s used with TLS symbol %s")
6663 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")),
6664 input_bfd,
6665 input_section,
6666 (long) rel->r_offset,
6667 howto->name,
6668 name);
6669 }
6670
252b5132
RH		 6671 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd,
6672 input_section, contents, rel,
6673 relocation, info, sec, name,
6674 (h ? ELF_ST_TYPE (h->type) :
0945cdfd 6675 ELF_ST_TYPE (sym->st_info)), h,
f2a9dd69 6676 &unresolved_reloc, &error_message);
0945cdfd
DJ		 6677
6678 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections
6679 because such sections are not SEC_ALLOC and thus ld.so will
6680 not process them. */
6681 if (unresolved_reloc
6682 && !((input_section->flags & SEC_DEBUGGING) != 0
6683 && h->def_dynamic))
6684 {
6685 (*_bfd_error_handler)
843fe662
L		 6686 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"),
6687 input_bfd,
6688 input_section,
6689 (long) rel->r_offset,
6690 howto->name,
6691 h->root.root.string);
0945cdfd
DJ		 6692 return FALSE;
6693 }
252b5132
RH		 6694
6695 if (r != bfd_reloc_ok)
6696 {
252b5132
RH		 6697 switch (r)
6698 {
6699 case bfd_reloc_overflow:
cf919dfd
PB		 6700 /* If the overflowing reloc was to an undefined symbol,
6701 we have already printed one error message and there
6702 is no point complaining again. */
6703 if ((! h ||
6704 h->root.type != bfd_link_hash_undefined)
6705 && (!((*info->callbacks->reloc_overflow)
dfeffb9f
L		 6706 (info, (h ? &h->root : NULL), name, howto->name,
6707 (bfd_vma) 0, input_bfd, input_section,
6708 rel->r_offset))))
b34976b6 6709 return FALSE;
252b5132
RH		 6710 break;
6711
6712 case bfd_reloc_undefined:
6713 if (!((*info->callbacks->undefined_symbol)
6714 (info, name, input_bfd, input_section,
b34976b6
AM		 6715 rel->r_offset, TRUE)))
6716 return FALSE;
252b5132
RH		 6717 break;
6718
6719 case bfd_reloc_outofrange:
f2a9dd69 6720 error_message = _("out of range");
252b5132
RH		 6721 goto common_error;
6722
6723 case bfd_reloc_notsupported:
f2a9dd69 6724 error_message = _("unsupported relocation");
252b5132
RH		 6725 goto common_error;
6726
6727 case bfd_reloc_dangerous:
f2a9dd69 6728 /* error_message should already be set. */
252b5132
RH		 6729 goto common_error;
6730
6731 default:
f2a9dd69 6732 error_message = _("unknown error");
252b5132
RH		 6733 /* fall through */
6734
6735 common_error:
f2a9dd69
DJ		 6736 BFD_ASSERT (error_message != NULL);
6737 if (!((*info->callbacks->reloc_dangerous)
6738 (info, error_message, input_bfd, input_section,
252b5132 6739 rel->r_offset)))
b34976b6 6740 return FALSE;
252b5132
RH		 6741 break;
6742 }
6743 }
6744 }
6745
b34976b6 6746 return TRUE;
252b5132
RH		 6747}
6748
c178919b
NC		 6749/* Set the right machine number. */
6750
6751static bfd_boolean
57e8b36a 6752elf32_arm_object_p (bfd *abfd)
c178919b 6753{
5a6c6817 6754 unsigned int mach;
57e8b36a 6755
5a6c6817 6756 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
c178919b 6757
5a6c6817
NC		 6758 if (mach != bfd_mach_arm_unknown)
6759 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
6760
6761 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
6762 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
e16bb312 6763
e16bb312 6764 else
5a6c6817 6765 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
c178919b
NC		 6766
6767 return TRUE;
6768}
6769
fc830a83 6770/* Function to keep ARM specific flags in the ELF header. */
3c9458e9 6771
b34976b6 6772static bfd_boolean
57e8b36a 6773elf32_arm_set_private_flags (bfd *abfd, flagword flags)
252b5132
RH		 6774{
6775 if (elf_flags_init (abfd)
6776 && elf_elfheader (abfd)->e_flags != flags)
6777 {
fc830a83
NC		 6778 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN)
6779 {
fd2ec330 6780 if (flags & EF_ARM_INTERWORK)
d003868e
AM		 6781 (*_bfd_error_handler)
6782 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"),
6783 abfd);
fc830a83 6784 else
d003868e
AM		 6785 _bfd_error_handler
6786 (_("Warning: Clearing the interworking flag of %B due to outside request"),
6787 abfd);
fc830a83 6788 }
252b5132
RH		 6789 }
6790 else
6791 {
6792 elf_elfheader (abfd)->e_flags = flags;
b34976b6 6793 elf_flags_init (abfd) = TRUE;
252b5132
RH		 6794 }
6795
b34976b6 6796 return TRUE;
252b5132
RH		 6797}
6798
fc830a83 6799/* Copy backend specific data from one object module to another. */
9b485d32 6800
b34976b6 6801static bfd_boolean
57e8b36a 6802elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd)
252b5132
RH		 6803{
6804 flagword in_flags;
6805 flagword out_flags;
6806
0ffa91dd 6807 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 6808 return TRUE;
252b5132 6809
fc830a83 6810 in_flags = elf_elfheader (ibfd)->e_flags;
252b5132
RH		 6811 out_flags = elf_elfheader (obfd)->e_flags;
6812
fc830a83
NC		 6813 if (elf_flags_init (obfd)
6814 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN
6815 && in_flags != out_flags)
252b5132 6816 {
252b5132 6817 /* Cannot mix APCS26 and APCS32 code. */
fd2ec330 6818 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
b34976b6 6819 return FALSE;
252b5132
RH		 6820
6821 /* Cannot mix float APCS and non-float APCS code. */
fd2ec330 6822 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
b34976b6 6823 return FALSE;
252b5132
RH		 6824
6825 /* If the src and dest have different interworking flags
6826 then turn off the interworking bit. */
fd2ec330 6827 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
252b5132 6828 {
fd2ec330 6829 if (out_flags & EF_ARM_INTERWORK)
d003868e
AM		 6830 _bfd_error_handler
6831 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"),
6832 obfd, ibfd);
252b5132 6833
fd2ec330 6834 in_flags &= ~EF_ARM_INTERWORK;
252b5132 6835 }
1006ba19
PB		 6836
6837 /* Likewise for PIC, though don't warn for this case. */
fd2ec330
PB		 6838 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC))
6839 in_flags &= ~EF_ARM_PIC;
252b5132
RH		 6840 }
6841
6842 elf_elfheader (obfd)->e_flags = in_flags;
b34976b6 6843 elf_flags_init (obfd) = TRUE;
252b5132 6844
94a3258f
PB		 6845 /* Also copy the EI_OSABI field. */
6846 elf_elfheader (obfd)->e_ident[EI_OSABI] =
6847 elf_elfheader (ibfd)->e_ident[EI_OSABI];
6848
104d59d1
JM		 6849 /* Copy object attributes. */
6850 _bfd_elf_copy_obj_attributes (ibfd, obfd);
ee065d83
PB		 6851
6852 return TRUE;
6853}
6854
6855/* Values for Tag_ABI_PCS_R9_use. */
6856enum
6857{
6858 AEABI_R9_V6,
6859 AEABI_R9_SB,
6860 AEABI_R9_TLS,
6861 AEABI_R9_unused
6862};
6863
6864/* Values for Tag_ABI_PCS_RW_data. */
6865enum
6866{
6867 AEABI_PCS_RW_data_absolute,
6868 AEABI_PCS_RW_data_PCrel,
6869 AEABI_PCS_RW_data_SBrel,
6870 AEABI_PCS_RW_data_unused
6871};
6872
6873/* Values for Tag_ABI_enum_size. */
6874enum
6875{
6876 AEABI_enum_unused,
6877 AEABI_enum_short,
6878 AEABI_enum_wide,
6879 AEABI_enum_forced_wide
6880};
6881
104d59d1
JM		 6882/* Determine whether an object attribute tag takes an integer, a
6883 string or both. */
6884static int
6885elf32_arm_obj_attrs_arg_type (int tag)
6886{
6887 if (tag == Tag_compatibility)
6888 return 3;
6889 else if (tag == 4 || tag == 5)
6890 return 2;
6891 else if (tag < 32)
6892 return 1;
6893 else
6894 return (tag & 1) != 0 ? 2 : 1;
6895}
6896
ee065d83
PB		 6897/* Merge EABI object attributes from IBFD into OBFD. Raise an error if there
6898 are conflicting attributes. */
6899static bfd_boolean
6900elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd)
6901{
104d59d1
JM		 6902 obj_attribute *in_attr;
6903 obj_attribute *out_attr;
6904 obj_attribute_list *in_list;
ee065d83
PB		 6905 /* Some tags have 0 = don't care, 1 = strong requirement,
6906 2 = weak requirement. */
6907 static const int order_312[3] = {3, 1, 2};
b1cc4aeb
PB		 6908 /* For use with Tag_VFP_arch. */
6909 static const int order_01243[5] = {0, 1, 2, 4, 3};
ee065d83
PB		 6910 int i;
6911
104d59d1 6912 if (!elf_known_obj_attributes_proc (obfd)[0].i)
ee065d83
PB		 6913 {
6914 /* This is the first object. Copy the attributes. */
104d59d1 6915 _bfd_elf_copy_obj_attributes (ibfd, obfd);
004ae526
PB		 6916
6917 /* Use the Tag_null value to indicate the attributes have been
6918 initialized. */
104d59d1 6919 elf_known_obj_attributes_proc (obfd)[0].i = 1;
004ae526 6920
ee065d83
PB		 6921 return TRUE;
6922 }
6923
104d59d1
JM		 6924 in_attr = elf_known_obj_attributes_proc (ibfd);
6925 out_attr = elf_known_obj_attributes_proc (obfd);
ee065d83
PB		 6926 /* This needs to happen before Tag_ABI_FP_number_model is merged. */
6927 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i)
6928 {
6929 /* Ignore mismatches if teh object doesn't use floating point. */
6930 if (out_attr[Tag_ABI_FP_number_model].i == 0)
6931 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i;
6932 else if (in_attr[Tag_ABI_FP_number_model].i != 0)
6933 {
6934 _bfd_error_handler
6935 (_("ERROR: %B uses VFP register arguments, %B does not"),
6936 ibfd, obfd);
6937 return FALSE;
6938 }
6939 }
6940
104d59d1 6941 for (i = 4; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++)
ee065d83
PB		 6942 {
6943 /* Merge this attribute with existing attributes. */
6944 switch (i)
6945 {
6946 case Tag_CPU_raw_name:
6947 case Tag_CPU_name:
004ae526
PB		 6948 /* Use whichever has the greatest architecture requirements. We
6949 won't necessarily have both the above tags, so make sure input
6950 name is non-NULL. */
6951 if (in_attr[Tag_CPU_arch].i > out_attr[Tag_CPU_arch].i
6952 && in_attr[i].s)
104d59d1 6953 out_attr[i].s = _bfd_elf_attr_strdup (obfd, in_attr[i].s);
ee065d83
PB		 6954 break;
6955
6956 case Tag_ABI_optimization_goals:
6957 case Tag_ABI_FP_optimization_goals:
6958 /* Use the first value seen. */
6959 break;
6960
6961 case Tag_CPU_arch:
6962 case Tag_ARM_ISA_use:
6963 case Tag_THUMB_ISA_use:
ee065d83
PB		 6964 case Tag_WMMX_arch:
6965 case Tag_NEON_arch:
6966 /* ??? Do NEON and WMMX conflict? */
6967 case Tag_ABI_FP_rounding:
6968 case Tag_ABI_FP_denormal:
6969 case Tag_ABI_FP_exceptions:
6970 case Tag_ABI_FP_user_exceptions:
6971 case Tag_ABI_FP_number_model:
6972 case Tag_ABI_align8_preserved:
6973 case Tag_ABI_HardFP_use:
6974 /* Use the largest value specified. */
6975 if (in_attr[i].i > out_attr[i].i)
6976 out_attr[i].i = in_attr[i].i;
6977 break;
6978
6979 case Tag_CPU_arch_profile:
6980 /* Warn if conflicting architecture profiles used. */
6981 if (out_attr[i].i && in_attr[i].i && in_attr[i].i != out_attr[i].i)
6982 {
6983 _bfd_error_handler
6984 (_("ERROR: %B: Conflicting architecture profiles %c/%c"),
6985 ibfd, in_attr[i].i, out_attr[i].i);
6986 return FALSE;
6987 }
6988 if (in_attr[i].i)
6989 out_attr[i].i = in_attr[i].i;
6990 break;
b1cc4aeb
PB		 6991 case Tag_VFP_arch:
6992 if (in_attr[i].i > 4 || out_attr[i].i > 4
6993 || order_01243[in_attr[i].i] > order_01243[out_attr[i].i])
6994 out_attr[i].i = in_attr[i].i;
6995 break;
ee065d83
PB		 6996 case Tag_PCS_config:
6997 if (out_attr[i].i == 0)
6998 out_attr[i].i = in_attr[i].i;
6999 else if (in_attr[i].i != 0 && out_attr[i].i != 0)
7000 {
7001 /* It's sometimes ok to mix different configs, so this is only
7002 a warning. */
7003 _bfd_error_handler
7004 (_("Warning: %B: Conflicting platform configuration"), ibfd);
7005 }
7006 break;
7007 case Tag_ABI_PCS_R9_use:
004ae526
PB		 7008 if (in_attr[i].i != out_attr[i].i
7009 && out_attr[i].i != AEABI_R9_unused
ee065d83
PB		 7010 && in_attr[i].i != AEABI_R9_unused)
7011 {
7012 _bfd_error_handler
7013 (_("ERROR: %B: Conflicting use of R9"), ibfd);
7014 return FALSE;
7015 }
7016 if (out_attr[i].i == AEABI_R9_unused)
7017 out_attr[i].i = in_attr[i].i;
7018 break;
7019 case Tag_ABI_PCS_RW_data:
7020 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel
7021 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB
7022 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused)
7023 {
7024 _bfd_error_handler
7025 (_("ERROR: %B: SB relative addressing conflicts with use of R9"),
7026 ibfd);
7027 return FALSE;
7028 }
7029 /* Use the smallest value specified. */
7030 if (in_attr[i].i < out_attr[i].i)
7031 out_attr[i].i = in_attr[i].i;
7032 break;
7033 case Tag_ABI_PCS_RO_data:
7034 /* Use the smallest value specified. */
7035 if (in_attr[i].i < out_attr[i].i)
7036 out_attr[i].i = in_attr[i].i;
7037 break;
7038 case Tag_ABI_PCS_GOT_use:
7039 if (in_attr[i].i > 2 || out_attr[i].i > 2
7040 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7041 out_attr[i].i = in_attr[i].i;
7042 break;
7043 case Tag_ABI_PCS_wchar_t:
7044 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i)
7045 {
7046 _bfd_error_handler
7047 (_("ERROR: %B: Conflicting definitions of wchar_t"), ibfd);
7048 return FALSE;
7049 }
7050 if (in_attr[i].i)
7051 out_attr[i].i = in_attr[i].i;
7052 break;
7053 case Tag_ABI_align8_needed:
7054 /* ??? Check against Tag_ABI_align8_preserved. */
7055 if (in_attr[i].i > 2 || out_attr[i].i > 2
7056 || order_312[in_attr[i].i] < order_312[out_attr[i].i])
7057 out_attr[i].i = in_attr[i].i;
7058 break;
7059 case Tag_ABI_enum_size:
7060 if (in_attr[i].i != AEABI_enum_unused)
7061 {
7062 if (out_attr[i].i == AEABI_enum_unused
7063 || out_attr[i].i == AEABI_enum_forced_wide)
7064 {
7065 /* The existing object is compatible with anything.
7066 Use whatever requirements the new object has. */
7067 out_attr[i].i = in_attr[i].i;
7068 }
7069 else if (in_attr[i].i != AEABI_enum_forced_wide
bf21ed78 7070 && out_attr[i].i != in_attr[i].i
0ffa91dd 7071 && !elf_arm_tdata (obfd)->no_enum_size_warning)
ee065d83 7072 {
bf21ed78
MS		 7073 const char *aeabi_enum_names[] =
7074 { "", "variable-size", "32-bit", "" };
ee065d83 7075 _bfd_error_handler
bf21ed78
MS		 7076 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"),
7077 ibfd, aeabi_enum_names[in_attr[i].i],
7078 aeabi_enum_names[out_attr[i].i]);
ee065d83
PB		 7079 }
7080 }
7081 break;
7082 case Tag_ABI_VFP_args:
7083 /* Aready done. */
7084 break;
7085 case Tag_ABI_WMMX_args:
7086 if (in_attr[i].i != out_attr[i].i)
7087 {
7088 _bfd_error_handler
7089 (_("ERROR: %B uses iWMMXt register arguments, %B does not"),
7090 ibfd, obfd);
7091 return FALSE;
7092 }
7093 break;
7094 default: /* All known attributes should be explicitly covered. */
7095 abort ();
7096 }
3cfad14c
JM		 7097
7098 if (in_attr[i].type && !out_attr[i].type)
7099 switch (in_attr[i].type)
7100 {
7101 case 1:
7102 if (out_attr[i].i)
7103 out_attr[i].type = 1;
7104 break;
7105
7106 case 2:
7107 if (out_attr[i].s)
7108 out_attr[i].type = 2;
7109 break;
7110
7111 default:
7112 abort ();
7113 }
ee065d83
PB		 7114 }
7115
104d59d1
JM		 7116 /* Merge Tag_compatibility attributes and any common GNU ones. */
7117 _bfd_elf_merge_object_attributes (ibfd, obfd);
ee065d83 7118
104d59d1
JM		 7119 /* Check for any attributes not known on ARM. */
7120 in_list = elf_other_obj_attributes_proc (ibfd);
7121 while (in_list && in_list->tag == Tag_compatibility)
7122 in_list = in_list->next;
ee065d83
PB		 7123
7124 for (; in_list; in_list = in_list->next)
7125 {
7126 if ((in_list->tag & 128) < 64)
eb111b1f
BE		 7127 {
7128 _bfd_error_handler
7129 (_("Warning: %B: Unknown EABI object attribute %d"),
7130 ibfd, in_list->tag);
7131 break;
7132 }
ee065d83 7133 }
b34976b6 7134 return TRUE;
252b5132
RH		 7135}
7136
3a4a14e9
PB		 7137
7138/* Return TRUE if the two EABI versions are incompatible. */
7139
7140static bfd_boolean
7141elf32_arm_versions_compatible (unsigned iver, unsigned over)
7142{
7143 /* v4 and v5 are the same spec before and after it was released,
7144 so allow mixing them. */
7145 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5)
7146 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4))
7147 return TRUE;
7148
7149 return (iver == over);
7150}
7151
252b5132
RH		 7152/* Merge backend specific data from an object file to the output
7153 object file when linking. */
9b485d32 7154
b34976b6 7155static bfd_boolean
57e8b36a 7156elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
252b5132
RH		 7157{
7158 flagword out_flags;
7159 flagword in_flags;
b34976b6 7160 bfd_boolean flags_compatible = TRUE;
cf919dfd 7161 asection *sec;
252b5132 7162
9b485d32 7163 /* Check if we have the same endianess. */
82e51918 7164 if (! _bfd_generic_verify_endian_match (ibfd, obfd))
b34976b6 7165 return FALSE;
1fe494a5 7166
0ffa91dd 7167 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd))
b34976b6 7168 return TRUE;
252b5132 7169
ee065d83
PB		 7170 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd))
7171 return FALSE;
7172
252b5132
RH		 7173 /* The input BFD must have had its flags initialised. */
7174 /* The following seems bogus to me -- The flags are initialized in
7175 the assembler but I don't think an elf_flags_init field is
9b485d32 7176 written into the object. */
252b5132
RH		 7177 /* BFD_ASSERT (elf_flags_init (ibfd)); */
7178
7179 in_flags = elf_elfheader (ibfd)->e_flags;
7180 out_flags = elf_elfheader (obfd)->e_flags;
7181
7182 if (!elf_flags_init (obfd))
7183 {
fe077fa6
NC		 7184 /* If the input is the default architecture and had the default
7185 flags then do not bother setting the flags for the output
7186 architecture, instead allow future merges to do this. If no
7187 future merges ever set these flags then they will retain their
7188 uninitialised values, which surprise surprise, correspond
252b5132 7189 to the default values. */
fe077fa6
NC		 7190 if (bfd_get_arch_info (ibfd)->the_default
7191 && elf_elfheader (ibfd)->e_flags == 0)
b34976b6 7192 return TRUE;
252b5132 7193
b34976b6 7194 elf_flags_init (obfd) = TRUE;
252b5132
RH		 7195 elf_elfheader (obfd)->e_flags = in_flags;
7196
7197 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
7198 && bfd_get_arch_info (obfd)->the_default)
7199 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
7200
b34976b6 7201 return TRUE;
252b5132
RH		 7202 }
7203
5a6c6817
NC		 7204 /* Determine what should happen if the input ARM architecture
7205 does not match the output ARM architecture. */
7206 if (! bfd_arm_merge_machines (ibfd, obfd))
7207 return FALSE;
e16bb312 7208
1006ba19 7209 /* Identical flags must be compatible. */
252b5132 7210 if (in_flags == out_flags)
b34976b6 7211 return TRUE;
252b5132 7212
35a0f415
DJ		 7213 /* Check to see if the input BFD actually contains any sections. If
7214 not, its flags may not have been initialised either, but it
8e3de13a 7215 cannot actually cause any incompatiblity. Do not short-circuit
35a0f415 7216 dynamic objects; their section list may be emptied by
d1f161ea 7217 elf_link_add_object_symbols.
35a0f415 7218
d1f161ea
NC		 7219 Also check to see if there are no code sections in the input.
7220 In this case there is no need to check for code specific flags.
7221 XXX - do we need to worry about floating-point format compatability
7222 in data sections ? */
35a0f415 7223 if (!(ibfd->flags & DYNAMIC))
cf919dfd 7224 {
35a0f415 7225 bfd_boolean null_input_bfd = TRUE;
d1f161ea 7226 bfd_boolean only_data_sections = TRUE;
35a0f415
DJ		 7227
7228 for (sec = ibfd->sections; sec != NULL; sec = sec->next)
cf919dfd 7229 {
35a0f415
DJ		 7230 /* Ignore synthetic glue sections. */
7231 if (strcmp (sec->name, ".glue_7")
7232 && strcmp (sec->name, ".glue_7t"))
7233 {
d1f161ea
NC		 7234 if ((bfd_get_section_flags (ibfd, sec)
7235 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7236 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS))
7237 only_data_sections = FALSE;
7238
35a0f415
DJ		 7239 null_input_bfd = FALSE;
7240 break;
7241 }
cf919dfd 7242 }
d1f161ea
NC		 7243
7244 if (null_input_bfd || only_data_sections)
35a0f415 7245 return TRUE;
cf919dfd 7246 }
cf919dfd 7247
252b5132 7248 /* Complain about various flag mismatches. */
3a4a14e9
PB		 7249 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags),
7250 EF_ARM_EABI_VERSION (out_flags)))
fc830a83 7251 {
d003868e 7252 _bfd_error_handler
3656d5e3 7253 (_("ERROR: Source object %B has EABI version %d, but target %B has EABI version %d"),
d003868e
AM		 7254 ibfd, obfd,
7255 (in_flags & EF_ARM_EABIMASK) >> 24,
7256 (out_flags & EF_ARM_EABIMASK) >> 24);
b34976b6 7257 return FALSE;
fc830a83 7258 }
252b5132 7259
1006ba19 7260 /* Not sure what needs to be checked for EABI versions >= 1. */
00a97672
RS		 7261 /* VxWorks libraries do not use these flags. */
7262 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed
7263 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed
7264 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN)
1006ba19 7265 {
fd2ec330 7266 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26))
1006ba19 7267 {
d003868e
AM		 7268 _bfd_error_handler
7269 (_("ERROR: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"),
7270 ibfd, obfd,
7271 in_flags & EF_ARM_APCS_26 ? 26 : 32,
7272 out_flags & EF_ARM_APCS_26 ? 26 : 32);
b34976b6 7273 flags_compatible = FALSE;
1006ba19 7274 }
252b5132 7275
fd2ec330 7276 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT))
1006ba19 7277 {
5eefb65f 7278 if (in_flags & EF_ARM_APCS_FLOAT)
d003868e
AM		 7279 _bfd_error_handler
7280 (_("ERROR: %B passes floats in float registers, whereas %B passes them in integer registers"),
7281 ibfd, obfd);
5eefb65f 7282 else
d003868e
AM		 7283 _bfd_error_handler
7284 (_("ERROR: %B passes floats in integer registers, whereas %B passes them in float registers"),
7285 ibfd, obfd);
63b0f745 7286
b34976b6 7287 flags_compatible = FALSE;
1006ba19 7288 }
252b5132 7289
96a846ea 7290 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT))
1006ba19 7291 {
96a846ea 7292 if (in_flags & EF_ARM_VFP_FLOAT)
d003868e
AM		 7293 _bfd_error_handler
7294 (_("ERROR: %B uses VFP instructions, whereas %B does not"),
7295 ibfd, obfd);
5eefb65f 7296 else
d003868e
AM		 7297 _bfd_error_handler
7298 (_("ERROR: %B uses FPA instructions, whereas %B does not"),
7299 ibfd, obfd);
fde78edd
NC		 7300
7301 flags_compatible = FALSE;
7302 }
7303
7304 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT))
7305 {
7306 if (in_flags & EF_ARM_MAVERICK_FLOAT)
d003868e
AM		 7307 _bfd_error_handler
7308 (_("ERROR: %B uses Maverick instructions, whereas %B does not"),
7309 ibfd, obfd);
fde78edd 7310 else
d003868e
AM		 7311 _bfd_error_handler
7312 (_("ERROR: %B does not use Maverick instructions, whereas %B does"),
7313 ibfd, obfd);
63b0f745 7314
b34976b6 7315 flags_compatible = FALSE;
1006ba19 7316 }
96a846ea
RE		 7317
7318#ifdef EF_ARM_SOFT_FLOAT
7319 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT))
7320 {
7321 /* We can allow interworking between code that is VFP format
7322 layout, and uses either soft float or integer regs for
7323 passing floating point arguments and results. We already
7324 know that the APCS_FLOAT flags match; similarly for VFP
7325 flags. */
7326 if ((in_flags & EF_ARM_APCS_FLOAT) != 0
7327 || (in_flags & EF_ARM_VFP_FLOAT) == 0)
7328 {
7329 if (in_flags & EF_ARM_SOFT_FLOAT)
d003868e
AM		 7330 _bfd_error_handler
7331 (_("ERROR: %B uses software FP, whereas %B uses hardware FP"),
7332 ibfd, obfd);
96a846ea 7333 else
d003868e
AM		 7334 _bfd_error_handler
7335 (_("ERROR: %B uses hardware FP, whereas %B uses software FP"),
7336 ibfd, obfd);
96a846ea 7337
b34976b6 7338 flags_compatible = FALSE;
96a846ea
RE		 7339 }
7340 }
ee43f35e 7341#endif
252b5132 7342
1006ba19 7343 /* Interworking mismatch is only a warning. */
fd2ec330 7344 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK))
8f615d07 7345 {
e3c8793a
NC		 7346 if (in_flags & EF_ARM_INTERWORK)
7347 {
d003868e
AM		 7348 _bfd_error_handler
7349 (_("Warning: %B supports interworking, whereas %B does not"),
7350 ibfd, obfd);
e3c8793a
NC		 7351 }
7352 else
7353 {
d003868e
AM		 7354 _bfd_error_handler
7355 (_("Warning: %B does not support interworking, whereas %B does"),
7356 ibfd, obfd);
e3c8793a 7357 }
8f615d07 7358 }
252b5132 7359 }
63b0f745 7360
1006ba19 7361 return flags_compatible;
252b5132
RH		 7362}
7363
9b485d32
NC		 7364/* Display the flags field. */
7365
b34976b6 7366static bfd_boolean
57e8b36a 7367elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr)
252b5132 7368{
fc830a83
NC		 7369 FILE * file = (FILE *) ptr;
7370 unsigned long flags;
252b5132
RH		 7371
7372 BFD_ASSERT (abfd != NULL && ptr != NULL);
7373
7374 /* Print normal ELF private data. */
7375 _bfd_elf_print_private_bfd_data (abfd, ptr);
7376
fc830a83 7377 flags = elf_elfheader (abfd)->e_flags;
9b485d32
NC		 7378 /* Ignore init flag - it may not be set, despite the flags field
7379 containing valid data. */
252b5132
RH		 7380
7381 /* xgettext:c-format */
9b485d32 7382 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags);
252b5132 7383
fc830a83
NC		 7384 switch (EF_ARM_EABI_VERSION (flags))
7385 {
7386 case EF_ARM_EABI_UNKNOWN:
4cc11e76 7387 /* The following flag bits are GNU extensions and not part of the
fc830a83
NC		 7388 official ARM ELF extended ABI. Hence they are only decoded if
7389 the EABI version is not set. */
fd2ec330 7390 if (flags & EF_ARM_INTERWORK)
9b485d32 7391 fprintf (file, _(" [interworking enabled]"));
9a5aca8c 7392
fd2ec330 7393 if (flags & EF_ARM_APCS_26)
6c571f00 7394 fprintf (file, " [APCS-26]");
fc830a83 7395 else
6c571f00 7396 fprintf (file, " [APCS-32]");
9a5aca8c 7397
96a846ea
RE		 7398 if (flags & EF_ARM_VFP_FLOAT)
7399 fprintf (file, _(" [VFP float format]"));
fde78edd
NC		 7400 else if (flags & EF_ARM_MAVERICK_FLOAT)
7401 fprintf (file, _(" [Maverick float format]"));
96a846ea
RE		 7402 else
7403 fprintf (file, _(" [FPA float format]"));
7404
fd2ec330 7405 if (flags & EF_ARM_APCS_FLOAT)
9b485d32 7406 fprintf (file, _(" [floats passed in float registers]"));
9a5aca8c 7407
fd2ec330 7408 if (flags & EF_ARM_PIC)
9b485d32 7409 fprintf (file, _(" [position independent]"));
fc830a83 7410
fd2ec330 7411 if (flags & EF_ARM_NEW_ABI)
9b485d32 7412 fprintf (file, _(" [new ABI]"));
9a5aca8c 7413
fd2ec330 7414 if (flags & EF_ARM_OLD_ABI)
9b485d32 7415 fprintf (file, _(" [old ABI]"));
9a5aca8c 7416
fd2ec330 7417 if (flags & EF_ARM_SOFT_FLOAT)
9b485d32 7418 fprintf (file, _(" [software FP]"));
9a5aca8c 7419
96a846ea
RE		 7420 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT
7421 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI
fde78edd
NC		 7422 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT
7423 | EF_ARM_MAVERICK_FLOAT);
fc830a83 7424 break;
9a5aca8c 7425
fc830a83 7426 case EF_ARM_EABI_VER1:
9b485d32 7427 fprintf (file, _(" [Version1 EABI]"));
9a5aca8c 7428
fc830a83 7429 if (flags & EF_ARM_SYMSARESORTED)
9b485d32 7430 fprintf (file, _(" [sorted symbol table]"));
fc830a83 7431 else
9b485d32 7432 fprintf (file, _(" [unsorted symbol table]"));
9a5aca8c 7433
fc830a83
NC		 7434 flags &= ~ EF_ARM_SYMSARESORTED;
7435 break;
9a5aca8c 7436
fd2ec330
PB		 7437 case EF_ARM_EABI_VER2:
7438 fprintf (file, _(" [Version2 EABI]"));
7439
7440 if (flags & EF_ARM_SYMSARESORTED)
7441 fprintf (file, _(" [sorted symbol table]"));
7442 else
7443 fprintf (file, _(" [unsorted symbol table]"));
7444
7445 if (flags & EF_ARM_DYNSYMSUSESEGIDX)
7446 fprintf (file, _(" [dynamic symbols use segment index]"));
7447
7448 if (flags & EF_ARM_MAPSYMSFIRST)
7449 fprintf (file, _(" [mapping symbols precede others]"));
7450
99e4ae17 7451 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX
fd2ec330
PB		 7452 | EF_ARM_MAPSYMSFIRST);
7453 break;
7454
d507cf36
PB		 7455 case EF_ARM_EABI_VER3:
7456 fprintf (file, _(" [Version3 EABI]"));
8cb51566
PB		 7457 break;
7458
7459 case EF_ARM_EABI_VER4:
7460 fprintf (file, _(" [Version4 EABI]"));
3a4a14e9 7461 goto eabi;
d507cf36 7462
3a4a14e9
PB		 7463 case EF_ARM_EABI_VER5:
7464 fprintf (file, _(" [Version5 EABI]"));
7465 eabi:
d507cf36
PB		 7466 if (flags & EF_ARM_BE8)
7467 fprintf (file, _(" [BE8]"));
7468
7469 if (flags & EF_ARM_LE8)
7470 fprintf (file, _(" [LE8]"));
7471
7472 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8);
7473 break;
7474
fc830a83 7475 default:
9b485d32 7476 fprintf (file, _(" <EABI version unrecognised>"));
fc830a83
NC		 7477 break;
7478 }
252b5132 7479
fc830a83 7480 flags &= ~ EF_ARM_EABIMASK;
252b5132 7481
fc830a83 7482 if (flags & EF_ARM_RELEXEC)
9b485d32 7483 fprintf (file, _(" [relocatable executable]"));
252b5132 7484
fc830a83 7485 if (flags & EF_ARM_HASENTRY)
9b485d32 7486 fprintf (file, _(" [has entry point]"));
252b5132 7487
fc830a83
NC		 7488 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY);
7489
7490 if (flags)
9b485d32 7491 fprintf (file, _("<Unrecognised flag bits set>"));
9a5aca8c 7492
252b5132
RH		 7493 fputc ('\n', file);
7494
b34976b6 7495 return TRUE;
252b5132
RH		 7496}
7497
7498static int
57e8b36a 7499elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type)
252b5132 7500{
2f0ca46a
NC		 7501 switch (ELF_ST_TYPE (elf_sym->st_info))
7502 {
7503 case STT_ARM_TFUNC:
7504 return ELF_ST_TYPE (elf_sym->st_info);
ce855c42 7505
2f0ca46a
NC		 7506 case STT_ARM_16BIT:
7507 /* If the symbol is not an object, return the STT_ARM_16BIT flag.
7508 This allows us to distinguish between data used by Thumb instructions
7509 and non-data (which is probably code) inside Thumb regions of an
7510 executable. */
1a0eb693 7511 if (type != STT_OBJECT && type != STT_TLS)
2f0ca46a
NC		 7512 return ELF_ST_TYPE (elf_sym->st_info);
7513 break;
9a5aca8c 7514
ce855c42
NC		 7515 default:
7516 break;
2f0ca46a
NC		 7517 }
7518
7519 return type;
252b5132 7520}
f21f3fe0 7521
252b5132 7522static asection *
07adf181
AM		 7523elf32_arm_gc_mark_hook (asection *sec,
7524 struct bfd_link_info *info,
7525 Elf_Internal_Rela *rel,
7526 struct elf_link_hash_entry *h,
7527 Elf_Internal_Sym *sym)
252b5132
RH		 7528{
7529 if (h != NULL)
07adf181 7530 switch (ELF32_R_TYPE (rel->r_info))
252b5132
RH		 7531 {
7532 case R_ARM_GNU_VTINHERIT:
7533 case R_ARM_GNU_VTENTRY:
07adf181
AM		 7534 return NULL;
7535 }
9ad5cbcf 7536
07adf181 7537 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
252b5132
RH		 7538}
7539
780a67af
NC		 7540/* Update the got entry reference counts for the section being removed. */
7541
b34976b6 7542static bfd_boolean
ba93b8ac
DJ		 7543elf32_arm_gc_sweep_hook (bfd * abfd,
7544 struct bfd_link_info * info,
7545 asection * sec,
7546 const Elf_Internal_Rela * relocs)
252b5132 7547{
5e681ec4
PB		 7548 Elf_Internal_Shdr *symtab_hdr;
7549 struct elf_link_hash_entry **sym_hashes;
7550 bfd_signed_vma *local_got_refcounts;
7551 const Elf_Internal_Rela *rel, *relend;
eb043451
PB		 7552 struct elf32_arm_link_hash_table * globals;
7553
7dda2462
TG		 7554 if (info->relocatable)
7555 return TRUE;
7556
eb043451 7557 globals = elf32_arm_hash_table (info);
5e681ec4
PB		 7558
7559 elf_section_data (sec)->local_dynrel = NULL;
7560
0ffa91dd 7561 symtab_hdr = & elf_symtab_hdr (abfd);
5e681ec4
PB		 7562 sym_hashes = elf_sym_hashes (abfd);
7563 local_got_refcounts = elf_local_got_refcounts (abfd);
7564
bd97cb95
DJ		 7565 check_use_blx(globals);
7566
5e681ec4
PB		 7567 relend = relocs + sec->reloc_count;
7568 for (rel = relocs; rel < relend; rel++)
eb043451 7569 {
3eb128b2
AM		 7570 unsigned long r_symndx;
7571 struct elf_link_hash_entry *h = NULL;
eb043451 7572 int r_type;
5e681ec4 7573
3eb128b2
AM		 7574 r_symndx = ELF32_R_SYM (rel->r_info);
7575 if (r_symndx >= symtab_hdr->sh_info)
7576 {
7577 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7578 while (h->root.type == bfd_link_hash_indirect
7579 || h->root.type == bfd_link_hash_warning)
7580 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7581 }
7582
eb043451 7583 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7584 r_type = arm_real_reloc_type (globals, r_type);
eb043451
PB		 7585 switch (r_type)
7586 {
7587 case R_ARM_GOT32:
eb043451 7588 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7589 case R_ARM_TLS_GD32:
7590 case R_ARM_TLS_IE32:
3eb128b2 7591 if (h != NULL)
eb043451 7592 {
eb043451
PB		 7593 if (h->got.refcount > 0)
7594 h->got.refcount -= 1;
7595 }
7596 else if (local_got_refcounts != NULL)
7597 {
7598 if (local_got_refcounts[r_symndx] > 0)
7599 local_got_refcounts[r_symndx] -= 1;
7600 }
7601 break;
7602
ba93b8ac
DJ		 7603 case R_ARM_TLS_LDM32:
7604 elf32_arm_hash_table (info)->tls_ldm_got.refcount -= 1;
7605 break;
7606
eb043451 7607 case R_ARM_ABS32:
bb224fc3 7608 case R_ARM_ABS32_NOI:
eb043451 7609 case R_ARM_REL32:
bb224fc3 7610 case R_ARM_REL32_NOI:
eb043451
PB		 7611 case R_ARM_PC24:
7612 case R_ARM_PLT32:
5b5bb741
PB		 7613 case R_ARM_CALL:
7614 case R_ARM_JUMP24:
eb043451 7615 case R_ARM_PREL31:
c19d1205 7616 case R_ARM_THM_CALL:
bd97cb95
DJ		 7617 case R_ARM_THM_JUMP24:
7618 case R_ARM_THM_JUMP19:
b6895b4f
PB		 7619 case R_ARM_MOVW_ABS_NC:
7620 case R_ARM_MOVT_ABS:
7621 case R_ARM_MOVW_PREL_NC:
7622 case R_ARM_MOVT_PREL:
7623 case R_ARM_THM_MOVW_ABS_NC:
7624 case R_ARM_THM_MOVT_ABS:
7625 case R_ARM_THM_MOVW_PREL_NC:
7626 case R_ARM_THM_MOVT_PREL:
b7693d02
DJ		 7627 /* Should the interworking branches be here also? */
7628
3eb128b2 7629 if (h != NULL)
eb043451
PB		 7630 {
7631 struct elf32_arm_link_hash_entry *eh;
7632 struct elf32_arm_relocs_copied **pp;
7633 struct elf32_arm_relocs_copied *p;
5e681ec4 7634
b7693d02 7635 eh = (struct elf32_arm_link_hash_entry *) h;
5e681ec4 7636
eb043451 7637 if (h->plt.refcount > 0)
b7693d02
DJ		 7638 {
7639 h->plt.refcount -= 1;
bd97cb95
DJ		 7640 if (r_type == R_ARM_THM_CALL)
7641 eh->plt_maybe_thumb_refcount--;
7642
7643 if (r_type == R_ARM_THM_JUMP24
7644 || r_type == R_ARM_THM_JUMP19)
b7693d02
DJ		 7645 eh->plt_thumb_refcount--;
7646 }
5e681ec4 7647
eb043451 7648 if (r_type == R_ARM_ABS32
bb224fc3
MS		 7649 || r_type == R_ARM_REL32
7650 || r_type == R_ARM_ABS32_NOI
7651 || r_type == R_ARM_REL32_NOI)
eb043451 7652 {
eb043451
PB		 7653 for (pp = &eh->relocs_copied; (p = *pp) != NULL;
7654 pp = &p->next)
7655 if (p->section == sec)
7656 {
7657 p->count -= 1;
bb224fc3
MS		 7658 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32
7659 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI)
ba93b8ac 7660 p->pc_count -= 1;
eb043451
PB		 7661 if (p->count == 0)
7662 *pp = p->next;
7663 break;
7664 }
7665 }
7666 }
7667 break;
5e681ec4 7668
eb043451
PB		 7669 default:
7670 break;
7671 }
7672 }
5e681ec4 7673
b34976b6 7674 return TRUE;
252b5132
RH		 7675}
7676
780a67af
NC		 7677/* Look through the relocs for a section during the first phase. */
7678
b34976b6 7679static bfd_boolean
57e8b36a
NC		 7680elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info,
7681 asection *sec, const Elf_Internal_Rela *relocs)
252b5132 7682{
b34976b6
AM		 7683 Elf_Internal_Shdr *symtab_hdr;
7684 struct elf_link_hash_entry **sym_hashes;
b34976b6
AM		 7685 const Elf_Internal_Rela *rel;
7686 const Elf_Internal_Rela *rel_end;
7687 bfd *dynobj;
5e681ec4 7688 asection *sreloc;
b34976b6 7689 bfd_vma *local_got_offsets;
5e681ec4 7690 struct elf32_arm_link_hash_table *htab;
39623e12 7691 bfd_boolean needs_plt;
9a5aca8c 7692
1049f94e 7693 if (info->relocatable)
b34976b6 7694 return TRUE;
9a5aca8c 7695
0ffa91dd
NC		 7696 BFD_ASSERT (is_arm_elf (abfd));
7697
5e681ec4
PB		 7698 htab = elf32_arm_hash_table (info);
7699 sreloc = NULL;
9a5aca8c 7700
67687978
PB		 7701 /* Create dynamic sections for relocatable executables so that we can
7702 copy relocations. */
7703 if (htab->root.is_relocatable_executable
7704 && ! htab->root.dynamic_sections_created)
7705 {
7706 if (! _bfd_elf_link_create_dynamic_sections (abfd, info))
7707 return FALSE;
7708 }
7709
252b5132
RH		 7710 dynobj = elf_hash_table (info)->dynobj;
7711 local_got_offsets = elf_local_got_offsets (abfd);
f21f3fe0 7712
0ffa91dd 7713 symtab_hdr = & elf_symtab_hdr (abfd);
252b5132 7714 sym_hashes = elf_sym_hashes (abfd);
9b485d32 7715
252b5132
RH		 7716 rel_end = relocs + sec->reloc_count;
7717 for (rel = relocs; rel < rel_end; rel++)
7718 {
7719 struct elf_link_hash_entry *h;
b7693d02 7720 struct elf32_arm_link_hash_entry *eh;
252b5132 7721 unsigned long r_symndx;
eb043451 7722 int r_type;
9a5aca8c 7723
252b5132 7724 r_symndx = ELF32_R_SYM (rel->r_info);
eb043451 7725 r_type = ELF32_R_TYPE (rel->r_info);
eb043451 7726 r_type = arm_real_reloc_type (htab, r_type);
ba93b8ac
DJ		 7727
7728 if (r_symndx >= NUM_SHDR_ENTRIES (symtab_hdr))
7729 {
7730 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd,
7731 r_symndx);
7732 return FALSE;
7733 }
7734
252b5132
RH		 7735 if (r_symndx < symtab_hdr->sh_info)
7736 h = NULL;
7737 else
973a3492
L		 7738 {
7739 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
7740 while (h->root.type == bfd_link_hash_indirect
7741 || h->root.type == bfd_link_hash_warning)
7742 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7743 }
9a5aca8c 7744
b7693d02
DJ		 7745 eh = (struct elf32_arm_link_hash_entry *) h;
7746
eb043451 7747 switch (r_type)
252b5132 7748 {
5e681ec4 7749 case R_ARM_GOT32:
eb043451 7750 case R_ARM_GOT_PREL:
ba93b8ac
DJ		 7751 case R_ARM_TLS_GD32:
7752 case R_ARM_TLS_IE32:
5e681ec4 7753 /* This symbol requires a global offset table entry. */
ba93b8ac
DJ		 7754 {
7755 int tls_type, old_tls_type;
5e681ec4 7756
ba93b8ac
DJ		 7757 switch (r_type)
7758 {
7759 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break;
7760 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break;
7761 default: tls_type = GOT_NORMAL; break;
7762 }
252b5132 7763
ba93b8ac
DJ		 7764 if (h != NULL)
7765 {
7766 h->got.refcount++;
7767 old_tls_type = elf32_arm_hash_entry (h)->tls_type;
7768 }
7769 else
7770 {
7771 bfd_signed_vma *local_got_refcounts;
7772
7773 /* This is a global offset table entry for a local symbol. */
7774 local_got_refcounts = elf_local_got_refcounts (abfd);
7775 if (local_got_refcounts == NULL)
7776 {
7777 bfd_size_type size;
7778
7779 size = symtab_hdr->sh_info;
7780 size *= (sizeof (bfd_signed_vma) + sizeof(char));
7781 local_got_refcounts = bfd_zalloc (abfd, size);
7782 if (local_got_refcounts == NULL)
7783 return FALSE;
7784 elf_local_got_refcounts (abfd) = local_got_refcounts;
7785 elf32_arm_local_got_tls_type (abfd)
7786 = (char *) (local_got_refcounts + symtab_hdr->sh_info);
7787 }
7788 local_got_refcounts[r_symndx] += 1;
7789 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx];
7790 }
7791
7792 /* We will already have issued an error message if there is a
7793 TLS / non-TLS mismatch, based on the symbol type. We don't
7794 support any linker relaxations. So just combine any TLS
7795 types needed. */
7796 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
7797 && tls_type != GOT_NORMAL)
7798 tls_type |= old_tls_type;
7799
7800 if (old_tls_type != tls_type)
7801 {
7802 if (h != NULL)
7803 elf32_arm_hash_entry (h)->tls_type = tls_type;
7804 else
7805 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type;
7806 }
7807 }
7808 /* Fall through */
7809
7810 case R_ARM_TLS_LDM32:
7811 if (r_type == R_ARM_TLS_LDM32)
7812 htab->tls_ldm_got.refcount++;
7813 /* Fall through */
252b5132 7814
c19d1205 7815 case R_ARM_GOTOFF32:
5e681ec4
PB		 7816 case R_ARM_GOTPC:
7817 if (htab->sgot == NULL)
7818 {
7819 if (htab->root.dynobj == NULL)
7820 htab->root.dynobj = abfd;
7821 if (!create_got_section (htab->root.dynobj, info))
7822 return FALSE;
7823 }
252b5132
RH		 7824 break;
7825
00a97672
RS		 7826 case R_ARM_ABS12:
7827 /* VxWorks uses dynamic R_ARM_ABS12 relocations for
7828 ldr __GOTT_INDEX__ offsets. */
7829 if (!htab->vxworks_p)
7830 break;
7831 /* Fall through */
7832
252b5132 7833 case R_ARM_PC24:
7359ea65 7834 case R_ARM_PLT32:
5b5bb741
PB		 7835 case R_ARM_CALL:
7836 case R_ARM_JUMP24:
eb043451 7837 case R_ARM_PREL31:
c19d1205 7838 case R_ARM_THM_CALL:
bd97cb95
DJ		 7839 case R_ARM_THM_JUMP24:
7840 case R_ARM_THM_JUMP19:
39623e12
PB		 7841 needs_plt = 1;
7842 goto normal_reloc;
7843
7844 case R_ARM_ABS32:
7845 case R_ARM_ABS32_NOI:
7846 case R_ARM_REL32:
7847 case R_ARM_REL32_NOI:
b6895b4f
PB		 7848 case R_ARM_MOVW_ABS_NC:
7849 case R_ARM_MOVT_ABS:
7850 case R_ARM_MOVW_PREL_NC:
7851 case R_ARM_MOVT_PREL:
7852 case R_ARM_THM_MOVW_ABS_NC:
7853 case R_ARM_THM_MOVT_ABS:
7854 case R_ARM_THM_MOVW_PREL_NC:
7855 case R_ARM_THM_MOVT_PREL:
39623e12
PB		 7856 needs_plt = 0;
7857 normal_reloc:
7858
b7693d02 7859 /* Should the interworking branches be listed here? */
7359ea65 7860 if (h != NULL)
5e681ec4
PB		 7861 {
7862 /* If this reloc is in a read-only section, we might
7863 need a copy reloc. We can't check reliably at this
7864 stage whether the section is read-only, as input
7865 sections have not yet been mapped to output sections.
7866 Tentatively set the flag for now, and correct in
7867 adjust_dynamic_symbol. */
7359ea65 7868 if (!info->shared)
f5385ebf 7869 h->non_got_ref = 1;
7359ea65 7870
5e681ec4 7871 /* We may need a .plt entry if the function this reloc
c84cd8ee
DJ		 7872 refers to is in a different object. We can't tell for
7873 sure yet, because something later might force the
7874 symbol local. */
39623e12 7875 if (needs_plt)
f5385ebf 7876 h->needs_plt = 1;
4f199be3
DJ		 7877
7878 /* If we create a PLT entry, this relocation will reference
7879 it, even if it's an ABS32 relocation. */
7880 h->plt.refcount += 1;
b7693d02 7881
bd97cb95
DJ		 7882 /* It's too early to use htab->use_blx here, so we have to
7883 record possible blx references separately from
7884 relocs that definitely need a thumb stub. */
7885
c19d1205 7886 if (r_type == R_ARM_THM_CALL)
bd97cb95
DJ		 7887 eh->plt_maybe_thumb_refcount += 1;
7888
7889 if (r_type == R_ARM_THM_JUMP24
7890 || r_type == R_ARM_THM_JUMP19)
b7693d02 7891 eh->plt_thumb_refcount += 1;
5e681ec4
PB		 7892 }
7893
67687978
PB		 7894 /* If we are creating a shared library or relocatable executable,
7895 and this is a reloc against a global symbol, or a non PC
7896 relative reloc against a local symbol, then we need to copy
7897 the reloc into the shared library. However, if we are linking
7898 with -Bsymbolic, we do not need to copy a reloc against a
252b5132
RH		 7899 global symbol which is defined in an object we are
7900 including in the link (i.e., DEF_REGULAR is set). At
7901 this point we have not seen all the input files, so it is
7902 possible that DEF_REGULAR is not set now but will be set
7903 later (it is never cleared). We account for that
7904 possibility below by storing information in the
5e681ec4 7905 relocs_copied field of the hash table entry. */
67687978 7906 if ((info->shared || htab->root.is_relocatable_executable)
5e681ec4 7907 && (sec->flags & SEC_ALLOC) != 0
bb224fc3 7908 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI)
71a976dd
DJ		 7909 || (h != NULL && ! h->needs_plt
7910 && (! info->symbolic || ! h->def_regular))))
252b5132 7911 {
5e681ec4
PB		 7912 struct elf32_arm_relocs_copied *p, **head;
7913
252b5132
RH		 7914 /* When creating a shared object, we must copy these
7915 reloc types into the output file. We create a reloc
7916 section in dynobj and make room for this reloc. */
7917 if (sreloc == NULL)
7918 {
7919 const char * name;
7920
7921 name = (bfd_elf_string_from_elf_section
7922 (abfd,
7923 elf_elfheader (abfd)->e_shstrndx,
7924 elf_section_data (sec)->rel_hdr.sh_name));
7925 if (name == NULL)
b34976b6 7926 return FALSE;
252b5132 7927
00a97672 7928 BFD_ASSERT (reloc_section_p (htab, name, sec));
252b5132
RH		 7929
7930 sreloc = bfd_get_section_by_name (dynobj, name);
7931 if (sreloc == NULL)
7932 {
7933 flagword flags;
7934
252b5132
RH		 7935 flags = (SEC_HAS_CONTENTS | SEC_READONLY
7936 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
e5a52504
MM		 7937 if ((sec->flags & SEC_ALLOC) != 0
7938 /* BPABI objects never have dynamic
7939 relocations mapped. */
7940 && !htab->symbian_p)
252b5132 7941 flags |= SEC_ALLOC | SEC_LOAD;
3496cb2a
L		 7942 sreloc = bfd_make_section_with_flags (dynobj,
7943 name,
7944 flags);
252b5132 7945 if (sreloc == NULL
252b5132 7946 || ! bfd_set_section_alignment (dynobj, sreloc, 2))
b34976b6 7947 return FALSE;
252b5132 7948 }
5e681ec4
PB		 7949
7950 elf_section_data (sec)->sreloc = sreloc;
252b5132
RH		 7951 }
7952
5e681ec4
PB		 7953 /* If this is a global symbol, we count the number of
7954 relocations we need for this symbol. */
7955 if (h != NULL)
252b5132 7956 {
5e681ec4
PB		 7957 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied;
7958 }
7959 else
7960 {
7961 /* Track dynamic relocs needed for local syms too.
7962 We really need local syms available to do this
7963 easily. Oh well. */
57e8b36a 7964
5e681ec4 7965 asection *s;
6edfbbad
DJ		 7966 void *vpp;
7967
5e681ec4
PB		 7968 s = bfd_section_from_r_symndx (abfd, &htab->sym_sec,
7969 sec, r_symndx);
7970 if (s == NULL)
7971 return FALSE;
57e8b36a 7972
6edfbbad
DJ		 7973 vpp = &elf_section_data (s)->local_dynrel;
7974 head = (struct elf32_arm_relocs_copied **) vpp;
5e681ec4 7975 }
57e8b36a 7976
5e681ec4
PB		 7977 p = *head;
7978 if (p == NULL || p->section != sec)
7979 {
7980 bfd_size_type amt = sizeof *p;
57e8b36a 7981
5e681ec4 7982 p = bfd_alloc (htab->root.dynobj, amt);
252b5132 7983 if (p == NULL)
5e681ec4
PB		 7984 return FALSE;
7985 p->next = *head;
7986 *head = p;
7987 p->section = sec;
7988 p->count = 0;
ba93b8ac 7989 p->pc_count = 0;
252b5132 7990 }
57e8b36a 7991
bb224fc3 7992 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI)
ba93b8ac 7993 p->pc_count += 1;
71a976dd 7994 p->count += 1;
252b5132
RH		 7995 }
7996 break;
7997
7998 /* This relocation describes the C++ object vtable hierarchy.
7999 Reconstruct it for later use during GC. */
8000 case R_ARM_GNU_VTINHERIT:
c152c796 8001 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 8002 return FALSE;
252b5132 8003 break;
9a5aca8c 8004
252b5132
RH		 8005 /* This relocation describes which C++ vtable entries are actually
8006 used. Record for later use during GC. */
8007 case R_ARM_GNU_VTENTRY:
d17e0c6e
JB		 8008 BFD_ASSERT (h != NULL);
8009 if (h != NULL
8010 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
b34976b6 8011 return FALSE;
252b5132
RH		 8012 break;
8013 }
8014 }
f21f3fe0 8015
b34976b6 8016 return TRUE;
252b5132
RH		 8017}
8018
6a5bb875
PB		 8019/* Unwinding tables are not referenced directly. This pass marks them as
8020 required if the corresponding code section is marked. */
8021
8022static bfd_boolean
8023elf32_arm_gc_mark_extra_sections(struct bfd_link_info *info,
8024 elf_gc_mark_hook_fn gc_mark_hook)
8025{
8026 bfd *sub;
8027 Elf_Internal_Shdr **elf_shdrp;
8028 bfd_boolean again;
8029
8030 /* Marking EH data may cause additional code sections to be marked,
8031 requiring multiple passes. */
8032 again = TRUE;
8033 while (again)
8034 {
8035 again = FALSE;
8036 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next)
8037 {
8038 asection *o;
8039
0ffa91dd 8040 if (! is_arm_elf (sub))
6a5bb875
PB		 8041 continue;
8042
8043 elf_shdrp = elf_elfsections (sub);
8044 for (o = sub->sections; o != NULL; o = o->next)
8045 {
8046 Elf_Internal_Shdr *hdr;
0ffa91dd 8047
6a5bb875 8048 hdr = &elf_section_data (o)->this_hdr;
4fbb74a6
AM		 8049 if (hdr->sh_type == SHT_ARM_EXIDX
8050 && hdr->sh_link
8051 && hdr->sh_link < elf_numsections (sub)
6a5bb875
PB		 8052 && !o->gc_mark
8053 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark)
8054 {
8055 again = TRUE;
8056 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook))
8057 return FALSE;
8058 }
8059 }
8060 }
8061 }
8062
8063 return TRUE;
8064}
8065
3c9458e9
NC		 8066/* Treat mapping symbols as special target symbols. */
8067
8068static bfd_boolean
8069elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym)
8070{
b0796911
PB		 8071 return bfd_is_arm_special_symbol_name (sym->name,
8072 BFD_ARM_SPECIAL_SYM_TYPE_ANY);
3c9458e9
NC		 8073}
8074
0367ecfb
NC		 8075/* This is a copy of elf_find_function() from elf.c except that
8076 ARM mapping symbols are ignored when looking for function names
8077 and STT_ARM_TFUNC is considered to a function type. */
252b5132 8078
0367ecfb
NC		 8079static bfd_boolean
8080arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED,
8081 asection * section,
8082 asymbol ** symbols,
8083 bfd_vma offset,
8084 const char ** filename_ptr,
8085 const char ** functionname_ptr)
8086{
8087 const char * filename = NULL;
8088 asymbol * func = NULL;
8089 bfd_vma low_func = 0;
8090 asymbol ** p;
252b5132
RH		 8091
8092 for (p = symbols; *p != NULL; p++)
8093 {
8094 elf_symbol_type *q;
8095
8096 q = (elf_symbol_type *) *p;
8097
252b5132
RH		 8098 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info))
8099 {
8100 default:
8101 break;
8102 case STT_FILE:
8103 filename = bfd_asymbol_name (&q->symbol);
8104 break;
252b5132
RH		 8105 case STT_FUNC:
8106 case STT_ARM_TFUNC:
9d2da7ca 8107 case STT_NOTYPE:
b0796911 8108 /* Skip mapping symbols. */
0367ecfb 8109 if ((q->symbol.flags & BSF_LOCAL)
b0796911
PB		 8110 && bfd_is_arm_special_symbol_name (q->symbol.name,
8111 BFD_ARM_SPECIAL_SYM_TYPE_ANY))
0367ecfb
NC		 8112 continue;
8113 /* Fall through. */
6b40fcba 8114 if (bfd_get_section (&q->symbol) == section
252b5132
RH		 8115 && q->symbol.value >= low_func
8116 && q->symbol.value <= offset)
8117 {
8118 func = (asymbol *) q;
8119 low_func = q->symbol.value;
8120 }
8121 break;
8122 }
8123 }
8124
8125 if (func == NULL)
b34976b6 8126 return FALSE;
252b5132 8127
0367ecfb
NC		 8128 if (filename_ptr)
8129 *filename_ptr = filename;
8130 if (functionname_ptr)
8131 *functionname_ptr = bfd_asymbol_name (func);
8132
8133 return TRUE;
8134}
8135
8136
8137/* Find the nearest line to a particular section and offset, for error
8138 reporting. This code is a duplicate of the code in elf.c, except
8139 that it uses arm_elf_find_function. */
8140
8141static bfd_boolean
8142elf32_arm_find_nearest_line (bfd * abfd,
8143 asection * section,
8144 asymbol ** symbols,
8145 bfd_vma offset,
8146 const char ** filename_ptr,
8147 const char ** functionname_ptr,
8148 unsigned int * line_ptr)
8149{
8150 bfd_boolean found = FALSE;
8151
8152 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */
8153
8154 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset,
8155 filename_ptr, functionname_ptr,
8156 line_ptr, 0,
8157 & elf_tdata (abfd)->dwarf2_find_line_info))
8158 {
8159 if (!*functionname_ptr)
8160 arm_elf_find_function (abfd, section, symbols, offset,
8161 *filename_ptr ? NULL : filename_ptr,
8162 functionname_ptr);
f21f3fe0 8163
0367ecfb
NC		 8164 return TRUE;
8165 }
8166
8167 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset,
8168 & found, filename_ptr,
8169 functionname_ptr, line_ptr,
8170 & elf_tdata (abfd)->line_info))
8171 return FALSE;
8172
8173 if (found && (*functionname_ptr || *line_ptr))
8174 return TRUE;
8175
8176 if (symbols == NULL)
8177 return FALSE;
8178
8179 if (! arm_elf_find_function (abfd, section, symbols, offset,
8180 filename_ptr, functionname_ptr))
8181 return FALSE;
8182
8183 *line_ptr = 0;
b34976b6 8184 return TRUE;
252b5132
RH		 8185}
8186
4ab527b0
FF		 8187static bfd_boolean
8188elf32_arm_find_inliner_info (bfd * abfd,
8189 const char ** filename_ptr,
8190 const char ** functionname_ptr,
8191 unsigned int * line_ptr)
8192{
8193 bfd_boolean found;
8194 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr,
8195 functionname_ptr, line_ptr,
8196 & elf_tdata (abfd)->dwarf2_find_line_info);
8197 return found;
8198}
8199
252b5132
RH		 8200/* Adjust a symbol defined by a dynamic object and referenced by a
8201 regular object. The current definition is in some section of the
8202 dynamic object, but we're not including those sections. We have to
8203 change the definition to something the rest of the link can
8204 understand. */
8205
b34976b6 8206static bfd_boolean
57e8b36a
NC		 8207elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info,
8208 struct elf_link_hash_entry * h)
252b5132
RH		 8209{
8210 bfd * dynobj;
8211 asection * s;
b7693d02 8212 struct elf32_arm_link_hash_entry * eh;
67687978 8213 struct elf32_arm_link_hash_table *globals;
252b5132 8214
67687978 8215 globals = elf32_arm_hash_table (info);
252b5132
RH		 8216 dynobj = elf_hash_table (info)->dynobj;
8217
8218 /* Make sure we know what is going on here. */
8219 BFD_ASSERT (dynobj != NULL
f5385ebf 8220 && (h->needs_plt
f6e332e6 8221 || h->u.weakdef != NULL
f5385ebf
AM		 8222 || (h->def_dynamic
8223 && h->ref_regular
8224 && !h->def_regular)));
252b5132 8225
b7693d02
DJ		 8226 eh = (struct elf32_arm_link_hash_entry *) h;
8227
252b5132
RH		 8228 /* If this is a function, put it in the procedure linkage table. We
8229 will fill in the contents of the procedure linkage table later,
8230 when we know the address of the .got section. */
b7693d02 8231 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC
f5385ebf 8232 || h->needs_plt)
252b5132 8233 {
5e681ec4
PB		 8234 if (h->plt.refcount <= 0
8235 || SYMBOL_CALLS_LOCAL (info, h)
8236 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT
8237 && h->root.type == bfd_link_hash_undefweak))
252b5132
RH		 8238 {
8239 /* This case can occur if we saw a PLT32 reloc in an input
5e681ec4
PB		 8240 file, but the symbol was never referred to by a dynamic
8241 object, or if all references were garbage collected. In
8242 such a case, we don't actually need to build a procedure
8243 linkage table, and we can just do a PC24 reloc instead. */
8244 h->plt.offset = (bfd_vma) -1;
b7693d02 8245 eh->plt_thumb_refcount = 0;
bd97cb95 8246 eh->plt_maybe_thumb_refcount = 0;
f5385ebf 8247 h->needs_plt = 0;
252b5132
RH		 8248 }
8249
b34976b6 8250 return TRUE;
252b5132 8251 }
5e681ec4 8252 else
b7693d02
DJ		 8253 {
8254 /* It's possible that we incorrectly decided a .plt reloc was
8255 needed for an R_ARM_PC24 or similar reloc to a non-function sym
8256 in check_relocs. We can't decide accurately between function
8257 and non-function syms in check-relocs; Objects loaded later in
8258 the link may change h->type. So fix it now. */
8259 h->plt.offset = (bfd_vma) -1;
8260 eh->plt_thumb_refcount = 0;
bd97cb95 8261 eh->plt_maybe_thumb_refcount = 0;
b7693d02 8262 }
252b5132
RH		 8263
8264 /* If this is a weak symbol, and there is a real definition, the
8265 processor independent code will have arranged for us to see the
8266 real definition first, and we can just use the same value. */
f6e332e6 8267 if (h->u.weakdef != NULL)
252b5132 8268 {
f6e332e6
AM		 8269 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
8270 || h->u.weakdef->root.type == bfd_link_hash_defweak);
8271 h->root.u.def.section = h->u.weakdef->root.u.def.section;
8272 h->root.u.def.value = h->u.weakdef->root.u.def.value;
b34976b6 8273 return TRUE;
252b5132
RH		 8274 }
8275
ba93b8ac
DJ		 8276 /* If there are no non-GOT references, we do not need a copy
8277 relocation. */
8278 if (!h->non_got_ref)
8279 return TRUE;
8280
252b5132
RH		 8281 /* This is a reference to a symbol defined by a dynamic object which
8282 is not a function. */
8283
8284 /* If we are creating a shared library, we must presume that the
8285 only references to the symbol are via the global offset table.
8286 For such cases we need not do anything here; the relocations will
67687978
PB		 8287 be handled correctly by relocate_section. Relocatable executables
8288 can reference data in shared objects directly, so we don't need to
8289 do anything here. */
8290 if (info->shared || globals->root.is_relocatable_executable)
b34976b6 8291 return TRUE;
252b5132 8292
909272ee
AM		 8293 if (h->size == 0)
8294 {
8295 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"),
8296 h->root.root.string);
8297 return TRUE;
8298 }
8299
252b5132
RH		 8300 /* We must allocate the symbol in our .dynbss section, which will
8301 become part of the .bss section of the executable. There will be
8302 an entry for this symbol in the .dynsym section. The dynamic
8303 object will contain position independent code, so all references
8304 from the dynamic object to this symbol will go through the global
8305 offset table. The dynamic linker will use the .dynsym entry to
8306 determine the address it must put in the global offset table, so
8307 both the dynamic object and the regular object will refer to the
8308 same memory location for the variable. */
252b5132
RH		 8309 s = bfd_get_section_by_name (dynobj, ".dynbss");
8310 BFD_ASSERT (s != NULL);
8311
8312 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to
8313 copy the initial value out of the dynamic object and into the
8314 runtime process image. We need to remember the offset into the
00a97672 8315 .rel(a).bss section we are going to use. */
252b5132
RH		 8316 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
8317 {
8318 asection *srel;
8319
00a97672 8320 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss"));
252b5132 8321 BFD_ASSERT (srel != NULL);
00a97672 8322 srel->size += RELOC_SIZE (globals);
f5385ebf 8323 h->needs_copy = 1;
252b5132
RH		 8324 }
8325
027297b7 8326 return _bfd_elf_adjust_dynamic_copy (h, s);
252b5132
RH		 8327}
8328
5e681ec4
PB		 8329/* Allocate space in .plt, .got and associated reloc sections for
8330 dynamic relocs. */
8331
8332static bfd_boolean
57e8b36a 8333allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf)
5e681ec4
PB		 8334{
8335 struct bfd_link_info *info;
8336 struct elf32_arm_link_hash_table *htab;
8337 struct elf32_arm_link_hash_entry *eh;
8338 struct elf32_arm_relocs_copied *p;
bd97cb95 8339 bfd_signed_vma thumb_refs;
5e681ec4 8340
b7693d02
DJ		 8341 eh = (struct elf32_arm_link_hash_entry *) h;
8342
5e681ec4
PB		 8343 if (h->root.type == bfd_link_hash_indirect)
8344 return TRUE;
8345
8346 if (h->root.type == bfd_link_hash_warning)
8347 /* When warning symbols are created, they **replace** the "real"
8348 entry in the hash table, thus we never get to see the real
8349 symbol in a hash traversal. So look at it now. */
8350 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8351
8352 info = (struct bfd_link_info *) inf;
8353 htab = elf32_arm_hash_table (info);
8354
8355 if (htab->root.dynamic_sections_created
8356 && h->plt.refcount > 0)
8357 {
8358 /* Make sure this symbol is output as a dynamic symbol.
8359 Undefined weak syms won't yet be marked as dynamic. */
8360 if (h->dynindx == -1
f5385ebf 8361 && !h->forced_local)
5e681ec4 8362 {
c152c796 8363 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8364 return FALSE;
8365 }
8366
8367 if (info->shared
7359ea65 8368 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h))
5e681ec4
PB		 8369 {
8370 asection *s = htab->splt;
8371
8372 /* If this is the first .plt entry, make room for the special
8373 first entry. */
eea6121a 8374 if (s->size == 0)
e5a52504 8375 s->size += htab->plt_header_size;
5e681ec4 8376
eea6121a 8377 h->plt.offset = s->size;
5e681ec4 8378
b7693d02
DJ		 8379 /* If we will insert a Thumb trampoline before this PLT, leave room
8380 for it. */
bd97cb95
DJ		 8381 thumb_refs = eh->plt_thumb_refcount;
8382 if (!htab->use_blx)
8383 thumb_refs += eh->plt_maybe_thumb_refcount;
8384
8385 if (thumb_refs > 0)
b7693d02
DJ		 8386 {
8387 h->plt.offset += PLT_THUMB_STUB_SIZE;
8388 s->size += PLT_THUMB_STUB_SIZE;
8389 }
8390
5e681ec4
PB		 8391 /* If this symbol is not defined in a regular file, and we are
8392 not generating a shared library, then set the symbol to this
8393 location in the .plt. This is required to make function
8394 pointers compare as equal between the normal executable and
8395 the shared library. */
8396 if (! info->shared
f5385ebf 8397 && !h->def_regular)
5e681ec4
PB		 8398 {
8399 h->root.u.def.section = s;
8400 h->root.u.def.value = h->plt.offset;
b7693d02
DJ		 8401
8402 /* Make sure the function is not marked as Thumb, in case
8403 it is the target of an ABS32 relocation, which will
8404 point to the PLT entry. */
8405 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC)
8406 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
5e681ec4
PB		 8407 }
8408
8409 /* Make room for this entry. */
e5a52504 8410 s->size += htab->plt_entry_size;
5e681ec4 8411
e5a52504 8412 if (!htab->symbian_p)
b7693d02
DJ		 8413 {
8414 /* We also need to make an entry in the .got.plt section, which
8415 will be placed in the .got section by the linker script. */
8416 eh->plt_got_offset = htab->sgotplt->size;
8417 htab->sgotplt->size += 4;
8418 }
5e681ec4 8419
00a97672
RS		 8420 /* We also need to make an entry in the .rel(a).plt section. */
8421 htab->srelplt->size += RELOC_SIZE (htab);
8422
8423 /* VxWorks executables have a second set of relocations for
8424 each PLT entry. They go in a separate relocation section,
8425 which is processed by the kernel loader. */
8426 if (htab->vxworks_p && !info->shared)
8427 {
8428 /* There is a relocation for the initial PLT entry:
8429 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */
8430 if (h->plt.offset == htab->plt_header_size)
8431 htab->srelplt2->size += RELOC_SIZE (htab);
8432
8433 /* There are two extra relocations for each subsequent
8434 PLT entry: an R_ARM_32 relocation for the GOT entry,
8435 and an R_ARM_32 relocation for the PLT entry. */
8436 htab->srelplt2->size += RELOC_SIZE (htab) * 2;
8437 }
5e681ec4
PB		 8438 }
8439 else
8440 {
8441 h->plt.offset = (bfd_vma) -1;
f5385ebf 8442 h->needs_plt = 0;
5e681ec4
PB		 8443 }
8444 }
8445 else
8446 {
8447 h->plt.offset = (bfd_vma) -1;
f5385ebf 8448 h->needs_plt = 0;
5e681ec4
PB		 8449 }
8450
8451 if (h->got.refcount > 0)
8452 {
8453 asection *s;
8454 bfd_boolean dyn;
ba93b8ac
DJ		 8455 int tls_type = elf32_arm_hash_entry (h)->tls_type;
8456 int indx;
5e681ec4
PB		 8457
8458 /* Make sure this symbol is output as a dynamic symbol.
8459 Undefined weak syms won't yet be marked as dynamic. */
8460 if (h->dynindx == -1
f5385ebf 8461 && !h->forced_local)
5e681ec4 8462 {
c152c796 8463 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8464 return FALSE;
8465 }
8466
e5a52504
MM		 8467 if (!htab->symbian_p)
8468 {
8469 s = htab->sgot;
8470 h->got.offset = s->size;
ba93b8ac
DJ		 8471
8472 if (tls_type == GOT_UNKNOWN)
8473 abort ();
8474
8475 if (tls_type == GOT_NORMAL)
8476 /* Non-TLS symbols need one GOT slot. */
8477 s->size += 4;
8478 else
8479 {
8480 if (tls_type & GOT_TLS_GD)
8481 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */
8482 s->size += 8;
8483 if (tls_type & GOT_TLS_IE)
8484 /* R_ARM_TLS_IE32 needs one GOT slot. */
8485 s->size += 4;
8486 }
8487
e5a52504 8488 dyn = htab->root.dynamic_sections_created;
ba93b8ac
DJ		 8489
8490 indx = 0;
8491 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h)
8492 && (!info->shared
8493 || !SYMBOL_REFERENCES_LOCAL (info, h)))
8494 indx = h->dynindx;
8495
8496 if (tls_type != GOT_NORMAL
8497 && (info->shared || indx != 0)
8498 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8499 || h->root.type != bfd_link_hash_undefweak))
8500 {
8501 if (tls_type & GOT_TLS_IE)
00a97672 8502 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8503
8504 if (tls_type & GOT_TLS_GD)
00a97672 8505 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8506
8507 if ((tls_type & GOT_TLS_GD) && indx != 0)
00a97672 8508 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8509 }
8510 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
8511 || h->root.type != bfd_link_hash_undefweak)
8512 && (info->shared
8513 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h)))
00a97672 8514 htab->srelgot->size += RELOC_SIZE (htab);
e5a52504 8515 }
5e681ec4
PB		 8516 }
8517 else
8518 h->got.offset = (bfd_vma) -1;
8519
a4fd1a8e
PB		 8520 /* Allocate stubs for exported Thumb functions on v4t. */
8521 if (!htab->use_blx && h->dynindx != -1
0eaedd0e 8522 && h->def_regular
a4fd1a8e
PB		 8523 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC
8524 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT)
8525 {
8526 struct elf_link_hash_entry * th;
8527 struct bfd_link_hash_entry * bh;
8528 struct elf_link_hash_entry * myh;
8529 char name[1024];
8530 asection *s;
8531 bh = NULL;
8532 /* Create a new symbol to regist the real location of the function. */
8533 s = h->root.u.def.section;
8534 sprintf(name, "__real_%s", h->root.root.string);
8535 _bfd_generic_link_add_one_symbol (info, s->owner,
8536 name, BSF_GLOBAL, s,
8537 h->root.u.def.value,
8538 NULL, TRUE, FALSE, &bh);
8539
8540 myh = (struct elf_link_hash_entry *) bh;
8541 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC);
8542 myh->forced_local = 1;
8543 eh->export_glue = myh;
8544 th = record_arm_to_thumb_glue (info, h);
8545 /* Point the symbol at the stub. */
8546 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC);
8547 h->root.u.def.section = th->root.u.def.section;
8548 h->root.u.def.value = th->root.u.def.value & ~1;
8549 }
8550
5e681ec4
PB		 8551 if (eh->relocs_copied == NULL)
8552 return TRUE;
8553
8554 /* In the shared -Bsymbolic case, discard space allocated for
8555 dynamic pc-relative relocs against symbols which turn out to be
8556 defined in regular objects. For the normal shared case, discard
8557 space for pc-relative relocs that have become local due to symbol
8558 visibility changes. */
8559
67687978 8560 if (info->shared || htab->root.is_relocatable_executable)
5e681ec4 8561 {
7bdca076 8562 /* The only relocs that use pc_count are R_ARM_REL32 and
bb224fc3
MS		 8563 R_ARM_REL32_NOI, which will appear on something like
8564 ".long foo - .". We want calls to protected symbols to resolve
8565 directly to the function rather than going via the plt. If people
8566 want function pointer comparisons to work as expected then they
8567 should avoid writing assembly like ".long foo - .". */
ba93b8ac
DJ		 8568 if (SYMBOL_CALLS_LOCAL (info, h))
8569 {
8570 struct elf32_arm_relocs_copied **pp;
8571
8572 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8573 {
8574 p->count -= p->pc_count;
8575 p->pc_count = 0;
8576 if (p->count == 0)
8577 *pp = p->next;
8578 else
8579 pp = &p->next;
8580 }
8581 }
8582
3348747a
NS		 8583 if (elf32_arm_hash_table (info)->vxworks_p)
8584 {
8585 struct elf32_arm_relocs_copied **pp;
8586
8587 for (pp = &eh->relocs_copied; (p = *pp) != NULL; )
8588 {
8589 if (strcmp (p->section->output_section->name, ".tls_vars") == 0)
8590 *pp = p->next;
8591 else
8592 pp = &p->next;
8593 }
8594 }
8595
ba93b8ac 8596 /* Also discard relocs on undefined weak syms with non-default
7359ea65 8597 visibility. */
22d606e9 8598 if (eh->relocs_copied != NULL
5e681ec4 8599 && h->root.type == bfd_link_hash_undefweak)
22d606e9
AM		 8600 {
8601 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT)
8602 eh->relocs_copied = NULL;
8603
8604 /* Make sure undefined weak symbols are output as a dynamic
8605 symbol in PIEs. */
8606 else if (h->dynindx == -1
8607 && !h->forced_local)
8608 {
8609 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8610 return FALSE;
8611 }
8612 }
8613
67687978
PB		 8614 else if (htab->root.is_relocatable_executable && h->dynindx == -1
8615 && h->root.type == bfd_link_hash_new)
8616 {
8617 /* Output absolute symbols so that we can create relocations
8618 against them. For normal symbols we output a relocation
8619 against the section that contains them. */
8620 if (! bfd_elf_link_record_dynamic_symbol (info, h))
8621 return FALSE;
8622 }
8623
5e681ec4
PB		 8624 }
8625 else
8626 {
8627 /* For the non-shared case, discard space for relocs against
8628 symbols which turn out to need copy relocs or are not
8629 dynamic. */
8630
f5385ebf
AM		 8631 if (!h->non_got_ref
8632 && ((h->def_dynamic
8633 && !h->def_regular)
5e681ec4
PB		 8634 || (htab->root.dynamic_sections_created
8635 && (h->root.type == bfd_link_hash_undefweak
8636 || h->root.type == bfd_link_hash_undefined))))
8637 {
8638 /* Make sure this symbol is output as a dynamic symbol.
8639 Undefined weak syms won't yet be marked as dynamic. */
8640 if (h->dynindx == -1
f5385ebf 8641 && !h->forced_local)
5e681ec4 8642 {
c152c796 8643 if (! bfd_elf_link_record_dynamic_symbol (info, h))
5e681ec4
PB		 8644 return FALSE;
8645 }
8646
8647 /* If that succeeded, we know we'll be keeping all the
8648 relocs. */
8649 if (h->dynindx != -1)
8650 goto keep;
8651 }
8652
8653 eh->relocs_copied = NULL;
8654
8655 keep: ;
8656 }
8657
8658 /* Finally, allocate space. */
8659 for (p = eh->relocs_copied; p != NULL; p = p->next)
8660 {
8661 asection *sreloc = elf_section_data (p->section)->sreloc;
00a97672 8662 sreloc->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8663 }
8664
8665 return TRUE;
8666}
8667
08d1f311
DJ		 8668/* Find any dynamic relocs that apply to read-only sections. */
8669
8670static bfd_boolean
8671elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry *h, PTR inf)
8672{
8673 struct elf32_arm_link_hash_entry *eh;
8674 struct elf32_arm_relocs_copied *p;
8675
8676 if (h->root.type == bfd_link_hash_warning)
8677 h = (struct elf_link_hash_entry *) h->root.u.i.link;
8678
8679 eh = (struct elf32_arm_link_hash_entry *) h;
8680 for (p = eh->relocs_copied; p != NULL; p = p->next)
8681 {
8682 asection *s = p->section;
8683
8684 if (s != NULL && (s->flags & SEC_READONLY) != 0)
8685 {
8686 struct bfd_link_info *info = (struct bfd_link_info *) inf;
8687
8688 info->flags |= DF_TEXTREL;
8689
8690 /* Not an error, just cut short the traversal. */
8691 return FALSE;
8692 }
8693 }
8694 return TRUE;
8695}
8696
d504ffc8
DJ		 8697void
8698bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info,
8699 int byteswap_code)
8700{
8701 struct elf32_arm_link_hash_table *globals;
8702
8703 globals = elf32_arm_hash_table (info);
8704 globals->byteswap_code = byteswap_code;
8705}
8706
252b5132
RH		 8707/* Set the sizes of the dynamic sections. */
8708
b34976b6 8709static bfd_boolean
57e8b36a
NC		 8710elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED,
8711 struct bfd_link_info * info)
252b5132
RH		 8712{
8713 bfd * dynobj;
8714 asection * s;
b34976b6
AM		 8715 bfd_boolean plt;
8716 bfd_boolean relocs;
5e681ec4
PB		 8717 bfd *ibfd;
8718 struct elf32_arm_link_hash_table *htab;
252b5132 8719
5e681ec4 8720 htab = elf32_arm_hash_table (info);
252b5132
RH		 8721 dynobj = elf_hash_table (info)->dynobj;
8722 BFD_ASSERT (dynobj != NULL);
39b41c9c 8723 check_use_blx (htab);
252b5132
RH		 8724
8725 if (elf_hash_table (info)->dynamic_sections_created)
8726 {
8727 /* Set the contents of the .interp section to the interpreter. */
893c4fe2 8728 if (info->executable)
252b5132
RH		 8729 {
8730 s = bfd_get_section_by_name (dynobj, ".interp");
8731 BFD_ASSERT (s != NULL);
eea6121a 8732 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
252b5132
RH		 8733 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
8734 }
8735 }
5e681ec4
PB		 8736
8737 /* Set up .got offsets for local syms, and space for local dynamic
8738 relocs. */
8739 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
252b5132 8740 {
5e681ec4
PB		 8741 bfd_signed_vma *local_got;
8742 bfd_signed_vma *end_local_got;
8743 char *local_tls_type;
8744 bfd_size_type locsymcount;
8745 Elf_Internal_Shdr *symtab_hdr;
8746 asection *srel;
3348747a 8747 bfd_boolean is_vxworks = elf32_arm_hash_table (info)->vxworks_p;
5e681ec4 8748
0ffa91dd 8749 if (! is_arm_elf (ibfd))
5e681ec4
PB		 8750 continue;
8751
8752 for (s = ibfd->sections; s != NULL; s = s->next)
8753 {
8754 struct elf32_arm_relocs_copied *p;
8755
6edfbbad 8756 for (p = elf_section_data (s)->local_dynrel; p != NULL; p = p->next)
5e681ec4
PB		 8757 {
8758 if (!bfd_is_abs_section (p->section)
8759 && bfd_is_abs_section (p->section->output_section))
8760 {
8761 /* Input section has been discarded, either because
8762 it is a copy of a linkonce section or due to
8763 linker script /DISCARD/, so we'll be discarding
8764 the relocs too. */
8765 }
3348747a
NS		 8766 else if (is_vxworks
8767 && strcmp (p->section->output_section->name,
8768 ".tls_vars") == 0)
8769 {
8770 /* Relocations in vxworks .tls_vars sections are
8771 handled specially by the loader. */
8772 }
5e681ec4
PB		 8773 else if (p->count != 0)
8774 {
8775 srel = elf_section_data (p->section)->sreloc;
00a97672 8776 srel->size += p->count * RELOC_SIZE (htab);
5e681ec4
PB		 8777 if ((p->section->output_section->flags & SEC_READONLY) != 0)
8778 info->flags |= DF_TEXTREL;
8779 }
8780 }
8781 }
8782
8783 local_got = elf_local_got_refcounts (ibfd);
8784 if (!local_got)
8785 continue;
8786
0ffa91dd 8787 symtab_hdr = & elf_symtab_hdr (ibfd);
5e681ec4
PB		 8788 locsymcount = symtab_hdr->sh_info;
8789 end_local_got = local_got + locsymcount;
ba93b8ac 8790 local_tls_type = elf32_arm_local_got_tls_type (ibfd);
5e681ec4
PB		 8791 s = htab->sgot;
8792 srel = htab->srelgot;
8793 for (; local_got < end_local_got; ++local_got, ++local_tls_type)
8794 {
8795 if (*local_got > 0)
8796 {
eea6121a 8797 *local_got = s->size;
ba93b8ac
DJ		 8798 if (*local_tls_type & GOT_TLS_GD)
8799 /* TLS_GD relocs need an 8-byte structure in the GOT. */
8800 s->size += 8;
8801 if (*local_tls_type & GOT_TLS_IE)
8802 s->size += 4;
8803 if (*local_tls_type == GOT_NORMAL)
8804 s->size += 4;
8805
8806 if (info->shared || *local_tls_type == GOT_TLS_GD)
00a97672 8807 srel->size += RELOC_SIZE (htab);
5e681ec4
PB		 8808 }
8809 else
8810 *local_got = (bfd_vma) -1;
8811 }
252b5132
RH		 8812 }
8813
ba93b8ac
DJ		 8814 if (htab->tls_ldm_got.refcount > 0)
8815 {
8816 /* Allocate two GOT entries and one dynamic relocation (if necessary)
8817 for R_ARM_TLS_LDM32 relocations. */
8818 htab->tls_ldm_got.offset = htab->sgot->size;
8819 htab->sgot->size += 8;
8820 if (info->shared)
00a97672 8821 htab->srelgot->size += RELOC_SIZE (htab);
ba93b8ac
DJ		 8822 }
8823 else
8824 htab->tls_ldm_got.offset = -1;
8825
5e681ec4
PB		 8826 /* Allocate global sym .plt and .got entries, and space for global
8827 sym dynamic relocs. */
57e8b36a 8828 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info);
252b5132 8829
d504ffc8
DJ		 8830 /* Here we rummage through the found bfds to collect glue information. */
8831 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next)
c7b8f16e 8832 {
0ffa91dd 8833 if (! is_arm_elf (ibfd))
e44a2c9c
AM		 8834 continue;
8835
c7b8f16e
JB		 8836 /* Initialise mapping tables for code/data. */
8837 bfd_elf32_arm_init_maps (ibfd);
8838
8839 if (!bfd_elf32_arm_process_before_allocation (ibfd, info)
8840 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info))
8841 /* xgettext:c-format */
8842 _bfd_error_handler (_("Errors encountered processing file %s"),
8843 ibfd->filename);
8844 }
d504ffc8 8845
252b5132
RH		 8846 /* The check_relocs and adjust_dynamic_symbol entry points have
8847 determined the sizes of the various dynamic sections. Allocate
8848 memory for them. */
b34976b6
AM		 8849 plt = FALSE;
8850 relocs = FALSE;
252b5132
RH		 8851 for (s = dynobj->sections; s != NULL; s = s->next)
8852 {
8853 const char * name;
252b5132
RH		 8854
8855 if ((s->flags & SEC_LINKER_CREATED) == 0)
8856 continue;
8857
8858 /* It's OK to base decisions on the section name, because none
8859 of the dynobj section names depend upon the input files. */
8860 name = bfd_get_section_name (dynobj, s);
8861
24a1ba0f 8862 if (strcmp (name, ".plt") == 0)
252b5132 8863 {
c456f082
AM		 8864 /* Remember whether there is a PLT. */
8865 plt = s->size != 0;
252b5132 8866 }
0112cd26 8867 else if (CONST_STRNEQ (name, ".rel"))
252b5132 8868 {
c456f082 8869 if (s->size != 0)
252b5132 8870 {
252b5132 8871 /* Remember whether there are any reloc sections other
00a97672
RS		 8872 than .rel(a).plt and .rela.plt.unloaded. */
8873 if (s != htab->srelplt && s != htab->srelplt2)
b34976b6 8874 relocs = TRUE;
252b5132
RH		 8875
8876 /* We use the reloc_count field as a counter if we need
8877 to copy relocs into the output file. */
8878 s->reloc_count = 0;
8879 }
8880 }
0112cd26 8881 else if (! CONST_STRNEQ (name, ".got")
c456f082 8882 && strcmp (name, ".dynbss") != 0)
252b5132
RH		 8883 {
8884 /* It's not one of our sections, so don't allocate space. */
8885 continue;
8886 }
8887
c456f082 8888 if (s->size == 0)
252b5132 8889 {
c456f082 8890 /* If we don't need this section, strip it from the
00a97672
RS		 8891 output file. This is mostly to handle .rel(a).bss and
8892 .rel(a).plt. We must create both sections in
c456f082
AM		 8893 create_dynamic_sections, because they must be created
8894 before the linker maps input sections to output
8895 sections. The linker does that before
8896 adjust_dynamic_symbol is called, and it is that
8897 function which decides whether anything needs to go
8898 into these sections. */
8423293d 8899 s->flags |= SEC_EXCLUDE;
252b5132
RH		 8900 continue;
8901 }
8902
c456f082
AM		 8903 if ((s->flags & SEC_HAS_CONTENTS) == 0)
8904 continue;
8905
252b5132 8906 /* Allocate memory for the section contents. */
eea6121a 8907 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
c456f082 8908 if (s->contents == NULL)
b34976b6 8909 return FALSE;
252b5132
RH		 8910 }
8911
8912 if (elf_hash_table (info)->dynamic_sections_created)
8913 {
8914 /* Add some entries to the .dynamic section. We fill in the
8915 values later, in elf32_arm_finish_dynamic_sections, but we
8916 must add the entries now so that we get the correct size for
8917 the .dynamic section. The DT_DEBUG entry is filled in by the
8918 dynamic linker and used by the debugger. */
dc810e39 8919#define add_dynamic_entry(TAG, VAL) \
5a580b3a 8920 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
dc810e39 8921
8532796c 8922 if (info->executable)
252b5132 8923 {
dc810e39 8924 if (!add_dynamic_entry (DT_DEBUG, 0))
b34976b6 8925 return FALSE;
252b5132
RH		 8926 }
8927
8928 if (plt)
8929 {
dc810e39
AM		 8930 if ( !add_dynamic_entry (DT_PLTGOT, 0)
8931 || !add_dynamic_entry (DT_PLTRELSZ, 0)
00a97672
RS		 8932 || !add_dynamic_entry (DT_PLTREL,
8933 htab->use_rel ? DT_REL : DT_RELA)
dc810e39 8934 || !add_dynamic_entry (DT_JMPREL, 0))
b34976b6 8935 return FALSE;
252b5132
RH		 8936 }
8937
8938 if (relocs)
8939 {
00a97672
RS		 8940 if (htab->use_rel)
8941 {
8942 if (!add_dynamic_entry (DT_REL, 0)
8943 || !add_dynamic_entry (DT_RELSZ, 0)
8944 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab)))
8945 return FALSE;
8946 }
8947 else
8948 {
8949 if (!add_dynamic_entry (DT_RELA, 0)
8950 || !add_dynamic_entry (DT_RELASZ, 0)
8951 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab)))
8952 return FALSE;
8953 }
252b5132
RH		 8954 }
8955
08d1f311
DJ		 8956 /* If any dynamic relocs apply to a read-only section,
8957 then we need a DT_TEXTREL entry. */
8958 if ((info->flags & DF_TEXTREL) == 0)
8959 elf_link_hash_traverse (&htab->root, elf32_arm_readonly_dynrelocs,
8960 (PTR) info);
8961
99e4ae17 8962 if ((info->flags & DF_TEXTREL) != 0)
252b5132 8963 {
dc810e39 8964 if (!add_dynamic_entry (DT_TEXTREL, 0))
b34976b6 8965 return FALSE;
252b5132 8966 }
7a2b07ff
NS		 8967 if (htab->vxworks_p
8968 && !elf_vxworks_add_dynamic_entries (output_bfd, info))
8969 return FALSE;
252b5132 8970 }
8532796c 8971#undef add_dynamic_entry
252b5132 8972
b34976b6 8973 return TRUE;
252b5132
RH		 8974}
8975
252b5132
RH		 8976/* Finish up dynamic symbol handling. We set the contents of various
8977 dynamic sections here. */
8978
b34976b6 8979static bfd_boolean
57e8b36a
NC		 8980elf32_arm_finish_dynamic_symbol (bfd * output_bfd, struct bfd_link_info * info,
8981 struct elf_link_hash_entry * h, Elf_Internal_Sym * sym)
252b5132
RH		 8982{
8983 bfd * dynobj;
e5a52504 8984 struct elf32_arm_link_hash_table *htab;
b7693d02 8985 struct elf32_arm_link_hash_entry *eh;
252b5132
RH		 8986
8987 dynobj = elf_hash_table (info)->dynobj;
e5a52504 8988 htab = elf32_arm_hash_table (info);
b7693d02 8989 eh = (struct elf32_arm_link_hash_entry *) h;
252b5132
RH		 8990
8991 if (h->plt.offset != (bfd_vma) -1)
8992 {
8993 asection * splt;
252b5132 8994 asection * srel;
e5a52504 8995 bfd_byte *loc;
24a1ba0f 8996 bfd_vma plt_index;
947216bf 8997 Elf_Internal_Rela rel;
252b5132
RH		 8998
8999 /* This symbol has an entry in the procedure linkage table. Set
9000 it up. */
9001
9002 BFD_ASSERT (h->dynindx != -1);
9003
9004 splt = bfd_get_section_by_name (dynobj, ".plt");
00a97672 9005 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt"));
e5a52504 9006 BFD_ASSERT (splt != NULL && srel != NULL);
252b5132 9007
e5a52504
MM		 9008 /* Fill in the entry in the procedure linkage table. */
9009 if (htab->symbian_p)
9010 {
52ab56c2
PB		 9011 put_arm_insn (htab, output_bfd,
9012 elf32_arm_symbian_plt_entry[0],
9013 splt->contents + h->plt.offset);
9014 bfd_put_32 (output_bfd,
9015 elf32_arm_symbian_plt_entry[1],
9016 splt->contents + h->plt.offset + 4);
e5a52504
MM		 9017
9018 /* Fill in the entry in the .rel.plt section. */
2a1b9a48
MM		 9019 rel.r_offset = (splt->output_section->vma
9020 + splt->output_offset
52ab56c2 9021 + h->plt.offset + 4);
e5a52504 9022 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
b7693d02
DJ		 9023
9024 /* Get the index in the procedure linkage table which
9025 corresponds to this symbol. This is the index of this symbol
9026 in all the symbols for which we are making plt entries. The
9027 first entry in the procedure linkage table is reserved. */
9028 plt_index = ((h->plt.offset - htab->plt_header_size)
9029 / htab->plt_entry_size);
e5a52504
MM		 9030 }
9031 else
9032 {
00a97672 9033 bfd_vma got_offset, got_address, plt_address;
e5a52504
MM		 9034 bfd_vma got_displacement;
9035 asection * sgot;
52ab56c2 9036 bfd_byte * ptr;
e5a52504
MM		 9037
9038 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
9039 BFD_ASSERT (sgot != NULL);
9040
b7693d02
DJ		 9041 /* Get the offset into the .got.plt table of the entry that
9042 corresponds to this function. */
9043 got_offset = eh->plt_got_offset;
9044
9045 /* Get the index in the procedure linkage table which
9046 corresponds to this symbol. This is the index of this symbol
9047 in all the symbols for which we are making plt entries. The
9048 first three entries in .got.plt are reserved; after that
9049 symbols appear in the same order as in .plt. */
9050 plt_index = (got_offset - 12) / 4;
e5a52504 9051
00a97672
RS		 9052 /* Calculate the address of the GOT entry. */
9053 got_address = (sgot->output_section->vma
9054 + sgot->output_offset
9055 + got_offset);
5e681ec4 9056
00a97672
RS		 9057 /* ...and the address of the PLT entry. */
9058 plt_address = (splt->output_section->vma
9059 + splt->output_offset
9060 + h->plt.offset);
5e681ec4 9061
52ab56c2 9062 ptr = htab->splt->contents + h->plt.offset;
00a97672
RS		 9063 if (htab->vxworks_p && info->shared)
9064 {
9065 unsigned int i;
9066 bfd_vma val;
9067
52ab56c2 9068 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9069 {
9070 val = elf32_arm_vxworks_shared_plt_entry[i];
9071 if (i == 2)
9072 val |= got_address - sgot->output_section->vma;
9073 if (i == 5)
9074 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9075 if (i == 2 || i == 5)
9076 bfd_put_32 (output_bfd, val, ptr);
9077 else
9078 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9079 }
9080 }
9081 else if (htab->vxworks_p)
b7693d02 9082 {
00a97672
RS		 9083 unsigned int i;
9084 bfd_vma val;
9085
d3753b85 9086 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4)
00a97672
RS		 9087 {
9088 val = elf32_arm_vxworks_exec_plt_entry[i];
9089 if (i == 2)
9090 val |= got_address;
9091 if (i == 4)
9092 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2);
9093 if (i == 5)
9094 val |= plt_index * RELOC_SIZE (htab);
52ab56c2
PB		 9095 if (i == 2 || i == 5)
9096 bfd_put_32 (output_bfd, val, ptr);
9097 else
9098 put_arm_insn (htab, output_bfd, val, ptr);
00a97672
RS		 9099 }
9100
9101 loc = (htab->srelplt2->contents
9102 + (plt_index * 2 + 1) * RELOC_SIZE (htab));
9103
9104 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation
9105 referencing the GOT for this PLT entry. */
9106 rel.r_offset = plt_address + 8;
9107 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9108 rel.r_addend = got_offset;
9109 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
9110 loc += RELOC_SIZE (htab);
9111
9112 /* Create the R_ARM_ABS32 relocation referencing the
9113 beginning of the PLT for this GOT entry. */
9114 rel.r_offset = got_address;
9115 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9116 rel.r_addend = 0;
9117 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
b7693d02 9118 }
00a97672
RS		 9119 else
9120 {
bd97cb95 9121 bfd_signed_vma thumb_refs;
00a97672
RS		 9122 /* Calculate the displacement between the PLT slot and the
9123 entry in the GOT. The eight-byte offset accounts for the
9124 value produced by adding to pc in the first instruction
9125 of the PLT stub. */
9126 got_displacement = got_address - (plt_address + 8);
b7693d02 9127
00a97672
RS		 9128 BFD_ASSERT ((got_displacement & 0xf0000000) == 0);
9129
bd97cb95
DJ		 9130 thumb_refs = eh->plt_thumb_refcount;
9131 if (!htab->use_blx)
9132 thumb_refs += eh->plt_maybe_thumb_refcount;
9133
9134 if (thumb_refs > 0)
00a97672 9135 {
52ab56c2
PB		 9136 put_thumb_insn (htab, output_bfd,
9137 elf32_arm_plt_thumb_stub[0], ptr - 4);
9138 put_thumb_insn (htab, output_bfd,
9139 elf32_arm_plt_thumb_stub[1], ptr - 2);
00a97672
RS		 9140 }
9141
52ab56c2
PB		 9142 put_arm_insn (htab, output_bfd,
9143 elf32_arm_plt_entry[0]
9144 | ((got_displacement & 0x0ff00000) >> 20),
9145 ptr + 0);
9146 put_arm_insn (htab, output_bfd,
9147 elf32_arm_plt_entry[1]
9148 | ((got_displacement & 0x000ff000) >> 12),
9149 ptr+ 4);
9150 put_arm_insn (htab, output_bfd,
9151 elf32_arm_plt_entry[2]
9152 | (got_displacement & 0x00000fff),
9153 ptr + 8);
5e681ec4 9154#ifdef FOUR_WORD_PLT
52ab56c2 9155 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12);
5e681ec4 9156#endif
00a97672 9157 }
252b5132 9158
e5a52504
MM		 9159 /* Fill in the entry in the global offset table. */
9160 bfd_put_32 (output_bfd,
9161 (splt->output_section->vma
9162 + splt->output_offset),
9163 sgot->contents + got_offset);
9164
00a97672
RS		 9165 /* Fill in the entry in the .rel(a).plt section. */
9166 rel.r_addend = 0;
9167 rel.r_offset = got_address;
e5a52504
MM		 9168 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT);
9169 }
57e8b36a 9170
00a97672
RS		 9171 loc = srel->contents + plt_index * RELOC_SIZE (htab);
9172 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132 9173
f5385ebf 9174 if (!h->def_regular)
252b5132
RH		 9175 {
9176 /* Mark the symbol as undefined, rather than as defined in
9177 the .plt section. Leave the value alone. */
9178 sym->st_shndx = SHN_UNDEF;
d982ba73
PB		 9179 /* If the symbol is weak, we do need to clear the value.
9180 Otherwise, the PLT entry would provide a definition for
9181 the symbol even if the symbol wasn't defined anywhere,
9182 and so the symbol would never be NULL. */
f5385ebf 9183 if (!h->ref_regular_nonweak)
d982ba73 9184 sym->st_value = 0;
252b5132
RH		 9185 }
9186 }
9187
ba93b8ac
DJ		 9188 if (h->got.offset != (bfd_vma) -1
9189 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0
9190 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0)
252b5132
RH		 9191 {
9192 asection * sgot;
9193 asection * srel;
947216bf
AM		 9194 Elf_Internal_Rela rel;
9195 bfd_byte *loc;
00a97672 9196 bfd_vma offset;
252b5132
RH		 9197
9198 /* This symbol has an entry in the global offset table. Set it
9199 up. */
252b5132 9200 sgot = bfd_get_section_by_name (dynobj, ".got");
00a97672 9201 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got"));
252b5132
RH		 9202 BFD_ASSERT (sgot != NULL && srel != NULL);
9203
00a97672
RS		 9204 offset = (h->got.offset & ~(bfd_vma) 1);
9205 rel.r_addend = 0;
252b5132
RH		 9206 rel.r_offset = (sgot->output_section->vma
9207 + sgot->output_offset
00a97672 9208 + offset);
252b5132 9209
5e681ec4
PB		 9210 /* If this is a static link, or it is a -Bsymbolic link and the
9211 symbol is defined locally or was forced to be local because
9212 of a version file, we just want to emit a RELATIVE reloc.
9213 The entry in the global offset table will already have been
9214 initialized in the relocate_section function. */
252b5132 9215 if (info->shared
5e681ec4
PB		 9216 && SYMBOL_REFERENCES_LOCAL (info, h))
9217 {
9218 BFD_ASSERT((h->got.offset & 1) != 0);
9219 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE);
00a97672
RS		 9220 if (!htab->use_rel)
9221 {
9222 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset);
9223 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
9224 }
5e681ec4 9225 }
252b5132
RH		 9226 else
9227 {
5e681ec4 9228 BFD_ASSERT((h->got.offset & 1) == 0);
00a97672 9229 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset);
252b5132
RH		 9230 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT);
9231 }
9232
00a97672
RS		 9233 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab);
9234 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9235 }
9236
f5385ebf 9237 if (h->needs_copy)
252b5132
RH		 9238 {
9239 asection * s;
947216bf
AM		 9240 Elf_Internal_Rela rel;
9241 bfd_byte *loc;
252b5132
RH		 9242
9243 /* This symbol needs a copy reloc. Set it up. */
252b5132
RH		 9244 BFD_ASSERT (h->dynindx != -1
9245 && (h->root.type == bfd_link_hash_defined
9246 || h->root.type == bfd_link_hash_defweak));
9247
9248 s = bfd_get_section_by_name (h->root.u.def.section->owner,
00a97672 9249 RELOC_SECTION (htab, ".bss"));
252b5132
RH		 9250 BFD_ASSERT (s != NULL);
9251
00a97672 9252 rel.r_addend = 0;
252b5132
RH		 9253 rel.r_offset = (h->root.u.def.value
9254 + h->root.u.def.section->output_section->vma
9255 + h->root.u.def.section->output_offset);
9256 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY);
00a97672
RS		 9257 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab);
9258 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc);
252b5132
RH		 9259 }
9260
00a97672
RS		 9261 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks,
9262 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative
9263 to the ".got" section. */
252b5132 9264 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
00a97672 9265 || (!htab->vxworks_p && h == htab->root.hgot))
252b5132
RH		 9266 sym->st_shndx = SHN_ABS;
9267
b34976b6 9268 return TRUE;
252b5132
RH		 9269}
9270
9271/* Finish up the dynamic sections. */
9272
b34976b6 9273static bfd_boolean
57e8b36a 9274elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info)
252b5132
RH		 9275{
9276 bfd * dynobj;
9277 asection * sgot;
9278 asection * sdyn;
9279
9280 dynobj = elf_hash_table (info)->dynobj;
9281
9282 sgot = bfd_get_section_by_name (dynobj, ".got.plt");
229fcec5 9283 BFD_ASSERT (elf32_arm_hash_table (info)->symbian_p || sgot != NULL);
252b5132
RH		 9284 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
9285
9286 if (elf_hash_table (info)->dynamic_sections_created)
9287 {
9288 asection *splt;
9289 Elf32_External_Dyn *dyncon, *dynconend;
229fcec5 9290 struct elf32_arm_link_hash_table *htab;
252b5132 9291
229fcec5 9292 htab = elf32_arm_hash_table (info);
252b5132 9293 splt = bfd_get_section_by_name (dynobj, ".plt");
24a1ba0f 9294 BFD_ASSERT (splt != NULL && sdyn != NULL);
252b5132
RH		 9295
9296 dyncon = (Elf32_External_Dyn *) sdyn->contents;
eea6121a 9297 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
9b485d32 9298
252b5132
RH		 9299 for (; dyncon < dynconend; dyncon++)
9300 {
9301 Elf_Internal_Dyn dyn;
9302 const char * name;
9303 asection * s;
9304
9305 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
9306
9307 switch (dyn.d_tag)
9308 {
229fcec5
MM		 9309 unsigned int type;
9310
252b5132 9311 default:
7a2b07ff
NS		 9312 if (htab->vxworks_p
9313 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn))
9314 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
252b5132
RH		 9315 break;
9316
229fcec5
MM		 9317 case DT_HASH:
9318 name = ".hash";
9319 goto get_vma_if_bpabi;
9320 case DT_STRTAB:
9321 name = ".dynstr";
9322 goto get_vma_if_bpabi;
9323 case DT_SYMTAB:
9324 name = ".dynsym";
9325 goto get_vma_if_bpabi;
c0042f5d
MM		 9326 case DT_VERSYM:
9327 name = ".gnu.version";
9328 goto get_vma_if_bpabi;
9329 case DT_VERDEF:
9330 name = ".gnu.version_d";
9331 goto get_vma_if_bpabi;
9332 case DT_VERNEED:
9333 name = ".gnu.version_r";
9334 goto get_vma_if_bpabi;
9335
252b5132
RH		 9336 case DT_PLTGOT:
9337 name = ".got";
9338 goto get_vma;
9339 case DT_JMPREL:
00a97672 9340 name = RELOC_SECTION (htab, ".plt");
252b5132
RH		 9341 get_vma:
9342 s = bfd_get_section_by_name (output_bfd, name);
9343 BFD_ASSERT (s != NULL);
229fcec5
MM		 9344 if (!htab->symbian_p)
9345 dyn.d_un.d_ptr = s->vma;
9346 else
9347 /* In the BPABI, tags in the PT_DYNAMIC section point
9348 at the file offset, not the memory address, for the
9349 convenience of the post linker. */
9350 dyn.d_un.d_ptr = s->filepos;
252b5132
RH		 9351 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9352 break;
9353
229fcec5
MM		 9354 get_vma_if_bpabi:
9355 if (htab->symbian_p)
9356 goto get_vma;
9357 break;
9358
252b5132 9359 case DT_PLTRELSZ:
00a97672
RS		 9360 s = bfd_get_section_by_name (output_bfd,
9361 RELOC_SECTION (htab, ".plt"));
252b5132 9362 BFD_ASSERT (s != NULL);
eea6121a 9363 dyn.d_un.d_val = s->size;
252b5132
RH		 9364 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9365 break;
229fcec5 9366
252b5132 9367 case DT_RELSZ:
00a97672 9368 case DT_RELASZ:
229fcec5
MM		 9369 if (!htab->symbian_p)
9370 {
9371 /* My reading of the SVR4 ABI indicates that the
9372 procedure linkage table relocs (DT_JMPREL) should be
9373 included in the overall relocs (DT_REL). This is
9374 what Solaris does. However, UnixWare can not handle
9375 that case. Therefore, we override the DT_RELSZ entry
9376 here to make it not include the JMPREL relocs. Since
00a97672 9377 the linker script arranges for .rel(a).plt to follow all
229fcec5
MM		 9378 other relocation sections, we don't have to worry
9379 about changing the DT_REL entry. */
00a97672
RS		 9380 s = bfd_get_section_by_name (output_bfd,
9381 RELOC_SECTION (htab, ".plt"));
229fcec5
MM		 9382 if (s != NULL)
9383 dyn.d_un.d_val -= s->size;
9384 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9385 break;
9386 }
9387 /* Fall through */
9388
9389 case DT_REL:
9390 case DT_RELA:
229fcec5
MM		 9391 /* In the BPABI, the DT_REL tag must point at the file
9392 offset, not the VMA, of the first relocation
9393 section. So, we use code similar to that in
9394 elflink.c, but do not check for SHF_ALLOC on the
9395 relcoation section, since relocations sections are
9396 never allocated under the BPABI. The comments above
9397 about Unixware notwithstanding, we include all of the
9398 relocations here. */
9399 if (htab->symbian_p)
9400 {
9401 unsigned int i;
9402 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ)
9403 ? SHT_REL : SHT_RELA);
9404 dyn.d_un.d_val = 0;
9405 for (i = 1; i < elf_numsections (output_bfd); i++)
9406 {
9407 Elf_Internal_Shdr *hdr
9408 = elf_elfsections (output_bfd)[i];
9409 if (hdr->sh_type == type)
9410 {
9411 if (dyn.d_tag == DT_RELSZ
9412 || dyn.d_tag == DT_RELASZ)
9413 dyn.d_un.d_val += hdr->sh_size;
de52dba4
AM		 9414 else if ((ufile_ptr) hdr->sh_offset
9415 <= dyn.d_un.d_val - 1)
229fcec5
MM		 9416 dyn.d_un.d_val = hdr->sh_offset;
9417 }
9418 }
9419 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
9420 }
252b5132 9421 break;
88f7bcd5
NC		 9422
9423 /* Set the bottom bit of DT_INIT/FINI if the
9424 corresponding function is Thumb. */
9425 case DT_INIT:
9426 name = info->init_function;
9427 goto get_sym;
9428 case DT_FINI:
9429 name = info->fini_function;
9430 get_sym:
9431 /* If it wasn't set by elf_bfd_final_link
4cc11e76 9432 then there is nothing to adjust. */
88f7bcd5
NC		 9433 if (dyn.d_un.d_val != 0)
9434 {
9435 struct elf_link_hash_entry * eh;
9436
9437 eh = elf_link_hash_lookup (elf_hash_table (info), name,
b34976b6 9438 FALSE, FALSE, TRUE);
88f7bcd5
NC		 9439 if (eh != (struct elf_link_hash_entry *) NULL
9440 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC)
9441 {
9442 dyn.d_un.d_val |= 1;
b34976b6 9443 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
88f7bcd5
NC		 9444 }
9445 }
9446 break;
252b5132
RH		 9447 }
9448 }
9449
24a1ba0f 9450 /* Fill in the first entry in the procedure linkage table. */
e5a52504 9451 if (splt->size > 0 && elf32_arm_hash_table (info)->plt_header_size)
f7a74f8c 9452 {
00a97672
RS		 9453 const bfd_vma *plt0_entry;
9454 bfd_vma got_address, plt_address, got_displacement;
9455
9456 /* Calculate the addresses of the GOT and PLT. */
9457 got_address = sgot->output_section->vma + sgot->output_offset;
9458 plt_address = splt->output_section->vma + splt->output_offset;
9459
9460 if (htab->vxworks_p)
9461 {
9462 /* The VxWorks GOT is relocated by the dynamic linker.
9463 Therefore, we must emit relocations rather than simply
9464 computing the values now. */
9465 Elf_Internal_Rela rel;
9466
9467 plt0_entry = elf32_arm_vxworks_exec_plt0_entry;
52ab56c2
PB		 9468 put_arm_insn (htab, output_bfd, plt0_entry[0],
9469 splt->contents + 0);
9470 put_arm_insn (htab, output_bfd, plt0_entry[1],
9471 splt->contents + 4);
9472 put_arm_insn (htab, output_bfd, plt0_entry[2],
9473 splt->contents + 8);
00a97672
RS		 9474 bfd_put_32 (output_bfd, got_address, splt->contents + 12);
9475
9476 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */
9477 rel.r_offset = plt_address + 12;
9478 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9479 rel.r_addend = 0;
9480 SWAP_RELOC_OUT (htab) (output_bfd, &rel,
9481 htab->srelplt2->contents);
9482 }
9483 else
9484 {
9485 got_displacement = got_address - (plt_address + 16);
9486
9487 plt0_entry = elf32_arm_plt0_entry;
52ab56c2
PB		 9488 put_arm_insn (htab, output_bfd, plt0_entry[0],
9489 splt->contents + 0);
9490 put_arm_insn (htab, output_bfd, plt0_entry[1],
9491 splt->contents + 4);
9492 put_arm_insn (htab, output_bfd, plt0_entry[2],
9493 splt->contents + 8);
9494 put_arm_insn (htab, output_bfd, plt0_entry[3],
9495 splt->contents + 12);
5e681ec4 9496
5e681ec4 9497#ifdef FOUR_WORD_PLT
00a97672
RS		 9498 /* The displacement value goes in the otherwise-unused
9499 last word of the second entry. */
9500 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28);
5e681ec4 9501#else
00a97672 9502 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16);
5e681ec4 9503#endif
00a97672 9504 }
f7a74f8c 9505 }
252b5132
RH		 9506
9507 /* UnixWare sets the entsize of .plt to 4, although that doesn't
9508 really seem like the right value. */
74541ad4
AM		 9509 if (splt->output_section->owner == output_bfd)
9510 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4;
00a97672
RS		 9511
9512 if (htab->vxworks_p && !info->shared && htab->splt->size > 0)
9513 {
9514 /* Correct the .rel(a).plt.unloaded relocations. They will have
9515 incorrect symbol indexes. */
9516 int num_plts;
eed62c48 9517 unsigned char *p;
00a97672
RS		 9518
9519 num_plts = ((htab->splt->size - htab->plt_header_size)
9520 / htab->plt_entry_size);
9521 p = htab->srelplt2->contents + RELOC_SIZE (htab);
9522
9523 for (; num_plts; num_plts--)
9524 {
9525 Elf_Internal_Rela rel;
9526
9527 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9528 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32);
9529 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9530 p += RELOC_SIZE (htab);
9531
9532 SWAP_RELOC_IN (htab) (output_bfd, p, &rel);
9533 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32);
9534 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p);
9535 p += RELOC_SIZE (htab);
9536 }
9537 }
252b5132
RH		 9538 }
9539
9540 /* Fill in the first three entries in the global offset table. */
229fcec5 9541 if (sgot)
252b5132 9542 {
229fcec5
MM		 9543 if (sgot->size > 0)
9544 {
9545 if (sdyn == NULL)
9546 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
9547 else
9548 bfd_put_32 (output_bfd,
9549 sdyn->output_section->vma + sdyn->output_offset,
9550 sgot->contents);
9551 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
9552 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
9553 }
252b5132 9554
229fcec5
MM		 9555 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
9556 }
252b5132 9557
b34976b6 9558 return TRUE;
252b5132
RH		 9559}
9560
ba96a88f 9561static void
57e8b36a 9562elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED)
ba96a88f 9563{
9b485d32 9564 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */
e489d0ae 9565 struct elf32_arm_link_hash_table *globals;
ba96a88f
NC		 9566
9567 i_ehdrp = elf_elfheader (abfd);
9568
94a3258f
PB		 9569 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN)
9570 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM;
9571 else
9572 i_ehdrp->e_ident[EI_OSABI] = 0;
ba96a88f 9573 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION;
e489d0ae 9574
93204d3a
PB		 9575 if (link_info)
9576 {
9577 globals = elf32_arm_hash_table (link_info);
9578 if (globals->byteswap_code)
9579 i_ehdrp->e_flags |= EF_ARM_BE8;
9580 }
ba96a88f
NC		 9581}
9582
99e4ae17 9583static enum elf_reloc_type_class
57e8b36a 9584elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela)
99e4ae17 9585{
f51e552e 9586 switch ((int) ELF32_R_TYPE (rela->r_info))
99e4ae17
AJ		 9587 {
9588 case R_ARM_RELATIVE:
9589 return reloc_class_relative;
9590 case R_ARM_JUMP_SLOT:
9591 return reloc_class_plt;
9592 case R_ARM_COPY:
9593 return reloc_class_copy;
9594 default:
9595 return reloc_class_normal;
9596 }
9597}
9598
e16bb312
NC		 9599/* Set the right machine number for an Arm ELF file. */
9600
9601static bfd_boolean
57e8b36a 9602elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr)
e16bb312
NC		 9603{
9604 if (hdr->sh_type == SHT_NOTE)
9605 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS;
9606
9607 return TRUE;
9608}
9609
e489d0ae 9610static void
57e8b36a 9611elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED)
e16bb312 9612{
5a6c6817 9613 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
e16bb312
NC		 9614}
9615
40a18ebd
NC		 9616/* Return TRUE if this is an unwinding table entry. */
9617
9618static bfd_boolean
9619is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name)
9620{
0112cd26
NC		 9621 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind)
9622 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once));
40a18ebd
NC		 9623}
9624
9625
9626/* Set the type and flags for an ARM section. We do this by
9627 the section name, which is a hack, but ought to work. */
9628
9629static bfd_boolean
9630elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec)
9631{
9632 const char * name;
9633
9634 name = bfd_get_section_name (abfd, sec);
9635
9636 if (is_arm_elf_unwind_section_name (abfd, name))
9637 {
9638 hdr->sh_type = SHT_ARM_EXIDX;
9639 hdr->sh_flags |= SHF_LINK_ORDER;
9640 }
9641 return TRUE;
9642}
9643
6dc132d9
L		 9644/* Handle an ARM specific section when reading an object file. This is
9645 called when bfd_section_from_shdr finds a section with an unknown
9646 type. */
40a18ebd
NC		 9647
9648static bfd_boolean
9649elf32_arm_section_from_shdr (bfd *abfd,
9650 Elf_Internal_Shdr * hdr,
6dc132d9
L		 9651 const char *name,
9652 int shindex)
40a18ebd
NC		 9653{
9654 /* There ought to be a place to keep ELF backend specific flags, but
9655 at the moment there isn't one. We just keep track of the
9656 sections by their name, instead. Fortunately, the ABI gives
9657 names for all the ARM specific sections, so we will probably get
9658 away with this. */
9659 switch (hdr->sh_type)
9660 {
9661 case SHT_ARM_EXIDX:
0951f019
RE		 9662 case SHT_ARM_PREEMPTMAP:
9663 case SHT_ARM_ATTRIBUTES:
40a18ebd
NC		 9664 break;
9665
9666 default:
9667 return FALSE;
9668 }
9669
6dc132d9 9670 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex))
40a18ebd
NC		 9671 return FALSE;
9672
9673 return TRUE;
9674}
e489d0ae 9675
8e3de13a
NC		 9676/* A structure used to record a list of sections, independently
9677 of the next and prev fields in the asection structure. */
9678typedef struct section_list
9679{
9680 asection * sec;
9681 struct section_list * next;
9682 struct section_list * prev;
9683}
9684section_list;
9685
9686/* Unfortunately we need to keep a list of sections for which
9687 an _arm_elf_section_data structure has been allocated. This
9688 is because it is possible for functions like elf32_arm_write_section
9689 to be called on a section which has had an elf_data_structure
9690 allocated for it (and so the used_by_bfd field is valid) but
9691 for which the ARM extended version of this structure - the
9692 _arm_elf_section_data structure - has not been allocated. */
9693static section_list * sections_with_arm_elf_section_data = NULL;
9694
9695static void
957c6e41 9696record_section_with_arm_elf_section_data (asection * sec)
8e3de13a
NC		 9697{
9698 struct section_list * entry;
9699
957c6e41 9700 entry = bfd_malloc (sizeof (* entry));
8e3de13a
NC		 9701 if (entry == NULL)
9702 return;
9703 entry->sec = sec;
9704 entry->next = sections_with_arm_elf_section_data;
9705 entry->prev = NULL;
9706 if (entry->next != NULL)
9707 entry->next->prev = entry;
9708 sections_with_arm_elf_section_data = entry;
9709}
9710
44444f50
NC		 9711static struct section_list *
9712find_arm_elf_section_entry (asection * sec)
8e3de13a
NC		 9713{
9714 struct section_list * entry;
bd4aae00 9715 static struct section_list * last_entry = NULL;
8e3de13a 9716
bd4aae00
NC		 9717 /* This is a short cut for the typical case where the sections are added
9718 to the sections_with_arm_elf_section_data list in forward order and
9719 then looked up here in backwards order. This makes a real difference
9720 to the ld-srec/sec64k.exp linker test. */
44444f50 9721 entry = sections_with_arm_elf_section_data;
bd4aae00
NC		 9722 if (last_entry != NULL)
9723 {
9724 if (last_entry->sec == sec)
44444f50
NC		 9725 entry = last_entry;
9726 else if (last_entry->next != NULL
9727 && last_entry->next->sec == sec)
9728 entry = last_entry->next;
bd4aae00 9729 }
44444f50
NC		 9730
9731 for (; entry; entry = entry->next)
8e3de13a 9732 if (entry->sec == sec)
44444f50 9733 break;
bd4aae00 9734
44444f50
NC		 9735 if (entry)
9736 /* Record the entry prior to this one - it is the entry we are most
9737 likely to want to locate next time. Also this way if we have been
9738 called from unrecord_section_with_arm_elf_section_data() we will not
9739 be caching a pointer that is about to be freed. */
9740 last_entry = entry->prev;
9741
9742 return entry;
9743}
9744
9745static _arm_elf_section_data *
9746get_arm_elf_section_data (asection * sec)
9747{
9748 struct section_list * entry;
9749
9750 entry = find_arm_elf_section_entry (sec);
9751
9752 if (entry)
9753 return elf32_arm_section_data (entry->sec);
9754 else
9755 return NULL;
8e3de13a
NC		 9756}
9757
9758static void
9759unrecord_section_with_arm_elf_section_data (asection * sec)
9760{
9761 struct section_list * entry;
9762
44444f50
NC		 9763 entry = find_arm_elf_section_entry (sec);
9764
9765 if (entry)
9766 {
9767 if (entry->prev != NULL)
9768 entry->prev->next = entry->next;
9769 if (entry->next != NULL)
9770 entry->next->prev = entry->prev;
9771 if (entry == sections_with_arm_elf_section_data)
9772 sections_with_arm_elf_section_data = entry->next;
9773 free (entry);
9774 }
8e3de13a
NC		 9775}
9776
e489d0ae 9777
4e617b1e
PB		 9778typedef struct
9779{
9780 void *finfo;
9781 struct bfd_link_info *info;
91a5743d
PB		 9782 asection *sec;
9783 int sec_shndx;
4e617b1e
PB		 9784 bfd_boolean (*func) (void *, const char *, Elf_Internal_Sym *,
9785 asection *, struct elf_link_hash_entry *);
9786} output_arch_syminfo;
9787
9788enum map_symbol_type
9789{
9790 ARM_MAP_ARM,
9791 ARM_MAP_THUMB,
9792 ARM_MAP_DATA
9793};
9794
9795
9796/* Output a single PLT mapping symbol. */
9797
9798static bfd_boolean
9799elf32_arm_ouput_plt_map_sym (output_arch_syminfo *osi,
9800 enum map_symbol_type type,
9801 bfd_vma offset)
9802{
9803 static const char *names[3] = {"$a", "$t", "$d"};
9804 struct elf32_arm_link_hash_table *htab;
9805 Elf_Internal_Sym sym;
9806
9807 htab = elf32_arm_hash_table (osi->info);
91a5743d
PB		 9808 sym.st_value = osi->sec->output_section->vma
9809 + osi->sec->output_offset
9810 + offset;
4e617b1e
PB		 9811 sym.st_size = 0;
9812 sym.st_other = 0;
9813 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE);
91a5743d
PB		 9814 sym.st_shndx = osi->sec_shndx;
9815 if (!osi->func (osi->finfo, names[type], &sym, osi->sec, NULL))
4e617b1e
PB		 9816 return FALSE;
9817 return TRUE;
9818}
9819
9820
9821/* Output mapping symbols for PLT entries associated with H. */
9822
9823static bfd_boolean
9824elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf)
9825{
9826 output_arch_syminfo *osi = (output_arch_syminfo *) inf;
9827 struct elf32_arm_link_hash_table *htab;
9828 struct elf32_arm_link_hash_entry *eh;
9829 bfd_vma addr;
9830
9831 htab = elf32_arm_hash_table (osi->info);
9832
9833 if (h->root.type == bfd_link_hash_indirect)
9834 return TRUE;
9835
9836 if (h->root.type == bfd_link_hash_warning)
9837 /* When warning symbols are created, they **replace** the "real"
9838 entry in the hash table, thus we never get to see the real
9839 symbol in a hash traversal. So look at it now. */
9840 h = (struct elf_link_hash_entry *) h->root.u.i.link;
9841
9842 if (h->plt.offset == (bfd_vma) -1)
9843 return TRUE;
9844
9845 eh = (struct elf32_arm_link_hash_entry *) h;
9846 addr = h->plt.offset;
9847 if (htab->symbian_p)
9848 {
9849 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9850 return FALSE;
9851 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 4))
9852 return FALSE;
9853 }
9854 else if (htab->vxworks_p)
9855 {
9856 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9857 return FALSE;
9858 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 8))
9859 return FALSE;
9860 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr + 12))
9861 return FALSE;
9862 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 20))
9863 return FALSE;
9864 }
9865 else
9866 {
bd97cb95
DJ		 9867 bfd_signed_vma thumb_refs;
9868
9869 thumb_refs = eh->plt_thumb_refcount;
9870 if (!htab->use_blx)
9871 thumb_refs += eh->plt_maybe_thumb_refcount;
4e617b1e 9872
bd97cb95 9873 if (thumb_refs > 0)
4e617b1e
PB		 9874 {
9875 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_THUMB, addr - 4))
9876 return FALSE;
9877 }
9878#ifdef FOUR_WORD_PLT
9879 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9880 return FALSE;
9881 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_DATA, addr + 12))
9882 return FALSE;
9883#else
9884 /* A three-word PLT with no Thumb thunk contains only Arm code,
9885 so only need to output a mapping symbol for the first PLT entry and
9886 entries with thumb thunks. */
bd97cb95 9887 if (thumb_refs > 0 || addr == 20)
4e617b1e
PB		 9888 {
9889 if (!elf32_arm_ouput_plt_map_sym (osi, ARM_MAP_ARM, addr))
9890 return FALSE;
9891 }
9892#endif
9893 }
9894
9895 return TRUE;
9896}
9897
9898
91a5743d 9899/* Output mapping symbols for linker generated sections. */
4e617b1e
PB		 9900
9901static bfd_boolean
9902elf32_arm_output_arch_local_syms (bfd *output_bfd,
9903 struct bfd_link_info *info,
9904 void *finfo, bfd_boolean (*func) (void *, const char *,
9905 Elf_Internal_Sym *,
9906 asection *,
9907 struct elf_link_hash_entry *))
9908{
9909 output_arch_syminfo osi;
9910 struct elf32_arm_link_hash_table *htab;
91a5743d
PB		 9911 bfd_vma offset;
9912 bfd_size_type size;
4e617b1e
PB		 9913
9914 htab = elf32_arm_hash_table (info);
4e617b1e 9915 check_use_blx(htab);
91a5743d 9916
4e617b1e
PB		 9917 osi.finfo = finfo;
9918 osi.info = info;
9919 osi.func = func;
91a5743d
PB		 9920
9921 /* ARM->Thumb glue. */
9922 if (htab->arm_glue_size > 0)
9923 {
9924 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9925 ARM2THUMB_GLUE_SECTION_NAME);
9926
9927 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9928 (output_bfd, osi.sec->output_section);
9929 if (info->shared || htab->root.is_relocatable_executable
9930 || htab->pic_veneer)
9931 size = ARM2THUMB_PIC_GLUE_SIZE;
9932 else if (htab->use_blx)
9933 size = ARM2THUMB_V5_STATIC_GLUE_SIZE;
9934 else
9935 size = ARM2THUMB_STATIC_GLUE_SIZE;
4e617b1e 9936
91a5743d
PB		 9937 for (offset = 0; offset < htab->arm_glue_size; offset += size)
9938 {
9939 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset);
9940 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, offset + size - 4);
9941 }
9942 }
9943
9944 /* Thumb->ARM glue. */
9945 if (htab->thumb_glue_size > 0)
9946 {
9947 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9948 THUMB2ARM_GLUE_SECTION_NAME);
9949
9950 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9951 (output_bfd, osi.sec->output_section);
9952 size = THUMB2ARM_GLUE_SIZE;
9953
9954 for (offset = 0; offset < htab->thumb_glue_size; offset += size)
9955 {
9956 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_THUMB, offset);
9957 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, offset + 4);
9958 }
9959 }
9960
845b51d6
PB		 9961 /* ARMv4 BX veneers. */
9962 if (htab->bx_glue_size > 0)
9963 {
9964 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner,
9965 ARM_BX_GLUE_SECTION_NAME);
9966
9967 osi.sec_shndx = _bfd_elf_section_from_bfd_section
9968 (output_bfd, osi.sec->output_section);
9969
9970 elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0);
9971 }
9972
91a5743d
PB		 9973 /* Finally, output mapping symbols for the PLT. */
9974 if (!htab->splt || htab->splt->size == 0)
9975 return TRUE;
9976
9977 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd,
9978 htab->splt->output_section);
9979 osi.sec = htab->splt;
4e617b1e
PB		 9980 /* Output mapping symbols for the plt header. SymbianOS does not have a
9981 plt header. */
9982 if (htab->vxworks_p)
9983 {
9984 /* VxWorks shared libraries have no PLT header. */
9985 if (!info->shared)
9986 {
9987 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9988 return FALSE;
9989 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 12))
9990 return FALSE;
9991 }
9992 }
9993 else if (!htab->symbian_p)
9994 {
9995 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_ARM, 0))
9996 return FALSE;
9997#ifndef FOUR_WORD_PLT
9998 if (!elf32_arm_ouput_plt_map_sym (&osi, ARM_MAP_DATA, 16))
9999 return FALSE;
10000#endif
10001 }
10002
10003 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi);
10004 return TRUE;
10005}
10006
e489d0ae
PB		 10007/* Allocate target specific section data. */
10008
10009static bfd_boolean
10010elf32_arm_new_section_hook (bfd *abfd, asection *sec)
10011{
f592407e
AM		 10012 if (!sec->used_by_bfd)
10013 {
10014 _arm_elf_section_data *sdata;
10015 bfd_size_type amt = sizeof (*sdata);
e489d0ae 10016
f592407e
AM		 10017 sdata = bfd_zalloc (abfd, amt);
10018 if (sdata == NULL)
10019 return FALSE;
10020 sec->used_by_bfd = sdata;
10021 }
e489d0ae 10022
957c6e41 10023 record_section_with_arm_elf_section_data (sec);
8e3de13a 10024
e489d0ae
PB		 10025 return _bfd_elf_new_section_hook (abfd, sec);
10026}
10027
10028
10029/* Used to order a list of mapping symbols by address. */
10030
10031static int
10032elf32_arm_compare_mapping (const void * a, const void * b)
10033{
7f6a71ff
JM		 10034 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a;
10035 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b;
10036
10037 if (amap->vma > bmap->vma)
10038 return 1;
10039 else if (amap->vma < bmap->vma)
10040 return -1;
10041 else if (amap->type > bmap->type)
10042 /* Ensure results do not depend on the host qsort for objects with
10043 multiple mapping symbols at the same address by sorting on type
10044 after vma. */
10045 return 1;
10046 else if (amap->type < bmap->type)
10047 return -1;
10048 else
10049 return 0;
e489d0ae
PB		 10050}
10051
10052
10053/* Do code byteswapping. Return FALSE afterwards so that the section is
10054 written out as normal. */
10055
10056static bfd_boolean
c7b8f16e
JB		 10057elf32_arm_write_section (bfd *output_bfd,
10058 struct bfd_link_info *link_info, asection *sec,
e489d0ae
PB		 10059 bfd_byte *contents)
10060{
c7b8f16e 10061 int mapcount, errcount;
8e3de13a 10062 _arm_elf_section_data *arm_data;
c7b8f16e 10063 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info);
e489d0ae 10064 elf32_arm_section_map *map;
c7b8f16e 10065 elf32_vfp11_erratum_list *errnode;
e489d0ae
PB		 10066 bfd_vma ptr;
10067 bfd_vma end;
c7b8f16e 10068 bfd_vma offset = sec->output_section->vma + sec->output_offset;
e489d0ae
PB		 10069 bfd_byte tmp;
10070 int i;
57e8b36a 10071
8e3de13a
NC		 10072 /* If this section has not been allocated an _arm_elf_section_data
10073 structure then we cannot record anything. */
10074 arm_data = get_arm_elf_section_data (sec);
10075 if (arm_data == NULL)
10076 return FALSE;
10077
10078 mapcount = arm_data->mapcount;
10079 map = arm_data->map;
c7b8f16e
JB		 10080 errcount = arm_data->erratumcount;
10081
10082 if (errcount != 0)
10083 {
10084 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0;
10085
10086 for (errnode = arm_data->erratumlist; errnode != 0;
10087 errnode = errnode->next)
10088 {
10089 bfd_vma index = errnode->vma - offset;
10090
10091 switch (errnode->type)
10092 {
10093 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER:
10094 {
10095 bfd_vma branch_to_veneer;
10096 /* Original condition code of instruction, plus bit mask for
10097 ARM B instruction. */
10098 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000)
10099 | 0x0a000000;
10100
10101 /* The instruction is before the label. */
10102 index -= 4;
10103
10104 /* Above offset included in -4 below. */
10105 branch_to_veneer = errnode->u.b.veneer->vma
10106 - errnode->vma - 4;
10107
10108 if ((signed) branch_to_veneer < -(1 << 25)
10109 || (signed) branch_to_veneer >= (1 << 25))
10110 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10111 "range"), output_bfd);
10112
10113 insn |= (branch_to_veneer >> 2) & 0xffffff;
10114 contents[endianflip ^ index] = insn & 0xff;
10115 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10116 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10117 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10118 }
10119 break;
10120
10121 case VFP11_ERRATUM_ARM_VENEER:
10122 {
10123 bfd_vma branch_from_veneer;
10124 unsigned int insn;
10125
10126 /* Take size of veneer into account. */
10127 branch_from_veneer = errnode->u.v.branch->vma
10128 - errnode->vma - 12;
10129
10130 if ((signed) branch_from_veneer < -(1 << 25)
10131 || (signed) branch_from_veneer >= (1 << 25))
10132 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of "
10133 "range"), output_bfd);
10134
10135 /* Original instruction. */
10136 insn = errnode->u.v.branch->u.b.vfp_insn;
10137 contents[endianflip ^ index] = insn & 0xff;
10138 contents[endianflip ^ (index + 1)] = (insn >> 8) & 0xff;
10139 contents[endianflip ^ (index + 2)] = (insn >> 16) & 0xff;
10140 contents[endianflip ^ (index + 3)] = (insn >> 24) & 0xff;
10141
10142 /* Branch back to insn after original insn. */
10143 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff);
10144 contents[endianflip ^ (index + 4)] = insn & 0xff;
10145 contents[endianflip ^ (index + 5)] = (insn >> 8) & 0xff;
10146 contents[endianflip ^ (index + 6)] = (insn >> 16) & 0xff;
10147 contents[endianflip ^ (index + 7)] = (insn >> 24) & 0xff;
10148 }
10149 break;
10150
10151 default:
10152 abort ();
10153 }
10154 }
10155 }
e489d0ae
PB		 10156
10157 if (mapcount == 0)
10158 return FALSE;
10159
c7b8f16e 10160 if (globals->byteswap_code)
e489d0ae 10161 {
c7b8f16e 10162 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping);
57e8b36a 10163
c7b8f16e
JB		 10164 ptr = map[0].vma;
10165 for (i = 0; i < mapcount; i++)
10166 {
10167 if (i == mapcount - 1)
10168 end = sec->size;
10169 else
10170 end = map[i + 1].vma;
e489d0ae 10171
c7b8f16e 10172 switch (map[i].type)
e489d0ae 10173 {
c7b8f16e
JB		 10174 case 'a':
10175 /* Byte swap code words. */
10176 while (ptr + 3 < end)
10177 {
10178 tmp = contents[ptr];
10179 contents[ptr] = contents[ptr + 3];
10180 contents[ptr + 3] = tmp;
10181 tmp = contents[ptr + 1];
10182 contents[ptr + 1] = contents[ptr + 2];
10183 contents[ptr + 2] = tmp;
10184 ptr += 4;
10185 }
10186 break;
e489d0ae 10187
c7b8f16e
JB		 10188 case 't':
10189 /* Byte swap code halfwords. */
10190 while (ptr + 1 < end)
10191 {
10192 tmp = contents[ptr];
10193 contents[ptr] = contents[ptr + 1];
10194 contents[ptr + 1] = tmp;
10195 ptr += 2;
10196 }
10197 break;
10198
10199 case 'd':
10200 /* Leave data alone. */
10201 break;
10202 }
10203 ptr = end;
10204 }
e489d0ae 10205 }
8e3de13a 10206
93204d3a 10207 free (map);
8e3de13a 10208 arm_data->mapcount = 0;
c7b8f16e 10209 arm_data->mapsize = 0;
8e3de13a
NC		 10210 arm_data->map = NULL;
10211 unrecord_section_with_arm_elf_section_data (sec);
10212
e489d0ae
PB		 10213 return FALSE;
10214}
10215
957c6e41
NC		 10216static void
10217unrecord_section_via_map_over_sections (bfd * abfd ATTRIBUTE_UNUSED,
10218 asection * sec,
10219 void * ignore ATTRIBUTE_UNUSED)
10220{
10221 unrecord_section_with_arm_elf_section_data (sec);
10222}
10223
10224static bfd_boolean
10225elf32_arm_close_and_cleanup (bfd * abfd)
10226{
b25e3d87
L		 10227 if (abfd->sections)
10228 bfd_map_over_sections (abfd,
10229 unrecord_section_via_map_over_sections,
10230 NULL);
957c6e41
NC		 10231
10232 return _bfd_elf_close_and_cleanup (abfd);
10233}
10234
b25e3d87
L		 10235static bfd_boolean
10236elf32_arm_bfd_free_cached_info (bfd * abfd)
10237{
10238 if (abfd->sections)
10239 bfd_map_over_sections (abfd,
10240 unrecord_section_via_map_over_sections,
10241 NULL);
10242
10243 return _bfd_free_cached_info (abfd);
10244}
10245
b7693d02
DJ		 10246/* Display STT_ARM_TFUNC symbols as functions. */
10247
10248static void
10249elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED,
10250 asymbol *asym)
10251{
10252 elf_symbol_type *elfsym = (elf_symbol_type *) asym;
10253
10254 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC)
10255 elfsym->symbol.flags |= BSF_FUNCTION;
10256}
10257
0beaef2b
PB		 10258
10259/* Mangle thumb function symbols as we read them in. */
10260
8384fb8f 10261static bfd_boolean
0beaef2b
PB		 10262elf32_arm_swap_symbol_in (bfd * abfd,
10263 const void *psrc,
10264 const void *pshn,
10265 Elf_Internal_Sym *dst)
10266{
8384fb8f
AM		 10267 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst))
10268 return FALSE;
0beaef2b
PB		 10269
10270 /* New EABI objects mark thumb function symbols by setting the low bit of
10271 the address. Turn these into STT_ARM_TFUNC. */
10272 if (ELF_ST_TYPE (dst->st_info) == STT_FUNC
10273 && (dst->st_value & 1))
10274 {
10275 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC);
10276 dst->st_value &= ~(bfd_vma) 1;
10277 }
8384fb8f 10278 return TRUE;
0beaef2b
PB		 10279}
10280
10281
10282/* Mangle thumb function symbols as we write them out. */
10283
10284static void
10285elf32_arm_swap_symbol_out (bfd *abfd,
10286 const Elf_Internal_Sym *src,
10287 void *cdst,
10288 void *shndx)
10289{
10290 Elf_Internal_Sym newsym;
10291
10292 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit
10293 of the address set, as per the new EABI. We do this unconditionally
10294 because objcopy does not set the elf header flags until after
10295 it writes out the symbol table. */
10296 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC)
10297 {
10298 newsym = *src;
10299 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC);
0fa3dcad
PB		 10300 if (newsym.st_shndx != SHN_UNDEF)
10301 {
10302 /* Do this only for defined symbols. At link type, the static
10303 linker will simulate the work of dynamic linker of resolving
10304 symbols and will carry over the thumbness of found symbols to
10305 the output symbol table. It's not clear how it happens, but
b0fead2b 10306 the thumbness of undefined symbols can well be different at
0fa3dcad
PB		 10307 runtime, and writing '1' for them will be confusing for users
10308 and possibly for dynamic linker itself.
10309 */
10310 newsym.st_value |= 1;
10311 }
0beaef2b
PB		 10312
10313 src = &newsym;
10314 }
10315 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx);
10316}
10317
b294bdf8
MM		 10318/* Add the PT_ARM_EXIDX program header. */
10319
10320static bfd_boolean
10321elf32_arm_modify_segment_map (bfd *abfd,
10322 struct bfd_link_info *info ATTRIBUTE_UNUSED)
10323{
10324 struct elf_segment_map *m;
10325 asection *sec;
10326
10327 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10328 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10329 {
10330 /* If there is already a PT_ARM_EXIDX header, then we do not
10331 want to add another one. This situation arises when running
10332 "strip"; the input binary already has the header. */
10333 m = elf_tdata (abfd)->segment_map;
10334 while (m && m->p_type != PT_ARM_EXIDX)
10335 m = m->next;
10336 if (!m)
10337 {
10338 m = bfd_zalloc (abfd, sizeof (struct elf_segment_map));
10339 if (m == NULL)
10340 return FALSE;
10341 m->p_type = PT_ARM_EXIDX;
10342 m->count = 1;
10343 m->sections[0] = sec;
10344
10345 m->next = elf_tdata (abfd)->segment_map;
10346 elf_tdata (abfd)->segment_map = m;
10347 }
10348 }
10349
10350 return TRUE;
10351}
10352
10353/* We may add a PT_ARM_EXIDX program header. */
10354
10355static int
a6b96beb
AM		 10356elf32_arm_additional_program_headers (bfd *abfd,
10357 struct bfd_link_info *info ATTRIBUTE_UNUSED)
b294bdf8
MM		 10358{
10359 asection *sec;
10360
10361 sec = bfd_get_section_by_name (abfd, ".ARM.exidx");
10362 if (sec != NULL && (sec->flags & SEC_LOAD) != 0)
10363 return 1;
10364 else
10365 return 0;
10366}
10367
fcb93ecf
PB		 10368/* We have two function types: STT_FUNC and STT_ARM_TFUNC. */
10369static bfd_boolean
10370elf32_arm_is_function_type (unsigned int type)
10371{
10372 return (type == STT_FUNC) || (type == STT_ARM_TFUNC);
10373}
10374
0beaef2b
PB		 10375/* We use this to override swap_symbol_in and swap_symbol_out. */
10376const struct elf_size_info elf32_arm_size_info = {
10377 sizeof (Elf32_External_Ehdr),
10378 sizeof (Elf32_External_Phdr),
10379 sizeof (Elf32_External_Shdr),
10380 sizeof (Elf32_External_Rel),
10381 sizeof (Elf32_External_Rela),
10382 sizeof (Elf32_External_Sym),
10383 sizeof (Elf32_External_Dyn),
10384 sizeof (Elf_External_Note),
10385 4,
10386 1,
10387 32, 2,
10388 ELFCLASS32, EV_CURRENT,
10389 bfd_elf32_write_out_phdrs,
10390 bfd_elf32_write_shdrs_and_ehdr,
1489a3a0 10391 bfd_elf32_checksum_contents,
0beaef2b
PB		 10392 bfd_elf32_write_relocs,
10393 elf32_arm_swap_symbol_in,
10394 elf32_arm_swap_symbol_out,
10395 bfd_elf32_slurp_reloc_table,
10396 bfd_elf32_slurp_symbol_table,
10397 bfd_elf32_swap_dyn_in,
10398 bfd_elf32_swap_dyn_out,
10399 bfd_elf32_swap_reloc_in,
10400 bfd_elf32_swap_reloc_out,
10401 bfd_elf32_swap_reloca_in,
10402 bfd_elf32_swap_reloca_out
10403};
10404
252b5132
RH		 10405#define ELF_ARCH bfd_arch_arm
10406#define ELF_MACHINE_CODE EM_ARM
d0facd1b
NC		 10407#ifdef __QNXTARGET__
10408#define ELF_MAXPAGESIZE 0x1000
10409#else
f21f3fe0 10410#define ELF_MAXPAGESIZE 0x8000
d0facd1b 10411#endif
b1342370 10412#define ELF_MINPAGESIZE 0x1000
24718e3b 10413#define ELF_COMMONPAGESIZE 0x1000
252b5132 10414
ba93b8ac
DJ		 10415#define bfd_elf32_mkobject elf32_arm_mkobject
10416
99e4ae17
AJ		 10417#define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data
10418#define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data
252b5132
RH		 10419#define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags
10420#define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data
10421#define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create
dc810e39 10422#define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup
157090f7 10423#define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup
252b5132 10424#define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line
4ab527b0 10425#define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info
e489d0ae 10426#define bfd_elf32_new_section_hook elf32_arm_new_section_hook
3c9458e9 10427#define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol
957c6e41 10428#define bfd_elf32_close_and_cleanup elf32_arm_close_and_cleanup
b25e3d87 10429#define bfd_elf32_bfd_free_cached_info elf32_arm_bfd_free_cached_info
252b5132
RH		 10430
10431#define elf_backend_get_symbol_type elf32_arm_get_symbol_type
10432#define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook
6a5bb875 10433#define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections
252b5132
RH		 10434#define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook
10435#define elf_backend_check_relocs elf32_arm_check_relocs
dc810e39 10436#define elf_backend_relocate_section elf32_arm_relocate_section
e489d0ae 10437#define elf_backend_write_section elf32_arm_write_section
252b5132 10438#define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol
5e681ec4 10439#define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections
252b5132
RH		 10440#define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol
10441#define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections
10442#define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections
74541ad4 10443#define elf_backend_init_index_section _bfd_elf_init_2_index_sections
ba96a88f 10444#define elf_backend_post_process_headers elf32_arm_post_process_headers
99e4ae17 10445#define elf_backend_reloc_type_class elf32_arm_reloc_type_class
c178919b 10446#define elf_backend_object_p elf32_arm_object_p
e16bb312 10447#define elf_backend_section_flags elf32_arm_section_flags
40a18ebd
NC		 10448#define elf_backend_fake_sections elf32_arm_fake_sections
10449#define elf_backend_section_from_shdr elf32_arm_section_from_shdr
e16bb312 10450#define elf_backend_final_write_processing elf32_arm_final_write_processing
5e681ec4 10451#define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol
b7693d02 10452#define elf_backend_symbol_processing elf32_arm_symbol_processing
0beaef2b 10453#define elf_backend_size_info elf32_arm_size_info
b294bdf8
MM		 10454#define elf_backend_modify_segment_map elf32_arm_modify_segment_map
10455#define elf_backend_additional_program_headers \
10456 elf32_arm_additional_program_headers
4e617b1e
PB		 10457#define elf_backend_output_arch_local_syms \
10458 elf32_arm_output_arch_local_syms
a4fd1a8e
PB		 10459#define elf_backend_begin_write_processing \
10460 elf32_arm_begin_write_processing
fcb93ecf 10461#define elf_backend_is_function_type elf32_arm_is_function_type
252b5132 10462
5e681ec4 10463#define elf_backend_can_refcount 1
252b5132
RH		 10464#define elf_backend_can_gc_sections 1
10465#define elf_backend_plt_readonly 1
10466#define elf_backend_want_got_plt 1
10467#define elf_backend_want_plt_sym 0
4e7fd91e
PB		 10468#define elf_backend_may_use_rel_p 1
10469#define elf_backend_may_use_rela_p 0
10470#define elf_backend_default_use_rela_p 0
252b5132 10471
04f7c78d 10472#define elf_backend_got_header_size 12
04f7c78d 10473
104d59d1
JM		 10474#undef elf_backend_obj_attrs_vendor
10475#define elf_backend_obj_attrs_vendor "aeabi"
10476#undef elf_backend_obj_attrs_section
10477#define elf_backend_obj_attrs_section ".ARM.attributes"
10478#undef elf_backend_obj_attrs_arg_type
10479#define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type
10480#undef elf_backend_obj_attrs_section_type
10481#define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES
10482
252b5132 10483#include "elf32-target.h"
7f266840 10484
4e7fd91e
PB		 10485/* VxWorks Targets */
10486
10487#undef TARGET_LITTLE_SYM
10488#define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec
10489#undef TARGET_LITTLE_NAME
10490#define TARGET_LITTLE_NAME "elf32-littlearm-vxworks"
10491#undef TARGET_BIG_SYM
10492#define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec
10493#undef TARGET_BIG_NAME
10494#define TARGET_BIG_NAME "elf32-bigarm-vxworks"
10495
10496/* Like elf32_arm_link_hash_table_create -- but overrides
10497 appropriately for VxWorks. */
10498static struct bfd_link_hash_table *
10499elf32_arm_vxworks_link_hash_table_create (bfd *abfd)
10500{
10501 struct bfd_link_hash_table *ret;
10502
10503 ret = elf32_arm_link_hash_table_create (abfd);
10504 if (ret)
10505 {
10506 struct elf32_arm_link_hash_table *htab
00a97672 10507 = (struct elf32_arm_link_hash_table *) ret;
4e7fd91e 10508 htab->use_rel = 0;
00a97672 10509 htab->vxworks_p = 1;
4e7fd91e
PB		 10510 }
10511 return ret;
10512}
10513
00a97672
RS		 10514static void
10515elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker)
10516{
10517 elf32_arm_final_write_processing (abfd, linker);
10518 elf_vxworks_final_write_processing (abfd, linker);
10519}
10520
4e7fd91e
PB		 10521#undef elf32_bed
10522#define elf32_bed elf32_arm_vxworks_bed
10523
10524#undef bfd_elf32_bfd_link_hash_table_create
10525#define bfd_elf32_bfd_link_hash_table_create \
10526 elf32_arm_vxworks_link_hash_table_create
00a97672
RS		 10527#undef elf_backend_add_symbol_hook
10528#define elf_backend_add_symbol_hook \
10529 elf_vxworks_add_symbol_hook
10530#undef elf_backend_final_write_processing
10531#define elf_backend_final_write_processing \
10532 elf32_arm_vxworks_final_write_processing
10533#undef elf_backend_emit_relocs
10534#define elf_backend_emit_relocs \
10535 elf_vxworks_emit_relocs
4e7fd91e
PB		 10536
10537#undef elf_backend_may_use_rel_p
00a97672 10538#define elf_backend_may_use_rel_p 0
4e7fd91e 10539#undef elf_backend_may_use_rela_p
00a97672 10540#define elf_backend_may_use_rela_p 1
4e7fd91e 10541#undef elf_backend_default_use_rela_p
00a97672 10542#define elf_backend_default_use_rela_p 1
00a97672
RS		 10543#undef elf_backend_want_plt_sym
10544#define elf_backend_want_plt_sym 1
10545#undef ELF_MAXPAGESIZE
10546#define ELF_MAXPAGESIZE 0x1000
4e7fd91e
PB		 10547
10548#include "elf32-target.h"
10549
10550
7f266840
DJ		 10551/* Symbian OS Targets */
10552
10553#undef TARGET_LITTLE_SYM
10554#define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec
10555#undef TARGET_LITTLE_NAME
10556#define TARGET_LITTLE_NAME "elf32-littlearm-symbian"
10557#undef TARGET_BIG_SYM
10558#define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec
10559#undef TARGET_BIG_NAME
10560#define TARGET_BIG_NAME "elf32-bigarm-symbian"
10561
10562/* Like elf32_arm_link_hash_table_create -- but overrides
10563 appropriately for Symbian OS. */
10564static struct bfd_link_hash_table *
10565elf32_arm_symbian_link_hash_table_create (bfd *abfd)
10566{
10567 struct bfd_link_hash_table *ret;
10568
10569 ret = elf32_arm_link_hash_table_create (abfd);
10570 if (ret)
10571 {
10572 struct elf32_arm_link_hash_table *htab
10573 = (struct elf32_arm_link_hash_table *)ret;
10574 /* There is no PLT header for Symbian OS. */
10575 htab->plt_header_size = 0;
10576 /* The PLT entries are each three instructions. */
10577 htab->plt_entry_size = 4 * NUM_ELEM (elf32_arm_symbian_plt_entry);
10578 htab->symbian_p = 1;
33bfe774
JB		 10579 /* Symbian uses armv5t or above, so use_blx is always true. */
10580 htab->use_blx = 1;
67687978 10581 htab->root.is_relocatable_executable = 1;
7f266840
DJ		 10582 }
10583 return ret;
10584}
10585
b35d266b 10586static const struct bfd_elf_special_section
551b43fd 10587elf32_arm_symbian_special_sections[] =
7f266840 10588{
5cd3778d
MM		 10589 /* In a BPABI executable, the dynamic linking sections do not go in
10590 the loadable read-only segment. The post-linker may wish to
10591 refer to these sections, but they are not part of the final
10592 program image. */
0112cd26
NC		 10593 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 },
10594 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 },
10595 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 },
10596 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 },
10597 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 },
5cd3778d
MM		 10598 /* These sections do not need to be writable as the SymbianOS
10599 postlinker will arrange things so that no dynamic relocation is
10600 required. */
0112cd26
NC		 10601 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC },
10602 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC },
10603 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC },
10604 { NULL, 0, 0, 0, 0 }
7f266840
DJ		 10605};
10606
c3c76620 10607static void
b34af79c 10608elf32_arm_symbian_begin_write_processing (bfd *abfd,
a4fd1a8e 10609 struct bfd_link_info *link_info)
c3c76620
MM		 10610{
10611 /* BPABI objects are never loaded directly by an OS kernel; they are
10612 processed by a postlinker first, into an OS-specific format. If
10613 the D_PAGED bit is set on the file, BFD will align segments on
10614 page boundaries, so that an OS can directly map the file. With
10615 BPABI objects, that just results in wasted space. In addition,
10616 because we clear the D_PAGED bit, map_sections_to_segments will
10617 recognize that the program headers should not be mapped into any
10618 loadable segment. */
10619 abfd->flags &= ~D_PAGED;
a4fd1a8e 10620 elf32_arm_begin_write_processing(abfd, link_info);
c3c76620 10621}
7f266840
DJ		 10622
10623static bfd_boolean
b34af79c 10624elf32_arm_symbian_modify_segment_map (bfd *abfd,
b294bdf8 10625 struct bfd_link_info *info)
7f266840
DJ		 10626{
10627 struct elf_segment_map *m;
10628 asection *dynsec;
10629
7f266840
DJ		 10630 /* BPABI shared libraries and executables should have a PT_DYNAMIC
10631 segment. However, because the .dynamic section is not marked
10632 with SEC_LOAD, the generic ELF code will not create such a
10633 segment. */
10634 dynsec = bfd_get_section_by_name (abfd, ".dynamic");
10635 if (dynsec)
10636 {
8ded5a0f
AM		 10637 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next)
10638 if (m->p_type == PT_DYNAMIC)
10639 break;
10640
10641 if (m == NULL)
10642 {
10643 m = _bfd_elf_make_dynamic_segment (abfd, dynsec);
10644 m->next = elf_tdata (abfd)->segment_map;
10645 elf_tdata (abfd)->segment_map = m;
10646 }
7f266840
DJ		 10647 }
10648
b294bdf8
MM		 10649 /* Also call the generic arm routine. */
10650 return elf32_arm_modify_segment_map (abfd, info);
7f266840
DJ		 10651}
10652
10653#undef elf32_bed
10654#define elf32_bed elf32_arm_symbian_bed
10655
10656/* The dynamic sections are not allocated on SymbianOS; the postlinker
10657 will process them and then discard them. */
10658#undef ELF_DYNAMIC_SEC_FLAGS
10659#define ELF_DYNAMIC_SEC_FLAGS \
10660 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED)
10661
10662#undef bfd_elf32_bfd_link_hash_table_create
10663#define bfd_elf32_bfd_link_hash_table_create \
10664 elf32_arm_symbian_link_hash_table_create
00a97672 10665#undef elf_backend_add_symbol_hook
7f266840 10666
29ef7005
L		 10667#undef elf_backend_special_sections
10668#define elf_backend_special_sections elf32_arm_symbian_special_sections
7f266840 10669
c3c76620
MM		 10670#undef elf_backend_begin_write_processing
10671#define elf_backend_begin_write_processing \
10672 elf32_arm_symbian_begin_write_processing
00a97672
RS		 10673#undef elf_backend_final_write_processing
10674#define elf_backend_final_write_processing \
10675 elf32_arm_final_write_processing
10676#undef elf_backend_emit_relocs
c3c76620 10677
7f266840
DJ		 10678#undef elf_backend_modify_segment_map
10679#define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map
10680
10681/* There is no .got section for BPABI objects, and hence no header. */
10682#undef elf_backend_got_header_size
10683#define elf_backend_got_header_size 0
10684
10685/* Similarly, there is no .got.plt section. */
10686#undef elf_backend_want_got_plt
10687#define elf_backend_want_got_plt 0
10688
4e7fd91e 10689#undef elf_backend_may_use_rel_p
00a97672 10690#define elf_backend_may_use_rel_p 1
4e7fd91e 10691#undef elf_backend_may_use_rela_p
00a97672 10692#define elf_backend_may_use_rela_p 0
4e7fd91e 10693#undef elf_backend_default_use_rela_p
00a97672 10694#define elf_backend_default_use_rela_p 0
00a97672
RS		 10695#undef elf_backend_want_plt_sym
10696#define elf_backend_want_plt_sym 0
10697#undef ELF_MAXPAGESIZE
10698#define ELF_MAXPAGESIZE 0x8000
4e7fd91e 10699
7f266840 10700#include "elf32-target.h"
GDB Binutils - Deliverables
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