Remove spurious whitespace introduced by previous delta.
[deliverable/binutils-gdb.git] / bfd / elf32-cr16.c
CommitLineData
3d3d428f 1/* BFD back-end for National Semiconductor's CR16 ELF
6f2750fe 2 Copyright (C) 2007-2016 Free Software Foundation, Inc.
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3 Written by M R Swami Reddy.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software Foundation,
19 Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfdlink.h"
24#include "libbfd.h"
25#include "libiberty.h"
26#include "elf-bfd.h"
27#include "elf/cr16.h"
28
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29/* The cr16 linker needs to keep track of the number of relocs that
30 it decides to copy in check_relocs for each symbol. This is so
31 that it can discard PC relative relocs if it doesn't need them when
32 linking with -Bsymbolic. We store the information in a field
33 extending the regular ELF linker hash table. */
34
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35struct elf32_cr16_link_hash_entry
36{
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37 /* The basic elf link hash table entry. */
38 struct elf_link_hash_entry root;
39
40 /* For function symbols, the number of times this function is
41 called directly (ie by name). */
42 unsigned int direct_calls;
43
44 /* For function symbols, the size of this function's stack
45 (if <= 255 bytes). We stuff this into "call" instructions
46 to this target when it's valid and profitable to do so.
47
48 This does not include stack allocated by movm! */
49 unsigned char stack_size;
50
51 /* For function symbols, arguments (if any) for movm instruction
52 in the prologue. We stuff this value into "call" instructions
53 to the target when it's valid and profitable to do so. */
54 unsigned char movm_args;
55
56 /* For function symbols, the amount of stack space that would be allocated
57 by the movm instruction. This is redundant with movm_args, but we
58 add it to the hash table to avoid computing it over and over. */
59 unsigned char movm_stack_size;
60
61/* Used to mark functions which have had redundant parts of their
62 prologue deleted. */
63#define CR16_DELETED_PROLOGUE_BYTES 0x1
64 unsigned char flags;
65
66 /* Calculated value. */
67 bfd_vma value;
68};
69
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70/* cr16_reloc_map array maps BFD relocation enum into a CRGAS relocation type. */
71
72struct cr16_reloc_map
73{
74 bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
75 unsigned short cr16_reloc_type; /* CR16 relocation type. */
76};
77
78static const struct cr16_reloc_map cr16_reloc_map[R_CR16_MAX] =
79{
80 {BFD_RELOC_NONE, R_CR16_NONE},
81 {BFD_RELOC_CR16_NUM8, R_CR16_NUM8},
82 {BFD_RELOC_CR16_NUM16, R_CR16_NUM16},
83 {BFD_RELOC_CR16_NUM32, R_CR16_NUM32},
84 {BFD_RELOC_CR16_NUM32a, R_CR16_NUM32a},
85 {BFD_RELOC_CR16_REGREL4, R_CR16_REGREL4},
86 {BFD_RELOC_CR16_REGREL4a, R_CR16_REGREL4a},
87 {BFD_RELOC_CR16_REGREL14, R_CR16_REGREL14},
88 {BFD_RELOC_CR16_REGREL14a, R_CR16_REGREL14a},
89 {BFD_RELOC_CR16_REGREL16, R_CR16_REGREL16},
90 {BFD_RELOC_CR16_REGREL20, R_CR16_REGREL20},
91 {BFD_RELOC_CR16_REGREL20a, R_CR16_REGREL20a},
92 {BFD_RELOC_CR16_ABS20, R_CR16_ABS20},
93 {BFD_RELOC_CR16_ABS24, R_CR16_ABS24},
94 {BFD_RELOC_CR16_IMM4, R_CR16_IMM4},
95 {BFD_RELOC_CR16_IMM8, R_CR16_IMM8},
96 {BFD_RELOC_CR16_IMM16, R_CR16_IMM16},
97 {BFD_RELOC_CR16_IMM20, R_CR16_IMM20},
98 {BFD_RELOC_CR16_IMM24, R_CR16_IMM24},
99 {BFD_RELOC_CR16_IMM32, R_CR16_IMM32},
100 {BFD_RELOC_CR16_IMM32a, R_CR16_IMM32a},
101 {BFD_RELOC_CR16_DISP4, R_CR16_DISP4},
102 {BFD_RELOC_CR16_DISP8, R_CR16_DISP8},
103 {BFD_RELOC_CR16_DISP16, R_CR16_DISP16},
104 {BFD_RELOC_CR16_DISP24, R_CR16_DISP24},
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105 {BFD_RELOC_CR16_DISP24a, R_CR16_DISP24a},
106 {BFD_RELOC_CR16_SWITCH8, R_CR16_SWITCH8},
107 {BFD_RELOC_CR16_SWITCH16, R_CR16_SWITCH16},
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108 {BFD_RELOC_CR16_SWITCH32, R_CR16_SWITCH32},
109 {BFD_RELOC_CR16_GOT_REGREL20, R_CR16_GOT_REGREL20},
110 {BFD_RELOC_CR16_GOTC_REGREL20, R_CR16_GOTC_REGREL20},
111 {BFD_RELOC_CR16_GLOB_DAT, R_CR16_GLOB_DAT}
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112};
113
114static reloc_howto_type cr16_elf_howto_table[] =
115{
116 HOWTO (R_CR16_NONE, /* type */
117 0, /* rightshift */
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AM
118 3, /* size */
119 0, /* bitsize */
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120 FALSE, /* pc_relative */
121 0, /* bitpos */
122 complain_overflow_dont, /* complain_on_overflow */
123 bfd_elf_generic_reloc, /* special_function */
124 "R_CR16_NONE", /* name */
125 FALSE, /* partial_inplace */
126 0, /* src_mask */
127 0, /* dst_mask */
128 FALSE), /* pcrel_offset */
129
130 HOWTO (R_CR16_NUM8, /* type */
131 0, /* rightshift */
132 0, /* size */
133 8, /* bitsize */
134 FALSE, /* pc_relative */
135 0, /* bitpos */
136 complain_overflow_bitfield,/* complain_on_overflow */
137 bfd_elf_generic_reloc, /* special_function */
138 "R_CR16_NUM8", /* name */
139 FALSE, /* partial_inplace */
dc80fd5c 140 0x0, /* src_mask */
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141 0xff, /* dst_mask */
142 FALSE), /* pcrel_offset */
143
144 HOWTO (R_CR16_NUM16, /* type */
145 0, /* rightshift */
146 1, /* size */
147 16, /* bitsize */
148 FALSE, /* pc_relative */
149 0, /* bitpos */
150 complain_overflow_bitfield,/* complain_on_overflow */
151 bfd_elf_generic_reloc, /* special_function */
152 "R_CR16_NUM16", /* name */
153 FALSE, /* partial_inplace */
dc80fd5c 154 0x0, /* src_mask */
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155 0xffff, /* dst_mask */
156 FALSE), /* pcrel_offset */
157
158 HOWTO (R_CR16_NUM32, /* type */
159 0, /* rightshift */
160 2, /* size */
161 32, /* bitsize */
162 FALSE, /* pc_relative */
163 0, /* bitpos */
164 complain_overflow_bitfield,/* complain_on_overflow */
165 bfd_elf_generic_reloc, /* special_function */
166 "R_CR16_NUM32", /* name */
167 FALSE, /* partial_inplace */
dc80fd5c 168 0x0, /* src_mask */
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169 0xffffffff, /* dst_mask */
170 FALSE), /* pcrel_offset */
171
172 HOWTO (R_CR16_NUM32a, /* type */
173 1, /* rightshift */
174 2, /* size */
175 32, /* bitsize */
176 FALSE, /* pc_relative */
177 0, /* bitpos */
178 complain_overflow_bitfield,/* complain_on_overflow */
179 bfd_elf_generic_reloc, /* special_function */
180 "R_CR16_NUM32a", /* name */
181 FALSE, /* partial_inplace */
dc80fd5c 182 0x0, /* src_mask */
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183 0xffffffff, /* dst_mask */
184 FALSE), /* pcrel_offset */
185
186 HOWTO (R_CR16_REGREL4, /* type */
187 0, /* rightshift */
188 0, /* size */
189 4, /* bitsize */
190 FALSE, /* pc_relative */
191 0, /* bitpos */
192 complain_overflow_bitfield,/* complain_on_overflow */
193 bfd_elf_generic_reloc, /* special_function */
194 "R_CR16_REGREL4", /* name */
195 FALSE, /* partial_inplace */
dc80fd5c 196 0x0, /* src_mask */
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197 0xf, /* dst_mask */
198 FALSE), /* pcrel_offset */
199
200 HOWTO (R_CR16_REGREL4a, /* type */
201 0, /* rightshift */
202 0, /* size */
203 4, /* bitsize */
204 FALSE, /* pc_relative */
205 0, /* bitpos */
206 complain_overflow_bitfield,/* complain_on_overflow */
207 bfd_elf_generic_reloc, /* special_function */
208 "R_CR16_REGREL4a", /* name */
209 FALSE, /* partial_inplace */
dc80fd5c 210 0x0, /* src_mask */
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211 0xf, /* dst_mask */
212 FALSE), /* pcrel_offset */
213
214 HOWTO (R_CR16_REGREL14, /* type */
215 0, /* rightshift */
216 1, /* size */
217 14, /* bitsize */
218 FALSE, /* pc_relative */
219 0, /* bitpos */
220 complain_overflow_bitfield,/* complain_on_overflow */
221 bfd_elf_generic_reloc, /* special_function */
222 "R_CR16_REGREL14", /* name */
223 FALSE, /* partial_inplace */
dc80fd5c 224 0x0, /* src_mask */
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225 0x3fff, /* dst_mask */
226 FALSE), /* pcrel_offset */
227
228 HOWTO (R_CR16_REGREL14a, /* type */
229 0, /* rightshift */
230 1, /* size */
231 14, /* bitsize */
232 FALSE, /* pc_relative */
233 0, /* bitpos */
234 complain_overflow_bitfield,/* complain_on_overflow */
235 bfd_elf_generic_reloc, /* special_function */
236 "R_CR16_REGREL14a", /* name */
237 FALSE, /* partial_inplace */
dc80fd5c 238 0x0, /* src_mask */
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239 0x3fff, /* dst_mask */
240 FALSE), /* pcrel_offset */
241
242 HOWTO (R_CR16_REGREL16, /* type */
243 0, /* rightshift */
244 1, /* size */
245 16, /* bitsize */
246 FALSE, /* pc_relative */
247 0, /* bitpos */
248 complain_overflow_bitfield,/* complain_on_overflow */
249 bfd_elf_generic_reloc, /* special_function */
250 "R_CR16_REGREL16", /* name */
251 FALSE, /* partial_inplace */
dc80fd5c 252 0x0, /* src_mask */
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253 0xffff, /* dst_mask */
254 FALSE), /* pcrel_offset */
255
256 HOWTO (R_CR16_REGREL20, /* type */
257 0, /* rightshift */
258 2, /* size */
259 20, /* bitsize */
260 FALSE, /* pc_relative */
261 0, /* bitpos */
262 complain_overflow_bitfield,/* complain_on_overflow */
263 bfd_elf_generic_reloc, /* special_function */
264 "R_CR16_REGREL20", /* name */
265 FALSE, /* partial_inplace */
dc80fd5c 266 0x0, /* src_mask */
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267 0xfffff, /* dst_mask */
268 FALSE), /* pcrel_offset */
269
270 HOWTO (R_CR16_REGREL20a, /* type */
271 0, /* rightshift */
272 2, /* size */
273 20, /* bitsize */
274 FALSE, /* pc_relative */
275 0, /* bitpos */
276 complain_overflow_bitfield,/* complain_on_overflow */
277 bfd_elf_generic_reloc, /* special_function */
278 "R_CR16_REGREL20a", /* name */
279 FALSE, /* partial_inplace */
dc80fd5c 280 0x0, /* src_mask */
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281 0xfffff, /* dst_mask */
282 FALSE), /* pcrel_offset */
283
284 HOWTO (R_CR16_ABS20, /* type */
285 0, /* rightshift */
286 2, /* size */
287 20, /* bitsize */
288 FALSE, /* pc_relative */
289 0, /* bitpos */
290 complain_overflow_bitfield,/* complain_on_overflow */
291 bfd_elf_generic_reloc, /* special_function */
292 "R_CR16_ABS20", /* name */
293 FALSE, /* partial_inplace */
dc80fd5c 294 0x0, /* src_mask */
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295 0xfffff, /* dst_mask */
296 FALSE), /* pcrel_offset */
297
298 HOWTO (R_CR16_ABS24, /* type */
299 0, /* rightshift */
300 2, /* size */
301 24, /* bitsize */
302 FALSE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_bitfield,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_CR16_ABS24", /* name */
307 FALSE, /* partial_inplace */
dc80fd5c 308 0x0, /* src_mask */
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309 0xffffff, /* dst_mask */
310 FALSE), /* pcrel_offset */
311
312 HOWTO (R_CR16_IMM4, /* type */
313 0, /* rightshift */
314 0, /* size */
315 4, /* bitsize */
316 FALSE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_bitfield,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_CR16_IMM4", /* name */
321 FALSE, /* partial_inplace */
dc80fd5c 322 0x0, /* src_mask */
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323 0xf, /* dst_mask */
324 FALSE), /* pcrel_offset */
325
326 HOWTO (R_CR16_IMM8, /* type */
327 0, /* rightshift */
328 0, /* size */
329 8, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_CR16_IMM8", /* name */
335 FALSE, /* partial_inplace */
dc80fd5c 336 0x0, /* src_mask */
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337 0xff, /* dst_mask */
338 FALSE), /* pcrel_offset */
339
340 HOWTO (R_CR16_IMM16, /* type */
341 0, /* rightshift */
342 1, /* size */
343 16, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_CR16_IMM16", /* name */
349 FALSE, /* partial_inplace */
dc80fd5c 350 0x0, /* src_mask */
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351 0xffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
353
354 HOWTO (R_CR16_IMM20, /* type */
355 0, /* rightshift */
356 2, /* size */
357 20, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_CR16_IMM20", /* name */
363 FALSE, /* partial_inplace */
dc80fd5c 364 0x0, /* src_mask */
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NC
365 0xfffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 HOWTO (R_CR16_IMM24, /* type */
369 0, /* rightshift */
370 2, /* size */
371 24, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_CR16_IMM24", /* name */
377 FALSE, /* partial_inplace */
dc80fd5c 378 0x0, /* src_mask */
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NC
379 0xffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_CR16_IMM32, /* type */
383 0, /* rightshift */
384 2, /* size */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_CR16_IMM32", /* name */
391 FALSE, /* partial_inplace */
dc80fd5c 392 0x0, /* src_mask */
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NC
393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_CR16_IMM32a, /* type */
397 1, /* rightshift */
398 2, /* size */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_CR16_IMM32a", /* name */
405 FALSE, /* partial_inplace */
dc80fd5c 406 0x0, /* src_mask */
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NC
407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_CR16_DISP4, /* type */
411 1, /* rightshift */
412 0, /* size (0 = byte, 1 = short, 2 = long) */
413 4, /* bitsize */
414 TRUE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_unsigned, /* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_CR16_DISP4", /* name */
419 FALSE, /* partial_inplace */
dc80fd5c 420 0x0, /* src_mask */
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NC
421 0xf, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_CR16_DISP8, /* type */
425 1, /* rightshift */
426 0, /* size (0 = byte, 1 = short, 2 = long) */
427 8, /* bitsize */
428 TRUE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_unsigned, /* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_CR16_DISP8", /* name */
433 FALSE, /* partial_inplace */
dc80fd5c 434 0x0, /* src_mask */
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NC
435 0x1ff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_CR16_DISP16, /* type */
439 0, /* rightshift REVIITS: To sync with WinIDEA*/
440 1, /* size (0 = byte, 1 = short, 2 = long) */
441 16, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_unsigned, /* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_CR16_DISP16", /* name */
447 FALSE, /* partial_inplace */
dc80fd5c 448 0x0, /* src_mask */
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NC
449 0x1ffff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451 /* REVISIT: DISP24 should be left-shift by 2 as per ISA doc
452 but its not done, to sync with WinIDEA and CR16 4.1 tools */
453 HOWTO (R_CR16_DISP24, /* type */
454 0, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 24, /* bitsize */
457 TRUE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_unsigned, /* complain_on_overflow */
460 bfd_elf_generic_reloc, /* special_function */
461 "R_CR16_DISP24", /* name */
462 FALSE, /* partial_inplace */
dc80fd5c 463 0x0, /* src_mask */
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NC
464 0x1ffffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 HOWTO (R_CR16_DISP24a, /* type */
468 0, /* rightshift */
469 2, /* size (0 = byte, 1 = short, 2 = long) */
470 24, /* bitsize */
471 TRUE, /* pc_relative */
472 0, /* bitpos */
473 complain_overflow_unsigned, /* complain_on_overflow */
474 bfd_elf_generic_reloc, /* special_function */
475 "R_CR16_DISP24a", /* name */
476 FALSE, /* partial_inplace */
dc80fd5c 477 0x0, /* src_mask */
3d3d428f 478 0xffffff, /* dst_mask */
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NC
479 FALSE), /* pcrel_offset */
480
481 /* An 8 bit switch table entry. This is generated for an expression
482 such as ``.byte L1 - L2''. The offset holds the difference
483 between the reloc address and L2. */
484 HOWTO (R_CR16_SWITCH8, /* type */
485 0, /* rightshift */
486 0, /* size (0 = byte, 1 = short, 2 = long) */
487 8, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_unsigned, /* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_CR16_SWITCH8", /* name */
493 FALSE, /* partial_inplace */
dc80fd5c 494 0x0, /* src_mask */
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NC
495 0xff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 /* A 16 bit switch table entry. This is generated for an expression
499 such as ``.word L1 - L2''. The offset holds the difference
500 between the reloc address and L2. */
501 HOWTO (R_CR16_SWITCH16, /* type */
502 0, /* rightshift */
503 1, /* size (0 = byte, 1 = short, 2 = long) */
504 16, /* bitsize */
505 FALSE, /* pc_relative */
506 0, /* bitpos */
507 complain_overflow_unsigned, /* complain_on_overflow */
508 bfd_elf_generic_reloc, /* special_function */
509 "R_CR16_SWITCH16", /* name */
510 FALSE, /* partial_inplace */
dc80fd5c 511 0x0, /* src_mask */
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NC
512 0xffff, /* dst_mask */
513 TRUE), /* pcrel_offset */
514
515 /* A 32 bit switch table entry. This is generated for an expression
516 such as ``.long L1 - L2''. The offset holds the difference
517 between the reloc address and L2. */
518 HOWTO (R_CR16_SWITCH32, /* type */
519 0, /* rightshift */
520 2, /* size (0 = byte, 1 = short, 2 = long) */
521 32, /* bitsize */
522 FALSE, /* pc_relative */
523 0, /* bitpos */
524 complain_overflow_unsigned, /* complain_on_overflow */
525 bfd_elf_generic_reloc, /* special_function */
526 "R_CR16_SWITCH32", /* name */
527 FALSE, /* partial_inplace */
dc80fd5c 528 0x0, /* src_mask */
7fac7ff4 529 0xffffffff, /* dst_mask */
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SR
530 TRUE), /* pcrel_offset */
531
532 HOWTO (R_CR16_GOT_REGREL20, /* type */
533 0, /* rightshift */
534 2, /* size */
535 20, /* bitsize */
536 FALSE, /* pc_relative */
537 0, /* bitpos */
538 complain_overflow_bitfield,/* complain_on_overflow */
539 bfd_elf_generic_reloc, /* special_function */
540 "R_CR16_GOT_REGREL20", /* name */
541 TRUE, /* partial_inplace */
542 0x0, /* src_mask */
543 0xfffff, /* dst_mask */
544 FALSE), /* pcrel_offset */
545
546 HOWTO (R_CR16_GOTC_REGREL20, /* type */
547 0, /* rightshift */
548 2, /* size */
549 20, /* bitsize */
550 FALSE, /* pc_relative */
551 0, /* bitpos */
552 complain_overflow_bitfield,/* complain_on_overflow */
553 bfd_elf_generic_reloc, /* special_function */
554 "R_CR16_GOTC_REGREL20", /* name */
555 TRUE, /* partial_inplace */
556 0x0, /* src_mask */
557 0xfffff, /* dst_mask */
558 FALSE), /* pcrel_offset */
559
560 HOWTO (R_CR16_GLOB_DAT, /* type */
561 0, /* rightshift */
562 2, /* size (0 = byte, 1 = short, 2 = long) */
563 32, /* bitsize */
564 FALSE, /* pc_relative */
565 0, /* bitpos */
566 complain_overflow_unsigned, /* complain_on_overflow */
567 bfd_elf_generic_reloc, /* special_function */
568 "R_CR16_GLOB_DAT", /* name */
569 FALSE, /* partial_inplace */
570 0x0, /* src_mask */
571 0xffffffff, /* dst_mask */
7fac7ff4 572 TRUE) /* pcrel_offset */
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NC
573};
574
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SR
575
576/* Create the GOT section. */
577
578static bfd_boolean
579_bfd_cr16_elf_create_got_section (bfd * abfd, struct bfd_link_info * info)
580{
581 flagword flags;
582 asection * s;
583 struct elf_link_hash_entry * h;
584 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
585 int ptralign;
586
587 /* This function may be called more than once. */
3d4d4302 588 if (bfd_get_linker_section (abfd, ".got") != NULL)
99706f30
SR
589 return TRUE;
590
591 switch (bed->s->arch_size)
592 {
593 case 16:
594 ptralign = 1;
595 break;
596
597 case 32:
598 ptralign = 2;
599 break;
600
601 default:
602 bfd_set_error (bfd_error_bad_value);
603 return FALSE;
604 }
605
606 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
607 | SEC_LINKER_CREATED);
608
3d4d4302 609 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
99706f30
SR
610 if (s == NULL
611 || ! bfd_set_section_alignment (abfd, s, ptralign))
612 return FALSE;
613
614 if (bed->want_got_plt)
615 {
3d4d4302 616 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
99706f30
SR
617 if (s == NULL
618 || ! bfd_set_section_alignment (abfd, s, ptralign))
619 return FALSE;
620 }
621
622 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
623 (or .got.plt) section. We don't do this in the linker script
624 because we don't want to define the symbol if we are not creating
625 a global offset table. */
626 h = _bfd_elf_define_linkage_sym (abfd, info, s, "_GLOBAL_OFFSET_TABLE_");
627 elf_hash_table (info)->hgot = h;
628 if (h == NULL)
629 return FALSE;
630
631 /* The first bit of the global offset table is the header. */
632 s->size += bed->got_header_size;
633
634 return TRUE;
635}
636
637
3d3d428f
NC
638/* Retrieve a howto ptr using a BFD reloc_code. */
639
640static reloc_howto_type *
641elf_cr16_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
642 bfd_reloc_code_real_type code)
643{
644 unsigned int i;
645
646 for (i = 0; i < R_CR16_MAX; i++)
647 if (code == cr16_reloc_map[i].bfd_reloc_enum)
648 return &cr16_elf_howto_table[cr16_reloc_map[i].cr16_reloc_type];
649
650 _bfd_error_handler ("Unsupported CR16 relocation type: 0x%x\n", code);
651 return NULL;
652}
653
654static reloc_howto_type *
655elf_cr16_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
656 const char *r_name)
657{
658 unsigned int i;
659
660 for (i = 0; ARRAY_SIZE (cr16_elf_howto_table); i++)
661 if (cr16_elf_howto_table[i].name != NULL
662 && strcasecmp (cr16_elf_howto_table[i].name, r_name) == 0)
663 return cr16_elf_howto_table + i;
664
665 return NULL;
666}
667
668/* Retrieve a howto ptr using an internal relocation entry. */
669
670static void
671elf_cr16_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
672 Elf_Internal_Rela *dst)
673{
674 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
675
cd21f5da
NC
676 if (r_type >= R_CR16_MAX)
677 {
4eca0228
AM
678 _bfd_error_handler (_("%B: unrecognised CR16 reloc number: %d"),
679 abfd, r_type);
cd21f5da
NC
680 bfd_set_error (bfd_error_bad_value);
681 r_type = R_CR16_NONE;
682 }
99706f30
SR
683 cache_ptr->howto = cr16_elf_howto_table + r_type;
684}
685
686/* Look through the relocs for a section during the first phase.
687 Since we don't do .gots or .plts, we just need to consider the
688 virtual table relocs for gc. */
689
690static bfd_boolean
691cr16_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *sec,
692 const Elf_Internal_Rela *relocs)
693{
694 Elf_Internal_Shdr *symtab_hdr;
695 Elf_Internal_Sym * isymbuf = NULL;
696 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
697 const Elf_Internal_Rela *rel;
698 const Elf_Internal_Rela *rel_end;
699 bfd * dynobj;
700 bfd_vma * local_got_offsets;
701 asection * sgot;
702 asection * srelgot;
703
704 sgot = NULL;
705 srelgot = NULL;
706 bfd_boolean result = FALSE;
707
0e1862bb 708 if (bfd_link_relocatable (info))
99706f30
SR
709 return TRUE;
710
711 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
712 sym_hashes = elf_sym_hashes (abfd);
713 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
714 if (!elf_bad_symtab (abfd))
715 sym_hashes_end -= symtab_hdr->sh_info;
716
717 dynobj = elf_hash_table (info)->dynobj;
718 local_got_offsets = elf_local_got_offsets (abfd);
719 rel_end = relocs + sec->reloc_count;
720 for (rel = relocs; rel < rel_end; rel++)
721 {
722 struct elf_link_hash_entry *h;
723 unsigned long r_symndx;
724
725 r_symndx = ELF32_R_SYM (rel->r_info);
726 if (r_symndx < symtab_hdr->sh_info)
727 h = NULL;
728 else
729 {
730 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
731 while (h->root.type == bfd_link_hash_indirect
732 || h->root.type == bfd_link_hash_warning)
733 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM
734
735 /* PR15323, ref flags aren't set for references in the same
736 object. */
737 h->root.non_ir_ref = 1;
99706f30
SR
738 }
739
740 /* Some relocs require a global offset table. */
741 if (dynobj == NULL)
742 {
743 switch (ELF32_R_TYPE (rel->r_info))
744 {
745 case R_CR16_GOT_REGREL20:
746 case R_CR16_GOTC_REGREL20:
747 elf_hash_table (info)->dynobj = dynobj = abfd;
748 if (! _bfd_cr16_elf_create_got_section (dynobj, info))
749 goto fail;
750 break;
751
752 default:
753 break;
754 }
755 }
756
757 switch (ELF32_R_TYPE (rel->r_info))
758 {
759 case R_CR16_GOT_REGREL20:
760 case R_CR16_GOTC_REGREL20:
761 /* This symbol requires a global offset table entry. */
762
763 if (sgot == NULL)
764 {
3d4d4302 765 sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
766 BFD_ASSERT (sgot != NULL);
767 }
768
769 if (srelgot == NULL
0e1862bb 770 && (h != NULL || bfd_link_executable (info)))
99706f30 771 {
3d4d4302 772 srelgot = bfd_get_linker_section (dynobj, ".rela.got");
99706f30 773 if (srelgot == NULL)
68ffbac6 774 {
3d4d4302
AM
775 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
776 | SEC_IN_MEMORY | SEC_LINKER_CREATED
777 | SEC_READONLY);
778 srelgot = bfd_make_section_anyway_with_flags (dynobj,
779 ".rela.got",
780 flags);
99706f30
SR
781 if (srelgot == NULL
782 || ! bfd_set_section_alignment (dynobj, srelgot, 2))
783 goto fail;
784 }
785 }
786
787 if (h != NULL)
788 {
789 if (h->got.offset != (bfd_vma) -1)
790 /* We have already allocated space in the .got. */
791 break;
792
793 h->got.offset = sgot->size;
794
795 /* Make sure this symbol is output as a dynamic symbol. */
796 if (h->dynindx == -1)
797 {
798 if (! bfd_elf_link_record_dynamic_symbol (info, h))
799 goto fail;
800 }
801
802 srelgot->size += sizeof (Elf32_External_Rela);
803 }
804 else
805 {
806 /* This is a global offset table entry for a local
807 symbol. */
808 if (local_got_offsets == NULL)
809 {
810 size_t size;
811 unsigned int i;
812
813 size = symtab_hdr->sh_info * sizeof (bfd_vma);
814 local_got_offsets = (bfd_vma *) bfd_alloc (abfd, size);
815
816 if (local_got_offsets == NULL)
817 goto fail;
818
819 elf_local_got_offsets (abfd) = local_got_offsets;
820
821 for (i = 0; i < symtab_hdr->sh_info; i++)
822 local_got_offsets[i] = (bfd_vma) -1;
823 }
824
825 if (local_got_offsets[r_symndx] != (bfd_vma) -1)
826 /* We have already allocated space in the .got. */
827 break;
828
829 local_got_offsets[r_symndx] = sgot->size;
830
0e1862bb 831 if (bfd_link_executable (info))
99706f30
SR
832 /* If we are generating a shared object, we need to
833 output a R_CR16_RELATIVE reloc so that the dynamic
834 linker can adjust this GOT entry. */
835 srelgot->size += sizeof (Elf32_External_Rela);
836 }
837
838 sgot->size += 4;
839 break;
840
841 }
842 }
843
844 result = TRUE;
845 fail:
846 if (isymbuf != NULL)
847 free (isymbuf);
848
849 return result;
3d3d428f
NC
850}
851
852/* Perform a relocation as part of a final link. */
853
854static bfd_reloc_status_type
855cr16_elf_final_link_relocate (reloc_howto_type *howto,
7fac7ff4 856 bfd *input_bfd,
3d3d428f
NC
857 bfd *output_bfd ATTRIBUTE_UNUSED,
858 asection *input_section,
7fac7ff4 859 bfd_byte *contents,
3d3d428f 860 bfd_vma offset,
7fac7ff4
NC
861 bfd_vma Rvalue,
862 bfd_vma addend,
99706f30
SR
863 struct elf_link_hash_entry * h,
864 unsigned long symndx ATTRIBUTE_UNUSED,
3d3d428f
NC
865 struct bfd_link_info *info ATTRIBUTE_UNUSED,
866 asection *sec ATTRIBUTE_UNUSED,
867 int is_local ATTRIBUTE_UNUSED)
868{
869 unsigned short r_type = howto->type;
870 bfd_byte *hit_data = contents + offset;
871 bfd_vma reloc_bits, check, Rvalue1;
99706f30 872 bfd * dynobj;
99706f30
SR
873
874 dynobj = elf_hash_table (info)->dynobj;
99706f30 875
3d3d428f
NC
876 switch (r_type)
877 {
878 case R_CR16_IMM4:
7fac7ff4
NC
879 case R_CR16_IMM20:
880 case R_CR16_ABS20:
881 break;
882
3d3d428f
NC
883 case R_CR16_IMM8:
884 case R_CR16_IMM16:
3d3d428f
NC
885 case R_CR16_IMM32:
886 case R_CR16_IMM32a:
887 case R_CR16_REGREL4:
888 case R_CR16_REGREL4a:
889 case R_CR16_REGREL14:
890 case R_CR16_REGREL14a:
891 case R_CR16_REGREL16:
892 case R_CR16_REGREL20:
99706f30
SR
893 case R_CR16_REGREL20a:
894 case R_CR16_GOT_REGREL20:
895 case R_CR16_GOTC_REGREL20:
3d3d428f
NC
896 case R_CR16_ABS24:
897 case R_CR16_DISP16:
898 case R_CR16_DISP24:
899 /* 'hit_data' is relative to the start of the instruction, not the
900 relocation offset. Advance it to account for the exact offset. */
901 hit_data += 2;
902 break;
903
904 case R_CR16_NONE:
905 return bfd_reloc_ok;
906 break;
907
908 case R_CR16_DISP4:
7fac7ff4 909 if (is_local)
99706f30 910 Rvalue += -1;
7fac7ff4
NC
911 break;
912
3d3d428f
NC
913 case R_CR16_DISP8:
914 case R_CR16_DISP24a:
7fac7ff4 915 if (is_local)
99706f30 916 Rvalue -= -1;
7fac7ff4
NC
917 break;
918
919 case R_CR16_SWITCH8:
920 case R_CR16_SWITCH16:
921 case R_CR16_SWITCH32:
3d3d428f
NC
922 /* We only care about the addend, where the difference between
923 expressions is kept. */
7fac7ff4 924 Rvalue = 0;
68ffbac6 925
3d3d428f
NC
926 default:
927 break;
928 }
929
930 if (howto->pc_relative)
931 {
932 /* Subtract the address of the section containing the location. */
933 Rvalue -= (input_section->output_section->vma
934 + input_section->output_offset);
935 /* Subtract the position of the location within the section. */
936 Rvalue -= offset;
937 }
938
939 /* Add in supplied addend. */
940 Rvalue += addend;
941
942 /* Complain if the bitfield overflows, whether it is considered
943 as signed or unsigned. */
944 check = Rvalue >> howto->rightshift;
945
946 /* Assumes two's complement. This expression avoids
947 overflow if howto->bitsize is the number of bits in
948 bfd_vma. */
949 reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
950
99706f30
SR
951 /* For GOT and GOTC relocs no boundary checks applied. */
952 if (!((r_type == R_CR16_GOT_REGREL20)
953 || (r_type == R_CR16_GOTC_REGREL20)))
3d3d428f 954 {
99706f30
SR
955 if (((bfd_vma) check & ~reloc_bits) != 0
956 && (((bfd_vma) check & ~reloc_bits)
957 != (-(bfd_vma) 1 & ~reloc_bits)))
3d3d428f 958 {
99706f30
SR
959 /* The above right shift is incorrect for a signed
960 value. See if turning on the upper bits fixes the
961 overflow. */
962 if (howto->rightshift && (bfd_signed_vma) Rvalue < 0)
963 {
964 check |= ((bfd_vma) - 1
965 & ~((bfd_vma) - 1
966 >> howto->rightshift));
3d3d428f 967
99706f30
SR
968 if (((bfd_vma) check & ~reloc_bits)
969 != (-(bfd_vma) 1 & ~reloc_bits))
970 return bfd_reloc_overflow;
971 }
972 else
973 return bfd_reloc_overflow;
3d3d428f 974 }
3d3d428f 975
99706f30
SR
976 /* Drop unwanted bits from the value we are relocating to. */
977 Rvalue >>= (bfd_vma) howto->rightshift;
3d3d428f 978
99706f30
SR
979 /* Apply dst_mask to select only relocatable part of the insn. */
980 Rvalue &= howto->dst_mask;
981 }
3d3d428f
NC
982
983 switch (howto->size)
984 {
985 case 0:
7fac7ff4 986 if (r_type == R_CR16_DISP8)
3d3d428f
NC
987 {
988 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
989 Rvalue = ((Rvalue1 & 0xf000) | ((Rvalue << 4) & 0xf00)
7fac7ff4
NC
990 | (Rvalue1 & 0x00f0) | (Rvalue & 0xf));
991 bfd_put_16 (input_bfd, Rvalue, hit_data);
992 }
993 else if (r_type == R_CR16_IMM4)
994 {
995 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
996 Rvalue = (((Rvalue1 & 0xff) << 8) | ((Rvalue << 4) & 0xf0)
997 | ((Rvalue1 & 0x0f00) >> 8));
998 bfd_put_16 (input_bfd, Rvalue, hit_data);
999 }
1000 else if (r_type == R_CR16_DISP4)
1001 {
1002 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
1003 Rvalue = (Rvalue1 | ((Rvalue & 0xf) << 4));
1004 bfd_put_16 (input_bfd, Rvalue, hit_data);
1005 }
99706f30 1006 else
7fac7ff4
NC
1007 {
1008 bfd_put_8 (input_bfd, (unsigned char) Rvalue, hit_data);
3d3d428f
NC
1009 }
1010 break;
1011
1012 case 1:
1013 if (r_type == R_CR16_DISP16)
1014 {
1015 Rvalue |= (bfd_get_16 (input_bfd, hit_data));
1016 Rvalue = ((Rvalue & 0xfffe) | ((Rvalue >> 16) & 0x1));
3d3d428f 1017 }
99706f30
SR
1018 if (r_type == R_CR16_IMM16)
1019 {
1020 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
1021
1022 /* Add or subtract the offset value. */
1023 if (Rvalue1 & 0x8000)
1024 Rvalue -= (~Rvalue1 + 1) & 0xffff;
1025 else
1026 Rvalue += Rvalue1;
1027
1028 /* Check for range. */
1029 if ((long) Rvalue > 0xffff || (long) Rvalue < 0x0)
1030 return bfd_reloc_overflow;
1031 }
7fac7ff4 1032
99706f30 1033 bfd_put_16 (input_bfd, Rvalue, hit_data);
3d3d428f
NC
1034 break;
1035
1036 case 2:
7fac7ff4 1037 if ((r_type == R_CR16_ABS20) || (r_type == R_CR16_IMM20))
3d3d428f 1038 {
99706f30
SR
1039 Rvalue1 = (bfd_get_16 (input_bfd, hit_data + 2)
1040 | (((bfd_get_16 (input_bfd, hit_data) & 0xf) <<16)));
1041
1042 /* Add or subtract the offset value. */
1043 if (Rvalue1 & 0x80000)
1044 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1045 else
1046 Rvalue += Rvalue1;
1047
1048 /* Check for range. */
1049 if ((long) Rvalue > 0xfffff || (long) Rvalue < 0x0)
1050 return bfd_reloc_overflow;
1051
1052 bfd_put_16 (input_bfd, ((bfd_get_16 (input_bfd, hit_data) & 0xfff0)
1053 | ((Rvalue >> 16) & 0xf)), hit_data);
1054 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1055 }
68ffbac6 1056 else if (r_type == R_CR16_GOT_REGREL20)
99706f30 1057 {
3d4d4302 1058 asection * sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
1059
1060 if (h != NULL)
1061 {
1062 bfd_vma off;
1063
1064 off = h->got.offset;
1065 BFD_ASSERT (off != (bfd_vma) -1);
1066
1067 if (! elf_hash_table (info)->dynamic_sections_created
1068 || SYMBOL_REFERENCES_LOCAL (info, h))
1069 /* This is actually a static link, or it is a
1070 -Bsymbolic link and the symbol is defined
1071 locally, or the symbol was forced to be local
1072 because of a version file. We must initialize
68ffbac6 1073 this entry in the global offset table.
99706f30
SR
1074 When doing a dynamic link, we create a .rela.got
1075 relocation entry to initialize the value. This
1076 is done in the finish_dynamic_symbol routine. */
1077 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1078
1079 Rvalue = sgot->output_offset + off;
1080 }
1081 else
1082 {
1083 bfd_vma off;
1084
1085 off = elf_local_got_offsets (input_bfd)[symndx];
1086 bfd_put_32 (output_bfd,Rvalue, sgot->contents + off);
1087
1088 Rvalue = sgot->output_offset + off;
1089 }
1090
1091 Rvalue += addend;
1092
68ffbac6 1093 /* REVISIT: if ((long) Rvalue > 0xffffff ||
99706f30
SR
1094 (long) Rvalue < -0x800000). */
1095 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
1096 return bfd_reloc_overflow;
1097
1098
1099 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
1100 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
1101 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1102
1103 }
1104 else if (r_type == R_CR16_GOTC_REGREL20)
1105 {
1106 asection * sgot;
3d4d4302 1107 sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
1108
1109 if (h != NULL)
1110 {
1111 bfd_vma off;
1112
1113 off = h->got.offset;
1114 BFD_ASSERT (off != (bfd_vma) -1);
1115
1116 Rvalue >>=1; /* For code symbols. */
1117
1118 if (! elf_hash_table (info)->dynamic_sections_created
1119 || SYMBOL_REFERENCES_LOCAL (info, h))
1120 /* This is actually a static link, or it is a
1121 -Bsymbolic link and the symbol is defined
1122 locally, or the symbol was forced to be local
1123 because of a version file. We must initialize
68ffbac6 1124 this entry in the global offset table.
99706f30
SR
1125 When doing a dynamic link, we create a .rela.got
1126 relocation entry to initialize the value. This
1127 is done in the finish_dynamic_symbol routine. */
1128 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1129
1130 Rvalue = sgot->output_offset + off;
1131 }
1132 else
1133 {
1134 bfd_vma off;
1135
1136 off = elf_local_got_offsets (input_bfd)[symndx];
1137 Rvalue >>= 1;
1138 bfd_put_32 (output_bfd,Rvalue, sgot->contents + off);
1139 Rvalue = sgot->output_offset + off;
1140 }
1141
1142 Rvalue += addend;
1143
1144 /* Check if any value in DISP. */
1145 Rvalue1 =((bfd_get_32 (input_bfd, hit_data) >>16)
1146 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16));
1147
1148 /* Add or subtract the offset value. */
1149 if (Rvalue1 & 0x80000)
1150 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1151 else
1152 Rvalue += Rvalue1;
1153
1154 /* Check for range. */
68ffbac6 1155 /* REVISIT: if ((long) Rvalue > 0xffffff
99706f30
SR
1156 || (long) Rvalue < -0x800000). */
1157 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
1158 return bfd_reloc_overflow;
1159
7fac7ff4 1160 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
99706f30 1161 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
7fac7ff4 1162 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
3d3d428f 1163 }
99706f30 1164 else
3d3d428f 1165 {
99706f30
SR
1166 if (r_type == R_CR16_ABS24)
1167 {
1168 Rvalue1 = ((bfd_get_32 (input_bfd, hit_data) >> 16)
1169 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16)
1170 | (((bfd_get_32 (input_bfd, hit_data) & 0xf) <<20)));
1171
1172 /* Add or subtract the offset value. */
1173 if (Rvalue1 & 0x800000)
1174 Rvalue -= (~Rvalue1 + 1) & 0xffffff;
1175 else
1176 Rvalue += Rvalue1;
1177
1178 /* Check for Range. */
1179 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0x0)
1180 return bfd_reloc_overflow;
1181
1182 Rvalue = ((((Rvalue >> 20) & 0xf) | (((Rvalue >> 16) & 0xf)<<8)
1183 | (bfd_get_32 (input_bfd, hit_data) & 0xf0f0))
1184 | ((Rvalue & 0xffff) << 16));
1185 }
1186 else if (r_type == R_CR16_DISP24)
1187 {
1188 Rvalue = ((((Rvalue >> 20)& 0xf) | (((Rvalue >>16) & 0xf)<<8)
1189 | (bfd_get_16 (input_bfd, hit_data)))
1190 | (((Rvalue & 0xfffe) | ((Rvalue >> 24) & 0x1)) << 16));
1191 }
1192 else if ((r_type == R_CR16_IMM32) || (r_type == R_CR16_IMM32a))
1193 {
1194 Rvalue1 =((((bfd_get_32 (input_bfd, hit_data)) >> 16) &0xffff)
1195 | (((bfd_get_32 (input_bfd, hit_data)) &0xffff)) << 16);
1196
1197 /* Add or subtract the offset value. */
1198 if (Rvalue1 & 0x80000000)
1199 Rvalue -= (~Rvalue1 + 1) & 0xffffffff;
1200 else
1201 Rvalue += Rvalue1;
1202
1203 /* Check for range. */
1204 if (Rvalue > 0xffffffff || (long) Rvalue < 0x0)
1205 return bfd_reloc_overflow;
1206
1207 Rvalue = (((Rvalue >> 16)& 0xffff) | (Rvalue & 0xffff) << 16);
1208 }
1209 else if (r_type == R_CR16_DISP24a)
1210 {
1211 Rvalue = (((Rvalue & 0xfffffe) | (Rvalue >> 23)));
1212 Rvalue = ((Rvalue >> 16) & 0xff) | ((Rvalue & 0xffff) << 16)
1213 | (bfd_get_32 (input_bfd, hit_data));
1214 }
1215 else if ((r_type == R_CR16_REGREL20)
1216 || (r_type == R_CR16_REGREL20a))
1217 {
1218 Rvalue1 = ((bfd_get_32 (input_bfd, hit_data) >> 16)
1219 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16));
1220 /* Add or subtract the offset value. */
1221 if (Rvalue1 & 0x80000)
1222 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1223 else
1224 Rvalue += Rvalue1;
1225
1226 /* Check for range. */
1227 if ((long) Rvalue > 0xfffff || (long) Rvalue < 0x0)
1228 return bfd_reloc_overflow;
3d3d428f 1229
99706f30
SR
1230 Rvalue = (((((Rvalue >> 20)& 0xf) | (((Rvalue >>16) & 0xf)<<8)
1231 | ((Rvalue & 0xffff) << 16)))
1232 | (bfd_get_32 (input_bfd, hit_data) & 0xf0ff));
1233
1234 }
86514226
SR
1235 else if (r_type == R_CR16_NUM32)
1236 {
68ffbac6 1237 Rvalue1 = (bfd_get_32 (input_bfd, hit_data));
86514226
SR
1238
1239 /* Add or subtract the offset value */
1240 if (Rvalue1 & 0x80000000)
1241 Rvalue -= (~Rvalue1 + 1) & 0xffffffff;
1242 else
1243 Rvalue += Rvalue1;
1244
1245 /* Check for Ranga */
1246 if (Rvalue > 0xffffffff)
1247 return bfd_reloc_overflow;
1248 }
1249
3d3d428f
NC
1250 bfd_put_32 (input_bfd, Rvalue, hit_data);
1251 }
7fac7ff4 1252 break;
3d3d428f
NC
1253
1254 default:
1255 return bfd_reloc_notsupported;
1256 }
1257
1258 return bfd_reloc_ok;
1259}
1260
1261/* Delete some bytes from a section while relaxing. */
1262
1263static bfd_boolean
1264elf32_cr16_relax_delete_bytes (struct bfd_link_info *link_info, bfd *abfd,
1265 asection *sec, bfd_vma addr, int count)
1266{
1267 Elf_Internal_Shdr *symtab_hdr;
1268 unsigned int sec_shndx;
1269 bfd_byte *contents;
1270 Elf_Internal_Rela *irel, *irelend;
3d3d428f
NC
1271 bfd_vma toaddr;
1272 Elf_Internal_Sym *isym;
1273 Elf_Internal_Sym *isymend;
1274 struct elf_link_hash_entry **sym_hashes;
1275 struct elf_link_hash_entry **end_hashes;
1276 struct elf_link_hash_entry **start_hashes;
1277 unsigned int symcount;
1278
1279 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1280
1281 contents = elf_section_data (sec)->this_hdr.contents;
1282
3d3d428f
NC
1283 toaddr = sec->size;
1284
1285 irel = elf_section_data (sec)->relocs;
1286 irelend = irel + sec->reloc_count;
1287
1288 /* Actually delete the bytes. */
1289 memmove (contents + addr, contents + addr + count,
1290 (size_t) (toaddr - addr - count));
1291 sec->size -= count;
1292
1293 /* Adjust all the relocs. */
1294 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1295 /* Get the new reloc address. */
1296 if ((irel->r_offset > addr && irel->r_offset < toaddr))
7fac7ff4 1297 irel->r_offset -= count;
3d3d428f
NC
1298
1299 /* Adjust the local symbols defined in this section. */
1300 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1301 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1302 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1303 {
1304 if (isym->st_shndx == sec_shndx
1305 && isym->st_value > addr
1306 && isym->st_value < toaddr)
1307 {
1308 /* Adjust the addend of SWITCH relocations in this section,
1309 which reference this local symbol. */
99706f30 1310#if 0
3d3d428f
NC
1311 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1312 {
1313 unsigned long r_symndx;
1314 Elf_Internal_Sym *rsym;
1315 bfd_vma addsym, subsym;
1316
7fac7ff4
NC
1317 /* Skip if not a SWITCH relocation. */
1318 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH8
99706f30
SR
1319 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH16
1320 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH32)
1321 continue;
68ffbac6 1322
3d3d428f
NC
1323 r_symndx = ELF32_R_SYM (irel->r_info);
1324 rsym = (Elf_Internal_Sym *) symtab_hdr->contents + r_symndx;
1325
1326 /* Skip if not the local adjusted symbol. */
1327 if (rsym != isym)
1328 continue;
1329
1330 addsym = isym->st_value;
1331 subsym = addsym - irel->r_addend;
1332
1333 /* Fix the addend only when -->> (addsym > addr >= subsym). */
1334 if (subsym <= addr)
1335 irel->r_addend -= count;
1336 else
1337 continue;
1338 }
99706f30 1339#endif
3d3d428f
NC
1340
1341 isym->st_value -= count;
1342 }
1343 }
1344
1345 /* Now adjust the global symbols defined in this section. */
1346 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1347 - symtab_hdr->sh_info);
1348 sym_hashes = start_hashes = elf_sym_hashes (abfd);
1349 end_hashes = sym_hashes + symcount;
1350
1351 for (; sym_hashes < end_hashes; sym_hashes++)
1352 {
1353 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1354
1355 /* The '--wrap SYMBOL' option is causing a pain when the object file,
1356 containing the definition of __wrap_SYMBOL, includes a direct
1357 call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference
1358 the same symbol (which is __wrap_SYMBOL), but still exist as two
1359 different symbols in 'sym_hashes', we don't want to adjust
1360 the global symbol __wrap_SYMBOL twice.
1361 This check is only relevant when symbols are being wrapped. */
1362 if (link_info->wrap_hash != NULL)
1363 {
1364 struct elf_link_hash_entry **cur_sym_hashes;
1365
1366 /* Loop only over the symbols whom been already checked. */
1367 for (cur_sym_hashes = start_hashes; cur_sym_hashes < sym_hashes;
1368 cur_sym_hashes++)
7fac7ff4
NC
1369 /* If the current symbol is identical to 'sym_hash', that means
1370 the symbol was already adjusted (or at least checked). */
1371 if (*cur_sym_hashes == sym_hash)
1372 break;
3d3d428f
NC
1373
1374 /* Don't adjust the symbol again. */
1375 if (cur_sym_hashes < sym_hashes)
1376 continue;
1377 }
1378
1379 if ((sym_hash->root.type == bfd_link_hash_defined
1380 || sym_hash->root.type == bfd_link_hash_defweak)
1381 && sym_hash->root.u.def.section == sec
1382 && sym_hash->root.u.def.value > addr
1383 && sym_hash->root.u.def.value < toaddr)
1384 sym_hash->root.u.def.value -= count;
1385 }
1386
1387 return TRUE;
1388}
1389
1390/* Relocate a CR16 ELF section. */
1391
1392static bfd_boolean
1393elf32_cr16_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
99706f30
SR
1394 bfd *input_bfd, asection *input_section,
1395 bfd_byte *contents, Elf_Internal_Rela *relocs,
1396 Elf_Internal_Sym *local_syms,
1397 asection **local_sections)
3d3d428f
NC
1398{
1399 Elf_Internal_Shdr *symtab_hdr;
1400 struct elf_link_hash_entry **sym_hashes;
1401 Elf_Internal_Rela *rel, *relend;
1402
3d3d428f
NC
1403 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1404 sym_hashes = elf_sym_hashes (input_bfd);
1405
1406 rel = relocs;
1407 relend = relocs + input_section->reloc_count;
1408 for (; rel < relend; rel++)
1409 {
1410 int r_type;
1411 reloc_howto_type *howto;
1412 unsigned long r_symndx;
1413 Elf_Internal_Sym *sym;
1414 asection *sec;
1415 struct elf_link_hash_entry *h;
1416 bfd_vma relocation;
1417 bfd_reloc_status_type r;
1418
1419 r_symndx = ELF32_R_SYM (rel->r_info);
1420 r_type = ELF32_R_TYPE (rel->r_info);
1421 howto = cr16_elf_howto_table + (r_type);
1422
1423 h = NULL;
1424 sym = NULL;
1425 sec = NULL;
1426 if (r_symndx < symtab_hdr->sh_info)
1427 {
1428 sym = local_syms + r_symndx;
1429 sec = local_sections[r_symndx];
1430 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1431 }
1432 else
1433 {
62d887d4 1434 bfd_boolean unresolved_reloc, warned, ignored;
3d3d428f
NC
1435
1436 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
1437 r_symndx, symtab_hdr, sym_hashes,
1438 h, sec, relocation,
62d887d4 1439 unresolved_reloc, warned, ignored);
3d3d428f
NC
1440 }
1441
dbaa2011 1442 if (sec != NULL && discarded_section (sec))
e4067dbb 1443 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 1444 rel, 1, relend, howto, 0, contents);
1004c3e1 1445
0e1862bb 1446 if (bfd_link_relocatable (info))
1004c3e1
SR
1447 continue;
1448
3d3d428f
NC
1449 r = cr16_elf_final_link_relocate (howto, input_bfd, output_bfd,
1450 input_section,
1451 contents, rel->r_offset,
1452 relocation, rel->r_addend,
99706f30
SR
1453 (struct elf_link_hash_entry *) h,
1454 r_symndx,
3d3d428f
NC
1455 info, sec, h == NULL);
1456
1457 if (r != bfd_reloc_ok)
1458 {
1459 const char *name;
1460 const char *msg = NULL;
1461
1462 if (h != NULL)
1463 name = h->root.root.string;
1464 else
1465 {
1466 name = (bfd_elf_string_from_elf_section
1467 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1468 if (name == NULL || *name == '\0')
1469 name = bfd_section_name (input_bfd, sec);
1470 }
1471
1472 switch (r)
1473 {
1474 case bfd_reloc_overflow:
1a72702b
AM
1475 (*info->callbacks->reloc_overflow)
1476 (info, (h ? &h->root : NULL), name, howto->name,
1477 (bfd_vma) 0, input_bfd, input_section, rel->r_offset);
3d3d428f
NC
1478 break;
1479
1480 case bfd_reloc_undefined:
1a72702b
AM
1481 (*info->callbacks->undefined_symbol)
1482 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
3d3d428f
NC
1483 break;
1484
1485 case bfd_reloc_outofrange:
1486 msg = _("internal error: out of range error");
1487 goto common_error;
1488
1489 case bfd_reloc_notsupported:
1490 msg = _("internal error: unsupported relocation error");
1491 goto common_error;
1492
1493 case bfd_reloc_dangerous:
1494 msg = _("internal error: dangerous error");
1495 goto common_error;
1496
1497 default:
1498 msg = _("internal error: unknown error");
1499 /* Fall through. */
1500
1501 common_error:
1a72702b
AM
1502 (*info->callbacks->warning) (info, msg, name, input_bfd,
1503 input_section, rel->r_offset);
3d3d428f
NC
1504 break;
1505 }
1506 }
1507 }
1508
1509 return TRUE;
1510}
1511
1512/* This is a version of bfd_generic_get_relocated_section_contents
1513 which uses elf32_cr16_relocate_section. */
1514
1515static bfd_byte *
1516elf32_cr16_get_relocated_section_contents (bfd *output_bfd,
1517 struct bfd_link_info *link_info,
1518 struct bfd_link_order *link_order,
1519 bfd_byte *data,
1520 bfd_boolean relocatable,
1521 asymbol **symbols)
1522{
1523 Elf_Internal_Shdr *symtab_hdr;
1524 asection *input_section = link_order->u.indirect.section;
1525 bfd *input_bfd = input_section->owner;
1526 asection **sections = NULL;
1527 Elf_Internal_Rela *internal_relocs = NULL;
1528 Elf_Internal_Sym *isymbuf = NULL;
1529
1530 /* We only need to handle the case of relaxing, or of having a
1531 particular set of section contents, specially. */
1532 if (relocatable
1533 || elf_section_data (input_section)->this_hdr.contents == NULL)
1534 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1535 link_order, data,
1536 relocatable,
1537 symbols);
1538
1539 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1540
1541 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1542 (size_t) input_section->size);
1543
1544 if ((input_section->flags & SEC_RELOC) != 0
1545 && input_section->reloc_count > 0)
1546 {
1547 Elf_Internal_Sym *isym;
1548 Elf_Internal_Sym *isymend;
1549 asection **secpp;
1550 bfd_size_type amt;
1551
1552 internal_relocs = _bfd_elf_link_read_relocs (input_bfd, input_section,
7fac7ff4 1553 NULL, NULL, FALSE);
3d3d428f
NC
1554 if (internal_relocs == NULL)
1555 goto error_return;
1556
1557 if (symtab_hdr->sh_info != 0)
1558 {
1559 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1560 if (isymbuf == NULL)
1561 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1562 symtab_hdr->sh_info, 0,
1563 NULL, NULL, NULL);
1564 if (isymbuf == NULL)
1565 goto error_return;
1566 }
1567
1568 amt = symtab_hdr->sh_info;
1569 amt *= sizeof (asection *);
1570 sections = bfd_malloc (amt);
1571 if (sections == NULL && amt != 0)
1572 goto error_return;
1573
1574 isymend = isymbuf + symtab_hdr->sh_info;
1575 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
1576 {
1577 asection *isec;
1578
1579 if (isym->st_shndx == SHN_UNDEF)
1580 isec = bfd_und_section_ptr;
1581 else if (isym->st_shndx == SHN_ABS)
1582 isec = bfd_abs_section_ptr;
1583 else if (isym->st_shndx == SHN_COMMON)
1584 isec = bfd_com_section_ptr;
1585 else
1586 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
1587
1588 *secpp = isec;
1589 }
1590
1591 if (! elf32_cr16_relocate_section (output_bfd, link_info, input_bfd,
1592 input_section, data, internal_relocs,
1593 isymbuf, sections))
1594 goto error_return;
1595
1596 if (sections != NULL)
1597 free (sections);
1598 if (isymbuf != NULL
1599 && symtab_hdr->contents != (unsigned char *) isymbuf)
1600 free (isymbuf);
1601 if (elf_section_data (input_section)->relocs != internal_relocs)
1602 free (internal_relocs);
1603 }
1604
1605 return data;
1606
1607 error_return:
1608 if (sections != NULL)
1609 free (sections);
1610 if (isymbuf != NULL
1611 && symtab_hdr->contents != (unsigned char *) isymbuf)
1612 free (isymbuf);
1613 if (internal_relocs != NULL
1614 && elf_section_data (input_section)->relocs != internal_relocs)
1615 free (internal_relocs);
1616 return NULL;
1617}
1618
99706f30
SR
1619/* Assorted hash table functions. */
1620
1621/* Initialize an entry in the link hash table. */
1622
1623/* Create an entry in an CR16 ELF linker hash table. */
1624
1625static struct bfd_hash_entry *
1626elf32_cr16_link_hash_newfunc (struct bfd_hash_entry *entry,
1627 struct bfd_hash_table *table,
1628 const char *string)
1629{
1630 struct elf32_cr16_link_hash_entry *ret =
1631 (struct elf32_cr16_link_hash_entry *) entry;
1632
1633 /* Allocate the structure if it has not already been allocated by a
1634 subclass. */
1635 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1636 ret = ((struct elf32_cr16_link_hash_entry *)
1637 bfd_hash_allocate (table,
1638 sizeof (struct elf32_cr16_link_hash_entry)));
1639 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1640 return (struct bfd_hash_entry *) ret;
1641
1642 /* Call the allocation method of the superclass. */
1643 ret = ((struct elf32_cr16_link_hash_entry *)
1644 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
1645 table, string));
1646 if (ret != (struct elf32_cr16_link_hash_entry *) NULL)
1647 {
1648 ret->direct_calls = 0;
1649 ret->stack_size = 0;
1650 ret->movm_args = 0;
1651 ret->movm_stack_size = 0;
1652 ret->flags = 0;
1653 ret->value = 0;
1654 }
1655
1656 return (struct bfd_hash_entry *) ret;
1657}
1658
1659/* Create an cr16 ELF linker hash table. */
1660
1661static struct bfd_link_hash_table *
1662elf32_cr16_link_hash_table_create (bfd *abfd)
1663{
4dfe6ac6
NC
1664 struct elf_link_hash_table *ret;
1665 bfd_size_type amt = sizeof (struct elf_link_hash_table);
99706f30 1666
7bf52ea2 1667 ret = (struct elf_link_hash_table *) bfd_zmalloc (amt);
4dfe6ac6 1668 if (ret == (struct elf_link_hash_table *) NULL)
99706f30
SR
1669 return NULL;
1670
4dfe6ac6 1671 if (!_bfd_elf_link_hash_table_init (ret, abfd,
99706f30 1672 elf32_cr16_link_hash_newfunc,
4dfe6ac6
NC
1673 sizeof (struct elf32_cr16_link_hash_entry),
1674 GENERIC_ELF_DATA))
99706f30
SR
1675 {
1676 free (ret);
1677 return NULL;
1678 }
1679
4dfe6ac6 1680 return &ret->root;
99706f30
SR
1681}
1682
99706f30
SR
1683static unsigned long
1684elf_cr16_mach (flagword flags)
1685{
1686 switch (flags)
1687 {
1688 case EM_CR16:
1689 default:
1690 return bfd_mach_cr16;
1691 }
1692}
1693
1694/* The final processing done just before writing out a CR16 ELF object
1695 file. This gets the CR16 architecture right based on the machine
1696 number. */
1697
1698static void
1699_bfd_cr16_elf_final_write_processing (bfd *abfd,
1700 bfd_boolean linker ATTRIBUTE_UNUSED)
1701{
1702 unsigned long val;
1703 switch (bfd_get_mach (abfd))
1704 {
1705 default:
1706 case bfd_mach_cr16:
1707 val = EM_CR16;
1708 break;
1709 }
1710
1711
1712 elf_elfheader (abfd)->e_flags |= val;
1713}
1714
1715
1716static bfd_boolean
1717_bfd_cr16_elf_object_p (bfd *abfd)
1718{
1719 bfd_default_set_arch_mach (abfd, bfd_arch_cr16,
1720 elf_cr16_mach (elf_elfheader (abfd)->e_flags));
1721 return TRUE;
1722}
1723
1724/* Merge backend specific data from an object file to the output
1725 object file when linking. */
1726
1727static bfd_boolean
50e03d47 1728_bfd_cr16_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
99706f30 1729{
50e03d47
AM
1730 bfd *obfd = info->output_bfd;
1731
99706f30
SR
1732 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1733 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1734 return TRUE;
1735
1736 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1737 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
1738 {
1739 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
1740 bfd_get_mach (ibfd)))
1741 return FALSE;
1742 }
1743
1744 return TRUE;
1745}
1746
1747
3d3d428f
NC
1748/* This function handles relaxing for the CR16.
1749
1750 There's quite a few relaxing opportunites available on the CR16:
1751
99706f30
SR
1752 * bcond:24 -> bcond:16 1 byte
1753 * bcond:16 -> bcond:8 1 byte
1754 * arithmetic imm32 -> arithmetic imm20 12 bits
1755 * arithmetic imm20/imm16 -> arithmetic imm4 12/16 bits
3d3d428f
NC
1756
1757 Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
1758
1759static bfd_boolean
1760elf32_cr16_relax_section (bfd *abfd, asection *sec,
99706f30 1761 struct bfd_link_info *link_info, bfd_boolean *again)
3d3d428f
NC
1762{
1763 Elf_Internal_Shdr *symtab_hdr;
1764 Elf_Internal_Rela *internal_relocs;
1765 Elf_Internal_Rela *irel, *irelend;
1766 bfd_byte *contents = NULL;
1767 Elf_Internal_Sym *isymbuf = NULL;
1768
1769 /* Assume nothing changes. */
1770 *again = FALSE;
1771
1772 /* We don't have to do anything for a relocatable link, if
1773 this section does not have relocs, or if this is not a
1774 code section. */
0e1862bb 1775 if (bfd_link_relocatable (link_info)
3d3d428f
NC
1776 || (sec->flags & SEC_RELOC) == 0
1777 || sec->reloc_count == 0
1778 || (sec->flags & SEC_CODE) == 0)
1779 return TRUE;
1780
1781 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1782
1783 /* Get a copy of the native relocations. */
1784 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
7fac7ff4 1785 link_info->keep_memory);
3d3d428f
NC
1786 if (internal_relocs == NULL)
1787 goto error_return;
1788
1789 /* Walk through them looking for relaxing opportunities. */
1790 irelend = internal_relocs + sec->reloc_count;
1791 for (irel = internal_relocs; irel < irelend; irel++)
1792 {
1793 bfd_vma symval;
1794
1795 /* If this isn't something that can be relaxed, then ignore
1796 this reloc. */
1797 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP16
7fac7ff4
NC
1798 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP24
1799 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM32
1800 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM20
1801 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM16)
3d3d428f
NC
1802 continue;
1803
1804 /* Get the section contents if we haven't done so already. */
1805 if (contents == NULL)
1806 {
1807 /* Get cached copy if it exists. */
1808 if (elf_section_data (sec)->this_hdr.contents != NULL)
1809 contents = elf_section_data (sec)->this_hdr.contents;
1810 /* Go get them off disk. */
1811 else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
1812 goto error_return;
1813 }
1814
1815 /* Read this BFD's local symbols if we haven't done so already. */
1816 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
1817 {
1818 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1819 if (isymbuf == NULL)
1820 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1821 symtab_hdr->sh_info, 0,
1822 NULL, NULL, NULL);
1823 if (isymbuf == NULL)
1824 goto error_return;
1825 }
1826
1827 /* Get the value of the symbol referred to by the reloc. */
1828 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1829 {
1830 /* A local symbol. */
1831 Elf_Internal_Sym *isym;
1832 asection *sym_sec;
1833
1834 isym = isymbuf + ELF32_R_SYM (irel->r_info);
1835 if (isym->st_shndx == SHN_UNDEF)
1836 sym_sec = bfd_und_section_ptr;
1837 else if (isym->st_shndx == SHN_ABS)
1838 sym_sec = bfd_abs_section_ptr;
1839 else if (isym->st_shndx == SHN_COMMON)
1840 sym_sec = bfd_com_section_ptr;
1841 else
1842 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1843 symval = (isym->st_value
1844 + sym_sec->output_section->vma
1845 + sym_sec->output_offset);
1846 }
1847 else
1848 {
1849 unsigned long indx;
1850 struct elf_link_hash_entry *h;
1851
1852 /* An external symbol. */
1853 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1854 h = elf_sym_hashes (abfd)[indx];
1855 BFD_ASSERT (h != NULL);
1856
1857 if (h->root.type != bfd_link_hash_defined
1858 && h->root.type != bfd_link_hash_defweak)
1859 /* This appears to be a reference to an undefined
1860 symbol. Just ignore it--it will be caught by the
1861 regular reloc processing. */
1862 continue;
1863
1864 symval = (h->root.u.def.value
1865 + h->root.u.def.section->output_section->vma
1866 + h->root.u.def.section->output_offset);
1867 }
1868
1869 /* For simplicity of coding, we are going to modify the section
1870 contents, the section relocs, and the BFD symbol table. We
1871 must tell the rest of the code not to free up this
1872 information. It would be possible to instead create a table
1873 of changes which have to be made, as is done in coff-mips.c;
1874 that would be more work, but would require less memory when
1875 the linker is run. */
1876
1877 /* Try to turn a 24 branch/call into a 16bit relative
7fac7ff4 1878 branch/call. */
3d3d428f
NC
1879 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP24)
1880 {
1881 bfd_vma value = symval;
1882
1883 /* Deal with pc-relative gunk. */
1884 value -= (sec->output_section->vma + sec->output_offset);
1885 value -= irel->r_offset;
1886 value += irel->r_addend;
1887
1888 /* See if the value will fit in 16 bits, note the high value is
1889 0xfffe + 2 as the target will be two bytes closer if we are
1890 able to relax. */
1891 if ((long) value < 0x10000 && (long) value > -0x10002)
1892 {
1893 unsigned int code;
1894
1895 /* Get the opcode. */
1896 code = (unsigned int) bfd_get_32 (abfd, contents + irel->r_offset);
1897
1898 /* Verify it's a 'bcond' and fix the opcode. */
1899 if ((code & 0xffff) == 0x0010)
99706f30 1900 bfd_put_16 (abfd, 0x1800 | ((0xf & (code >> 20)) << 4), contents + irel->r_offset);
3d3d428f
NC
1901 else
1902 continue;
1903
1904 /* Note that we've changed the relocs, section contents, etc. */
1905 elf_section_data (sec)->relocs = internal_relocs;
1906 elf_section_data (sec)->this_hdr.contents = contents;
1907 symtab_hdr->contents = (unsigned char *) isymbuf;
1908
1909 /* Fix the relocation's type. */
1910 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1911 R_CR16_DISP16);
1912
1913 /* Delete two bytes of data. */
1914 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
1915 irel->r_offset + 2, 2))
1916 goto error_return;
1917
1918 /* That will change things, so, we should relax again.
1919 Note that this is not required, and it may be slow. */
1920 *again = TRUE;
1921 }
1922 }
1923
99706f30
SR
1924 /* Try to turn a 16bit pc-relative branch into an
1925 8bit pc-relative branch. */
3d3d428f
NC
1926 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP16)
1927 {
1928 bfd_vma value = symval;
1929
1930 /* Deal with pc-relative gunk. */
1931 value -= (sec->output_section->vma + sec->output_offset);
1932 value -= irel->r_offset;
1933 value += irel->r_addend;
1934
1935 /* See if the value will fit in 8 bits, note the high value is
1936 0xfc + 2 as the target will be two bytes closer if we are
1937 able to relax. */
99706f30
SR
1938 /*if ((long) value < 0x1fa && (long) value > -0x100) REVISIT:range */
1939 if ((long) value < 0xfa && (long) value > -0x100)
3d3d428f
NC
1940 {
1941 unsigned short code;
1942
1943 /* Get the opcode. */
1944 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
1945
99706f30
SR
1946 /* Verify it's a 'bcond' and fix the opcode. */
1947 if ((code & 0xff0f) == 0x1800)
1948 bfd_put_16 (abfd, (code & 0xf0f0), contents + irel->r_offset);
3d3d428f
NC
1949 else
1950 continue;
1951
1952 /* Note that we've changed the relocs, section contents, etc. */
1953 elf_section_data (sec)->relocs = internal_relocs;
1954 elf_section_data (sec)->this_hdr.contents = contents;
1955 symtab_hdr->contents = (unsigned char *) isymbuf;
1956
1957 /* Fix the relocation's type. */
1958 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1959 R_CR16_DISP8);
1960
1961 /* Delete two bytes of data. */
1962 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
1963 irel->r_offset + 2, 2))
1964 goto error_return;
1965
1966 /* That will change things, so, we should relax again.
1967 Note that this is not required, and it may be slow. */
1968 *again = TRUE;
1969 }
1970 }
1971
99706f30 1972 /* Try to turn a 32-bit IMM address into a 20/16-bit IMM address */
3d3d428f
NC
1973 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM32)
1974 {
1975 bfd_vma value = symval;
7fac7ff4 1976 unsigned short is_add_mov = 0;
99706f30 1977 bfd_vma value1 = 0;
68ffbac6 1978
99706f30
SR
1979 /* Get the existing value from the mcode */
1980 value1 = ((bfd_get_32 (abfd, contents + irel->r_offset + 2) >> 16)
1981 |(((bfd_get_32 (abfd, contents + irel->r_offset + 2) & 0xffff) << 16)));
3d3d428f
NC
1982
1983 /* See if the value will fit in 20 bits. */
99706f30 1984 if ((long) (value + value1) < 0xfffff && (long) (value + value1) > 0)
3d3d428f
NC
1985 {
1986 unsigned short code;
1987
1988 /* Get the opcode. */
1989 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
1990
99706f30 1991 /* Verify it's a 'arithmetic ADDD or MOVD instruction'.
7fac7ff4 1992 For ADDD and MOVD only, convert to IMM32 -> IMM20. */
68ffbac6 1993
e9deb29d 1994 if (((code & 0xfff0) == 0x0070) || ((code & 0xfff0) == 0x0020))
99706f30 1995 is_add_mov = 1;
7fac7ff4
NC
1996
1997 if (is_add_mov)
1998 {
99706f30 1999 /* Note that we've changed the relocs, section contents,
7fac7ff4
NC
2000 etc. */
2001 elf_section_data (sec)->relocs = internal_relocs;
2002 elf_section_data (sec)->this_hdr.contents = contents;
2003 symtab_hdr->contents = (unsigned char *) isymbuf;
2004
2005 /* Fix the opcode. */
2006 if ((code & 0xfff0) == 0x0070) /* For movd. */
2007 bfd_put_8 (abfd, 0x05, contents + irel->r_offset + 1);
99706f30 2008 else /* code == 0x0020 for addd. */
7fac7ff4 2009 bfd_put_8 (abfd, 0x04, contents + irel->r_offset + 1);
99706f30 2010
7fac7ff4
NC
2011 bfd_put_8 (abfd, (code & 0xf) << 4, contents + irel->r_offset);
2012
68ffbac6 2013 /* If existing value is nagavive adjust approriately
99706f30
SR
2014 place the 16-20bits (ie 4 bit) in new opcode,
2015 as the 0xffffxxxx, the higher 2 byte values removed. */
2016 if (value1 & 0x80000000)
2017 bfd_put_8 (abfd, (0x0f | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
2018 else
2019 bfd_put_8 (abfd, (((value1 >> 16)&0xf) | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
7fac7ff4
NC
2020
2021 /* Fix the relocation's type. */
2022 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
99706f30
SR
2023 R_CR16_IMM20);
2024
7fac7ff4
NC
2025 /* Delete two bytes of data. */
2026 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
99706f30 2027 irel->r_offset + 2, 2))
7fac7ff4
NC
2028 goto error_return;
2029
2030 /* That will change things, so, we should relax again.
2031 Note that this is not required, and it may be slow. */
2032 *again = TRUE;
2033 }
2034 }
99706f30
SR
2035
2036 /* See if the value will fit in 16 bits. */
68ffbac6 2037 if ((!is_add_mov)
99706f30 2038 && ((long)(value + value1) < 0x7fff && (long)(value + value1) > 0))
7fac7ff4
NC
2039 {
2040 unsigned short code;
2041
2042 /* Get the opcode. */
2043 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
3d3d428f
NC
2044
2045 /* Note that we've changed the relocs, section contents, etc. */
2046 elf_section_data (sec)->relocs = internal_relocs;
2047 elf_section_data (sec)->this_hdr.contents = contents;
2048 symtab_hdr->contents = (unsigned char *) isymbuf;
2049
2050 /* Fix the opcode. */
7fac7ff4
NC
2051 if ((code & 0xf0) == 0x70) /* For movd. */
2052 bfd_put_8 (abfd, 0x54, contents + irel->r_offset + 1);
2053 else if ((code & 0xf0) == 0x20) /* For addd. */
2054 bfd_put_8 (abfd, 0x60, contents + irel->r_offset + 1);
2055 else if ((code & 0xf0) == 0x90) /* For cmpd. */
2056 bfd_put_8 (abfd, 0x56, contents + irel->r_offset + 1);
2057 else
2058 continue;
2059
2060 bfd_put_8 (abfd, 0xb0 | (code & 0xf), contents + irel->r_offset);
3d3d428f 2061
68ffbac6 2062 /* If existing value is nagavive adjust approriately
99706f30
SR
2063 place the 12-16bits (ie 4 bit) in new opcode,
2064 as the 0xfffffxxx, the higher 2 byte values removed. */
2065 if (value1 & 0x80000000)
2066 bfd_put_8 (abfd, (0x0f | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
2067 else
2068 bfd_put_16 (abfd, value1, contents + irel->r_offset + 2);
2069
2070
3d3d428f
NC
2071 /* Fix the relocation's type. */
2072 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
7fac7ff4 2073 R_CR16_IMM16);
3d3d428f
NC
2074
2075 /* Delete two bytes of data. */
2076 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
7fac7ff4 2077 irel->r_offset + 2, 2))
99706f30 2078 goto error_return;
3d3d428f
NC
2079
2080 /* That will change things, so, we should relax again.
2081 Note that this is not required, and it may be slow. */
99706f30 2082 *again = TRUE;
3d3d428f
NC
2083 }
2084 }
7fac7ff4 2085
99706f30
SR
2086#if 0
2087 /* Try to turn a 16bit immediate address into a 4bit
2088 immediate address. */
68ffbac6 2089 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
7fac7ff4 2090 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM16))
3d3d428f
NC
2091 {
2092 bfd_vma value = symval;
99706f30
SR
2093 bfd_vma value1 = 0;
2094
2095 /* Get the existing value from the mcode */
2096 value1 = ((bfd_get_16 (abfd, contents + irel->r_offset + 2) & 0xffff));
2097
2098 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
2099 {
2100 value1 |= ((bfd_get_16 (abfd, contents + irel->r_offset + 1) & 0xf000) << 0x4);
2101 }
3d3d428f
NC
2102
2103 /* See if the value will fit in 4 bits. */
99706f30
SR
2104 if ((((long) (value + value1)) < 0xf)
2105 && (((long) (value + value1)) > 0))
3d3d428f
NC
2106 {
2107 unsigned short code;
2108
2109 /* Get the opcode. */
7fac7ff4 2110 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
3d3d428f
NC
2111
2112 /* Note that we've changed the relocs, section contents, etc. */
2113 elf_section_data (sec)->relocs = internal_relocs;
2114 elf_section_data (sec)->this_hdr.contents = contents;
2115 symtab_hdr->contents = (unsigned char *) isymbuf;
2116
2117 /* Fix the opcode. */
7fac7ff4
NC
2118 if (((code & 0x0f00) == 0x0400) || ((code & 0x0f00) == 0x0500))
2119 {
2120 if ((code & 0x0f00) == 0x0400) /* For movd imm20. */
2121 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2122 else /* For addd imm20. */
2123 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
2124 bfd_put_8 (abfd, (code & 0xf0) >> 4, contents + irel->r_offset + 1);
2125 }
2126 else
2127 {
2128 if ((code & 0xfff0) == 0x56b0) /* For cmpd imm16. */
2129 bfd_put_8 (abfd, 0x56, contents + irel->r_offset);
2130 else if ((code & 0xfff0) == 0x54b0) /* For movd imm16. */
2131 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
2132 else if ((code & 0xfff0) == 0x58b0) /* For movb imm16. */
2133 bfd_put_8 (abfd, 0x58, contents + irel->r_offset);
2134 else if ((code & 0xfff0) == 0x5Ab0) /* For movw imm16. */
2135 bfd_put_8 (abfd, 0x5A, contents + irel->r_offset);
2136 else if ((code & 0xfff0) == 0x60b0) /* For addd imm16. */
2137 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2138 else if ((code & 0xfff0) == 0x30b0) /* For addb imm16. */
2139 bfd_put_8 (abfd, 0x30, contents + irel->r_offset);
2140 else if ((code & 0xfff0) == 0x2Cb0) /* For addub imm16. */
2141 bfd_put_8 (abfd, 0x2C, contents + irel->r_offset);
2142 else if ((code & 0xfff0) == 0x32b0) /* For adduw imm16. */
2143 bfd_put_8 (abfd, 0x32, contents + irel->r_offset);
2144 else if ((code & 0xfff0) == 0x38b0) /* For subb imm16. */
2145 bfd_put_8 (abfd, 0x38, contents + irel->r_offset);
99706f30
SR
2146 else if ((code & 0xfff0) == 0x3Cb0) /* For subcb imm16. */
2147 bfd_put_8 (abfd, 0x3C, contents + irel->r_offset);
2148 else if ((code & 0xfff0) == 0x3Fb0) /* For subcw imm16. */
2149 bfd_put_8 (abfd, 0x3F, contents + irel->r_offset);
7fac7ff4
NC
2150 else if ((code & 0xfff0) == 0x3Ab0) /* For subw imm16. */
2151 bfd_put_8 (abfd, 0x3A, contents + irel->r_offset);
2152 else if ((code & 0xfff0) == 0x50b0) /* For cmpb imm16. */
2153 bfd_put_8 (abfd, 0x50, contents + irel->r_offset);
2154 else if ((code & 0xfff0) == 0x52b0) /* For cmpw imm16. */
2155 bfd_put_8 (abfd, 0x52, contents + irel->r_offset);
2156 else
2157 continue;
99706f30 2158
7fac7ff4
NC
2159 bfd_put_8 (abfd, (code & 0xf), contents + irel->r_offset + 1);
2160 }
3d3d428f
NC
2161
2162 /* Fix the relocation's type. */
2163 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2164 R_CR16_IMM4);
2165
2166 /* Delete two bytes of data. */
2167 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
99706f30 2168 irel->r_offset + 2, 2))
3d3d428f
NC
2169 goto error_return;
2170
2171 /* That will change things, so, we should relax again.
2172 Note that this is not required, and it may be slow. */
2173 *again = TRUE;
2174 }
2175 }
99706f30 2176#endif
3d3d428f
NC
2177 }
2178
2179 if (isymbuf != NULL
2180 && symtab_hdr->contents != (unsigned char *) isymbuf)
2181 {
2182 if (! link_info->keep_memory)
2183 free (isymbuf);
2184 else
99706f30
SR
2185 /* Cache the symbols for elf_link_input_bfd. */
2186 symtab_hdr->contents = (unsigned char *) isymbuf;
3d3d428f
NC
2187 }
2188
2189 if (contents != NULL
2190 && elf_section_data (sec)->this_hdr.contents != contents)
2191 {
2192 if (! link_info->keep_memory)
2193 free (contents);
2194 else
99706f30
SR
2195 /* Cache the section contents for elf_link_input_bfd. */
2196 elf_section_data (sec)->this_hdr.contents = contents;
68ffbac6 2197
3d3d428f
NC
2198 }
2199
2200 if (internal_relocs != NULL
2201 && elf_section_data (sec)->relocs != internal_relocs)
2202 free (internal_relocs);
2203
2204 return TRUE;
2205
2206 error_return:
2207 if (isymbuf != NULL
2208 && symtab_hdr->contents != (unsigned char *) isymbuf)
2209 free (isymbuf);
2210 if (contents != NULL
2211 && elf_section_data (sec)->this_hdr.contents != contents)
2212 free (contents);
2213 if (internal_relocs != NULL
2214 && elf_section_data (sec)->relocs != internal_relocs)
2215 free (internal_relocs);
2216
2217 return FALSE;
2218}
2219
2220static asection *
2221elf32_cr16_gc_mark_hook (asection *sec,
fb34365b
AM
2222 struct bfd_link_info *info,
2223 Elf_Internal_Rela *rel,
99706f30
SR
2224 struct elf_link_hash_entry *h,
2225 Elf_Internal_Sym *sym)
3d3d428f 2226{
fb34365b 2227 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
3d3d428f
NC
2228}
2229
2230/* Update the got entry reference counts for the section being removed. */
2231
2232static bfd_boolean
2233elf32_cr16_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
99706f30
SR
2234 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2235 asection *sec ATTRIBUTE_UNUSED,
2236 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
3d3d428f
NC
2237{
2238 /* We don't support garbage collection of GOT and PLT relocs yet. */
2239 return TRUE;
2240}
2241
99706f30
SR
2242/* Create dynamic sections when linking against a dynamic object. */
2243
2244static bfd_boolean
2245_bfd_cr16_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
2246{
2247 flagword flags;
2248 asection * s;
2249 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
2250 int ptralign = 0;
2251
2252 switch (bed->s->arch_size)
2253 {
2254 case 16:
2255 ptralign = 1;
2256 break;
2257
2258 case 32:
2259 ptralign = 2;
2260 break;
2261
2262 default:
2263 bfd_set_error (bfd_error_bad_value);
2264 return FALSE;
2265 }
2266
2267 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
2268 .rel[a].bss sections. */
2269
2270 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
2271 | SEC_LINKER_CREATED);
2272
3d4d4302
AM
2273 s = bfd_make_section_anyway_with_flags (abfd,
2274 (bed->default_use_rela_p
2275 ? ".rela.plt" : ".rel.plt"),
2276 flags | SEC_READONLY);
99706f30
SR
2277 if (s == NULL
2278 || ! bfd_set_section_alignment (abfd, s, ptralign))
2279 return FALSE;
2280
2281 if (! _bfd_cr16_elf_create_got_section (abfd, info))
2282 return FALSE;
2283
99706f30
SR
2284 if (bed->want_dynbss)
2285 {
2286 /* The .dynbss section is a place to put symbols which are defined
2287 by dynamic objects, are referenced by regular objects, and are
2288 not functions. We must allocate space for them in the process
2289 image and use a R_*_COPY reloc to tell the dynamic linker to
2290 initialize them at run time. The linker script puts the .dynbss
2291 section into the .bss section of the final image. */
3d4d4302
AM
2292 s = bfd_make_section_anyway_with_flags (abfd, ".dynbss",
2293 SEC_ALLOC | SEC_LINKER_CREATED);
99706f30
SR
2294 if (s == NULL)
2295 return FALSE;
2296
2297 /* The .rel[a].bss section holds copy relocs. This section is not
2298 normally needed. We need to create it here, though, so that the
2299 linker will map it to an output section. We can't just create it
2300 only if we need it, because we will not know whether we need it
2301 until we have seen all the input files, and the first time the
2302 main linker code calls BFD after examining all the input files
2303 (size_dynamic_sections) the input sections have already been
2304 mapped to the output sections. If the section turns out not to
2305 be needed, we can discard it later. We will never need this
2306 section when generating a shared object, since they do not use
2307 copy relocs. */
0e1862bb 2308 if (! bfd_link_executable (info))
99706f30 2309 {
3d4d4302
AM
2310 s = bfd_make_section_anyway_with_flags (abfd,
2311 (bed->default_use_rela_p
2312 ? ".rela.bss" : ".rel.bss"),
2313 flags | SEC_READONLY);
99706f30
SR
2314 if (s == NULL
2315 || ! bfd_set_section_alignment (abfd, s, ptralign))
2316 return FALSE;
2317 }
2318 }
2319
2320 return TRUE;
2321}
2322\f
2323/* Adjust a symbol defined by a dynamic object and referenced by a
2324 regular object. The current definition is in some section of the
2325 dynamic object, but we're not including those sections. We have to
2326 change the definition to something the rest of the link can
2327 understand. */
2328
2329static bfd_boolean
2330_bfd_cr16_elf_adjust_dynamic_symbol (struct bfd_link_info * info,
2331 struct elf_link_hash_entry * h)
2332{
2333 bfd * dynobj;
2334 asection * s;
2335
2336 dynobj = elf_hash_table (info)->dynobj;
2337
2338 /* Make sure we know what is going on here. */
2339 BFD_ASSERT (dynobj != NULL
2340 && (h->needs_plt
2341 || h->u.weakdef != NULL
2342 || (h->def_dynamic
2343 && h->ref_regular
2344 && !h->def_regular)));
2345
2346 /* If this is a function, put it in the procedure linkage table. We
2347 will fill in the contents of the procedure linkage table later,
2348 when we know the address of the .got section. */
2349 if (h->type == STT_FUNC
2350 || h->needs_plt)
2351 {
0e1862bb 2352 if (! bfd_link_executable (info)
99706f30
SR
2353 && !h->def_dynamic
2354 && !h->ref_dynamic)
2355 {
2356 /* This case can occur if we saw a PLT reloc in an input
2357 file, but the symbol was never referred to by a dynamic
2358 object. In such a case, we don't actually need to build
2359 a procedure linkage table, and we can just do a REL32
2360 reloc instead. */
2361 BFD_ASSERT (h->needs_plt);
2362 return TRUE;
2363 }
2364
2365 /* Make sure this symbol is output as a dynamic symbol. */
2366 if (h->dynindx == -1)
2367 {
2368 if (! bfd_elf_link_record_dynamic_symbol (info, h))
2369 return FALSE;
2370 }
2371
2372 /* We also need to make an entry in the .got.plt section, which
2373 will be placed in the .got section by the linker script. */
2374
3d4d4302 2375 s = bfd_get_linker_section (dynobj, ".got.plt");
99706f30
SR
2376 BFD_ASSERT (s != NULL);
2377 s->size += 4;
2378
2379 /* We also need to make an entry in the .rela.plt section. */
2380
3d4d4302 2381 s = bfd_get_linker_section (dynobj, ".rela.plt");
99706f30
SR
2382 BFD_ASSERT (s != NULL);
2383 s->size += sizeof (Elf32_External_Rela);
2384
2385 return TRUE;
2386 }
2387
2388 /* If this is a weak symbol, and there is a real definition, the
2389 processor independent code will have arranged for us to see the
2390 real definition first, and we can just use the same value. */
2391 if (h->u.weakdef != NULL)
2392 {
2393 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
2394 || h->u.weakdef->root.type == bfd_link_hash_defweak);
2395 h->root.u.def.section = h->u.weakdef->root.u.def.section;
2396 h->root.u.def.value = h->u.weakdef->root.u.def.value;
2397 return TRUE;
2398 }
2399
2400 /* This is a reference to a symbol defined by a dynamic object which
2401 is not a function. */
2402
2403 /* If we are creating a shared library, we must presume that the
2404 only references to the symbol are via the global offset table.
2405 For such cases we need not do anything here; the relocations will
2406 be handled correctly by relocate_section. */
0e1862bb 2407 if (bfd_link_executable (info))
99706f30
SR
2408 return TRUE;
2409
2410 /* If there are no references to this symbol that do not use the
2411 GOT, we don't need to generate a copy reloc. */
2412 if (!h->non_got_ref)
2413 return TRUE;
2414
99706f30
SR
2415 /* We must allocate the symbol in our .dynbss section, which will
2416 become part of the .bss section of the executable. There will be
2417 an entry for this symbol in the .dynsym section. The dynamic
2418 object will contain position independent code, so all references
2419 from the dynamic object to this symbol will go through the global
2420 offset table. The dynamic linker will use the .dynsym entry to
2421 determine the address it must put in the global offset table, so
2422 both the dynamic object and the regular object will refer to the
2423 same memory location for the variable. */
2424
3d4d4302 2425 s = bfd_get_linker_section (dynobj, ".dynbss");
99706f30
SR
2426 BFD_ASSERT (s != NULL);
2427
2428 /* We must generate a R_CR16_COPY reloc to tell the dynamic linker to
2429 copy the initial value out of the dynamic object and into the
2430 runtime process image. We need to remember the offset into the
2431 .rela.bss section we are going to use. */
1d7e9d18 2432 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
99706f30
SR
2433 {
2434 asection * srel;
2435
3d4d4302 2436 srel = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2437 BFD_ASSERT (srel != NULL);
2438 srel->size += sizeof (Elf32_External_Rela);
2439 h->needs_copy = 1;
2440 }
2441
6cabe1ea 2442 return _bfd_elf_adjust_dynamic_copy (info, h, s);
99706f30
SR
2443}
2444
2445/* Set the sizes of the dynamic sections. */
2446
2447static bfd_boolean
2448_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd,
2449 struct bfd_link_info * info)
2450{
2451 bfd * dynobj;
2452 asection * s;
2453 bfd_boolean plt;
2454 bfd_boolean relocs;
2455 bfd_boolean reltext;
2456
2457 dynobj = elf_hash_table (info)->dynobj;
2458 BFD_ASSERT (dynobj != NULL);
2459
2460 if (elf_hash_table (info)->dynamic_sections_created)
2461 {
2462 /* Set the contents of the .interp section to the interpreter. */
9b8b325a 2463 if (bfd_link_executable (info) && !info->nointerp)
99706f30
SR
2464 {
2465#if 0
3d4d4302 2466 s = bfd_get_linker_section (dynobj, ".interp");
99706f30
SR
2467 BFD_ASSERT (s != NULL);
2468 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
2469 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
2470#endif
2471 }
2472 }
2473 else
2474 {
2475 /* We may have created entries in the .rela.got section.
2476 However, if we are not creating the dynamic sections, we will
2477 not actually use these entries. Reset the size of .rela.got,
2478 which will cause it to get stripped from the output file
2479 below. */
3d4d4302 2480 s = bfd_get_linker_section (dynobj, ".rela.got");
99706f30
SR
2481 if (s != NULL)
2482 s->size = 0;
2483 }
2484
2485 /* The check_relocs and adjust_dynamic_symbol entry points have
2486 determined the sizes of the various dynamic sections. Allocate
2487 memory for them. */
2488 plt = FALSE;
2489 relocs = FALSE;
2490 reltext = FALSE;
2491 for (s = dynobj->sections; s != NULL; s = s->next)
2492 {
2493 const char * name;
2494
2495 if ((s->flags & SEC_LINKER_CREATED) == 0)
2496 continue;
2497
2498 /* It's OK to base decisions on the section name, because none
2499 of the dynobj section names depend upon the input files. */
2500 name = bfd_get_section_name (dynobj, s);
2501
2502 if (strcmp (name, ".plt") == 0)
2503 {
2504 /* Remember whether there is a PLT. */
2505 plt = s->size != 0;
2506 }
2507 else if (CONST_STRNEQ (name, ".rela"))
2508 {
2509 if (s->size != 0)
2510 {
2511 asection * target;
2512
2513 /* Remember whether there are any reloc sections other
2514 than .rela.plt. */
2515 if (strcmp (name, ".rela.plt") != 0)
2516 {
2517 const char * outname;
2518
2519 relocs = TRUE;
2520
2521 /* If this relocation section applies to a read only
2522 section, then we probably need a DT_TEXTREL
2523 entry. The entries in the .rela.plt section
2524 really apply to the .got section, which we
2525 created ourselves and so know is not readonly. */
2526 outname = bfd_get_section_name (output_bfd,
2527 s->output_section);
2528 target = bfd_get_section_by_name (output_bfd, outname + 5);
2529 if (target != NULL
2530 && (target->flags & SEC_READONLY) != 0
2531 && (target->flags & SEC_ALLOC) != 0)
2532 reltext = TRUE;
2533 }
2534
2535 /* We use the reloc_count field as a counter if we need
2536 to copy relocs into the output file. */
2537 s->reloc_count = 0;
2538 }
2539 }
2540 else if (! CONST_STRNEQ (name, ".got")
2541 && strcmp (name, ".dynbss") != 0)
2542 /* It's not one of our sections, so don't allocate space. */
2543 continue;
2544
2545 if (s->size == 0)
2546 {
2547 /* If we don't need this section, strip it from the
2548 output file. This is mostly to handle .rela.bss and
2549 .rela.plt. We must create both sections in
2550 create_dynamic_sections, because they must be created
2551 before the linker maps input sections to output
2552 sections. The linker does that before
2553 adjust_dynamic_symbol is called, and it is that
2554 function which decides whether anything needs to go
2555 into these sections. */
2556 s->flags |= SEC_EXCLUDE;
2557 continue;
2558 }
2559
2560 if ((s->flags & SEC_HAS_CONTENTS) == 0)
2561 continue;
2562
2563 /* Allocate memory for the section contents. We use bfd_zalloc
2564 here in case unused entries are not reclaimed before the
2565 section's contents are written out. This should not happen,
2566 but this way if it does, we get a R_CR16_NONE reloc
2567 instead of garbage. */
2568 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
2569 if (s->contents == NULL)
2570 return FALSE;
2571 }
2572
2573 if (elf_hash_table (info)->dynamic_sections_created)
2574 {
2575 /* Add some entries to the .dynamic section. We fill in the
2576 values later, in _bfd_cr16_elf_finish_dynamic_sections,
2577 but we must add the entries now so that we get the correct
2578 size for the .dynamic section. The DT_DEBUG entry is filled
2579 in by the dynamic linker and used by the debugger. */
0e1862bb 2580 if (! bfd_link_executable (info))
99706f30
SR
2581 {
2582 if (!_bfd_elf_add_dynamic_entry (info, DT_DEBUG, 0))
2583 return FALSE;
2584 }
2585
2586 if (plt)
2587 {
2588 if (!_bfd_elf_add_dynamic_entry (info, DT_PLTGOT, 0)
2589 || !_bfd_elf_add_dynamic_entry (info, DT_PLTRELSZ, 0)
2590 || !_bfd_elf_add_dynamic_entry (info, DT_PLTREL, DT_RELA)
2591 || !_bfd_elf_add_dynamic_entry (info, DT_JMPREL, 0))
2592 return FALSE;
2593 }
2594
2595 if (relocs)
2596 {
2597 if (!_bfd_elf_add_dynamic_entry (info, DT_RELA, 0)
2598 || !_bfd_elf_add_dynamic_entry (info, DT_RELASZ, 0)
2599 || !_bfd_elf_add_dynamic_entry (info, DT_RELAENT,
2600 sizeof (Elf32_External_Rela)))
2601 return FALSE;
2602 }
2603
2604 if (reltext)
2605 {
2606 if (!_bfd_elf_add_dynamic_entry (info, DT_TEXTREL, 0))
2607 return FALSE;
2608 }
2609 }
2610
2611 return TRUE;
2612}
2613
2614/* Finish up dynamic symbol handling. We set the contents of various
2615 dynamic sections here. */
2616
2617static bfd_boolean
2618_bfd_cr16_elf_finish_dynamic_symbol (bfd * output_bfd,
2619 struct bfd_link_info * info,
2620 struct elf_link_hash_entry * h,
2621 Elf_Internal_Sym * sym)
2622{
2623 bfd * dynobj;
2624
2625 dynobj = elf_hash_table (info)->dynobj;
2626
2627 if (h->got.offset != (bfd_vma) -1)
2628 {
2629 asection * sgot;
2630 asection * srel;
2631 Elf_Internal_Rela rel;
2632
2633 /* This symbol has an entry in the global offset table. Set it up. */
2634
3d4d4302
AM
2635 sgot = bfd_get_linker_section (dynobj, ".got");
2636 srel = bfd_get_linker_section (dynobj, ".rela.got");
99706f30
SR
2637 BFD_ASSERT (sgot != NULL && srel != NULL);
2638
2639 rel.r_offset = (sgot->output_section->vma
2640 + sgot->output_offset
2641 + (h->got.offset & ~1));
2642
2643 /* If this is a -Bsymbolic link, and the symbol is defined
2644 locally, we just want to emit a RELATIVE reloc. Likewise if
2645 the symbol was forced to be local because of a version file.
2646 The entry in the global offset table will already have been
2647 initialized in the relocate_section function. */
0e1862bb 2648 if (bfd_link_executable (info)
99706f30
SR
2649 && (info->symbolic || h->dynindx == -1)
2650 && h->def_regular)
2651 {
2652 rel.r_info = ELF32_R_INFO (0, R_CR16_GOT_REGREL20);
2653 rel.r_addend = (h->root.u.def.value
2654 + h->root.u.def.section->output_section->vma
2655 + h->root.u.def.section->output_offset);
2656 }
2657 else
2658 {
2659 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
2660 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2661 rel.r_addend = 0;
2662 }
2663
2664 bfd_elf32_swap_reloca_out (output_bfd, &rel,
2665 (bfd_byte *) ((Elf32_External_Rela *) srel->contents
2666 + srel->reloc_count));
2667 ++ srel->reloc_count;
2668 }
2669
2670 if (h->needs_copy)
2671 {
2672 asection * s;
2673 Elf_Internal_Rela rel;
2674
2675 /* This symbol needs a copy reloc. Set it up. */
2676 BFD_ASSERT (h->dynindx != -1
2677 && (h->root.type == bfd_link_hash_defined
2678 || h->root.type == bfd_link_hash_defweak));
2679
3d4d4302 2680 s = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2681 BFD_ASSERT (s != NULL);
2682
2683 rel.r_offset = (h->root.u.def.value
2684 + h->root.u.def.section->output_section->vma
2685 + h->root.u.def.section->output_offset);
2686 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2687 rel.r_addend = 0;
2688 bfd_elf32_swap_reloca_out (output_bfd, &rel,
2689 (bfd_byte *) ((Elf32_External_Rela *) s->contents
2690 + s->reloc_count));
2691 ++ s->reloc_count;
2692 }
2693
2694 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
9637f6ef 2695 if (h == elf_hash_table (info)->hdynamic
99706f30
SR
2696 || h == elf_hash_table (info)->hgot)
2697 sym->st_shndx = SHN_ABS;
2698
2699 return TRUE;
2700}
2701
2702/* Finish up the dynamic sections. */
2703
2704static bfd_boolean
2705_bfd_cr16_elf_finish_dynamic_sections (bfd * output_bfd,
2706 struct bfd_link_info * info)
2707{
2708 bfd * dynobj;
2709 asection * sgot;
2710 asection * sdyn;
2711
2712 dynobj = elf_hash_table (info)->dynobj;
2713
3d4d4302 2714 sgot = bfd_get_linker_section (dynobj, ".got.plt");
99706f30 2715 BFD_ASSERT (sgot != NULL);
3d4d4302 2716 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
99706f30
SR
2717
2718 if (elf_hash_table (info)->dynamic_sections_created)
2719 {
2720 Elf32_External_Dyn * dyncon;
2721 Elf32_External_Dyn * dynconend;
2722
2723 BFD_ASSERT (sdyn != NULL);
2724
2725 dyncon = (Elf32_External_Dyn *) sdyn->contents;
2726 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
2727
2728 for (; dyncon < dynconend; dyncon++)
2729 {
2730 Elf_Internal_Dyn dyn;
2731 const char * name;
2732 asection * s;
2733
2734 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
2735
2736 switch (dyn.d_tag)
2737 {
2738 default:
2739 break;
2740
2741 case DT_PLTGOT:
4ade44b7 2742 name = ".got.plt";
99706f30
SR
2743 goto get_vma;
2744
2745 case DT_JMPREL:
2746 name = ".rela.plt";
2747 get_vma:
4ade44b7
AM
2748 s = bfd_get_linker_section (dynobj, name);
2749 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
99706f30
SR
2750 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2751 break;
2752
2753 case DT_PLTRELSZ:
4ade44b7 2754 s = bfd_get_linker_section (dynobj, ".rela.plt");
99706f30
SR
2755 dyn.d_un.d_val = s->size;
2756 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2757 break;
2758
2759 case DT_RELASZ:
2760 /* My reading of the SVR4 ABI indicates that the
2761 procedure linkage table relocs (DT_JMPREL) should be
2762 included in the overall relocs (DT_RELA). This is
2763 what Solaris does. However, UnixWare can not handle
2764 that case. Therefore, we override the DT_RELASZ entry
2765 here to make it not include the JMPREL relocs. Since
2766 the linker script arranges for .rela.plt to follow all
2767 other relocation sections, we don't have to worry
2768 about changing the DT_RELA entry. */
4ade44b7 2769 s = bfd_get_linker_section (dynobj, ".rela.plt");
99706f30
SR
2770 if (s != NULL)
2771 dyn.d_un.d_val -= s->size;
2772 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2773 break;
2774 }
2775 }
2776
2777 }
2778
2779 /* Fill in the first three entries in the global offset table. */
2780 if (sgot->size > 0)
2781 {
2782 if (sdyn == NULL)
2783 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
2784 else
2785 bfd_put_32 (output_bfd,
2786 sdyn->output_section->vma + sdyn->output_offset,
2787 sgot->contents);
2788 }
2789
2790 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
2791
2792 return TRUE;
2793}
2794
2795/* Given a .data.rel section and a .emreloc in-memory section, store
2796 relocation information into the .emreloc section which can be
2797 used at runtime to relocate the section. This is called by the
2798 linker when the --embedded-relocs switch is used. This is called
2799 after the add_symbols entry point has been called for all the
2800 objects, and before the final_link entry point is called. */
2801
2802bfd_boolean
2803bfd_cr16_elf32_create_embedded_relocs (bfd *abfd,
2804 struct bfd_link_info *info,
2805 asection *datasec,
2806 asection *relsec,
2807 char **errmsg)
2808{
2809 Elf_Internal_Shdr *symtab_hdr;
2810 Elf_Internal_Sym *isymbuf = NULL;
2811 Elf_Internal_Rela *internal_relocs = NULL;
2812 Elf_Internal_Rela *irel, *irelend;
2813 bfd_byte *p;
2814 bfd_size_type amt;
2815
0e1862bb 2816 BFD_ASSERT (! bfd_link_relocatable (info));
99706f30
SR
2817
2818 *errmsg = NULL;
2819
2820 if (datasec->reloc_count == 0)
2821 return TRUE;
2822
2823 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2824
2825 /* Get a copy of the native relocations. */
2826 internal_relocs = (_bfd_elf_link_read_relocs
2827 (abfd, datasec, NULL, NULL, info->keep_memory));
2828 if (internal_relocs == NULL)
2829 goto error_return;
2830
2831 amt = (bfd_size_type) datasec->reloc_count * 8;
2832 relsec->contents = (bfd_byte *) bfd_alloc (abfd, amt);
2833 if (relsec->contents == NULL)
2834 goto error_return;
2835
2836 p = relsec->contents;
2837
2838 irelend = internal_relocs + datasec->reloc_count;
2839 for (irel = internal_relocs; irel < irelend; irel++, p += 8)
2840 {
2841 asection *targetsec;
2842
2843 /* We are going to write a four byte longword into the runtime
2844 reloc section. The longword will be the address in the data
2845 section which must be relocated. It is followed by the name
2846 of the target section NUL-padded or truncated to 8
2847 characters. */
2848
2849 /* We can only relocate absolute longword relocs at run time. */
2850 if (!((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
2851 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32)))
2852 {
2853 *errmsg = _("unsupported reloc type");
2854 bfd_set_error (bfd_error_bad_value);
2855 goto error_return;
2856 }
2857
2858 /* Get the target section referred to by the reloc. */
2859 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
2860 {
2861 /* A local symbol. */
2862 Elf_Internal_Sym *isym;
2863
2864 /* Read this BFD's local symbols if we haven't done so already. */
2865 if (isymbuf == NULL)
2866 {
2867 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2868 if (isymbuf == NULL)
2869 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2870 symtab_hdr->sh_info, 0,
2871 NULL, NULL, NULL);
2872 if (isymbuf == NULL)
2873 goto error_return;
2874 }
2875
2876 isym = isymbuf + ELF32_R_SYM (irel->r_info);
2877 targetsec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2878 }
2879 else
2880 {
2881 unsigned long indx;
2882 struct elf_link_hash_entry *h;
2883
2884 /* An external symbol. */
2885 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2886 h = elf_sym_hashes (abfd)[indx];
2887 BFD_ASSERT (h != NULL);
2888 if (h->root.type == bfd_link_hash_defined
2889 || h->root.type == bfd_link_hash_defweak)
2890 targetsec = h->root.u.def.section;
2891 else
2892 targetsec = NULL;
2893 }
2894
2895 bfd_put_32 (abfd, irel->r_offset + datasec->output_offset, p);
2896 memset (p + 4, 0, 4);
2897 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
2898 && (targetsec != NULL) )
2899 strncpy ((char *) p + 4, targetsec->output_section->name, 4);
2900 }
2901
2902 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
2903 free (isymbuf);
2904 if (internal_relocs != NULL
2905 && elf_section_data (datasec)->relocs != internal_relocs)
2906 free (internal_relocs);
2907 return TRUE;
2908
2909error_return:
2910 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
2911 free (isymbuf);
2912 if (internal_relocs != NULL
2913 && elf_section_data (datasec)->relocs != internal_relocs)
2914 free (internal_relocs);
2915 return FALSE;
2916}
2917
2918
2919/* Classify relocation types, such that combreloc can sort them
2920 properly. */
2921
2922static enum elf_reloc_type_class
7e612e98
AM
2923_bfd_cr16_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
2924 const asection *rel_sec ATTRIBUTE_UNUSED,
2925 const Elf_Internal_Rela *rela)
99706f30
SR
2926{
2927 switch ((int) ELF32_R_TYPE (rela->r_info))
2928 {
2929 case R_CR16_GOT_REGREL20:
2930 case R_CR16_GOTC_REGREL20:
2931 return reloc_class_relative;
2932 default:
2933 return reloc_class_normal;
2934 }
2935}
2936
3d3d428f 2937/* Definitions for setting CR16 target vector. */
6d00b590 2938#define TARGET_LITTLE_SYM cr16_elf32_vec
3d3d428f
NC
2939#define TARGET_LITTLE_NAME "elf32-cr16"
2940#define ELF_ARCH bfd_arch_cr16
2941#define ELF_MACHINE_CODE EM_CR16
1e1d9f39 2942#define ELF_MACHINE_ALT1 EM_CR16_OLD
3d3d428f
NC
2943#define ELF_MAXPAGESIZE 0x1
2944#define elf_symbol_leading_char '_'
2945
2946#define bfd_elf32_bfd_reloc_type_lookup elf_cr16_reloc_type_lookup
2947#define bfd_elf32_bfd_reloc_name_lookup elf_cr16_reloc_name_lookup
2948#define elf_info_to_howto elf_cr16_info_to_howto
2949#define elf_info_to_howto_rel 0
2950#define elf_backend_relocate_section elf32_cr16_relocate_section
2951#define bfd_elf32_bfd_relax_section elf32_cr16_relax_section
2952#define bfd_elf32_bfd_get_relocated_section_contents \
2953 elf32_cr16_get_relocated_section_contents
2954#define elf_backend_gc_mark_hook elf32_cr16_gc_mark_hook
2955#define elf_backend_gc_sweep_hook elf32_cr16_gc_sweep_hook
2956#define elf_backend_can_gc_sections 1
2957#define elf_backend_rela_normal 1
99706f30
SR
2958#define elf_backend_check_relocs cr16_elf_check_relocs
2959/* So we can set bits in e_flags. */
2960#define elf_backend_final_write_processing \
2961 _bfd_cr16_elf_final_write_processing
2962#define elf_backend_object_p _bfd_cr16_elf_object_p
2963
2964#define bfd_elf32_bfd_merge_private_bfd_data \
2965 _bfd_cr16_elf_merge_private_bfd_data
2966
2967
2968#define bfd_elf32_bfd_link_hash_table_create \
2969 elf32_cr16_link_hash_table_create
99706f30
SR
2970
2971#define elf_backend_create_dynamic_sections \
2972 _bfd_cr16_elf_create_dynamic_sections
2973#define elf_backend_adjust_dynamic_symbol \
2974 _bfd_cr16_elf_adjust_dynamic_symbol
2975#define elf_backend_size_dynamic_sections \
2976 _bfd_cr16_elf_size_dynamic_sections
2977#define elf_backend_omit_section_dynsym \
2978 ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true)
2979#define elf_backend_finish_dynamic_symbol \
2980 _bfd_cr16_elf_finish_dynamic_symbol
2981#define elf_backend_finish_dynamic_sections \
2982 _bfd_cr16_elf_finish_dynamic_sections
2983
2984#define elf_backend_reloc_type_class _bfd_cr16_elf_reloc_type_class
2985
2986
2987#define elf_backend_want_got_plt 1
2988#define elf_backend_plt_readonly 1
2989#define elf_backend_want_plt_sym 0
2990#define elf_backend_got_header_size 12
3d3d428f
NC
2991
2992#include "elf32-target.h"
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