ChangeLog rotatation and copyright year update
[deliverable/binutils-gdb.git] / bfd / elf32-cr16.c
CommitLineData
3d3d428f 1/* BFD back-end for National Semiconductor's CR16 ELF
b90efa5b 2 Copyright (C) 2007-2015 Free Software Foundation, Inc.
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3 Written by M R Swami Reddy.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software Foundation,
19 Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfdlink.h"
24#include "libbfd.h"
25#include "libiberty.h"
26#include "elf-bfd.h"
27#include "elf/cr16.h"
28
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29/* The cr16 linker needs to keep track of the number of relocs that
30 it decides to copy in check_relocs for each symbol. This is so
31 that it can discard PC relative relocs if it doesn't need them when
32 linking with -Bsymbolic. We store the information in a field
33 extending the regular ELF linker hash table. */
34
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35struct elf32_cr16_link_hash_entry
36{
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37 /* The basic elf link hash table entry. */
38 struct elf_link_hash_entry root;
39
40 /* For function symbols, the number of times this function is
41 called directly (ie by name). */
42 unsigned int direct_calls;
43
44 /* For function symbols, the size of this function's stack
45 (if <= 255 bytes). We stuff this into "call" instructions
46 to this target when it's valid and profitable to do so.
47
48 This does not include stack allocated by movm! */
49 unsigned char stack_size;
50
51 /* For function symbols, arguments (if any) for movm instruction
52 in the prologue. We stuff this value into "call" instructions
53 to the target when it's valid and profitable to do so. */
54 unsigned char movm_args;
55
56 /* For function symbols, the amount of stack space that would be allocated
57 by the movm instruction. This is redundant with movm_args, but we
58 add it to the hash table to avoid computing it over and over. */
59 unsigned char movm_stack_size;
60
61/* Used to mark functions which have had redundant parts of their
62 prologue deleted. */
63#define CR16_DELETED_PROLOGUE_BYTES 0x1
64 unsigned char flags;
65
66 /* Calculated value. */
67 bfd_vma value;
68};
69
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70/* cr16_reloc_map array maps BFD relocation enum into a CRGAS relocation type. */
71
72struct cr16_reloc_map
73{
74 bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
75 unsigned short cr16_reloc_type; /* CR16 relocation type. */
76};
77
78static const struct cr16_reloc_map cr16_reloc_map[R_CR16_MAX] =
79{
80 {BFD_RELOC_NONE, R_CR16_NONE},
81 {BFD_RELOC_CR16_NUM8, R_CR16_NUM8},
82 {BFD_RELOC_CR16_NUM16, R_CR16_NUM16},
83 {BFD_RELOC_CR16_NUM32, R_CR16_NUM32},
84 {BFD_RELOC_CR16_NUM32a, R_CR16_NUM32a},
85 {BFD_RELOC_CR16_REGREL4, R_CR16_REGREL4},
86 {BFD_RELOC_CR16_REGREL4a, R_CR16_REGREL4a},
87 {BFD_RELOC_CR16_REGREL14, R_CR16_REGREL14},
88 {BFD_RELOC_CR16_REGREL14a, R_CR16_REGREL14a},
89 {BFD_RELOC_CR16_REGREL16, R_CR16_REGREL16},
90 {BFD_RELOC_CR16_REGREL20, R_CR16_REGREL20},
91 {BFD_RELOC_CR16_REGREL20a, R_CR16_REGREL20a},
92 {BFD_RELOC_CR16_ABS20, R_CR16_ABS20},
93 {BFD_RELOC_CR16_ABS24, R_CR16_ABS24},
94 {BFD_RELOC_CR16_IMM4, R_CR16_IMM4},
95 {BFD_RELOC_CR16_IMM8, R_CR16_IMM8},
96 {BFD_RELOC_CR16_IMM16, R_CR16_IMM16},
97 {BFD_RELOC_CR16_IMM20, R_CR16_IMM20},
98 {BFD_RELOC_CR16_IMM24, R_CR16_IMM24},
99 {BFD_RELOC_CR16_IMM32, R_CR16_IMM32},
100 {BFD_RELOC_CR16_IMM32a, R_CR16_IMM32a},
101 {BFD_RELOC_CR16_DISP4, R_CR16_DISP4},
102 {BFD_RELOC_CR16_DISP8, R_CR16_DISP8},
103 {BFD_RELOC_CR16_DISP16, R_CR16_DISP16},
104 {BFD_RELOC_CR16_DISP24, R_CR16_DISP24},
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105 {BFD_RELOC_CR16_DISP24a, R_CR16_DISP24a},
106 {BFD_RELOC_CR16_SWITCH8, R_CR16_SWITCH8},
107 {BFD_RELOC_CR16_SWITCH16, R_CR16_SWITCH16},
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108 {BFD_RELOC_CR16_SWITCH32, R_CR16_SWITCH32},
109 {BFD_RELOC_CR16_GOT_REGREL20, R_CR16_GOT_REGREL20},
110 {BFD_RELOC_CR16_GOTC_REGREL20, R_CR16_GOTC_REGREL20},
111 {BFD_RELOC_CR16_GLOB_DAT, R_CR16_GLOB_DAT}
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112};
113
114static reloc_howto_type cr16_elf_howto_table[] =
115{
116 HOWTO (R_CR16_NONE, /* type */
117 0, /* rightshift */
118 2, /* size */
119 32, /* bitsize */
120 FALSE, /* pc_relative */
121 0, /* bitpos */
122 complain_overflow_dont, /* complain_on_overflow */
123 bfd_elf_generic_reloc, /* special_function */
124 "R_CR16_NONE", /* name */
125 FALSE, /* partial_inplace */
126 0, /* src_mask */
127 0, /* dst_mask */
128 FALSE), /* pcrel_offset */
129
130 HOWTO (R_CR16_NUM8, /* type */
131 0, /* rightshift */
132 0, /* size */
133 8, /* bitsize */
134 FALSE, /* pc_relative */
135 0, /* bitpos */
136 complain_overflow_bitfield,/* complain_on_overflow */
137 bfd_elf_generic_reloc, /* special_function */
138 "R_CR16_NUM8", /* name */
139 FALSE, /* partial_inplace */
dc80fd5c 140 0x0, /* src_mask */
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141 0xff, /* dst_mask */
142 FALSE), /* pcrel_offset */
143
144 HOWTO (R_CR16_NUM16, /* type */
145 0, /* rightshift */
146 1, /* size */
147 16, /* bitsize */
148 FALSE, /* pc_relative */
149 0, /* bitpos */
150 complain_overflow_bitfield,/* complain_on_overflow */
151 bfd_elf_generic_reloc, /* special_function */
152 "R_CR16_NUM16", /* name */
153 FALSE, /* partial_inplace */
dc80fd5c 154 0x0, /* src_mask */
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155 0xffff, /* dst_mask */
156 FALSE), /* pcrel_offset */
157
158 HOWTO (R_CR16_NUM32, /* type */
159 0, /* rightshift */
160 2, /* size */
161 32, /* bitsize */
162 FALSE, /* pc_relative */
163 0, /* bitpos */
164 complain_overflow_bitfield,/* complain_on_overflow */
165 bfd_elf_generic_reloc, /* special_function */
166 "R_CR16_NUM32", /* name */
167 FALSE, /* partial_inplace */
dc80fd5c 168 0x0, /* src_mask */
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169 0xffffffff, /* dst_mask */
170 FALSE), /* pcrel_offset */
171
172 HOWTO (R_CR16_NUM32a, /* type */
173 1, /* rightshift */
174 2, /* size */
175 32, /* bitsize */
176 FALSE, /* pc_relative */
177 0, /* bitpos */
178 complain_overflow_bitfield,/* complain_on_overflow */
179 bfd_elf_generic_reloc, /* special_function */
180 "R_CR16_NUM32a", /* name */
181 FALSE, /* partial_inplace */
dc80fd5c 182 0x0, /* src_mask */
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183 0xffffffff, /* dst_mask */
184 FALSE), /* pcrel_offset */
185
186 HOWTO (R_CR16_REGREL4, /* type */
187 0, /* rightshift */
188 0, /* size */
189 4, /* bitsize */
190 FALSE, /* pc_relative */
191 0, /* bitpos */
192 complain_overflow_bitfield,/* complain_on_overflow */
193 bfd_elf_generic_reloc, /* special_function */
194 "R_CR16_REGREL4", /* name */
195 FALSE, /* partial_inplace */
dc80fd5c 196 0x0, /* src_mask */
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197 0xf, /* dst_mask */
198 FALSE), /* pcrel_offset */
199
200 HOWTO (R_CR16_REGREL4a, /* type */
201 0, /* rightshift */
202 0, /* size */
203 4, /* bitsize */
204 FALSE, /* pc_relative */
205 0, /* bitpos */
206 complain_overflow_bitfield,/* complain_on_overflow */
207 bfd_elf_generic_reloc, /* special_function */
208 "R_CR16_REGREL4a", /* name */
209 FALSE, /* partial_inplace */
dc80fd5c 210 0x0, /* src_mask */
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211 0xf, /* dst_mask */
212 FALSE), /* pcrel_offset */
213
214 HOWTO (R_CR16_REGREL14, /* type */
215 0, /* rightshift */
216 1, /* size */
217 14, /* bitsize */
218 FALSE, /* pc_relative */
219 0, /* bitpos */
220 complain_overflow_bitfield,/* complain_on_overflow */
221 bfd_elf_generic_reloc, /* special_function */
222 "R_CR16_REGREL14", /* name */
223 FALSE, /* partial_inplace */
dc80fd5c 224 0x0, /* src_mask */
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225 0x3fff, /* dst_mask */
226 FALSE), /* pcrel_offset */
227
228 HOWTO (R_CR16_REGREL14a, /* type */
229 0, /* rightshift */
230 1, /* size */
231 14, /* bitsize */
232 FALSE, /* pc_relative */
233 0, /* bitpos */
234 complain_overflow_bitfield,/* complain_on_overflow */
235 bfd_elf_generic_reloc, /* special_function */
236 "R_CR16_REGREL14a", /* name */
237 FALSE, /* partial_inplace */
dc80fd5c 238 0x0, /* src_mask */
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239 0x3fff, /* dst_mask */
240 FALSE), /* pcrel_offset */
241
242 HOWTO (R_CR16_REGREL16, /* type */
243 0, /* rightshift */
244 1, /* size */
245 16, /* bitsize */
246 FALSE, /* pc_relative */
247 0, /* bitpos */
248 complain_overflow_bitfield,/* complain_on_overflow */
249 bfd_elf_generic_reloc, /* special_function */
250 "R_CR16_REGREL16", /* name */
251 FALSE, /* partial_inplace */
dc80fd5c 252 0x0, /* src_mask */
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253 0xffff, /* dst_mask */
254 FALSE), /* pcrel_offset */
255
256 HOWTO (R_CR16_REGREL20, /* type */
257 0, /* rightshift */
258 2, /* size */
259 20, /* bitsize */
260 FALSE, /* pc_relative */
261 0, /* bitpos */
262 complain_overflow_bitfield,/* complain_on_overflow */
263 bfd_elf_generic_reloc, /* special_function */
264 "R_CR16_REGREL20", /* name */
265 FALSE, /* partial_inplace */
dc80fd5c 266 0x0, /* src_mask */
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267 0xfffff, /* dst_mask */
268 FALSE), /* pcrel_offset */
269
270 HOWTO (R_CR16_REGREL20a, /* type */
271 0, /* rightshift */
272 2, /* size */
273 20, /* bitsize */
274 FALSE, /* pc_relative */
275 0, /* bitpos */
276 complain_overflow_bitfield,/* complain_on_overflow */
277 bfd_elf_generic_reloc, /* special_function */
278 "R_CR16_REGREL20a", /* name */
279 FALSE, /* partial_inplace */
dc80fd5c 280 0x0, /* src_mask */
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281 0xfffff, /* dst_mask */
282 FALSE), /* pcrel_offset */
283
284 HOWTO (R_CR16_ABS20, /* type */
285 0, /* rightshift */
286 2, /* size */
287 20, /* bitsize */
288 FALSE, /* pc_relative */
289 0, /* bitpos */
290 complain_overflow_bitfield,/* complain_on_overflow */
291 bfd_elf_generic_reloc, /* special_function */
292 "R_CR16_ABS20", /* name */
293 FALSE, /* partial_inplace */
dc80fd5c 294 0x0, /* src_mask */
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295 0xfffff, /* dst_mask */
296 FALSE), /* pcrel_offset */
297
298 HOWTO (R_CR16_ABS24, /* type */
299 0, /* rightshift */
300 2, /* size */
301 24, /* bitsize */
302 FALSE, /* pc_relative */
303 0, /* bitpos */
304 complain_overflow_bitfield,/* complain_on_overflow */
305 bfd_elf_generic_reloc, /* special_function */
306 "R_CR16_ABS24", /* name */
307 FALSE, /* partial_inplace */
dc80fd5c 308 0x0, /* src_mask */
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309 0xffffff, /* dst_mask */
310 FALSE), /* pcrel_offset */
311
312 HOWTO (R_CR16_IMM4, /* type */
313 0, /* rightshift */
314 0, /* size */
315 4, /* bitsize */
316 FALSE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_bitfield,/* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_CR16_IMM4", /* name */
321 FALSE, /* partial_inplace */
dc80fd5c 322 0x0, /* src_mask */
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323 0xf, /* dst_mask */
324 FALSE), /* pcrel_offset */
325
326 HOWTO (R_CR16_IMM8, /* type */
327 0, /* rightshift */
328 0, /* size */
329 8, /* bitsize */
330 FALSE, /* pc_relative */
331 0, /* bitpos */
332 complain_overflow_bitfield,/* complain_on_overflow */
333 bfd_elf_generic_reloc, /* special_function */
334 "R_CR16_IMM8", /* name */
335 FALSE, /* partial_inplace */
dc80fd5c 336 0x0, /* src_mask */
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337 0xff, /* dst_mask */
338 FALSE), /* pcrel_offset */
339
340 HOWTO (R_CR16_IMM16, /* type */
341 0, /* rightshift */
342 1, /* size */
343 16, /* bitsize */
344 FALSE, /* pc_relative */
345 0, /* bitpos */
346 complain_overflow_bitfield,/* complain_on_overflow */
347 bfd_elf_generic_reloc, /* special_function */
348 "R_CR16_IMM16", /* name */
349 FALSE, /* partial_inplace */
dc80fd5c 350 0x0, /* src_mask */
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351 0xffff, /* dst_mask */
352 FALSE), /* pcrel_offset */
353
354 HOWTO (R_CR16_IMM20, /* type */
355 0, /* rightshift */
356 2, /* size */
357 20, /* bitsize */
358 FALSE, /* pc_relative */
359 0, /* bitpos */
360 complain_overflow_bitfield,/* complain_on_overflow */
361 bfd_elf_generic_reloc, /* special_function */
362 "R_CR16_IMM20", /* name */
363 FALSE, /* partial_inplace */
dc80fd5c 364 0x0, /* src_mask */
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365 0xfffff, /* dst_mask */
366 FALSE), /* pcrel_offset */
367
368 HOWTO (R_CR16_IMM24, /* type */
369 0, /* rightshift */
370 2, /* size */
371 24, /* bitsize */
372 FALSE, /* pc_relative */
373 0, /* bitpos */
374 complain_overflow_bitfield,/* complain_on_overflow */
375 bfd_elf_generic_reloc, /* special_function */
376 "R_CR16_IMM24", /* name */
377 FALSE, /* partial_inplace */
dc80fd5c 378 0x0, /* src_mask */
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379 0xffffff, /* dst_mask */
380 FALSE), /* pcrel_offset */
381
382 HOWTO (R_CR16_IMM32, /* type */
383 0, /* rightshift */
384 2, /* size */
385 32, /* bitsize */
386 FALSE, /* pc_relative */
387 0, /* bitpos */
388 complain_overflow_bitfield,/* complain_on_overflow */
389 bfd_elf_generic_reloc, /* special_function */
390 "R_CR16_IMM32", /* name */
391 FALSE, /* partial_inplace */
dc80fd5c 392 0x0, /* src_mask */
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393 0xffffffff, /* dst_mask */
394 FALSE), /* pcrel_offset */
395
396 HOWTO (R_CR16_IMM32a, /* type */
397 1, /* rightshift */
398 2, /* size */
399 32, /* bitsize */
400 FALSE, /* pc_relative */
401 0, /* bitpos */
402 complain_overflow_bitfield,/* complain_on_overflow */
403 bfd_elf_generic_reloc, /* special_function */
404 "R_CR16_IMM32a", /* name */
405 FALSE, /* partial_inplace */
dc80fd5c 406 0x0, /* src_mask */
3d3d428f
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407 0xffffffff, /* dst_mask */
408 FALSE), /* pcrel_offset */
409
410 HOWTO (R_CR16_DISP4, /* type */
411 1, /* rightshift */
412 0, /* size (0 = byte, 1 = short, 2 = long) */
413 4, /* bitsize */
414 TRUE, /* pc_relative */
415 0, /* bitpos */
416 complain_overflow_unsigned, /* complain_on_overflow */
417 bfd_elf_generic_reloc, /* special_function */
418 "R_CR16_DISP4", /* name */
419 FALSE, /* partial_inplace */
dc80fd5c 420 0x0, /* src_mask */
3d3d428f
NC
421 0xf, /* dst_mask */
422 FALSE), /* pcrel_offset */
423
424 HOWTO (R_CR16_DISP8, /* type */
425 1, /* rightshift */
426 0, /* size (0 = byte, 1 = short, 2 = long) */
427 8, /* bitsize */
428 TRUE, /* pc_relative */
429 0, /* bitpos */
430 complain_overflow_unsigned, /* complain_on_overflow */
431 bfd_elf_generic_reloc, /* special_function */
432 "R_CR16_DISP8", /* name */
433 FALSE, /* partial_inplace */
dc80fd5c 434 0x0, /* src_mask */
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NC
435 0x1ff, /* dst_mask */
436 FALSE), /* pcrel_offset */
437
438 HOWTO (R_CR16_DISP16, /* type */
439 0, /* rightshift REVIITS: To sync with WinIDEA*/
440 1, /* size (0 = byte, 1 = short, 2 = long) */
441 16, /* bitsize */
442 TRUE, /* pc_relative */
443 0, /* bitpos */
444 complain_overflow_unsigned, /* complain_on_overflow */
445 bfd_elf_generic_reloc, /* special_function */
446 "R_CR16_DISP16", /* name */
447 FALSE, /* partial_inplace */
dc80fd5c 448 0x0, /* src_mask */
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NC
449 0x1ffff, /* dst_mask */
450 FALSE), /* pcrel_offset */
451 /* REVISIT: DISP24 should be left-shift by 2 as per ISA doc
452 but its not done, to sync with WinIDEA and CR16 4.1 tools */
453 HOWTO (R_CR16_DISP24, /* type */
454 0, /* rightshift */
455 2, /* size (0 = byte, 1 = short, 2 = long) */
456 24, /* bitsize */
457 TRUE, /* pc_relative */
458 0, /* bitpos */
459 complain_overflow_unsigned, /* complain_on_overflow */
460 bfd_elf_generic_reloc, /* special_function */
461 "R_CR16_DISP24", /* name */
462 FALSE, /* partial_inplace */
dc80fd5c 463 0x0, /* src_mask */
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NC
464 0x1ffffff, /* dst_mask */
465 FALSE), /* pcrel_offset */
466
467 HOWTO (R_CR16_DISP24a, /* type */
468 0, /* rightshift */
469 2, /* size (0 = byte, 1 = short, 2 = long) */
470 24, /* bitsize */
471 TRUE, /* pc_relative */
472 0, /* bitpos */
473 complain_overflow_unsigned, /* complain_on_overflow */
474 bfd_elf_generic_reloc, /* special_function */
475 "R_CR16_DISP24a", /* name */
476 FALSE, /* partial_inplace */
dc80fd5c 477 0x0, /* src_mask */
3d3d428f 478 0xffffff, /* dst_mask */
7fac7ff4
NC
479 FALSE), /* pcrel_offset */
480
481 /* An 8 bit switch table entry. This is generated for an expression
482 such as ``.byte L1 - L2''. The offset holds the difference
483 between the reloc address and L2. */
484 HOWTO (R_CR16_SWITCH8, /* type */
485 0, /* rightshift */
486 0, /* size (0 = byte, 1 = short, 2 = long) */
487 8, /* bitsize */
488 FALSE, /* pc_relative */
489 0, /* bitpos */
490 complain_overflow_unsigned, /* complain_on_overflow */
491 bfd_elf_generic_reloc, /* special_function */
492 "R_CR16_SWITCH8", /* name */
493 FALSE, /* partial_inplace */
dc80fd5c 494 0x0, /* src_mask */
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NC
495 0xff, /* dst_mask */
496 TRUE), /* pcrel_offset */
497
498 /* A 16 bit switch table entry. This is generated for an expression
499 such as ``.word L1 - L2''. The offset holds the difference
500 between the reloc address and L2. */
501 HOWTO (R_CR16_SWITCH16, /* type */
502 0, /* rightshift */
503 1, /* size (0 = byte, 1 = short, 2 = long) */
504 16, /* bitsize */
505 FALSE, /* pc_relative */
506 0, /* bitpos */
507 complain_overflow_unsigned, /* complain_on_overflow */
508 bfd_elf_generic_reloc, /* special_function */
509 "R_CR16_SWITCH16", /* name */
510 FALSE, /* partial_inplace */
dc80fd5c 511 0x0, /* src_mask */
7fac7ff4
NC
512 0xffff, /* dst_mask */
513 TRUE), /* pcrel_offset */
514
515 /* A 32 bit switch table entry. This is generated for an expression
516 such as ``.long L1 - L2''. The offset holds the difference
517 between the reloc address and L2. */
518 HOWTO (R_CR16_SWITCH32, /* type */
519 0, /* rightshift */
520 2, /* size (0 = byte, 1 = short, 2 = long) */
521 32, /* bitsize */
522 FALSE, /* pc_relative */
523 0, /* bitpos */
524 complain_overflow_unsigned, /* complain_on_overflow */
525 bfd_elf_generic_reloc, /* special_function */
526 "R_CR16_SWITCH32", /* name */
527 FALSE, /* partial_inplace */
dc80fd5c 528 0x0, /* src_mask */
7fac7ff4 529 0xffffffff, /* dst_mask */
99706f30
SR
530 TRUE), /* pcrel_offset */
531
532 HOWTO (R_CR16_GOT_REGREL20, /* type */
533 0, /* rightshift */
534 2, /* size */
535 20, /* bitsize */
536 FALSE, /* pc_relative */
537 0, /* bitpos */
538 complain_overflow_bitfield,/* complain_on_overflow */
539 bfd_elf_generic_reloc, /* special_function */
540 "R_CR16_GOT_REGREL20", /* name */
541 TRUE, /* partial_inplace */
542 0x0, /* src_mask */
543 0xfffff, /* dst_mask */
544 FALSE), /* pcrel_offset */
545
546 HOWTO (R_CR16_GOTC_REGREL20, /* type */
547 0, /* rightshift */
548 2, /* size */
549 20, /* bitsize */
550 FALSE, /* pc_relative */
551 0, /* bitpos */
552 complain_overflow_bitfield,/* complain_on_overflow */
553 bfd_elf_generic_reloc, /* special_function */
554 "R_CR16_GOTC_REGREL20", /* name */
555 TRUE, /* partial_inplace */
556 0x0, /* src_mask */
557 0xfffff, /* dst_mask */
558 FALSE), /* pcrel_offset */
559
560 HOWTO (R_CR16_GLOB_DAT, /* type */
561 0, /* rightshift */
562 2, /* size (0 = byte, 1 = short, 2 = long) */
563 32, /* bitsize */
564 FALSE, /* pc_relative */
565 0, /* bitpos */
566 complain_overflow_unsigned, /* complain_on_overflow */
567 bfd_elf_generic_reloc, /* special_function */
568 "R_CR16_GLOB_DAT", /* name */
569 FALSE, /* partial_inplace */
570 0x0, /* src_mask */
571 0xffffffff, /* dst_mask */
7fac7ff4 572 TRUE) /* pcrel_offset */
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NC
573};
574
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SR
575
576/* Create the GOT section. */
577
578static bfd_boolean
579_bfd_cr16_elf_create_got_section (bfd * abfd, struct bfd_link_info * info)
580{
581 flagword flags;
582 asection * s;
583 struct elf_link_hash_entry * h;
584 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
585 int ptralign;
586
587 /* This function may be called more than once. */
3d4d4302 588 if (bfd_get_linker_section (abfd, ".got") != NULL)
99706f30
SR
589 return TRUE;
590
591 switch (bed->s->arch_size)
592 {
593 case 16:
594 ptralign = 1;
595 break;
596
597 case 32:
598 ptralign = 2;
599 break;
600
601 default:
602 bfd_set_error (bfd_error_bad_value);
603 return FALSE;
604 }
605
606 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
607 | SEC_LINKER_CREATED);
608
3d4d4302 609 s = bfd_make_section_anyway_with_flags (abfd, ".got", flags);
99706f30
SR
610 if (s == NULL
611 || ! bfd_set_section_alignment (abfd, s, ptralign))
612 return FALSE;
613
614 if (bed->want_got_plt)
615 {
3d4d4302 616 s = bfd_make_section_anyway_with_flags (abfd, ".got.plt", flags);
99706f30
SR
617 if (s == NULL
618 || ! bfd_set_section_alignment (abfd, s, ptralign))
619 return FALSE;
620 }
621
622 /* Define the symbol _GLOBAL_OFFSET_TABLE_ at the start of the .got
623 (or .got.plt) section. We don't do this in the linker script
624 because we don't want to define the symbol if we are not creating
625 a global offset table. */
626 h = _bfd_elf_define_linkage_sym (abfd, info, s, "_GLOBAL_OFFSET_TABLE_");
627 elf_hash_table (info)->hgot = h;
628 if (h == NULL)
629 return FALSE;
630
631 /* The first bit of the global offset table is the header. */
632 s->size += bed->got_header_size;
633
634 return TRUE;
635}
636
637
3d3d428f
NC
638/* Retrieve a howto ptr using a BFD reloc_code. */
639
640static reloc_howto_type *
641elf_cr16_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
642 bfd_reloc_code_real_type code)
643{
644 unsigned int i;
645
646 for (i = 0; i < R_CR16_MAX; i++)
647 if (code == cr16_reloc_map[i].bfd_reloc_enum)
648 return &cr16_elf_howto_table[cr16_reloc_map[i].cr16_reloc_type];
649
650 _bfd_error_handler ("Unsupported CR16 relocation type: 0x%x\n", code);
651 return NULL;
652}
653
654static reloc_howto_type *
655elf_cr16_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
656 const char *r_name)
657{
658 unsigned int i;
659
660 for (i = 0; ARRAY_SIZE (cr16_elf_howto_table); i++)
661 if (cr16_elf_howto_table[i].name != NULL
662 && strcasecmp (cr16_elf_howto_table[i].name, r_name) == 0)
663 return cr16_elf_howto_table + i;
664
665 return NULL;
666}
667
668/* Retrieve a howto ptr using an internal relocation entry. */
669
670static void
671elf_cr16_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
672 Elf_Internal_Rela *dst)
673{
674 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
675
676 BFD_ASSERT (r_type < (unsigned int) R_CR16_MAX);
99706f30
SR
677 cache_ptr->howto = cr16_elf_howto_table + r_type;
678}
679
680/* Look through the relocs for a section during the first phase.
681 Since we don't do .gots or .plts, we just need to consider the
682 virtual table relocs for gc. */
683
684static bfd_boolean
685cr16_elf_check_relocs (bfd *abfd, struct bfd_link_info *info, asection *sec,
686 const Elf_Internal_Rela *relocs)
687{
688 Elf_Internal_Shdr *symtab_hdr;
689 Elf_Internal_Sym * isymbuf = NULL;
690 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
691 const Elf_Internal_Rela *rel;
692 const Elf_Internal_Rela *rel_end;
693 bfd * dynobj;
694 bfd_vma * local_got_offsets;
695 asection * sgot;
696 asection * srelgot;
697
698 sgot = NULL;
699 srelgot = NULL;
700 bfd_boolean result = FALSE;
701
702 if (info->relocatable)
703 return TRUE;
704
705 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
706 sym_hashes = elf_sym_hashes (abfd);
707 sym_hashes_end = sym_hashes + symtab_hdr->sh_size/sizeof (Elf32_External_Sym);
708 if (!elf_bad_symtab (abfd))
709 sym_hashes_end -= symtab_hdr->sh_info;
710
711 dynobj = elf_hash_table (info)->dynobj;
712 local_got_offsets = elf_local_got_offsets (abfd);
713 rel_end = relocs + sec->reloc_count;
714 for (rel = relocs; rel < rel_end; rel++)
715 {
716 struct elf_link_hash_entry *h;
717 unsigned long r_symndx;
718
719 r_symndx = ELF32_R_SYM (rel->r_info);
720 if (r_symndx < symtab_hdr->sh_info)
721 h = NULL;
722 else
723 {
724 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
725 while (h->root.type == bfd_link_hash_indirect
726 || h->root.type == bfd_link_hash_warning)
727 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM
728
729 /* PR15323, ref flags aren't set for references in the same
730 object. */
731 h->root.non_ir_ref = 1;
99706f30
SR
732 }
733
734 /* Some relocs require a global offset table. */
735 if (dynobj == NULL)
736 {
737 switch (ELF32_R_TYPE (rel->r_info))
738 {
739 case R_CR16_GOT_REGREL20:
740 case R_CR16_GOTC_REGREL20:
741 elf_hash_table (info)->dynobj = dynobj = abfd;
742 if (! _bfd_cr16_elf_create_got_section (dynobj, info))
743 goto fail;
744 break;
745
746 default:
747 break;
748 }
749 }
750
751 switch (ELF32_R_TYPE (rel->r_info))
752 {
753 case R_CR16_GOT_REGREL20:
754 case R_CR16_GOTC_REGREL20:
755 /* This symbol requires a global offset table entry. */
756
757 if (sgot == NULL)
758 {
3d4d4302 759 sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
760 BFD_ASSERT (sgot != NULL);
761 }
762
763 if (srelgot == NULL
764 && (h != NULL || info->executable))
765 {
3d4d4302 766 srelgot = bfd_get_linker_section (dynobj, ".rela.got");
99706f30 767 if (srelgot == NULL)
68ffbac6 768 {
3d4d4302
AM
769 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
770 | SEC_IN_MEMORY | SEC_LINKER_CREATED
771 | SEC_READONLY);
772 srelgot = bfd_make_section_anyway_with_flags (dynobj,
773 ".rela.got",
774 flags);
99706f30
SR
775 if (srelgot == NULL
776 || ! bfd_set_section_alignment (dynobj, srelgot, 2))
777 goto fail;
778 }
779 }
780
781 if (h != NULL)
782 {
783 if (h->got.offset != (bfd_vma) -1)
784 /* We have already allocated space in the .got. */
785 break;
786
787 h->got.offset = sgot->size;
788
789 /* Make sure this symbol is output as a dynamic symbol. */
790 if (h->dynindx == -1)
791 {
792 if (! bfd_elf_link_record_dynamic_symbol (info, h))
793 goto fail;
794 }
795
796 srelgot->size += sizeof (Elf32_External_Rela);
797 }
798 else
799 {
800 /* This is a global offset table entry for a local
801 symbol. */
802 if (local_got_offsets == NULL)
803 {
804 size_t size;
805 unsigned int i;
806
807 size = symtab_hdr->sh_info * sizeof (bfd_vma);
808 local_got_offsets = (bfd_vma *) bfd_alloc (abfd, size);
809
810 if (local_got_offsets == NULL)
811 goto fail;
812
813 elf_local_got_offsets (abfd) = local_got_offsets;
814
815 for (i = 0; i < symtab_hdr->sh_info; i++)
816 local_got_offsets[i] = (bfd_vma) -1;
817 }
818
819 if (local_got_offsets[r_symndx] != (bfd_vma) -1)
820 /* We have already allocated space in the .got. */
821 break;
822
823 local_got_offsets[r_symndx] = sgot->size;
824
825 if (info->executable)
826 /* If we are generating a shared object, we need to
827 output a R_CR16_RELATIVE reloc so that the dynamic
828 linker can adjust this GOT entry. */
829 srelgot->size += sizeof (Elf32_External_Rela);
830 }
831
832 sgot->size += 4;
833 break;
834
835 }
836 }
837
838 result = TRUE;
839 fail:
840 if (isymbuf != NULL)
841 free (isymbuf);
842
843 return result;
3d3d428f
NC
844}
845
846/* Perform a relocation as part of a final link. */
847
848static bfd_reloc_status_type
849cr16_elf_final_link_relocate (reloc_howto_type *howto,
7fac7ff4 850 bfd *input_bfd,
3d3d428f
NC
851 bfd *output_bfd ATTRIBUTE_UNUSED,
852 asection *input_section,
7fac7ff4 853 bfd_byte *contents,
3d3d428f 854 bfd_vma offset,
7fac7ff4
NC
855 bfd_vma Rvalue,
856 bfd_vma addend,
99706f30
SR
857 struct elf_link_hash_entry * h,
858 unsigned long symndx ATTRIBUTE_UNUSED,
3d3d428f
NC
859 struct bfd_link_info *info ATTRIBUTE_UNUSED,
860 asection *sec ATTRIBUTE_UNUSED,
861 int is_local ATTRIBUTE_UNUSED)
862{
863 unsigned short r_type = howto->type;
864 bfd_byte *hit_data = contents + offset;
865 bfd_vma reloc_bits, check, Rvalue1;
99706f30 866 bfd * dynobj;
99706f30
SR
867
868 dynobj = elf_hash_table (info)->dynobj;
99706f30 869
3d3d428f
NC
870 switch (r_type)
871 {
872 case R_CR16_IMM4:
7fac7ff4
NC
873 case R_CR16_IMM20:
874 case R_CR16_ABS20:
875 break;
876
3d3d428f
NC
877 case R_CR16_IMM8:
878 case R_CR16_IMM16:
3d3d428f
NC
879 case R_CR16_IMM32:
880 case R_CR16_IMM32a:
881 case R_CR16_REGREL4:
882 case R_CR16_REGREL4a:
883 case R_CR16_REGREL14:
884 case R_CR16_REGREL14a:
885 case R_CR16_REGREL16:
886 case R_CR16_REGREL20:
99706f30
SR
887 case R_CR16_REGREL20a:
888 case R_CR16_GOT_REGREL20:
889 case R_CR16_GOTC_REGREL20:
3d3d428f
NC
890 case R_CR16_ABS24:
891 case R_CR16_DISP16:
892 case R_CR16_DISP24:
893 /* 'hit_data' is relative to the start of the instruction, not the
894 relocation offset. Advance it to account for the exact offset. */
895 hit_data += 2;
896 break;
897
898 case R_CR16_NONE:
899 return bfd_reloc_ok;
900 break;
901
902 case R_CR16_DISP4:
7fac7ff4 903 if (is_local)
99706f30 904 Rvalue += -1;
7fac7ff4
NC
905 break;
906
3d3d428f
NC
907 case R_CR16_DISP8:
908 case R_CR16_DISP24a:
7fac7ff4 909 if (is_local)
99706f30 910 Rvalue -= -1;
7fac7ff4
NC
911 break;
912
913 case R_CR16_SWITCH8:
914 case R_CR16_SWITCH16:
915 case R_CR16_SWITCH32:
3d3d428f
NC
916 /* We only care about the addend, where the difference between
917 expressions is kept. */
7fac7ff4 918 Rvalue = 0;
68ffbac6 919
3d3d428f
NC
920 default:
921 break;
922 }
923
924 if (howto->pc_relative)
925 {
926 /* Subtract the address of the section containing the location. */
927 Rvalue -= (input_section->output_section->vma
928 + input_section->output_offset);
929 /* Subtract the position of the location within the section. */
930 Rvalue -= offset;
931 }
932
933 /* Add in supplied addend. */
934 Rvalue += addend;
935
936 /* Complain if the bitfield overflows, whether it is considered
937 as signed or unsigned. */
938 check = Rvalue >> howto->rightshift;
939
940 /* Assumes two's complement. This expression avoids
941 overflow if howto->bitsize is the number of bits in
942 bfd_vma. */
943 reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
944
99706f30
SR
945 /* For GOT and GOTC relocs no boundary checks applied. */
946 if (!((r_type == R_CR16_GOT_REGREL20)
947 || (r_type == R_CR16_GOTC_REGREL20)))
3d3d428f 948 {
99706f30
SR
949 if (((bfd_vma) check & ~reloc_bits) != 0
950 && (((bfd_vma) check & ~reloc_bits)
951 != (-(bfd_vma) 1 & ~reloc_bits)))
3d3d428f 952 {
99706f30
SR
953 /* The above right shift is incorrect for a signed
954 value. See if turning on the upper bits fixes the
955 overflow. */
956 if (howto->rightshift && (bfd_signed_vma) Rvalue < 0)
957 {
958 check |= ((bfd_vma) - 1
959 & ~((bfd_vma) - 1
960 >> howto->rightshift));
3d3d428f 961
99706f30
SR
962 if (((bfd_vma) check & ~reloc_bits)
963 != (-(bfd_vma) 1 & ~reloc_bits))
964 return bfd_reloc_overflow;
965 }
966 else
967 return bfd_reloc_overflow;
3d3d428f 968 }
3d3d428f 969
99706f30
SR
970 /* Drop unwanted bits from the value we are relocating to. */
971 Rvalue >>= (bfd_vma) howto->rightshift;
3d3d428f 972
99706f30
SR
973 /* Apply dst_mask to select only relocatable part of the insn. */
974 Rvalue &= howto->dst_mask;
975 }
3d3d428f
NC
976
977 switch (howto->size)
978 {
979 case 0:
7fac7ff4 980 if (r_type == R_CR16_DISP8)
3d3d428f
NC
981 {
982 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
983 Rvalue = ((Rvalue1 & 0xf000) | ((Rvalue << 4) & 0xf00)
7fac7ff4
NC
984 | (Rvalue1 & 0x00f0) | (Rvalue & 0xf));
985 bfd_put_16 (input_bfd, Rvalue, hit_data);
986 }
987 else if (r_type == R_CR16_IMM4)
988 {
989 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
990 Rvalue = (((Rvalue1 & 0xff) << 8) | ((Rvalue << 4) & 0xf0)
991 | ((Rvalue1 & 0x0f00) >> 8));
992 bfd_put_16 (input_bfd, Rvalue, hit_data);
993 }
994 else if (r_type == R_CR16_DISP4)
995 {
996 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
997 Rvalue = (Rvalue1 | ((Rvalue & 0xf) << 4));
998 bfd_put_16 (input_bfd, Rvalue, hit_data);
999 }
99706f30 1000 else
7fac7ff4
NC
1001 {
1002 bfd_put_8 (input_bfd, (unsigned char) Rvalue, hit_data);
3d3d428f
NC
1003 }
1004 break;
1005
1006 case 1:
1007 if (r_type == R_CR16_DISP16)
1008 {
1009 Rvalue |= (bfd_get_16 (input_bfd, hit_data));
1010 Rvalue = ((Rvalue & 0xfffe) | ((Rvalue >> 16) & 0x1));
3d3d428f 1011 }
99706f30
SR
1012 if (r_type == R_CR16_IMM16)
1013 {
1014 Rvalue1 = bfd_get_16 (input_bfd, hit_data);
1015
1016 /* Add or subtract the offset value. */
1017 if (Rvalue1 & 0x8000)
1018 Rvalue -= (~Rvalue1 + 1) & 0xffff;
1019 else
1020 Rvalue += Rvalue1;
1021
1022 /* Check for range. */
1023 if ((long) Rvalue > 0xffff || (long) Rvalue < 0x0)
1024 return bfd_reloc_overflow;
1025 }
7fac7ff4 1026
99706f30 1027 bfd_put_16 (input_bfd, Rvalue, hit_data);
3d3d428f
NC
1028 break;
1029
1030 case 2:
7fac7ff4 1031 if ((r_type == R_CR16_ABS20) || (r_type == R_CR16_IMM20))
3d3d428f 1032 {
99706f30
SR
1033 Rvalue1 = (bfd_get_16 (input_bfd, hit_data + 2)
1034 | (((bfd_get_16 (input_bfd, hit_data) & 0xf) <<16)));
1035
1036 /* Add or subtract the offset value. */
1037 if (Rvalue1 & 0x80000)
1038 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1039 else
1040 Rvalue += Rvalue1;
1041
1042 /* Check for range. */
1043 if ((long) Rvalue > 0xfffff || (long) Rvalue < 0x0)
1044 return bfd_reloc_overflow;
1045
1046 bfd_put_16 (input_bfd, ((bfd_get_16 (input_bfd, hit_data) & 0xfff0)
1047 | ((Rvalue >> 16) & 0xf)), hit_data);
1048 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1049 }
68ffbac6 1050 else if (r_type == R_CR16_GOT_REGREL20)
99706f30 1051 {
3d4d4302 1052 asection * sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
1053
1054 if (h != NULL)
1055 {
1056 bfd_vma off;
1057
1058 off = h->got.offset;
1059 BFD_ASSERT (off != (bfd_vma) -1);
1060
1061 if (! elf_hash_table (info)->dynamic_sections_created
1062 || SYMBOL_REFERENCES_LOCAL (info, h))
1063 /* This is actually a static link, or it is a
1064 -Bsymbolic link and the symbol is defined
1065 locally, or the symbol was forced to be local
1066 because of a version file. We must initialize
68ffbac6 1067 this entry in the global offset table.
99706f30
SR
1068 When doing a dynamic link, we create a .rela.got
1069 relocation entry to initialize the value. This
1070 is done in the finish_dynamic_symbol routine. */
1071 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1072
1073 Rvalue = sgot->output_offset + off;
1074 }
1075 else
1076 {
1077 bfd_vma off;
1078
1079 off = elf_local_got_offsets (input_bfd)[symndx];
1080 bfd_put_32 (output_bfd,Rvalue, sgot->contents + off);
1081
1082 Rvalue = sgot->output_offset + off;
1083 }
1084
1085 Rvalue += addend;
1086
68ffbac6 1087 /* REVISIT: if ((long) Rvalue > 0xffffff ||
99706f30
SR
1088 (long) Rvalue < -0x800000). */
1089 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
1090 return bfd_reloc_overflow;
1091
1092
1093 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
1094 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
1095 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
1096
1097 }
1098 else if (r_type == R_CR16_GOTC_REGREL20)
1099 {
1100 asection * sgot;
3d4d4302 1101 sgot = bfd_get_linker_section (dynobj, ".got");
99706f30
SR
1102
1103 if (h != NULL)
1104 {
1105 bfd_vma off;
1106
1107 off = h->got.offset;
1108 BFD_ASSERT (off != (bfd_vma) -1);
1109
1110 Rvalue >>=1; /* For code symbols. */
1111
1112 if (! elf_hash_table (info)->dynamic_sections_created
1113 || SYMBOL_REFERENCES_LOCAL (info, h))
1114 /* This is actually a static link, or it is a
1115 -Bsymbolic link and the symbol is defined
1116 locally, or the symbol was forced to be local
1117 because of a version file. We must initialize
68ffbac6 1118 this entry in the global offset table.
99706f30
SR
1119 When doing a dynamic link, we create a .rela.got
1120 relocation entry to initialize the value. This
1121 is done in the finish_dynamic_symbol routine. */
1122 bfd_put_32 (output_bfd, Rvalue, sgot->contents + off);
1123
1124 Rvalue = sgot->output_offset + off;
1125 }
1126 else
1127 {
1128 bfd_vma off;
1129
1130 off = elf_local_got_offsets (input_bfd)[symndx];
1131 Rvalue >>= 1;
1132 bfd_put_32 (output_bfd,Rvalue, sgot->contents + off);
1133 Rvalue = sgot->output_offset + off;
1134 }
1135
1136 Rvalue += addend;
1137
1138 /* Check if any value in DISP. */
1139 Rvalue1 =((bfd_get_32 (input_bfd, hit_data) >>16)
1140 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16));
1141
1142 /* Add or subtract the offset value. */
1143 if (Rvalue1 & 0x80000)
1144 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1145 else
1146 Rvalue += Rvalue1;
1147
1148 /* Check for range. */
68ffbac6 1149 /* REVISIT: if ((long) Rvalue > 0xffffff
99706f30
SR
1150 || (long) Rvalue < -0x800000). */
1151 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0)
1152 return bfd_reloc_overflow;
1153
7fac7ff4 1154 bfd_put_16 (input_bfd, (bfd_get_16 (input_bfd, hit_data))
99706f30 1155 | (((Rvalue >> 16) & 0xf) << 8), hit_data);
7fac7ff4 1156 bfd_put_16 (input_bfd, (Rvalue) & 0xffff, hit_data + 2);
3d3d428f 1157 }
99706f30 1158 else
3d3d428f 1159 {
99706f30
SR
1160 if (r_type == R_CR16_ABS24)
1161 {
1162 Rvalue1 = ((bfd_get_32 (input_bfd, hit_data) >> 16)
1163 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16)
1164 | (((bfd_get_32 (input_bfd, hit_data) & 0xf) <<20)));
1165
1166 /* Add or subtract the offset value. */
1167 if (Rvalue1 & 0x800000)
1168 Rvalue -= (~Rvalue1 + 1) & 0xffffff;
1169 else
1170 Rvalue += Rvalue1;
1171
1172 /* Check for Range. */
1173 if ((long) Rvalue > 0xffffff || (long) Rvalue < 0x0)
1174 return bfd_reloc_overflow;
1175
1176 Rvalue = ((((Rvalue >> 20) & 0xf) | (((Rvalue >> 16) & 0xf)<<8)
1177 | (bfd_get_32 (input_bfd, hit_data) & 0xf0f0))
1178 | ((Rvalue & 0xffff) << 16));
1179 }
1180 else if (r_type == R_CR16_DISP24)
1181 {
1182 Rvalue = ((((Rvalue >> 20)& 0xf) | (((Rvalue >>16) & 0xf)<<8)
1183 | (bfd_get_16 (input_bfd, hit_data)))
1184 | (((Rvalue & 0xfffe) | ((Rvalue >> 24) & 0x1)) << 16));
1185 }
1186 else if ((r_type == R_CR16_IMM32) || (r_type == R_CR16_IMM32a))
1187 {
1188 Rvalue1 =((((bfd_get_32 (input_bfd, hit_data)) >> 16) &0xffff)
1189 | (((bfd_get_32 (input_bfd, hit_data)) &0xffff)) << 16);
1190
1191 /* Add or subtract the offset value. */
1192 if (Rvalue1 & 0x80000000)
1193 Rvalue -= (~Rvalue1 + 1) & 0xffffffff;
1194 else
1195 Rvalue += Rvalue1;
1196
1197 /* Check for range. */
1198 if (Rvalue > 0xffffffff || (long) Rvalue < 0x0)
1199 return bfd_reloc_overflow;
1200
1201 Rvalue = (((Rvalue >> 16)& 0xffff) | (Rvalue & 0xffff) << 16);
1202 }
1203 else if (r_type == R_CR16_DISP24a)
1204 {
1205 Rvalue = (((Rvalue & 0xfffffe) | (Rvalue >> 23)));
1206 Rvalue = ((Rvalue >> 16) & 0xff) | ((Rvalue & 0xffff) << 16)
1207 | (bfd_get_32 (input_bfd, hit_data));
1208 }
1209 else if ((r_type == R_CR16_REGREL20)
1210 || (r_type == R_CR16_REGREL20a))
1211 {
1212 Rvalue1 = ((bfd_get_32 (input_bfd, hit_data) >> 16)
1213 | (((bfd_get_32 (input_bfd, hit_data) & 0xfff) >> 8) <<16));
1214 /* Add or subtract the offset value. */
1215 if (Rvalue1 & 0x80000)
1216 Rvalue -= (~Rvalue1 + 1) & 0xfffff;
1217 else
1218 Rvalue += Rvalue1;
1219
1220 /* Check for range. */
1221 if ((long) Rvalue > 0xfffff || (long) Rvalue < 0x0)
1222 return bfd_reloc_overflow;
3d3d428f 1223
99706f30
SR
1224 Rvalue = (((((Rvalue >> 20)& 0xf) | (((Rvalue >>16) & 0xf)<<8)
1225 | ((Rvalue & 0xffff) << 16)))
1226 | (bfd_get_32 (input_bfd, hit_data) & 0xf0ff));
1227
1228 }
86514226
SR
1229 else if (r_type == R_CR16_NUM32)
1230 {
68ffbac6 1231 Rvalue1 = (bfd_get_32 (input_bfd, hit_data));
86514226
SR
1232
1233 /* Add or subtract the offset value */
1234 if (Rvalue1 & 0x80000000)
1235 Rvalue -= (~Rvalue1 + 1) & 0xffffffff;
1236 else
1237 Rvalue += Rvalue1;
1238
1239 /* Check for Ranga */
1240 if (Rvalue > 0xffffffff)
1241 return bfd_reloc_overflow;
1242 }
1243
3d3d428f
NC
1244 bfd_put_32 (input_bfd, Rvalue, hit_data);
1245 }
7fac7ff4 1246 break;
3d3d428f
NC
1247
1248 default:
1249 return bfd_reloc_notsupported;
1250 }
1251
1252 return bfd_reloc_ok;
1253}
1254
1255/* Delete some bytes from a section while relaxing. */
1256
1257static bfd_boolean
1258elf32_cr16_relax_delete_bytes (struct bfd_link_info *link_info, bfd *abfd,
1259 asection *sec, bfd_vma addr, int count)
1260{
1261 Elf_Internal_Shdr *symtab_hdr;
1262 unsigned int sec_shndx;
1263 bfd_byte *contents;
1264 Elf_Internal_Rela *irel, *irelend;
3d3d428f
NC
1265 bfd_vma toaddr;
1266 Elf_Internal_Sym *isym;
1267 Elf_Internal_Sym *isymend;
1268 struct elf_link_hash_entry **sym_hashes;
1269 struct elf_link_hash_entry **end_hashes;
1270 struct elf_link_hash_entry **start_hashes;
1271 unsigned int symcount;
1272
1273 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1274
1275 contents = elf_section_data (sec)->this_hdr.contents;
1276
3d3d428f
NC
1277 toaddr = sec->size;
1278
1279 irel = elf_section_data (sec)->relocs;
1280 irelend = irel + sec->reloc_count;
1281
1282 /* Actually delete the bytes. */
1283 memmove (contents + addr, contents + addr + count,
1284 (size_t) (toaddr - addr - count));
1285 sec->size -= count;
1286
1287 /* Adjust all the relocs. */
1288 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1289 /* Get the new reloc address. */
1290 if ((irel->r_offset > addr && irel->r_offset < toaddr))
7fac7ff4 1291 irel->r_offset -= count;
3d3d428f
NC
1292
1293 /* Adjust the local symbols defined in this section. */
1294 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1295 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1296 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
1297 {
1298 if (isym->st_shndx == sec_shndx
1299 && isym->st_value > addr
1300 && isym->st_value < toaddr)
1301 {
1302 /* Adjust the addend of SWITCH relocations in this section,
1303 which reference this local symbol. */
99706f30 1304#if 0
3d3d428f
NC
1305 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1306 {
1307 unsigned long r_symndx;
1308 Elf_Internal_Sym *rsym;
1309 bfd_vma addsym, subsym;
1310
7fac7ff4
NC
1311 /* Skip if not a SWITCH relocation. */
1312 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH8
99706f30
SR
1313 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH16
1314 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_SWITCH32)
1315 continue;
68ffbac6 1316
3d3d428f
NC
1317 r_symndx = ELF32_R_SYM (irel->r_info);
1318 rsym = (Elf_Internal_Sym *) symtab_hdr->contents + r_symndx;
1319
1320 /* Skip if not the local adjusted symbol. */
1321 if (rsym != isym)
1322 continue;
1323
1324 addsym = isym->st_value;
1325 subsym = addsym - irel->r_addend;
1326
1327 /* Fix the addend only when -->> (addsym > addr >= subsym). */
1328 if (subsym <= addr)
1329 irel->r_addend -= count;
1330 else
1331 continue;
1332 }
99706f30 1333#endif
3d3d428f
NC
1334
1335 isym->st_value -= count;
1336 }
1337 }
1338
1339 /* Now adjust the global symbols defined in this section. */
1340 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1341 - symtab_hdr->sh_info);
1342 sym_hashes = start_hashes = elf_sym_hashes (abfd);
1343 end_hashes = sym_hashes + symcount;
1344
1345 for (; sym_hashes < end_hashes; sym_hashes++)
1346 {
1347 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1348
1349 /* The '--wrap SYMBOL' option is causing a pain when the object file,
1350 containing the definition of __wrap_SYMBOL, includes a direct
1351 call to SYMBOL as well. Since both __wrap_SYMBOL and SYMBOL reference
1352 the same symbol (which is __wrap_SYMBOL), but still exist as two
1353 different symbols in 'sym_hashes', we don't want to adjust
1354 the global symbol __wrap_SYMBOL twice.
1355 This check is only relevant when symbols are being wrapped. */
1356 if (link_info->wrap_hash != NULL)
1357 {
1358 struct elf_link_hash_entry **cur_sym_hashes;
1359
1360 /* Loop only over the symbols whom been already checked. */
1361 for (cur_sym_hashes = start_hashes; cur_sym_hashes < sym_hashes;
1362 cur_sym_hashes++)
7fac7ff4
NC
1363 /* If the current symbol is identical to 'sym_hash', that means
1364 the symbol was already adjusted (or at least checked). */
1365 if (*cur_sym_hashes == sym_hash)
1366 break;
3d3d428f
NC
1367
1368 /* Don't adjust the symbol again. */
1369 if (cur_sym_hashes < sym_hashes)
1370 continue;
1371 }
1372
1373 if ((sym_hash->root.type == bfd_link_hash_defined
1374 || sym_hash->root.type == bfd_link_hash_defweak)
1375 && sym_hash->root.u.def.section == sec
1376 && sym_hash->root.u.def.value > addr
1377 && sym_hash->root.u.def.value < toaddr)
1378 sym_hash->root.u.def.value -= count;
1379 }
1380
1381 return TRUE;
1382}
1383
1384/* Relocate a CR16 ELF section. */
1385
1386static bfd_boolean
1387elf32_cr16_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
99706f30
SR
1388 bfd *input_bfd, asection *input_section,
1389 bfd_byte *contents, Elf_Internal_Rela *relocs,
1390 Elf_Internal_Sym *local_syms,
1391 asection **local_sections)
3d3d428f
NC
1392{
1393 Elf_Internal_Shdr *symtab_hdr;
1394 struct elf_link_hash_entry **sym_hashes;
1395 Elf_Internal_Rela *rel, *relend;
1396
3d3d428f
NC
1397 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1398 sym_hashes = elf_sym_hashes (input_bfd);
1399
1400 rel = relocs;
1401 relend = relocs + input_section->reloc_count;
1402 for (; rel < relend; rel++)
1403 {
1404 int r_type;
1405 reloc_howto_type *howto;
1406 unsigned long r_symndx;
1407 Elf_Internal_Sym *sym;
1408 asection *sec;
1409 struct elf_link_hash_entry *h;
1410 bfd_vma relocation;
1411 bfd_reloc_status_type r;
1412
1413 r_symndx = ELF32_R_SYM (rel->r_info);
1414 r_type = ELF32_R_TYPE (rel->r_info);
1415 howto = cr16_elf_howto_table + (r_type);
1416
1417 h = NULL;
1418 sym = NULL;
1419 sec = NULL;
1420 if (r_symndx < symtab_hdr->sh_info)
1421 {
1422 sym = local_syms + r_symndx;
1423 sec = local_sections[r_symndx];
1424 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
1425 }
1426 else
1427 {
62d887d4 1428 bfd_boolean unresolved_reloc, warned, ignored;
3d3d428f
NC
1429
1430 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
1431 r_symndx, symtab_hdr, sym_hashes,
1432 h, sec, relocation,
62d887d4 1433 unresolved_reloc, warned, ignored);
3d3d428f
NC
1434 }
1435
dbaa2011 1436 if (sec != NULL && discarded_section (sec))
e4067dbb 1437 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 1438 rel, 1, relend, howto, 0, contents);
1004c3e1
SR
1439
1440 if (info->relocatable)
1441 continue;
1442
3d3d428f
NC
1443 r = cr16_elf_final_link_relocate (howto, input_bfd, output_bfd,
1444 input_section,
1445 contents, rel->r_offset,
1446 relocation, rel->r_addend,
99706f30
SR
1447 (struct elf_link_hash_entry *) h,
1448 r_symndx,
3d3d428f
NC
1449 info, sec, h == NULL);
1450
1451 if (r != bfd_reloc_ok)
1452 {
1453 const char *name;
1454 const char *msg = NULL;
1455
1456 if (h != NULL)
1457 name = h->root.root.string;
1458 else
1459 {
1460 name = (bfd_elf_string_from_elf_section
1461 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1462 if (name == NULL || *name == '\0')
1463 name = bfd_section_name (input_bfd, sec);
1464 }
1465
1466 switch (r)
1467 {
1468 case bfd_reloc_overflow:
1469 if (!((*info->callbacks->reloc_overflow)
1470 (info, (h ? &h->root : NULL), name, howto->name,
1471 (bfd_vma) 0, input_bfd, input_section,
1472 rel->r_offset)))
99706f30 1473 return FALSE;
3d3d428f
NC
1474 break;
1475
1476 case bfd_reloc_undefined:
1477 if (!((*info->callbacks->undefined_symbol)
1478 (info, name, input_bfd, input_section,
1479 rel->r_offset, TRUE)))
1480 return FALSE;
1481 break;
1482
1483 case bfd_reloc_outofrange:
1484 msg = _("internal error: out of range error");
1485 goto common_error;
1486
1487 case bfd_reloc_notsupported:
1488 msg = _("internal error: unsupported relocation error");
1489 goto common_error;
1490
1491 case bfd_reloc_dangerous:
1492 msg = _("internal error: dangerous error");
1493 goto common_error;
1494
1495 default:
1496 msg = _("internal error: unknown error");
1497 /* Fall through. */
1498
1499 common_error:
1500 if (!((*info->callbacks->warning)
1501 (info, msg, name, input_bfd, input_section,
1502 rel->r_offset)))
1503 return FALSE;
1504 break;
1505 }
1506 }
1507 }
1508
1509 return TRUE;
1510}
1511
1512/* This is a version of bfd_generic_get_relocated_section_contents
1513 which uses elf32_cr16_relocate_section. */
1514
1515static bfd_byte *
1516elf32_cr16_get_relocated_section_contents (bfd *output_bfd,
1517 struct bfd_link_info *link_info,
1518 struct bfd_link_order *link_order,
1519 bfd_byte *data,
1520 bfd_boolean relocatable,
1521 asymbol **symbols)
1522{
1523 Elf_Internal_Shdr *symtab_hdr;
1524 asection *input_section = link_order->u.indirect.section;
1525 bfd *input_bfd = input_section->owner;
1526 asection **sections = NULL;
1527 Elf_Internal_Rela *internal_relocs = NULL;
1528 Elf_Internal_Sym *isymbuf = NULL;
1529
1530 /* We only need to handle the case of relaxing, or of having a
1531 particular set of section contents, specially. */
1532 if (relocatable
1533 || elf_section_data (input_section)->this_hdr.contents == NULL)
1534 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1535 link_order, data,
1536 relocatable,
1537 symbols);
1538
1539 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1540
1541 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
1542 (size_t) input_section->size);
1543
1544 if ((input_section->flags & SEC_RELOC) != 0
1545 && input_section->reloc_count > 0)
1546 {
1547 Elf_Internal_Sym *isym;
1548 Elf_Internal_Sym *isymend;
1549 asection **secpp;
1550 bfd_size_type amt;
1551
1552 internal_relocs = _bfd_elf_link_read_relocs (input_bfd, input_section,
7fac7ff4 1553 NULL, NULL, FALSE);
3d3d428f
NC
1554 if (internal_relocs == NULL)
1555 goto error_return;
1556
1557 if (symtab_hdr->sh_info != 0)
1558 {
1559 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1560 if (isymbuf == NULL)
1561 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1562 symtab_hdr->sh_info, 0,
1563 NULL, NULL, NULL);
1564 if (isymbuf == NULL)
1565 goto error_return;
1566 }
1567
1568 amt = symtab_hdr->sh_info;
1569 amt *= sizeof (asection *);
1570 sections = bfd_malloc (amt);
1571 if (sections == NULL && amt != 0)
1572 goto error_return;
1573
1574 isymend = isymbuf + symtab_hdr->sh_info;
1575 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
1576 {
1577 asection *isec;
1578
1579 if (isym->st_shndx == SHN_UNDEF)
1580 isec = bfd_und_section_ptr;
1581 else if (isym->st_shndx == SHN_ABS)
1582 isec = bfd_abs_section_ptr;
1583 else if (isym->st_shndx == SHN_COMMON)
1584 isec = bfd_com_section_ptr;
1585 else
1586 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
1587
1588 *secpp = isec;
1589 }
1590
1591 if (! elf32_cr16_relocate_section (output_bfd, link_info, input_bfd,
1592 input_section, data, internal_relocs,
1593 isymbuf, sections))
1594 goto error_return;
1595
1596 if (sections != NULL)
1597 free (sections);
1598 if (isymbuf != NULL
1599 && symtab_hdr->contents != (unsigned char *) isymbuf)
1600 free (isymbuf);
1601 if (elf_section_data (input_section)->relocs != internal_relocs)
1602 free (internal_relocs);
1603 }
1604
1605 return data;
1606
1607 error_return:
1608 if (sections != NULL)
1609 free (sections);
1610 if (isymbuf != NULL
1611 && symtab_hdr->contents != (unsigned char *) isymbuf)
1612 free (isymbuf);
1613 if (internal_relocs != NULL
1614 && elf_section_data (input_section)->relocs != internal_relocs)
1615 free (internal_relocs);
1616 return NULL;
1617}
1618
99706f30
SR
1619/* Assorted hash table functions. */
1620
1621/* Initialize an entry in the link hash table. */
1622
1623/* Create an entry in an CR16 ELF linker hash table. */
1624
1625static struct bfd_hash_entry *
1626elf32_cr16_link_hash_newfunc (struct bfd_hash_entry *entry,
1627 struct bfd_hash_table *table,
1628 const char *string)
1629{
1630 struct elf32_cr16_link_hash_entry *ret =
1631 (struct elf32_cr16_link_hash_entry *) entry;
1632
1633 /* Allocate the structure if it has not already been allocated by a
1634 subclass. */
1635 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1636 ret = ((struct elf32_cr16_link_hash_entry *)
1637 bfd_hash_allocate (table,
1638 sizeof (struct elf32_cr16_link_hash_entry)));
1639 if (ret == (struct elf32_cr16_link_hash_entry *) NULL)
1640 return (struct bfd_hash_entry *) ret;
1641
1642 /* Call the allocation method of the superclass. */
1643 ret = ((struct elf32_cr16_link_hash_entry *)
1644 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret,
1645 table, string));
1646 if (ret != (struct elf32_cr16_link_hash_entry *) NULL)
1647 {
1648 ret->direct_calls = 0;
1649 ret->stack_size = 0;
1650 ret->movm_args = 0;
1651 ret->movm_stack_size = 0;
1652 ret->flags = 0;
1653 ret->value = 0;
1654 }
1655
1656 return (struct bfd_hash_entry *) ret;
1657}
1658
1659/* Create an cr16 ELF linker hash table. */
1660
1661static struct bfd_link_hash_table *
1662elf32_cr16_link_hash_table_create (bfd *abfd)
1663{
4dfe6ac6
NC
1664 struct elf_link_hash_table *ret;
1665 bfd_size_type amt = sizeof (struct elf_link_hash_table);
99706f30 1666
7bf52ea2 1667 ret = (struct elf_link_hash_table *) bfd_zmalloc (amt);
4dfe6ac6 1668 if (ret == (struct elf_link_hash_table *) NULL)
99706f30
SR
1669 return NULL;
1670
4dfe6ac6 1671 if (!_bfd_elf_link_hash_table_init (ret, abfd,
99706f30 1672 elf32_cr16_link_hash_newfunc,
4dfe6ac6
NC
1673 sizeof (struct elf32_cr16_link_hash_entry),
1674 GENERIC_ELF_DATA))
99706f30
SR
1675 {
1676 free (ret);
1677 return NULL;
1678 }
1679
4dfe6ac6 1680 return &ret->root;
99706f30
SR
1681}
1682
99706f30
SR
1683static unsigned long
1684elf_cr16_mach (flagword flags)
1685{
1686 switch (flags)
1687 {
1688 case EM_CR16:
1689 default:
1690 return bfd_mach_cr16;
1691 }
1692}
1693
1694/* The final processing done just before writing out a CR16 ELF object
1695 file. This gets the CR16 architecture right based on the machine
1696 number. */
1697
1698static void
1699_bfd_cr16_elf_final_write_processing (bfd *abfd,
1700 bfd_boolean linker ATTRIBUTE_UNUSED)
1701{
1702 unsigned long val;
1703 switch (bfd_get_mach (abfd))
1704 {
1705 default:
1706 case bfd_mach_cr16:
1707 val = EM_CR16;
1708 break;
1709 }
1710
1711
1712 elf_elfheader (abfd)->e_flags |= val;
1713}
1714
1715
1716static bfd_boolean
1717_bfd_cr16_elf_object_p (bfd *abfd)
1718{
1719 bfd_default_set_arch_mach (abfd, bfd_arch_cr16,
1720 elf_cr16_mach (elf_elfheader (abfd)->e_flags));
1721 return TRUE;
1722}
1723
1724/* Merge backend specific data from an object file to the output
1725 object file when linking. */
1726
1727static bfd_boolean
1728_bfd_cr16_elf_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
1729{
1730 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1731 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
1732 return TRUE;
1733
1734 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1735 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
1736 {
1737 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
1738 bfd_get_mach (ibfd)))
1739 return FALSE;
1740 }
1741
1742 return TRUE;
1743}
1744
1745
3d3d428f
NC
1746/* This function handles relaxing for the CR16.
1747
1748 There's quite a few relaxing opportunites available on the CR16:
1749
99706f30
SR
1750 * bcond:24 -> bcond:16 1 byte
1751 * bcond:16 -> bcond:8 1 byte
1752 * arithmetic imm32 -> arithmetic imm20 12 bits
1753 * arithmetic imm20/imm16 -> arithmetic imm4 12/16 bits
3d3d428f
NC
1754
1755 Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
1756
1757static bfd_boolean
1758elf32_cr16_relax_section (bfd *abfd, asection *sec,
99706f30 1759 struct bfd_link_info *link_info, bfd_boolean *again)
3d3d428f
NC
1760{
1761 Elf_Internal_Shdr *symtab_hdr;
1762 Elf_Internal_Rela *internal_relocs;
1763 Elf_Internal_Rela *irel, *irelend;
1764 bfd_byte *contents = NULL;
1765 Elf_Internal_Sym *isymbuf = NULL;
1766
1767 /* Assume nothing changes. */
1768 *again = FALSE;
1769
1770 /* We don't have to do anything for a relocatable link, if
1771 this section does not have relocs, or if this is not a
1772 code section. */
1773 if (link_info->relocatable
1774 || (sec->flags & SEC_RELOC) == 0
1775 || sec->reloc_count == 0
1776 || (sec->flags & SEC_CODE) == 0)
1777 return TRUE;
1778
1779 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1780
1781 /* Get a copy of the native relocations. */
1782 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
7fac7ff4 1783 link_info->keep_memory);
3d3d428f
NC
1784 if (internal_relocs == NULL)
1785 goto error_return;
1786
1787 /* Walk through them looking for relaxing opportunities. */
1788 irelend = internal_relocs + sec->reloc_count;
1789 for (irel = internal_relocs; irel < irelend; irel++)
1790 {
1791 bfd_vma symval;
1792
1793 /* If this isn't something that can be relaxed, then ignore
1794 this reloc. */
1795 if (ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP16
7fac7ff4
NC
1796 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_DISP24
1797 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM32
1798 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM20
1799 && ELF32_R_TYPE (irel->r_info) != (int) R_CR16_IMM16)
3d3d428f
NC
1800 continue;
1801
1802 /* Get the section contents if we haven't done so already. */
1803 if (contents == NULL)
1804 {
1805 /* Get cached copy if it exists. */
1806 if (elf_section_data (sec)->this_hdr.contents != NULL)
1807 contents = elf_section_data (sec)->this_hdr.contents;
1808 /* Go get them off disk. */
1809 else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
1810 goto error_return;
1811 }
1812
1813 /* Read this BFD's local symbols if we haven't done so already. */
1814 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
1815 {
1816 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1817 if (isymbuf == NULL)
1818 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1819 symtab_hdr->sh_info, 0,
1820 NULL, NULL, NULL);
1821 if (isymbuf == NULL)
1822 goto error_return;
1823 }
1824
1825 /* Get the value of the symbol referred to by the reloc. */
1826 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
1827 {
1828 /* A local symbol. */
1829 Elf_Internal_Sym *isym;
1830 asection *sym_sec;
1831
1832 isym = isymbuf + ELF32_R_SYM (irel->r_info);
1833 if (isym->st_shndx == SHN_UNDEF)
1834 sym_sec = bfd_und_section_ptr;
1835 else if (isym->st_shndx == SHN_ABS)
1836 sym_sec = bfd_abs_section_ptr;
1837 else if (isym->st_shndx == SHN_COMMON)
1838 sym_sec = bfd_com_section_ptr;
1839 else
1840 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
1841 symval = (isym->st_value
1842 + sym_sec->output_section->vma
1843 + sym_sec->output_offset);
1844 }
1845 else
1846 {
1847 unsigned long indx;
1848 struct elf_link_hash_entry *h;
1849
1850 /* An external symbol. */
1851 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
1852 h = elf_sym_hashes (abfd)[indx];
1853 BFD_ASSERT (h != NULL);
1854
1855 if (h->root.type != bfd_link_hash_defined
1856 && h->root.type != bfd_link_hash_defweak)
1857 /* This appears to be a reference to an undefined
1858 symbol. Just ignore it--it will be caught by the
1859 regular reloc processing. */
1860 continue;
1861
1862 symval = (h->root.u.def.value
1863 + h->root.u.def.section->output_section->vma
1864 + h->root.u.def.section->output_offset);
1865 }
1866
1867 /* For simplicity of coding, we are going to modify the section
1868 contents, the section relocs, and the BFD symbol table. We
1869 must tell the rest of the code not to free up this
1870 information. It would be possible to instead create a table
1871 of changes which have to be made, as is done in coff-mips.c;
1872 that would be more work, but would require less memory when
1873 the linker is run. */
1874
1875 /* Try to turn a 24 branch/call into a 16bit relative
7fac7ff4 1876 branch/call. */
3d3d428f
NC
1877 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP24)
1878 {
1879 bfd_vma value = symval;
1880
1881 /* Deal with pc-relative gunk. */
1882 value -= (sec->output_section->vma + sec->output_offset);
1883 value -= irel->r_offset;
1884 value += irel->r_addend;
1885
1886 /* See if the value will fit in 16 bits, note the high value is
1887 0xfffe + 2 as the target will be two bytes closer if we are
1888 able to relax. */
1889 if ((long) value < 0x10000 && (long) value > -0x10002)
1890 {
1891 unsigned int code;
1892
1893 /* Get the opcode. */
1894 code = (unsigned int) bfd_get_32 (abfd, contents + irel->r_offset);
1895
1896 /* Verify it's a 'bcond' and fix the opcode. */
1897 if ((code & 0xffff) == 0x0010)
99706f30 1898 bfd_put_16 (abfd, 0x1800 | ((0xf & (code >> 20)) << 4), contents + irel->r_offset);
3d3d428f
NC
1899 else
1900 continue;
1901
1902 /* Note that we've changed the relocs, section contents, etc. */
1903 elf_section_data (sec)->relocs = internal_relocs;
1904 elf_section_data (sec)->this_hdr.contents = contents;
1905 symtab_hdr->contents = (unsigned char *) isymbuf;
1906
1907 /* Fix the relocation's type. */
1908 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1909 R_CR16_DISP16);
1910
1911 /* Delete two bytes of data. */
1912 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
1913 irel->r_offset + 2, 2))
1914 goto error_return;
1915
1916 /* That will change things, so, we should relax again.
1917 Note that this is not required, and it may be slow. */
1918 *again = TRUE;
1919 }
1920 }
1921
99706f30
SR
1922 /* Try to turn a 16bit pc-relative branch into an
1923 8bit pc-relative branch. */
3d3d428f
NC
1924 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_DISP16)
1925 {
1926 bfd_vma value = symval;
1927
1928 /* Deal with pc-relative gunk. */
1929 value -= (sec->output_section->vma + sec->output_offset);
1930 value -= irel->r_offset;
1931 value += irel->r_addend;
1932
1933 /* See if the value will fit in 8 bits, note the high value is
1934 0xfc + 2 as the target will be two bytes closer if we are
1935 able to relax. */
99706f30
SR
1936 /*if ((long) value < 0x1fa && (long) value > -0x100) REVISIT:range */
1937 if ((long) value < 0xfa && (long) value > -0x100)
3d3d428f
NC
1938 {
1939 unsigned short code;
1940
1941 /* Get the opcode. */
1942 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
1943
99706f30
SR
1944 /* Verify it's a 'bcond' and fix the opcode. */
1945 if ((code & 0xff0f) == 0x1800)
1946 bfd_put_16 (abfd, (code & 0xf0f0), contents + irel->r_offset);
3d3d428f
NC
1947 else
1948 continue;
1949
1950 /* Note that we've changed the relocs, section contents, etc. */
1951 elf_section_data (sec)->relocs = internal_relocs;
1952 elf_section_data (sec)->this_hdr.contents = contents;
1953 symtab_hdr->contents = (unsigned char *) isymbuf;
1954
1955 /* Fix the relocation's type. */
1956 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
1957 R_CR16_DISP8);
1958
1959 /* Delete two bytes of data. */
1960 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
1961 irel->r_offset + 2, 2))
1962 goto error_return;
1963
1964 /* That will change things, so, we should relax again.
1965 Note that this is not required, and it may be slow. */
1966 *again = TRUE;
1967 }
1968 }
1969
99706f30 1970 /* Try to turn a 32-bit IMM address into a 20/16-bit IMM address */
3d3d428f
NC
1971 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM32)
1972 {
1973 bfd_vma value = symval;
7fac7ff4 1974 unsigned short is_add_mov = 0;
99706f30 1975 bfd_vma value1 = 0;
68ffbac6 1976
99706f30
SR
1977 /* Get the existing value from the mcode */
1978 value1 = ((bfd_get_32 (abfd, contents + irel->r_offset + 2) >> 16)
1979 |(((bfd_get_32 (abfd, contents + irel->r_offset + 2) & 0xffff) << 16)));
3d3d428f
NC
1980
1981 /* See if the value will fit in 20 bits. */
99706f30 1982 if ((long) (value + value1) < 0xfffff && (long) (value + value1) > 0)
3d3d428f
NC
1983 {
1984 unsigned short code;
1985
1986 /* Get the opcode. */
1987 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
1988
99706f30 1989 /* Verify it's a 'arithmetic ADDD or MOVD instruction'.
7fac7ff4 1990 For ADDD and MOVD only, convert to IMM32 -> IMM20. */
68ffbac6 1991
e9deb29d 1992 if (((code & 0xfff0) == 0x0070) || ((code & 0xfff0) == 0x0020))
99706f30 1993 is_add_mov = 1;
7fac7ff4
NC
1994
1995 if (is_add_mov)
1996 {
99706f30 1997 /* Note that we've changed the relocs, section contents,
7fac7ff4
NC
1998 etc. */
1999 elf_section_data (sec)->relocs = internal_relocs;
2000 elf_section_data (sec)->this_hdr.contents = contents;
2001 symtab_hdr->contents = (unsigned char *) isymbuf;
2002
2003 /* Fix the opcode. */
2004 if ((code & 0xfff0) == 0x0070) /* For movd. */
2005 bfd_put_8 (abfd, 0x05, contents + irel->r_offset + 1);
99706f30 2006 else /* code == 0x0020 for addd. */
7fac7ff4 2007 bfd_put_8 (abfd, 0x04, contents + irel->r_offset + 1);
99706f30 2008
7fac7ff4
NC
2009 bfd_put_8 (abfd, (code & 0xf) << 4, contents + irel->r_offset);
2010
68ffbac6 2011 /* If existing value is nagavive adjust approriately
99706f30
SR
2012 place the 16-20bits (ie 4 bit) in new opcode,
2013 as the 0xffffxxxx, the higher 2 byte values removed. */
2014 if (value1 & 0x80000000)
2015 bfd_put_8 (abfd, (0x0f | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
2016 else
2017 bfd_put_8 (abfd, (((value1 >> 16)&0xf) | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
7fac7ff4
NC
2018
2019 /* Fix the relocation's type. */
2020 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
99706f30
SR
2021 R_CR16_IMM20);
2022
7fac7ff4
NC
2023 /* Delete two bytes of data. */
2024 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
99706f30 2025 irel->r_offset + 2, 2))
7fac7ff4
NC
2026 goto error_return;
2027
2028 /* That will change things, so, we should relax again.
2029 Note that this is not required, and it may be slow. */
2030 *again = TRUE;
2031 }
2032 }
99706f30
SR
2033
2034 /* See if the value will fit in 16 bits. */
68ffbac6 2035 if ((!is_add_mov)
99706f30 2036 && ((long)(value + value1) < 0x7fff && (long)(value + value1) > 0))
7fac7ff4
NC
2037 {
2038 unsigned short code;
2039
2040 /* Get the opcode. */
2041 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
3d3d428f
NC
2042
2043 /* Note that we've changed the relocs, section contents, etc. */
2044 elf_section_data (sec)->relocs = internal_relocs;
2045 elf_section_data (sec)->this_hdr.contents = contents;
2046 symtab_hdr->contents = (unsigned char *) isymbuf;
2047
2048 /* Fix the opcode. */
7fac7ff4
NC
2049 if ((code & 0xf0) == 0x70) /* For movd. */
2050 bfd_put_8 (abfd, 0x54, contents + irel->r_offset + 1);
2051 else if ((code & 0xf0) == 0x20) /* For addd. */
2052 bfd_put_8 (abfd, 0x60, contents + irel->r_offset + 1);
2053 else if ((code & 0xf0) == 0x90) /* For cmpd. */
2054 bfd_put_8 (abfd, 0x56, contents + irel->r_offset + 1);
2055 else
2056 continue;
2057
2058 bfd_put_8 (abfd, 0xb0 | (code & 0xf), contents + irel->r_offset);
3d3d428f 2059
68ffbac6 2060 /* If existing value is nagavive adjust approriately
99706f30
SR
2061 place the 12-16bits (ie 4 bit) in new opcode,
2062 as the 0xfffffxxx, the higher 2 byte values removed. */
2063 if (value1 & 0x80000000)
2064 bfd_put_8 (abfd, (0x0f | (bfd_get_8(abfd, contents + irel->r_offset))), contents + irel->r_offset);
2065 else
2066 bfd_put_16 (abfd, value1, contents + irel->r_offset + 2);
2067
2068
3d3d428f
NC
2069 /* Fix the relocation's type. */
2070 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
7fac7ff4 2071 R_CR16_IMM16);
3d3d428f
NC
2072
2073 /* Delete two bytes of data. */
2074 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
7fac7ff4 2075 irel->r_offset + 2, 2))
99706f30 2076 goto error_return;
3d3d428f
NC
2077
2078 /* That will change things, so, we should relax again.
2079 Note that this is not required, and it may be slow. */
99706f30 2080 *again = TRUE;
3d3d428f
NC
2081 }
2082 }
7fac7ff4 2083
99706f30
SR
2084#if 0
2085 /* Try to turn a 16bit immediate address into a 4bit
2086 immediate address. */
68ffbac6 2087 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
7fac7ff4 2088 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM16))
3d3d428f
NC
2089 {
2090 bfd_vma value = symval;
99706f30
SR
2091 bfd_vma value1 = 0;
2092
2093 /* Get the existing value from the mcode */
2094 value1 = ((bfd_get_16 (abfd, contents + irel->r_offset + 2) & 0xffff));
2095
2096 if (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_IMM20)
2097 {
2098 value1 |= ((bfd_get_16 (abfd, contents + irel->r_offset + 1) & 0xf000) << 0x4);
2099 }
3d3d428f
NC
2100
2101 /* See if the value will fit in 4 bits. */
99706f30
SR
2102 if ((((long) (value + value1)) < 0xf)
2103 && (((long) (value + value1)) > 0))
3d3d428f
NC
2104 {
2105 unsigned short code;
2106
2107 /* Get the opcode. */
7fac7ff4 2108 code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
3d3d428f
NC
2109
2110 /* Note that we've changed the relocs, section contents, etc. */
2111 elf_section_data (sec)->relocs = internal_relocs;
2112 elf_section_data (sec)->this_hdr.contents = contents;
2113 symtab_hdr->contents = (unsigned char *) isymbuf;
2114
2115 /* Fix the opcode. */
7fac7ff4
NC
2116 if (((code & 0x0f00) == 0x0400) || ((code & 0x0f00) == 0x0500))
2117 {
2118 if ((code & 0x0f00) == 0x0400) /* For movd imm20. */
2119 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2120 else /* For addd imm20. */
2121 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
2122 bfd_put_8 (abfd, (code & 0xf0) >> 4, contents + irel->r_offset + 1);
2123 }
2124 else
2125 {
2126 if ((code & 0xfff0) == 0x56b0) /* For cmpd imm16. */
2127 bfd_put_8 (abfd, 0x56, contents + irel->r_offset);
2128 else if ((code & 0xfff0) == 0x54b0) /* For movd imm16. */
2129 bfd_put_8 (abfd, 0x54, contents + irel->r_offset);
2130 else if ((code & 0xfff0) == 0x58b0) /* For movb imm16. */
2131 bfd_put_8 (abfd, 0x58, contents + irel->r_offset);
2132 else if ((code & 0xfff0) == 0x5Ab0) /* For movw imm16. */
2133 bfd_put_8 (abfd, 0x5A, contents + irel->r_offset);
2134 else if ((code & 0xfff0) == 0x60b0) /* For addd imm16. */
2135 bfd_put_8 (abfd, 0x60, contents + irel->r_offset);
2136 else if ((code & 0xfff0) == 0x30b0) /* For addb imm16. */
2137 bfd_put_8 (abfd, 0x30, contents + irel->r_offset);
2138 else if ((code & 0xfff0) == 0x2Cb0) /* For addub imm16. */
2139 bfd_put_8 (abfd, 0x2C, contents + irel->r_offset);
2140 else if ((code & 0xfff0) == 0x32b0) /* For adduw imm16. */
2141 bfd_put_8 (abfd, 0x32, contents + irel->r_offset);
2142 else if ((code & 0xfff0) == 0x38b0) /* For subb imm16. */
2143 bfd_put_8 (abfd, 0x38, contents + irel->r_offset);
99706f30
SR
2144 else if ((code & 0xfff0) == 0x3Cb0) /* For subcb imm16. */
2145 bfd_put_8 (abfd, 0x3C, contents + irel->r_offset);
2146 else if ((code & 0xfff0) == 0x3Fb0) /* For subcw imm16. */
2147 bfd_put_8 (abfd, 0x3F, contents + irel->r_offset);
7fac7ff4
NC
2148 else if ((code & 0xfff0) == 0x3Ab0) /* For subw imm16. */
2149 bfd_put_8 (abfd, 0x3A, contents + irel->r_offset);
2150 else if ((code & 0xfff0) == 0x50b0) /* For cmpb imm16. */
2151 bfd_put_8 (abfd, 0x50, contents + irel->r_offset);
2152 else if ((code & 0xfff0) == 0x52b0) /* For cmpw imm16. */
2153 bfd_put_8 (abfd, 0x52, contents + irel->r_offset);
2154 else
2155 continue;
99706f30 2156
7fac7ff4
NC
2157 bfd_put_8 (abfd, (code & 0xf), contents + irel->r_offset + 1);
2158 }
3d3d428f
NC
2159
2160 /* Fix the relocation's type. */
2161 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2162 R_CR16_IMM4);
2163
2164 /* Delete two bytes of data. */
2165 if (!elf32_cr16_relax_delete_bytes (link_info, abfd, sec,
99706f30 2166 irel->r_offset + 2, 2))
3d3d428f
NC
2167 goto error_return;
2168
2169 /* That will change things, so, we should relax again.
2170 Note that this is not required, and it may be slow. */
2171 *again = TRUE;
2172 }
2173 }
99706f30 2174#endif
3d3d428f
NC
2175 }
2176
2177 if (isymbuf != NULL
2178 && symtab_hdr->contents != (unsigned char *) isymbuf)
2179 {
2180 if (! link_info->keep_memory)
2181 free (isymbuf);
2182 else
99706f30
SR
2183 /* Cache the symbols for elf_link_input_bfd. */
2184 symtab_hdr->contents = (unsigned char *) isymbuf;
3d3d428f
NC
2185 }
2186
2187 if (contents != NULL
2188 && elf_section_data (sec)->this_hdr.contents != contents)
2189 {
2190 if (! link_info->keep_memory)
2191 free (contents);
2192 else
99706f30
SR
2193 /* Cache the section contents for elf_link_input_bfd. */
2194 elf_section_data (sec)->this_hdr.contents = contents;
68ffbac6 2195
3d3d428f
NC
2196 }
2197
2198 if (internal_relocs != NULL
2199 && elf_section_data (sec)->relocs != internal_relocs)
2200 free (internal_relocs);
2201
2202 return TRUE;
2203
2204 error_return:
2205 if (isymbuf != NULL
2206 && symtab_hdr->contents != (unsigned char *) isymbuf)
2207 free (isymbuf);
2208 if (contents != NULL
2209 && elf_section_data (sec)->this_hdr.contents != contents)
2210 free (contents);
2211 if (internal_relocs != NULL
2212 && elf_section_data (sec)->relocs != internal_relocs)
2213 free (internal_relocs);
2214
2215 return FALSE;
2216}
2217
2218static asection *
2219elf32_cr16_gc_mark_hook (asection *sec,
fb34365b
AM
2220 struct bfd_link_info *info,
2221 Elf_Internal_Rela *rel,
99706f30
SR
2222 struct elf_link_hash_entry *h,
2223 Elf_Internal_Sym *sym)
3d3d428f 2224{
fb34365b 2225 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
3d3d428f
NC
2226}
2227
2228/* Update the got entry reference counts for the section being removed. */
2229
2230static bfd_boolean
2231elf32_cr16_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
99706f30
SR
2232 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2233 asection *sec ATTRIBUTE_UNUSED,
2234 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
3d3d428f
NC
2235{
2236 /* We don't support garbage collection of GOT and PLT relocs yet. */
2237 return TRUE;
2238}
2239
99706f30
SR
2240/* Create dynamic sections when linking against a dynamic object. */
2241
2242static bfd_boolean
2243_bfd_cr16_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
2244{
2245 flagword flags;
2246 asection * s;
2247 const struct elf_backend_data * bed = get_elf_backend_data (abfd);
2248 int ptralign = 0;
2249
2250 switch (bed->s->arch_size)
2251 {
2252 case 16:
2253 ptralign = 1;
2254 break;
2255
2256 case 32:
2257 ptralign = 2;
2258 break;
2259
2260 default:
2261 bfd_set_error (bfd_error_bad_value);
2262 return FALSE;
2263 }
2264
2265 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
2266 .rel[a].bss sections. */
2267
2268 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
2269 | SEC_LINKER_CREATED);
2270
3d4d4302
AM
2271 s = bfd_make_section_anyway_with_flags (abfd,
2272 (bed->default_use_rela_p
2273 ? ".rela.plt" : ".rel.plt"),
2274 flags | SEC_READONLY);
99706f30
SR
2275 if (s == NULL
2276 || ! bfd_set_section_alignment (abfd, s, ptralign))
2277 return FALSE;
2278
2279 if (! _bfd_cr16_elf_create_got_section (abfd, info))
2280 return FALSE;
2281
99706f30
SR
2282 if (bed->want_dynbss)
2283 {
2284 /* The .dynbss section is a place to put symbols which are defined
2285 by dynamic objects, are referenced by regular objects, and are
2286 not functions. We must allocate space for them in the process
2287 image and use a R_*_COPY reloc to tell the dynamic linker to
2288 initialize them at run time. The linker script puts the .dynbss
2289 section into the .bss section of the final image. */
3d4d4302
AM
2290 s = bfd_make_section_anyway_with_flags (abfd, ".dynbss",
2291 SEC_ALLOC | SEC_LINKER_CREATED);
99706f30
SR
2292 if (s == NULL)
2293 return FALSE;
2294
2295 /* The .rel[a].bss section holds copy relocs. This section is not
2296 normally needed. We need to create it here, though, so that the
2297 linker will map it to an output section. We can't just create it
2298 only if we need it, because we will not know whether we need it
2299 until we have seen all the input files, and the first time the
2300 main linker code calls BFD after examining all the input files
2301 (size_dynamic_sections) the input sections have already been
2302 mapped to the output sections. If the section turns out not to
2303 be needed, we can discard it later. We will never need this
2304 section when generating a shared object, since they do not use
2305 copy relocs. */
2306 if (! info->executable)
2307 {
3d4d4302
AM
2308 s = bfd_make_section_anyway_with_flags (abfd,
2309 (bed->default_use_rela_p
2310 ? ".rela.bss" : ".rel.bss"),
2311 flags | SEC_READONLY);
99706f30
SR
2312 if (s == NULL
2313 || ! bfd_set_section_alignment (abfd, s, ptralign))
2314 return FALSE;
2315 }
2316 }
2317
2318 return TRUE;
2319}
2320\f
2321/* Adjust a symbol defined by a dynamic object and referenced by a
2322 regular object. The current definition is in some section of the
2323 dynamic object, but we're not including those sections. We have to
2324 change the definition to something the rest of the link can
2325 understand. */
2326
2327static bfd_boolean
2328_bfd_cr16_elf_adjust_dynamic_symbol (struct bfd_link_info * info,
2329 struct elf_link_hash_entry * h)
2330{
2331 bfd * dynobj;
2332 asection * s;
2333
2334 dynobj = elf_hash_table (info)->dynobj;
2335
2336 /* Make sure we know what is going on here. */
2337 BFD_ASSERT (dynobj != NULL
2338 && (h->needs_plt
2339 || h->u.weakdef != NULL
2340 || (h->def_dynamic
2341 && h->ref_regular
2342 && !h->def_regular)));
2343
2344 /* If this is a function, put it in the procedure linkage table. We
2345 will fill in the contents of the procedure linkage table later,
2346 when we know the address of the .got section. */
2347 if (h->type == STT_FUNC
2348 || h->needs_plt)
2349 {
2350 if (! info->executable
2351 && !h->def_dynamic
2352 && !h->ref_dynamic)
2353 {
2354 /* This case can occur if we saw a PLT reloc in an input
2355 file, but the symbol was never referred to by a dynamic
2356 object. In such a case, we don't actually need to build
2357 a procedure linkage table, and we can just do a REL32
2358 reloc instead. */
2359 BFD_ASSERT (h->needs_plt);
2360 return TRUE;
2361 }
2362
2363 /* Make sure this symbol is output as a dynamic symbol. */
2364 if (h->dynindx == -1)
2365 {
2366 if (! bfd_elf_link_record_dynamic_symbol (info, h))
2367 return FALSE;
2368 }
2369
2370 /* We also need to make an entry in the .got.plt section, which
2371 will be placed in the .got section by the linker script. */
2372
3d4d4302 2373 s = bfd_get_linker_section (dynobj, ".got.plt");
99706f30
SR
2374 BFD_ASSERT (s != NULL);
2375 s->size += 4;
2376
2377 /* We also need to make an entry in the .rela.plt section. */
2378
3d4d4302 2379 s = bfd_get_linker_section (dynobj, ".rela.plt");
99706f30
SR
2380 BFD_ASSERT (s != NULL);
2381 s->size += sizeof (Elf32_External_Rela);
2382
2383 return TRUE;
2384 }
2385
2386 /* If this is a weak symbol, and there is a real definition, the
2387 processor independent code will have arranged for us to see the
2388 real definition first, and we can just use the same value. */
2389 if (h->u.weakdef != NULL)
2390 {
2391 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined
2392 || h->u.weakdef->root.type == bfd_link_hash_defweak);
2393 h->root.u.def.section = h->u.weakdef->root.u.def.section;
2394 h->root.u.def.value = h->u.weakdef->root.u.def.value;
2395 return TRUE;
2396 }
2397
2398 /* This is a reference to a symbol defined by a dynamic object which
2399 is not a function. */
2400
2401 /* If we are creating a shared library, we must presume that the
2402 only references to the symbol are via the global offset table.
2403 For such cases we need not do anything here; the relocations will
2404 be handled correctly by relocate_section. */
2405 if (info->executable)
2406 return TRUE;
2407
2408 /* If there are no references to this symbol that do not use the
2409 GOT, we don't need to generate a copy reloc. */
2410 if (!h->non_got_ref)
2411 return TRUE;
2412
99706f30
SR
2413 /* We must allocate the symbol in our .dynbss section, which will
2414 become part of the .bss section of the executable. There will be
2415 an entry for this symbol in the .dynsym section. The dynamic
2416 object will contain position independent code, so all references
2417 from the dynamic object to this symbol will go through the global
2418 offset table. The dynamic linker will use the .dynsym entry to
2419 determine the address it must put in the global offset table, so
2420 both the dynamic object and the regular object will refer to the
2421 same memory location for the variable. */
2422
3d4d4302 2423 s = bfd_get_linker_section (dynobj, ".dynbss");
99706f30
SR
2424 BFD_ASSERT (s != NULL);
2425
2426 /* We must generate a R_CR16_COPY reloc to tell the dynamic linker to
2427 copy the initial value out of the dynamic object and into the
2428 runtime process image. We need to remember the offset into the
2429 .rela.bss section we are going to use. */
1d7e9d18 2430 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0 && h->size != 0)
99706f30
SR
2431 {
2432 asection * srel;
2433
3d4d4302 2434 srel = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2435 BFD_ASSERT (srel != NULL);
2436 srel->size += sizeof (Elf32_External_Rela);
2437 h->needs_copy = 1;
2438 }
2439
6cabe1ea 2440 return _bfd_elf_adjust_dynamic_copy (info, h, s);
99706f30
SR
2441}
2442
2443/* Set the sizes of the dynamic sections. */
2444
2445static bfd_boolean
2446_bfd_cr16_elf_size_dynamic_sections (bfd * output_bfd,
2447 struct bfd_link_info * info)
2448{
2449 bfd * dynobj;
2450 asection * s;
2451 bfd_boolean plt;
2452 bfd_boolean relocs;
2453 bfd_boolean reltext;
2454
2455 dynobj = elf_hash_table (info)->dynobj;
2456 BFD_ASSERT (dynobj != NULL);
2457
2458 if (elf_hash_table (info)->dynamic_sections_created)
2459 {
2460 /* Set the contents of the .interp section to the interpreter. */
2461 if (info->executable)
2462 {
2463#if 0
3d4d4302 2464 s = bfd_get_linker_section (dynobj, ".interp");
99706f30
SR
2465 BFD_ASSERT (s != NULL);
2466 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
2467 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
2468#endif
2469 }
2470 }
2471 else
2472 {
2473 /* We may have created entries in the .rela.got section.
2474 However, if we are not creating the dynamic sections, we will
2475 not actually use these entries. Reset the size of .rela.got,
2476 which will cause it to get stripped from the output file
2477 below. */
3d4d4302 2478 s = bfd_get_linker_section (dynobj, ".rela.got");
99706f30
SR
2479 if (s != NULL)
2480 s->size = 0;
2481 }
2482
2483 /* The check_relocs and adjust_dynamic_symbol entry points have
2484 determined the sizes of the various dynamic sections. Allocate
2485 memory for them. */
2486 plt = FALSE;
2487 relocs = FALSE;
2488 reltext = FALSE;
2489 for (s = dynobj->sections; s != NULL; s = s->next)
2490 {
2491 const char * name;
2492
2493 if ((s->flags & SEC_LINKER_CREATED) == 0)
2494 continue;
2495
2496 /* It's OK to base decisions on the section name, because none
2497 of the dynobj section names depend upon the input files. */
2498 name = bfd_get_section_name (dynobj, s);
2499
2500 if (strcmp (name, ".plt") == 0)
2501 {
2502 /* Remember whether there is a PLT. */
2503 plt = s->size != 0;
2504 }
2505 else if (CONST_STRNEQ (name, ".rela"))
2506 {
2507 if (s->size != 0)
2508 {
2509 asection * target;
2510
2511 /* Remember whether there are any reloc sections other
2512 than .rela.plt. */
2513 if (strcmp (name, ".rela.plt") != 0)
2514 {
2515 const char * outname;
2516
2517 relocs = TRUE;
2518
2519 /* If this relocation section applies to a read only
2520 section, then we probably need a DT_TEXTREL
2521 entry. The entries in the .rela.plt section
2522 really apply to the .got section, which we
2523 created ourselves and so know is not readonly. */
2524 outname = bfd_get_section_name (output_bfd,
2525 s->output_section);
2526 target = bfd_get_section_by_name (output_bfd, outname + 5);
2527 if (target != NULL
2528 && (target->flags & SEC_READONLY) != 0
2529 && (target->flags & SEC_ALLOC) != 0)
2530 reltext = TRUE;
2531 }
2532
2533 /* We use the reloc_count field as a counter if we need
2534 to copy relocs into the output file. */
2535 s->reloc_count = 0;
2536 }
2537 }
2538 else if (! CONST_STRNEQ (name, ".got")
2539 && strcmp (name, ".dynbss") != 0)
2540 /* It's not one of our sections, so don't allocate space. */
2541 continue;
2542
2543 if (s->size == 0)
2544 {
2545 /* If we don't need this section, strip it from the
2546 output file. This is mostly to handle .rela.bss and
2547 .rela.plt. We must create both sections in
2548 create_dynamic_sections, because they must be created
2549 before the linker maps input sections to output
2550 sections. The linker does that before
2551 adjust_dynamic_symbol is called, and it is that
2552 function which decides whether anything needs to go
2553 into these sections. */
2554 s->flags |= SEC_EXCLUDE;
2555 continue;
2556 }
2557
2558 if ((s->flags & SEC_HAS_CONTENTS) == 0)
2559 continue;
2560
2561 /* Allocate memory for the section contents. We use bfd_zalloc
2562 here in case unused entries are not reclaimed before the
2563 section's contents are written out. This should not happen,
2564 but this way if it does, we get a R_CR16_NONE reloc
2565 instead of garbage. */
2566 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
2567 if (s->contents == NULL)
2568 return FALSE;
2569 }
2570
2571 if (elf_hash_table (info)->dynamic_sections_created)
2572 {
2573 /* Add some entries to the .dynamic section. We fill in the
2574 values later, in _bfd_cr16_elf_finish_dynamic_sections,
2575 but we must add the entries now so that we get the correct
2576 size for the .dynamic section. The DT_DEBUG entry is filled
2577 in by the dynamic linker and used by the debugger. */
2578 if (! info->executable)
2579 {
2580 if (!_bfd_elf_add_dynamic_entry (info, DT_DEBUG, 0))
2581 return FALSE;
2582 }
2583
2584 if (plt)
2585 {
2586 if (!_bfd_elf_add_dynamic_entry (info, DT_PLTGOT, 0)
2587 || !_bfd_elf_add_dynamic_entry (info, DT_PLTRELSZ, 0)
2588 || !_bfd_elf_add_dynamic_entry (info, DT_PLTREL, DT_RELA)
2589 || !_bfd_elf_add_dynamic_entry (info, DT_JMPREL, 0))
2590 return FALSE;
2591 }
2592
2593 if (relocs)
2594 {
2595 if (!_bfd_elf_add_dynamic_entry (info, DT_RELA, 0)
2596 || !_bfd_elf_add_dynamic_entry (info, DT_RELASZ, 0)
2597 || !_bfd_elf_add_dynamic_entry (info, DT_RELAENT,
2598 sizeof (Elf32_External_Rela)))
2599 return FALSE;
2600 }
2601
2602 if (reltext)
2603 {
2604 if (!_bfd_elf_add_dynamic_entry (info, DT_TEXTREL, 0))
2605 return FALSE;
2606 }
2607 }
2608
2609 return TRUE;
2610}
2611
2612/* Finish up dynamic symbol handling. We set the contents of various
2613 dynamic sections here. */
2614
2615static bfd_boolean
2616_bfd_cr16_elf_finish_dynamic_symbol (bfd * output_bfd,
2617 struct bfd_link_info * info,
2618 struct elf_link_hash_entry * h,
2619 Elf_Internal_Sym * sym)
2620{
2621 bfd * dynobj;
2622
2623 dynobj = elf_hash_table (info)->dynobj;
2624
2625 if (h->got.offset != (bfd_vma) -1)
2626 {
2627 asection * sgot;
2628 asection * srel;
2629 Elf_Internal_Rela rel;
2630
2631 /* This symbol has an entry in the global offset table. Set it up. */
2632
3d4d4302
AM
2633 sgot = bfd_get_linker_section (dynobj, ".got");
2634 srel = bfd_get_linker_section (dynobj, ".rela.got");
99706f30
SR
2635 BFD_ASSERT (sgot != NULL && srel != NULL);
2636
2637 rel.r_offset = (sgot->output_section->vma
2638 + sgot->output_offset
2639 + (h->got.offset & ~1));
2640
2641 /* If this is a -Bsymbolic link, and the symbol is defined
2642 locally, we just want to emit a RELATIVE reloc. Likewise if
2643 the symbol was forced to be local because of a version file.
2644 The entry in the global offset table will already have been
2645 initialized in the relocate_section function. */
2646 if (info->executable
2647 && (info->symbolic || h->dynindx == -1)
2648 && h->def_regular)
2649 {
2650 rel.r_info = ELF32_R_INFO (0, R_CR16_GOT_REGREL20);
2651 rel.r_addend = (h->root.u.def.value
2652 + h->root.u.def.section->output_section->vma
2653 + h->root.u.def.section->output_offset);
2654 }
2655 else
2656 {
2657 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + h->got.offset);
2658 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2659 rel.r_addend = 0;
2660 }
2661
2662 bfd_elf32_swap_reloca_out (output_bfd, &rel,
2663 (bfd_byte *) ((Elf32_External_Rela *) srel->contents
2664 + srel->reloc_count));
2665 ++ srel->reloc_count;
2666 }
2667
2668 if (h->needs_copy)
2669 {
2670 asection * s;
2671 Elf_Internal_Rela rel;
2672
2673 /* This symbol needs a copy reloc. Set it up. */
2674 BFD_ASSERT (h->dynindx != -1
2675 && (h->root.type == bfd_link_hash_defined
2676 || h->root.type == bfd_link_hash_defweak));
2677
3d4d4302 2678 s = bfd_get_linker_section (dynobj, ".rela.bss");
99706f30
SR
2679 BFD_ASSERT (s != NULL);
2680
2681 rel.r_offset = (h->root.u.def.value
2682 + h->root.u.def.section->output_section->vma
2683 + h->root.u.def.section->output_offset);
2684 rel.r_info = ELF32_R_INFO (h->dynindx, R_CR16_GOT_REGREL20);
2685 rel.r_addend = 0;
2686 bfd_elf32_swap_reloca_out (output_bfd, &rel,
2687 (bfd_byte *) ((Elf32_External_Rela *) s->contents
2688 + s->reloc_count));
2689 ++ s->reloc_count;
2690 }
2691
2692 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. */
9637f6ef 2693 if (h == elf_hash_table (info)->hdynamic
99706f30
SR
2694 || h == elf_hash_table (info)->hgot)
2695 sym->st_shndx = SHN_ABS;
2696
2697 return TRUE;
2698}
2699
2700/* Finish up the dynamic sections. */
2701
2702static bfd_boolean
2703_bfd_cr16_elf_finish_dynamic_sections (bfd * output_bfd,
2704 struct bfd_link_info * info)
2705{
2706 bfd * dynobj;
2707 asection * sgot;
2708 asection * sdyn;
2709
2710 dynobj = elf_hash_table (info)->dynobj;
2711
3d4d4302 2712 sgot = bfd_get_linker_section (dynobj, ".got.plt");
99706f30 2713 BFD_ASSERT (sgot != NULL);
3d4d4302 2714 sdyn = bfd_get_linker_section (dynobj, ".dynamic");
99706f30
SR
2715
2716 if (elf_hash_table (info)->dynamic_sections_created)
2717 {
2718 Elf32_External_Dyn * dyncon;
2719 Elf32_External_Dyn * dynconend;
2720
2721 BFD_ASSERT (sdyn != NULL);
2722
2723 dyncon = (Elf32_External_Dyn *) sdyn->contents;
2724 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
2725
2726 for (; dyncon < dynconend; dyncon++)
2727 {
2728 Elf_Internal_Dyn dyn;
2729 const char * name;
2730 asection * s;
2731
2732 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
2733
2734 switch (dyn.d_tag)
2735 {
2736 default:
2737 break;
2738
2739 case DT_PLTGOT:
2740 name = ".got";
2741 goto get_vma;
2742
2743 case DT_JMPREL:
2744 name = ".rela.plt";
2745 get_vma:
2746 s = bfd_get_section_by_name (output_bfd, name);
2747 BFD_ASSERT (s != NULL);
2748 dyn.d_un.d_ptr = s->vma;
2749 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2750 break;
2751
2752 case DT_PLTRELSZ:
2753 s = bfd_get_section_by_name (output_bfd, ".rela.plt");
2754 BFD_ASSERT (s != NULL);
2755 dyn.d_un.d_val = s->size;
2756 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2757 break;
2758
2759 case DT_RELASZ:
2760 /* My reading of the SVR4 ABI indicates that the
2761 procedure linkage table relocs (DT_JMPREL) should be
2762 included in the overall relocs (DT_RELA). This is
2763 what Solaris does. However, UnixWare can not handle
2764 that case. Therefore, we override the DT_RELASZ entry
2765 here to make it not include the JMPREL relocs. Since
2766 the linker script arranges for .rela.plt to follow all
2767 other relocation sections, we don't have to worry
2768 about changing the DT_RELA entry. */
2769 s = bfd_get_section_by_name (output_bfd, ".rela.plt");
2770 if (s != NULL)
2771 dyn.d_un.d_val -= s->size;
2772 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
2773 break;
2774 }
2775 }
2776
2777 }
2778
2779 /* Fill in the first three entries in the global offset table. */
2780 if (sgot->size > 0)
2781 {
2782 if (sdyn == NULL)
2783 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
2784 else
2785 bfd_put_32 (output_bfd,
2786 sdyn->output_section->vma + sdyn->output_offset,
2787 sgot->contents);
2788 }
2789
2790 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
2791
2792 return TRUE;
2793}
2794
2795/* Given a .data.rel section and a .emreloc in-memory section, store
2796 relocation information into the .emreloc section which can be
2797 used at runtime to relocate the section. This is called by the
2798 linker when the --embedded-relocs switch is used. This is called
2799 after the add_symbols entry point has been called for all the
2800 objects, and before the final_link entry point is called. */
2801
2802bfd_boolean
2803bfd_cr16_elf32_create_embedded_relocs (bfd *abfd,
2804 struct bfd_link_info *info,
2805 asection *datasec,
2806 asection *relsec,
2807 char **errmsg)
2808{
2809 Elf_Internal_Shdr *symtab_hdr;
2810 Elf_Internal_Sym *isymbuf = NULL;
2811 Elf_Internal_Rela *internal_relocs = NULL;
2812 Elf_Internal_Rela *irel, *irelend;
2813 bfd_byte *p;
2814 bfd_size_type amt;
2815
2816 BFD_ASSERT (! info->relocatable);
2817
2818 *errmsg = NULL;
2819
2820 if (datasec->reloc_count == 0)
2821 return TRUE;
2822
2823 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2824
2825 /* Get a copy of the native relocations. */
2826 internal_relocs = (_bfd_elf_link_read_relocs
2827 (abfd, datasec, NULL, NULL, info->keep_memory));
2828 if (internal_relocs == NULL)
2829 goto error_return;
2830
2831 amt = (bfd_size_type) datasec->reloc_count * 8;
2832 relsec->contents = (bfd_byte *) bfd_alloc (abfd, amt);
2833 if (relsec->contents == NULL)
2834 goto error_return;
2835
2836 p = relsec->contents;
2837
2838 irelend = internal_relocs + datasec->reloc_count;
2839 for (irel = internal_relocs; irel < irelend; irel++, p += 8)
2840 {
2841 asection *targetsec;
2842
2843 /* We are going to write a four byte longword into the runtime
2844 reloc section. The longword will be the address in the data
2845 section which must be relocated. It is followed by the name
2846 of the target section NUL-padded or truncated to 8
2847 characters. */
2848
2849 /* We can only relocate absolute longword relocs at run time. */
2850 if (!((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
2851 || (ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32)))
2852 {
2853 *errmsg = _("unsupported reloc type");
2854 bfd_set_error (bfd_error_bad_value);
2855 goto error_return;
2856 }
2857
2858 /* Get the target section referred to by the reloc. */
2859 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
2860 {
2861 /* A local symbol. */
2862 Elf_Internal_Sym *isym;
2863
2864 /* Read this BFD's local symbols if we haven't done so already. */
2865 if (isymbuf == NULL)
2866 {
2867 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2868 if (isymbuf == NULL)
2869 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2870 symtab_hdr->sh_info, 0,
2871 NULL, NULL, NULL);
2872 if (isymbuf == NULL)
2873 goto error_return;
2874 }
2875
2876 isym = isymbuf + ELF32_R_SYM (irel->r_info);
2877 targetsec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2878 }
2879 else
2880 {
2881 unsigned long indx;
2882 struct elf_link_hash_entry *h;
2883
2884 /* An external symbol. */
2885 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2886 h = elf_sym_hashes (abfd)[indx];
2887 BFD_ASSERT (h != NULL);
2888 if (h->root.type == bfd_link_hash_defined
2889 || h->root.type == bfd_link_hash_defweak)
2890 targetsec = h->root.u.def.section;
2891 else
2892 targetsec = NULL;
2893 }
2894
2895 bfd_put_32 (abfd, irel->r_offset + datasec->output_offset, p);
2896 memset (p + 4, 0, 4);
2897 if ((ELF32_R_TYPE (irel->r_info) == (int) R_CR16_NUM32a)
2898 && (targetsec != NULL) )
2899 strncpy ((char *) p + 4, targetsec->output_section->name, 4);
2900 }
2901
2902 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
2903 free (isymbuf);
2904 if (internal_relocs != NULL
2905 && elf_section_data (datasec)->relocs != internal_relocs)
2906 free (internal_relocs);
2907 return TRUE;
2908
2909error_return:
2910 if (isymbuf != NULL && symtab_hdr->contents != (unsigned char *) isymbuf)
2911 free (isymbuf);
2912 if (internal_relocs != NULL
2913 && elf_section_data (datasec)->relocs != internal_relocs)
2914 free (internal_relocs);
2915 return FALSE;
2916}
2917
2918
2919/* Classify relocation types, such that combreloc can sort them
2920 properly. */
2921
2922static enum elf_reloc_type_class
7e612e98
AM
2923_bfd_cr16_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
2924 const asection *rel_sec ATTRIBUTE_UNUSED,
2925 const Elf_Internal_Rela *rela)
99706f30
SR
2926{
2927 switch ((int) ELF32_R_TYPE (rela->r_info))
2928 {
2929 case R_CR16_GOT_REGREL20:
2930 case R_CR16_GOTC_REGREL20:
2931 return reloc_class_relative;
2932 default:
2933 return reloc_class_normal;
2934 }
2935}
2936
3d3d428f 2937/* Definitions for setting CR16 target vector. */
6d00b590 2938#define TARGET_LITTLE_SYM cr16_elf32_vec
3d3d428f
NC
2939#define TARGET_LITTLE_NAME "elf32-cr16"
2940#define ELF_ARCH bfd_arch_cr16
2941#define ELF_MACHINE_CODE EM_CR16
1e1d9f39 2942#define ELF_MACHINE_ALT1 EM_CR16_OLD
3d3d428f
NC
2943#define ELF_MAXPAGESIZE 0x1
2944#define elf_symbol_leading_char '_'
2945
2946#define bfd_elf32_bfd_reloc_type_lookup elf_cr16_reloc_type_lookup
2947#define bfd_elf32_bfd_reloc_name_lookup elf_cr16_reloc_name_lookup
2948#define elf_info_to_howto elf_cr16_info_to_howto
2949#define elf_info_to_howto_rel 0
2950#define elf_backend_relocate_section elf32_cr16_relocate_section
2951#define bfd_elf32_bfd_relax_section elf32_cr16_relax_section
2952#define bfd_elf32_bfd_get_relocated_section_contents \
2953 elf32_cr16_get_relocated_section_contents
2954#define elf_backend_gc_mark_hook elf32_cr16_gc_mark_hook
2955#define elf_backend_gc_sweep_hook elf32_cr16_gc_sweep_hook
2956#define elf_backend_can_gc_sections 1
2957#define elf_backend_rela_normal 1
99706f30
SR
2958#define elf_backend_check_relocs cr16_elf_check_relocs
2959/* So we can set bits in e_flags. */
2960#define elf_backend_final_write_processing \
2961 _bfd_cr16_elf_final_write_processing
2962#define elf_backend_object_p _bfd_cr16_elf_object_p
2963
2964#define bfd_elf32_bfd_merge_private_bfd_data \
2965 _bfd_cr16_elf_merge_private_bfd_data
2966
2967
2968#define bfd_elf32_bfd_link_hash_table_create \
2969 elf32_cr16_link_hash_table_create
99706f30
SR
2970
2971#define elf_backend_create_dynamic_sections \
2972 _bfd_cr16_elf_create_dynamic_sections
2973#define elf_backend_adjust_dynamic_symbol \
2974 _bfd_cr16_elf_adjust_dynamic_symbol
2975#define elf_backend_size_dynamic_sections \
2976 _bfd_cr16_elf_size_dynamic_sections
2977#define elf_backend_omit_section_dynsym \
2978 ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true)
2979#define elf_backend_finish_dynamic_symbol \
2980 _bfd_cr16_elf_finish_dynamic_symbol
2981#define elf_backend_finish_dynamic_sections \
2982 _bfd_cr16_elf_finish_dynamic_sections
2983
2984#define elf_backend_reloc_type_class _bfd_cr16_elf_reloc_type_class
2985
2986
2987#define elf_backend_want_got_plt 1
2988#define elf_backend_plt_readonly 1
2989#define elf_backend_want_plt_sym 0
2990#define elf_backend_got_header_size 12
3d3d428f
NC
2991
2992#include "elf32-target.h"
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