* ld.texinfo (Output Section Address): Note that specifying an
[deliverable/binutils-gdb.git] / bfd / elf32-h8300.c
CommitLineData
c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
ab96bf03
AM
2 Copyright 1993, 1995, 1998, 1999, 2001, 2002, 2003, 2004, 2005, 2006,
3 2007 Free Software Foundation, Inc.
e01b0e69 4
e514ac71 5 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 6
e514ac71
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
e514ac71 10 (at your option) any later version.
e01b0e69 11
e514ac71
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
e01b0e69 16
e514ac71
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
e01b0e69 21
e01b0e69 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
e01b0e69
JR
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/h8.h"
27
28static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 29 (bfd *abfd, bfd_reloc_code_real_type code);
e01b0e69 30static void elf32_h8_info_to_howto
c6baf75e 31 (bfd *, arelent *, Elf_Internal_Rela *);
5e47149d 32static void elf32_h8_info_to_howto_rel
c6baf75e 33 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419
KH
34static unsigned long elf32_h8_mach (flagword);
35static void elf32_h8_final_write_processing (bfd *, bfd_boolean);
36static bfd_boolean elf32_h8_object_p (bfd *);
37static bfd_boolean elf32_h8_merge_private_bfd_data (bfd *, bfd *);
b34976b6 38static bfd_boolean elf32_h8_relax_section
c6baf75e 39 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 40static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 41 (bfd *, asection *, bfd_vma, int);
96ef1419 42static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 43static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
44 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
45 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 46static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
47 (unsigned long, bfd *, bfd *, asection *,
48 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
49 struct bfd_link_info *, asection *, int);
b34976b6 50static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
51 (bfd *, struct bfd_link_info *, bfd *, asection *,
52 bfd_byte *, Elf_Internal_Rela *,
53 Elf_Internal_Sym *, asection **);
dc810e39 54static bfd_reloc_status_type special
c6baf75e 55 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
e01b0e69
JR
56
57/* This does not include any relocation information, but should be
58 good enough for GDB or objdump to read the file. */
59
bc7eab72 60static reloc_howto_type h8_elf_howto_table[] = {
e01b0e69
JR
61#define R_H8_NONE_X 0
62 HOWTO (R_H8_NONE, /* type */
63 0, /* rightshift */
64 0, /* size (0 = byte, 1 = short, 2 = long) */
65 0, /* bitsize */
b34976b6 66 FALSE, /* pc_relative */
e01b0e69 67 0, /* bitpos */
9d29900b
NC
68 complain_overflow_dont,/* complain_on_overflow */
69 special, /* special_function */
e01b0e69 70 "R_H8_NONE", /* name */
b34976b6 71 FALSE, /* partial_inplace */
e01b0e69
JR
72 0, /* src_mask */
73 0, /* dst_mask */
b34976b6 74 FALSE), /* pcrel_offset */
e01b0e69
JR
75#define R_H8_DIR32_X (R_H8_NONE_X + 1)
76 HOWTO (R_H8_DIR32, /* type */
77 0, /* rightshift */
78 2, /* size (0 = byte, 1 = short, 2 = long) */
79 32, /* bitsize */
b34976b6 80 FALSE, /* pc_relative */
e01b0e69 81 0, /* bitpos */
9d29900b
NC
82 complain_overflow_dont,/* complain_on_overflow */
83 special, /* special_function */
e01b0e69 84 "R_H8_DIR32", /* name */
b34976b6 85 FALSE, /* partial_inplace */
e01b0e69
JR
86 0, /* src_mask */
87 0xffffffff, /* dst_mask */
b34976b6 88 FALSE), /* pcrel_offset */
e01b0e69
JR
89#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
90 HOWTO (R_H8_DIR16, /* type */
91 0, /* rightshift */
92 1, /* size (0 = byte, 1 = short, 2 = long) */
93 16, /* bitsize */
b34976b6 94 FALSE, /* pc_relative */
e01b0e69 95 0, /* bitpos */
9d29900b
NC
96 complain_overflow_dont,/* complain_on_overflow */
97 special, /* special_function */
e01b0e69 98 "R_H8_DIR16", /* name */
b34976b6 99 FALSE, /* partial_inplace */
e01b0e69
JR
100 0, /* src_mask */
101 0x0000ffff, /* dst_mask */
b34976b6 102 FALSE), /* pcrel_offset */
e01b0e69
JR
103#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
104 HOWTO (R_H8_DIR8, /* type */
105 0, /* rightshift */
106 0, /* size (0 = byte, 1 = short, 2 = long) */
107 8, /* bitsize */
b34976b6 108 FALSE, /* pc_relative */
e01b0e69 109 0, /* bitpos */
9d29900b
NC
110 complain_overflow_dont,/* complain_on_overflow */
111 special, /* special_function */
112 "R_H8_DIR8", /* name */
b34976b6 113 FALSE, /* partial_inplace */
e01b0e69
JR
114 0, /* src_mask */
115 0x000000ff, /* dst_mask */
b34976b6 116 FALSE), /* pcrel_offset */
e01b0e69
JR
117#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
118 HOWTO (R_H8_DIR16A8, /* type */
119 0, /* rightshift */
120 1, /* size (0 = byte, 1 = short, 2 = long) */
121 16, /* bitsize */
b34976b6 122 FALSE, /* pc_relative */
e01b0e69
JR
123 0, /* bitpos */
124 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 125 special, /* special_function */
e01b0e69 126 "R_H8_DIR16A8", /* name */
b34976b6 127 FALSE, /* partial_inplace */
e01b0e69
JR
128 0, /* src_mask */
129 0x0000ffff, /* dst_mask */
b34976b6 130 FALSE), /* pcrel_offset */
e01b0e69
JR
131#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
132 HOWTO (R_H8_DIR16R8, /* type */
133 0, /* rightshift */
134 1, /* size (0 = byte, 1 = short, 2 = long) */
135 16, /* bitsize */
b34976b6 136 FALSE, /* pc_relative */
e01b0e69
JR
137 0, /* bitpos */
138 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 139 special, /* special_function */
e01b0e69 140 "R_H8_DIR16R8", /* name */
b34976b6 141 FALSE, /* partial_inplace */
e01b0e69
JR
142 0, /* src_mask */
143 0x0000ffff, /* dst_mask */
b34976b6 144 FALSE), /* pcrel_offset */
e01b0e69
JR
145#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
146 HOWTO (R_H8_DIR24A8, /* type */
147 0, /* rightshift */
148 2, /* size (0 = byte, 1 = short, 2 = long) */
149 24, /* bitsize */
b34976b6 150 FALSE, /* pc_relative */
e01b0e69
JR
151 0, /* bitpos */
152 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 153 special, /* special_function */
e01b0e69 154 "R_H8_DIR24A8", /* name */
b34976b6 155 TRUE, /* partial_inplace */
e01b0e69
JR
156 0xff000000, /* src_mask */
157 0x00ffffff, /* dst_mask */
b34976b6 158 FALSE), /* pcrel_offset */
e01b0e69
JR
159#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
160 HOWTO (R_H8_DIR24R8, /* type */
161 0, /* rightshift */
162 2, /* size (0 = byte, 1 = short, 2 = long) */
163 24, /* bitsize */
b34976b6 164 FALSE, /* pc_relative */
e01b0e69
JR
165 0, /* bitpos */
166 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 167 special, /* special_function */
e01b0e69 168 "R_H8_DIR24R8", /* name */
b34976b6 169 TRUE, /* partial_inplace */
e01b0e69
JR
170 0xff000000, /* src_mask */
171 0x00ffffff, /* dst_mask */
b34976b6 172 FALSE), /* pcrel_offset */
e01b0e69
JR
173#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
174 HOWTO (R_H8_DIR32A16, /* type */
175 0, /* rightshift */
176 2, /* size (0 = byte, 1 = short, 2 = long) */
177 32, /* bitsize */
b34976b6 178 FALSE, /* pc_relative */
e01b0e69 179 0, /* bitpos */
9d29900b
NC
180 complain_overflow_dont,/* complain_on_overflow */
181 special, /* special_function */
8c17da6e 182 "R_H8_DIR32A16", /* name */
b34976b6 183 FALSE, /* partial_inplace */
e01b0e69
JR
184 0, /* src_mask */
185 0xffffffff, /* dst_mask */
b34976b6 186 FALSE), /* pcrel_offset */
f2352488
JL
187#define R_H8_PCREL16_X (R_H8_DIR32A16_X + 1)
188 HOWTO (R_H8_PCREL16, /* type */
189 0, /* rightshift */
190 1, /* size (0 = byte, 1 = short, 2 = long) */
191 16, /* bitsize */
b34976b6 192 TRUE, /* pc_relative */
f2352488 193 0, /* bitpos */
9d29900b
NC
194 complain_overflow_signed,/* complain_on_overflow */
195 special, /* special_function */
f2352488 196 "R_H8_PCREL16", /* name */
b34976b6 197 FALSE, /* partial_inplace */
f2352488
JL
198 0xffff, /* src_mask */
199 0xffff, /* dst_mask */
b34976b6 200 TRUE), /* pcrel_offset */
f2352488
JL
201#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
202 HOWTO (R_H8_PCREL8, /* type */
203 0, /* rightshift */
204 0, /* size (0 = byte, 1 = short, 2 = long) */
205 8, /* bitsize */
b34976b6 206 TRUE, /* pc_relative */
f2352488 207 0, /* bitpos */
9d29900b
NC
208 complain_overflow_signed,/* complain_on_overflow */
209 special, /* special_function */
f2352488 210 "R_H8_PCREL8", /* name */
b34976b6 211 FALSE, /* partial_inplace */
f2352488
JL
212 0xff, /* src_mask */
213 0xff, /* dst_mask */
b34976b6 214 TRUE), /* pcrel_offset */
e01b0e69
JR
215};
216
217/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
218
bc7eab72 219struct elf_reloc_map {
e01b0e69
JR
220 bfd_reloc_code_real_type bfd_reloc_val;
221 unsigned char howto_index;
222};
223
6288878d 224/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 225
bc7eab72 226static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
227 { BFD_RELOC_NONE, R_H8_NONE_X },
228 { BFD_RELOC_32, R_H8_DIR32_X },
229 { BFD_RELOC_16, R_H8_DIR16_X },
230 { BFD_RELOC_8, R_H8_DIR8_X },
231 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
232 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
233 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
234 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
235 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
f2352488
JL
236 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
237 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
238};
239
0a83638b 240
e01b0e69 241static reloc_howto_type *
c6baf75e
RS
242elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
243 bfd_reloc_code_real_type code)
e01b0e69
JR
244{
245 unsigned int i;
246
247 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
248 {
249 if (h8_reloc_map[i].bfd_reloc_val == code)
250 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
251 }
252 return NULL;
253}
254
157090f7
AM
255static reloc_howto_type *
256elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
257 const char *r_name)
258{
259 unsigned int i;
260
261 for (i = 0;
262 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
263 i++)
264 if (h8_elf_howto_table[i].name != NULL
265 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
266 return &h8_elf_howto_table[i];
267
268 return NULL;
269}
270
e01b0e69 271static void
c6baf75e
RS
272elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
273 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
274{
275 unsigned int r;
276 unsigned int i;
277
278 r = ELF32_R_TYPE (elf_reloc->r_info);
279 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 280 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
281 {
282 bfd_reloc->howto = &h8_elf_howto_table[i];
283 return;
284 }
285 abort ();
286}
287
288static void
c6baf75e
RS
289elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
290 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69
JR
291{
292 unsigned int r;
293
294 abort ();
295 r = ELF32_R_TYPE (elf_reloc->r_info);
296 bfd_reloc->howto = &h8_elf_howto_table[r];
297}
298
a00c9dbc
JL
299/* Special handling for H8/300 relocs.
300 We only come here for pcrel stuff and return normally if not an -r link.
301 When doing -r, we can't do any arithmetic for the pcrel stuff, because
302 we support relaxing on the H8/300 series chips. */
303static bfd_reloc_status_type
c6baf75e
RS
304special (bfd *abfd ATTRIBUTE_UNUSED,
305 arelent *reloc_entry ATTRIBUTE_UNUSED,
306 asymbol *symbol ATTRIBUTE_UNUSED,
307 PTR data ATTRIBUTE_UNUSED,
308 asection *input_section ATTRIBUTE_UNUSED,
309 bfd *output_bfd,
310 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
311{
312 if (output_bfd == (bfd *) NULL)
313 return bfd_reloc_continue;
314
315 /* Adjust the reloc address to that in the output section. */
316 reloc_entry->address += input_section->output_offset;
317 return bfd_reloc_ok;
318}
5e47149d
JL
319
320/* Perform a relocation as part of a final link. */
321static bfd_reloc_status_type
c6baf75e
RS
322elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
323 bfd *output_bfd ATTRIBUTE_UNUSED,
324 asection *input_section ATTRIBUTE_UNUSED,
325 bfd_byte *contents, bfd_vma offset,
326 bfd_vma value, bfd_vma addend,
327 struct bfd_link_info *info ATTRIBUTE_UNUSED,
328 asection *sym_sec ATTRIBUTE_UNUSED,
329 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
330{
331 bfd_byte *hit_data = contents + offset;
332
333 switch (r_type)
334 {
5e47149d
JL
335 case R_H8_NONE:
336 return bfd_reloc_ok;
337
338 case R_H8_DIR32:
339 case R_H8_DIR32A16:
a00c9dbc 340 case R_H8_DIR24A8:
5e47149d
JL
341 value += addend;
342 bfd_put_32 (input_bfd, value, hit_data);
343 return bfd_reloc_ok;
344
345 case R_H8_DIR16:
346 case R_H8_DIR16A8:
347 case R_H8_DIR16R8:
348 value += addend;
349 bfd_put_16 (input_bfd, value, hit_data);
350 return bfd_reloc_ok;
351
352 /* AKA R_RELBYTE */
353 case R_H8_DIR8:
354 value += addend;
355
5e47149d
JL
356 bfd_put_8 (input_bfd, value, hit_data);
357 return bfd_reloc_ok;
358
5e47149d
JL
359 case R_H8_DIR24R8:
360 value += addend;
361
a00c9dbc 362 /* HIT_DATA is the address for the first byte for the relocated
e804e836 363 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
364 hunks. */
365 hit_data--;
366
367 /* Clear out the top byte in value. */
5e47149d 368 value &= 0xffffff;
a00c9dbc
JL
369
370 /* Retrieve the type byte for value from the section contents. */
5e47149d 371 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 372
e804e836 373 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
374 bfd_put_32 (input_bfd, value, hit_data);
375 return bfd_reloc_ok;
376
f2352488
JL
377 case R_H8_PCREL16:
378 value -= (input_section->output_section->vma
379 + input_section->output_offset);
380 value -= offset;
381 value += addend;
382
a00c9dbc
JL
383 /* The value is relative to the start of the instruction,
384 not the relocation offset. Subtract 2 to account for
385 this minor issue. */
386 value -= 2;
387
f2352488
JL
388 bfd_put_16 (input_bfd, value, hit_data);
389 return bfd_reloc_ok;
390
391 case R_H8_PCREL8:
392 value -= (input_section->output_section->vma
393 + input_section->output_offset);
394 value -= offset;
395 value += addend;
396
a00c9dbc
JL
397 /* The value is relative to the start of the instruction,
398 not the relocation offset. Subtract 1 to account for
399 this minor issue. */
400 value -= 1;
401
f2352488
JL
402 bfd_put_8 (input_bfd, value, hit_data);
403 return bfd_reloc_ok;
404
5e47149d
JL
405 default:
406 return bfd_reloc_notsupported;
407 }
408}
409\f
410/* Relocate an H8 ELF section. */
b34976b6 411static bfd_boolean
c6baf75e
RS
412elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
413 bfd *input_bfd, asection *input_section,
414 bfd_byte *contents, Elf_Internal_Rela *relocs,
415 Elf_Internal_Sym *local_syms,
416 asection **local_sections)
5e47149d
JL
417{
418 Elf_Internal_Shdr *symtab_hdr;
419 struct elf_link_hash_entry **sym_hashes;
420 Elf_Internal_Rela *rel, *relend;
421
422 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
423 sym_hashes = elf_sym_hashes (input_bfd);
424
425 rel = relocs;
426 relend = relocs + input_section->reloc_count;
427 for (; rel < relend; rel++)
428 {
dc810e39 429 unsigned int r_type;
5e47149d
JL
430 unsigned long r_symndx;
431 Elf_Internal_Sym *sym;
432 asection *sec;
433 struct elf_link_hash_entry *h;
434 bfd_vma relocation;
435 bfd_reloc_status_type r;
ab96bf03
AM
436 arelent bfd_reloc;
437 reloc_howto_type *howto;
438
439 elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel);
440 howto = bfd_reloc.howto;
5e47149d
JL
441
442 r_symndx = ELF32_R_SYM (rel->r_info);
443 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
444 h = NULL;
445 sym = NULL;
446 sec = NULL;
447 if (r_symndx < symtab_hdr->sh_info)
448 {
449 sym = local_syms + r_symndx;
450 sec = local_sections[r_symndx];
8517fae7 451 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
452 }
453 else
454 {
59c2e50f
L
455 bfd_boolean unresolved_reloc, warned;
456
b2a8e766
AM
457 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
458 r_symndx, symtab_hdr, sym_hashes,
459 h, sec, relocation,
460 unresolved_reloc, warned);
5e47149d
JL
461 }
462
ab96bf03
AM
463 if (sec != NULL && elf_discarded_section (sec))
464 {
465 /* For relocs against symbols from removed linkonce sections,
466 or sections discarded by a linker script, we just want the
467 section contents zeroed. Avoid any special processing. */
468 _bfd_clear_contents (howto, input_bfd, contents + rel->r_offset);
469 rel->r_info = 0;
470 rel->r_addend = 0;
471 continue;
472 }
473
474 if (info->relocatable)
475 continue;
476
5e47149d
JL
477 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
478 input_section,
479 contents, rel->r_offset,
480 relocation, rel->r_addend,
481 info, sec, h == NULL);
482
483 if (r != bfd_reloc_ok)
484 {
485 const char *name;
486 const char *msg = (const char *) 0;
dc810e39 487
5e47149d
JL
488 if (h != NULL)
489 name = h->root.root.string;
490 else
491 {
492 name = (bfd_elf_string_from_elf_section
493 (input_bfd, symtab_hdr->sh_link, sym->st_name));
494 if (name == NULL || *name == '\0')
495 name = bfd_section_name (input_bfd, sec);
496 }
497
498 switch (r)
499 {
500 case bfd_reloc_overflow:
501 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
502 (info, (h ? &h->root : NULL), name, howto->name,
503 (bfd_vma) 0, input_bfd, input_section,
504 rel->r_offset)))
b34976b6 505 return FALSE;
5e47149d
JL
506 break;
507
508 case bfd_reloc_undefined:
509 if (! ((*info->callbacks->undefined_symbol)
510 (info, name, input_bfd, input_section,
b34976b6
AM
511 rel->r_offset, TRUE)))
512 return FALSE;
5e47149d
JL
513 break;
514
515 case bfd_reloc_outofrange:
516 msg = _("internal error: out of range error");
517 goto common_error;
518
519 case bfd_reloc_notsupported:
520 msg = _("internal error: unsupported relocation error");
521 goto common_error;
522
523 case bfd_reloc_dangerous:
524 msg = _("internal error: dangerous error");
525 goto common_error;
526
527 default:
528 msg = _("internal error: unknown error");
529 /* fall through */
530
531 common_error:
532 if (!((*info->callbacks->warning)
533 (info, msg, name, input_bfd, input_section,
534 rel->r_offset)))
b34976b6 535 return FALSE;
5e47149d
JL
536 break;
537 }
538 }
539 }
540
b34976b6 541 return TRUE;
5e47149d
JL
542}
543
0a83638b
JL
544/* Object files encode the specific H8 model they were compiled
545 for in the ELF flags field.
546
547 Examine that field and return the proper BFD machine type for
548 the object file. */
dc810e39 549static unsigned long
c6baf75e 550elf32_h8_mach (flagword flags)
0a83638b
JL
551{
552 switch (flags & EF_H8_MACH)
553 {
554 case E_H8_MACH_H8300:
555 default:
556 return bfd_mach_h8300;
557
558 case E_H8_MACH_H8300H:
559 return bfd_mach_h8300h;
560
561 case E_H8_MACH_H8300S:
562 return bfd_mach_h8300s;
8d9cd6b1
NC
563
564 case E_H8_MACH_H8300HN:
565 return bfd_mach_h8300hn;
566
567 case E_H8_MACH_H8300SN:
568 return bfd_mach_h8300sn;
5d1db417
MS
569
570 case E_H8_MACH_H8300SX:
571 return bfd_mach_h8300sx;
f4984206
RS
572
573 case E_H8_MACH_H8300SXN:
574 return bfd_mach_h8300sxn;
0a83638b
JL
575 }
576}
577
578/* The final processing done just before writing out a H8 ELF object
579 file. We use this opportunity to encode the BFD machine type
580 into the flags field in the object file. */
581
dc810e39 582static void
c6baf75e
RS
583elf32_h8_final_write_processing (bfd *abfd,
584 bfd_boolean linker ATTRIBUTE_UNUSED)
0a83638b
JL
585{
586 unsigned long val;
587
588 switch (bfd_get_mach (abfd))
589 {
590 default:
591 case bfd_mach_h8300:
592 val = E_H8_MACH_H8300;
593 break;
594
595 case bfd_mach_h8300h:
596 val = E_H8_MACH_H8300H;
597 break;
598
599 case bfd_mach_h8300s:
600 val = E_H8_MACH_H8300S;
601 break;
8d9cd6b1
NC
602
603 case bfd_mach_h8300hn:
604 val = E_H8_MACH_H8300HN;
605 break;
606
607 case bfd_mach_h8300sn:
608 val = E_H8_MACH_H8300SN;
609 break;
5d1db417
MS
610
611 case bfd_mach_h8300sx:
612 val = E_H8_MACH_H8300SX;
613 break;
f4984206
RS
614
615 case bfd_mach_h8300sxn:
616 val = E_H8_MACH_H8300SXN;
617 break;
0a83638b
JL
618 }
619
620 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
621 elf_elfheader (abfd)->e_flags |= val;
622}
623
624/* Return nonzero if ABFD represents a valid H8 ELF object file; also
625 record the encoded machine type found in the ELF flags. */
626
b34976b6 627static bfd_boolean
c6baf75e 628elf32_h8_object_p (bfd *abfd)
0a83638b
JL
629{
630 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
631 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 632 return TRUE;
0a83638b
JL
633}
634
635/* Merge backend specific data from an object file to the output
636 object file when linking. The only data we need to copy at this
637 time is the architecture/machine information. */
638
b34976b6 639static bfd_boolean
c6baf75e 640elf32_h8_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
0a83638b
JL
641{
642 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
643 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 644 return TRUE;
0a83638b
JL
645
646 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
647 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
648 {
649 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
650 bfd_get_mach (ibfd)))
651 return FALSE;
0a83638b
JL
652 }
653
b34976b6 654 return TRUE;
0a83638b
JL
655}
656
5907e628
JL
657/* This function handles relaxing for the H8..
658
4cc11e76 659 There are a few relaxing opportunities available on the H8:
5907e628
JL
660
661 jmp/jsr:24 -> bra/bsr:8 2 bytes
662 The jmp may be completely eliminated if the previous insn is a
663 conditional branch to the insn after the jump. In that case
664 we invert the branch and delete the jump and save 4 bytes.
665
666 bCC:16 -> bCC:8 2 bytes
667 bsr:16 -> bsr:8 2 bytes
668
630a7b0a
KH
669 bset:16 -> bset:8 2 bytes
670 bset:24/32 -> bset:8 4 bytes
671 (also applicable to other bit manipulation instructions)
672
5907e628
JL
673 mov.b:16 -> mov.b:8 2 bytes
674 mov.b:24/32 -> mov.b:8 4 bytes
675
7e89635a
KH
676 bset:24/32 -> bset:16 2 bytes
677 (also applicable to other bit manipulation instructions)
678
76f99c63 679 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes */
5907e628 680
b34976b6 681static bfd_boolean
c6baf75e
RS
682elf32_h8_relax_section (bfd *abfd, asection *sec,
683 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
684{
685 Elf_Internal_Shdr *symtab_hdr;
686 Elf_Internal_Rela *internal_relocs;
5907e628
JL
687 Elf_Internal_Rela *irel, *irelend;
688 bfd_byte *contents = NULL;
6cdc0ccc 689 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
690 static asection *last_input_section = NULL;
691 static Elf_Internal_Rela *last_reloc = NULL;
692
693 /* Assume nothing changes. */
b34976b6 694 *again = FALSE;
5907e628 695
1049f94e 696 /* We don't have to do anything for a relocatable link, if
5907e628
JL
697 this section does not have relocs, or if this is not a
698 code section. */
1049f94e 699 if (link_info->relocatable
5907e628
JL
700 || (sec->flags & SEC_RELOC) == 0
701 || sec->reloc_count == 0
702 || (sec->flags & SEC_CODE) == 0)
b34976b6 703 return TRUE;
5907e628 704
5907e628
JL
705 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
706
707 /* Get a copy of the native relocations. */
45d6a902 708 internal_relocs = (_bfd_elf_link_read_relocs
5907e628
JL
709 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
710 link_info->keep_memory));
711 if (internal_relocs == NULL)
712 goto error_return;
5907e628
JL
713
714 if (sec != last_input_section)
715 last_reloc = NULL;
716
717 last_input_section = sec;
718
719 /* Walk through the relocs looking for relaxing opportunities. */
720 irelend = internal_relocs + sec->reloc_count;
721 for (irel = internal_relocs; irel < irelend; irel++)
722 {
723 bfd_vma symval;
724
725 /* Keep track of the previous reloc so that we can delete
726 some long jumps created by the compiler. */
727 if (irel != internal_relocs)
728 last_reloc = irel - 1;
729
76f99c63
JL
730 if (ELF32_R_TYPE (irel->r_info) != R_H8_DIR24R8
731 && ELF32_R_TYPE (irel->r_info) != R_H8_PCREL16
732 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR16A8
733 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR24A8
734 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR32A16)
735 continue;
736
5907e628
JL
737 /* Get the section contents if we haven't done so already. */
738 if (contents == NULL)
739 {
740 /* Get cached copy if it exists. */
741 if (elf_section_data (sec)->this_hdr.contents != NULL)
742 contents = elf_section_data (sec)->this_hdr.contents;
743 else
744 {
745 /* Go get them off disk. */
eea6121a 746 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
747 goto error_return;
748 }
749 }
750
9ad5cbcf 751 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 752 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 753 {
6cdc0ccc
AM
754 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
755 if (isymbuf == NULL)
756 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
757 symtab_hdr->sh_info, 0,
758 NULL, NULL, NULL);
759 if (isymbuf == NULL)
760 goto error_return;
5907e628
JL
761 }
762
763 /* Get the value of the symbol referred to by the reloc. */
764 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
765 {
5907e628 766 /* A local symbol. */
6cdc0ccc
AM
767 Elf_Internal_Sym *isym;
768 asection *sym_sec;
5907e628 769
32ac2c9a 770 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 771 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
772 symval = isym->st_value;
773 /* If the reloc is absolute, it will not have
774 a symbol or section associated with it. */
775 if (sym_sec)
776 symval += sym_sec->output_section->vma
777 + sym_sec->output_offset;
5907e628
JL
778 }
779 else
780 {
781 unsigned long indx;
782 struct elf_link_hash_entry *h;
783
784 /* An external symbol. */
785 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
786 h = elf_sym_hashes (abfd)[indx];
787 BFD_ASSERT (h != NULL);
788 if (h->root.type != bfd_link_hash_defined
789 && h->root.type != bfd_link_hash_defweak)
790 {
791 /* This appears to be a reference to an undefined
792 symbol. Just ignore it--it will be caught by the
793 regular reloc processing. */
794 continue;
795 }
796
797 symval = (h->root.u.def.value
798 + h->root.u.def.section->output_section->vma
799 + h->root.u.def.section->output_offset);
800 }
801
802 /* For simplicity of coding, we are going to modify the section
803 contents, the section relocs, and the BFD symbol table. We
804 must tell the rest of the code not to free up this
805 information. It would be possible to instead create a table
806 of changes which have to be made, as is done in coff-mips.c;
807 that would be more work, but would require less memory when
808 the linker is run. */
809 switch (ELF32_R_TYPE (irel->r_info))
810 {
e804e836 811 /* Try to turn a 24-bit absolute branch/call into an 8-bit
5907e628
JL
812 pc-relative branch/call. */
813 case R_H8_DIR24R8:
814 {
815 bfd_vma value = symval + irel->r_addend;
816 bfd_vma dot, gap;
817
818 /* Get the address of this instruction. */
819 dot = (sec->output_section->vma
820 + sec->output_offset + irel->r_offset - 1);
821
822 /* Compute the distance from this insn to the branch target. */
823 gap = value - dot;
824
825 /* If the distance is within -126..+130 inclusive, then we can
826 relax this jump. +130 is valid since the target will move
827 two bytes closer if we do relax this branch. */
dc810e39 828 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
829 {
830 unsigned char code;
831
832 /* Note that we've changed the relocs, section contents,
833 etc. */
834 elf_section_data (sec)->relocs = internal_relocs;
5907e628 835 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 836 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 837
e514ac71
NC
838 /* Get the instruction code being relaxed. */
839 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
840
5907e628
JL
841 /* If the previous instruction conditionally jumped around
842 this instruction, we may be able to reverse the condition
843 and redirect the previous instruction to the target of
844 this instruction.
845
846 Such sequences are used by the compiler to deal with
e514ac71
NC
847 long conditional branches.
848
849 Only perform this optimisation for jumps (code 0x5a) not
850 subroutine calls, as otherwise it could transform:
b34976b6 851
e514ac71
NC
852 mov.w r0,r0
853 beq .L1
854 jsr @_bar
855 .L1: rts
856 _bar: rts
857 into:
858 mov.w r0,r0
859 bne _bar
860 rts
861 _bar: rts
862
863 which changes the call (jsr) into a branch (bne). */
864 if (code == 0x5a
865 && (int) gap <= 130
dc810e39 866 && (int) gap >= -128
5907e628
JL
867 && last_reloc
868 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
869 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
870 {
871 bfd_vma last_value;
872 asection *last_sym_sec;
6cdc0ccc 873 Elf_Internal_Sym *last_sym;
5907e628
JL
874
875 /* We will need to examine the symbol used by the
876 previous relocation. */
dc810e39 877
6cdc0ccc 878 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 879 last_sym_sec
6cdc0ccc
AM
880 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
881 last_value = (last_sym->st_value
5907e628
JL
882 + last_sym_sec->output_section->vma
883 + last_sym_sec->output_offset);
884
885 /* Verify that the previous relocation was for a
886 branch around this instruction and that no symbol
887 exists at the current location. */
888 if (last_value == dot + 4
889 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 890 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
891 {
892 /* We can eliminate this jump. Twiddle the
893 previous relocation as necessary. */
894 irel->r_info
895 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
896 ELF32_R_TYPE (R_H8_NONE));
897
bc7eab72 898 last_reloc->r_info
5907e628 899 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
900 ELF32_R_TYPE (R_H8_PCREL8));
901 last_reloc->r_addend = irel->r_addend;
5907e628
JL
902
903 code = bfd_get_8 (abfd,
904 contents + last_reloc->r_offset - 1);
905 code ^= 1;
906 bfd_put_8 (abfd,
907 code,
908 contents + last_reloc->r_offset - 1);
909
910 /* Delete four bytes of data. */
911 if (!elf32_h8_relax_delete_bytes (abfd, sec,
912 irel->r_offset - 1,
913 4))
914 goto error_return;
915
b34976b6 916 *again = TRUE;
5907e628
JL
917 break;
918 }
919 }
920
5907e628 921 if (code == 0x5e)
7e89635a 922 /* This is jsr. */
5907e628
JL
923 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1);
924 else if (code == 0x5a)
7e89635a 925 /* This is jmp. */
5907e628
JL
926 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1);
927 else
928 abort ();
929
930 /* Fix the relocation's type. */
931 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
932 R_H8_PCREL8);
933
934 /* Delete two bytes of data. */
935 if (!elf32_h8_relax_delete_bytes (abfd, sec,
936 irel->r_offset + 1, 2))
937 goto error_return;
938
939 /* That will change things, so, we should relax again.
940 Note that this is not required, and it may be slow. */
b34976b6 941 *again = TRUE;
5907e628
JL
942 }
943 break;
944 }
945
e804e836 946 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
5907e628
JL
947 branch. */
948 case R_H8_PCREL16:
949 {
950 bfd_vma value = symval + irel->r_addend;
951 bfd_vma dot;
952 bfd_vma gap;
953
954 /* Get the address of this instruction. */
955 dot = (sec->output_section->vma
956 + sec->output_offset
957 + irel->r_offset - 2);
dc810e39 958
5907e628
JL
959 gap = value - dot;
960
961 /* If the distance is within -126..+130 inclusive, then we can
962 relax this jump. +130 is valid since the target will move
963 two bytes closer if we do relax this branch. */
bc7eab72 964 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 965 {
bc7eab72 966 unsigned char code;
5907e628 967
bc7eab72 968 /* Note that we've changed the relocs, section contents,
5907e628 969 etc. */
bc7eab72
KH
970 elf_section_data (sec)->relocs = internal_relocs;
971 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 972 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 973
bc7eab72
KH
974 /* Get the opcode. */
975 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
976
977 if (code == 0x58)
978 {
979 /* bCC:16 -> bCC:8 */
7e89635a
KH
980 /* Get the second byte of the original insn, which
981 contains the condition code. */
5907e628 982 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a
KH
983
984 /* Compute the fisrt byte of the relaxed
985 instruction. The original sequence 0x58 0xX0
986 is relaxed to 0x4X, where X represents the
987 condition code. */
5907e628
JL
988 code &= 0xf0;
989 code >>= 4;
990 code |= 0x40;
991 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
992 }
993 else if (code == 0x5c)
7e89635a 994 /* This is bsr. */
5907e628
JL
995 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2);
996 else
997 abort ();
998
999 /* Fix the relocation's type. */
bc7eab72 1000 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1001 R_H8_PCREL8);
bc7eab72 1002 irel->r_offset--;
5907e628 1003
bc7eab72
KH
1004 /* Delete two bytes of data. */
1005 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1006 irel->r_offset + 1, 2))
1007 goto error_return;
1008
bc7eab72 1009 /* That will change things, so, we should relax again.
5907e628 1010 Note that this is not required, and it may be slow. */
b34976b6 1011 *again = TRUE;
5907e628
JL
1012 }
1013 break;
1014 }
1015
630a7b0a
KH
1016 /* This is a 16-bit absolute address in one of the following
1017 instructions:
1018
1019 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1020 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1021 "mov.b"
1022
1023 We may relax this into an 8-bit absolute address if it's in
1024 the right range. */
5907e628
JL
1025 case R_H8_DIR16A8:
1026 {
7a9823f1 1027 bfd_vma value;
5907e628 1028
7a9823f1
RS
1029 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1030 if (value >= 0xffffff00u)
5907e628 1031 {
bc7eab72 1032 unsigned char code;
ca9a79a1 1033 unsigned char temp_code;
5907e628 1034
bc7eab72 1035 /* Note that we've changed the relocs, section contents,
5907e628 1036 etc. */
bc7eab72
KH
1037 elf_section_data (sec)->relocs = internal_relocs;
1038 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1039 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1040
bc7eab72
KH
1041 /* Get the opcode. */
1042 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1043
630a7b0a
KH
1044 /* All instructions with R_H8_DIR16A8 start with
1045 0x6a. */
bc7eab72 1046 if (code != 0x6a)
5907e628
JL
1047 abort ();
1048
ca9a79a1 1049 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1050 /* If this is a mov.b instruction, clear the lower
1051 nibble, which contains the source/destination
1052 register number. */
ca9a79a1
NC
1053 if ((temp_code & 0x10) != 0x10)
1054 temp_code &= 0xf0;
5907e628 1055
ca9a79a1
NC
1056 switch (temp_code)
1057 {
1058 case 0x00:
630a7b0a 1059 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1060 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1061 contents + irel->r_offset - 2);
1062 break;
1063 case 0x80:
630a7b0a 1064 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1065 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1066 contents + irel->r_offset - 2);
1067 break;
1068 case 0x18:
630a7b0a
KH
1069 /* This is a bit-maniputation instruction that
1070 stores one bit into memory, one of "bclr",
1071 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1072 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1073 break;
1074 case 0x10:
630a7b0a
KH
1075 /* This is a bit-maniputation instruction that
1076 loads one bit from memory, one of "band",
1077 "biand", "bild", "bior", "bixor", "bld", "bor",
1078 "btst", and "bxor". */
ca9a79a1
NC
1079 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1080 break;
1081 default:
1082 abort ();
1083 }
5907e628 1084
bc7eab72
KH
1085 /* Fix the relocation's type. */
1086 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1087 R_H8_DIR8);
1088
8c17da6e
NC
1089 /* Move the relocation. */
1090 irel->r_offset--;
1091
bc7eab72
KH
1092 /* Delete two bytes of data. */
1093 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1094 irel->r_offset + 1, 2))
1095 goto error_return;
1096
bc7eab72 1097 /* That will change things, so, we should relax again.
5907e628 1098 Note that this is not required, and it may be slow. */
b34976b6 1099 *again = TRUE;
5907e628
JL
1100 }
1101 break;
1102 }
1103
630a7b0a
KH
1104 /* This is a 24-bit absolute address in one of the following
1105 instructions:
1106
1107 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1108 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1109 "mov.b"
1110
1111 We may relax this into an 8-bit absolute address if it's in
1112 the right range. */
5907e628
JL
1113 case R_H8_DIR24A8:
1114 {
7a9823f1 1115 bfd_vma value;
5907e628 1116
7a9823f1
RS
1117 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1118 if (value >= 0xffffff00u)
5907e628 1119 {
bc7eab72 1120 unsigned char code;
ca9a79a1 1121 unsigned char temp_code;
5907e628 1122
bc7eab72 1123 /* Note that we've changed the relocs, section contents,
5907e628 1124 etc. */
bc7eab72
KH
1125 elf_section_data (sec)->relocs = internal_relocs;
1126 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1127 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1128
bc7eab72
KH
1129 /* Get the opcode. */
1130 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1131
630a7b0a
KH
1132 /* All instructions with R_H8_DIR24A8 start with
1133 0x6a. */
bc7eab72 1134 if (code != 0x6a)
5907e628
JL
1135 abort ();
1136
ca9a79a1
NC
1137 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1138
630a7b0a
KH
1139 /* If this is a mov.b instruction, clear the lower
1140 nibble, which contains the source/destination
1141 register number. */
ca9a79a1
NC
1142 if ((temp_code & 0x30) != 0x30)
1143 temp_code &= 0xf0;
5907e628 1144
ca9a79a1 1145 switch (temp_code)
03d14457 1146 {
7a9823f1 1147 case 0x20:
630a7b0a 1148 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1149 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1150 contents + irel->r_offset - 2);
1151 break;
7a9823f1 1152 case 0xa0:
630a7b0a 1153 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1154 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1155 contents + irel->r_offset - 2);
1156 break;
ca9a79a1 1157 case 0x38:
630a7b0a
KH
1158 /* This is a bit-maniputation instruction that
1159 stores one bit into memory, one of "bclr",
1160 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1161 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1162 break;
1163 case 0x30:
630a7b0a
KH
1164 /* This is a bit-maniputation instruction that
1165 loads one bit from memory, one of "band",
1166 "biand", "bild", "bior", "bixor", "bld", "bor",
1167 "btst", and "bxor". */
ca9a79a1
NC
1168 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1169 break;
03d14457 1170 default:
ca9a79a1 1171 abort();
03d14457
NC
1172 }
1173
bc7eab72
KH
1174 /* Fix the relocation's type. */
1175 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1176 R_H8_DIR8);
7a9823f1 1177 irel->r_offset--;
5907e628 1178
bc7eab72 1179 /* Delete two bytes of data. */
7a9823f1
RS
1180 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1181 irel->r_offset + 1, 4))
5907e628
JL
1182 goto error_return;
1183
bc7eab72 1184 /* That will change things, so, we should relax again.
5907e628 1185 Note that this is not required, and it may be slow. */
b34976b6 1186 *again = TRUE;
7a9823f1 1187 break;
5907e628
JL
1188 }
1189 }
1190
7e89635a
KH
1191 /* Fall through. */
1192
1193 /* This is a 24-/32-bit absolute address in one of the
1194 following instructions:
1195
1196 "band", "bclr", "biand", "bild", "bior", "bist",
1197 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
3255318a 1198 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1199
7e89635a
KH
1200 We may relax this into an 16-bit absolute address if it's
1201 in the right range. */
5907e628
JL
1202 case R_H8_DIR32A16:
1203 {
7a9823f1 1204 bfd_vma value;
5907e628 1205
7a9823f1
RS
1206 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1207 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1208 {
bc7eab72 1209 unsigned char code;
5907e628 1210
bc7eab72 1211 /* Note that we've changed the relocs, section contents,
5907e628 1212 etc. */
bc7eab72
KH
1213 elf_section_data (sec)->relocs = internal_relocs;
1214 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1215 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1216
bc7eab72
KH
1217 /* Get the opcode. */
1218 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1219
7e89635a
KH
1220 /* Fix the opcode. For all the instructions that
1221 belong to this relaxation, we simply need to turn
1222 off bit 0x20 in the previous byte. */
bc7eab72 1223 code &= ~0x20;
5907e628 1224
bc7eab72 1225 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1226
bc7eab72
KH
1227 /* Fix the relocation's type. */
1228 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1229 R_H8_DIR16);
5907e628 1230
bc7eab72
KH
1231 /* Delete two bytes of data. */
1232 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1233 irel->r_offset + 1, 2))
1234 goto error_return;
1235
bc7eab72 1236 /* That will change things, so, we should relax again.
5907e628 1237 Note that this is not required, and it may be slow. */
b34976b6 1238 *again = TRUE;
5907e628
JL
1239 }
1240 break;
1241 }
1242
1243 default:
1244 break;
1245 }
1246 }
1247
6cdc0ccc
AM
1248 if (isymbuf != NULL
1249 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1250 {
6cdc0ccc
AM
1251 if (! link_info->keep_memory)
1252 free (isymbuf);
1253 else
1254 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1255 }
1256
6cdc0ccc
AM
1257 if (contents != NULL
1258 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1259 {
1260 if (! link_info->keep_memory)
6cdc0ccc 1261 free (contents);
5907e628
JL
1262 else
1263 {
1264 /* Cache the section contents for elf_link_input_bfd. */
1265 elf_section_data (sec)->this_hdr.contents = contents;
1266 }
9ad5cbcf
AM
1267 }
1268
6cdc0ccc
AM
1269 if (internal_relocs != NULL
1270 && elf_section_data (sec)->relocs != internal_relocs)
1271 free (internal_relocs);
5907e628 1272
b34976b6 1273 return TRUE;
5907e628
JL
1274
1275 error_return:
6cdc0ccc
AM
1276 if (isymbuf != NULL
1277 && symtab_hdr->contents != (unsigned char *) isymbuf)
1278 free (isymbuf);
1279 if (contents != NULL
1280 && elf_section_data (sec)->this_hdr.contents != contents)
1281 free (contents);
1282 if (internal_relocs != NULL
1283 && elf_section_data (sec)->relocs != internal_relocs)
1284 free (internal_relocs);
b34976b6 1285 return FALSE;
5907e628
JL
1286}
1287
1288/* Delete some bytes from a section while relaxing. */
1289
b34976b6 1290static bfd_boolean
c6baf75e 1291elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1292{
1293 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1294 unsigned int sec_shndx;
5907e628
JL
1295 bfd_byte *contents;
1296 Elf_Internal_Rela *irel, *irelend;
1297 Elf_Internal_Rela *irelalign;
6cdc0ccc
AM
1298 Elf_Internal_Sym *isym;
1299 Elf_Internal_Sym *isymend;
5907e628 1300 bfd_vma toaddr;
9ad5cbcf
AM
1301 struct elf_link_hash_entry **sym_hashes;
1302 struct elf_link_hash_entry **end_hashes;
1303 unsigned int symcount;
5907e628 1304
9ad5cbcf 1305 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1306
1307 contents = elf_section_data (sec)->this_hdr.contents;
1308
1309 /* The deletion must stop at the next ALIGN reloc for an aligment
1310 power larger than the number of bytes we are deleting. */
1311
1312 irelalign = NULL;
eea6121a 1313 toaddr = sec->size;
5907e628
JL
1314
1315 irel = elf_section_data (sec)->relocs;
1316 irelend = irel + sec->reloc_count;
1317
1318 /* Actually delete the bytes. */
dc810e39
AM
1319 memmove (contents + addr, contents + addr + count,
1320 (size_t) (toaddr - addr - count));
eea6121a 1321 sec->size -= count;
5907e628
JL
1322
1323 /* Adjust all the relocs. */
1324 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1325 {
1326 /* Get the new reloc address. */
1327 if ((irel->r_offset > addr
1328 && irel->r_offset < toaddr))
1329 irel->r_offset -= count;
1330 }
1331
1332 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1333 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1334 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1335 isymend = isym + symtab_hdr->sh_info;
1336 for (; isym < isymend; isym++)
5907e628 1337 {
6cdc0ccc
AM
1338 if (isym->st_shndx == sec_shndx
1339 && isym->st_value > addr
1340 && isym->st_value < toaddr)
1341 isym->st_value -= count;
5907e628
JL
1342 }
1343
1344 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1345 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1346 - symtab_hdr->sh_info);
1347 sym_hashes = elf_sym_hashes (abfd);
1348 end_hashes = sym_hashes + symcount;
1349 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1350 {
9ad5cbcf
AM
1351 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1352 if ((sym_hash->root.type == bfd_link_hash_defined
1353 || sym_hash->root.type == bfd_link_hash_defweak)
1354 && sym_hash->root.u.def.section == sec
1355 && sym_hash->root.u.def.value > addr
1356 && sym_hash->root.u.def.value < toaddr)
5907e628 1357 {
9ad5cbcf 1358 sym_hash->root.u.def.value -= count;
5907e628
JL
1359 }
1360 }
1361
b34976b6 1362 return TRUE;
5907e628
JL
1363}
1364
b34976b6
AM
1365/* Return TRUE if a symbol exists at the given address, else return
1366 FALSE. */
1367static bfd_boolean
c6baf75e 1368elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1369{
1370 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1371 unsigned int sec_shndx;
6cdc0ccc
AM
1372 Elf_Internal_Sym *isym;
1373 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1374 struct elf_link_hash_entry **sym_hashes;
1375 struct elf_link_hash_entry **end_hashes;
1376 unsigned int symcount;
5907e628 1377
9ad5cbcf 1378 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1379
1380 /* Examine all the symbols. */
9ad5cbcf 1381 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1382 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1383 isymend = isym + symtab_hdr->sh_info;
1384 for (; isym < isymend; isym++)
5907e628 1385 {
6cdc0ccc
AM
1386 if (isym->st_shndx == sec_shndx
1387 && isym->st_value == addr)
b34976b6 1388 return TRUE;
5907e628
JL
1389 }
1390
9ad5cbcf
AM
1391 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1392 - symtab_hdr->sh_info);
1393 sym_hashes = elf_sym_hashes (abfd);
1394 end_hashes = sym_hashes + symcount;
1395 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1396 {
9ad5cbcf
AM
1397 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1398 if ((sym_hash->root.type == bfd_link_hash_defined
1399 || sym_hash->root.type == bfd_link_hash_defweak)
1400 && sym_hash->root.u.def.section == sec
1401 && sym_hash->root.u.def.value == addr)
b34976b6 1402 return TRUE;
5907e628 1403 }
9ad5cbcf 1404
b34976b6 1405 return FALSE;
5907e628
JL
1406}
1407
1408/* This is a version of bfd_generic_get_relocated_section_contents
1409 which uses elf32_h8_relocate_section. */
1410
1411static bfd_byte *
c6baf75e
RS
1412elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1413 struct bfd_link_info *link_info,
1414 struct bfd_link_order *link_order,
1415 bfd_byte *data,
1416 bfd_boolean relocatable,
1417 asymbol **symbols)
5907e628
JL
1418{
1419 Elf_Internal_Shdr *symtab_hdr;
1420 asection *input_section = link_order->u.indirect.section;
1421 bfd *input_bfd = input_section->owner;
1422 asection **sections = NULL;
1423 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1424 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1425
1426 /* We only need to handle the case of relaxing, or of having a
1427 particular set of section contents, specially. */
1049f94e 1428 if (relocatable
5907e628
JL
1429 || elf_section_data (input_section)->this_hdr.contents == NULL)
1430 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1431 link_order, data,
1049f94e 1432 relocatable,
5907e628
JL
1433 symbols);
1434
1435 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1436
1437 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1438 (size_t) input_section->size);
5907e628
JL
1439
1440 if ((input_section->flags & SEC_RELOC) != 0
1441 && input_section->reloc_count > 0)
1442 {
5907e628 1443 asection **secpp;
6cdc0ccc 1444 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1445 bfd_size_type amt;
5907e628 1446
45d6a902 1447 internal_relocs = (_bfd_elf_link_read_relocs
5907e628 1448 (input_bfd, input_section, (PTR) NULL,
b34976b6 1449 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1450 if (internal_relocs == NULL)
1451 goto error_return;
1452
6cdc0ccc
AM
1453 if (symtab_hdr->sh_info != 0)
1454 {
1455 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1456 if (isymbuf == NULL)
1457 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1458 symtab_hdr->sh_info, 0,
1459 NULL, NULL, NULL);
1460 if (isymbuf == NULL)
1461 goto error_return;
1462 }
5907e628 1463
9ad5cbcf
AM
1464 amt = symtab_hdr->sh_info;
1465 amt *= sizeof (asection *);
1466 sections = (asection **) bfd_malloc (amt);
1467 if (sections == NULL && amt != 0)
5907e628
JL
1468 goto error_return;
1469
6cdc0ccc
AM
1470 isymend = isymbuf + symtab_hdr->sh_info;
1471 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1472 {
1473 asection *isec;
1474
6cdc0ccc 1475 if (isym->st_shndx == SHN_UNDEF)
5907e628 1476 isec = bfd_und_section_ptr;
6cdc0ccc 1477 else if (isym->st_shndx == SHN_ABS)
5907e628 1478 isec = bfd_abs_section_ptr;
6cdc0ccc 1479 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1480 isec = bfd_com_section_ptr;
1481 else
6cdc0ccc 1482 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1483
1484 *secpp = isec;
1485 }
1486
1487 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1488 input_section, data, internal_relocs,
6cdc0ccc 1489 isymbuf, sections))
5907e628
JL
1490 goto error_return;
1491
1492 if (sections != NULL)
1493 free (sections);
6cdc0ccc
AM
1494 if (isymbuf != NULL
1495 && symtab_hdr->contents != (unsigned char *) isymbuf)
1496 free (isymbuf);
1497 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1498 free (internal_relocs);
5907e628
JL
1499 }
1500
1501 return data;
1502
1503 error_return:
5907e628
JL
1504 if (sections != NULL)
1505 free (sections);
6cdc0ccc
AM
1506 if (isymbuf != NULL
1507 && symtab_hdr->contents != (unsigned char *) isymbuf)
1508 free (isymbuf);
1509 if (internal_relocs != NULL
1510 && elf_section_data (input_section)->relocs != internal_relocs)
1511 free (internal_relocs);
5907e628
JL
1512 return NULL;
1513}
1514
0a83638b 1515
e01b0e69
JR
1516#define TARGET_BIG_SYM bfd_elf32_h8300_vec
1517#define TARGET_BIG_NAME "elf32-h8300"
1518#define ELF_ARCH bfd_arch_h8300
1519#define ELF_MACHINE_CODE EM_H8_300
1520#define ELF_MAXPAGESIZE 0x1
1521#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1522#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
e01b0e69
JR
1523#define elf_info_to_howto elf32_h8_info_to_howto
1524#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1525
0a83638b
JL
1526/* So we can set/examine bits in e_flags to get the specific
1527 H8 architecture in use. */
1528#define elf_backend_final_write_processing \
1529 elf32_h8_final_write_processing
1530#define elf_backend_object_p \
1531 elf32_h8_object_p
1532#define bfd_elf32_bfd_merge_private_bfd_data \
1533 elf32_h8_merge_private_bfd_data
1534
e01b0e69
JR
1535/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1536 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1537 bfd_elf_size_dynamic_sections uses
e01b0e69
JR
1538 dynobj = elf_hash_table (info)->dynobj;
1539 and thus requires an elf hash table. */
1540#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1541
5e47149d
JL
1542/* Use an H8 specific linker, not the ELF generic linker. */
1543#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1544#define elf_backend_rela_normal 1
2627de83 1545#define elf_backend_can_gc_sections 1
5e47149d 1546
5907e628
JL
1547/* And relaxing stuff. */
1548#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1549#define bfd_elf32_bfd_get_relocated_section_contents \
1550 elf32_h8_get_relocated_section_contents
1551
1552
e01b0e69 1553#include "elf32-target.h"
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