PR exp/15109:
[deliverable/binutils-gdb.git] / bfd / elf32-h8300.c
CommitLineData
c2dcd04e 1/* BFD back-end for Renesas H8/300 ELF binaries.
ab96bf03 2 Copyright 1993, 1995, 1998, 1999, 2001, 2002, 2003, 2004, 2005, 2006,
dbaa2011 3 2007, 2008, 2009, 2010, 2012 Free Software Foundation, Inc.
e01b0e69 4
e514ac71 5 This file is part of BFD, the Binary File Descriptor library.
e01b0e69 6
e514ac71
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
cd123cb7 9 the Free Software Foundation; either version 3 of the License, or
e514ac71 10 (at your option) any later version.
e01b0e69 11
e514ac71
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
e01b0e69 16
e514ac71
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
cd123cb7
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
e01b0e69 21
e01b0e69 22#include "sysdep.h"
3db64b00 23#include "bfd.h"
e01b0e69
JR
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/h8.h"
27
28static reloc_howto_type *elf32_h8_reloc_type_lookup
c6baf75e 29 (bfd *abfd, bfd_reloc_code_real_type code);
e01b0e69 30static void elf32_h8_info_to_howto
c6baf75e 31 (bfd *, arelent *, Elf_Internal_Rela *);
5e47149d 32static void elf32_h8_info_to_howto_rel
c6baf75e 33 (bfd *, arelent *, Elf_Internal_Rela *);
96ef1419
KH
34static unsigned long elf32_h8_mach (flagword);
35static void elf32_h8_final_write_processing (bfd *, bfd_boolean);
36static bfd_boolean elf32_h8_object_p (bfd *);
37static bfd_boolean elf32_h8_merge_private_bfd_data (bfd *, bfd *);
b34976b6 38static bfd_boolean elf32_h8_relax_section
c6baf75e 39 (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
b34976b6 40static bfd_boolean elf32_h8_relax_delete_bytes
c6baf75e 41 (bfd *, asection *, bfd_vma, int);
96ef1419 42static bfd_boolean elf32_h8_symbol_address_p (bfd *, asection *, bfd_vma);
dc810e39 43static bfd_byte *elf32_h8_get_relocated_section_contents
c6baf75e
RS
44 (bfd *, struct bfd_link_info *, struct bfd_link_order *,
45 bfd_byte *, bfd_boolean, asymbol **);
5e47149d 46static bfd_reloc_status_type elf32_h8_final_link_relocate
c6baf75e
RS
47 (unsigned long, bfd *, bfd *, asection *,
48 bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
49 struct bfd_link_info *, asection *, int);
b34976b6 50static bfd_boolean elf32_h8_relocate_section
c6baf75e
RS
51 (bfd *, struct bfd_link_info *, bfd *, asection *,
52 bfd_byte *, Elf_Internal_Rela *,
53 Elf_Internal_Sym *, asection **);
dc810e39 54static bfd_reloc_status_type special
2c3fc389 55 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
e01b0e69
JR
56
57/* This does not include any relocation information, but should be
58 good enough for GDB or objdump to read the file. */
59
2c3fc389
NC
60static reloc_howto_type h8_elf_howto_table[] =
61{
e01b0e69
JR
62#define R_H8_NONE_X 0
63 HOWTO (R_H8_NONE, /* type */
64 0, /* rightshift */
65 0, /* size (0 = byte, 1 = short, 2 = long) */
66 0, /* bitsize */
b34976b6 67 FALSE, /* pc_relative */
e01b0e69 68 0, /* bitpos */
9d29900b
NC
69 complain_overflow_dont,/* complain_on_overflow */
70 special, /* special_function */
e01b0e69 71 "R_H8_NONE", /* name */
b34976b6 72 FALSE, /* partial_inplace */
e01b0e69
JR
73 0, /* src_mask */
74 0, /* dst_mask */
b34976b6 75 FALSE), /* pcrel_offset */
e01b0e69
JR
76#define R_H8_DIR32_X (R_H8_NONE_X + 1)
77 HOWTO (R_H8_DIR32, /* type */
78 0, /* rightshift */
79 2, /* size (0 = byte, 1 = short, 2 = long) */
80 32, /* bitsize */
b34976b6 81 FALSE, /* pc_relative */
e01b0e69 82 0, /* bitpos */
9d29900b
NC
83 complain_overflow_dont,/* complain_on_overflow */
84 special, /* special_function */
e01b0e69 85 "R_H8_DIR32", /* name */
b34976b6 86 FALSE, /* partial_inplace */
e01b0e69
JR
87 0, /* src_mask */
88 0xffffffff, /* dst_mask */
b34976b6 89 FALSE), /* pcrel_offset */
e01b0e69
JR
90#define R_H8_DIR16_X (R_H8_DIR32_X + 1)
91 HOWTO (R_H8_DIR16, /* type */
92 0, /* rightshift */
93 1, /* size (0 = byte, 1 = short, 2 = long) */
94 16, /* bitsize */
b34976b6 95 FALSE, /* pc_relative */
e01b0e69 96 0, /* bitpos */
9d29900b
NC
97 complain_overflow_dont,/* complain_on_overflow */
98 special, /* special_function */
e01b0e69 99 "R_H8_DIR16", /* name */
b34976b6 100 FALSE, /* partial_inplace */
e01b0e69
JR
101 0, /* src_mask */
102 0x0000ffff, /* dst_mask */
b34976b6 103 FALSE), /* pcrel_offset */
e01b0e69
JR
104#define R_H8_DIR8_X (R_H8_DIR16_X + 1)
105 HOWTO (R_H8_DIR8, /* type */
106 0, /* rightshift */
107 0, /* size (0 = byte, 1 = short, 2 = long) */
108 8, /* bitsize */
b34976b6 109 FALSE, /* pc_relative */
e01b0e69 110 0, /* bitpos */
9d29900b
NC
111 complain_overflow_dont,/* complain_on_overflow */
112 special, /* special_function */
113 "R_H8_DIR8", /* name */
b34976b6 114 FALSE, /* partial_inplace */
e01b0e69
JR
115 0, /* src_mask */
116 0x000000ff, /* dst_mask */
b34976b6 117 FALSE), /* pcrel_offset */
e01b0e69
JR
118#define R_H8_DIR16A8_X (R_H8_DIR8_X + 1)
119 HOWTO (R_H8_DIR16A8, /* type */
120 0, /* rightshift */
121 1, /* size (0 = byte, 1 = short, 2 = long) */
122 16, /* bitsize */
b34976b6 123 FALSE, /* pc_relative */
e01b0e69
JR
124 0, /* bitpos */
125 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 126 special, /* special_function */
e01b0e69 127 "R_H8_DIR16A8", /* name */
b34976b6 128 FALSE, /* partial_inplace */
e01b0e69
JR
129 0, /* src_mask */
130 0x0000ffff, /* dst_mask */
b34976b6 131 FALSE), /* pcrel_offset */
e01b0e69
JR
132#define R_H8_DIR16R8_X (R_H8_DIR16A8_X + 1)
133 HOWTO (R_H8_DIR16R8, /* type */
134 0, /* rightshift */
135 1, /* size (0 = byte, 1 = short, 2 = long) */
136 16, /* bitsize */
b34976b6 137 FALSE, /* pc_relative */
e01b0e69
JR
138 0, /* bitpos */
139 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 140 special, /* special_function */
e01b0e69 141 "R_H8_DIR16R8", /* name */
b34976b6 142 FALSE, /* partial_inplace */
e01b0e69
JR
143 0, /* src_mask */
144 0x0000ffff, /* dst_mask */
b34976b6 145 FALSE), /* pcrel_offset */
e01b0e69
JR
146#define R_H8_DIR24A8_X (R_H8_DIR16R8_X + 1)
147 HOWTO (R_H8_DIR24A8, /* type */
148 0, /* rightshift */
149 2, /* size (0 = byte, 1 = short, 2 = long) */
150 24, /* bitsize */
b34976b6 151 FALSE, /* pc_relative */
e01b0e69
JR
152 0, /* bitpos */
153 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 154 special, /* special_function */
e01b0e69 155 "R_H8_DIR24A8", /* name */
b34976b6 156 TRUE, /* partial_inplace */
e01b0e69
JR
157 0xff000000, /* src_mask */
158 0x00ffffff, /* dst_mask */
b34976b6 159 FALSE), /* pcrel_offset */
e01b0e69
JR
160#define R_H8_DIR24R8_X (R_H8_DIR24A8_X + 1)
161 HOWTO (R_H8_DIR24R8, /* type */
162 0, /* rightshift */
163 2, /* size (0 = byte, 1 = short, 2 = long) */
164 24, /* bitsize */
b34976b6 165 FALSE, /* pc_relative */
e01b0e69
JR
166 0, /* bitpos */
167 complain_overflow_bitfield, /* complain_on_overflow */
9d29900b 168 special, /* special_function */
e01b0e69 169 "R_H8_DIR24R8", /* name */
b34976b6 170 TRUE, /* partial_inplace */
e01b0e69
JR
171 0xff000000, /* src_mask */
172 0x00ffffff, /* dst_mask */
b34976b6 173 FALSE), /* pcrel_offset */
e01b0e69
JR
174#define R_H8_DIR32A16_X (R_H8_DIR24R8_X + 1)
175 HOWTO (R_H8_DIR32A16, /* type */
176 0, /* rightshift */
177 2, /* size (0 = byte, 1 = short, 2 = long) */
178 32, /* bitsize */
b34976b6 179 FALSE, /* pc_relative */
e01b0e69 180 0, /* bitpos */
9d29900b
NC
181 complain_overflow_dont,/* complain_on_overflow */
182 special, /* special_function */
8c17da6e 183 "R_H8_DIR32A16", /* name */
b34976b6 184 FALSE, /* partial_inplace */
e01b0e69
JR
185 0, /* src_mask */
186 0xffffffff, /* dst_mask */
b34976b6 187 FALSE), /* pcrel_offset */
f2352488
JL
188#define R_H8_PCREL16_X (R_H8_DIR32A16_X + 1)
189 HOWTO (R_H8_PCREL16, /* type */
190 0, /* rightshift */
191 1, /* size (0 = byte, 1 = short, 2 = long) */
192 16, /* bitsize */
b34976b6 193 TRUE, /* pc_relative */
f2352488 194 0, /* bitpos */
9d29900b
NC
195 complain_overflow_signed,/* complain_on_overflow */
196 special, /* special_function */
f2352488 197 "R_H8_PCREL16", /* name */
b34976b6 198 FALSE, /* partial_inplace */
f2352488
JL
199 0xffff, /* src_mask */
200 0xffff, /* dst_mask */
b34976b6 201 TRUE), /* pcrel_offset */
f2352488
JL
202#define R_H8_PCREL8_X (R_H8_PCREL16_X + 1)
203 HOWTO (R_H8_PCREL8, /* type */
204 0, /* rightshift */
205 0, /* size (0 = byte, 1 = short, 2 = long) */
206 8, /* bitsize */
b34976b6 207 TRUE, /* pc_relative */
f2352488 208 0, /* bitpos */
9d29900b
NC
209 complain_overflow_signed,/* complain_on_overflow */
210 special, /* special_function */
f2352488 211 "R_H8_PCREL8", /* name */
b34976b6 212 FALSE, /* partial_inplace */
f2352488
JL
213 0xff, /* src_mask */
214 0xff, /* dst_mask */
b34976b6 215 TRUE), /* pcrel_offset */
e01b0e69
JR
216};
217
218/* This structure is used to map BFD reloc codes to H8 ELF relocs. */
219
bc7eab72 220struct elf_reloc_map {
e01b0e69
JR
221 bfd_reloc_code_real_type bfd_reloc_val;
222 unsigned char howto_index;
223};
224
6288878d 225/* An array mapping BFD reloc codes to H8 ELF relocs. */
e01b0e69 226
bc7eab72 227static const struct elf_reloc_map h8_reloc_map[] = {
e01b0e69
JR
228 { BFD_RELOC_NONE, R_H8_NONE_X },
229 { BFD_RELOC_32, R_H8_DIR32_X },
230 { BFD_RELOC_16, R_H8_DIR16_X },
231 { BFD_RELOC_8, R_H8_DIR8_X },
232 { BFD_RELOC_H8_DIR16A8, R_H8_DIR16A8_X },
233 { BFD_RELOC_H8_DIR16R8, R_H8_DIR16R8_X },
234 { BFD_RELOC_H8_DIR24A8, R_H8_DIR24A8_X },
235 { BFD_RELOC_H8_DIR24R8, R_H8_DIR24R8_X },
236 { BFD_RELOC_H8_DIR32A16, R_H8_DIR32A16_X },
f2352488
JL
237 { BFD_RELOC_16_PCREL, R_H8_PCREL16_X },
238 { BFD_RELOC_8_PCREL, R_H8_PCREL8_X },
e01b0e69
JR
239};
240
0a83638b 241
e01b0e69 242static reloc_howto_type *
c6baf75e
RS
243elf32_h8_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
244 bfd_reloc_code_real_type code)
e01b0e69
JR
245{
246 unsigned int i;
247
248 for (i = 0; i < sizeof (h8_reloc_map) / sizeof (struct elf_reloc_map); i++)
249 {
250 if (h8_reloc_map[i].bfd_reloc_val == code)
251 return &h8_elf_howto_table[(int) h8_reloc_map[i].howto_index];
252 }
253 return NULL;
254}
255
157090f7
AM
256static reloc_howto_type *
257elf32_h8_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
258 const char *r_name)
259{
260 unsigned int i;
261
262 for (i = 0;
263 i < sizeof (h8_elf_howto_table) / sizeof (h8_elf_howto_table[0]);
264 i++)
265 if (h8_elf_howto_table[i].name != NULL
266 && strcasecmp (h8_elf_howto_table[i].name, r_name) == 0)
267 return &h8_elf_howto_table[i];
268
269 return NULL;
270}
271
e01b0e69 272static void
c6baf75e
RS
273elf32_h8_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
274 Elf_Internal_Rela *elf_reloc)
e01b0e69
JR
275{
276 unsigned int r;
277 unsigned int i;
278
279 r = ELF32_R_TYPE (elf_reloc->r_info);
280 for (i = 0; i < sizeof (h8_elf_howto_table) / sizeof (reloc_howto_type); i++)
bc7eab72 281 if (h8_elf_howto_table[i].type == r)
e01b0e69
JR
282 {
283 bfd_reloc->howto = &h8_elf_howto_table[i];
284 return;
285 }
286 abort ();
287}
288
289static void
c6baf75e
RS
290elf32_h8_info_to_howto_rel (bfd *abfd ATTRIBUTE_UNUSED, arelent *bfd_reloc,
291 Elf_Internal_Rela *elf_reloc ATTRIBUTE_UNUSED)
e01b0e69
JR
292{
293 unsigned int r;
294
295 abort ();
296 r = ELF32_R_TYPE (elf_reloc->r_info);
297 bfd_reloc->howto = &h8_elf_howto_table[r];
298}
299
a00c9dbc
JL
300/* Special handling for H8/300 relocs.
301 We only come here for pcrel stuff and return normally if not an -r link.
302 When doing -r, we can't do any arithmetic for the pcrel stuff, because
303 we support relaxing on the H8/300 series chips. */
304static bfd_reloc_status_type
c6baf75e
RS
305special (bfd *abfd ATTRIBUTE_UNUSED,
306 arelent *reloc_entry ATTRIBUTE_UNUSED,
307 asymbol *symbol ATTRIBUTE_UNUSED,
2c3fc389 308 void * data ATTRIBUTE_UNUSED,
c6baf75e
RS
309 asection *input_section ATTRIBUTE_UNUSED,
310 bfd *output_bfd,
311 char **error_message ATTRIBUTE_UNUSED)
a00c9dbc
JL
312{
313 if (output_bfd == (bfd *) NULL)
314 return bfd_reloc_continue;
315
316 /* Adjust the reloc address to that in the output section. */
317 reloc_entry->address += input_section->output_offset;
318 return bfd_reloc_ok;
319}
5e47149d
JL
320
321/* Perform a relocation as part of a final link. */
322static bfd_reloc_status_type
c6baf75e
RS
323elf32_h8_final_link_relocate (unsigned long r_type, bfd *input_bfd,
324 bfd *output_bfd ATTRIBUTE_UNUSED,
325 asection *input_section ATTRIBUTE_UNUSED,
326 bfd_byte *contents, bfd_vma offset,
327 bfd_vma value, bfd_vma addend,
328 struct bfd_link_info *info ATTRIBUTE_UNUSED,
329 asection *sym_sec ATTRIBUTE_UNUSED,
330 int is_local ATTRIBUTE_UNUSED)
5e47149d
JL
331{
332 bfd_byte *hit_data = contents + offset;
333
334 switch (r_type)
335 {
5e47149d
JL
336 case R_H8_NONE:
337 return bfd_reloc_ok;
338
339 case R_H8_DIR32:
340 case R_H8_DIR32A16:
a00c9dbc 341 case R_H8_DIR24A8:
5e47149d
JL
342 value += addend;
343 bfd_put_32 (input_bfd, value, hit_data);
344 return bfd_reloc_ok;
345
346 case R_H8_DIR16:
347 case R_H8_DIR16A8:
348 case R_H8_DIR16R8:
349 value += addend;
350 bfd_put_16 (input_bfd, value, hit_data);
351 return bfd_reloc_ok;
352
353 /* AKA R_RELBYTE */
354 case R_H8_DIR8:
355 value += addend;
356
5e47149d
JL
357 bfd_put_8 (input_bfd, value, hit_data);
358 return bfd_reloc_ok;
359
5e47149d
JL
360 case R_H8_DIR24R8:
361 value += addend;
362
a00c9dbc 363 /* HIT_DATA is the address for the first byte for the relocated
e804e836 364 value. Subtract 1 so that we can manipulate the data in 32-bit
a00c9dbc
JL
365 hunks. */
366 hit_data--;
367
368 /* Clear out the top byte in value. */
5e47149d 369 value &= 0xffffff;
a00c9dbc
JL
370
371 /* Retrieve the type byte for value from the section contents. */
5e47149d 372 value |= (bfd_get_32 (input_bfd, hit_data) & 0xff000000);
a00c9dbc 373
e804e836 374 /* Now scribble it out in one 32-bit hunk. */
5e47149d
JL
375 bfd_put_32 (input_bfd, value, hit_data);
376 return bfd_reloc_ok;
377
f2352488
JL
378 case R_H8_PCREL16:
379 value -= (input_section->output_section->vma
380 + input_section->output_offset);
381 value -= offset;
382 value += addend;
383
a00c9dbc
JL
384 /* The value is relative to the start of the instruction,
385 not the relocation offset. Subtract 2 to account for
386 this minor issue. */
387 value -= 2;
388
f2352488
JL
389 bfd_put_16 (input_bfd, value, hit_data);
390 return bfd_reloc_ok;
391
392 case R_H8_PCREL8:
393 value -= (input_section->output_section->vma
394 + input_section->output_offset);
395 value -= offset;
396 value += addend;
397
a00c9dbc
JL
398 /* The value is relative to the start of the instruction,
399 not the relocation offset. Subtract 1 to account for
400 this minor issue. */
401 value -= 1;
402
f2352488
JL
403 bfd_put_8 (input_bfd, value, hit_data);
404 return bfd_reloc_ok;
405
5e47149d
JL
406 default:
407 return bfd_reloc_notsupported;
408 }
409}
410\f
411/* Relocate an H8 ELF section. */
b34976b6 412static bfd_boolean
c6baf75e
RS
413elf32_h8_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
414 bfd *input_bfd, asection *input_section,
415 bfd_byte *contents, Elf_Internal_Rela *relocs,
416 Elf_Internal_Sym *local_syms,
417 asection **local_sections)
5e47149d
JL
418{
419 Elf_Internal_Shdr *symtab_hdr;
420 struct elf_link_hash_entry **sym_hashes;
421 Elf_Internal_Rela *rel, *relend;
422
423 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
424 sym_hashes = elf_sym_hashes (input_bfd);
425
426 rel = relocs;
427 relend = relocs + input_section->reloc_count;
428 for (; rel < relend; rel++)
429 {
dc810e39 430 unsigned int r_type;
5e47149d
JL
431 unsigned long r_symndx;
432 Elf_Internal_Sym *sym;
433 asection *sec;
434 struct elf_link_hash_entry *h;
435 bfd_vma relocation;
436 bfd_reloc_status_type r;
ab96bf03
AM
437 arelent bfd_reloc;
438 reloc_howto_type *howto;
439
440 elf32_h8_info_to_howto (input_bfd, &bfd_reloc, rel);
441 howto = bfd_reloc.howto;
5e47149d
JL
442
443 r_symndx = ELF32_R_SYM (rel->r_info);
444 r_type = ELF32_R_TYPE (rel->r_info);
5e47149d
JL
445 h = NULL;
446 sym = NULL;
447 sec = NULL;
448 if (r_symndx < symtab_hdr->sh_info)
449 {
450 sym = local_syms + r_symndx;
451 sec = local_sections[r_symndx];
8517fae7 452 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
5e47149d
JL
453 }
454 else
455 {
59c2e50f
L
456 bfd_boolean unresolved_reloc, warned;
457
b2a8e766
AM
458 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
459 r_symndx, symtab_hdr, sym_hashes,
460 h, sec, relocation,
461 unresolved_reloc, warned);
5e47149d
JL
462 }
463
dbaa2011 464 if (sec != NULL && discarded_section (sec))
e4067dbb 465 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 466 rel, 1, relend, howto, 0, contents);
ab96bf03
AM
467
468 if (info->relocatable)
469 continue;
470
5e47149d
JL
471 r = elf32_h8_final_link_relocate (r_type, input_bfd, output_bfd,
472 input_section,
473 contents, rel->r_offset,
474 relocation, rel->r_addend,
475 info, sec, h == NULL);
476
477 if (r != bfd_reloc_ok)
478 {
479 const char *name;
480 const char *msg = (const char *) 0;
dc810e39 481
5e47149d
JL
482 if (h != NULL)
483 name = h->root.root.string;
484 else
485 {
486 name = (bfd_elf_string_from_elf_section
487 (input_bfd, symtab_hdr->sh_link, sym->st_name));
488 if (name == NULL || *name == '\0')
489 name = bfd_section_name (input_bfd, sec);
490 }
491
492 switch (r)
493 {
494 case bfd_reloc_overflow:
495 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
496 (info, (h ? &h->root : NULL), name, howto->name,
497 (bfd_vma) 0, input_bfd, input_section,
498 rel->r_offset)))
b34976b6 499 return FALSE;
5e47149d
JL
500 break;
501
502 case bfd_reloc_undefined:
503 if (! ((*info->callbacks->undefined_symbol)
504 (info, name, input_bfd, input_section,
b34976b6
AM
505 rel->r_offset, TRUE)))
506 return FALSE;
5e47149d
JL
507 break;
508
509 case bfd_reloc_outofrange:
510 msg = _("internal error: out of range error");
511 goto common_error;
512
513 case bfd_reloc_notsupported:
514 msg = _("internal error: unsupported relocation error");
515 goto common_error;
516
517 case bfd_reloc_dangerous:
518 msg = _("internal error: dangerous error");
519 goto common_error;
520
521 default:
522 msg = _("internal error: unknown error");
523 /* fall through */
524
525 common_error:
526 if (!((*info->callbacks->warning)
527 (info, msg, name, input_bfd, input_section,
528 rel->r_offset)))
b34976b6 529 return FALSE;
5e47149d
JL
530 break;
531 }
532 }
533 }
534
b34976b6 535 return TRUE;
5e47149d
JL
536}
537
0a83638b
JL
538/* Object files encode the specific H8 model they were compiled
539 for in the ELF flags field.
540
541 Examine that field and return the proper BFD machine type for
542 the object file. */
dc810e39 543static unsigned long
c6baf75e 544elf32_h8_mach (flagword flags)
0a83638b
JL
545{
546 switch (flags & EF_H8_MACH)
547 {
548 case E_H8_MACH_H8300:
549 default:
550 return bfd_mach_h8300;
551
552 case E_H8_MACH_H8300H:
553 return bfd_mach_h8300h;
554
555 case E_H8_MACH_H8300S:
556 return bfd_mach_h8300s;
8d9cd6b1
NC
557
558 case E_H8_MACH_H8300HN:
559 return bfd_mach_h8300hn;
560
561 case E_H8_MACH_H8300SN:
562 return bfd_mach_h8300sn;
5d1db417
MS
563
564 case E_H8_MACH_H8300SX:
565 return bfd_mach_h8300sx;
f4984206
RS
566
567 case E_H8_MACH_H8300SXN:
568 return bfd_mach_h8300sxn;
0a83638b
JL
569 }
570}
571
572/* The final processing done just before writing out a H8 ELF object
573 file. We use this opportunity to encode the BFD machine type
574 into the flags field in the object file. */
575
dc810e39 576static void
c6baf75e
RS
577elf32_h8_final_write_processing (bfd *abfd,
578 bfd_boolean linker ATTRIBUTE_UNUSED)
0a83638b
JL
579{
580 unsigned long val;
581
582 switch (bfd_get_mach (abfd))
583 {
584 default:
585 case bfd_mach_h8300:
586 val = E_H8_MACH_H8300;
587 break;
588
589 case bfd_mach_h8300h:
590 val = E_H8_MACH_H8300H;
591 break;
592
593 case bfd_mach_h8300s:
594 val = E_H8_MACH_H8300S;
595 break;
8d9cd6b1
NC
596
597 case bfd_mach_h8300hn:
598 val = E_H8_MACH_H8300HN;
599 break;
600
601 case bfd_mach_h8300sn:
602 val = E_H8_MACH_H8300SN;
603 break;
5d1db417
MS
604
605 case bfd_mach_h8300sx:
606 val = E_H8_MACH_H8300SX;
607 break;
f4984206
RS
608
609 case bfd_mach_h8300sxn:
610 val = E_H8_MACH_H8300SXN;
611 break;
0a83638b
JL
612 }
613
614 elf_elfheader (abfd)->e_flags &= ~ (EF_H8_MACH);
615 elf_elfheader (abfd)->e_flags |= val;
616}
617
618/* Return nonzero if ABFD represents a valid H8 ELF object file; also
619 record the encoded machine type found in the ELF flags. */
620
b34976b6 621static bfd_boolean
c6baf75e 622elf32_h8_object_p (bfd *abfd)
0a83638b
JL
623{
624 bfd_default_set_arch_mach (abfd, bfd_arch_h8300,
625 elf32_h8_mach (elf_elfheader (abfd)->e_flags));
b34976b6 626 return TRUE;
0a83638b
JL
627}
628
629/* Merge backend specific data from an object file to the output
630 object file when linking. The only data we need to copy at this
631 time is the architecture/machine information. */
632
b34976b6 633static bfd_boolean
c6baf75e 634elf32_h8_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
0a83638b
JL
635{
636 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
637 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 638 return TRUE;
0a83638b
JL
639
640 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
641 && bfd_get_mach (obfd) < bfd_get_mach (ibfd))
642 {
643 if (! bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
96ef1419
KH
644 bfd_get_mach (ibfd)))
645 return FALSE;
0a83638b
JL
646 }
647
b34976b6 648 return TRUE;
0a83638b
JL
649}
650
5907e628
JL
651/* This function handles relaxing for the H8..
652
4cc11e76 653 There are a few relaxing opportunities available on the H8:
5907e628
JL
654
655 jmp/jsr:24 -> bra/bsr:8 2 bytes
656 The jmp may be completely eliminated if the previous insn is a
657 conditional branch to the insn after the jump. In that case
658 we invert the branch and delete the jump and save 4 bytes.
659
660 bCC:16 -> bCC:8 2 bytes
661 bsr:16 -> bsr:8 2 bytes
662
630a7b0a
KH
663 bset:16 -> bset:8 2 bytes
664 bset:24/32 -> bset:8 4 bytes
665 (also applicable to other bit manipulation instructions)
666
5907e628
JL
667 mov.b:16 -> mov.b:8 2 bytes
668 mov.b:24/32 -> mov.b:8 4 bytes
669
7e89635a
KH
670 bset:24/32 -> bset:16 2 bytes
671 (also applicable to other bit manipulation instructions)
672
76f99c63 673 mov.[bwl]:24/32 -> mov.[bwl]:16 2 bytes */
5907e628 674
b34976b6 675static bfd_boolean
c6baf75e
RS
676elf32_h8_relax_section (bfd *abfd, asection *sec,
677 struct bfd_link_info *link_info, bfd_boolean *again)
5907e628
JL
678{
679 Elf_Internal_Shdr *symtab_hdr;
680 Elf_Internal_Rela *internal_relocs;
5907e628
JL
681 Elf_Internal_Rela *irel, *irelend;
682 bfd_byte *contents = NULL;
6cdc0ccc 683 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
684 static asection *last_input_section = NULL;
685 static Elf_Internal_Rela *last_reloc = NULL;
686
687 /* Assume nothing changes. */
b34976b6 688 *again = FALSE;
5907e628 689
1049f94e 690 /* We don't have to do anything for a relocatable link, if
5907e628
JL
691 this section does not have relocs, or if this is not a
692 code section. */
1049f94e 693 if (link_info->relocatable
5907e628
JL
694 || (sec->flags & SEC_RELOC) == 0
695 || sec->reloc_count == 0
696 || (sec->flags & SEC_CODE) == 0)
b34976b6 697 return TRUE;
5907e628 698
5907e628
JL
699 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
700
701 /* Get a copy of the native relocations. */
45d6a902 702 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 703 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
5907e628
JL
704 link_info->keep_memory));
705 if (internal_relocs == NULL)
706 goto error_return;
5907e628
JL
707
708 if (sec != last_input_section)
709 last_reloc = NULL;
710
711 last_input_section = sec;
712
713 /* Walk through the relocs looking for relaxing opportunities. */
714 irelend = internal_relocs + sec->reloc_count;
715 for (irel = internal_relocs; irel < irelend; irel++)
716 {
717 bfd_vma symval;
718
bcb012d3
DD
719 {
720 arelent bfd_reloc;
bcb012d3
DD
721
722 elf32_h8_info_to_howto (abfd, &bfd_reloc, irel);
bcb012d3 723 }
5907e628
JL
724 /* Keep track of the previous reloc so that we can delete
725 some long jumps created by the compiler. */
726 if (irel != internal_relocs)
727 last_reloc = irel - 1;
728
76f99c63
JL
729 if (ELF32_R_TYPE (irel->r_info) != R_H8_DIR24R8
730 && ELF32_R_TYPE (irel->r_info) != R_H8_PCREL16
731 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR16A8
732 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR24A8
733 && ELF32_R_TYPE (irel->r_info) != R_H8_DIR32A16)
734 continue;
735
5907e628
JL
736 /* Get the section contents if we haven't done so already. */
737 if (contents == NULL)
738 {
739 /* Get cached copy if it exists. */
740 if (elf_section_data (sec)->this_hdr.contents != NULL)
741 contents = elf_section_data (sec)->this_hdr.contents;
742 else
743 {
744 /* Go get them off disk. */
eea6121a 745 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
5907e628
JL
746 goto error_return;
747 }
748 }
749
9ad5cbcf 750 /* Read this BFD's local symbols if we haven't done so already. */
6cdc0ccc 751 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
5907e628 752 {
6cdc0ccc
AM
753 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
754 if (isymbuf == NULL)
755 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
756 symtab_hdr->sh_info, 0,
757 NULL, NULL, NULL);
758 if (isymbuf == NULL)
759 goto error_return;
5907e628
JL
760 }
761
762 /* Get the value of the symbol referred to by the reloc. */
763 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
764 {
5907e628 765 /* A local symbol. */
6cdc0ccc
AM
766 Elf_Internal_Sym *isym;
767 asection *sym_sec;
5907e628 768
32ac2c9a 769 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6cdc0ccc 770 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
03d14457
NC
771 symval = isym->st_value;
772 /* If the reloc is absolute, it will not have
773 a symbol or section associated with it. */
774 if (sym_sec)
775 symval += sym_sec->output_section->vma
776 + sym_sec->output_offset;
5907e628
JL
777 }
778 else
779 {
780 unsigned long indx;
781 struct elf_link_hash_entry *h;
782
783 /* An external symbol. */
784 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
785 h = elf_sym_hashes (abfd)[indx];
786 BFD_ASSERT (h != NULL);
787 if (h->root.type != bfd_link_hash_defined
788 && h->root.type != bfd_link_hash_defweak)
789 {
790 /* This appears to be a reference to an undefined
791 symbol. Just ignore it--it will be caught by the
792 regular reloc processing. */
793 continue;
794 }
795
796 symval = (h->root.u.def.value
797 + h->root.u.def.section->output_section->vma
798 + h->root.u.def.section->output_offset);
799 }
800
801 /* For simplicity of coding, we are going to modify the section
802 contents, the section relocs, and the BFD symbol table. We
803 must tell the rest of the code not to free up this
804 information. It would be possible to instead create a table
805 of changes which have to be made, as is done in coff-mips.c;
806 that would be more work, but would require less memory when
807 the linker is run. */
808 switch (ELF32_R_TYPE (irel->r_info))
809 {
e804e836 810 /* Try to turn a 24-bit absolute branch/call into an 8-bit
5907e628
JL
811 pc-relative branch/call. */
812 case R_H8_DIR24R8:
813 {
814 bfd_vma value = symval + irel->r_addend;
815 bfd_vma dot, gap;
816
817 /* Get the address of this instruction. */
818 dot = (sec->output_section->vma
819 + sec->output_offset + irel->r_offset - 1);
820
821 /* Compute the distance from this insn to the branch target. */
822 gap = value - dot;
823
824 /* If the distance is within -126..+130 inclusive, then we can
825 relax this jump. +130 is valid since the target will move
826 two bytes closer if we do relax this branch. */
dc810e39 827 if ((int) gap >= -126 && (int) gap <= 130)
5907e628
JL
828 {
829 unsigned char code;
830
831 /* Note that we've changed the relocs, section contents,
832 etc. */
833 elf_section_data (sec)->relocs = internal_relocs;
5907e628 834 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 835 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 836
e514ac71
NC
837 /* Get the instruction code being relaxed. */
838 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
839
5907e628
JL
840 /* If the previous instruction conditionally jumped around
841 this instruction, we may be able to reverse the condition
842 and redirect the previous instruction to the target of
843 this instruction.
844
845 Such sequences are used by the compiler to deal with
e514ac71
NC
846 long conditional branches.
847
848 Only perform this optimisation for jumps (code 0x5a) not
849 subroutine calls, as otherwise it could transform:
b34976b6 850
e514ac71
NC
851 mov.w r0,r0
852 beq .L1
853 jsr @_bar
854 .L1: rts
855 _bar: rts
856 into:
857 mov.w r0,r0
858 bne _bar
859 rts
860 _bar: rts
861
862 which changes the call (jsr) into a branch (bne). */
863 if (code == 0x5a
864 && (int) gap <= 130
dc810e39 865 && (int) gap >= -128
5907e628
JL
866 && last_reloc
867 && ELF32_R_TYPE (last_reloc->r_info) == R_H8_PCREL8
868 && ELF32_R_SYM (last_reloc->r_info) < symtab_hdr->sh_info)
869 {
870 bfd_vma last_value;
871 asection *last_sym_sec;
6cdc0ccc 872 Elf_Internal_Sym *last_sym;
5907e628
JL
873
874 /* We will need to examine the symbol used by the
875 previous relocation. */
dc810e39 876
6cdc0ccc 877 last_sym = isymbuf + ELF32_R_SYM (last_reloc->r_info);
5907e628 878 last_sym_sec
6cdc0ccc
AM
879 = bfd_section_from_elf_index (abfd, last_sym->st_shndx);
880 last_value = (last_sym->st_value
5907e628
JL
881 + last_sym_sec->output_section->vma
882 + last_sym_sec->output_offset);
883
884 /* Verify that the previous relocation was for a
885 branch around this instruction and that no symbol
886 exists at the current location. */
887 if (last_value == dot + 4
888 && last_reloc->r_offset + 2 == irel->r_offset
9ad5cbcf 889 && ! elf32_h8_symbol_address_p (abfd, sec, dot))
5907e628
JL
890 {
891 /* We can eliminate this jump. Twiddle the
892 previous relocation as necessary. */
893 irel->r_info
894 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
895 ELF32_R_TYPE (R_H8_NONE));
896
bc7eab72 897 last_reloc->r_info
5907e628 898 = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
bc7eab72
KH
899 ELF32_R_TYPE (R_H8_PCREL8));
900 last_reloc->r_addend = irel->r_addend;
5907e628
JL
901
902 code = bfd_get_8 (abfd,
903 contents + last_reloc->r_offset - 1);
904 code ^= 1;
905 bfd_put_8 (abfd,
906 code,
907 contents + last_reloc->r_offset - 1);
908
909 /* Delete four bytes of data. */
910 if (!elf32_h8_relax_delete_bytes (abfd, sec,
911 irel->r_offset - 1,
912 4))
913 goto error_return;
914
b34976b6 915 *again = TRUE;
5907e628
JL
916 break;
917 }
918 }
919
5907e628 920 if (code == 0x5e)
7e89635a 921 /* This is jsr. */
5907e628
JL
922 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 1);
923 else if (code == 0x5a)
7e89635a 924 /* This is jmp. */
5907e628
JL
925 bfd_put_8 (abfd, 0x40, contents + irel->r_offset - 1);
926 else
927 abort ();
928
929 /* Fix the relocation's type. */
930 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
931 R_H8_PCREL8);
932
933 /* Delete two bytes of data. */
934 if (!elf32_h8_relax_delete_bytes (abfd, sec,
935 irel->r_offset + 1, 2))
936 goto error_return;
937
938 /* That will change things, so, we should relax again.
939 Note that this is not required, and it may be slow. */
b34976b6 940 *again = TRUE;
5907e628
JL
941 }
942 break;
943 }
944
e804e836 945 /* Try to turn a 16-bit pc-relative branch into a 8-bit pc-relative
5907e628
JL
946 branch. */
947 case R_H8_PCREL16:
948 {
949 bfd_vma value = symval + irel->r_addend;
950 bfd_vma dot;
951 bfd_vma gap;
952
953 /* Get the address of this instruction. */
954 dot = (sec->output_section->vma
955 + sec->output_offset
956 + irel->r_offset - 2);
dc810e39 957
5907e628
JL
958 gap = value - dot;
959
960 /* If the distance is within -126..+130 inclusive, then we can
961 relax this jump. +130 is valid since the target will move
962 two bytes closer if we do relax this branch. */
bc7eab72 963 if ((int) gap >= -126 && (int) gap <= 130)
5907e628 964 {
bc7eab72 965 unsigned char code;
5907e628 966
bc7eab72 967 /* Note that we've changed the relocs, section contents,
5907e628 968 etc. */
bc7eab72
KH
969 elf_section_data (sec)->relocs = internal_relocs;
970 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 971 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 972
bc7eab72
KH
973 /* Get the opcode. */
974 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628
JL
975
976 if (code == 0x58)
977 {
978 /* bCC:16 -> bCC:8 */
7e89635a
KH
979 /* Get the second byte of the original insn, which
980 contains the condition code. */
5907e628 981 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
7e89635a
KH
982
983 /* Compute the fisrt byte of the relaxed
984 instruction. The original sequence 0x58 0xX0
985 is relaxed to 0x4X, where X represents the
986 condition code. */
5907e628
JL
987 code &= 0xf0;
988 code >>= 4;
989 code |= 0x40;
990 bfd_put_8 (abfd, code, contents + irel->r_offset - 2);
991 }
992 else if (code == 0x5c)
7e89635a 993 /* This is bsr. */
5907e628
JL
994 bfd_put_8 (abfd, 0x55, contents + irel->r_offset - 2);
995 else
bcb012d3
DD
996 /* Might be MOVSD. */
997 break;
5907e628
JL
998
999 /* Fix the relocation's type. */
bc7eab72 1000 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1001 R_H8_PCREL8);
bc7eab72 1002 irel->r_offset--;
5907e628 1003
bc7eab72
KH
1004 /* Delete two bytes of data. */
1005 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1006 irel->r_offset + 1, 2))
1007 goto error_return;
1008
bc7eab72 1009 /* That will change things, so, we should relax again.
5907e628 1010 Note that this is not required, and it may be slow. */
b34976b6 1011 *again = TRUE;
5907e628
JL
1012 }
1013 break;
1014 }
1015
630a7b0a
KH
1016 /* This is a 16-bit absolute address in one of the following
1017 instructions:
1018
1019 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1020 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1021 "mov.b"
1022
1023 We may relax this into an 8-bit absolute address if it's in
1024 the right range. */
5907e628
JL
1025 case R_H8_DIR16A8:
1026 {
7a9823f1 1027 bfd_vma value;
5907e628 1028
7a9823f1
RS
1029 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1030 if (value >= 0xffffff00u)
5907e628 1031 {
bc7eab72 1032 unsigned char code;
ca9a79a1 1033 unsigned char temp_code;
5907e628 1034
bc7eab72 1035 /* Note that we've changed the relocs, section contents,
5907e628 1036 etc. */
bc7eab72
KH
1037 elf_section_data (sec)->relocs = internal_relocs;
1038 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1039 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1040
bc7eab72
KH
1041 /* Get the opcode. */
1042 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1043
630a7b0a
KH
1044 /* All instructions with R_H8_DIR16A8 start with
1045 0x6a. */
bc7eab72 1046 if (code != 0x6a)
5907e628
JL
1047 abort ();
1048
ca9a79a1 1049 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
630a7b0a
KH
1050 /* If this is a mov.b instruction, clear the lower
1051 nibble, which contains the source/destination
1052 register number. */
ca9a79a1
NC
1053 if ((temp_code & 0x10) != 0x10)
1054 temp_code &= 0xf0;
5907e628 1055
ca9a79a1
NC
1056 switch (temp_code)
1057 {
1058 case 0x00:
630a7b0a 1059 /* This is mov.b @aa:16,Rd. */
ca9a79a1
NC
1060 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1061 contents + irel->r_offset - 2);
1062 break;
1063 case 0x80:
630a7b0a 1064 /* This is mov.b Rs,@aa:16. */
ca9a79a1
NC
1065 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1066 contents + irel->r_offset - 2);
1067 break;
1068 case 0x18:
630a7b0a
KH
1069 /* This is a bit-maniputation instruction that
1070 stores one bit into memory, one of "bclr",
1071 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1072 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1073 break;
1074 case 0x10:
630a7b0a
KH
1075 /* This is a bit-maniputation instruction that
1076 loads one bit from memory, one of "band",
1077 "biand", "bild", "bior", "bixor", "bld", "bor",
1078 "btst", and "bxor". */
ca9a79a1
NC
1079 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1080 break;
1081 default:
1082 abort ();
1083 }
5907e628 1084
bc7eab72
KH
1085 /* Fix the relocation's type. */
1086 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628
JL
1087 R_H8_DIR8);
1088
8c17da6e
NC
1089 /* Move the relocation. */
1090 irel->r_offset--;
1091
bc7eab72
KH
1092 /* Delete two bytes of data. */
1093 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1094 irel->r_offset + 1, 2))
1095 goto error_return;
1096
bc7eab72 1097 /* That will change things, so, we should relax again.
5907e628 1098 Note that this is not required, and it may be slow. */
b34976b6 1099 *again = TRUE;
5907e628
JL
1100 }
1101 break;
1102 }
1103
630a7b0a
KH
1104 /* This is a 24-bit absolute address in one of the following
1105 instructions:
1106
1107 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1108 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1109 "mov.b"
1110
1111 We may relax this into an 8-bit absolute address if it's in
1112 the right range. */
5907e628
JL
1113 case R_H8_DIR24A8:
1114 {
7a9823f1 1115 bfd_vma value;
5907e628 1116
7a9823f1
RS
1117 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1118 if (value >= 0xffffff00u)
5907e628 1119 {
bc7eab72 1120 unsigned char code;
ca9a79a1 1121 unsigned char temp_code;
5907e628 1122
bc7eab72 1123 /* Note that we've changed the relocs, section contents,
5907e628 1124 etc. */
bc7eab72
KH
1125 elf_section_data (sec)->relocs = internal_relocs;
1126 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1127 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1128
bc7eab72
KH
1129 /* Get the opcode. */
1130 code = bfd_get_8 (abfd, contents + irel->r_offset - 2);
5907e628 1131
630a7b0a
KH
1132 /* All instructions with R_H8_DIR24A8 start with
1133 0x6a. */
bc7eab72 1134 if (code != 0x6a)
5907e628
JL
1135 abort ();
1136
ca9a79a1
NC
1137 temp_code = code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
1138
630a7b0a
KH
1139 /* If this is a mov.b instruction, clear the lower
1140 nibble, which contains the source/destination
1141 register number. */
ca9a79a1
NC
1142 if ((temp_code & 0x30) != 0x30)
1143 temp_code &= 0xf0;
5907e628 1144
ca9a79a1 1145 switch (temp_code)
03d14457 1146 {
7a9823f1 1147 case 0x20:
630a7b0a 1148 /* This is mov.b @aa:24/32,Rd. */
03d14457
NC
1149 bfd_put_8 (abfd, (code & 0xf) | 0x20,
1150 contents + irel->r_offset - 2);
1151 break;
7a9823f1 1152 case 0xa0:
630a7b0a 1153 /* This is mov.b Rs,@aa:24/32. */
03d14457
NC
1154 bfd_put_8 (abfd, (code & 0xf) | 0x30,
1155 contents + irel->r_offset - 2);
1156 break;
ca9a79a1 1157 case 0x38:
630a7b0a
KH
1158 /* This is a bit-maniputation instruction that
1159 stores one bit into memory, one of "bclr",
1160 "bist", "bnot", "bset", and "bst". */
ca9a79a1
NC
1161 bfd_put_8 (abfd, 0x7f, contents + irel->r_offset - 2);
1162 break;
1163 case 0x30:
630a7b0a
KH
1164 /* This is a bit-maniputation instruction that
1165 loads one bit from memory, one of "band",
1166 "biand", "bild", "bior", "bixor", "bld", "bor",
1167 "btst", and "bxor". */
ca9a79a1
NC
1168 bfd_put_8 (abfd, 0x7e, contents + irel->r_offset - 2);
1169 break;
03d14457 1170 default:
ca9a79a1 1171 abort();
03d14457
NC
1172 }
1173
bc7eab72
KH
1174 /* Fix the relocation's type. */
1175 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
5907e628 1176 R_H8_DIR8);
7a9823f1 1177 irel->r_offset--;
5907e628 1178
bc7eab72 1179 /* Delete two bytes of data. */
7a9823f1
RS
1180 if (!elf32_h8_relax_delete_bytes (abfd, sec,
1181 irel->r_offset + 1, 4))
5907e628
JL
1182 goto error_return;
1183
bc7eab72 1184 /* That will change things, so, we should relax again.
5907e628 1185 Note that this is not required, and it may be slow. */
b34976b6 1186 *again = TRUE;
7a9823f1 1187 break;
5907e628
JL
1188 }
1189 }
1190
7e89635a
KH
1191 /* Fall through. */
1192
1193 /* This is a 24-/32-bit absolute address in one of the
1194 following instructions:
1195
1196 "band", "bclr", "biand", "bild", "bior", "bist",
1197 "bixor", "bld", "bnot", "bor", "bset", "bst", "btst",
3255318a 1198 "bxor", "ldc.w", "stc.w" and "mov.[bwl]"
5907e628 1199
7e89635a
KH
1200 We may relax this into an 16-bit absolute address if it's
1201 in the right range. */
5907e628
JL
1202 case R_H8_DIR32A16:
1203 {
7a9823f1 1204 bfd_vma value;
5907e628 1205
7a9823f1
RS
1206 value = bfd_h8300_pad_address (abfd, symval + irel->r_addend);
1207 if (value <= 0x7fff || value >= 0xffff8000u)
5907e628 1208 {
bc7eab72 1209 unsigned char code;
bcb012d3
DD
1210 unsigned char op0, op1, op2, op3;
1211 unsigned char *op_ptr;
5907e628 1212
bc7eab72 1213 /* Note that we've changed the relocs, section contents,
5907e628 1214 etc. */
bc7eab72
KH
1215 elf_section_data (sec)->relocs = internal_relocs;
1216 elf_section_data (sec)->this_hdr.contents = contents;
6cdc0ccc 1217 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628 1218
bcb012d3
DD
1219 if (irel->r_offset >= 4)
1220 {
1221 /* Check for 4-byte MOVA relaxation. */
1222 int second_reloc = 0;
1223
1224 op_ptr = contents + irel->r_offset - 4;
1225
1226 if (last_reloc)
1227 {
1228 arelent bfd_reloc;
1229 reloc_howto_type *h;
1230 bfd_vma last_reloc_size;
1231
1232 elf32_h8_info_to_howto (abfd, &bfd_reloc, last_reloc);
1233 h = bfd_reloc.howto;
1234 last_reloc_size = 1 << h->size;
1235 if (last_reloc->r_offset + last_reloc_size
1236 == irel->r_offset)
1237 {
1238 op_ptr -= last_reloc_size;
1239 second_reloc = 1;
1240 }
1241 }
d79dcc73 1242 if (irel + 1 < irelend)
bcb012d3
DD
1243 {
1244 Elf_Internal_Rela *next_reloc = irel + 1;
1245 arelent bfd_reloc;
1246 reloc_howto_type *h;
1247 bfd_vma next_reloc_size;
1248
1249 elf32_h8_info_to_howto (abfd, &bfd_reloc, next_reloc);
1250 h = bfd_reloc.howto;
1251 next_reloc_size = 1 << h->size;
1252 if (next_reloc->r_offset + next_reloc_size
1253 == irel->r_offset)
1254 {
1255 op_ptr -= next_reloc_size;
1256 second_reloc = 1;
1257 }
1258 }
1259
1260 op0 = bfd_get_8 (abfd, op_ptr + 0);
1261 op1 = bfd_get_8 (abfd, op_ptr + 1);
1262 op2 = bfd_get_8 (abfd, op_ptr + 2);
1263 op3 = bfd_get_8 (abfd, op_ptr + 3);
1264
1265 if (op0 == 0x01
1266 && (op1 & 0xdf) == 0x5f
1267 && (op2 & 0x40) == 0x40
1268 && (op3 & 0x80) == 0x80)
1269 {
1270 if ((op2 & 0x08) == 0)
1271 second_reloc = 1;
1272
1273 if (second_reloc)
1274 {
1275 op3 &= ~0x08;
1276 bfd_put_8 (abfd, op3, op_ptr + 3);
1277 }
1278 else
1279 {
1280 op2 &= ~0x08;
1281 bfd_put_8 (abfd, op2, op_ptr + 2);
1282 }
1283 goto r_h8_dir32a16_common;
1284 }
1285 }
1286
1287 /* Now check for short version of MOVA. */
1288 op_ptr = contents + irel->r_offset - 2;
1289 op0 = bfd_get_8 (abfd, op_ptr + 0);
1290 op1 = bfd_get_8 (abfd, op_ptr + 1);
1291
1292 if (op0 == 0x7a
1293 && (op1 & 0x88) == 0x80)
1294 {
1295 op1 |= 0x08;
1296 bfd_put_8 (abfd, op1, op_ptr + 1);
1297 goto r_h8_dir32a16_common;
1298 }
1299
bc7eab72
KH
1300 /* Get the opcode. */
1301 code = bfd_get_8 (abfd, contents + irel->r_offset - 1);
5907e628 1302
7e89635a
KH
1303 /* Fix the opcode. For all the instructions that
1304 belong to this relaxation, we simply need to turn
1305 off bit 0x20 in the previous byte. */
bc7eab72 1306 code &= ~0x20;
5907e628 1307
bc7eab72 1308 bfd_put_8 (abfd, code, contents + irel->r_offset - 1);
5907e628 1309
bcb012d3 1310 r_h8_dir32a16_common:
bc7eab72
KH
1311 /* Fix the relocation's type. */
1312 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8c17da6e 1313 R_H8_DIR16);
5907e628 1314
bc7eab72
KH
1315 /* Delete two bytes of data. */
1316 if (!elf32_h8_relax_delete_bytes (abfd, sec,
5907e628
JL
1317 irel->r_offset + 1, 2))
1318 goto error_return;
1319
bc7eab72 1320 /* That will change things, so, we should relax again.
5907e628 1321 Note that this is not required, and it may be slow. */
b34976b6 1322 *again = TRUE;
5907e628
JL
1323 }
1324 break;
1325 }
1326
1327 default:
1328 break;
1329 }
1330 }
1331
6cdc0ccc
AM
1332 if (isymbuf != NULL
1333 && symtab_hdr->contents != (unsigned char *) isymbuf)
5907e628 1334 {
6cdc0ccc
AM
1335 if (! link_info->keep_memory)
1336 free (isymbuf);
1337 else
1338 symtab_hdr->contents = (unsigned char *) isymbuf;
5907e628
JL
1339 }
1340
6cdc0ccc
AM
1341 if (contents != NULL
1342 && elf_section_data (sec)->this_hdr.contents != contents)
5907e628
JL
1343 {
1344 if (! link_info->keep_memory)
6cdc0ccc 1345 free (contents);
5907e628
JL
1346 else
1347 {
1348 /* Cache the section contents for elf_link_input_bfd. */
1349 elf_section_data (sec)->this_hdr.contents = contents;
1350 }
9ad5cbcf
AM
1351 }
1352
6cdc0ccc
AM
1353 if (internal_relocs != NULL
1354 && elf_section_data (sec)->relocs != internal_relocs)
1355 free (internal_relocs);
5907e628 1356
b34976b6 1357 return TRUE;
5907e628
JL
1358
1359 error_return:
6cdc0ccc
AM
1360 if (isymbuf != NULL
1361 && symtab_hdr->contents != (unsigned char *) isymbuf)
1362 free (isymbuf);
1363 if (contents != NULL
1364 && elf_section_data (sec)->this_hdr.contents != contents)
1365 free (contents);
1366 if (internal_relocs != NULL
1367 && elf_section_data (sec)->relocs != internal_relocs)
1368 free (internal_relocs);
b34976b6 1369 return FALSE;
5907e628
JL
1370}
1371
1372/* Delete some bytes from a section while relaxing. */
1373
b34976b6 1374static bfd_boolean
c6baf75e 1375elf32_h8_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count)
5907e628
JL
1376{
1377 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1378 unsigned int sec_shndx;
5907e628
JL
1379 bfd_byte *contents;
1380 Elf_Internal_Rela *irel, *irelend;
6cdc0ccc
AM
1381 Elf_Internal_Sym *isym;
1382 Elf_Internal_Sym *isymend;
5907e628 1383 bfd_vma toaddr;
9ad5cbcf
AM
1384 struct elf_link_hash_entry **sym_hashes;
1385 struct elf_link_hash_entry **end_hashes;
1386 unsigned int symcount;
5907e628 1387
9ad5cbcf 1388 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1389
1390 contents = elf_section_data (sec)->this_hdr.contents;
1391
eea6121a 1392 toaddr = sec->size;
5907e628
JL
1393
1394 irel = elf_section_data (sec)->relocs;
1395 irelend = irel + sec->reloc_count;
1396
1397 /* Actually delete the bytes. */
dc810e39
AM
1398 memmove (contents + addr, contents + addr + count,
1399 (size_t) (toaddr - addr - count));
eea6121a 1400 sec->size -= count;
5907e628
JL
1401
1402 /* Adjust all the relocs. */
1403 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1404 {
1405 /* Get the new reloc address. */
1406 if ((irel->r_offset > addr
1407 && irel->r_offset < toaddr))
1408 irel->r_offset -= count;
1409 }
1410
1411 /* Adjust the local symbols defined in this section. */
6cdc0ccc
AM
1412 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1413 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1414 isymend = isym + symtab_hdr->sh_info;
1415 for (; isym < isymend; isym++)
5907e628 1416 {
6cdc0ccc
AM
1417 if (isym->st_shndx == sec_shndx
1418 && isym->st_value > addr
1419 && isym->st_value < toaddr)
1420 isym->st_value -= count;
5907e628
JL
1421 }
1422
1423 /* Now adjust the global symbols defined in this section. */
9ad5cbcf
AM
1424 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1425 - symtab_hdr->sh_info);
1426 sym_hashes = elf_sym_hashes (abfd);
1427 end_hashes = sym_hashes + symcount;
1428 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1429 {
9ad5cbcf
AM
1430 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1431 if ((sym_hash->root.type == bfd_link_hash_defined
1432 || sym_hash->root.type == bfd_link_hash_defweak)
1433 && sym_hash->root.u.def.section == sec
1434 && sym_hash->root.u.def.value > addr
1435 && sym_hash->root.u.def.value < toaddr)
5907e628 1436 {
9ad5cbcf 1437 sym_hash->root.u.def.value -= count;
5907e628
JL
1438 }
1439 }
1440
b34976b6 1441 return TRUE;
5907e628
JL
1442}
1443
b34976b6
AM
1444/* Return TRUE if a symbol exists at the given address, else return
1445 FALSE. */
1446static bfd_boolean
c6baf75e 1447elf32_h8_symbol_address_p (bfd *abfd, asection *sec, bfd_vma addr)
5907e628
JL
1448{
1449 Elf_Internal_Shdr *symtab_hdr;
9ad5cbcf 1450 unsigned int sec_shndx;
6cdc0ccc
AM
1451 Elf_Internal_Sym *isym;
1452 Elf_Internal_Sym *isymend;
9ad5cbcf
AM
1453 struct elf_link_hash_entry **sym_hashes;
1454 struct elf_link_hash_entry **end_hashes;
1455 unsigned int symcount;
5907e628 1456
9ad5cbcf 1457 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
5907e628
JL
1458
1459 /* Examine all the symbols. */
9ad5cbcf 1460 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6cdc0ccc
AM
1461 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1462 isymend = isym + symtab_hdr->sh_info;
1463 for (; isym < isymend; isym++)
5907e628 1464 {
6cdc0ccc
AM
1465 if (isym->st_shndx == sec_shndx
1466 && isym->st_value == addr)
b34976b6 1467 return TRUE;
5907e628
JL
1468 }
1469
9ad5cbcf
AM
1470 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1471 - symtab_hdr->sh_info);
1472 sym_hashes = elf_sym_hashes (abfd);
1473 end_hashes = sym_hashes + symcount;
1474 for (; sym_hashes < end_hashes; sym_hashes++)
5907e628 1475 {
9ad5cbcf
AM
1476 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1477 if ((sym_hash->root.type == bfd_link_hash_defined
1478 || sym_hash->root.type == bfd_link_hash_defweak)
1479 && sym_hash->root.u.def.section == sec
1480 && sym_hash->root.u.def.value == addr)
b34976b6 1481 return TRUE;
5907e628 1482 }
9ad5cbcf 1483
b34976b6 1484 return FALSE;
5907e628
JL
1485}
1486
1487/* This is a version of bfd_generic_get_relocated_section_contents
1488 which uses elf32_h8_relocate_section. */
1489
1490static bfd_byte *
c6baf75e
RS
1491elf32_h8_get_relocated_section_contents (bfd *output_bfd,
1492 struct bfd_link_info *link_info,
1493 struct bfd_link_order *link_order,
1494 bfd_byte *data,
1495 bfd_boolean relocatable,
1496 asymbol **symbols)
5907e628
JL
1497{
1498 Elf_Internal_Shdr *symtab_hdr;
1499 asection *input_section = link_order->u.indirect.section;
1500 bfd *input_bfd = input_section->owner;
1501 asection **sections = NULL;
1502 Elf_Internal_Rela *internal_relocs = NULL;
6cdc0ccc 1503 Elf_Internal_Sym *isymbuf = NULL;
5907e628
JL
1504
1505 /* We only need to handle the case of relaxing, or of having a
1506 particular set of section contents, specially. */
1049f94e 1507 if (relocatable
5907e628
JL
1508 || elf_section_data (input_section)->this_hdr.contents == NULL)
1509 return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
1510 link_order, data,
1049f94e 1511 relocatable,
5907e628
JL
1512 symbols);
1513
1514 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
1515
1516 memcpy (data, elf_section_data (input_section)->this_hdr.contents,
eea6121a 1517 (size_t) input_section->size);
5907e628
JL
1518
1519 if ((input_section->flags & SEC_RELOC) != 0
1520 && input_section->reloc_count > 0)
1521 {
5907e628 1522 asection **secpp;
6cdc0ccc 1523 Elf_Internal_Sym *isym, *isymend;
9ad5cbcf 1524 bfd_size_type amt;
5907e628 1525
45d6a902 1526 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 1527 (input_bfd, input_section, NULL,
b34976b6 1528 (Elf_Internal_Rela *) NULL, FALSE));
5907e628
JL
1529 if (internal_relocs == NULL)
1530 goto error_return;
1531
6cdc0ccc
AM
1532 if (symtab_hdr->sh_info != 0)
1533 {
1534 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1535 if (isymbuf == NULL)
1536 isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
1537 symtab_hdr->sh_info, 0,
1538 NULL, NULL, NULL);
1539 if (isymbuf == NULL)
1540 goto error_return;
1541 }
5907e628 1542
9ad5cbcf
AM
1543 amt = symtab_hdr->sh_info;
1544 amt *= sizeof (asection *);
1545 sections = (asection **) bfd_malloc (amt);
1546 if (sections == NULL && amt != 0)
5907e628
JL
1547 goto error_return;
1548
6cdc0ccc
AM
1549 isymend = isymbuf + symtab_hdr->sh_info;
1550 for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
5907e628
JL
1551 {
1552 asection *isec;
1553
6cdc0ccc 1554 if (isym->st_shndx == SHN_UNDEF)
5907e628 1555 isec = bfd_und_section_ptr;
6cdc0ccc 1556 else if (isym->st_shndx == SHN_ABS)
5907e628 1557 isec = bfd_abs_section_ptr;
6cdc0ccc 1558 else if (isym->st_shndx == SHN_COMMON)
5907e628
JL
1559 isec = bfd_com_section_ptr;
1560 else
6cdc0ccc 1561 isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
5907e628
JL
1562
1563 *secpp = isec;
1564 }
1565
1566 if (! elf32_h8_relocate_section (output_bfd, link_info, input_bfd,
1567 input_section, data, internal_relocs,
6cdc0ccc 1568 isymbuf, sections))
5907e628
JL
1569 goto error_return;
1570
1571 if (sections != NULL)
1572 free (sections);
6cdc0ccc
AM
1573 if (isymbuf != NULL
1574 && symtab_hdr->contents != (unsigned char *) isymbuf)
1575 free (isymbuf);
1576 if (elf_section_data (input_section)->relocs != internal_relocs)
5907e628 1577 free (internal_relocs);
5907e628
JL
1578 }
1579
1580 return data;
1581
1582 error_return:
5907e628
JL
1583 if (sections != NULL)
1584 free (sections);
6cdc0ccc
AM
1585 if (isymbuf != NULL
1586 && symtab_hdr->contents != (unsigned char *) isymbuf)
1587 free (isymbuf);
1588 if (internal_relocs != NULL
1589 && elf_section_data (input_section)->relocs != internal_relocs)
1590 free (internal_relocs);
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JL
1591 return NULL;
1592}
1593
0a83638b 1594
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JR
1595#define TARGET_BIG_SYM bfd_elf32_h8300_vec
1596#define TARGET_BIG_NAME "elf32-h8300"
1597#define ELF_ARCH bfd_arch_h8300
1598#define ELF_MACHINE_CODE EM_H8_300
1599#define ELF_MAXPAGESIZE 0x1
1600#define bfd_elf32_bfd_reloc_type_lookup elf32_h8_reloc_type_lookup
157090f7 1601#define bfd_elf32_bfd_reloc_name_lookup elf32_h8_reloc_name_lookup
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JR
1602#define elf_info_to_howto elf32_h8_info_to_howto
1603#define elf_info_to_howto_rel elf32_h8_info_to_howto_rel
1604
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JL
1605/* So we can set/examine bits in e_flags to get the specific
1606 H8 architecture in use. */
1607#define elf_backend_final_write_processing \
1608 elf32_h8_final_write_processing
1609#define elf_backend_object_p \
1610 elf32_h8_object_p
1611#define bfd_elf32_bfd_merge_private_bfd_data \
1612 elf32_h8_merge_private_bfd_data
1613
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JR
1614/* ??? when elf_backend_relocate_section is not defined, elf32-target.h
1615 defaults to using _bfd_generic_link_hash_table_create, but
c152c796 1616 bfd_elf_size_dynamic_sections uses
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JR
1617 dynobj = elf_hash_table (info)->dynobj;
1618 and thus requires an elf hash table. */
1619#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
1620
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JL
1621/* Use an H8 specific linker, not the ELF generic linker. */
1622#define elf_backend_relocate_section elf32_h8_relocate_section
f0fe0e16 1623#define elf_backend_rela_normal 1
2627de83 1624#define elf_backend_can_gc_sections 1
5e47149d 1625
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JL
1626/* And relaxing stuff. */
1627#define bfd_elf32_bfd_relax_section elf32_h8_relax_section
1628#define bfd_elf32_bfd_get_relocated_section_contents \
1629 elf32_h8_get_relocated_section_contents
1630
84477db9 1631#define elf_symbol_leading_char '_'
5907e628 1632
e01b0e69 1633#include "elf32-target.h"
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