Make "cbfd" a gdb_bfd_ref_ptr
[deliverable/binutils-gdb.git] / bfd / elf32-nds32.c
CommitLineData
35c08157 1/* NDS32-specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
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3 Contributed by Andes Technology Corporation.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
1c8f6a4d 20 02110-1301, USA. */
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21
22
23#include "sysdep.h"
24#include "bfd.h"
25#include "bfd_stdint.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "libiberty.h"
30#include "bfd_stdint.h"
31#include "elf/nds32.h"
32#include "opcode/nds32.h"
33#include "elf32-nds32.h"
34#include "opcode/cgen.h"
35#include "../opcodes/nds32-opc.h"
36
37/* Relocation HOWTO functions. */
38static bfd_reloc_status_type nds32_elf_ignore_reloc
39 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
40static bfd_reloc_status_type nds32_elf_9_pcrel_reloc
41 (bfd *, arelent *, asymbol *, void *, asection *, bfd *, char **);
42static bfd_reloc_status_type nds32_elf_hi20_reloc
43 (bfd *, arelent *, asymbol *, void *,
44 asection *, bfd *, char **);
45static bfd_reloc_status_type nds32_elf_lo12_reloc
46 (bfd *, arelent *, asymbol *, void *,
47 asection *, bfd *, char **);
48static bfd_reloc_status_type nds32_elf_generic_reloc
49 (bfd *, arelent *, asymbol *, void *,
50 asection *, bfd *, char **);
51static bfd_reloc_status_type nds32_elf_sda15_reloc
52 (bfd *, arelent *, asymbol *, void *,
53 asection *, bfd *, char **);
54
55/* Helper functions for HOWTO. */
56static bfd_reloc_status_type nds32_elf_do_9_pcrel_reloc
57 (bfd *, reloc_howto_type *, asection *, bfd_byte *, bfd_vma,
58 asection *, bfd_vma, bfd_vma);
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59
60/* Nds32 helper functions. */
35c08157 61static bfd_vma calculate_memory_address
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62(bfd *, Elf_Internal_Rela *, Elf_Internal_Sym *, Elf_Internal_Shdr *);
63static int nds32_get_section_contents (bfd *, asection *,
64 bfd_byte **, bfd_boolean);
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65static int nds32_get_local_syms (bfd *, asection *ATTRIBUTE_UNUSED,
66 Elf_Internal_Sym **);
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67static bfd_boolean nds32_relax_fp_as_gp
68 (struct bfd_link_info *link_info, bfd *abfd, asection *sec,
69 Elf_Internal_Rela *internal_relocs, Elf_Internal_Rela *irelend,
70 Elf_Internal_Sym *isymbuf);
71static bfd_boolean nds32_fag_remove_unused_fpbase
72 (bfd *abfd, asection *sec, Elf_Internal_Rela *internal_relocs,
73 Elf_Internal_Rela *irelend);
74
75enum
76{
77 MACH_V1 = bfd_mach_n1h,
78 MACH_V2 = bfd_mach_n1h_v2,
79 MACH_V3 = bfd_mach_n1h_v3,
80 MACH_V3M = bfd_mach_n1h_v3m
81};
82
83#define MIN(a, b) ((a) > (b) ? (b) : (a))
84#define MAX(a, b) ((a) > (b) ? (a) : (b))
85
86/* The name of the dynamic interpreter. This is put in the .interp
87 section. */
88#define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1"
89
90/* The nop opcode we use. */
91#define NDS32_NOP32 0x40000009
92#define NDS32_NOP16 0x9200
93
94/* The size in bytes of an entry in the procedure linkage table. */
95#define PLT_ENTRY_SIZE 24
96#define PLT_HEADER_SIZE 24
97
98/* The first entry in a procedure linkage table are reserved,
99 and the initial contents are unimportant (we zero them out).
100 Subsequent entries look like this. */
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101#define PLT0_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(.got+4) */
102#define PLT0_ENTRY_WORD1 0x58f78000 /* ori r15, r25, LO12(.got+4) */
103#define PLT0_ENTRY_WORD2 0x05178000 /* lwi r17, [r15+0] */
104#define PLT0_ENTRY_WORD3 0x04f78001 /* lwi r15, [r15+4] */
105#define PLT0_ENTRY_WORD4 0x4a003c00 /* jr r15 */
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106
107/* $ta is change to $r15 (from $r25). */
108#define PLT0_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[1]@GOT) */
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109#define PLT0_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[1]@GOT) */
110#define PLT0_PIC_ENTRY_WORD2 0x40f7f400 /* add r15, gp, r15 */
111#define PLT0_PIC_ENTRY_WORD3 0x05178000 /* lwi r17, [r15+0] */
112#define PLT0_PIC_ENTRY_WORD4 0x04f78001 /* lwi r15, [r15+4] */
113#define PLT0_PIC_ENTRY_WORD5 0x4a003c00 /* jr r15 */
114
115#define PLT_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(&got[n+3]) */
116#define PLT_ENTRY_WORD1 0x04f78000 /* lwi r15, r15, LO12(&got[n+3]) */
117#define PLT_ENTRY_WORD2 0x4a003c00 /* jr r15 */
118#define PLT_ENTRY_WORD3 0x45000000 /* movi r16, sizeof(RELA) * n */
119#define PLT_ENTRY_WORD4 0x48000000 /* j .plt0. */
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120
121#define PLT_PIC_ENTRY_WORD0 0x46f00000 /* sethi r15, HI20(got[n+3]@GOT) */
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122#define PLT_PIC_ENTRY_WORD1 0x58f78000 /* ori r15, r15, LO12(got[n+3]@GOT) */
123#define PLT_PIC_ENTRY_WORD2 0x38febc02 /* lw r15, [gp+r15] */
124#define PLT_PIC_ENTRY_WORD3 0x4a003c00 /* jr r15 */
125#define PLT_PIC_ENTRY_WORD4 0x45000000 /* movi r16, sizeof(RELA) * n */
126#define PLT_PIC_ENTRY_WORD5 0x48000000 /* j .plt0 */
35c08157 127
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128/* These are macros used to get the relocation accurate value. */
129#define ACCURATE_8BIT_S1 (0x100)
130#define ACCURATE_U9BIT_S1 (0x400)
131#define ACCURATE_12BIT_S1 (0x2000)
132#define ACCURATE_14BIT_S1 (0x4000)
133#define ACCURATE_19BIT (0x40000)
134
135/* These are macros used to get the relocation conservative value. */
136#define CONSERVATIVE_8BIT_S1 (0x100 - 4)
137#define CONSERVATIVE_14BIT_S1 (0x4000 - 4)
138#define CONSERVATIVE_16BIT_S1 (0x10000 - 4)
139#define CONSERVATIVE_24BIT_S1 (0x1000000 - 4)
140/* These must be more conservative because the address may be in
141 different segment. */
142#define CONSERVATIVE_15BIT (0x4000 - 0x1000)
143#define CONSERVATIVE_15BIT_S1 (0x8000 - 0x1000)
144#define CONSERVATIVE_15BIT_S2 (0x10000 - 0x1000)
145#define CONSERVATIVE_19BIT (0x40000 - 0x1000)
146#define CONSERVATIVE_20BIT (0x80000 - 0x1000)
147
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148/* Size of small data/bss sections, used to calculate SDA_BASE. */
149static long got_size = 0;
150static int is_SDA_BASE_set = 0;
35c08157 151
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152/* Convert ELF-VER in eflags to string for debugging purpose. */
153static const char *const nds32_elfver_strtab[] =
154{
155 "ELF-1.2",
156 "ELF-1.3",
157 "ELF-1.4",
158};
159
160/* The nds32 linker needs to keep track of the number of relocs that it
161 decides to copy in check_relocs for each symbol. This is so that
162 it can discard PC relative relocs if it doesn't need them when
163 linking with -Bsymbolic. We store the information in a field
164 extending the regular ELF linker hash table. */
165
166/* This structure keeps track of the number of PC relative relocs we
167 have copied for a given symbol. */
168
169struct elf_nds32_pcrel_relocs_copied
170{
171 /* Next section. */
172 struct elf_nds32_pcrel_relocs_copied *next;
173 /* A section in dynobj. */
174 asection *section;
175 /* Number of relocs copied in this section. */
176 bfd_size_type count;
177};
178
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179/* Nds32 ELF linker hash entry. */
180
181struct elf_nds32_link_hash_entry
182{
183 struct elf_link_hash_entry root;
184
185 /* Track dynamic relocs copied for this symbol. */
3bf083ed 186 struct elf_dyn_relocs *dyn_relocs;
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187
188 /* For checking relocation type. */
189#define GOT_UNKNOWN 0
190#define GOT_NORMAL 1
191#define GOT_TLS_IE 2
192 unsigned int tls_type;
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193};
194
195/* Get the nds32 ELF linker hash table from a link_info structure. */
196
197#define FP_BASE_NAME "_FP_BASE_"
198static int check_start_export_sym = 0;
35c08157 199
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200/* The offset for executable tls relaxation. */
201#define TP_OFFSET 0x0
202
203struct elf_nds32_obj_tdata
204{
205 struct elf_obj_tdata root;
206
207 /* tls_type for each local got entry. */
208 char *local_got_tls_type;
209};
210
211#define elf_nds32_tdata(bfd) \
212 ((struct elf_nds32_obj_tdata *) (bfd)->tdata.any)
213
214#define elf32_nds32_local_got_tls_type(bfd) \
215 (elf_nds32_tdata (bfd)->local_got_tls_type)
216
217#define elf32_nds32_hash_entry(ent) ((struct elf_nds32_link_hash_entry *)(ent))
218
219static bfd_boolean
220nds32_elf_mkobject (bfd *abfd)
221{
222 return bfd_elf_allocate_object (abfd, sizeof (struct elf_nds32_obj_tdata),
223 NDS32_ELF_DATA);
224}
225
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226/* Relocations used for relocation. */
227static reloc_howto_type nds32_elf_howto_table[] =
228{
229 /* This reloc does nothing. */
230 HOWTO (R_NDS32_NONE, /* type */
231 0, /* rightshift */
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232 3, /* size (0 = byte, 1 = short, 2 = long) */
233 0, /* bitsize */
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234 FALSE, /* pc_relative */
235 0, /* bitpos */
6346d5ca 236 complain_overflow_dont, /* complain_on_overflow */
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237 bfd_elf_generic_reloc, /* special_function */
238 "R_NDS32_NONE", /* name */
239 FALSE, /* partial_inplace */
240 0, /* src_mask */
241 0, /* dst_mask */
242 FALSE), /* pcrel_offset */
243
244 /* A 16 bit absolute relocation. */
245 HOWTO (R_NDS32_16, /* type */
246 0, /* rightshift */
247 1, /* size (0 = byte, 1 = short, 2 = long) */
248 16, /* bitsize */
249 FALSE, /* pc_relative */
250 0, /* bitpos */
251 complain_overflow_bitfield, /* complain_on_overflow */
252 nds32_elf_generic_reloc, /* special_function */
253 "R_NDS32_16", /* name */
254 FALSE, /* partial_inplace */
255 0xffff, /* src_mask */
256 0xffff, /* dst_mask */
257 FALSE), /* pcrel_offset */
258
259 /* A 32 bit absolute relocation. */
260 HOWTO (R_NDS32_32, /* type */
261 0, /* rightshift */
262 2, /* size (0 = byte, 1 = short, 2 = long) */
263 32, /* bitsize */
264 FALSE, /* pc_relative */
265 0, /* bitpos */
266 complain_overflow_bitfield, /* complain_on_overflow */
267 nds32_elf_generic_reloc, /* special_function */
268 "R_NDS32_32", /* name */
269 FALSE, /* partial_inplace */
270 0xffffffff, /* src_mask */
271 0xffffffff, /* dst_mask */
272 FALSE), /* pcrel_offset */
273
274 /* A 20 bit address. */
275 HOWTO (R_NDS32_20, /* type */
276 0, /* rightshift */
277 2, /* size (0 = byte, 1 = short, 2 = long) */
278 20, /* bitsize */
279 FALSE, /* pc_relative */
280 0, /* bitpos */
281 complain_overflow_unsigned, /* complain_on_overflow */
282 nds32_elf_generic_reloc, /* special_function */
283 "R_NDS32_20", /* name */
284 FALSE, /* partial_inplace */
285 0xfffff, /* src_mask */
286 0xfffff, /* dst_mask */
287 FALSE), /* pcrel_offset */
288
289 /* An PC Relative 9-bit relocation, shifted by 2.
290 This reloc is complicated because relocations are relative to pc & -4.
291 i.e. branches in the right insn slot use the address of the left insn
292 slot for pc. */
293 /* ??? It's not clear whether this should have partial_inplace set or not.
294 Branch relaxing in the assembler can store the addend in the insn,
295 and if bfd_install_relocation gets called the addend may get added
296 again. */
297 HOWTO (R_NDS32_9_PCREL, /* type */
298 1, /* rightshift */
299 1, /* size (0 = byte, 1 = short, 2 = long) */
300 8, /* bitsize */
301 TRUE, /* pc_relative */
302 0, /* bitpos */
303 complain_overflow_signed, /* complain_on_overflow */
304 nds32_elf_9_pcrel_reloc, /* special_function */
305 "R_NDS32_9_PCREL", /* name */
306 FALSE, /* partial_inplace */
307 0xff, /* src_mask */
308 0xff, /* dst_mask */
309 TRUE), /* pcrel_offset */
310
311 /* A relative 15 bit relocation, right shifted by 1. */
312 HOWTO (R_NDS32_15_PCREL, /* type */
313 1, /* rightshift */
314 2, /* size (0 = byte, 1 = short, 2 = long) */
315 14, /* bitsize */
316 TRUE, /* pc_relative */
317 0, /* bitpos */
318 complain_overflow_signed, /* complain_on_overflow */
319 bfd_elf_generic_reloc, /* special_function */
320 "R_NDS32_15_PCREL", /* name */
321 FALSE, /* partial_inplace */
322 0x3fff, /* src_mask */
323 0x3fff, /* dst_mask */
324 TRUE), /* pcrel_offset */
325
326 /* A relative 17 bit relocation, right shifted by 1. */
327 HOWTO (R_NDS32_17_PCREL, /* type */
328 1, /* rightshift */
329 2, /* size (0 = byte, 1 = short, 2 = long) */
330 16, /* bitsize */
331 TRUE, /* pc_relative */
332 0, /* bitpos */
333 complain_overflow_signed, /* complain_on_overflow */
334 bfd_elf_generic_reloc, /* special_function */
335 "R_NDS32_17_PCREL", /* name */
336 FALSE, /* partial_inplace */
337 0xffff, /* src_mask */
338 0xffff, /* dst_mask */
339 TRUE), /* pcrel_offset */
340
341 /* A relative 25 bit relocation, right shifted by 1. */
342 /* ??? It's not clear whether this should have partial_inplace set or not.
343 Branch relaxing in the assembler can store the addend in the insn,
344 and if bfd_install_relocation gets called the addend may get added
345 again. */
346 HOWTO (R_NDS32_25_PCREL, /* type */
347 1, /* rightshift */
348 2, /* size (0 = byte, 1 = short, 2 = long) */
349 24, /* bitsize */
350 TRUE, /* pc_relative */
351 0, /* bitpos */
352 complain_overflow_signed, /* complain_on_overflow */
353 bfd_elf_generic_reloc, /* special_function */
354 "R_NDS32_25_PCREL", /* name */
355 FALSE, /* partial_inplace */
356 0xffffff, /* src_mask */
357 0xffffff, /* dst_mask */
358 TRUE), /* pcrel_offset */
359
360 /* High 20 bits of address when lower 12 is or'd in. */
361 HOWTO (R_NDS32_HI20, /* type */
362 12, /* rightshift */
363 2, /* size (0 = byte, 1 = short, 2 = long) */
364 20, /* bitsize */
365 FALSE, /* pc_relative */
366 0, /* bitpos */
367 complain_overflow_dont,/* complain_on_overflow */
368 nds32_elf_hi20_reloc, /* special_function */
369 "R_NDS32_HI20", /* name */
370 FALSE, /* partial_inplace */
371 0x000fffff, /* src_mask */
372 0x000fffff, /* dst_mask */
373 FALSE), /* pcrel_offset */
374
375 /* Lower 12 bits of address. */
376 HOWTO (R_NDS32_LO12S3, /* type */
377 3, /* rightshift */
378 2, /* size (0 = byte, 1 = short, 2 = long) */
379 9, /* bitsize */
380 FALSE, /* pc_relative */
381 0, /* bitpos */
382 complain_overflow_dont,/* complain_on_overflow */
383 nds32_elf_lo12_reloc, /* special_function */
384 "R_NDS32_LO12S3", /* name */
385 FALSE, /* partial_inplace */
386 0x000001ff, /* src_mask */
387 0x000001ff, /* dst_mask */
388 FALSE), /* pcrel_offset */
389
390 /* Lower 12 bits of address. */
391 HOWTO (R_NDS32_LO12S2, /* type */
392 2, /* rightshift */
393 2, /* size (0 = byte, 1 = short, 2 = long) */
394 10, /* bitsize */
395 FALSE, /* pc_relative */
396 0, /* bitpos */
397 complain_overflow_dont,/* complain_on_overflow */
398 nds32_elf_lo12_reloc, /* special_function */
399 "R_NDS32_LO12S2", /* name */
400 FALSE, /* partial_inplace */
401 0x000003ff, /* src_mask */
402 0x000003ff, /* dst_mask */
403 FALSE), /* pcrel_offset */
404
405 /* Lower 12 bits of address. */
406 HOWTO (R_NDS32_LO12S1, /* type */
407 1, /* rightshift */
408 2, /* size (0 = byte, 1 = short, 2 = long) */
409 11, /* bitsize */
410 FALSE, /* pc_relative */
411 0, /* bitpos */
412 complain_overflow_dont,/* complain_on_overflow */
413 nds32_elf_lo12_reloc, /* special_function */
414 "R_NDS32_LO12S1", /* name */
415 FALSE, /* partial_inplace */
416 0x000007ff, /* src_mask */
417 0x000007ff, /* dst_mask */
418 FALSE), /* pcrel_offset */
419
420 /* Lower 12 bits of address. */
421 HOWTO (R_NDS32_LO12S0, /* type */
422 0, /* rightshift */
423 2, /* size (0 = byte, 1 = short, 2 = long) */
424 12, /* bitsize */
425 FALSE, /* pc_relative */
426 0, /* bitpos */
427 complain_overflow_dont,/* complain_on_overflow */
428 nds32_elf_lo12_reloc, /* special_function */
429 "R_NDS32_LO12S0", /* name */
430 FALSE, /* partial_inplace */
431 0x00000fff, /* src_mask */
432 0x00000fff, /* dst_mask */
433 FALSE), /* pcrel_offset */
434
435 /* Small data area 15 bits offset. */
436 HOWTO (R_NDS32_SDA15S3, /* type */
437 3, /* rightshift */
438 2, /* size (0 = byte, 1 = short, 2 = long) */
439 15, /* bitsize */
440 FALSE, /* pc_relative */
441 0, /* bitpos */
442 complain_overflow_signed, /* complain_on_overflow */
443 nds32_elf_sda15_reloc, /* special_function */
444 "R_NDS32_SDA15S3", /* name */
445 FALSE, /* partial_inplace */
446 0x00007fff, /* src_mask */
447 0x00007fff, /* dst_mask */
448 FALSE), /* pcrel_offset */
449
450 /* Small data area 15 bits offset. */
451 HOWTO (R_NDS32_SDA15S2, /* type */
452 2, /* rightshift */
453 2, /* size (0 = byte, 1 = short, 2 = long) */
454 15, /* bitsize */
455 FALSE, /* pc_relative */
456 0, /* bitpos */
457 complain_overflow_signed, /* complain_on_overflow */
458 nds32_elf_sda15_reloc, /* special_function */
459 "R_NDS32_SDA15S2", /* name */
460 FALSE, /* partial_inplace */
461 0x00007fff, /* src_mask */
462 0x00007fff, /* dst_mask */
463 FALSE), /* pcrel_offset */
464
465 /* Small data area 15 bits offset. */
466 HOWTO (R_NDS32_SDA15S1, /* type */
467 1, /* rightshift */
468 2, /* size (0 = byte, 1 = short, 2 = long) */
469 15, /* bitsize */
470 FALSE, /* pc_relative */
471 0, /* bitpos */
472 complain_overflow_signed, /* complain_on_overflow */
473 nds32_elf_sda15_reloc, /* special_function */
474 "R_NDS32_SDA15S1", /* name */
475 FALSE, /* partial_inplace */
476 0x00007fff, /* src_mask */
477 0x00007fff, /* dst_mask */
478 FALSE), /* pcrel_offset */
479
480 /* Small data area 15 bits offset. */
481 HOWTO (R_NDS32_SDA15S0, /* type */
482 0, /* rightshift */
483 2, /* size (0 = byte, 1 = short, 2 = long) */
484 15, /* bitsize */
485 FALSE, /* pc_relative */
486 0, /* bitpos */
487 complain_overflow_signed, /* complain_on_overflow */
488 nds32_elf_sda15_reloc, /* special_function */
489 "R_NDS32_SDA15S0", /* name */
490 FALSE, /* partial_inplace */
491 0x00007fff, /* src_mask */
492 0x00007fff, /* dst_mask */
493 FALSE), /* pcrel_offset */
494
495 /* GNU extension to record C++ vtable hierarchy */
496 HOWTO (R_NDS32_GNU_VTINHERIT, /* type */
497 0, /* rightshift */
498 2, /* size (0 = byte, 1 = short, 2 = long) */
499 0, /* bitsize */
500 FALSE, /* pc_relative */
501 0, /* bitpos */
502 complain_overflow_dont,/* complain_on_overflow */
503 NULL, /* special_function */
504 "R_NDS32_GNU_VTINHERIT", /* name */
505 FALSE, /* partial_inplace */
506 0, /* src_mask */
507 0, /* dst_mask */
508 FALSE), /* pcrel_offset */
509
510 /* GNU extension to record C++ vtable member usage */
511 HOWTO (R_NDS32_GNU_VTENTRY, /* type */
512 0, /* rightshift */
513 2, /* size (0 = byte, 1 = short, 2 = long) */
514 0, /* bitsize */
515 FALSE, /* pc_relative */
516 0, /* bitpos */
517 complain_overflow_dont,/* complain_on_overflow */
518 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
519 "R_NDS32_GNU_VTENTRY", /* name */
520 FALSE, /* partial_inplace */
521 0, /* src_mask */
522 0, /* dst_mask */
523 FALSE), /* pcrel_offset */
524
525 /* A 16 bit absolute relocation. */
526 HOWTO (R_NDS32_16_RELA, /* type */
527 0, /* rightshift */
528 1, /* size (0 = byte, 1 = short, 2 = long) */
529 16, /* bitsize */
530 FALSE, /* pc_relative */
531 0, /* bitpos */
532 complain_overflow_bitfield, /* complain_on_overflow */
533 bfd_elf_generic_reloc, /* special_function */
534 "R_NDS32_16_RELA", /* name */
535 FALSE, /* partial_inplace */
536 0xffff, /* src_mask */
537 0xffff, /* dst_mask */
538 FALSE), /* pcrel_offset */
539
540 /* A 32 bit absolute relocation. */
541 HOWTO (R_NDS32_32_RELA, /* type */
542 0, /* rightshift */
543 2, /* size (0 = byte, 1 = short, 2 = long) */
544 32, /* bitsize */
545 FALSE, /* pc_relative */
546 0, /* bitpos */
547 complain_overflow_bitfield, /* complain_on_overflow */
548 bfd_elf_generic_reloc, /* special_function */
549 "R_NDS32_32_RELA", /* name */
550 FALSE, /* partial_inplace */
551 0xffffffff, /* src_mask */
552 0xffffffff, /* dst_mask */
553 FALSE), /* pcrel_offset */
554
555 /* A 20 bit address. */
556 HOWTO (R_NDS32_20_RELA, /* type */
557 0, /* rightshift */
558 2, /* size (0 = byte, 1 = short, 2 = long) */
559 20, /* bitsize */
560 FALSE, /* pc_relative */
561 0, /* bitpos */
562 complain_overflow_signed, /* complain_on_overflow */
563 bfd_elf_generic_reloc, /* special_function */
564 "R_NDS32_20_RELA", /* name */
565 FALSE, /* partial_inplace */
566 0xfffff, /* src_mask */
567 0xfffff, /* dst_mask */
568 FALSE), /* pcrel_offset */
569
570 HOWTO (R_NDS32_9_PCREL_RELA, /* type */
571 1, /* rightshift */
572 1, /* size (0 = byte, 1 = short, 2 = long) */
573 8, /* bitsize */
574 TRUE, /* pc_relative */
575 0, /* bitpos */
576 complain_overflow_signed, /* complain_on_overflow */
577 bfd_elf_generic_reloc, /* special_function */
578 "R_NDS32_9_PCREL_RELA",/* name */
579 FALSE, /* partial_inplace */
580 0xff, /* src_mask */
581 0xff, /* dst_mask */
582 TRUE), /* pcrel_offset */
583
584 /* A relative 15 bit relocation, right shifted by 1. */
585 HOWTO (R_NDS32_15_PCREL_RELA, /* type */
586 1, /* rightshift */
587 2, /* size (0 = byte, 1 = short, 2 = long) */
588 14, /* bitsize */
589 TRUE, /* pc_relative */
590 0, /* bitpos */
591 complain_overflow_signed, /* complain_on_overflow */
592 bfd_elf_generic_reloc, /* special_function */
593 "R_NDS32_15_PCREL_RELA", /* name */
594 FALSE, /* partial_inplace */
595 0x3fff, /* src_mask */
596 0x3fff, /* dst_mask */
597 TRUE), /* pcrel_offset */
598
599 /* A relative 17 bit relocation, right shifted by 1. */
600 HOWTO (R_NDS32_17_PCREL_RELA, /* type */
601 1, /* rightshift */
602 2, /* size (0 = byte, 1 = short, 2 = long) */
603 16, /* bitsize */
604 TRUE, /* pc_relative */
605 0, /* bitpos */
606 complain_overflow_signed, /* complain_on_overflow */
607 bfd_elf_generic_reloc, /* special_function */
608 "R_NDS32_17_PCREL_RELA", /* name */
609 FALSE, /* partial_inplace */
610 0xffff, /* src_mask */
611 0xffff, /* dst_mask */
612 TRUE), /* pcrel_offset */
613
614 /* A relative 25 bit relocation, right shifted by 2. */
615 HOWTO (R_NDS32_25_PCREL_RELA, /* type */
616 1, /* rightshift */
617 2, /* size (0 = byte, 1 = short, 2 = long) */
618 24, /* bitsize */
619 TRUE, /* pc_relative */
620 0, /* bitpos */
621 complain_overflow_signed, /* complain_on_overflow */
622 bfd_elf_generic_reloc, /* special_function */
623 "R_NDS32_25_PCREL_RELA", /* name */
624 FALSE, /* partial_inplace */
625 0xffffff, /* src_mask */
626 0xffffff, /* dst_mask */
627 TRUE), /* pcrel_offset */
628
629 /* High 20 bits of address when lower 16 is or'd in. */
630 HOWTO (R_NDS32_HI20_RELA, /* type */
631 12, /* rightshift */
632 2, /* size (0 = byte, 1 = short, 2 = long) */
633 20, /* bitsize */
634 FALSE, /* pc_relative */
635 0, /* bitpos */
636 complain_overflow_dont,/* complain_on_overflow */
637 bfd_elf_generic_reloc, /* special_function */
638 "R_NDS32_HI20_RELA", /* name */
639 FALSE, /* partial_inplace */
640 0x000fffff, /* src_mask */
641 0x000fffff, /* dst_mask */
642 FALSE), /* pcrel_offset */
643
644 /* Lower 12 bits of address. */
645 HOWTO (R_NDS32_LO12S3_RELA, /* type */
646 3, /* rightshift */
647 2, /* size (0 = byte, 1 = short, 2 = long) */
648 9, /* bitsize */
649 FALSE, /* pc_relative */
650 0, /* bitpos */
651 complain_overflow_dont,/* complain_on_overflow */
652 bfd_elf_generic_reloc, /* special_function */
653 "R_NDS32_LO12S3_RELA", /* name */
654 FALSE, /* partial_inplace */
655 0x000001ff, /* src_mask */
656 0x000001ff, /* dst_mask */
657 FALSE), /* pcrel_offset */
658
659 /* Lower 12 bits of address. */
660 HOWTO (R_NDS32_LO12S2_RELA, /* type */
661 2, /* rightshift */
662 2, /* size (0 = byte, 1 = short, 2 = long) */
663 10, /* bitsize */
664 FALSE, /* pc_relative */
665 0, /* bitpos */
666 complain_overflow_dont,/* complain_on_overflow */
667 bfd_elf_generic_reloc, /* special_function */
668 "R_NDS32_LO12S2_RELA", /* name */
669 FALSE, /* partial_inplace */
670 0x000003ff, /* src_mask */
671 0x000003ff, /* dst_mask */
672 FALSE), /* pcrel_offset */
673
674 /* Lower 12 bits of address. */
675 HOWTO (R_NDS32_LO12S1_RELA, /* type */
676 1, /* rightshift */
677 2, /* size (0 = byte, 1 = short, 2 = long) */
678 11, /* bitsize */
679 FALSE, /* pc_relative */
680 0, /* bitpos */
681 complain_overflow_dont,/* complain_on_overflow */
682 bfd_elf_generic_reloc, /* special_function */
683 "R_NDS32_LO12S1_RELA", /* name */
684 FALSE, /* partial_inplace */
685 0x000007ff, /* src_mask */
686 0x000007ff, /* dst_mask */
687 FALSE), /* pcrel_offset */
688
689 /* Lower 12 bits of address. */
690 HOWTO (R_NDS32_LO12S0_RELA, /* type */
691 0, /* rightshift */
692 2, /* size (0 = byte, 1 = short, 2 = long) */
693 12, /* bitsize */
694 FALSE, /* pc_relative */
695 0, /* bitpos */
696 complain_overflow_dont,/* complain_on_overflow */
697 bfd_elf_generic_reloc, /* special_function */
698 "R_NDS32_LO12S0_RELA", /* name */
699 FALSE, /* partial_inplace */
700 0x00000fff, /* src_mask */
701 0x00000fff, /* dst_mask */
702 FALSE), /* pcrel_offset */
703
704 /* Small data area 15 bits offset. */
705 HOWTO (R_NDS32_SDA15S3_RELA, /* type */
706 3, /* rightshift */
707 2, /* size (0 = byte, 1 = short, 2 = long) */
708 15, /* bitsize */
709 FALSE, /* pc_relative */
710 0, /* bitpos */
711 complain_overflow_signed, /* complain_on_overflow */
712 bfd_elf_generic_reloc, /* special_function */
713 "R_NDS32_SDA15S3_RELA",/* name */
714 FALSE, /* partial_inplace */
715 0x00007fff, /* src_mask */
716 0x00007fff, /* dst_mask */
717 FALSE), /* pcrel_offset */
718
719 /* Small data area 15 bits offset. */
720 HOWTO (R_NDS32_SDA15S2_RELA, /* type */
721 2, /* rightshift */
722 2, /* size (0 = byte, 1 = short, 2 = long) */
723 15, /* bitsize */
724 FALSE, /* pc_relative */
725 0, /* bitpos */
726 complain_overflow_signed, /* complain_on_overflow */
727 bfd_elf_generic_reloc, /* special_function */
728 "R_NDS32_SDA15S2_RELA",/* name */
729 FALSE, /* partial_inplace */
730 0x00007fff, /* src_mask */
731 0x00007fff, /* dst_mask */
732 FALSE), /* pcrel_offset */
733
734 HOWTO (R_NDS32_SDA15S1_RELA, /* type */
735 1, /* rightshift */
736 2, /* size (0 = byte, 1 = short, 2 = long) */
737 15, /* bitsize */
738 FALSE, /* pc_relative */
739 0, /* bitpos */
740 complain_overflow_signed, /* complain_on_overflow */
741 bfd_elf_generic_reloc, /* special_function */
742 "R_NDS32_SDA15S1_RELA",/* name */
743 FALSE, /* partial_inplace */
744 0x00007fff, /* src_mask */
745 0x00007fff, /* dst_mask */
746 FALSE), /* pcrel_offset */
747
748 HOWTO (R_NDS32_SDA15S0_RELA, /* type */
749 0, /* rightshift */
750 2, /* size (0 = byte, 1 = short, 2 = long) */
751 15, /* bitsize */
752 FALSE, /* pc_relative */
753 0, /* bitpos */
754 complain_overflow_signed, /* complain_on_overflow */
755 bfd_elf_generic_reloc, /* special_function */
756 "R_NDS32_SDA15S0_RELA",/* name */
757 FALSE, /* partial_inplace */
758 0x00007fff, /* src_mask */
759 0x00007fff, /* dst_mask */
760 FALSE), /* pcrel_offset */
761
762 /* GNU extension to record C++ vtable hierarchy */
763 HOWTO (R_NDS32_RELA_GNU_VTINHERIT, /* type */
764 0, /* rightshift */
765 2, /* size (0 = byte, 1 = short, 2 = long) */
766 0, /* bitsize */
767 FALSE, /* pc_relative */
768 0, /* bitpos */
769 complain_overflow_dont,/* complain_on_overflow */
770 NULL, /* special_function */
771 "R_NDS32_RELA_GNU_VTINHERIT", /* name */
772 FALSE, /* partial_inplace */
773 0, /* src_mask */
774 0, /* dst_mask */
775 FALSE), /* pcrel_offset */
776
777 /* GNU extension to record C++ vtable member usage */
778 HOWTO (R_NDS32_RELA_GNU_VTENTRY, /* type */
779 0, /* rightshift */
780 2, /* size (0 = byte, 1 = short, 2 = long) */
781 0, /* bitsize */
782 FALSE, /* pc_relative */
783 0, /* bitpos */
784 complain_overflow_dont,/* complain_on_overflow */
785 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
786 "R_NDS32_RELA_GNU_VTENTRY", /* name */
787 FALSE, /* partial_inplace */
788 0, /* src_mask */
789 0, /* dst_mask */
790 FALSE), /* pcrel_offset */
791
792 /* Like R_NDS32_20, but referring to the GOT table entry for
793 the symbol. */
794 HOWTO (R_NDS32_GOT20, /* type */
795 0, /* rightshift */
796 2, /* size (0 = byte, 1 = short, 2 = long) */
797 20, /* bitsize */
798 FALSE, /* pc_relative */
799 0, /* bitpos */
800 complain_overflow_signed, /* complain_on_overflow */
801 bfd_elf_generic_reloc, /* special_function */
802 "R_NDS32_GOT20", /* name */
803 FALSE, /* partial_inplace */
804 0xfffff, /* src_mask */
805 0xfffff, /* dst_mask */
806 FALSE), /* pcrel_offset */
807
808 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
809 entry for the symbol. */
810 HOWTO (R_NDS32_25_PLTREL, /* type */
811 1, /* rightshift */
812 2, /* size (0 = byte, 1 = short, 2 = long) */
813 24, /* bitsize */
814 TRUE, /* pc_relative */
815 0, /* bitpos */
816 complain_overflow_signed, /* complain_on_overflow */
817 bfd_elf_generic_reloc, /* special_function */
818 "R_NDS32_25_PLTREL", /* name */
819 FALSE, /* partial_inplace */
820 0xffffff, /* src_mask */
821 0xffffff, /* dst_mask */
822 TRUE), /* pcrel_offset */
823
824 /* This is used only by the dynamic linker. The symbol should exist
825 both in the object being run and in some shared library. The
826 dynamic linker copies the data addressed by the symbol from the
827 shared library into the object, because the object being
828 run has to have the data at some particular address. */
829 HOWTO (R_NDS32_COPY, /* type */
830 0, /* rightshift */
831 2, /* size (0 = byte, 1 = short, 2 = long) */
832 32, /* bitsize */
833 FALSE, /* pc_relative */
834 0, /* bitpos */
835 complain_overflow_bitfield, /* complain_on_overflow */
836 bfd_elf_generic_reloc, /* special_function */
837 "R_NDS32_COPY", /* name */
838 FALSE, /* partial_inplace */
839 0xffffffff, /* src_mask */
840 0xffffffff, /* dst_mask */
841 FALSE), /* pcrel_offset */
842
843 /* Like R_NDS32_20, but used when setting global offset table
844 entries. */
845 HOWTO (R_NDS32_GLOB_DAT, /* type */
846 0, /* rightshift */
847 2, /* size (0 = byte, 1 = short, 2 = long) */
848 32, /* bitsize */
849 FALSE, /* pc_relative */
850 0, /* bitpos */
851 complain_overflow_bitfield, /* complain_on_overflow */
852 bfd_elf_generic_reloc, /* special_function */
853 "R_NDS32_GLOB_DAT", /* name */
854 FALSE, /* partial_inplace */
855 0xffffffff, /* src_mask */
856 0xffffffff, /* dst_mask */
857 FALSE), /* pcrel_offset */
858
859 /* Marks a procedure linkage table entry for a symbol. */
860 HOWTO (R_NDS32_JMP_SLOT, /* type */
861 0, /* rightshift */
862 2, /* size (0 = byte, 1 = short, 2 = long) */
863 32, /* bitsize */
864 FALSE, /* pc_relative */
865 0, /* bitpos */
866 complain_overflow_bitfield, /* complain_on_overflow */
867 bfd_elf_generic_reloc, /* special_function */
868 "R_NDS32_JMP_SLOT", /* name */
869 FALSE, /* partial_inplace */
870 0xffffffff, /* src_mask */
871 0xffffffff, /* dst_mask */
872 FALSE), /* pcrel_offset */
873
874 /* Used only by the dynamic linker. When the object is run, this
875 longword is set to the load address of the object, plus the
876 addend. */
877 HOWTO (R_NDS32_RELATIVE, /* type */
878 0, /* rightshift */
879 2, /* size (0 = byte, 1 = short, 2 = long) */
880 32, /* bitsize */
881 FALSE, /* pc_relative */
882 0, /* bitpos */
883 complain_overflow_bitfield, /* complain_on_overflow */
884 bfd_elf_generic_reloc, /* special_function */
885 "R_NDS32_RELATIVE", /* name */
886 FALSE, /* partial_inplace */
887 0xffffffff, /* src_mask */
888 0xffffffff, /* dst_mask */
889 FALSE), /* pcrel_offset */
890
891 HOWTO (R_NDS32_GOTOFF, /* type */
892 0, /* rightshift */
893 2, /* size (0 = byte, 1 = short, 2 = long) */
894 20, /* bitsize */
895 FALSE, /* pc_relative */
896 0, /* bitpos */
897 complain_overflow_signed, /* complain_on_overflow */
898 bfd_elf_generic_reloc, /* special_function */
899 "R_NDS32_GOTOFF", /* name */
900 FALSE, /* partial_inplace */
901 0xfffff, /* src_mask */
902 0xfffff, /* dst_mask */
903 FALSE), /* pcrel_offset */
904
905 /* An PC Relative 20-bit relocation used when setting PIC offset
906 table register. */
907 HOWTO (R_NDS32_GOTPC20, /* type */
908 0, /* rightshift */
909 2, /* size (0 = byte, 1 = short, 2 = long) */
910 20, /* bitsize */
911 TRUE, /* pc_relative */
912 0, /* bitpos */
913 complain_overflow_signed, /* complain_on_overflow */
914 bfd_elf_generic_reloc, /* special_function */
915 "R_NDS32_GOTPC20", /* name */
916 FALSE, /* partial_inplace */
917 0xfffff, /* src_mask */
918 0xfffff, /* dst_mask */
919 TRUE), /* pcrel_offset */
920
921 /* Like R_NDS32_HI20, but referring to the GOT table entry for
922 the symbol. */
923 HOWTO (R_NDS32_GOT_HI20, /* type */
924 12, /* rightshift */
925 2, /* size (0 = byte, 1 = short, 2 = long) */
926 20, /* bitsize */
927 FALSE, /* pc_relative */
928 0, /* bitpos */
929 complain_overflow_dont,/* complain_on_overflow */
930 bfd_elf_generic_reloc, /* special_function */
931 "R_NDS32_GOT_HI20", /* name */
932 FALSE, /* partial_inplace */
933 0x000fffff, /* src_mask */
934 0x000fffff, /* dst_mask */
935 FALSE), /* pcrel_offset */
936 HOWTO (R_NDS32_GOT_LO12, /* type */
937 0, /* rightshift */
938 2, /* size (0 = byte, 1 = short, 2 = long) */
939 12, /* bitsize */
940 FALSE, /* pc_relative */
941 0, /* bitpos */
942 complain_overflow_dont,/* complain_on_overflow */
943 bfd_elf_generic_reloc, /* special_function */
944 "R_NDS32_GOT_LO12", /* name */
945 FALSE, /* partial_inplace */
946 0x00000fff, /* src_mask */
947 0x00000fff, /* dst_mask */
948 FALSE), /* pcrel_offset */
949
950 /* An PC Relative relocation used when setting PIC offset table register.
951 Like R_NDS32_HI20, but referring to the GOT table entry for
952 the symbol. */
953 HOWTO (R_NDS32_GOTPC_HI20, /* type */
954 12, /* rightshift */
955 2, /* size (0 = byte, 1 = short, 2 = long) */
956 20, /* bitsize */
957 FALSE, /* pc_relative */
958 0, /* bitpos */
959 complain_overflow_dont,/* complain_on_overflow */
960 bfd_elf_generic_reloc, /* special_function */
961 "R_NDS32_GOTPC_HI20", /* name */
962 FALSE, /* partial_inplace */
963 0x000fffff, /* src_mask */
964 0x000fffff, /* dst_mask */
965 TRUE), /* pcrel_offset */
966 HOWTO (R_NDS32_GOTPC_LO12, /* type */
967 0, /* rightshift */
968 2, /* size (0 = byte, 1 = short, 2 = long) */
969 12, /* bitsize */
970 FALSE, /* pc_relative */
971 0, /* bitpos */
972 complain_overflow_dont, /* complain_on_overflow */
973 bfd_elf_generic_reloc, /* special_function */
974 "R_NDS32_GOTPC_LO12", /* name */
975 FALSE, /* partial_inplace */
976 0x00000fff, /* src_mask */
977 0x00000fff, /* dst_mask */
978 TRUE), /* pcrel_offset */
979
980 HOWTO (R_NDS32_GOTOFF_HI20, /* type */
981 12, /* rightshift */
982 2, /* size (0 = byte, 1 = short, 2 = long) */
983 20, /* bitsize */
984 FALSE, /* pc_relative */
985 0, /* bitpos */
986 complain_overflow_dont,/* complain_on_overflow */
987 bfd_elf_generic_reloc, /* special_function */
988 "R_NDS32_GOTOFF_HI20", /* name */
989 FALSE, /* partial_inplace */
990 0x000fffff, /* src_mask */
991 0x000fffff, /* dst_mask */
992 FALSE), /* pcrel_offset */
993 HOWTO (R_NDS32_GOTOFF_LO12, /* type */
994 0, /* rightshift */
995 2, /* size (0 = byte, 1 = short, 2 = long) */
996 12, /* bitsize */
997 FALSE, /* pc_relative */
998 0, /* bitpos */
999 complain_overflow_dont,/* complain_on_overflow */
1000 bfd_elf_generic_reloc, /* special_function */
1001 "R_NDS32_GOTOFF_LO12", /* name */
1002 FALSE, /* partial_inplace */
1003 0x00000fff, /* src_mask */
1004 0x00000fff, /* dst_mask */
1005 FALSE), /* pcrel_offset */
1006
1007 /* Alignment hint for relaxable instruction. This is used with
1008 R_NDS32_LABEL as a pair. Relax this instruction from 4 bytes to 2
1009 in order to make next label aligned on word boundary. */
1010 HOWTO (R_NDS32_INSN16, /* type */
1011 0, /* rightshift */
1012 2, /* size (0 = byte, 1 = short, 2 = long) */
1013 32, /* bitsize */
1014 FALSE, /* pc_relative */
1015 0, /* bitpos */
1016 complain_overflow_dont,/* complain_on_overflow */
1017 nds32_elf_ignore_reloc,/* special_function */
1018 "R_NDS32_INSN16", /* name */
1019 FALSE, /* partial_inplace */
1020 0x00000fff, /* src_mask */
1021 0x00000fff, /* dst_mask */
1022 FALSE), /* pcrel_offset */
1023
1024 /* Alignment hint for label. */
1025 HOWTO (R_NDS32_LABEL, /* type */
1026 0, /* rightshift */
1027 2, /* size (0 = byte, 1 = short, 2 = long) */
1028 32, /* bitsize */
1029 FALSE, /* pc_relative */
1030 0, /* bitpos */
1031 complain_overflow_dont,/* complain_on_overflow */
1032 nds32_elf_ignore_reloc,/* special_function */
1033 "R_NDS32_LABEL", /* name */
1034 FALSE, /* partial_inplace */
1035 0xffffffff, /* src_mask */
1036 0xffffffff, /* dst_mask */
1037 FALSE), /* pcrel_offset */
1038
1039 /* Relax hint for unconditional call sequence */
1040 HOWTO (R_NDS32_LONGCALL1, /* type */
1041 0, /* rightshift */
1042 2, /* size (0 = byte, 1 = short, 2 = long) */
1043 32, /* bitsize */
1044 FALSE, /* pc_relative */
1045 0, /* bitpos */
1046 complain_overflow_dont,/* complain_on_overflow */
1047 nds32_elf_ignore_reloc,/* special_function */
1048 "R_NDS32_LONGCALL1", /* name */
1049 FALSE, /* partial_inplace */
1050 0xffffffff, /* src_mask */
1051 0xffffffff, /* dst_mask */
1052 FALSE), /* pcrel_offset */
1053
1054 /* Relax hint for conditional call sequence. */
1055 HOWTO (R_NDS32_LONGCALL2, /* type */
1056 0, /* rightshift */
1057 2, /* size (0 = byte, 1 = short, 2 = long) */
1058 32, /* bitsize */
1059 FALSE, /* pc_relative */
1060 0, /* bitpos */
1061 complain_overflow_dont,/* complain_on_overflow */
1062 nds32_elf_ignore_reloc,/* special_function */
1063 "R_NDS32_LONGCALL2", /* name */
1064 FALSE, /* partial_inplace */
1065 0xffffffff, /* src_mask */
1066 0xffffffff, /* dst_mask */
1067 FALSE), /* pcrel_offset */
1068
1069 /* Relax hint for conditional call sequence. */
1070 HOWTO (R_NDS32_LONGCALL3, /* type */
1071 0, /* rightshift */
1072 2, /* size (0 = byte, 1 = short, 2 = long) */
1073 32, /* bitsize */
1074 FALSE, /* pc_relative */
1075 0, /* bitpos */
1076 complain_overflow_dont,/* complain_on_overflow */
1077 nds32_elf_ignore_reloc,/* special_function */
1078 "R_NDS32_LONGCALL3", /* name */
1079 FALSE, /* partial_inplace */
1080 0xffffffff, /* src_mask */
1081 0xffffffff, /* dst_mask */
1082 FALSE), /* pcrel_offset */
1083
1084 /* Relax hint for unconditional branch sequence. */
1085 HOWTO (R_NDS32_LONGJUMP1, /* type */
1086 0, /* rightshift */
1087 2, /* size (0 = byte, 1 = short, 2 = long) */
1088 32, /* bitsize */
1089 FALSE, /* pc_relative */
1090 0, /* bitpos */
1091 complain_overflow_dont,/* complain_on_overflow */
1092 nds32_elf_ignore_reloc,/* special_function */
1093 "R_NDS32_LONGJUMP1", /* name */
1094 FALSE, /* partial_inplace */
1095 0xffffffff, /* src_mask */
1096 0xffffffff, /* dst_mask */
1097 FALSE), /* pcrel_offset */
1098
1099 /* Relax hint for conditional branch sequence. */
1100 HOWTO (R_NDS32_LONGJUMP2, /* type */
1101 0, /* rightshift */
1102 2, /* size (0 = byte, 1 = short, 2 = long) */
1103 32, /* bitsize */
1104 FALSE, /* pc_relative */
1105 0, /* bitpos */
1106 complain_overflow_dont,/* complain_on_overflow */
1107 nds32_elf_ignore_reloc,/* special_function */
1108 "R_NDS32_LONGJUMP2", /* name */
1109 FALSE, /* partial_inplace */
1110 0xffffffff, /* src_mask */
1111 0xffffffff, /* dst_mask */
1112 FALSE), /* pcrel_offset */
1113
1114 /* Relax hint for conditional branch sequence. */
1115 HOWTO (R_NDS32_LONGJUMP3, /* type */
1116 0, /* rightshift */
1117 2, /* size (0 = byte, 1 = short, 2 = long) */
1118 32, /* bitsize */
1119 FALSE, /* pc_relative */
1120 0, /* bitpos */
1121 complain_overflow_dont,/* complain_on_overflow */
1122 nds32_elf_ignore_reloc,/* special_function */
1123 "R_NDS32_LONGJUMP3", /* name */
1124 FALSE, /* partial_inplace */
1125 0xffffffff, /* src_mask */
1126 0xffffffff, /* dst_mask */
1127 FALSE), /* pcrel_offset */
1128
1129 /* Relax hint for load/store sequence. */
1130 HOWTO (R_NDS32_LOADSTORE, /* type */
1131 0, /* rightshift */
1132 2, /* size (0 = byte, 1 = short, 2 = long) */
1133 32, /* bitsize */
1134 FALSE, /* pc_relative */
1135 0, /* bitpos */
1136 complain_overflow_dont,/* complain_on_overflow */
1137 nds32_elf_ignore_reloc,/* special_function */
1138 "R_NDS32_LOADSTORE", /* name */
1139 FALSE, /* partial_inplace */
1140 0xffffffff, /* src_mask */
1141 0xffffffff, /* dst_mask */
1142 FALSE), /* pcrel_offset */
1143
1144 /* Relax hint for load/store sequence. */
1145 HOWTO (R_NDS32_9_FIXED_RELA, /* type */
1146 0, /* rightshift */
1147 1, /* size (0 = byte, 1 = short, 2 = long) */
1148 16, /* bitsize */
1149 FALSE, /* pc_relative */
1150 0, /* bitpos */
1151 complain_overflow_dont,/* complain_on_overflow */
1152 nds32_elf_ignore_reloc,/* special_function */
1153 "R_NDS32_9_FIXED_RELA",/* name */
1154 FALSE, /* partial_inplace */
1155 0x000000ff, /* src_mask */
1156 0x000000ff, /* dst_mask */
1157 FALSE), /* pcrel_offset */
1158
1159 /* Relax hint for load/store sequence. */
1160 HOWTO (R_NDS32_15_FIXED_RELA, /* type */
1161 0, /* rightshift */
1162 2, /* size (0 = byte, 1 = short, 2 = long) */
1163 32, /* bitsize */
1164 FALSE, /* pc_relative */
1165 0, /* bitpos */
1166 complain_overflow_dont,/* complain_on_overflow */
1167 nds32_elf_ignore_reloc,/* special_function */
1168 "R_NDS32_15_FIXED_RELA", /* name */
1169 FALSE, /* partial_inplace */
1170 0x00003fff, /* src_mask */
1171 0x00003fff, /* dst_mask */
1172 FALSE), /* pcrel_offset */
1173
1174 /* Relax hint for load/store sequence. */
1175 HOWTO (R_NDS32_17_FIXED_RELA, /* type */
1176 0, /* rightshift */
1177 2, /* size (0 = byte, 1 = short, 2 = long) */
1178 32, /* bitsize */
1179 FALSE, /* pc_relative */
1180 0, /* bitpos */
1181 complain_overflow_dont,/* complain_on_overflow */
1182 nds32_elf_ignore_reloc,/* special_function */
1183 "R_NDS32_17_FIXED_RELA", /* name */
1184 FALSE, /* partial_inplace */
1185 0x0000ffff, /* src_mask */
1186 0x0000ffff, /* dst_mask */
1187 FALSE), /* pcrel_offset */
1188
1189 /* Relax hint for load/store sequence. */
1190 HOWTO (R_NDS32_25_FIXED_RELA, /* type */
1191 0, /* rightshift */
1192 2, /* size (0 = byte, 1 = short, 2 = long) */
1193 32, /* bitsize */
1194 FALSE, /* pc_relative */
1195 0, /* bitpos */
1196 complain_overflow_dont,/* complain_on_overflow */
1197 nds32_elf_ignore_reloc,/* special_function */
1198 "R_NDS32_25_FIXED_RELA", /* name */
1199 FALSE, /* partial_inplace */
1200 0x00ffffff, /* src_mask */
1201 0x00ffffff, /* dst_mask */
1202 FALSE), /* pcrel_offset */
1203
1204 /* High 20 bits of PLT symbol offset relative to PC. */
1205 HOWTO (R_NDS32_PLTREL_HI20, /* type */
1206 12, /* rightshift */
1207 2, /* size (0 = byte, 1 = short, 2 = long) */
1208 20, /* bitsize */
1209 FALSE, /* pc_relative */
1210 0, /* bitpos */
1211 complain_overflow_dont,/* complain_on_overflow */
1212 bfd_elf_generic_reloc, /* special_function */
1213 "R_NDS32_PLTREL_HI20", /* name */
1214 FALSE, /* partial_inplace */
1215 0x000fffff, /* src_mask */
1216 0x000fffff, /* dst_mask */
1217 FALSE), /* pcrel_offset */
1218
1219 /* Low 12 bits of PLT symbol offset relative to PC. */
1220 HOWTO (R_NDS32_PLTREL_LO12, /* type */
1221 0, /* rightshift */
1222 2, /* size (0 = byte, 1 = short, 2 = long) */
1223 12, /* bitsize */
1224 FALSE, /* pc_relative */
1225 0, /* bitpos */
1226 complain_overflow_dont,/* complain_on_overflow */
1227 bfd_elf_generic_reloc, /* special_function */
1228 "R_NDS32_PLTREL_LO12", /* name */
1229 FALSE, /* partial_inplace */
1230 0x00000fff, /* src_mask */
1231 0x00000fff, /* dst_mask */
1232 FALSE), /* pcrel_offset */
1233
1234 /* High 20 bits of PLT symbol offset relative to GOT (GP). */
1235 HOWTO (R_NDS32_PLT_GOTREL_HI20, /* type */
1236 12, /* rightshift */
1237 2, /* size (0 = byte, 1 = short, 2 = long) */
1238 20, /* bitsize */
1239 FALSE, /* pc_relative */
1240 0, /* bitpos */
1241 complain_overflow_dont,/* complain_on_overflow */
1242 bfd_elf_generic_reloc, /* special_function */
1243 "R_NDS32_PLT_GOTREL_HI20", /* name */
1244 FALSE, /* partial_inplace */
1245 0x000fffff, /* src_mask */
1246 0x000fffff, /* dst_mask */
1247 FALSE), /* pcrel_offset */
1248
1249 /* Low 12 bits of PLT symbol offset relative to GOT (GP). */
1250 HOWTO (R_NDS32_PLT_GOTREL_LO12, /* type */
1251 0, /* rightshift */
1252 2, /* size (0 = byte, 1 = short, 2 = long) */
1253 12, /* bitsize */
1254 FALSE, /* pc_relative */
1255 0, /* bitpos */
1256 complain_overflow_dont,/* complain_on_overflow */
1257 bfd_elf_generic_reloc, /* special_function */
1258 "R_NDS32_PLT_GOTREL_LO12", /* name */
1259 FALSE, /* partial_inplace */
1260 0x00000fff, /* src_mask */
1261 0x00000fff, /* dst_mask */
1262 FALSE), /* pcrel_offset */
1263
1264 /* Small data area 12 bits offset. */
1265 HOWTO (R_NDS32_SDA12S2_DP_RELA, /* type */
1266 2, /* rightshift */
1267 2, /* size (0 = byte, 1 = short, 2 = long) */
1268 12, /* bitsize */
1269 FALSE, /* pc_relative */
1270 0, /* bitpos */
1271 complain_overflow_signed, /* complain_on_overflow */
1272 bfd_elf_generic_reloc, /* special_function */
1273 "R_NDS32_SDA12S2_DP_RELA", /* name */
1274 FALSE, /* partial_inplace */
1275 0x00000fff, /* src_mask */
1276 0x00000fff, /* dst_mask */
1277 FALSE), /* pcrel_offset */
1278
1279 /* Small data area 12 bits offset. */
1280 HOWTO (R_NDS32_SDA12S2_SP_RELA, /* type */
1281 2, /* rightshift */
1282 2, /* size (0 = byte, 1 = short, 2 = long) */
1283 12, /* bitsize */
1284 FALSE, /* pc_relative */
1285 0, /* bitpos */
1286 complain_overflow_signed, /* complain_on_overflow */
1287 bfd_elf_generic_reloc, /* special_function */
1288 "R_NDS32_SDA12S2_SP_RELA", /* name */
1289 FALSE, /* partial_inplace */
1290 0x00000fff, /* src_mask */
1291 0x00000fff, /* dst_mask */
1292 FALSE), /* pcrel_offset */
1293 /* Lower 12 bits of address. */
1294
1295 HOWTO (R_NDS32_LO12S2_DP_RELA, /* type */
1296 2, /* rightshift */
1297 2, /* size (0 = byte, 1 = short, 2 = long) */
1298 10, /* bitsize */
1299 FALSE, /* pc_relative */
1300 0, /* bitpos */
1301 complain_overflow_dont,/* complain_on_overflow */
1302 bfd_elf_generic_reloc, /* special_function */
1303 "R_NDS32_LO12S2_DP_RELA", /* name */
1304 FALSE, /* partial_inplace */
1305 0x000003ff, /* src_mask */
1306 0x000003ff, /* dst_mask */
1307 FALSE), /* pcrel_offset */
1308
1309 /* Lower 12 bits of address. */
1310 HOWTO (R_NDS32_LO12S2_SP_RELA,/* type */
1311 2, /* rightshift */
1312 2, /* size (0 = byte, 1 = short, 2 = long) */
1313 10, /* bitsize */
1314 FALSE, /* pc_relative */
1315 0, /* bitpos */
1316 complain_overflow_dont,/* complain_on_overflow */
1317 bfd_elf_generic_reloc, /* special_function */
1318 "R_NDS32_LO12S2_SP_RELA", /* name */
1319 FALSE, /* partial_inplace */
1320 0x000003ff, /* src_mask */
1321 0x000003ff, /* dst_mask */
1322 FALSE), /* pcrel_offset */
1323 /* Lower 12 bits of address. Special identity for or case. */
1324 HOWTO (R_NDS32_LO12S0_ORI_RELA, /* type */
1325 0, /* rightshift */
1326 2, /* size (0 = byte, 1 = short, 2 = long) */
1327 12, /* bitsize */
1328 FALSE, /* pc_relative */
1329 0, /* bitpos */
1330 complain_overflow_dont,/* complain_on_overflow */
1331 bfd_elf_generic_reloc, /* special_function */
1332 "R_NDS32_LO12S0_ORI_RELA", /* name */
1333 FALSE, /* partial_inplace */
1334 0x00000fff, /* src_mask */
1335 0x00000fff, /* dst_mask */
1336 FALSE), /* pcrel_offset */
1337 /* Small data area 19 bits offset. */
1338 HOWTO (R_NDS32_SDA16S3_RELA, /* type */
1339 3, /* rightshift */
1340 2, /* size (0 = byte, 1 = short, 2 = long) */
1341 16, /* bitsize */
1342 FALSE, /* pc_relative */
1343 0, /* bitpos */
1344 complain_overflow_signed, /* complain_on_overflow */
1345 bfd_elf_generic_reloc, /* special_function */
1346 "R_NDS32_SDA16S3_RELA",/* name */
1347 FALSE, /* partial_inplace */
1348 0x0000ffff, /* src_mask */
1349 0x0000ffff, /* dst_mask */
1350 FALSE), /* pcrel_offset */
1351
1352 /* Small data area 15 bits offset. */
1353 HOWTO (R_NDS32_SDA17S2_RELA, /* type */
1354 2, /* rightshift */
1355 2, /* size (0 = byte, 1 = short, 2 = long) */
1356 17, /* bitsize */
1357 FALSE, /* pc_relative */
1358 0, /* bitpos */
1359 complain_overflow_signed, /* complain_on_overflow */
1360 bfd_elf_generic_reloc, /* special_function */
1361 "R_NDS32_SDA17S2_RELA",/* name */
1362 FALSE, /* partial_inplace */
1363 0x0001ffff, /* src_mask */
1364 0x0001ffff, /* dst_mask */
1365 FALSE), /* pcrel_offset */
1366
1367 HOWTO (R_NDS32_SDA18S1_RELA, /* type */
1368 1, /* rightshift */
1369 2, /* size (0 = byte, 1 = short, 2 = long) */
1370 18, /* bitsize */
1371 FALSE, /* pc_relative */
1372 0, /* bitpos */
1373 complain_overflow_signed, /* complain_on_overflow */
1374 bfd_elf_generic_reloc, /* special_function */
1375 "R_NDS32_SDA18S1_RELA",/* name */
1376 FALSE, /* partial_inplace */
1377 0x0003ffff, /* src_mask */
1378 0x0003ffff, /* dst_mask */
1379 FALSE), /* pcrel_offset */
1380
1381 HOWTO (R_NDS32_SDA19S0_RELA, /* type */
1382 0, /* rightshift */
1383 2, /* size (0 = byte, 1 = short, 2 = long) */
1384 19, /* bitsize */
1385 FALSE, /* pc_relative */
1386 0, /* bitpos */
1387 complain_overflow_signed, /* complain_on_overflow */
1388 bfd_elf_generic_reloc, /* special_function */
1389 "R_NDS32_SDA19S0_RELA",/* name */
1390 FALSE, /* partial_inplace */
1391 0x0007ffff, /* src_mask */
1392 0x0007ffff, /* dst_mask */
1393 FALSE), /* pcrel_offset */
1394 HOWTO (R_NDS32_DWARF2_OP1_RELA, /* type */
1395 0, /* rightshift */
1396 0, /* size (0 = byte, 1 = short, 2 = long) */
1397 8, /* bitsize */
1398 FALSE, /* pc_relative */
1399 0, /* bitpos */
1400 complain_overflow_dont,/* complain_on_overflow */
1401 nds32_elf_ignore_reloc,/* special_function */
1402 "R_NDS32_DWARF2_OP1_RELA", /* name */
1403 FALSE, /* partial_inplace */
1404 0xff, /* src_mask */
1405 0xff, /* dst_mask */
1406 FALSE), /* pcrel_offset */
1407 HOWTO (R_NDS32_DWARF2_OP2_RELA, /* type */
1408 0, /* rightshift */
1409 1, /* size (0 = byte, 1 = short, 2 = long) */
1410 16, /* bitsize */
1411 FALSE, /* pc_relative */
1412 0, /* bitpos */
1413 complain_overflow_dont,/* complain_on_overflow */
1414 nds32_elf_ignore_reloc,/* special_function */
1415 "R_NDS32_DWARF2_OP2_RELA", /* name */
1416 FALSE, /* partial_inplace */
1417 0xffff, /* src_mask */
1418 0xffff, /* dst_mask */
1419 FALSE), /* pcrel_offset */
1420 HOWTO (R_NDS32_DWARF2_LEB_RELA, /* type */
1421 0, /* rightshift */
1422 2, /* size (0 = byte, 1 = short, 2 = long) */
1423 32, /* bitsize */
1424 FALSE, /* pc_relative */
1425 0, /* bitpos */
1426 complain_overflow_dont,/* complain_on_overflow */
1427 nds32_elf_ignore_reloc,/* special_function */
1428 "R_NDS32_DWARF2_LEB_RELA", /* name */
1429 FALSE, /* partial_inplace */
1430 0xffffffff, /* src_mask */
1431 0xffffffff, /* dst_mask */
1432 FALSE), /* pcrel_offset */
1433 HOWTO (R_NDS32_UPDATE_TA_RELA,/* type */
1434 0, /* rightshift */
1435 1, /* size (0 = byte, 1 = short, 2 = long) */
1436 16, /* bitsize */
1437 FALSE, /* pc_relative */
1438 0, /* bitpos */
1439 complain_overflow_dont,/* complain_on_overflow */
1440 nds32_elf_ignore_reloc,/* special_function */
1441 "R_NDS32_UPDATE_TA_RELA", /* name */
1442 FALSE, /* partial_inplace */
1443 0xffff, /* src_mask */
1444 0xffff, /* dst_mask */
1445 FALSE), /* pcrel_offset */
1446 /* Like R_NDS32_PCREL, but referring to the procedure linkage table
1447 entry for the symbol. */
1448 HOWTO (R_NDS32_9_PLTREL, /* type */
1449 1, /* rightshift */
1450 1, /* size (0 = byte, 1 = short, 2 = long) */
1451 8, /* bitsize */
1452 TRUE, /* pc_relative */
1453 0, /* bitpos */
1454 complain_overflow_signed, /* complain_on_overflow */
1455 bfd_elf_generic_reloc, /* special_function */
1456 "R_NDS32_9_PLTREL", /* name */
1457 FALSE, /* partial_inplace */
1458 0xff, /* src_mask */
1459 0xff, /* dst_mask */
1460 TRUE), /* pcrel_offset */
1461 /* Low 20 bits of PLT symbol offset relative to GOT (GP). */
1462 HOWTO (R_NDS32_PLT_GOTREL_LO20, /* type */
1463 0, /* rightshift */
1464 2, /* size (0 = byte, 1 = short, 2 = long) */
1465 20, /* bitsize */
1466 FALSE, /* pc_relative */
1467 0, /* bitpos */
1468 complain_overflow_dont,/* complain_on_overflow */
1469 bfd_elf_generic_reloc, /* special_function */
1470 "R_NDS32_PLT_GOTREL_LO20", /* name */
1471 FALSE, /* partial_inplace */
1472 0x000fffff, /* src_mask */
1473 0x000fffff, /* dst_mask */
1474 FALSE), /* pcrel_offset */
1475 /* low 15 bits of PLT symbol offset relative to GOT (GP) */
1476 HOWTO (R_NDS32_PLT_GOTREL_LO15, /* type */
1477 0, /* rightshift */
1478 2, /* size (0 = byte, 1 = short, 2 = long) */
1479 15, /* bitsize */
1480 FALSE, /* pc_relative */
1481 0, /* bitpos */
1482 complain_overflow_dont,/* complain_on_overflow */
1483 bfd_elf_generic_reloc, /* special_function */
1484 "R_NDS32_PLT_GOTREL_LO15", /* name */
1485 FALSE, /* partial_inplace */
1486 0x00007fff, /* src_mask */
1487 0x00007fff, /* dst_mask */
1488 FALSE), /* pcrel_offset */
1489 /* Low 19 bits of PLT symbol offset relative to GOT (GP). */
1490 HOWTO (R_NDS32_PLT_GOTREL_LO19, /* type */
1491 0, /* rightshift */
1492 2, /* size (0 = byte, 1 = short, 2 = long) */
1493 19, /* bitsize */
1494 FALSE, /* pc_relative */
1495 0, /* bitpos */
1496 complain_overflow_dont,/* complain_on_overflow */
1497 bfd_elf_generic_reloc, /* special_function */
1498 "R_NDS32_PLT_GOTREL_LO19", /* name */
1499 FALSE, /* partial_inplace */
1500 0x0007ffff, /* src_mask */
1501 0x0007ffff, /* dst_mask */
1502 FALSE), /* pcrel_offset */
1503 HOWTO (R_NDS32_GOT_LO15, /* type */
1504 0, /* rightshift */
1505 2, /* size (0 = byte, 1 = short, 2 = long) */
1506 15, /* bitsize */
1507 FALSE, /* pc_relative */
1508 0, /* bitpos */
1509 complain_overflow_dont,/* complain_on_overflow */
1510 bfd_elf_generic_reloc, /* special_function */
1511 "R_NDS32_GOT_LO15", /* name */
1512 FALSE, /* partial_inplace */
1513 0x00007fff, /* src_mask */
1514 0x00007fff, /* dst_mask */
1515 FALSE), /* pcrel_offset */
1516 HOWTO (R_NDS32_GOT_LO19, /* type */
1517 0, /* rightshift */
1518 2, /* size (0 = byte, 1 = short, 2 = long) */
1519 19, /* bitsize */
1520 FALSE, /* pc_relative */
1521 0, /* bitpos */
1522 complain_overflow_dont,/* complain_on_overflow */
1523 bfd_elf_generic_reloc, /* special_function */
1524 "R_NDS32_GOT_LO19", /* name */
1525 FALSE, /* partial_inplace */
1526 0x0007ffff, /* src_mask */
1527 0x0007ffff, /* dst_mask */
1528 FALSE), /* pcrel_offset */
1529 HOWTO (R_NDS32_GOTOFF_LO15, /* type */
1530 0, /* rightshift */
1531 2, /* size (0 = byte, 1 = short, 2 = long) */
1532 15, /* bitsize */
1533 FALSE, /* pc_relative */
1534 0, /* bitpos */
1535 complain_overflow_dont,/* complain_on_overflow */
1536 bfd_elf_generic_reloc, /* special_function */
1537 "R_NDS32_GOTOFF_LO15", /* name */
1538 FALSE, /* partial_inplace */
1539 0x00007fff, /* src_mask */
1540 0x00007fff, /* dst_mask */
1541 FALSE), /* pcrel_offset */
1542 HOWTO (R_NDS32_GOTOFF_LO19, /* type */
1543 0, /* rightshift */
1544 2, /* size (0 = byte, 1 = short, 2 = long) */
1545 19, /* bitsize */
1546 FALSE, /* pc_relative */
1547 0, /* bitpos */
1548 complain_overflow_dont,/* complain_on_overflow */
1549 bfd_elf_generic_reloc, /* special_function */
1550 "R_NDS32_GOTOFF_LO19", /* name */
1551 FALSE, /* partial_inplace */
1552 0x0007ffff, /* src_mask */
1553 0x0007ffff, /* dst_mask */
1554 FALSE), /* pcrel_offset */
1555 /* GOT 15 bits offset. */
1556 HOWTO (R_NDS32_GOT15S2_RELA, /* type */
1557 2, /* rightshift */
1558 2, /* size (0 = byte, 1 = short, 2 = long) */
1559 15, /* bitsize */
1560 FALSE, /* pc_relative */
1561 0, /* bitpos */
1562 complain_overflow_signed, /* complain_on_overflow */
1563 bfd_elf_generic_reloc, /* special_function */
1564 "R_NDS32_GOT15S2_RELA",/* name */
1565 FALSE, /* partial_inplace */
1566 0x00007fff, /* src_mask */
1567 0x00007fff, /* dst_mask */
1568 FALSE), /* pcrel_offset */
1569 /* GOT 17 bits offset. */
1570 HOWTO (R_NDS32_GOT17S2_RELA, /* type */
1571 2, /* rightshift */
1572 2, /* size (0 = byte, 1 = short, 2 = long) */
1573 17, /* bitsize */
1574 FALSE, /* pc_relative */
1575 0, /* bitpos */
1576 complain_overflow_signed, /* complain_on_overflow */
1577 bfd_elf_generic_reloc, /* special_function */
1578 "R_NDS32_GOT17S2_RELA",/* name */
1579 FALSE, /* partial_inplace */
1580 0x0001ffff, /* src_mask */
1581 0x0001ffff, /* dst_mask */
1582 FALSE), /* pcrel_offset */
1583 /* A 5 bit address. */
1584 HOWTO (R_NDS32_5_RELA, /* type */
1585 0, /* rightshift */
1586 1, /* size (0 = byte, 1 = short, 2 = long) */
1587 5, /* bitsize */
1588 FALSE, /* pc_relative */
1589 0, /* bitpos */
1590 complain_overflow_signed, /* complain_on_overflow */
1591 bfd_elf_generic_reloc, /* special_function */
1592 "R_NDS32_5_RELA", /* name */
1593 FALSE, /* partial_inplace */
1594 0x1f, /* src_mask */
1595 0x1f, /* dst_mask */
1596 FALSE), /* pcrel_offset */
1597 HOWTO (R_NDS32_10_UPCREL_RELA,/* type */
1598 1, /* rightshift */
1599 1, /* size (0 = byte, 1 = short, 2 = long) */
1600 9, /* bitsize */
1601 TRUE, /* pc_relative */
1602 0, /* bitpos */
1603 complain_overflow_unsigned, /* complain_on_overflow */
1604 bfd_elf_generic_reloc, /* special_function */
1605 "R_NDS32_10_UPCREL_RELA", /* name */
1606 FALSE, /* partial_inplace */
1607 0x1ff, /* src_mask */
1608 0x1ff, /* dst_mask */
1609 TRUE), /* pcrel_offset */
1610 HOWTO (R_NDS32_SDA_FP7U2_RELA,/* type */
1611 2, /* rightshift */
1612 1, /* size (0 = byte, 1 = short, 2 = long) */
1613 7, /* bitsize */
1614 FALSE, /* pc_relative */
1615 0, /* bitpos */
1616 complain_overflow_unsigned, /* complain_on_overflow */
1617 bfd_elf_generic_reloc, /* special_function */
1618 "R_NDS32_SDA_FP7U2_RELA", /* name */
1619 FALSE, /* partial_inplace */
1620 0x0000007f, /* src_mask */
1621 0x0000007f, /* dst_mask */
1622 FALSE), /* pcrel_offset */
1623 HOWTO (R_NDS32_WORD_9_PCREL_RELA, /* type */
1624 1, /* rightshift */
1625 2, /* size (0 = byte, 1 = short, 2 = long) */
1626 8, /* bitsize */
1627 TRUE, /* pc_relative */
1628 0, /* bitpos */
1629 complain_overflow_signed, /* complain_on_overflow */
1630 bfd_elf_generic_reloc, /* special_function */
1631 "R_NDS32_WORD_9_PCREL_RELA", /* name */
1632 FALSE, /* partial_inplace */
1633 0xff, /* src_mask */
1634 0xff, /* dst_mask */
1635 TRUE), /* pcrel_offset */
1636 HOWTO (R_NDS32_25_ABS_RELA, /* type */
1637 1, /* rightshift */
1638 2, /* size (0 = byte, 1 = short, 2 = long) */
1639 24, /* bitsize */
1640 FALSE, /* pc_relative */
1641 0, /* bitpos */
1642 complain_overflow_dont,/* complain_on_overflow */
1643 bfd_elf_generic_reloc, /* special_function */
1644 "R_NDS32_25_ABS_RELA", /* name */
1645 FALSE, /* partial_inplace */
1646 0xffffff, /* src_mask */
1647 0xffffff, /* dst_mask */
1648 FALSE), /* pcrel_offset */
1649
1650 /* A relative 17 bit relocation for ifc, right shifted by 1. */
1651 HOWTO (R_NDS32_17IFC_PCREL_RELA, /* type */
1652 1, /* rightshift */
1653 2, /* size (0 = byte, 1 = short, 2 = long) */
1654 16, /* bitsize */
1655 TRUE, /* pc_relative */
1656 0, /* bitpos */
1657 complain_overflow_signed, /* complain_on_overflow */
1658 bfd_elf_generic_reloc, /* special_function */
1659 "R_NDS32_17IFC_PCREL_RELA", /* name */
1660 FALSE, /* partial_inplace */
1661 0xffff, /* src_mask */
1662 0xffff, /* dst_mask */
1663 TRUE), /* pcrel_offset */
1664
1665 /* A relative unsigned 10 bit relocation for ifc, right shifted by 1. */
1666 HOWTO (R_NDS32_10IFCU_PCREL_RELA, /* type */
1667 1, /* rightshift */
1668 1, /* size (0 = byte, 1 = short, 2 = long) */
1669 9, /* bitsize */
1670 TRUE, /* pc_relative */
1671 0, /* bitpos */
1672 complain_overflow_unsigned, /* complain_on_overflow */
1673 bfd_elf_generic_reloc, /* special_function */
1674 "R_NDS32_10IFCU_PCREL_RELA", /* name */
1675 FALSE, /* partial_inplace */
1676 0x1ff, /* src_mask */
1677 0x1ff, /* dst_mask */
1678 TRUE), /* pcrel_offset */
1c8f6a4d
KLC
1679
1680 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1681 HOWTO (R_NDS32_TLS_LE_HI20, /* type */
1682 12, /* rightshift */
1683 2, /* size (0 = byte, 1 = short, 2 = long) */
1684 20, /* bitsize */
1685 FALSE, /* pc_relative */
1686 0, /* bitpos */
1687 complain_overflow_dont, /* complain_on_overflow */
1688 bfd_elf_generic_reloc, /* special_function */
1689 "R_NDS32_TLS_LE_HI20", /* name */
1690 FALSE, /* partial_inplace */
1691 0x000fffff, /* src_mask */
1692 0x000fffff, /* dst_mask */
1693 FALSE), /* pcrel_offset */
1694 HOWTO (R_NDS32_TLS_LE_LO12, /* type */
1695 0, /* rightshift */
1696 2, /* size (0 = byte, 1 = short, 2 = long) */
1697 12, /* bitsize */
1698 FALSE, /* pc_relative */
1699 0, /* bitpos */
1700 complain_overflow_dont, /* complain_on_overflow */
1701 bfd_elf_generic_reloc, /* special_function */
1702 "R_NDS32_TLS_LE_LO12", /* name */
1703 FALSE, /* partial_inplace */
1704 0x00000fff, /* src_mask */
1705 0x00000fff, /* dst_mask */
1706 FALSE), /* pcrel_offset */
1707
1708 /* Like R_NDS32_HI20, but referring to the TLS entry for the symbol. */
1709 HOWTO (R_NDS32_TLS_IE_HI20, /* type */
1710 12, /* rightshift */
1711 2, /* size (0 = byte, 1 = short, 2 = long) */
1712 20, /* bitsize */
1713 FALSE, /* pc_relative */
1714 0, /* bitpos */
1715 complain_overflow_dont, /* complain_on_overflow */
1716 bfd_elf_generic_reloc, /* special_function */
1717 "R_NDS32_TLS_IE_HI20", /* name */
1718 FALSE, /* partial_inplace */
1719 0x000fffff, /* src_mask */
1720 0x000fffff, /* dst_mask */
1721 FALSE), /* pcrel_offset */
1722 HOWTO (R_NDS32_TLS_IE_LO12S2, /* type */
1723 2, /* rightshift */
1724 2, /* size (0 = byte, 1 = short, 2 = long) */
1725 10, /* bitsize */
1726 FALSE, /* pc_relative */
1727 0, /* bitpos */
1728 complain_overflow_dont, /* complain_on_overflow */
1729 bfd_elf_generic_reloc, /* special_function */
1730 "R_NDS32_TLS_IE_LO12S2", /* name */
1731 FALSE, /* partial_inplace */
1732 0x000003ff, /* src_mask */
1733 0x000003ff, /* dst_mask */
1734 FALSE), /* pcrel_offset */
1735 /* Mark a TLS IE entry in GOT. */
1736 HOWTO (R_NDS32_TLS_TPOFF, /* type */
1737 0, /* rightshift */
1738 2, /* size (0 = byte, 1 = short, 2 = long) */
1739 32, /* bitsize */
1740 FALSE, /* pc_relative */
1741 0, /* bitpos */
1742 complain_overflow_bitfield, /* complain_on_overflow */
1743 bfd_elf_generic_reloc, /* special_function */
1744 "R_NDS32_TLS_TPOFF", /* name */
1745 FALSE, /* partial_inplace */
1746 0xffffffff, /* src_mask */
1747 0xffffffff, /* dst_mask */
1748 FALSE), /* pcrel_offset */
1749 /* A 20 bit address. */
1750 HOWTO (R_NDS32_TLS_LE_20, /* type */
1751 0, /* rightshift */
1752 2, /* size (0 = byte, 1 = short, 2 = long) */
1753 20, /* bitsize */
1754 FALSE, /* pc_relative */
1755 0, /* bitpos */
1756 complain_overflow_signed, /* complain_on_overflow */
1757 bfd_elf_generic_reloc, /* special_function */
1758 "R_NDS32_TLS_LE_20", /* name */
1759 FALSE, /* partial_inplace */
1760 0xfffff, /* src_mask */
1761 0xfffff, /* dst_mask */
1762 FALSE), /* pcrel_offset */
1763 HOWTO (R_NDS32_TLS_LE_15S0, /* type */
1764 0, /* rightshift */
1765 2, /* size (0 = byte, 1 = short, 2 = long) */
1766 15, /* bitsize */
1767 FALSE, /* pc_relative */
1768 0, /* bitpos */
1769 complain_overflow_signed, /* complain_on_overflow */
1770 bfd_elf_generic_reloc, /* special_function */
1771 "R_NDS32_TLS_LE_15S0", /* name */
1772 FALSE, /* partial_inplace */
1773 0x7fff, /* src_mask */
1774 0x7fff, /* dst_mask */
1775 FALSE), /* pcrel_offset */
1776 HOWTO (R_NDS32_TLS_LE_15S1, /* type */
1777 1, /* rightshift */
1778 2, /* size (0 = byte, 1 = short, 2 = long) */
1779 15, /* bitsize */
1780 FALSE, /* pc_relative */
1781 0, /* bitpos */
1782 complain_overflow_signed, /* complain_on_overflow */
1783 bfd_elf_generic_reloc, /* special_function */
1784 "R_NDS32_TLS_LE_15S1", /* name */
1785 FALSE, /* partial_inplace */
1786 0x7fff, /* src_mask */
1787 0x7fff, /* dst_mask */
1788 FALSE), /* pcrel_offset */
1789 HOWTO (R_NDS32_TLS_LE_15S2, /* type */
1790 2, /* rightshift */
1791 2, /* size (0 = byte, 1 = short, 2 = long) */
1792 15, /* bitsize */
1793 FALSE, /* pc_relative */
1794 0, /* bitpos */
1795 complain_overflow_signed, /* complain_on_overflow */
1796 bfd_elf_generic_reloc, /* special_function */
1797 "R_NDS32_TLS_LE_15S2", /* name */
1798 FALSE, /* partial_inplace */
1799 0x7fff, /* src_mask */
1800 0x7fff, /* dst_mask */
1801 FALSE), /* pcrel_offset */
1802
1803 /* Relax hint for unconditional call sequence */
1804 HOWTO (R_NDS32_LONGCALL4, /* type */
1805 0, /* rightshift */
1806 2, /* size (0 = byte, 1 = short, 2 = long) */
1807 32, /* bitsize */
1808 FALSE, /* pc_relative */
1809 0, /* bitpos */
1810 complain_overflow_dont, /* complain_on_overflow */
1811 nds32_elf_ignore_reloc, /* special_function */
1812 "R_NDS32_LONGCALL4", /* name */
1813 FALSE, /* partial_inplace */
1814 0xffffffff, /* src_mask */
1815 0xffffffff, /* dst_mask */
1816 FALSE), /* pcrel_offset */
1817
1818 /* Relax hint for conditional call sequence. */
1819 HOWTO (R_NDS32_LONGCALL5, /* type */
1820 0, /* rightshift */
1821 2, /* size (0 = byte, 1 = short, 2 = long) */
1822 32, /* bitsize */
1823 FALSE, /* pc_relative */
1824 0, /* bitpos */
1825 complain_overflow_dont, /* complain_on_overflow */
1826 nds32_elf_ignore_reloc, /* special_function */
1827 "R_NDS32_LONGCALL5", /* name */
1828 FALSE, /* partial_inplace */
1829 0xffffffff, /* src_mask */
1830 0xffffffff, /* dst_mask */
1831 FALSE), /* pcrel_offset */
1832
1833 /* Relax hint for conditional call sequence. */
1834 HOWTO (R_NDS32_LONGCALL6, /* type */
1835 0, /* rightshift */
1836 2, /* size (0 = byte, 1 = short, 2 = long) */
1837 32, /* bitsize */
1838 FALSE, /* pc_relative */
1839 0, /* bitpos */
1840 complain_overflow_dont, /* complain_on_overflow */
1841 nds32_elf_ignore_reloc, /* special_function */
1842 "R_NDS32_LONGCALL6", /* name */
1843 FALSE, /* partial_inplace */
1844 0xffffffff, /* src_mask */
1845 0xffffffff, /* dst_mask */
1846 FALSE), /* pcrel_offset */
1847
1848 /* Relax hint for unconditional branch sequence. */
1849 HOWTO (R_NDS32_LONGJUMP4, /* type */
1850 0, /* rightshift */
1851 2, /* size (0 = byte, 1 = short, 2 = long) */
1852 32, /* bitsize */
1853 FALSE, /* pc_relative */
1854 0, /* bitpos */
1855 complain_overflow_dont, /* complain_on_overflow */
1856 nds32_elf_ignore_reloc, /* special_function */
1857 "R_NDS32_LONGJUMP4", /* name */
1858 FALSE, /* partial_inplace */
1859 0xffffffff, /* src_mask */
1860 0xffffffff, /* dst_mask */
1861 FALSE), /* pcrel_offset */
1862
1863 /* Relax hint for conditional branch sequence. */
1864 HOWTO (R_NDS32_LONGJUMP5, /* type */
1865 0, /* rightshift */
1866 2, /* size (0 = byte, 1 = short, 2 = long) */
1867 32, /* bitsize */
1868 FALSE, /* pc_relative */
1869 0, /* bitpos */
1870 complain_overflow_dont, /* complain_on_overflow */
1871 nds32_elf_ignore_reloc, /* special_function */
1872 "R_NDS32_LONGJUMP5", /* name */
1873 FALSE, /* partial_inplace */
1874 0xffffffff, /* src_mask */
1875 0xffffffff, /* dst_mask */
1876 FALSE), /* pcrel_offset */
1877
1878 /* Relax hint for conditional branch sequence. */
1879 HOWTO (R_NDS32_LONGJUMP6, /* type */
1880 0, /* rightshift */
1881 2, /* size (0 = byte, 1 = short, 2 = long) */
1882 32, /* bitsize */
1883 FALSE, /* pc_relative */
1884 0, /* bitpos */
1885 complain_overflow_dont, /* complain_on_overflow */
1886 nds32_elf_ignore_reloc, /* special_function */
1887 "R_NDS32_LONGJUMP6", /* name */
1888 FALSE, /* partial_inplace */
1889 0xffffffff, /* src_mask */
1890 0xffffffff, /* dst_mask */
1891 FALSE), /* pcrel_offset */
1892
1893 /* Relax hint for conditional branch sequence. */
1894 HOWTO (R_NDS32_LONGJUMP7, /* type */
1895 0, /* rightshift */
1896 2, /* size (0 = byte, 1 = short, 2 = long) */
1897 32, /* bitsize */
1898 FALSE, /* pc_relative */
1899 0, /* bitpos */
1900 complain_overflow_dont, /* complain_on_overflow */
1901 nds32_elf_ignore_reloc, /* special_function */
1902 "R_NDS32_LONGJUMP7", /* name */
1903 FALSE, /* partial_inplace */
1904 0xffffffff, /* src_mask */
1905 0xffffffff, /* dst_mask */
1906 FALSE), /* pcrel_offset */
35c08157
KLC
1907};
1908
1909/* Relocations used for relaxation. */
1910static reloc_howto_type nds32_elf_relax_howto_table[] =
1911{
1912 HOWTO (R_NDS32_RELAX_ENTRY, /* type */
1913 0, /* rightshift */
1914 2, /* size (0 = byte, 1 = short, 2 = long) */
1915 32, /* bitsize */
1916 FALSE, /* pc_relative */
1917 0, /* bitpos */
1918 complain_overflow_dont,/* complain_on_overflow */
1919 nds32_elf_ignore_reloc,/* special_function */
1920 "R_NDS32_RELAX_ENTRY", /* name */
1921 FALSE, /* partial_inplace */
1922 0xffffffff, /* src_mask */
1923 0xffffffff, /* dst_mask */
1924 FALSE), /* pcrel_offset */
1925 HOWTO (R_NDS32_GOT_SUFF, /* type */
1926 0, /* rightshift */
1927 2, /* size (0 = byte, 1 = short, 2 = long) */
1928 32, /* bitsize */
1929 FALSE, /* pc_relative */
1930 0, /* bitpos */
1931 complain_overflow_dont,/* complain_on_overflow */
1932 nds32_elf_ignore_reloc,/* special_function */
1933 "R_NDS32_GOT_SUFF", /* name */
1934 FALSE, /* partial_inplace */
1935 0xffffffff, /* src_mask */
1936 0xffffffff, /* dst_mask */
1937 FALSE), /* pcrel_offset */
1938 HOWTO (R_NDS32_GOTOFF_SUFF, /* type */
1939 0, /* rightshift */
1940 2, /* size (0 = byte, 1 = short, 2 = long) */
1941 32, /* bitsize */
1942 FALSE, /* pc_relative */
1943 0, /* bitpos */
1944 complain_overflow_bitfield, /* complain_on_overflow */
1945 nds32_elf_ignore_reloc,/* special_function */
1946 "R_NDS32_GOTOFF_SUFF", /* name */
1947 FALSE, /* partial_inplace */
1948 0xffffffff, /* src_mask */
1949 0xffffffff, /* dst_mask */
1950 FALSE), /* pcrel_offset */
1951 HOWTO (R_NDS32_PLT_GOT_SUFF, /* type */
1952 0, /* rightshift */
1953 2, /* size (0 = byte, 1 = short, 2 = long) */
1954 32, /* bitsize */
1955 FALSE, /* pc_relative */
1956 0, /* bitpos */
1957 complain_overflow_dont,/* complain_on_overflow */
1958 nds32_elf_ignore_reloc,/* special_function */
1959 "R_NDS32_PLT_GOT_SUFF",/* name */
1960 FALSE, /* partial_inplace */
1961 0xffffffff, /* src_mask */
1962 0xffffffff, /* dst_mask */
1963 FALSE), /* pcrel_offset */
1964 HOWTO (R_NDS32_MULCALL_SUFF, /* type */
1965 0, /* rightshift */
1966 2, /* size (0 = byte, 1 = short, 2 = long) */
1967 32, /* bitsize */
1968 FALSE, /* pc_relative */
1969 0, /* bitpos */
1970 complain_overflow_dont,/* complain_on_overflow */
1971 nds32_elf_ignore_reloc,/* special_function */
1972 "R_NDS32_MULCALL_SUFF",/* name */
1973 FALSE, /* partial_inplace */
1974 0xffffffff, /* src_mask */
1975 0xffffffff, /* dst_mask */
1976 FALSE), /* pcrel_offset */
1977 HOWTO (R_NDS32_PTR, /* type */
1978 0, /* rightshift */
1979 2, /* size (0 = byte, 1 = short, 2 = long) */
1980 32, /* bitsize */
1981 FALSE, /* pc_relative */
1982 0, /* bitpos */
1983 complain_overflow_dont,/* complain_on_overflow */
1984 nds32_elf_ignore_reloc,/* special_function */
1985 "R_NDS32_PTR", /* name */
1986 FALSE, /* partial_inplace */
1987 0xffffffff, /* src_mask */
1988 0xffffffff, /* dst_mask */
1989 FALSE), /* pcrel_offset */
1990 HOWTO (R_NDS32_PTR_COUNT, /* type */
1991 0, /* rightshift */
1992 2, /* size (0 = byte, 1 = short, 2 = long) */
1993 32, /* bitsize */
1994 FALSE, /* pc_relative */
1995 0, /* bitpos */
1996 complain_overflow_dont,/* complain_on_overflow */
1997 nds32_elf_ignore_reloc,/* special_function */
1998 "R_NDS32_PTR_COUNT", /* name */
1999 FALSE, /* partial_inplace */
2000 0xffffffff, /* src_mask */
2001 0xffffffff, /* dst_mask */
2002 FALSE), /* pcrel_offset */
2003 HOWTO (R_NDS32_PTR_RESOLVED, /* type */
2004 0, /* rightshift */
2005 2, /* size (0 = byte, 1 = short, 2 = long) */
2006 32, /* bitsize */
2007 FALSE, /* pc_relative */
2008 0, /* bitpos */
2009 complain_overflow_dont,/* complain_on_overflow */
2010 nds32_elf_ignore_reloc,/* special_function */
2011 "R_NDS32_PTR_RESOLVED",/* name */
2012 FALSE, /* partial_inplace */
2013 0xffffffff, /* src_mask */
2014 0xffffffff, /* dst_mask */
2015 FALSE), /* pcrel_offset */
2016 HOWTO (R_NDS32_PLTBLOCK, /* type */
2017 0, /* rightshift */
2018 2, /* size (0 = byte, 1 = short, 2 = long) */
2019 32, /* bitsize */
2020 FALSE, /* pc_relative */
2021 0, /* bitpos */
2022 complain_overflow_dont,/* complain_on_overflow */
2023 nds32_elf_ignore_reloc,/* special_function */
2024 "R_NDS32_PLTBLOCK", /* name */
2025 FALSE, /* partial_inplace */
2026 0xffffffff, /* src_mask */
2027 0xffffffff, /* dst_mask */
2028 FALSE), /* pcrel_offset */
2029 HOWTO (R_NDS32_RELAX_REGION_BEGIN, /* type */
2030 0, /* rightshift */
2031 2, /* size (0 = byte, 1 = short, 2 = long) */
2032 32, /* bitsize */
2033 FALSE, /* pc_relative */
2034 0, /* bitpos */
2035 complain_overflow_dont,/* complain_on_overflow */
2036 nds32_elf_ignore_reloc,/* special_function */
2037 "R_NDS32_RELAX_REGION_BEGIN", /* name */
2038 FALSE, /* partial_inplace */
2039 0xffffffff, /* src_mask */
2040 0xffffffff, /* dst_mask */
2041 FALSE), /* pcrel_offset */
2042 HOWTO (R_NDS32_RELAX_REGION_END, /* type */
2043 0, /* rightshift */
2044 2, /* size (0 = byte, 1 = short, 2 = long) */
2045 32, /* bitsize */
2046 FALSE, /* pc_relative */
2047 0, /* bitpos */
2048 complain_overflow_dont,/* complain_on_overflow */
2049 nds32_elf_ignore_reloc,/* special_function */
2050 "R_NDS32_RELAX_REGION_END", /* name */
2051 FALSE, /* partial_inplace */
2052 0xffffffff, /* src_mask */
2053 0xffffffff, /* dst_mask */
2054 FALSE), /* pcrel_offset */
2055 HOWTO (R_NDS32_MINUEND, /* type */
2056 0, /* rightshift */
2057 2, /* size (0 = byte, 1 = short, 2 = long) */
2058 32, /* bitsize */
2059 FALSE, /* pc_relative */
2060 0, /* bitpos */
2061 complain_overflow_dont,/* complain_on_overflow */
2062 nds32_elf_ignore_reloc,/* special_function */
2063 "R_NDS32_MINUEND", /* name */
2064 FALSE, /* partial_inplace */
2065 0xffffffff, /* src_mask */
2066 0xffffffff, /* dst_mask */
2067 FALSE), /* pcrel_offset */
2068 HOWTO (R_NDS32_SUBTRAHEND, /* type */
2069 0, /* rightshift */
2070 2, /* size (0 = byte, 1 = short, 2 = long) */
2071 32, /* bitsize */
2072 FALSE, /* pc_relative */
2073 0, /* bitpos */
2074 complain_overflow_dont,/* complain_on_overflow */
2075 nds32_elf_ignore_reloc,/* special_function */
2076 "R_NDS32_SUBTRAHEND", /* name */
2077 FALSE, /* partial_inplace */
2078 0xffffffff, /* src_mask */
2079 0xffffffff, /* dst_mask */
2080 FALSE), /* pcrel_offset */
2081 HOWTO (R_NDS32_DIFF8, /* type */
2082 0, /* rightshift */
2083 0, /* size (0 = byte, 1 = short, 2 = long) */
2084 8, /* bitsize */
2085 FALSE, /* pc_relative */
2086 0, /* bitpos */
2087 complain_overflow_dont,/* complain_on_overflow */
2088 nds32_elf_ignore_reloc,/* special_function */
2089 "R_NDS32_DIFF8", /* name */
2090 FALSE, /* partial_inplace */
2091 0x000000ff, /* src_mask */
2092 0x000000ff, /* dst_mask */
2093 FALSE), /* pcrel_offset */
2094 HOWTO (R_NDS32_DIFF16, /* type */
2095 0, /* rightshift */
2096 1, /* size (0 = byte, 1 = short, 2 = long) */
2097 16, /* bitsize */
2098 FALSE, /* pc_relative */
2099 0, /* bitpos */
2100 complain_overflow_dont,/* complain_on_overflow */
2101 nds32_elf_ignore_reloc,/* special_function */
2102 "R_NDS32_DIFF16", /* name */
2103 FALSE, /* partial_inplace */
2104 0x0000ffff, /* src_mask */
2105 0x0000ffff, /* dst_mask */
2106 FALSE), /* pcrel_offset */
2107 HOWTO (R_NDS32_DIFF32, /* type */
2108 0, /* rightshift */
2109 2, /* size (0 = byte, 1 = short, 2 = long) */
2110 32, /* bitsize */
2111 FALSE, /* pc_relative */
2112 0, /* bitpos */
2113 complain_overflow_dont,/* complain_on_overflow */
2114 nds32_elf_ignore_reloc,/* special_function */
2115 "R_NDS32_DIFF32", /* name */
2116 FALSE, /* partial_inplace */
2117 0xffffffff, /* src_mask */
2118 0xffffffff, /* dst_mask */
2119 FALSE), /* pcrel_offset */
2120 HOWTO (R_NDS32_DIFF_ULEB128, /* type */
2121 0, /* rightshift */
2122 0, /* size (0 = byte, 1 = short, 2 = long) */
2123 0, /* bitsize */
2124 FALSE, /* pc_relative */
2125 0, /* bitpos */
2126 complain_overflow_dont,/* complain_on_overflow */
2127 nds32_elf_ignore_reloc,/* special_function */
2128 "R_NDS32_DIFF_ULEB128",/* name */
2129 FALSE, /* partial_inplace */
2130 0xffffffff, /* src_mask */
2131 0xffffffff, /* dst_mask */
2132 FALSE), /* pcrel_offset */
2133 HOWTO (R_NDS32_DATA, /* type */
2134 0, /* rightshift */
2135 2, /* size (0 = byte, 1 = short, 2 = long) */
2136 32, /* bitsize */
2137 FALSE, /* pc_relative */
2138 0, /* bitpos */
2139 complain_overflow_dont,/* complain_on_overflow */
2140 nds32_elf_ignore_reloc,/* special_function */
2141 "R_NDS32_DATA", /* name */
2142 FALSE, /* partial_inplace */
2143 0xffffffff, /* src_mask */
2144 0xffffffff, /* dst_mask */
2145 FALSE), /* pcrel_offset */
2146 HOWTO (R_NDS32_TRAN, /* type */
2147 0, /* rightshift */
2148 2, /* size (0 = byte, 1 = short, 2 = long) */
2149 32, /* bitsize */
2150 FALSE, /* pc_relative */
2151 0, /* bitpos */
2152 complain_overflow_dont,/* complain_on_overflow */
2153 nds32_elf_ignore_reloc,/* special_function */
2154 "R_NDS32_TRAN", /* name */
2155 FALSE, /* partial_inplace */
2156 0xffffffff, /* src_mask */
2157 0xffffffff, /* dst_mask */
2158 FALSE), /* pcrel_offset */
1c8f6a4d
KLC
2159 HOWTO (R_NDS32_TLS_LE_ADD, /* type */
2160 0, /* rightshift */
2161 2, /* size (0 = byte, 1 = short, 2 = long) */
2162 32, /* bitsize */
2163 FALSE, /* pc_relative */
2164 0, /* bitpos */
2165 complain_overflow_dont, /* complain_on_overflow */
2166 nds32_elf_ignore_reloc, /* special_function */
2167 "R_NDS32_TLS_LE_ADD", /* name */
2168 FALSE, /* partial_inplace */
2169 0xffffffff, /* src_mask */
2170 0xffffffff, /* dst_mask */
2171 FALSE), /* pcrel_offset */
2172 HOWTO (R_NDS32_TLS_LE_LS, /* type */
2173 0, /* rightshift */
2174 2, /* size (0 = byte, 1 = short, 2 = long) */
2175 32, /* bitsize */
2176 FALSE, /* pc_relative */
2177 0, /* bitpos */
2178 complain_overflow_dont, /* complain_on_overflow */
2179 nds32_elf_ignore_reloc, /* special_function */
2180 "R_NDS32_TLS_LE_LS", /* name */
2181 FALSE, /* partial_inplace */
2182 0xffffffff, /* src_mask */
2183 0xffffffff, /* dst_mask */
2184 FALSE), /* pcrel_offset */
2185 HOWTO (R_NDS32_EMPTY, /* type */
2186 0, /* rightshift */
2187 2, /* size (0 = byte, 1 = short, 2 = long) */
2188 32, /* bitsize */
2189 FALSE, /* pc_relative */
2190 0, /* bitpos */
2191 complain_overflow_dont, /* complain_on_overflow */
2192 nds32_elf_ignore_reloc, /* special_function */
2193 "R_NDS32_EMPTY", /* name */
2194 FALSE, /* partial_inplace */
2195 0xffffffff, /* src_mask */
2196 0xffffffff, /* dst_mask */
2197 FALSE), /* pcrel_offset */
35c08157
KLC
2198};
2199
2200\f
2201/* nds32_insertion_sort sorts an array with nmemb elements of size size.
2202 This prototype is the same as qsort (). */
2203
2204void
2205nds32_insertion_sort (void *base, size_t nmemb, size_t size,
2206 int (*compar) (const void *lhs, const void *rhs))
2207{
2208 char *ptr = (char *) base;
1c8f6a4d 2209 int i, j;
e1fa0163 2210 char *tmp = xmalloc (size);
35c08157
KLC
2211
2212 /* If i is less than j, i is inserted before j.
2213
2214 |---- j ----- i --------------|
2215 \ / \ /
2216 sorted unsorted
2217 */
2218
1c8f6a4d 2219 for (i = 1; i < (int) nmemb; i++)
35c08157 2220 {
1c8f6a4d
KLC
2221 for (j = (i - 1); j >= 0; j--)
2222 if (compar (ptr + i * size, ptr + j * size) >= 0)
35c08157
KLC
2223 break;
2224
1c8f6a4d
KLC
2225 j++;
2226
35c08157 2227 if (i == j)
1c8f6a4d 2228 continue; /* i is in order. */
35c08157
KLC
2229
2230 memcpy (tmp, ptr + i * size, size);
2231 memmove (ptr + (j + 1) * size, ptr + j * size, (i - j) * size);
2232 memcpy (ptr + j * size, tmp, size);
2233 }
e1fa0163 2234 free (tmp);
35c08157
KLC
2235}
2236
2237/* Sort relocation by r_offset.
2238
2239 We didn't use qsort () in stdlib, because quick-sort is not a stable sorting
2240 algorithm. Relocations at the same r_offset must keep their order.
2241 For example, RELAX_ENTRY must be the very first relocation entry.
2242
2243 Currently, this function implements insertion-sort.
2244
2245 FIXME: If we already sort them in assembler, why bother sort them
2246 here again? */
2247
2248static int
2249compar_reloc (const void *lhs, const void *rhs)
2250{
2251 const Elf_Internal_Rela *l = (const Elf_Internal_Rela *) lhs;
2252 const Elf_Internal_Rela *r = (const Elf_Internal_Rela *) rhs;
2253
2254 if (l->r_offset > r->r_offset)
2255 return 1;
2256 else if (l->r_offset == r->r_offset)
2257 return 0;
2258 else
2259 return -1;
2260}
2261
2262/* Functions listed below are only used for old relocs.
2263 * nds32_elf_9_pcrel_reloc
2264 * nds32_elf_do_9_pcrel_reloc
2265 * nds32_elf_hi20_reloc
2266 * nds32_elf_relocate_hi20
2267 * nds32_elf_lo12_reloc
2268 * nds32_elf_sda15_reloc
2269 * nds32_elf_generic_reloc
2270 */
2271
2272/* Handle the R_NDS32_9_PCREL & R_NDS32_9_PCREL_RELA reloc. */
2273
2274static bfd_reloc_status_type
2275nds32_elf_9_pcrel_reloc (bfd *abfd, arelent *reloc_entry, asymbol *symbol,
2276 void *data, asection *input_section, bfd *output_bfd,
2277 char **error_message ATTRIBUTE_UNUSED)
2278{
2279 /* This part is from bfd_elf_generic_reloc. */
2280 if (output_bfd != (bfd *) NULL
2281 && (symbol->flags & BSF_SECTION_SYM) == 0
2282 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2283 {
2284 reloc_entry->address += input_section->output_offset;
2285 return bfd_reloc_ok;
2286 }
2287
2288 if (output_bfd != NULL)
2289 {
2290 /* FIXME: See bfd_perform_relocation. Is this right? */
2291 return bfd_reloc_continue;
2292 }
2293
2294 return nds32_elf_do_9_pcrel_reloc (abfd, reloc_entry->howto,
2295 input_section,
2296 data, reloc_entry->address,
2297 symbol->section,
2298 (symbol->value
2299 + symbol->section->output_section->vma
2300 + symbol->section->output_offset),
2301 reloc_entry->addend);
2302}
2303
2304/* Utility to actually perform an R_NDS32_9_PCREL reloc. */
2305#define N_ONES(n) (((((bfd_vma) 1 << ((n) - 1)) - 1) << 1) | 1)
2306
2307static bfd_reloc_status_type
2308nds32_elf_do_9_pcrel_reloc (bfd *abfd, reloc_howto_type *howto,
2309 asection *input_section, bfd_byte *data,
1c8f6a4d
KLC
2310 bfd_vma offset,
2311 asection *symbol_section ATTRIBUTE_UNUSED,
35c08157
KLC
2312 bfd_vma symbol_value, bfd_vma addend)
2313{
2314 bfd_signed_vma relocation;
2315 unsigned short x;
2316 bfd_reloc_status_type status;
2317
2318 /* Sanity check the address (offset in section). */
2319 if (offset > bfd_get_section_limit (abfd, input_section))
2320 return bfd_reloc_outofrange;
2321
2322 relocation = symbol_value + addend;
2323 /* Make it pc relative. */
2324 relocation -= (input_section->output_section->vma
2325 + input_section->output_offset);
2326 /* These jumps mask off the lower two bits of the current address
2327 before doing pcrel calculations. */
2328 relocation -= (offset & -(bfd_vma) 2);
2329
1c8f6a4d 2330 if (relocation < -ACCURATE_8BIT_S1 || relocation >= ACCURATE_8BIT_S1)
35c08157
KLC
2331 status = bfd_reloc_overflow;
2332 else
2333 status = bfd_reloc_ok;
2334
2335 x = bfd_getb16 (data + offset);
2336
2337 relocation >>= howto->rightshift;
2338 relocation <<= howto->bitpos;
2339 x = (x & ~howto->dst_mask)
2340 | (((x & howto->src_mask) + relocation) & howto->dst_mask);
2341
2342 bfd_putb16 ((bfd_vma) x, data + offset);
2343
2344 return status;
2345}
2346
2347/* Handle the R_NDS32_HI20_[SU]LO relocs.
2348 HI20_SLO is for the add3 and load/store with displacement instructions.
2349 HI20 is for the or3 instruction.
2350 For R_NDS32_HI20_SLO, the lower 16 bits are sign extended when added to
2351 the high 16 bytes so if the lower 16 bits are negative (bit 15 == 1) then
2352 we must add one to the high 16 bytes (which will get subtracted off when
2353 the low 16 bits are added).
2354 These relocs have to be done in combination with an R_NDS32_LO12 reloc
2355 because there is a carry from the LO12 to the HI20. Here we just save
2356 the information we need; we do the actual relocation when we see the LO12.
2357 This code is copied from the elf32-mips.c. We also support an arbitrary
2358 number of HI20 relocs to be associated with a single LO12 reloc. The
2359 assembler sorts the relocs to ensure each HI20 immediately precedes its
2360 LO12. However if there are multiple copies, the assembler may not find
2361 the real LO12 so it picks the first one it finds. */
2362
2363struct nds32_hi20
2364{
2365 struct nds32_hi20 *next;
2366 bfd_byte *addr;
2367 bfd_vma addend;
2368};
2369
2370static struct nds32_hi20 *nds32_hi20_list;
2371
2372static bfd_reloc_status_type
2373nds32_elf_hi20_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2374 asymbol *symbol, void *data, asection *input_section,
2375 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2376{
2377 bfd_reloc_status_type ret;
2378 bfd_vma relocation;
2379 struct nds32_hi20 *n;
2380
2381 /* This part is from bfd_elf_generic_reloc.
2382 If we're relocating, and this an external symbol, we don't want
2383 to change anything. */
2384 if (output_bfd != (bfd *) NULL
2385 && (symbol->flags & BSF_SECTION_SYM) == 0 && reloc_entry->addend == 0)
2386 {
2387 reloc_entry->address += input_section->output_offset;
2388 return bfd_reloc_ok;
2389 }
2390
2391 /* Sanity check the address (offset in section). */
2392 if (reloc_entry->address > bfd_get_section_limit (abfd, input_section))
2393 return bfd_reloc_outofrange;
2394
2395 ret = bfd_reloc_ok;
2396 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2397 ret = bfd_reloc_undefined;
2398
2399 if (bfd_is_com_section (symbol->section))
2400 relocation = 0;
2401 else
2402 relocation = symbol->value;
2403
2404 relocation += symbol->section->output_section->vma;
2405 relocation += symbol->section->output_offset;
2406 relocation += reloc_entry->addend;
2407
2408 /* Save the information, and let LO12 do the actual relocation. */
2409 n = (struct nds32_hi20 *) bfd_malloc ((bfd_size_type) sizeof *n);
2410 if (n == NULL)
2411 return bfd_reloc_outofrange;
2412
2413 n->addr = (bfd_byte *) data + reloc_entry->address;
2414 n->addend = relocation;
2415 n->next = nds32_hi20_list;
2416 nds32_hi20_list = n;
2417
2418 if (output_bfd != (bfd *) NULL)
2419 reloc_entry->address += input_section->output_offset;
2420
2421 return ret;
2422}
2423
2424/* Handle an NDS32 ELF HI20 reloc. */
2425
2426static void
2427nds32_elf_relocate_hi20 (bfd *input_bfd ATTRIBUTE_UNUSED,
2428 int type ATTRIBUTE_UNUSED, Elf_Internal_Rela *relhi,
2429 Elf_Internal_Rela *rello, bfd_byte *contents,
2430 bfd_vma addend)
2431{
2432 unsigned long insn;
2433 bfd_vma addlo;
2434
2435 insn = bfd_getb32 (contents + relhi->r_offset);
2436
2437 addlo = bfd_getb32 (contents + rello->r_offset);
2438 addlo &= 0xfff;
2439
2440 addend += ((insn & 0xfffff) << 20) + addlo;
2441
2442 insn = (insn & 0xfff00000) | ((addend >> 12) & 0xfffff);
2443 bfd_putb32 (insn, contents + relhi->r_offset);
2444}
2445
2446/* Do an R_NDS32_LO12 relocation. This is a straightforward 12 bit
2447 inplace relocation; this function exists in order to do the
2448 R_NDS32_HI20_[SU]LO relocation described above. */
2449
2450static bfd_reloc_status_type
2451nds32_elf_lo12_reloc (bfd *input_bfd, arelent *reloc_entry, asymbol *symbol,
2452 void *data, asection *input_section, bfd *output_bfd,
2453 char **error_message)
2454{
2455 /* This part is from bfd_elf_generic_reloc.
2456 If we're relocating, and this an external symbol, we don't want
2457 to change anything. */
2458 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2459 && reloc_entry->addend == 0)
2460 {
2461 reloc_entry->address += input_section->output_offset;
2462 return bfd_reloc_ok;
2463 }
2464
2465 if (nds32_hi20_list != NULL)
2466 {
2467 struct nds32_hi20 *l;
2468
2469 l = nds32_hi20_list;
2470 while (l != NULL)
2471 {
2472 unsigned long insn;
2473 unsigned long val;
2474 unsigned long vallo;
2475 struct nds32_hi20 *next;
2476
2477 /* Do the HI20 relocation. Note that we actually don't need
2478 to know anything about the LO12 itself, except where to
2479 find the low 12 bits of the addend needed by the LO12. */
2480 insn = bfd_getb32 (l->addr);
2481 vallo = bfd_getb32 ((bfd_byte *) data + reloc_entry->address);
2482 vallo &= 0xfff;
2483 switch (reloc_entry->howto->type)
2484 {
2485 case R_NDS32_LO12S3:
2486 vallo <<= 3;
2487 break;
2488
2489 case R_NDS32_LO12S2:
2490 vallo <<= 2;
2491 break;
2492
2493 case R_NDS32_LO12S1:
2494 vallo <<= 1;
2495 break;
2496
2497 case R_NDS32_LO12S0:
2498 vallo <<= 0;
2499 break;
2500 }
2501
2502 val = ((insn & 0xfffff) << 12) + vallo;
2503 val += l->addend;
2504
2505 insn = (insn & ~(bfd_vma) 0xfffff) | ((val >> 12) & 0xfffff);
2506 bfd_putb32 ((bfd_vma) insn, l->addr);
2507
2508 next = l->next;
2509 free (l);
2510 l = next;
2511 }
2512
2513 nds32_hi20_list = NULL;
2514 }
2515
2516 /* Now do the LO12 reloc in the usual way.
2517 ??? It would be nice to call bfd_elf_generic_reloc here,
2518 but we have partial_inplace set. bfd_elf_generic_reloc will
2519 pass the handling back to bfd_install_relocation which will install
2520 a section relative addend which is wrong. */
2521 return nds32_elf_generic_reloc (input_bfd, reloc_entry, symbol, data,
2522 input_section, output_bfd, error_message);
2523}
2524
2525/* Do generic partial_inplace relocation.
2526 This is a local replacement for bfd_elf_generic_reloc. */
2527
2528static bfd_reloc_status_type
2529nds32_elf_generic_reloc (bfd *input_bfd, arelent *reloc_entry,
2530 asymbol *symbol, void *data, asection *input_section,
2531 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2532{
2533 bfd_reloc_status_type ret;
2534 bfd_vma relocation;
2535 bfd_byte *inplace_address;
2536
2537 /* This part is from bfd_elf_generic_reloc.
2538 If we're relocating, and this an external symbol, we don't want
2539 to change anything. */
2540 if (output_bfd != NULL && (symbol->flags & BSF_SECTION_SYM) == 0
2541 && reloc_entry->addend == 0)
2542 {
2543 reloc_entry->address += input_section->output_offset;
2544 return bfd_reloc_ok;
2545 }
2546
2547 /* Now do the reloc in the usual way.
2548 ??? It would be nice to call bfd_elf_generic_reloc here,
2549 but we have partial_inplace set. bfd_elf_generic_reloc will
2550 pass the handling back to bfd_install_relocation which will install
2551 a section relative addend which is wrong. */
2552
2553 /* Sanity check the address (offset in section). */
2554 if (reloc_entry->address > bfd_get_section_limit (input_bfd, input_section))
2555 return bfd_reloc_outofrange;
2556
2557 ret = bfd_reloc_ok;
2558 if (bfd_is_und_section (symbol->section) && output_bfd == (bfd *) NULL)
2559 ret = bfd_reloc_undefined;
2560
2561 if (bfd_is_com_section (symbol->section) || output_bfd != (bfd *) NULL)
2562 relocation = 0;
2563 else
2564 relocation = symbol->value;
2565
2566 /* Only do this for a final link. */
2567 if (output_bfd == (bfd *) NULL)
2568 {
2569 relocation += symbol->section->output_section->vma;
2570 relocation += symbol->section->output_offset;
2571 }
2572
2573 relocation += reloc_entry->addend;
2574 switch (reloc_entry->howto->type)
2575 {
2576 case R_NDS32_LO12S3:
2577 relocation >>= 3;
2578 break;
2579
2580 case R_NDS32_LO12S2:
2581 relocation >>= 2;
2582 break;
2583
2584 case R_NDS32_LO12S1:
2585 relocation >>= 1;
2586 break;
2587
2588 case R_NDS32_LO12S0:
2589 default:
2590 relocation >>= 0;
2591 break;
2592 }
2593
2594 inplace_address = (bfd_byte *) data + reloc_entry->address;
2595
2596#define DOIT(x) \
2597 x = ((x & ~reloc_entry->howto->dst_mask) | \
2598 (((x & reloc_entry->howto->src_mask) + relocation) & \
2599 reloc_entry->howto->dst_mask))
2600
2601 switch (reloc_entry->howto->size)
2602 {
2603 case 1:
2604 {
2605 short x = bfd_getb16 (inplace_address);
2606
2607 DOIT (x);
2608 bfd_putb16 ((bfd_vma) x, inplace_address);
2609 }
2610 break;
2611 case 2:
2612 {
2613 unsigned long x = bfd_getb32 (inplace_address);
2614
2615 DOIT (x);
2616 bfd_putb32 ((bfd_vma) x, inplace_address);
2617 }
2618 break;
2619 default:
2620 BFD_ASSERT (0);
2621 }
2622
2623 if (output_bfd != (bfd *) NULL)
2624 reloc_entry->address += input_section->output_offset;
2625
2626 return ret;
2627}
2628
2629/* Handle the R_NDS32_SDA15 reloc.
2630 This reloc is used to compute the address of objects in the small data area
2631 and to perform loads and stores from that area.
2632 The lower 15 bits are sign extended and added to the register specified
2633 in the instruction, which is assumed to point to _SDA_BASE_.
2634
2635 Since the lower 15 bits offset is left-shifted 0, 1 or 2 bits depending on
2636 the access size, this must be taken care of. */
2637
2638static bfd_reloc_status_type
2639nds32_elf_sda15_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2640 asymbol *symbol, void *data ATTRIBUTE_UNUSED,
2641 asection *input_section, bfd *output_bfd,
2642 char **error_message ATTRIBUTE_UNUSED)
2643{
2644 /* This part is from bfd_elf_generic_reloc. */
2645 if (output_bfd != (bfd *) NULL
2646 && (symbol->flags & BSF_SECTION_SYM) == 0
2647 && (!reloc_entry->howto->partial_inplace || reloc_entry->addend == 0))
2648 {
2649 reloc_entry->address += input_section->output_offset;
2650 return bfd_reloc_ok;
2651 }
2652
2653 if (output_bfd != NULL)
2654 {
2655 /* FIXME: See bfd_perform_relocation. Is this right? */
2656 return bfd_reloc_continue;
2657 }
2658
2659 /* FIXME: not sure what to do here yet. But then again, the linker
2660 may never call us. */
2661 abort ();
2662}
2663
2664/* nds32_elf_ignore_reloc is the special function for
2665 relocation types which don't need to be relocated
2666 like relaxation relocation types.
2667 This function simply return bfd_reloc_ok when it is
2668 invoked. */
2669
2670static bfd_reloc_status_type
2671nds32_elf_ignore_reloc (bfd *abfd ATTRIBUTE_UNUSED, arelent *reloc_entry,
2672 asymbol *symbol ATTRIBUTE_UNUSED,
2673 void *data ATTRIBUTE_UNUSED, asection *input_section,
2674 bfd *output_bfd, char **error_message ATTRIBUTE_UNUSED)
2675{
2676 if (output_bfd != NULL)
2677 reloc_entry->address += input_section->output_offset;
2678
2679 return bfd_reloc_ok;
2680}
2681\f
2682
2683/* Map BFD reloc types to NDS32 ELF reloc types. */
2684
2685struct nds32_reloc_map_entry
2686{
2687 bfd_reloc_code_real_type bfd_reloc_val;
2688 unsigned char elf_reloc_val;
2689};
2690
2691static const struct nds32_reloc_map_entry nds32_reloc_map[] =
2692{
2693 {BFD_RELOC_NONE, R_NDS32_NONE},
2694 {BFD_RELOC_16, R_NDS32_16_RELA},
2695 {BFD_RELOC_32, R_NDS32_32_RELA},
2696 {BFD_RELOC_NDS32_20, R_NDS32_20_RELA},
2697 {BFD_RELOC_NDS32_5, R_NDS32_5_RELA},
2698 {BFD_RELOC_NDS32_9_PCREL, R_NDS32_9_PCREL_RELA},
2699 {BFD_RELOC_NDS32_WORD_9_PCREL, R_NDS32_WORD_9_PCREL_RELA},
2700 {BFD_RELOC_NDS32_15_PCREL, R_NDS32_15_PCREL_RELA},
2701 {BFD_RELOC_NDS32_17_PCREL, R_NDS32_17_PCREL_RELA},
2702 {BFD_RELOC_NDS32_25_PCREL, R_NDS32_25_PCREL_RELA},
2703 {BFD_RELOC_NDS32_10_UPCREL, R_NDS32_10_UPCREL_RELA},
2704 {BFD_RELOC_NDS32_HI20, R_NDS32_HI20_RELA},
2705 {BFD_RELOC_NDS32_LO12S3, R_NDS32_LO12S3_RELA},
2706 {BFD_RELOC_NDS32_LO12S2, R_NDS32_LO12S2_RELA},
2707 {BFD_RELOC_NDS32_LO12S1, R_NDS32_LO12S1_RELA},
2708 {BFD_RELOC_NDS32_LO12S0, R_NDS32_LO12S0_RELA},
2709 {BFD_RELOC_NDS32_LO12S0_ORI, R_NDS32_LO12S0_ORI_RELA},
2710 {BFD_RELOC_NDS32_SDA15S3, R_NDS32_SDA15S3_RELA},
2711 {BFD_RELOC_NDS32_SDA15S2, R_NDS32_SDA15S2_RELA},
2712 {BFD_RELOC_NDS32_SDA15S1, R_NDS32_SDA15S1_RELA},
2713 {BFD_RELOC_NDS32_SDA15S0, R_NDS32_SDA15S0_RELA},
2714 {BFD_RELOC_VTABLE_INHERIT, R_NDS32_RELA_GNU_VTINHERIT},
2715 {BFD_RELOC_VTABLE_ENTRY, R_NDS32_RELA_GNU_VTENTRY},
2716
2717 {BFD_RELOC_NDS32_GOT20, R_NDS32_GOT20},
2718 {BFD_RELOC_NDS32_9_PLTREL, R_NDS32_9_PLTREL},
2719 {BFD_RELOC_NDS32_25_PLTREL, R_NDS32_25_PLTREL},
2720 {BFD_RELOC_NDS32_COPY, R_NDS32_COPY},
2721 {BFD_RELOC_NDS32_GLOB_DAT, R_NDS32_GLOB_DAT},
2722 {BFD_RELOC_NDS32_JMP_SLOT, R_NDS32_JMP_SLOT},
2723 {BFD_RELOC_NDS32_RELATIVE, R_NDS32_RELATIVE},
2724 {BFD_RELOC_NDS32_GOTOFF, R_NDS32_GOTOFF},
2725 {BFD_RELOC_NDS32_GOTPC20, R_NDS32_GOTPC20},
2726 {BFD_RELOC_NDS32_GOT_HI20, R_NDS32_GOT_HI20},
2727 {BFD_RELOC_NDS32_GOT_LO12, R_NDS32_GOT_LO12},
2728 {BFD_RELOC_NDS32_GOT_LO15, R_NDS32_GOT_LO15},
2729 {BFD_RELOC_NDS32_GOT_LO19, R_NDS32_GOT_LO19},
2730 {BFD_RELOC_NDS32_GOTPC_HI20, R_NDS32_GOTPC_HI20},
2731 {BFD_RELOC_NDS32_GOTPC_LO12, R_NDS32_GOTPC_LO12},
2732 {BFD_RELOC_NDS32_GOTOFF_HI20, R_NDS32_GOTOFF_HI20},
2733 {BFD_RELOC_NDS32_GOTOFF_LO12, R_NDS32_GOTOFF_LO12},
2734 {BFD_RELOC_NDS32_GOTOFF_LO15, R_NDS32_GOTOFF_LO15},
2735 {BFD_RELOC_NDS32_GOTOFF_LO19, R_NDS32_GOTOFF_LO19},
2736 {BFD_RELOC_NDS32_INSN16, R_NDS32_INSN16},
2737 {BFD_RELOC_NDS32_LABEL, R_NDS32_LABEL},
2738 {BFD_RELOC_NDS32_LONGCALL1, R_NDS32_LONGCALL1},
2739 {BFD_RELOC_NDS32_LONGCALL2, R_NDS32_LONGCALL2},
2740 {BFD_RELOC_NDS32_LONGCALL3, R_NDS32_LONGCALL3},
1c8f6a4d
KLC
2741 {BFD_RELOC_NDS32_LONGCALL4, R_NDS32_LONGCALL4},
2742 {BFD_RELOC_NDS32_LONGCALL5, R_NDS32_LONGCALL5},
2743 {BFD_RELOC_NDS32_LONGCALL6, R_NDS32_LONGCALL6},
35c08157
KLC
2744 {BFD_RELOC_NDS32_LONGJUMP1, R_NDS32_LONGJUMP1},
2745 {BFD_RELOC_NDS32_LONGJUMP2, R_NDS32_LONGJUMP2},
2746 {BFD_RELOC_NDS32_LONGJUMP3, R_NDS32_LONGJUMP3},
1c8f6a4d
KLC
2747 {BFD_RELOC_NDS32_LONGJUMP4, R_NDS32_LONGJUMP4},
2748 {BFD_RELOC_NDS32_LONGJUMP5, R_NDS32_LONGJUMP5},
2749 {BFD_RELOC_NDS32_LONGJUMP6, R_NDS32_LONGJUMP6},
2750 {BFD_RELOC_NDS32_LONGJUMP7, R_NDS32_LONGJUMP7},
35c08157
KLC
2751 {BFD_RELOC_NDS32_LOADSTORE, R_NDS32_LOADSTORE},
2752 {BFD_RELOC_NDS32_9_FIXED, R_NDS32_9_FIXED_RELA},
2753 {BFD_RELOC_NDS32_15_FIXED, R_NDS32_15_FIXED_RELA},
2754 {BFD_RELOC_NDS32_17_FIXED, R_NDS32_17_FIXED_RELA},
2755 {BFD_RELOC_NDS32_25_FIXED, R_NDS32_25_FIXED_RELA},
2756 {BFD_RELOC_NDS32_PLTREL_HI20, R_NDS32_PLTREL_HI20},
2757 {BFD_RELOC_NDS32_PLTREL_LO12, R_NDS32_PLTREL_LO12},
2758 {BFD_RELOC_NDS32_PLT_GOTREL_HI20, R_NDS32_PLT_GOTREL_HI20},
2759 {BFD_RELOC_NDS32_PLT_GOTREL_LO12, R_NDS32_PLT_GOTREL_LO12},
2760 {BFD_RELOC_NDS32_PLT_GOTREL_LO15, R_NDS32_PLT_GOTREL_LO15},
2761 {BFD_RELOC_NDS32_PLT_GOTREL_LO19, R_NDS32_PLT_GOTREL_LO19},
2762 {BFD_RELOC_NDS32_PLT_GOTREL_LO20, R_NDS32_PLT_GOTREL_LO20},
2763 {BFD_RELOC_NDS32_SDA12S2_DP, R_NDS32_SDA12S2_DP_RELA},
2764 {BFD_RELOC_NDS32_SDA12S2_SP, R_NDS32_SDA12S2_SP_RELA},
2765 {BFD_RELOC_NDS32_LO12S2_DP, R_NDS32_LO12S2_DP_RELA},
2766 {BFD_RELOC_NDS32_LO12S2_SP, R_NDS32_LO12S2_SP_RELA},
2767 {BFD_RELOC_NDS32_SDA16S3, R_NDS32_SDA16S3_RELA},
2768 {BFD_RELOC_NDS32_SDA17S2, R_NDS32_SDA17S2_RELA},
2769 {BFD_RELOC_NDS32_SDA18S1, R_NDS32_SDA18S1_RELA},
2770 {BFD_RELOC_NDS32_SDA19S0, R_NDS32_SDA19S0_RELA},
2771 {BFD_RELOC_NDS32_SDA_FP7U2_RELA, R_NDS32_SDA_FP7U2_RELA},
2772 {BFD_RELOC_NDS32_DWARF2_OP1, R_NDS32_DWARF2_OP1_RELA},
2773 {BFD_RELOC_NDS32_DWARF2_OP2, R_NDS32_DWARF2_OP2_RELA},
2774 {BFD_RELOC_NDS32_DWARF2_LEB, R_NDS32_DWARF2_LEB_RELA},
2775 {BFD_RELOC_NDS32_UPDATE_TA, R_NDS32_UPDATE_TA_RELA},
2776 {BFD_RELOC_NDS32_GOT_SUFF, R_NDS32_GOT_SUFF},
2777 {BFD_RELOC_NDS32_GOTOFF_SUFF, R_NDS32_GOTOFF_SUFF},
2778 {BFD_RELOC_NDS32_GOT15S2, R_NDS32_GOT15S2_RELA},
2779 {BFD_RELOC_NDS32_GOT17S2, R_NDS32_GOT17S2_RELA},
2780 {BFD_RELOC_NDS32_PTR, R_NDS32_PTR},
2781 {BFD_RELOC_NDS32_PTR_COUNT, R_NDS32_PTR_COUNT},
2782 {BFD_RELOC_NDS32_PLT_GOT_SUFF, R_NDS32_PLT_GOT_SUFF},
2783 {BFD_RELOC_NDS32_PTR_RESOLVED, R_NDS32_PTR_RESOLVED},
2784 {BFD_RELOC_NDS32_RELAX_ENTRY, R_NDS32_RELAX_ENTRY},
2785 {BFD_RELOC_NDS32_MULCALL_SUFF, R_NDS32_MULCALL_SUFF},
2786 {BFD_RELOC_NDS32_PLTBLOCK, R_NDS32_PLTBLOCK},
2787 {BFD_RELOC_NDS32_RELAX_REGION_BEGIN, R_NDS32_RELAX_REGION_BEGIN},
2788 {BFD_RELOC_NDS32_RELAX_REGION_END, R_NDS32_RELAX_REGION_END},
2789 {BFD_RELOC_NDS32_MINUEND, R_NDS32_MINUEND},
2790 {BFD_RELOC_NDS32_SUBTRAHEND, R_NDS32_SUBTRAHEND},
1c8f6a4d 2791 {BFD_RELOC_NDS32_EMPTY, R_NDS32_EMPTY},
35c08157
KLC
2792
2793 {BFD_RELOC_NDS32_DIFF8, R_NDS32_DIFF8},
2794 {BFD_RELOC_NDS32_DIFF16, R_NDS32_DIFF16},
2795 {BFD_RELOC_NDS32_DIFF32, R_NDS32_DIFF32},
2796 {BFD_RELOC_NDS32_DIFF_ULEB128, R_NDS32_DIFF_ULEB128},
2797 {BFD_RELOC_NDS32_25_ABS, R_NDS32_25_ABS_RELA},
2798 {BFD_RELOC_NDS32_DATA, R_NDS32_DATA},
2799 {BFD_RELOC_NDS32_TRAN, R_NDS32_TRAN},
2800 {BFD_RELOC_NDS32_17IFC_PCREL, R_NDS32_17IFC_PCREL_RELA},
2801 {BFD_RELOC_NDS32_10IFCU_PCREL, R_NDS32_10IFCU_PCREL_RELA},
1c8f6a4d
KLC
2802 {BFD_RELOC_NDS32_TLS_LE_HI20, R_NDS32_TLS_LE_HI20},
2803 {BFD_RELOC_NDS32_TLS_LE_LO12, R_NDS32_TLS_LE_LO12},
2804 {BFD_RELOC_NDS32_TLS_LE_ADD, R_NDS32_TLS_LE_ADD},
2805 {BFD_RELOC_NDS32_TLS_LE_LS, R_NDS32_TLS_LE_LS},
2806 {BFD_RELOC_NDS32_TLS_IE_HI20, R_NDS32_TLS_IE_HI20},
2807 {BFD_RELOC_NDS32_TLS_IE_LO12S2, R_NDS32_TLS_IE_LO12S2},
2808 {BFD_RELOC_NDS32_TLS_TPOFF, R_NDS32_TLS_TPOFF},
2809 {BFD_RELOC_NDS32_TLS_LE_20, R_NDS32_TLS_LE_20},
2810 {BFD_RELOC_NDS32_TLS_LE_15S0, R_NDS32_TLS_LE_15S0},
2811 {BFD_RELOC_NDS32_TLS_LE_15S1, R_NDS32_TLS_LE_15S1},
2812 {BFD_RELOC_NDS32_TLS_LE_15S2, R_NDS32_TLS_LE_15S2},
35c08157
KLC
2813};
2814
2815/* Patch tag. */
2816
2817static reloc_howto_type *
2818bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2819 const char *r_name)
2820{
2821 unsigned int i;
2822
2823 for (i = 0; i < ARRAY_SIZE (nds32_elf_howto_table); i++)
2824 if (nds32_elf_howto_table[i].name != NULL
2825 && strcasecmp (nds32_elf_howto_table[i].name, r_name) == 0)
2826 return &nds32_elf_howto_table[i];
2827
2828 for (i = 0; i < ARRAY_SIZE (nds32_elf_relax_howto_table); i++)
2829 if (nds32_elf_relax_howto_table[i].name != NULL
2830 && strcasecmp (nds32_elf_relax_howto_table[i].name, r_name) == 0)
2831 return &nds32_elf_relax_howto_table[i];
2832
2833 return NULL;
2834}
2835
2836static reloc_howto_type *
2837bfd_elf32_bfd_reloc_type_table_lookup (enum elf_nds32_reloc_type code)
2838{
2839 if (code < R_NDS32_RELAX_ENTRY)
2840 {
2841 BFD_ASSERT (code < ARRAY_SIZE (nds32_elf_howto_table));
2842 return &nds32_elf_howto_table[code];
2843 }
2844 else
2845 {
2846 BFD_ASSERT ((size_t) (code - R_NDS32_RELAX_ENTRY)
2847 < ARRAY_SIZE (nds32_elf_relax_howto_table));
2848 return &nds32_elf_relax_howto_table[code - R_NDS32_RELAX_ENTRY];
2849 }
2850}
2851
2852static reloc_howto_type *
2853bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
2854 bfd_reloc_code_real_type code)
2855{
2856 unsigned int i;
2857
2858 for (i = 0; i < ARRAY_SIZE (nds32_reloc_map); i++)
2859 {
2860 if (nds32_reloc_map[i].bfd_reloc_val == code)
2861 return bfd_elf32_bfd_reloc_type_table_lookup
2862 (nds32_reloc_map[i].elf_reloc_val);
2863 }
2864
2865 return NULL;
2866}
2867
2868/* Set the howto pointer for an NDS32 ELF reloc. */
2869
f3185997
NC
2870static bfd_boolean
2871nds32_info_to_howto_rel (bfd *abfd, arelent *cache_ptr,
35c08157
KLC
2872 Elf_Internal_Rela *dst)
2873{
2874 enum elf_nds32_reloc_type r_type;
2875
2876 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC
2877 if (r_type > R_NDS32_GNU_VTENTRY)
2878 {
695344c0 2879 /* xgettext:c-format */
0aa13fee
AM
2880 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
2881 abfd, r_type);
f3185997
NC
2882 bfd_set_error (bfd_error_bad_value);
2883 return FALSE;
5860e3f8 2884 }
35c08157 2885 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
f3185997 2886 return TRUE;
35c08157
KLC
2887}
2888
f3185997 2889static bfd_boolean
35c08157
KLC
2890nds32_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
2891 Elf_Internal_Rela *dst)
2892{
f3185997
NC
2893 unsigned int r_type = ELF32_R_TYPE (dst->r_info);
2894
2895 if ((r_type == R_NDS32_NONE)
2896 || ((r_type > R_NDS32_GNU_VTENTRY)
2897 && (r_type < R_NDS32_max)))
2898 {
2899 cache_ptr->howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
2900 return TRUE;
2901 }
2902
2903 /* xgettext:c-format */
2904 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), abfd, r_type);
2905 bfd_set_error (bfd_error_bad_value);
2906 return FALSE;
35c08157
KLC
2907}
2908
2909/* Support for core dump NOTE sections.
2910 Reference to include/linux/elfcore.h in Linux. */
2911
2912static bfd_boolean
2913nds32_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
2914{
2915 int offset;
2916 size_t size;
2917
2918 switch (note->descsz)
2919 {
2920 case 0x114:
2921 /* Linux/NDS32 32-bit, ABI1 */
2922
2923 /* pr_cursig */
2924 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2925
2926 /* pr_pid */
2927 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2928
2929 /* pr_reg */
2930 offset = 72;
2931 size = 200;
2932 break;
2933
2934 case 0xfc:
2935 /* Linux/NDS32 32-bit */
2936
2937 /* pr_cursig */
2938 elf_tdata (abfd)->core->signal = bfd_get_16 (abfd, note->descdata + 12);
2939
2940 /* pr_pid */
2941 elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 24);
2942
2943 /* pr_reg */
2944 offset = 72;
2945 size = 176;
2946 break;
2947
2948 default:
2949 return FALSE;
2950 }
2951
2952 /* Make a ".reg" section. */
2953 return _bfd_elfcore_make_pseudosection (abfd, ".reg",
2954 size, note->descpos + offset);
2955}
2956
2957static bfd_boolean
2958nds32_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
2959{
2960 switch (note->descsz)
2961 {
2962 case 124:
2963 /* Linux/NDS32 */
2964
2965 /* __kernel_uid_t, __kernel_gid_t are short on NDS32 platform. */
2966 elf_tdata (abfd)->core->program =
2967 _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
2968 elf_tdata (abfd)->core->command =
2969 _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
2b804145 2970 break;
35c08157
KLC
2971
2972 default:
2973 return FALSE;
2974 }
2975
2976 /* Note that for some reason, a spurious space is tacked
2977 onto the end of the args in some (at least one anyway)
2978 implementations, so strip it off if it exists. */
2979 {
2980 char *command = elf_tdata (abfd)->core->command;
2981 int n = strlen (command);
2982
2983 if (0 < n && command[n - 1] == ' ')
2984 command[n - 1] = '\0';
2985 }
2986
2987 return TRUE;
2988}
2989
2990/* Hook called by the linker routine which adds symbols from an object
2991 file. We must handle the special NDS32 section numbers here.
2992 We also keep watching for whether we need to create the sdata special
2993 linker sections. */
2994
2995static bfd_boolean
2996nds32_elf_add_symbol_hook (bfd *abfd,
2997 struct bfd_link_info *info ATTRIBUTE_UNUSED,
2998 Elf_Internal_Sym *sym,
2999 const char **namep ATTRIBUTE_UNUSED,
3000 flagword *flagsp ATTRIBUTE_UNUSED,
3001 asection **secp, bfd_vma *valp)
3002{
3003 switch (sym->st_shndx)
3004 {
3005 case SHN_COMMON:
3006 /* Common symbols less than the GP size are automatically
3007 treated as SHN_MIPS_SCOMMON symbols. */
3008 if (sym->st_size > elf_gp_size (abfd)
3009 || ELF_ST_TYPE (sym->st_info) == STT_TLS)
3010 break;
3011
3012 /* st_value is the alignemnt constraint.
3013 That might be its actual size if it is an array or structure. */
3014 switch (sym->st_value)
3015 {
3016 case 1:
3017 *secp = bfd_make_section_old_way (abfd, ".scommon_b");
3018 break;
3019 case 2:
3020 *secp = bfd_make_section_old_way (abfd, ".scommon_h");
3021 break;
3022 case 4:
3023 *secp = bfd_make_section_old_way (abfd, ".scommon_w");
3024 break;
3025 case 8:
3026 *secp = bfd_make_section_old_way (abfd, ".scommon_d");
3027 break;
3028 default:
3029 return TRUE;
3030 }
3031
3032 (*secp)->flags |= SEC_IS_COMMON;
3033 *valp = sym->st_size;
3034 break;
3035 }
3036
3037 return TRUE;
3038}
3039
3040
3041/* This function can figure out the best location for a base register to access
3042 data relative to this base register
3043 INPUT:
3044 sda_d0: size of first DOUBLE WORD data section
3045 sda_w0: size of first WORD data section
3046 sda_h0: size of first HALF WORD data section
3047 sda_b : size of BYTE data section
3048 sda_hi: size of second HALF WORD data section
3049 sda_w1: size of second WORD data section
3050 sda_d1: size of second DOUBLE WORD data section
3051 OUTPUT:
3052 offset (always positive) from the beginning of sda_d0 if OK
3053 a negative error value if fail
3054 NOTE:
3055 these 7 sections have to be located back to back if exist
3056 a pass in 0 value for non-existing section */
3057
3058/* Due to the interpretation of simm15 field of load/store depending on
3059 data accessing size, the organization of base register relative data shall
3060 like the following figure
3061 -------------------------------------------
3062 | DOUBLE WORD sized data (range +/- 128K)
3063 -------------------------------------------
3064 | WORD sized data (range +/- 64K)
3065 -------------------------------------------
3066 | HALF WORD sized data (range +/- 32K)
3067 -------------------------------------------
3068 | BYTE sized data (range +/- 16K)
3069 -------------------------------------------
3070 | HALF WORD sized data (range +/- 32K)
3071 -------------------------------------------
3072 | WORD sized data (range +/- 64K)
3073 -------------------------------------------
3074 | DOUBLE WORD sized data (range +/- 128K)
3075 -------------------------------------------
3076 Its base register shall be set to access these data freely. */
3077
3078/* We have to figure out the SDA_BASE value, so that we can adjust the
3079 symbol value correctly. We look up the symbol _SDA_BASE_ in the output
3080 BFD. If we can't find it, we're stuck. We cache it in the ELF
3081 target data. We don't need to adjust the symbol value for an
3082 external symbol if we are producing relocatable output. */
3083
3084static asection *sda_rela_sec = NULL;
3085
1c8f6a4d 3086#define SDA_SECTION_NUM 10
35c08157
KLC
3087
3088static bfd_reloc_status_type
3089nds32_elf_final_sda_base (bfd *output_bfd, struct bfd_link_info *info,
3090 bfd_vma *psb, bfd_boolean add_symbol)
3091{
3092 int relax_fp_as_gp;
3093 struct elf_nds32_link_hash_table *table;
3094 struct bfd_link_hash_entry *h, *h2;
1c8f6a4d 3095 long unsigned int total = 0;
35c08157
KLC
3096
3097 h = bfd_link_hash_lookup (info->hash, "_SDA_BASE_", FALSE, FALSE, TRUE);
3098 if (!h || (h->type != bfd_link_hash_defined && h->type != bfd_link_hash_defweak))
3099 {
3100 asection *first = NULL, *final = NULL, *temp;
3101 bfd_vma sda_base;
3102 /* The first section must be 4-byte aligned to promise _SDA_BASE_ being
3103 4 byte-aligned. Therefore, it has to set the first section ".data"
3104 4 byte-aligned. */
3105 static const char sec_name[SDA_SECTION_NUM][10] =
3106 {
3107 ".data", ".got", ".sdata_d", ".sdata_w", ".sdata_h", ".sdata_b",
1c8f6a4d 3108 ".sbss_b", ".sbss_h", ".sbss_w", ".sbss_d"
35c08157
KLC
3109 };
3110 size_t i = 0;
3111
3112 if (output_bfd->sections == NULL)
3113 {
3114 *psb = elf_gp (output_bfd);
3115 return bfd_reloc_ok;
3116 }
3117
3118 /* Get the first and final section. */
1c8f6a4d 3119 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3120 {
3121 temp = bfd_get_section_by_name (output_bfd, sec_name[i]);
3122 if (temp && !first && (temp->size != 0 || temp->rawsize != 0))
3123 first = temp;
3124 if (temp && (temp->size != 0 || temp->rawsize != 0))
3125 final = temp;
1c8f6a4d
KLC
3126
3127 /* Summarize the sections in order to check if joining .bss. */
3128 if (temp && temp->size != 0)
3129 total += temp->size;
3130 else if (temp && temp->rawsize != 0)
3131 total += temp->rawsize;
3132
35c08157
KLC
3133 i++;
3134 }
3135
1c8f6a4d
KLC
3136 /* Check .bss size. */
3137 temp = bfd_get_section_by_name (output_bfd, ".bss");
3138 if (temp)
3139 {
3140 if (temp->size != 0)
3141 total += temp->size;
3142 else if (temp->rawsize != 0)
3143 total += temp->rawsize;
3144
3145 if (total < 0x80000)
3146 {
3147 if (!first && (temp->size != 0 || temp->rawsize != 0))
3148 first = temp;
3149 if ((temp->size != 0 || temp->rawsize != 0))
3150 final = temp;
3151 }
3152 }
3153
35c08157
KLC
3154 if (first && final)
3155 {
3156 /* The middle of data region. */
1c8f6a4d 3157 sda_base = final->vma / 2 + final->rawsize / 2 + first->vma / 2;
35c08157
KLC
3158
3159 /* Find the section sda_base located. */
3160 i = 0;
1c8f6a4d 3161 while (i < sizeof (sec_name) / sizeof (sec_name [0]))
35c08157
KLC
3162 {
3163 final = bfd_get_section_by_name (output_bfd, sec_name[i]);
3164 if (final && (final->size != 0 || final->rawsize != 0)
3165 && sda_base >= final->vma)
3166 {
3167 first = final;
3168 i++;
3169 }
3170 else
3171 break;
3172 }
3173 }
3174 else
3175 {
3176 /* There is not any data section in output bfd, and set _SDA_BASE_ in
3177 first output section. */
3178 first = output_bfd->sections;
3179 while (first && first->size == 0 && first->rawsize == 0)
3180 first = first->next;
3181 if (!first)
3182 {
3183 *psb = elf_gp (output_bfd);
3184 return bfd_reloc_ok;
3185 }
1c8f6a4d 3186 sda_base = first->vma + first->rawsize;
35c08157
KLC
3187 }
3188
3189 sda_base -= first->vma;
3190 sda_base = sda_base & (~7);
3191
3192 if (!_bfd_generic_link_add_one_symbol
3193 (info, output_bfd, "_SDA_BASE_", BSF_GLOBAL | BSF_WEAK, first,
3194 (bfd_vma) sda_base, (const char *) NULL, FALSE,
3195 get_elf_backend_data (output_bfd)->collect, &h))
3196 return FALSE;
3197
3198 sda_rela_sec = first;
3199
3200 table = nds32_elf_hash_table (info);
3201 relax_fp_as_gp = table->relax_fp_as_gp;
3202 if (relax_fp_as_gp)
3203 {
3204 h2 = bfd_link_hash_lookup (info->hash, FP_BASE_NAME,
3205 FALSE, FALSE, FALSE);
3206 /* Define a weak FP_BASE_NAME here to prevent the undefined symbol.
3207 And set FP equal to SDA_BASE to do relaxation for
3208 la $fp, _FP_BASE_. */
3209 if (!_bfd_generic_link_add_one_symbol
3210 (info, output_bfd, FP_BASE_NAME, BSF_GLOBAL | BSF_WEAK,
3211 first, (bfd_vma) sda_base, (const char *) NULL,
3212 FALSE, get_elf_backend_data (output_bfd)->collect, &h2))
3213 return FALSE;
3214 }
3215 }
3216
535b785f 3217 if (add_symbol)
35c08157
KLC
3218 {
3219 if (h)
3220 {
3221 /* Now set gp. */
3222 elf_gp (output_bfd) = (h->u.def.value
3223 + h->u.def.section->output_section->vma
3224 + h->u.def.section->output_offset);
3225 }
3226 else
3227 {
38f14ab8 3228 _bfd_error_handler (_("error: can't find symbol: %s"), "_SDA_BASE_");
35c08157
KLC
3229 return bfd_reloc_dangerous;
3230 }
3231 }
3232
3233 *psb = h->u.def.value + h->u.def.section->output_section->vma
3234 + h->u.def.section->output_offset;
3235 return bfd_reloc_ok;
3236}
3237\f
3238
3239/* Return size of a PLT entry. */
3240#define elf_nds32_sizeof_plt(info) PLT_ENTRY_SIZE
3241
3242
3243/* Create an entry in an nds32 ELF linker hash table. */
3244
3245static struct bfd_hash_entry *
3246nds32_elf_link_hash_newfunc (struct bfd_hash_entry *entry,
3247 struct bfd_hash_table *table,
3248 const char *string)
3249{
3250 struct elf_nds32_link_hash_entry *ret;
3251
3252 ret = (struct elf_nds32_link_hash_entry *) entry;
3253
3254 /* Allocate the structure if it has not already been allocated by a
3255 subclass. */
3256 if (ret == NULL)
3257 ret = (struct elf_nds32_link_hash_entry *)
3258 bfd_hash_allocate (table, sizeof (struct elf_nds32_link_hash_entry));
3259
3260 if (ret == NULL)
3261 return (struct bfd_hash_entry *) ret;
3262
3263 /* Call the allocation method of the superclass. */
3264 ret = (struct elf_nds32_link_hash_entry *)
3265 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, table, string);
3266
3267 if (ret != NULL)
3268 {
3269 struct elf_nds32_link_hash_entry *eh;
3270
3271 eh = (struct elf_nds32_link_hash_entry *) ret;
3272 eh->dyn_relocs = NULL;
1c8f6a4d 3273 eh->tls_type = GOT_UNKNOWN;
35c08157
KLC
3274 }
3275
3276 return (struct bfd_hash_entry *) ret;
3277}
3278
3279/* Create an nds32 ELF linker hash table. */
3280
3281static struct bfd_link_hash_table *
3282nds32_elf_link_hash_table_create (bfd *abfd)
3283{
3284 struct elf_nds32_link_hash_table *ret;
3285
3286 bfd_size_type amt = sizeof (struct elf_nds32_link_hash_table);
3287
3288 ret = (struct elf_nds32_link_hash_table *) bfd_zmalloc (amt);
3289 if (ret == NULL)
3290 return NULL;
3291
3292 /* patch tag. */
3293 if (!_bfd_elf_link_hash_table_init (&ret->root, abfd,
3294 nds32_elf_link_hash_newfunc,
3295 sizeof (struct elf_nds32_link_hash_entry),
3296 NDS32_ELF_DATA))
3297 {
3298 free (ret);
3299 return NULL;
3300 }
3301
35c08157
KLC
3302 return &ret->root.root;
3303}
3304
35c08157
KLC
3305/* Create dynamic sections when linking against a dynamic object. */
3306
3307static bfd_boolean
3308nds32_elf_create_dynamic_sections (bfd *abfd, struct bfd_link_info *info)
3309{
3310 struct elf_nds32_link_hash_table *htab;
3311 flagword flags, pltflags;
3312 register asection *s;
3313 const struct elf_backend_data *bed;
3314 int ptralign = 2; /* 32-bit */
3315
3316 bed = get_elf_backend_data (abfd);
3317
3318 htab = nds32_elf_hash_table (info);
3319
3320 /* We need to create .plt, .rel[a].plt, .got, .got.plt, .dynbss, and
3321 .rel[a].bss sections. */
3322
3323 flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY
3324 | SEC_LINKER_CREATED);
3325
3326 pltflags = flags;
3327 pltflags |= SEC_CODE;
3328 if (bed->plt_not_loaded)
3329 pltflags &= ~(SEC_LOAD | SEC_HAS_CONTENTS);
3330 if (bed->plt_readonly)
3331 pltflags |= SEC_READONLY;
3332
3333 s = bfd_make_section (abfd, ".plt");
ce558b89 3334 htab->root.splt = s;
35c08157
KLC
3335 if (s == NULL
3336 || !bfd_set_section_flags (abfd, s, pltflags)
3337 || !bfd_set_section_alignment (abfd, s, bed->plt_alignment))
3338 return FALSE;
3339
3340 if (bed->want_plt_sym)
3341 {
3342 /* Define the symbol _PROCEDURE_LINKAGE_TABLE_ at the start of the
3343 .plt section. */
3344 struct bfd_link_hash_entry *bh = NULL;
3345 struct elf_link_hash_entry *h;
3346
3347 if (!(_bfd_generic_link_add_one_symbol
3348 (info, abfd, "_PROCEDURE_LINKAGE_TABLE_", BSF_GLOBAL, s,
3349 (bfd_vma) 0, (const char *) NULL, FALSE,
3350 get_elf_backend_data (abfd)->collect, &bh)))
3351 return FALSE;
3352
3353 h = (struct elf_link_hash_entry *) bh;
3354 h->def_regular = 1;
3355 h->type = STT_OBJECT;
3356
0e1862bb 3357 if (bfd_link_pic (info) && !bfd_elf_link_record_dynamic_symbol (info, h))
35c08157
KLC
3358 return FALSE;
3359 }
3360
3361 s = bfd_make_section (abfd,
3362 bed->default_use_rela_p ? ".rela.plt" : ".rel.plt");
ce558b89 3363 htab->root.srelplt = s;
35c08157
KLC
3364 if (s == NULL
3365 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3366 || !bfd_set_section_alignment (abfd, s, ptralign))
3367 return FALSE;
3368
ce558b89 3369 if (htab->root.sgot == NULL && !_bfd_elf_create_got_section (abfd, info))
35c08157
KLC
3370 return FALSE;
3371
3372 {
3373 const char *secname;
3374 char *relname;
3375 flagword secflags;
3376 asection *sec;
3377
3378 for (sec = abfd->sections; sec; sec = sec->next)
3379 {
3380 secflags = bfd_get_section_flags (abfd, sec);
3381 if ((secflags & (SEC_DATA | SEC_LINKER_CREATED))
3382 || ((secflags & SEC_HAS_CONTENTS) != SEC_HAS_CONTENTS))
3383 continue;
3384 secname = bfd_get_section_name (abfd, sec);
3385 relname = (char *) bfd_malloc ((bfd_size_type) strlen (secname) + 6);
3386 strcpy (relname, ".rela");
3387 strcat (relname, secname);
3388 if (bfd_get_section_by_name (abfd, secname))
3389 continue;
3390 s = bfd_make_section (abfd, relname);
3391 if (s == NULL
3392 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3393 || !bfd_set_section_alignment (abfd, s, ptralign))
3394 return FALSE;
3395 }
3396 }
3397
3398 if (bed->want_dynbss)
3399 {
3400 /* The .dynbss section is a place to put symbols which are defined
3401 by dynamic objects, are referenced by regular objects, and are
3402 not functions. We must allocate space for them in the process
3403 image and use a R_*_COPY reloc to tell the dynamic linker to
3404 initialize them at run time. The linker script puts the .dynbss
3405 section into the .bss section of the final image. */
3406 s = bfd_make_section (abfd, ".dynbss");
3407 htab->sdynbss = s;
3408 if (s == NULL
3409 || !bfd_set_section_flags (abfd, s, SEC_ALLOC | SEC_LINKER_CREATED))
3410 return FALSE;
3411 /* The .rel[a].bss section holds copy relocs. This section is not
3412 normally needed. We need to create it here, though, so that the
3413 linker will map it to an output section. We can't just create it
3414 only if we need it, because we will not know whether we need it
3415 until we have seen all the input files, and the first time the
3416 main linker code calls BFD after examining all the input files
3417 (size_dynamic_sections) the input sections have already been
3418 mapped to the output sections. If the section turns out not to
3419 be needed, we can discard it later. We will never need this
3420 section when generating a shared object, since they do not use
3421 copy relocs. */
0e1862bb 3422 if (!bfd_link_pic (info))
35c08157
KLC
3423 {
3424 s = bfd_make_section (abfd, (bed->default_use_rela_p
3425 ? ".rela.bss" : ".rel.bss"));
3426 htab->srelbss = s;
3427 if (s == NULL
3428 || !bfd_set_section_flags (abfd, s, flags | SEC_READONLY)
3429 || !bfd_set_section_alignment (abfd, s, ptralign))
3430 return FALSE;
3431 }
3432 }
3433
3434 return TRUE;
3435}
3436
3437/* Copy the extra info we tack onto an elf_link_hash_entry. */
3438static void
3439nds32_elf_copy_indirect_symbol (struct bfd_link_info *info,
3440 struct elf_link_hash_entry *dir,
3441 struct elf_link_hash_entry *ind)
3442{
3443 struct elf_nds32_link_hash_entry *edir, *eind;
3444
3445 edir = (struct elf_nds32_link_hash_entry *) dir;
3446 eind = (struct elf_nds32_link_hash_entry *) ind;
3447
3448 if (eind->dyn_relocs != NULL)
3449 {
3450 if (edir->dyn_relocs != NULL)
3451 {
3bf083ed
AM
3452 struct elf_dyn_relocs **pp;
3453 struct elf_dyn_relocs *p;
35c08157
KLC
3454
3455 if (ind->root.type == bfd_link_hash_indirect)
3456 abort ();
3457
3458 /* Add reloc counts against the weak sym to the strong sym
3459 list. Merge any entries against the same section. */
3460 for (pp = &eind->dyn_relocs; (p = *pp) != NULL;)
3461 {
3bf083ed 3462 struct elf_dyn_relocs *q;
35c08157
KLC
3463
3464 for (q = edir->dyn_relocs; q != NULL; q = q->next)
3465 if (q->sec == p->sec)
3466 {
3467 q->pc_count += p->pc_count;
3468 q->count += p->count;
3469 *pp = p->next;
3470 break;
3471 }
3472 if (q == NULL)
3473 pp = &p->next;
3474 }
3475 *pp = edir->dyn_relocs;
3476 }
3477
3478 edir->dyn_relocs = eind->dyn_relocs;
3479 eind->dyn_relocs = NULL;
3480 }
3481
3482 _bfd_elf_link_hash_copy_indirect (info, dir, ind);
3483}
3484\f
63c1f59d
AM
3485/* Find dynamic relocs for H that apply to read-only sections. */
3486
3487static asection *
3488readonly_dynrelocs (struct elf_link_hash_entry *h)
3489{
3bf083ed 3490 struct elf_dyn_relocs *p;
63c1f59d
AM
3491
3492 for (p = elf32_nds32_hash_entry (h)->dyn_relocs; p != NULL; p = p->next)
3493 {
3494 asection *s = p->sec->output_section;
3495
3496 if (s != NULL && (s->flags & SEC_READONLY) != 0)
3497 return p->sec;
3498 }
3499 return NULL;
3500}
35c08157
KLC
3501
3502/* Adjust a symbol defined by a dynamic object and referenced by a
3503 regular object. The current definition is in some section of the
3504 dynamic object, but we're not including those sections. We have to
3505 change the definition to something the rest of the link can
3506 understand. */
3507
3508static bfd_boolean
3509nds32_elf_adjust_dynamic_symbol (struct bfd_link_info *info,
3510 struct elf_link_hash_entry *h)
3511{
3512 struct elf_nds32_link_hash_table *htab;
35c08157
KLC
3513 bfd *dynobj;
3514 asection *s;
3515 unsigned int power_of_two;
3516
3517 dynobj = elf_hash_table (info)->dynobj;
3518
3519 /* Make sure we know what is going on here. */
3520 BFD_ASSERT (dynobj != NULL
3521 && (h->needs_plt
60d67dc8 3522 || h->is_weakalias
35c08157
KLC
3523 || (h->def_dynamic && h->ref_regular && !h->def_regular)));
3524
3525
3526 /* If this is a function, put it in the procedure linkage table. We
3527 will fill in the contents of the procedure linkage table later,
3528 when we know the address of the .got section. */
3529 if (h->type == STT_FUNC || h->needs_plt)
3530 {
0e1862bb 3531 if (!bfd_link_pic (info)
35c08157
KLC
3532 && !h->def_dynamic
3533 && !h->ref_dynamic
3534 && h->root.type != bfd_link_hash_undefweak
3535 && h->root.type != bfd_link_hash_undefined)
3536 {
3537 /* This case can occur if we saw a PLT reloc in an input
3538 file, but the symbol was never referred to by a dynamic
3539 object. In such a case, we don't actually need to build
3540 a procedure linkage table, and we can just do a PCREL
3541 reloc instead. */
3542 h->plt.offset = (bfd_vma) - 1;
3543 h->needs_plt = 0;
3544 }
3545
3546 return TRUE;
3547 }
3548 else
3549 h->plt.offset = (bfd_vma) - 1;
3550
3551 /* If this is a weak symbol, and there is a real definition, the
3552 processor independent code will have arranged for us to see the
3553 real definition first, and we can just use the same value. */
60d67dc8 3554 if (h->is_weakalias)
35c08157 3555 {
60d67dc8
AM
3556 struct elf_link_hash_entry *def = weakdef (h);
3557 BFD_ASSERT (def->root.type == bfd_link_hash_defined);
3558 h->root.u.def.section = def->root.u.def.section;
3559 h->root.u.def.value = def->root.u.def.value;
35c08157
KLC
3560 return TRUE;
3561 }
3562
3563 /* This is a reference to a symbol defined by a dynamic object which
3564 is not a function. */
3565
3566 /* If we are creating a shared library, we must presume that the
3567 only references to the symbol are via the global offset table.
3568 For such cases we need not do anything here; the relocations will
3569 be handled correctly by relocate_section. */
0e1862bb 3570 if (bfd_link_pic (info))
35c08157
KLC
3571 return TRUE;
3572
3573 /* If there are no references to this symbol that do not use the
3574 GOT, we don't need to generate a copy reloc. */
3575 if (!h->non_got_ref)
3576 return TRUE;
3577
3578 /* If -z nocopyreloc was given, we won't generate them either. */
3bf083ed 3579 if (0 && info->nocopyreloc)
35c08157
KLC
3580 {
3581 h->non_got_ref = 0;
3582 return TRUE;
3583 }
3584
3bf083ed
AM
3585 /* If we don't find any dynamic relocs in read-only sections, then
3586 we'll be keeping the dynamic relocs and avoiding the copy reloc. */
3587 if (0 && !readonly_dynrelocs (h))
35c08157
KLC
3588 {
3589 h->non_got_ref = 0;
3590 return TRUE;
3591 }
3592
3593 /* We must allocate the symbol in our .dynbss section, which will
3594 become part of the .bss section of the executable. There will be
3595 an entry for this symbol in the .dynsym section. The dynamic
3596 object will contain position independent code, so all references
3597 from the dynamic object to this symbol will go through the global
3598 offset table. The dynamic linker will use the .dynsym entry to
3599 determine the address it must put in the global offset table, so
3600 both the dynamic object and the regular object will refer to the
3601 same memory location for the variable. */
3602
3603 htab = nds32_elf_hash_table (info);
3604 s = htab->sdynbss;
3605 BFD_ASSERT (s != NULL);
3606
3607 /* We must generate a R_NDS32_COPY reloc to tell the dynamic linker
3608 to copy the initial value out of the dynamic object and into the
3609 runtime process image. We need to remember the offset into the
3610 .rela.bss section we are going to use. */
3611 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0)
3612 {
3613 asection *srel;
3614
3615 srel = htab->srelbss;
3616 BFD_ASSERT (srel != NULL);
3617 srel->size += sizeof (Elf32_External_Rela);
3618 h->needs_copy = 1;
3619 }
3620
3621 /* We need to figure out the alignment required for this symbol. I
3622 have no idea how ELF linkers handle this. */
3623 power_of_two = bfd_log2 (h->size);
3624 if (power_of_two > 3)
3625 power_of_two = 3;
3626
3627 /* Apply the required alignment. */
3628 s->size = BFD_ALIGN (s->size, (bfd_size_type) (1 << power_of_two));
3629 if (power_of_two > bfd_get_section_alignment (dynobj, s))
3630 {
3631 if (!bfd_set_section_alignment (dynobj, s, power_of_two))
3632 return FALSE;
3633 }
3634
3635 /* Define the symbol as being at this point in the section. */
3636 h->root.u.def.section = s;
3637 h->root.u.def.value = s->size;
3638
3639 /* Increment the section size to make room for the symbol. */
3640 s->size += h->size;
3641
3642 return TRUE;
3643}
3644
3645/* Allocate space in .plt, .got and associated reloc sections for
3646 dynamic relocs. */
3647
3648static bfd_boolean
3649allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf)
3650{
3651 struct bfd_link_info *info;
3652 struct elf_nds32_link_hash_table *htab;
3653 struct elf_nds32_link_hash_entry *eh;
3bf083ed 3654 struct elf_dyn_relocs *p;
35c08157
KLC
3655
3656 if (h->root.type == bfd_link_hash_indirect)
3657 return TRUE;
3658
3659 if (h->root.type == bfd_link_hash_warning)
3660 /* When warning symbols are created, they **replace** the "real"
3661 entry in the hash table, thus we never get to see the real
3662 symbol in a hash traversal. So look at it now. */
3663 h = (struct elf_link_hash_entry *) h->root.u.i.link;
3664
3665 info = (struct bfd_link_info *) inf;
3666 htab = nds32_elf_hash_table (info);
3667
3668 eh = (struct elf_nds32_link_hash_entry *) h;
3669
3670 if (htab->root.dynamic_sections_created && h->plt.refcount > 0)
3671 {
3672 /* Make sure this symbol is output as a dynamic symbol.
3673 Undefined weak syms won't yet be marked as dynamic. */
3674 if (h->dynindx == -1 && !h->forced_local)
3675 {
3676 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3677 return FALSE;
3678 }
3679
0e1862bb 3680 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, bfd_link_pic (info), h))
35c08157 3681 {
ce558b89 3682 asection *s = htab->root.splt;
35c08157
KLC
3683
3684 /* If this is the first .plt entry, make room for the special
3685 first entry. */
3686 if (s->size == 0)
3687 s->size += PLT_ENTRY_SIZE;
3688
3689 h->plt.offset = s->size;
3690
3691 /* If this symbol is not defined in a regular file, and we are
3692 not generating a shared library, then set the symbol to this
3693 location in the .plt. This is required to make function
3694 pointers compare as equal between the normal executable and
3695 the shared library. */
0e1862bb 3696 if (!bfd_link_pic (info) && !h->def_regular)
35c08157
KLC
3697 {
3698 h->root.u.def.section = s;
3699 h->root.u.def.value = h->plt.offset;
3700 }
3701
3702 /* Make room for this entry. */
3703 s->size += PLT_ENTRY_SIZE;
3704
3705 /* We also need to make an entry in the .got.plt section, which
3706 will be placed in the .got section by the linker script. */
ce558b89 3707 htab->root.sgotplt->size += 4;
35c08157
KLC
3708
3709 /* We also need to make an entry in the .rel.plt section. */
ce558b89 3710 htab->root.srelplt->size += sizeof (Elf32_External_Rela);
35c08157
KLC
3711 }
3712 else
3713 {
3714 h->plt.offset = (bfd_vma) - 1;
3715 h->needs_plt = 0;
3716 }
3717 }
3718 else
3719 {
3720 h->plt.offset = (bfd_vma) - 1;
3721 h->needs_plt = 0;
3722 }
3723
3724 if (h->got.refcount > 0)
3725 {
3726 asection *s;
3727 bfd_boolean dyn;
1c8f6a4d 3728 int tls_type = elf32_nds32_hash_entry (h)->tls_type;
35c08157
KLC
3729
3730 /* Make sure this symbol is output as a dynamic symbol.
3731 Undefined weak syms won't yet be marked as dynamic. */
3732 if (h->dynindx == -1 && !h->forced_local)
3733 {
3734 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3735 return FALSE;
3736 }
3737
ce558b89 3738 s = htab->root.sgot;
35c08157 3739 h->got.offset = s->size;
1c8f6a4d
KLC
3740
3741 if (tls_type == GOT_UNKNOWN)
3742 abort ();
3743 else if (tls_type == GOT_NORMAL
3744 || tls_type == GOT_TLS_IE)
3745 /* Need a GOT slot. */
3746 s->size += 4;
3747
35c08157 3748 dyn = htab->root.dynamic_sections_created;
0e1862bb 3749 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h))
ce558b89 3750 htab->root.srelgot->size += sizeof (Elf32_External_Rela);
35c08157
KLC
3751 }
3752 else
3753 h->got.offset = (bfd_vma) - 1;
3754
3755 if (eh->dyn_relocs == NULL)
3756 return TRUE;
3757
3758 /* In the shared -Bsymbolic case, discard space allocated for
3759 dynamic pc-relative relocs against symbols which turn out to be
3760 defined in regular objects. For the normal shared case, discard
3761 space for pc-relative relocs that have become local due to symbol
3762 visibility changes. */
3763
0e1862bb 3764 if (bfd_link_pic (info))
35c08157
KLC
3765 {
3766 if (h->def_regular && (h->forced_local || info->symbolic))
3767 {
3bf083ed 3768 struct elf_dyn_relocs **pp;
35c08157
KLC
3769
3770 for (pp = &eh->dyn_relocs; (p = *pp) != NULL;)
3771 {
3772 p->count -= p->pc_count;
3773 p->pc_count = 0;
3774 if (p->count == 0)
3775 *pp = p->next;
3776 else
3777 pp = &p->next;
3778 }
3779 }
3780 }
3781 else
3782 {
3783 /* For the non-shared case, discard space for relocs against
3784 symbols which turn out to need copy relocs or are not dynamic. */
3785
3786 if (!h->non_got_ref
3787 && ((h->def_dynamic
3788 && !h->def_regular)
3789 || (htab->root.dynamic_sections_created
3790 && (h->root.type == bfd_link_hash_undefweak
3791 || h->root.type == bfd_link_hash_undefined))))
3792 {
3793 /* Make sure this symbol is output as a dynamic symbol.
3794 Undefined weak syms won't yet be marked as dynamic. */
3795 if (h->dynindx == -1 && !h->forced_local)
3796 {
3797 if (!bfd_elf_link_record_dynamic_symbol (info, h))
3798 return FALSE;
3799 }
3800
3801 /* If that succeeded, we know we'll be keeping all the
3802 relocs. */
3803 if (h->dynindx != -1)
3804 goto keep;
3805 }
3806
3807 eh->dyn_relocs = NULL;
3808
3809 keep:;
3810 }
3811
3812 /* Finally, allocate space. */
3813 for (p = eh->dyn_relocs; p != NULL; p = p->next)
3814 {
3815 asection *sreloc = elf_section_data (p->sec)->sreloc;
3816 sreloc->size += p->count * sizeof (Elf32_External_Rela);
3817 }
3818
3819 return TRUE;
3820}
3821
63c1f59d
AM
3822/* Set DF_TEXTREL if we find any dynamic relocs that apply to
3823 read-only sections. */
35c08157
KLC
3824
3825static bfd_boolean
63c1f59d 3826maybe_set_textrel (struct elf_link_hash_entry *h, void *info_p)
35c08157 3827{
63c1f59d 3828 asection *sec;
35c08157 3829
63c1f59d
AM
3830 if (h->root.type == bfd_link_hash_indirect)
3831 return TRUE;
35c08157 3832
63c1f59d
AM
3833 sec = readonly_dynrelocs (h);
3834 if (sec != NULL)
35c08157 3835 {
63c1f59d 3836 struct bfd_link_info *info = (struct bfd_link_info *) info_p;
35c08157 3837
63c1f59d
AM
3838 info->flags |= DF_TEXTREL;
3839 info->callbacks->minfo
c1c8c1ef 3840 (_("%pB: dynamic relocation against `%pT' in read-only section `%pA'\n"),
63c1f59d 3841 sec->owner, h->root.root.string, sec);
35c08157 3842
63c1f59d
AM
3843 /* Not an error, just cut short the traversal. */
3844 return FALSE;
35c08157
KLC
3845 }
3846 return TRUE;
3847}
3848
3849/* Set the sizes of the dynamic sections. */
3850
3851static bfd_boolean
3852nds32_elf_size_dynamic_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
3853 struct bfd_link_info *info)
3854{
3855 struct elf_nds32_link_hash_table *htab;
3856 bfd *dynobj;
3857 asection *s;
3858 bfd_boolean relocs;
3859 bfd *ibfd;
3860
3861 htab = nds32_elf_hash_table (info);
3862 dynobj = htab->root.dynobj;
3863 BFD_ASSERT (dynobj != NULL);
3864
3865 if (htab->root.dynamic_sections_created)
3866 {
3867 /* Set the contents of the .interp section to the interpreter. */
f5233a16 3868 if (bfd_link_executable (info) && !info->nointerp)
35c08157
KLC
3869 {
3870 s = bfd_get_section_by_name (dynobj, ".interp");
3871 BFD_ASSERT (s != NULL);
3872 s->size = sizeof ELF_DYNAMIC_INTERPRETER;
3873 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER;
3874 }
3875 }
3876
3877 /* Set up .got offsets for local syms, and space for local dynamic
3878 relocs. */
c72f2fb2 3879 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link.next)
35c08157
KLC
3880 {
3881 bfd_signed_vma *local_got;
3882 bfd_signed_vma *end_local_got;
3883 bfd_size_type locsymcount;
3884 Elf_Internal_Shdr *symtab_hdr;
3885 asection *srel;
3886
3887 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour)
3888 continue;
3889
3890 for (s = ibfd->sections; s != NULL; s = s->next)
3891 {
3bf083ed 3892 struct elf_dyn_relocs *p;
35c08157 3893
3bf083ed 3894 for (p = ((struct elf_dyn_relocs *)
35c08157
KLC
3895 elf_section_data (s)->local_dynrel);
3896 p != NULL; p = p->next)
3897 {
3898 if (!bfd_is_abs_section (p->sec)
3899 && bfd_is_abs_section (p->sec->output_section))
3900 {
3901 /* Input section has been discarded, either because
3902 it is a copy of a linkonce section or due to
3903 linker script /DISCARD/, so we'll be discarding
3904 the relocs too. */
3905 }
3906 else if (p->count != 0)
3907 {
3908 srel = elf_section_data (p->sec)->sreloc;
3909 srel->size += p->count * sizeof (Elf32_External_Rela);
3910 if ((p->sec->output_section->flags & SEC_READONLY) != 0)
3911 info->flags |= DF_TEXTREL;
3912 }
3913 }
3914 }
3915
3916 local_got = elf_local_got_refcounts (ibfd);
3917 if (!local_got)
3918 continue;
3919
3920 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
3921 locsymcount = symtab_hdr->sh_info;
3922 end_local_got = local_got + locsymcount;
ce558b89
AM
3923 s = htab->root.sgot;
3924 srel = htab->root.srelgot;
35c08157
KLC
3925 for (; local_got < end_local_got; ++local_got)
3926 {
3927 if (*local_got > 0)
3928 {
3929 *local_got = s->size;
3930 s->size += 4;
0e1862bb 3931 if (bfd_link_pic (info))
35c08157
KLC
3932 srel->size += sizeof (Elf32_External_Rela);
3933 }
3934 else
3935 *local_got = (bfd_vma) - 1;
3936 }
3937 }
3938
3939 /* Allocate global sym .plt and .got entries, and space for global
3940 sym dynamic relocs. */
3941 elf_link_hash_traverse (&htab->root, allocate_dynrelocs, (void *) info);
3942
3943 /* We now have determined the sizes of the various dynamic sections.
3944 Allocate memory for them. */
3945 relocs = FALSE;
3946 for (s = dynobj->sections; s != NULL; s = s->next)
3947 {
3948 if ((s->flags & SEC_LINKER_CREATED) == 0)
3949 continue;
3950
ce558b89 3951 if (s == htab->root.splt)
35c08157
KLC
3952 {
3953 /* Strip this section if we don't need it; see the
3954 comment below. */
3955 }
ce558b89 3956 else if (s == htab->root.sgot)
35c08157
KLC
3957 {
3958 got_size += s->size;
3959 }
ce558b89 3960 else if (s == htab->root.sgotplt)
35c08157
KLC
3961 {
3962 got_size += s->size;
3963 }
3964 else if (strncmp (bfd_get_section_name (dynobj, s), ".rela", 5) == 0)
3965 {
ce558b89 3966 if (s->size != 0 && s != htab->root.srelplt)
35c08157
KLC
3967 relocs = TRUE;
3968
3969 /* We use the reloc_count field as a counter if we need
3970 to copy relocs into the output file. */
3971 s->reloc_count = 0;
3972 }
3973 else
3974 {
3975 /* It's not one of our sections, so don't allocate space. */
3976 continue;
3977 }
3978
3979 if (s->size == 0)
3980 {
3981 /* If we don't need this section, strip it from the
3982 output file. This is mostly to handle .rela.bss and
3983 .rela.plt. We must create both sections in
3984 create_dynamic_sections, because they must be created
3985 before the linker maps input sections to output
3986 sections. The linker does that before
3987 adjust_dynamic_symbol is called, and it is that
3988 function which decides whether anything needs to go
3989 into these sections. */
3990 s->flags |= SEC_EXCLUDE;
3991 continue;
3992 }
3993
3994 /* Allocate memory for the section contents. We use bfd_zalloc
3995 here in case unused entries are not reclaimed before the
3996 section's contents are written out. This should not happen,
3997 but this way if it does, we get a R_NDS32_NONE reloc instead
3998 of garbage. */
3999 s->contents = (bfd_byte *) bfd_zalloc (dynobj, s->size);
4000 if (s->contents == NULL)
4001 return FALSE;
4002 }
4003
4004
4005 if (htab->root.dynamic_sections_created)
4006 {
4007 /* Add some entries to the .dynamic section. We fill in the
4008 values later, in nds32_elf_finish_dynamic_sections, but we
4009 must add the entries now so that we get the correct size for
4010 the .dynamic section. The DT_DEBUG entry is filled in by the
4011 dynamic linker and used by the debugger. */
4012#define add_dynamic_entry(TAG, VAL) \
4013 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
4014
0e1862bb 4015 if (!bfd_link_pic (info))
35c08157
KLC
4016 {
4017 if (!add_dynamic_entry (DT_DEBUG, 0))
4018 return FALSE;
4019 }
4020
ce558b89 4021 if (htab->root.splt->size != 0)
35c08157
KLC
4022 {
4023 if (!add_dynamic_entry (DT_PLTGOT, 0)
4024 || !add_dynamic_entry (DT_PLTRELSZ, 0)
4025 || !add_dynamic_entry (DT_PLTREL, DT_RELA)
4026 || !add_dynamic_entry (DT_JMPREL, 0))
4027 return FALSE;
4028 }
4029
4030 if (relocs)
4031 {
4032 if (!add_dynamic_entry (DT_RELA, 0)
4033 || !add_dynamic_entry (DT_RELASZ, 0)
4034 || !add_dynamic_entry (DT_RELAENT, sizeof (Elf32_External_Rela)))
4035 return FALSE;
4036
4037 /* If any dynamic relocs apply to a read-only section,
4038 then we need a DT_TEXTREL entry. */
4039 if ((info->flags & DF_TEXTREL) == 0)
63c1f59d 4040 elf_link_hash_traverse (&htab->root, maybe_set_textrel,
35c08157
KLC
4041 (void *) info);
4042
4043 if ((info->flags & DF_TEXTREL) != 0)
4044 {
4045 if (!add_dynamic_entry (DT_TEXTREL, 0))
4046 return FALSE;
4047 }
4048 }
4049 }
4050#undef add_dynamic_entry
4051
4052 return TRUE;
4053}
4054
4055static bfd_reloc_status_type
4056nds32_relocate_contents (reloc_howto_type *howto, bfd *input_bfd,
4057 bfd_vma relocation, bfd_byte *location)
4058{
4059 int size;
4060 bfd_vma x = 0;
4061 bfd_reloc_status_type flag;
4062 unsigned int rightshift = howto->rightshift;
4063 unsigned int bitpos = howto->bitpos;
4064
4065 /* If the size is negative, negate RELOCATION. This isn't very
4066 general. */
4067 if (howto->size < 0)
4068 relocation = -relocation;
4069
4070 /* Get the value we are going to relocate. */
4071 size = bfd_get_reloc_size (howto);
4072 switch (size)
4073 {
4074 default:
35c08157
KLC
4075 abort ();
4076 break;
6346d5ca
AM
4077 case 0:
4078 return bfd_reloc_ok;
35c08157
KLC
4079 case 2:
4080 x = bfd_getb16 (location);
4081 break;
4082 case 4:
4083 x = bfd_getb32 (location);
4084 break;
4085 }
4086
4087 /* Check for overflow. FIXME: We may drop bits during the addition
4088 which we don't check for. We must either check at every single
4089 operation, which would be tedious, or we must do the computations
4090 in a type larger than bfd_vma, which would be inefficient. */
4091 flag = bfd_reloc_ok;
4092 if (howto->complain_on_overflow != complain_overflow_dont)
4093 {
4094 bfd_vma addrmask, fieldmask, signmask, ss;
4095 bfd_vma a, b, sum;
4096
4097 /* Get the values to be added together. For signed and unsigned
4098 relocations, we assume that all values should be truncated to
4099 the size of an address. For bitfields, all the bits matter.
4100 See also bfd_check_overflow. */
4101 fieldmask = N_ONES (howto->bitsize);
4102 signmask = ~fieldmask;
4103 addrmask = N_ONES (bfd_arch_bits_per_address (input_bfd)) | fieldmask;
4104 a = (relocation & addrmask) >> rightshift;
4105 b = (x & howto->src_mask & addrmask) >> bitpos;
4106
4107 switch (howto->complain_on_overflow)
4108 {
4109 case complain_overflow_signed:
4110 /* If any sign bits are set, all sign bits must be set.
4111 That is, A must be a valid negative address after
4112 shifting. */
4113 signmask = ~(fieldmask >> 1);
4114 /* Fall through. */
4115
4116 case complain_overflow_bitfield:
4117 /* Much like the signed check, but for a field one bit
4118 wider. We allow a bitfield to represent numbers in the
4119 range -2**n to 2**n-1, where n is the number of bits in the
4120 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
4121 can't overflow, which is exactly what we want. */
4122 ss = a & signmask;
4123 if (ss != 0 && ss != ((addrmask >> rightshift) & signmask))
4124 flag = bfd_reloc_overflow;
4125
4126 /* We only need this next bit of code if the sign bit of B
4127 is below the sign bit of A. This would only happen if
4128 SRC_MASK had fewer bits than BITSIZE. Note that if
4129 SRC_MASK has more bits than BITSIZE, we can get into
4130 trouble; we would need to verify that B is in range, as
4131 we do for A above. */
4132 ss = ((~howto->src_mask) >> 1) & howto->src_mask;
4133 ss >>= bitpos;
4134
4135 /* Set all the bits above the sign bit. */
4136 b = (b ^ ss) - ss;
4137
4138 /* Now we can do the addition. */
4139 sum = a + b;
4140
4141 /* See if the result has the correct sign. Bits above the
4142 sign bit are junk now; ignore them. If the sum is
4143 positive, make sure we did not have all negative inputs;
4144 if the sum is negative, make sure we did not have all
4145 positive inputs. The test below looks only at the sign
4146 bits, and it really just
4147 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
4148
4149 We mask with addrmask here to explicitly allow an address
4150 wrap-around. The Linux kernel relies on it, and it is
4151 the only way to write assembler code which can run when
4152 loaded at a location 0x80000000 away from the location at
4153 which it is linked. */
4154 if (((~(a ^ b)) & (a ^ sum)) & signmask & addrmask)
4155 flag = bfd_reloc_overflow;
4156
4157 break;
4158
4159 case complain_overflow_unsigned:
4160 /* Checking for an unsigned overflow is relatively easy:
4161 trim the addresses and add, and trim the result as well.
4162 Overflow is normally indicated when the result does not
4163 fit in the field. However, we also need to consider the
4164 case when, e.g., fieldmask is 0x7fffffff or smaller, an
4165 input is 0x80000000, and bfd_vma is only 32 bits; then we
4166 will get sum == 0, but there is an overflow, since the
4167 inputs did not fit in the field. Instead of doing a
4168 separate test, we can check for this by or-ing in the
4169 operands when testing for the sum overflowing its final
4170 field. */
4171 sum = (a + b) & addrmask;
4172 if ((a | b | sum) & signmask)
4173 flag = bfd_reloc_overflow;
4174 break;
4175
4176 default:
4177 abort ();
4178 }
4179 }
4180
4181 /* Put RELOCATION in the right bits. */
4182 relocation >>= (bfd_vma) rightshift;
4183 relocation <<= (bfd_vma) bitpos;
4184
4185 /* Add RELOCATION to the right bits of X. */
4186 /* FIXME : 090616
4187 Because the relaxation may generate duplicate relocation at one address,
4188 an addition to immediate in the instruction may cause the relocation added
4189 several times.
4190 This bug should be fixed in assembler, but a check is also needed here. */
4191 if (howto->partial_inplace)
4192 x = ((x & ~howto->dst_mask)
4193 | (((x & howto->src_mask) + relocation) & howto->dst_mask));
4194 else
4195 x = ((x & ~howto->dst_mask) | ((relocation) & howto->dst_mask));
4196
4197
4198 /* Put the relocated value back in the object file. */
4199 switch (size)
4200 {
4201 default:
4202 case 0:
4203 case 1:
4204 case 8:
4205 abort ();
4206 break;
4207 case 2:
4208 bfd_putb16 (x, location);
4209 break;
4210 case 4:
4211 bfd_putb32 (x, location);
4212 break;
4213 }
4214
4215 return flag;
4216}
4217
4218static bfd_reloc_status_type
4219nds32_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
4220 asection *input_section, bfd_byte *contents,
4221 bfd_vma address, bfd_vma value, bfd_vma addend)
4222{
4223 bfd_vma relocation;
4224
4225 /* Sanity check the address. */
4226 if (address > bfd_get_section_limit (input_bfd, input_section))
4227 return bfd_reloc_outofrange;
4228
4229 /* This function assumes that we are dealing with a basic relocation
4230 against a symbol. We want to compute the value of the symbol to
4231 relocate to. This is just VALUE, the value of the symbol, plus
4232 ADDEND, any addend associated with the reloc. */
4233 relocation = value + addend;
4234
4235 /* If the relocation is PC relative, we want to set RELOCATION to
4236 the distance between the symbol (currently in RELOCATION) and the
c2bf1eec 4237 location we are relocating. If pcrel_offset is FALSE we do not
35c08157
KLC
4238 need to subtract out the offset of the location within the
4239 section (which is just ADDRESS). */
4240 if (howto->pc_relative)
4241 {
4242 relocation -= (input_section->output_section->vma
4243 + input_section->output_offset);
4244 if (howto->pcrel_offset)
4245 relocation -= address;
4246 }
4247
4248 return nds32_relocate_contents (howto, input_bfd, relocation,
4249 contents + address);
4250}
4251
4252static bfd_boolean
4253nds32_elf_output_symbol_hook (struct bfd_link_info *info,
4254 const char *name,
4255 Elf_Internal_Sym *elfsym ATTRIBUTE_UNUSED,
4256 asection *input_sec,
4257 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED)
4258{
4259 const char *source;
4260 FILE *sym_ld_script = NULL;
4261 struct elf_nds32_link_hash_table *table;
4262
4263 table = nds32_elf_hash_table (info);
4264 sym_ld_script = table->sym_ld_script;
4265 if (!sym_ld_script)
4266 return TRUE;
4267
4268 if (!h || !name || *name == '\0')
4269 return TRUE;
4270
4271 if (input_sec->flags & SEC_EXCLUDE)
4272 return TRUE;
4273
4274 if (!check_start_export_sym)
4275 {
4276 fprintf (sym_ld_script, "SECTIONS\n{\n");
4277 check_start_export_sym = 1;
4278 }
4279
4280 if (h->root.type == bfd_link_hash_defined
4281 || h->root.type == bfd_link_hash_defweak)
4282 {
4283 if (!h->root.u.def.section->output_section)
4284 return TRUE;
4285
4286 if (bfd_is_const_section (input_sec))
4287 source = input_sec->name;
4288 else
4289 source = input_sec->owner->filename;
4290
4291 fprintf (sym_ld_script, "\t%s = 0x%08lx;\t /* %s */\n",
4292 h->root.root.string,
4293 (long) (h->root.u.def.value
4294 + h->root.u.def.section->output_section->vma
4295 + h->root.u.def.section->output_offset), source);
4296 }
4297
4298 return TRUE;
4299}
4300
4301/* Relocate an NDS32/D ELF section.
4302 There is some attempt to make this function usable for many architectures,
4303 both for RELA and REL type relocs, if only to serve as a learning tool.
4304
4305 The RELOCATE_SECTION function is called by the new ELF backend linker
4306 to handle the relocations for a section.
4307
4308 The relocs are always passed as Rela structures; if the section
4309 actually uses Rel structures, the r_addend field will always be
4310 zero.
4311
4312 This function is responsible for adjust the section contents as
4313 necessary, and (if using Rela relocs and generating a
4314 relocatable output file) adjusting the reloc addend as
4315 necessary.
4316
4317 This function does not have to worry about setting the reloc
4318 address or the reloc symbol index.
4319
4320 LOCAL_SYMS is a pointer to the swapped in local symbols.
4321
4322 LOCAL_SECTIONS is an array giving the section in the input file
4323 corresponding to the st_shndx field of each local symbol.
4324
4325 The global hash table entry for the global symbols can be found
4326 via elf_sym_hashes (input_bfd).
4327
4328 When generating relocatable output, this function must handle
4329 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
4330 going to be the section symbol corresponding to the output
4331 section, which means that the addend must be adjusted
4332 accordingly. */
4333
1c8f6a4d
KLC
4334static bfd_vma
4335dtpoff_base (struct bfd_link_info *info)
4336{
4337 /* If tls_sec is NULL, we should have signalled an error already. */
4338 if (elf_hash_table (info)->tls_sec == NULL)
4339 return 0;
4340 return elf_hash_table (info)->tls_sec->vma;
4341}
4342
35c08157 4343static bfd_boolean
07d6d2b8 4344nds32_elf_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
35c08157 4345 struct bfd_link_info * info,
07d6d2b8
AM
4346 bfd * input_bfd,
4347 asection * input_section,
4348 bfd_byte * contents,
4349 Elf_Internal_Rela * relocs,
4350 Elf_Internal_Sym * local_syms,
4351 asection ** local_sections)
35c08157
KLC
4352{
4353 Elf_Internal_Shdr *symtab_hdr;
4354 struct elf_link_hash_entry **sym_hashes;
4355 Elf_Internal_Rela *rel, *relend;
4356 bfd_boolean ret = TRUE; /* Assume success. */
4357 int align = 0;
4358 bfd_reloc_status_type r;
4359 const char *errmsg = NULL;
4360 bfd_vma gp;
4361 struct elf_nds32_link_hash_table *htab;
4362 bfd *dynobj;
4363 bfd_vma *local_got_offsets;
4364 asection *sgot, *splt, *sreloc;
4365 bfd_vma high_address;
4366 struct elf_nds32_link_hash_table *table;
4367 int eliminate_gc_relocs;
4368 bfd_vma fpbase_addr;
4369
4370 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
4371 sym_hashes = elf_sym_hashes (input_bfd);
4372 htab = nds32_elf_hash_table (info);
4373 high_address = bfd_get_section_limit (input_bfd, input_section);
4374
4375 dynobj = htab->root.dynobj;
4376 local_got_offsets = elf_local_got_offsets (input_bfd);
4377
ce558b89
AM
4378 sgot = htab->root.sgot;
4379 splt = htab->root.splt;
35c08157
KLC
4380 sreloc = NULL;
4381
4382 rel = relocs;
4383 relend = relocs + input_section->reloc_count;
4384
4385 table = nds32_elf_hash_table (info);
4386 eliminate_gc_relocs = table->eliminate_gc_relocs;
4387 /* By this time, we can adjust the value of _SDA_BASE_. */
0e1862bb 4388 if ((!bfd_link_relocatable (info)))
35c08157
KLC
4389 {
4390 is_SDA_BASE_set = 1;
4391 r = nds32_elf_final_sda_base (output_bfd, info, &gp, TRUE);
4392 if (r != bfd_reloc_ok)
4393 return FALSE;
4394 }
4395
4396 /* Use gp as fp to prevent truncated fit. Because in relaxation time
4397 the fp value is set as gp, and it has be reverted for instruction
4398 setting fp. */
4399 fpbase_addr = elf_gp (output_bfd);
4400
4401 for (rel = relocs; rel < relend; rel++)
4402 {
4403 enum elf_nds32_reloc_type r_type;
4404 reloc_howto_type *howto = NULL;
4405 unsigned long r_symndx;
4406 struct elf_link_hash_entry *h = NULL;
4407 Elf_Internal_Sym *sym = NULL;
4408 asection *sec;
4409 bfd_vma relocation;
4410
4411 /* We can't modify r_addend here as elf_link_input_bfd has an assert to
4412 ensure it's zero (we use REL relocs, not RELA). Therefore this
4413 should be assigning zero to `addend', but for clarity we use
4414 `r_addend'. */
4415
4416 bfd_vma addend = rel->r_addend;
4417 bfd_vma offset = rel->r_offset;
4418
4419 r_type = ELF32_R_TYPE (rel->r_info);
4420 if (r_type >= R_NDS32_max)
4421 {
695344c0 4422 /* xgettext:c-format */
0aa13fee 4423 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
4eca0228 4424 input_bfd, r_type);
35c08157
KLC
4425 bfd_set_error (bfd_error_bad_value);
4426 ret = FALSE;
4427 continue;
4428 }
4429
4430 if (r_type == R_NDS32_GNU_VTENTRY
4431 || r_type == R_NDS32_GNU_VTINHERIT
4432 || r_type == R_NDS32_NONE
4433 || r_type == R_NDS32_RELA_GNU_VTENTRY
4434 || r_type == R_NDS32_RELA_GNU_VTINHERIT
4435 || (r_type >= R_NDS32_INSN16 && r_type <= R_NDS32_25_FIXED_RELA)
4436 || r_type == R_NDS32_DATA
1c8f6a4d 4437 || r_type == R_NDS32_TRAN
0c4bd9d9 4438 || (r_type >= R_NDS32_LONGCALL4 && r_type <= R_NDS32_LONGJUMP7))
35c08157
KLC
4439 continue;
4440
0c4bd9d9
KLC
4441 /* If we enter the fp-as-gp region. Resolve the address
4442 of best fp-base. */
35c08157
KLC
4443 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_BEGIN
4444 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4445 {
4446 int dist;
4447
4448 /* Distance to relocation of best fp-base is encoded in R_SYM. */
4449 dist = rel->r_addend >> 16;
4450 fpbase_addr = calculate_memory_address (input_bfd, rel + dist,
4451 local_syms, symtab_hdr);
4452 }
4453 else if (ELF32_R_TYPE (rel->r_info) == R_NDS32_RELAX_REGION_END
4454 && (rel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
4455 {
4456 fpbase_addr = elf_gp (output_bfd);
4457 }
4458
4459 if (((r_type >= R_NDS32_DWARF2_OP1_RELA
4460 && r_type <= R_NDS32_DWARF2_LEB_RELA)
0e1862bb 4461 || r_type >= R_NDS32_RELAX_ENTRY) && !bfd_link_relocatable (info))
35c08157
KLC
4462 continue;
4463
4464 howto = bfd_elf32_bfd_reloc_type_table_lookup (r_type);
4465 r_symndx = ELF32_R_SYM (rel->r_info);
4466
4467 /* This is a final link. */
4468 sym = NULL;
4469 sec = NULL;
4470 h = NULL;
4471
4472 if (r_symndx < symtab_hdr->sh_info)
4473 {
4474 /* Local symbol. */
4475 sym = local_syms + r_symndx;
4476 sec = local_sections[r_symndx];
4477
4478 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
4479 addend = rel->r_addend;
4480 }
4481 else
4482 {
4483 /* External symbol. */
4484 bfd_boolean warned, ignored, unresolved_reloc;
4485 int symndx = r_symndx - symtab_hdr->sh_info;
4486
4487 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
4488 r_symndx, symtab_hdr, sym_hashes, h, sec,
4489 relocation, unresolved_reloc, warned,
4490 ignored);
4491
4492 /* la $fp, _FP_BASE_ is per-function (region).
4493 Handle it specially. */
4494 switch ((int) r_type)
4495 {
4496 case R_NDS32_SDA19S0_RELA:
4497 case R_NDS32_SDA15S0_RELA:
4498 case R_NDS32_20_RELA:
4499 if (strcmp (elf_sym_hashes (input_bfd)[symndx]->root.root.string,
4500 FP_BASE_NAME) == 0)
4501 {
4502 relocation = fpbase_addr;
4503 break;
4504 }
4505 }
4506
4507 }
4508
0e1862bb 4509 if (bfd_link_relocatable (info))
35c08157
KLC
4510 {
4511 /* This is a relocatable link. We don't have to change
4512 anything, unless the reloc is against a section symbol,
4513 in which case we have to adjust according to where the
4514 section symbol winds up in the output section. */
4515 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
4516 rel->r_addend += sec->output_offset + sym->st_value;
4517
4518 continue;
4519 }
4520
4521 /* Sanity check the address. */
4522 if (offset > high_address)
4523 {
4524 r = bfd_reloc_outofrange;
4525 goto check_reloc;
4526 }
4527
4528 if ((r_type >= R_NDS32_DWARF2_OP1_RELA
4529 && r_type <= R_NDS32_DWARF2_LEB_RELA)
4530 || r_type >= R_NDS32_RELAX_ENTRY)
4531 continue;
4532
4533 switch ((int) r_type)
4534 {
4535 case R_NDS32_GOTOFF:
4536 /* Relocation is relative to the start of the global offset
4537 table (for ld24 rx, #uimm24), e.g. access at label+addend
4538
4539 ld24 rx. #label@GOTOFF + addend
4540 sub rx, r12. */
4541 case R_NDS32_GOTOFF_HI20:
4542 case R_NDS32_GOTOFF_LO12:
4543 case R_NDS32_GOTOFF_LO15:
4544 case R_NDS32_GOTOFF_LO19:
4545 BFD_ASSERT (sgot != NULL);
4546
4547 relocation -= elf_gp (output_bfd);
4548 break;
4549
4550 case R_NDS32_9_PLTREL:
4551 case R_NDS32_25_PLTREL:
4552 /* Relocation is to the entry for this symbol in the
4553 procedure linkage table. */
4554
4555 /* The native assembler will generate a 25_PLTREL reloc
4556 for a local symbol if you assemble a call from one
4557 section to another when using -K pic. */
4558 if (h == NULL)
4559 break;
4560
4561 if (h->forced_local)
4562 break;
4563
4564 /* We didn't make a PLT entry for this symbol. This
4565 happens when statically linking PIC code, or when
4566 using -Bsymbolic. */
4567 if (h->plt.offset == (bfd_vma) - 1)
4568 break;
4569
4570 relocation = (splt->output_section->vma
4571 + splt->output_offset + h->plt.offset);
4572 break;
4573
4574 case R_NDS32_PLT_GOTREL_HI20:
4575 case R_NDS32_PLT_GOTREL_LO12:
4576 case R_NDS32_PLT_GOTREL_LO15:
4577 case R_NDS32_PLT_GOTREL_LO19:
4578 case R_NDS32_PLT_GOTREL_LO20:
4579 if (h == NULL || h->forced_local || h->plt.offset == (bfd_vma) - 1)
4580 {
4581 /* We didn't make a PLT entry for this symbol. This
4582 happens when statically linking PIC code, or when
4583 using -Bsymbolic. */
4584 relocation -= elf_gp (output_bfd);
4585 break;
4586 }
4587
4588 relocation = (splt->output_section->vma
4589 + splt->output_offset + h->plt.offset);
4590
4591 relocation -= elf_gp (output_bfd);
4592 break;
4593
4594 case R_NDS32_PLTREL_HI20:
4595 case R_NDS32_PLTREL_LO12:
4596
4597 /* Relocation is to the entry for this symbol in the
4598 procedure linkage table. */
4599
4600 /* The native assembler will generate a 25_PLTREL reloc
4601 for a local symbol if you assemble a call from one
4602 section to another when using -K pic. */
4603 if (h == NULL)
4604 break;
4605
4606 if (h->forced_local)
4607 break;
4608
4609 if (h->plt.offset == (bfd_vma) - 1)
4610 /* We didn't make a PLT entry for this symbol. This
4611 happens when statically linking PIC code, or when
4612 using -Bsymbolic. */
4613 break;
4614
4615 if (splt == NULL)
4616 break;
4617
4618 relocation = (splt->output_section->vma
4619 + splt->output_offset
4620 + h->plt.offset + 4)
4621 - (input_section->output_section->vma
4622 + input_section->output_offset
4623 + rel->r_offset);
4624
4625 break;
4626
4627 case R_NDS32_GOTPC20:
4628 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4629 ld24 rx,#_GLOBAL_OFFSET_TABLE_ */
4630 relocation = elf_gp (output_bfd);
4631 break;
4632
4633 case R_NDS32_GOTPC_HI20:
4634 case R_NDS32_GOTPC_LO12:
4635 {
4636 /* .got(_GLOBAL_OFFSET_TABLE_) - pc relocation
4637 bl .+4
4638 seth rx,#high(_GLOBAL_OFFSET_TABLE_)
4639 or3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4640 or
4641 bl .+4
4642 seth rx,#shigh(_GLOBAL_OFFSET_TABLE_)
4643 add3 rx,rx,#low(_GLOBAL_OFFSET_TABLE_ +4)
4644 */
4645 relocation = elf_gp (output_bfd);
4646 relocation -= (input_section->output_section->vma
4647 + input_section->output_offset + rel->r_offset);
4648 break;
4649 }
4650
4651 case R_NDS32_GOT20:
4652 /* Fall through. */
4653 case R_NDS32_GOT_HI20:
4654 case R_NDS32_GOT_LO12:
4655 case R_NDS32_GOT_LO15:
4656 case R_NDS32_GOT_LO19:
4657 /* Relocation is to the entry for this symbol in the global
4658 offset table. */
4659 BFD_ASSERT (sgot != NULL);
4660
4661 if (h != NULL)
4662 {
4663 bfd_boolean dyn;
4664 bfd_vma off;
4665
4666 off = h->got.offset;
4667 BFD_ASSERT (off != (bfd_vma) - 1);
4668 dyn = htab->root.dynamic_sections_created;
0e1862bb
L
4669 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn,
4670 bfd_link_pic (info),
4671 h)
4672 || (bfd_link_pic (info)
35c08157
KLC
4673 && (info->symbolic
4674 || h->dynindx == -1
4675 || h->forced_local) && h->def_regular))
4676 {
4677 /* This is actually a static link, or it is a
4678 -Bsymbolic link and the symbol is defined
4679 locally, or the symbol was forced to be local
4680 because of a version file. We must initialize
4681 this entry in the global offset table. Since the
4682 offset must always be a multiple of 4, we use the
4683 least significant bit to record whether we have
4684 initialized it already.
4685
4686 When doing a dynamic link, we create a .rela.got
4687 relocation entry to initialize the value. This
4688 is done in the finish_dynamic_symbol routine. */
4689 if ((off & 1) != 0)
4690 off &= ~1;
4691 else
4692 {
4693 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4694 h->got.offset |= 1;
4695 }
4696 }
4697 relocation = sgot->output_section->vma + sgot->output_offset + off
4698 - elf_gp (output_bfd);
4699 }
4700 else
4701 {
4702 bfd_vma off;
4703 bfd_byte *loc;
4704
4705 BFD_ASSERT (local_got_offsets != NULL
4706 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4707
4708 off = local_got_offsets[r_symndx];
4709
4710 /* The offset must always be a multiple of 4. We use
4711 the least significant bit to record whether we have
4712 already processed this entry. */
4713 if ((off & 1) != 0)
4714 off &= ~1;
4715 else
4716 {
4717 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4718
0e1862bb 4719 if (bfd_link_pic (info))
35c08157
KLC
4720 {
4721 asection *srelgot;
4722 Elf_Internal_Rela outrel;
4723
4724 /* We need to generate a R_NDS32_RELATIVE reloc
4725 for the dynamic linker. */
ce558b89 4726 srelgot = htab->root.srelgot;
35c08157
KLC
4727 BFD_ASSERT (srelgot != NULL);
4728
4729 outrel.r_offset = (elf_gp (output_bfd)
4730 + sgot->output_offset + off);
4731 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4732 outrel.r_addend = relocation;
4733 loc = srelgot->contents;
4734 loc +=
4735 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4736 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4737 ++srelgot->reloc_count;
4738 }
4739 local_got_offsets[r_symndx] |= 1;
4740 }
4741 relocation = sgot->output_section->vma + sgot->output_offset + off
4742 - elf_gp (output_bfd);
4743 }
4744
4745 break;
4746
4747 case R_NDS32_16_RELA:
4748 case R_NDS32_20_RELA:
4749 case R_NDS32_5_RELA:
4750 case R_NDS32_32_RELA:
4751 case R_NDS32_9_PCREL_RELA:
4752 case R_NDS32_WORD_9_PCREL_RELA:
4753 case R_NDS32_10_UPCREL_RELA:
4754 case R_NDS32_15_PCREL_RELA:
4755 case R_NDS32_17_PCREL_RELA:
4756 case R_NDS32_25_PCREL_RELA:
4757 case R_NDS32_HI20_RELA:
4758 case R_NDS32_LO12S3_RELA:
4759 case R_NDS32_LO12S2_RELA:
4760 case R_NDS32_LO12S2_DP_RELA:
4761 case R_NDS32_LO12S2_SP_RELA:
4762 case R_NDS32_LO12S1_RELA:
4763 case R_NDS32_LO12S0_RELA:
4764 case R_NDS32_LO12S0_ORI_RELA:
0e1862bb 4765 if (bfd_link_pic (info) && r_symndx != 0
35c08157
KLC
4766 && (input_section->flags & SEC_ALLOC) != 0
4767 && (eliminate_gc_relocs == 0
4768 || (sec && (sec->flags & SEC_EXCLUDE) == 0))
4769 && ((r_type != R_NDS32_9_PCREL_RELA
4770 && r_type != R_NDS32_WORD_9_PCREL_RELA
4771 && r_type != R_NDS32_10_UPCREL_RELA
4772 && r_type != R_NDS32_15_PCREL_RELA
4773 && r_type != R_NDS32_17_PCREL_RELA
4774 && r_type != R_NDS32_25_PCREL_RELA
4775 && !(r_type == R_NDS32_32_RELA
4776 && strcmp (input_section->name, ".eh_frame") == 0))
4777 || (h != NULL && h->dynindx != -1
4778 && (!info->symbolic || !h->def_regular))))
4779 {
4780 Elf_Internal_Rela outrel;
4781 bfd_boolean skip, relocate;
4782 bfd_byte *loc;
4783
4784 /* When generating a shared object, these relocations
4785 are copied into the output file to be resolved at run
4786 time. */
4787
4788 if (sreloc == NULL)
4789 {
4790 const char *name;
4791
4792 name = bfd_elf_string_from_elf_section
4793 (input_bfd, elf_elfheader (input_bfd)->e_shstrndx,
4794 elf_section_data (input_section)->rela.hdr->sh_name);
4795 if (name == NULL)
4796 return FALSE;
4797
4798 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
4799 && strcmp (bfd_get_section_name (input_bfd,
4800 input_section),
4801 name + 5) == 0);
4802
4803 sreloc = bfd_get_section_by_name (dynobj, name);
4804 BFD_ASSERT (sreloc != NULL);
4805 }
4806
4807 skip = FALSE;
4808 relocate = FALSE;
4809
4810 outrel.r_offset = _bfd_elf_section_offset (output_bfd,
4811 info,
4812 input_section,
4813 rel->r_offset);
4814 if (outrel.r_offset == (bfd_vma) - 1)
4815 skip = TRUE;
4816 else if (outrel.r_offset == (bfd_vma) - 2)
4817 skip = TRUE, relocate = TRUE;
4818 outrel.r_offset += (input_section->output_section->vma
4819 + input_section->output_offset);
4820
4821 if (skip)
4822 memset (&outrel, 0, sizeof outrel);
4823 else if (r_type == R_NDS32_17_PCREL_RELA
4824 || r_type == R_NDS32_15_PCREL_RELA
4825 || r_type == R_NDS32_25_PCREL_RELA)
4826 {
4827 BFD_ASSERT (h != NULL && h->dynindx != -1);
4828 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4829 outrel.r_addend = rel->r_addend;
4830 }
4831 else
4832 {
4833 /* h->dynindx may be -1 if this symbol was marked to
4834 become local. */
4835 if (h == NULL
4836 || ((info->symbolic || h->dynindx == -1)
4837 && h->def_regular))
4838 {
4839 relocate = TRUE;
4840 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4841 outrel.r_addend = relocation + rel->r_addend;
4842 }
4843 else
4844 {
4845 BFD_ASSERT (h->dynindx != -1);
4846 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type);
4847 outrel.r_addend = rel->r_addend;
4848 }
4849 }
4850
4851 loc = sreloc->contents;
4852 loc += sreloc->reloc_count * sizeof (Elf32_External_Rela);
4853 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4854 ++sreloc->reloc_count;
4855
4856 /* If this reloc is against an external symbol, we do
4857 not want to fiddle with the addend. Otherwise, we
4858 need to include the symbol value so that it becomes
4859 an addend for the dynamic reloc. */
4860 if (!relocate)
4861 continue;
4862 }
4863 break;
4864
4865 case R_NDS32_25_ABS_RELA:
0e1862bb 4866 if (bfd_link_pic (info))
35c08157 4867 {
4eca0228 4868 _bfd_error_handler
38f14ab8
AM
4869 (_("%pB: warning: %s unsupported in shared mode"),
4870 input_bfd, "R_NDS32_25_ABS_RELA");
35c08157
KLC
4871 return FALSE;
4872 }
4873 break;
4874
4875 case R_NDS32_9_PCREL:
4876 r = nds32_elf_do_9_pcrel_reloc (input_bfd, howto, input_section,
4877 contents, offset,
4878 sec, relocation, addend);
4879 goto check_reloc;
4880
4881 case R_NDS32_HI20:
4882 {
4883 Elf_Internal_Rela *lorel;
4884
4885 /* We allow an arbitrary number of HI20 relocs before the
4886 LO12 reloc. This permits gcc to emit the HI and LO relocs
4887 itself. */
4888 for (lorel = rel + 1;
4889 (lorel < relend
4890 && ELF32_R_TYPE (lorel->r_info) == R_NDS32_HI20); lorel++)
4891 continue;
4892 if (lorel < relend
4893 && (ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S3
4894 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S2
4895 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S1
4896 || ELF32_R_TYPE (lorel->r_info) == R_NDS32_LO12S0))
4897 {
4898 nds32_elf_relocate_hi20 (input_bfd, r_type, rel, lorel,
4899 contents, relocation + addend);
4900 r = bfd_reloc_ok;
4901 }
4902 else
4903 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
1c8f6a4d
KLC
4904 contents, offset, relocation,
4905 addend);
35c08157
KLC
4906 }
4907
4908 goto check_reloc;
4909
4910 case R_NDS32_GOT17S2_RELA:
4911 case R_NDS32_GOT15S2_RELA:
4912 {
4913 bfd_vma off;
4914
4915 BFD_ASSERT (sgot != NULL);
4916
4917 if (h != NULL)
4918 {
4919 bfd_boolean dyn;
4920
4921 off = h->got.offset;
4922 BFD_ASSERT (off != (bfd_vma) - 1);
4923
4924 dyn = htab->root.dynamic_sections_created;
4925 if (!WILL_CALL_FINISH_DYNAMIC_SYMBOL
0e1862bb
L
4926 (dyn, bfd_link_pic (info), h)
4927 || (bfd_link_pic (info)
4928 && (info->symbolic
4929 || h->dynindx == -1
4930 || h->forced_local)
4931 && h->def_regular))
35c08157
KLC
4932 {
4933 /* This is actually a static link, or it is a
4934 -Bsymbolic link and the symbol is defined
4935 locally, or the symbol was forced to be local
4936 because of a version file. We must initialize
4937 this entry in the global offset table. Since the
4938 offset must always be a multiple of 4, we use the
4939 least significant bit to record whether we have
4940 initialized it already.
4941
4942 When doing a dynamic link, we create a .rela.got
4943 relocation entry to initialize the value. This
4944 is done in the finish_dynamic_symbol routine. */
4945 if ((off & 1) != 0)
4946 off &= ~1;
4947 else
4948 {
4949 bfd_put_32 (output_bfd, relocation,
4950 sgot->contents + off);
4951 h->got.offset |= 1;
4952 }
4953 }
4954 }
4955 else
4956 {
4957 bfd_byte *loc;
4958
4959 BFD_ASSERT (local_got_offsets != NULL
4960 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
4961
4962 off = local_got_offsets[r_symndx];
4963
4964 /* The offset must always be a multiple of 4. We use
4965 the least significant bit to record whether we have
4966 already processed this entry. */
4967 if ((off & 1) != 0)
4968 off &= ~1;
4969 else
4970 {
4971 bfd_put_32 (output_bfd, relocation, sgot->contents + off);
4972
0e1862bb 4973 if (bfd_link_pic (info))
35c08157
KLC
4974 {
4975 asection *srelgot;
4976 Elf_Internal_Rela outrel;
4977
4978 /* We need to generate a R_NDS32_RELATIVE reloc
4979 for the dynamic linker. */
ce558b89 4980 srelgot = htab->root.srelgot;
35c08157
KLC
4981 BFD_ASSERT (srelgot != NULL);
4982
4983 outrel.r_offset = (elf_gp (output_bfd)
4984 + sgot->output_offset + off);
4985 outrel.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
4986 outrel.r_addend = relocation;
4987 loc = srelgot->contents;
4988 loc +=
4989 srelgot->reloc_count * sizeof (Elf32_External_Rela);
4990 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
4991 ++srelgot->reloc_count;
4992 }
4993 local_got_offsets[r_symndx] |= 1;
4994 }
4995 }
4996 relocation = sgot->output_section->vma + sgot->output_offset + off
4997 - elf_gp (output_bfd);
4998 }
4999 if (relocation & align)
5000 {
5001 /* Incorrect alignment. */
4eca0228 5002 _bfd_error_handler
38f14ab8 5003 (_("%pB: warning: unaligned access to GOT entry"), input_bfd);
35c08157
KLC
5004 ret = FALSE;
5005 r = bfd_reloc_dangerous;
5006 goto check_reloc;
5007 }
5008 break;
5009
5010 case R_NDS32_SDA16S3_RELA:
5011 case R_NDS32_SDA15S3_RELA:
5012 case R_NDS32_SDA15S3:
5013 align = 0x7;
5014 goto handle_sda;
5015
5016 case R_NDS32_SDA17S2_RELA:
5017 case R_NDS32_SDA15S2_RELA:
5018 case R_NDS32_SDA12S2_SP_RELA:
5019 case R_NDS32_SDA12S2_DP_RELA:
5020 case R_NDS32_SDA15S2:
5021 case R_NDS32_SDA_FP7U2_RELA:
5022 align = 0x3;
5023 goto handle_sda;
5024
5025 case R_NDS32_SDA18S1_RELA:
5026 case R_NDS32_SDA15S1_RELA:
5027 case R_NDS32_SDA15S1:
5028 align = 0x1;
5029 goto handle_sda;
5030
5031 case R_NDS32_SDA19S0_RELA:
5032 case R_NDS32_SDA15S0_RELA:
5033 case R_NDS32_SDA15S0:
5034 {
5035 align = 0x0;
5036handle_sda:
5037 BFD_ASSERT (sec != NULL);
5038
5039 /* If the symbol is in the abs section, the out_bfd will be null.
5040 This happens when the relocation has a symbol@GOTOFF. */
5041 r = nds32_elf_final_sda_base (output_bfd, info, &gp, FALSE);
5042 if (r != bfd_reloc_ok)
5043 {
4eca0228 5044 _bfd_error_handler
38f14ab8 5045 (_("%pB: warning: relocate SDA_BASE failed"), input_bfd);
35c08157
KLC
5046 ret = FALSE;
5047 goto check_reloc;
5048 }
5049
5050 /* At this point `relocation' contains the object's
5051 address. */
5052 if (r_type == R_NDS32_SDA_FP7U2_RELA)
5053 {
5054 relocation -= fpbase_addr;
5055 }
5056 else
5057 relocation -= gp;
5058 /* Now it contains the offset from _SDA_BASE_. */
5059
5060 /* Make sure alignment is correct. */
5061
5062 if (relocation & align)
5063 {
5064 /* Incorrect alignment. */
4eca0228 5065 _bfd_error_handler
695344c0 5066 /* xgettext:c-format */
38f14ab8
AM
5067 (_("%pB(%pA): warning: unaligned small data access"
5068 " of type %d"),
35c08157
KLC
5069 input_bfd, input_section, r_type);
5070 ret = FALSE;
5071 goto check_reloc;
5072 }
5073 }
5074
5075 break;
5076 case R_NDS32_17IFC_PCREL_RELA:
5077 case R_NDS32_10IFCU_PCREL_RELA:
5078 /* do nothing */
5079 break;
5080
1c8f6a4d
KLC
5081 case R_NDS32_TLS_LE_HI20:
5082 case R_NDS32_TLS_LE_LO12:
5083 case R_NDS32_TLS_LE_20:
5084 case R_NDS32_TLS_LE_15S0:
5085 case R_NDS32_TLS_LE_15S1:
5086 case R_NDS32_TLS_LE_15S2:
5087 if (elf_hash_table (info)->tls_sec != NULL)
5088 relocation -= (elf_hash_table (info)->tls_sec->vma + TP_OFFSET);
5089 break;
5090 case R_NDS32_TLS_IE_HI20:
5091 case R_NDS32_TLS_IE_LO12S2:
5092 {
5093 /* Relocation is to the entry for this symbol in the global
5094 offset table. */
5095 unsigned int tls_type;
5096 asection *srelgot;
5097 Elf_Internal_Rela outrel;
5098 bfd_vma off;
5099 bfd_byte *loc;
5100 int indx = 0;
5101
5102 BFD_ASSERT (sgot != NULL);
5103 if (h != NULL)
5104 {
5105 bfd_boolean dyn;
5106
5107 off = h->got.offset;
5108 BFD_ASSERT (off != (bfd_vma) - 1);
5109 dyn = htab->root.dynamic_sections_created;
5110 tls_type = ((struct elf_nds32_link_hash_entry *) h)->tls_type;
0e1862bb
L
5111 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, bfd_link_pic (info), h)
5112 && (!bfd_link_pic (info)
1c8f6a4d
KLC
5113 || !SYMBOL_REFERENCES_LOCAL (info, h)))
5114 indx = h->dynindx;
5115 }
5116 else
5117 {
5118 /* Never happen currently. */
5119 BFD_ASSERT (local_got_offsets != NULL
5120 && local_got_offsets[r_symndx] != (bfd_vma) - 1);
5121
5122 off = local_got_offsets[r_symndx];
5123
5124 tls_type = elf32_nds32_local_got_tls_type (input_bfd)[r_symndx];
5125 }
5126 relocation = sgot->output_section->vma + sgot->output_offset + off;
5127
5128 if (r_type == R_NDS32_TLS_IE_LO12S2)
5129 break;
5130
5131 /* The offset must always be a multiple of 4. We use
5132 the least significant bit to record whether we have
5133 already processed this entry. */
5134 if ((off & 1) != 0)
5135 off &= ~1;
5136 else
5137 {
5138 bfd_boolean need_relocs = FALSE;
ce558b89 5139 srelgot = htab->root.srelgot;
0e1862bb 5140 if ((bfd_link_pic (info) || indx != 0)
1c8f6a4d
KLC
5141 && (h == NULL
5142 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT
5143 || h->root.type != bfd_link_hash_undefweak))
5144 {
5145 need_relocs = TRUE;
5146 BFD_ASSERT (srelgot != NULL);
5147 }
5148 if (tls_type & GOT_TLS_IE)
5149 {
5150 if (need_relocs)
5151 {
5152 if (h->dynindx == 0)
5153 outrel.r_addend = relocation - dtpoff_base (info);
5154 else
5155 outrel.r_addend = 0;
5156 outrel.r_offset = (sgot->output_section->vma
5157 + sgot->output_offset
5158 + off);
5159 outrel.r_info =
5160 ELF32_R_INFO (h->dynindx, R_NDS32_TLS_TPOFF);
5161
5162 loc = srelgot->contents;
5163 loc +=
5164 srelgot->reloc_count * sizeof (Elf32_External_Rela);
5165 bfd_elf32_swap_reloca_out (output_bfd, &outrel, loc);
5166 ++srelgot->reloc_count;
5167 }
5168 else
5169 bfd_put_32 (output_bfd, h->root.u.def.value - TP_OFFSET,
5170 sgot->contents + off);
5171 }
5172 }
5173 }
5174 break;
5175
35c08157
KLC
5176 /* DON'T fall through. */
5177
5178 default:
5179 /* OLD_NDS32_RELOC. */
5180
5181 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5182 contents, offset, relocation, addend);
5183 goto check_reloc;
5184 }
5185
5186 switch ((int) r_type)
5187 {
5188 case R_NDS32_20_RELA:
5189 case R_NDS32_5_RELA:
5190 case R_NDS32_9_PCREL_RELA:
5191 case R_NDS32_WORD_9_PCREL_RELA:
5192 case R_NDS32_10_UPCREL_RELA:
5193 case R_NDS32_15_PCREL_RELA:
5194 case R_NDS32_17_PCREL_RELA:
5195 case R_NDS32_25_PCREL_RELA:
5196 case R_NDS32_25_ABS_RELA:
5197 case R_NDS32_HI20_RELA:
5198 case R_NDS32_LO12S3_RELA:
5199 case R_NDS32_LO12S2_RELA:
5200 case R_NDS32_LO12S2_DP_RELA:
5201 case R_NDS32_LO12S2_SP_RELA:
5202 case R_NDS32_LO12S1_RELA:
5203 case R_NDS32_LO12S0_RELA:
5204 case R_NDS32_LO12S0_ORI_RELA:
5205 case R_NDS32_SDA16S3_RELA:
5206 case R_NDS32_SDA17S2_RELA:
5207 case R_NDS32_SDA18S1_RELA:
5208 case R_NDS32_SDA19S0_RELA:
5209 case R_NDS32_SDA15S3_RELA:
5210 case R_NDS32_SDA15S2_RELA:
5211 case R_NDS32_SDA12S2_DP_RELA:
5212 case R_NDS32_SDA12S2_SP_RELA:
5213 case R_NDS32_SDA15S1_RELA:
5214 case R_NDS32_SDA15S0_RELA:
5215 case R_NDS32_SDA_FP7U2_RELA:
5216 case R_NDS32_9_PLTREL:
5217 case R_NDS32_25_PLTREL:
5218 case R_NDS32_GOT20:
5219 case R_NDS32_GOT_HI20:
5220 case R_NDS32_GOT_LO12:
5221 case R_NDS32_GOT_LO15:
5222 case R_NDS32_GOT_LO19:
5223 case R_NDS32_GOT15S2_RELA:
5224 case R_NDS32_GOT17S2_RELA:
5225 case R_NDS32_GOTPC20:
5226 case R_NDS32_GOTPC_HI20:
5227 case R_NDS32_GOTPC_LO12:
5228 case R_NDS32_GOTOFF:
5229 case R_NDS32_GOTOFF_HI20:
5230 case R_NDS32_GOTOFF_LO12:
5231 case R_NDS32_GOTOFF_LO15:
5232 case R_NDS32_GOTOFF_LO19:
5233 case R_NDS32_PLTREL_HI20:
5234 case R_NDS32_PLTREL_LO12:
5235 case R_NDS32_PLT_GOTREL_HI20:
5236 case R_NDS32_PLT_GOTREL_LO12:
5237 case R_NDS32_PLT_GOTREL_LO15:
5238 case R_NDS32_PLT_GOTREL_LO19:
5239 case R_NDS32_PLT_GOTREL_LO20:
5240 case R_NDS32_17IFC_PCREL_RELA:
5241 case R_NDS32_10IFCU_PCREL_RELA:
1c8f6a4d
KLC
5242 case R_NDS32_TLS_LE_HI20:
5243 case R_NDS32_TLS_LE_LO12:
5244 case R_NDS32_TLS_IE_HI20:
5245 case R_NDS32_TLS_IE_LO12S2:
5246 case R_NDS32_TLS_LE_20:
5247 case R_NDS32_TLS_LE_15S0:
5248 case R_NDS32_TLS_LE_15S1:
5249 case R_NDS32_TLS_LE_15S2:
35c08157 5250 /* Instruction related relocs must handle endian properly. */
1c8f6a4d 5251 /* NOTE: PIC IS NOT HANDLE YET; DO IT LATER. */
35c08157
KLC
5252 r = nds32_elf_final_link_relocate (howto, input_bfd,
5253 input_section, contents,
5254 rel->r_offset, relocation,
5255 rel->r_addend);
5256 break;
5257
5258 default:
5259 /* All other relocs can use default handler. */
5260 r = _bfd_final_link_relocate (howto, input_bfd, input_section,
5261 contents, rel->r_offset,
5262 relocation, rel->r_addend);
5263 break;
5264 }
5265
5266check_reloc:
5267
5268 if (r != bfd_reloc_ok)
5269 {
5270 /* FIXME: This should be generic enough to go in a utility. */
5271 const char *name;
5272
5273 if (h != NULL)
5274 name = h->root.root.string;
5275 else
5276 {
5277 name = bfd_elf_string_from_elf_section
5278 (input_bfd, symtab_hdr->sh_link, sym->st_name);
5279 if (name == NULL || *name == '\0')
5280 name = bfd_section_name (input_bfd, sec);
5281 }
5282
5283 if (errmsg != NULL)
5284 goto common_error;
5285
5286 switch (r)
5287 {
5288 case bfd_reloc_overflow:
1a72702b
AM
5289 (*info->callbacks->reloc_overflow)
5290 (info, (h ? &h->root : NULL), name, howto->name,
5291 (bfd_vma) 0, input_bfd, input_section, offset);
35c08157
KLC
5292 break;
5293
5294 case bfd_reloc_undefined:
1a72702b
AM
5295 (*info->callbacks->undefined_symbol)
5296 (info, name, input_bfd, input_section, offset, TRUE);
35c08157
KLC
5297 break;
5298
5299 case bfd_reloc_outofrange:
5300 errmsg = _("internal error: out of range error");
5301 goto common_error;
5302
5303 case bfd_reloc_notsupported:
5304 errmsg = _("internal error: unsupported relocation error");
5305 goto common_error;
5306
5307 case bfd_reloc_dangerous:
5308 errmsg = _("internal error: dangerous error");
5309 goto common_error;
5310
5311 default:
5312 errmsg = _("internal error: unknown error");
5313 /* Fall through. */
5314
1a72702b
AM
5315 common_error:
5316 (*info->callbacks->warning) (info, errmsg, name, input_bfd,
5317 input_section, offset);
35c08157
KLC
5318 break;
5319 }
5320 }
5321 }
5322
5323 return ret;
5324}
5325
5326/* Finish up dynamic symbol handling. We set the contents of various
5327 dynamic sections here. */
5328
5329static bfd_boolean
5330nds32_elf_finish_dynamic_symbol (bfd *output_bfd, struct bfd_link_info *info,
5331 struct elf_link_hash_entry *h, Elf_Internal_Sym *sym)
5332{
5333 struct elf_nds32_link_hash_table *htab;
5334 bfd_byte *loc;
5335
5336 htab = nds32_elf_hash_table (info);
5337
5338 if (h->plt.offset != (bfd_vma) - 1)
5339 {
5340 asection *splt;
5341 asection *sgot;
5342 asection *srela;
5343
5344 bfd_vma plt_index;
5345 bfd_vma got_offset;
5346 bfd_vma local_plt_offset;
5347 Elf_Internal_Rela rela;
5348
5349 /* This symbol has an entry in the procedure linkage table. Set
5350 it up. */
5351
5352 BFD_ASSERT (h->dynindx != -1);
5353
ce558b89
AM
5354 splt = htab->root.splt;
5355 sgot = htab->root.sgotplt;
5356 srela = htab->root.srelplt;
35c08157
KLC
5357 BFD_ASSERT (splt != NULL && sgot != NULL && srela != NULL);
5358
5359 /* Get the index in the procedure linkage table which
5360 corresponds to this symbol. This is the index of this symbol
5361 in all the symbols for which we are making plt entries. The
5362 first entry in the procedure linkage table is reserved. */
5363 plt_index = h->plt.offset / PLT_ENTRY_SIZE - 1;
5364
5365 /* Get the offset into the .got table of the entry that
5366 corresponds to this function. Each .got entry is 4 bytes.
5367 The first three are reserved. */
5368 got_offset = (plt_index + 3) * 4;
5369
5370 /* Fill in the entry in the procedure linkage table. */
0e1862bb 5371 if (!bfd_link_pic (info))
35c08157
KLC
5372 {
5373 unsigned long insn;
5374
5375 insn = PLT_ENTRY_WORD0 + (((sgot->output_section->vma
5376 + sgot->output_offset + got_offset) >> 12)
5377 & 0xfffff);
5378 bfd_putb32 (insn, splt->contents + h->plt.offset);
5379
5380 insn = PLT_ENTRY_WORD1 + (((sgot->output_section->vma
5381 + sgot->output_offset + got_offset) & 0x0fff)
5382 >> 2);
5383 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5384
5385 insn = PLT_ENTRY_WORD2;
5386 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5387
5388 insn = PLT_ENTRY_WORD3 + (plt_index & 0x7ffff);
5389 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5390
5391 insn = PLT_ENTRY_WORD4
5392 + (((unsigned int) ((-(h->plt.offset + 16)) >> 1)) & 0xffffff);
5393 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5394 local_plt_offset = 12;
5395 }
5396 else
5397 {
5398 /* sda_base must be set at this time. */
5399 unsigned long insn;
5400 long offset;
5401
5402 /* FIXME, sda_base is 65536, it will damage opcode. */
5403 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5404 offset = sgot->output_section->vma + sgot->output_offset + got_offset
5405 - elf_gp (output_bfd);
5406 insn = PLT_PIC_ENTRY_WORD0 + ((offset >> 12) & 0xfffff);
5407 bfd_putb32 (insn, splt->contents + h->plt.offset);
5408
5409 insn = PLT_PIC_ENTRY_WORD1 + (offset & 0xfff);
5410 bfd_putb32 (insn, splt->contents + h->plt.offset + 4);
5411
5412 insn = PLT_PIC_ENTRY_WORD2;
5413 bfd_putb32 (insn, splt->contents + h->plt.offset + 8);
5414
5415 insn = PLT_PIC_ENTRY_WORD3;
5416 bfd_putb32 (insn, splt->contents + h->plt.offset + 12);
5417
5418 insn = PLT_PIC_ENTRY_WORD4 + (plt_index & 0x7fffff);
5419 bfd_putb32 (insn, splt->contents + h->plt.offset + 16);
5420
5421 insn = PLT_PIC_ENTRY_WORD5
5422 + (((unsigned int) ((-(h->plt.offset + 20)) >> 1)) & 0xffffff);
5423 bfd_putb32 (insn, splt->contents + h->plt.offset + 20);
5424
5425 local_plt_offset = 16;
5426 }
5427
5428 /* Fill in the entry in the global offset table,
5429 so it will fall through to the next instruction for the first time. */
5430 bfd_put_32 (output_bfd,
5431 (splt->output_section->vma + splt->output_offset
5432 + h->plt.offset + local_plt_offset),
5433 sgot->contents + got_offset);
5434
5435 /* Fill in the entry in the .rela.plt section. */
5436 rela.r_offset = (sgot->output_section->vma
5437 + sgot->output_offset + got_offset);
5438 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_JMP_SLOT);
5439 rela.r_addend = 0;
5440 loc = srela->contents;
5441 loc += plt_index * sizeof (Elf32_External_Rela);
5442 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5443
5444 if (!h->def_regular)
5445 {
5446 /* Mark the symbol as undefined, rather than as defined in
5447 the .plt section. Leave the value alone. */
5448 sym->st_shndx = SHN_UNDEF;
5449 if (!h->ref_regular_nonweak)
5450 sym->st_value = 0;
5451 }
5452 }
5453
5454 if (h->got.offset != (bfd_vma) - 1)
5455 {
5456 asection *sgot;
5457 asection *srela;
5458 Elf_Internal_Rela rela;
5459
5460 /* This symbol has an entry in the global offset table.
5461 Set it up. */
5462
ce558b89
AM
5463 sgot = htab->root.sgot;
5464 srela = htab->root.srelgot;
35c08157
KLC
5465 BFD_ASSERT (sgot != NULL && srela != NULL);
5466
5467 rela.r_offset = (sgot->output_section->vma
5468 + sgot->output_offset + (h->got.offset & ~1));
5469
5470 /* If this is a -Bsymbolic link, and the symbol is defined
5471 locally, we just want to emit a RELATIVE reloc. Likewise if
5472 the symbol was forced to be local because of a version file.
5473 The entry in the global offset table will already have been
5474 initialized in the relocate_section function. */
0e1862bb 5475 if (bfd_link_pic (info)
35c08157
KLC
5476 && (info->symbolic
5477 || h->dynindx == -1 || h->forced_local) && h->def_regular)
5478 {
5479 rela.r_info = ELF32_R_INFO (0, R_NDS32_RELATIVE);
5480 rela.r_addend = (h->root.u.def.value
5481 + h->root.u.def.section->output_section->vma
5482 + h->root.u.def.section->output_offset);
5483 }
5484 else
5485 {
5486 BFD_ASSERT ((h->got.offset & 1) == 0);
5487 bfd_put_32 (output_bfd, (bfd_vma) 0,
5488 sgot->contents + h->got.offset);
5489 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_GLOB_DAT);
5490 rela.r_addend = 0;
5491 }
5492
5493 loc = srela->contents;
5494 loc += srela->reloc_count * sizeof (Elf32_External_Rela);
5495 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5496 ++srela->reloc_count;
5497 }
5498
5499 if (h->needs_copy)
5500 {
5501 asection *s;
5502 Elf_Internal_Rela rela;
5503
5504 /* This symbols needs a copy reloc. Set it up. */
5505
5506 BFD_ASSERT (h->dynindx != -1
5507 && (h->root.type == bfd_link_hash_defined
5508 || h->root.type == bfd_link_hash_defweak));
5509
5510 s = bfd_get_section_by_name (h->root.u.def.section->owner, ".rela.bss");
5511 BFD_ASSERT (s != NULL);
5512
5513 rela.r_offset = (h->root.u.def.value
5514 + h->root.u.def.section->output_section->vma
5515 + h->root.u.def.section->output_offset);
5516 rela.r_info = ELF32_R_INFO (h->dynindx, R_NDS32_COPY);
5517 rela.r_addend = 0;
5518 loc = s->contents;
5519 loc += s->reloc_count * sizeof (Elf32_External_Rela);
5520 bfd_elf32_swap_reloca_out (output_bfd, &rela, loc);
5521 ++s->reloc_count;
5522 }
5523
5524 /* Mark some specially defined symbols as absolute. */
5525 if (strcmp (h->root.root.string, "_DYNAMIC") == 0
5526 || strcmp (h->root.root.string, "_GLOBAL_OFFSET_TABLE_") == 0)
5527 sym->st_shndx = SHN_ABS;
5528
5529 return TRUE;
5530}
5531
5532
5533/* Finish up the dynamic sections. */
5534
5535static bfd_boolean
5536nds32_elf_finish_dynamic_sections (bfd *output_bfd, struct bfd_link_info *info)
5537{
5538 struct elf_nds32_link_hash_table *htab;
5539 bfd *dynobj;
5540 asection *sdyn;
5541 asection *sgot;
5542
5543 htab = nds32_elf_hash_table (info);
5544 dynobj = htab->root.dynobj;
5545
ce558b89 5546 sgot = htab->root.sgotplt;
35c08157
KLC
5547 sdyn = bfd_get_section_by_name (dynobj, ".dynamic");
5548
5549 if (htab->root.dynamic_sections_created)
5550 {
5551 asection *splt;
5552 Elf32_External_Dyn *dyncon, *dynconend;
5553
5554 BFD_ASSERT (sgot != NULL && sdyn != NULL);
5555
5556 dyncon = (Elf32_External_Dyn *) sdyn->contents;
5557 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size);
5558
5559 for (; dyncon < dynconend; dyncon++)
5560 {
5561 Elf_Internal_Dyn dyn;
5562 asection *s;
5563
5564 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn);
5565
5566 switch (dyn.d_tag)
5567 {
5568 default:
5569 break;
5570
5571 case DT_PLTGOT:
ce558b89 5572 s = htab->root.sgotplt;
35c08157
KLC
5573 goto get_vma;
5574 case DT_JMPREL:
ce558b89 5575 s = htab->root.srelplt;
35c08157 5576 get_vma:
4ade44b7 5577 dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
35c08157
KLC
5578 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5579 break;
5580
5581 case DT_PLTRELSZ:
ce558b89 5582 s = htab->root.srelplt;
35c08157
KLC
5583 dyn.d_un.d_val = s->size;
5584 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon);
5585 break;
35c08157
KLC
5586 }
5587 }
5588
5589 /* Fill in the first entry in the procedure linkage table. */
ce558b89 5590 splt = htab->root.splt;
35c08157
KLC
5591 if (splt && splt->size > 0)
5592 {
0e1862bb 5593 if (bfd_link_pic (info))
35c08157
KLC
5594 {
5595 unsigned long insn;
5596 long offset;
5597
5598 /* FIXME, sda_base is 65536, it will damage opcode. */
5599 /* insn = PLT_PIC_ENTRY_WORD0 + (((got_offset - sda_base) >> 2) & 0x7fff); */
5600 offset = sgot->output_section->vma + sgot->output_offset + 4
5601 - elf_gp (output_bfd);
5602 insn = PLT0_PIC_ENTRY_WORD0 | ((offset >> 12) & 0xfffff);
5603 bfd_putb32 (insn, splt->contents);
5604
5605 /* insn = PLT0_PIC_ENTRY_WORD0 | (((8 - sda_base) >> 2) & 0x7fff) ; */
5606 /* here has a typo? */
5607 insn = PLT0_PIC_ENTRY_WORD1 | (offset & 0xfff);
5608 bfd_putb32 (insn, splt->contents + 4);
5609
5610 insn = PLT0_PIC_ENTRY_WORD2;
5611 bfd_putb32 (insn, splt->contents + 8);
5612
5613 insn = PLT0_PIC_ENTRY_WORD3;
5614 bfd_putb32 (insn, splt->contents + 12);
5615
5616 insn = PLT0_PIC_ENTRY_WORD4;
5617 bfd_putb32 (insn, splt->contents + 16);
5618
5619 insn = PLT0_PIC_ENTRY_WORD5;
5620 bfd_putb32 (insn, splt->contents + 20);
5621 }
5622 else
5623 {
5624 unsigned long insn;
5625 unsigned long addr;
5626
5627 /* addr = .got + 4 */
5628 addr = sgot->output_section->vma + sgot->output_offset + 4;
5629 insn = PLT0_ENTRY_WORD0 | ((addr >> 12) & 0xfffff);
5630 bfd_putb32 (insn, splt->contents);
5631
5632 insn = PLT0_ENTRY_WORD1 | (addr & 0x0fff);
5633 bfd_putb32 (insn, splt->contents + 4);
5634
5635 insn = PLT0_ENTRY_WORD2;
5636 bfd_putb32 (insn, splt->contents + 8);
5637
5638 insn = PLT0_ENTRY_WORD3;
5639 bfd_putb32 (insn, splt->contents + 12);
5640
5641 insn = PLT0_ENTRY_WORD4;
5642 bfd_putb32 (insn, splt->contents + 16);
5643 }
5644
5645 elf_section_data (splt->output_section)->this_hdr.sh_entsize =
5646 PLT_ENTRY_SIZE;
5647 }
5648 }
5649
5650 /* Fill in the first three entries in the global offset table. */
5651 if (sgot && sgot->size > 0)
5652 {
5653 if (sdyn == NULL)
5654 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents);
5655 else
5656 bfd_put_32 (output_bfd,
5657 sdyn->output_section->vma + sdyn->output_offset,
5658 sgot->contents);
5659 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4);
5660 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8);
5661
5662 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4;
5663 }
5664
5665 return TRUE;
5666}
5667\f
5668
5669/* Set the right machine number. */
5670
5671static bfd_boolean
5672nds32_elf_object_p (bfd *abfd)
5673{
5674 static unsigned int cur_arch = 0;
5675
5676 if (E_N1_ARCH != (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH))
5677 {
5678 /* E_N1_ARCH is a wild card, so it is set only when no others exist. */
5679 cur_arch = (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH);
5680 }
5681
5682 switch (cur_arch)
5683 {
5684 default:
5685 case E_N1_ARCH:
5686 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1);
5687 break;
5688 case E_N1H_ARCH:
5689 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h);
5690 break;
5691 case E_NDS_ARCH_STAR_V2_0:
5692 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v2);
5693 break;
5694 case E_NDS_ARCH_STAR_V3_0:
5695 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3);
5696 break;
5697 case E_NDS_ARCH_STAR_V3_M:
5698 bfd_default_set_arch_mach (abfd, bfd_arch_nds32, bfd_mach_n1h_v3m);
5699 break;
5700 }
5701
5702 return TRUE;
5703}
5704
5705/* Store the machine number in the flags field. */
5706
5707static void
5708nds32_elf_final_write_processing (bfd *abfd,
5709 bfd_boolean linker ATTRIBUTE_UNUSED)
5710{
5711 unsigned long val;
5712 static unsigned int cur_mach = 0;
5713
5714 if (bfd_mach_n1 != bfd_get_mach (abfd))
5715 {
5716 cur_mach = bfd_get_mach (abfd);
5717 }
5718
5719 switch (cur_mach)
5720 {
5721 case bfd_mach_n1:
5722 /* Only happen when object is empty, since the case is abandon. */
5723 val = E_N1_ARCH;
5724 val |= E_NDS_ABI_AABI;
5725 val |= E_NDS32_ELF_VER_1_4;
5726 break;
5727 case bfd_mach_n1h:
5728 val = E_N1H_ARCH;
5729 break;
5730 case bfd_mach_n1h_v2:
5731 val = E_NDS_ARCH_STAR_V2_0;
5732 break;
5733 case bfd_mach_n1h_v3:
5734 val = E_NDS_ARCH_STAR_V3_0;
5735 break;
5736 case bfd_mach_n1h_v3m:
5737 val = E_NDS_ARCH_STAR_V3_M;
5738 break;
5739 default:
5740 val = 0;
5741 break;
5742 }
5743
5744 elf_elfheader (abfd)->e_flags &= ~EF_NDS_ARCH;
5745 elf_elfheader (abfd)->e_flags |= val;
5746}
5747
5748/* Function to keep NDS32 specific file flags. */
5749
5750static bfd_boolean
5751nds32_elf_set_private_flags (bfd *abfd, flagword flags)
5752{
5753 BFD_ASSERT (!elf_flags_init (abfd)
5754 || elf_elfheader (abfd)->e_flags == flags);
5755
5756 elf_elfheader (abfd)->e_flags = flags;
5757 elf_flags_init (abfd) = TRUE;
5758 return TRUE;
5759}
5760
5761static unsigned int
5762convert_e_flags (unsigned int e_flags, unsigned int arch)
5763{
5764 if ((e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9)
5765 {
5766 /* From 0.9 to 1.0. */
5767 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V1_0;
5768
5769 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5770 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5771 if (arch == E_NDS_ARCH_STAR_V1_0)
5772 {
5773 /* Done. */
5774 return e_flags;
5775 }
5776 }
5777
5778 /* From 1.0 to 2.0. */
5779 e_flags = (e_flags & (~EF_NDS_ARCH)) | E_NDS_ARCH_STAR_V2_0;
5780
5781 /* Clear E_NDS32_HAS_MFUSR_PC_INST. */
5782 e_flags &= ~E_NDS32_HAS_MFUSR_PC_INST;
5783
5784 /* Invert E_NDS32_HAS_NO_MAC_INST. */
5785 e_flags ^= E_NDS32_HAS_NO_MAC_INST;
5786 return e_flags;
5787}
5788
5789static bfd_boolean
5790nds32_check_vec_size (bfd *ibfd)
5791{
5792 static unsigned int nds32_vec_size = 0;
5793
5794 asection *sec_t = NULL;
5795 bfd_byte *contents = NULL;
5796
5797 sec_t = bfd_get_section_by_name (ibfd, ".nds32_e_flags");
5798
5799 if (sec_t && sec_t->size >= 4)
5800 {
5801 /* Get vec_size in file. */
5802 unsigned int flag_t;
5803
0c4bd9d9 5804 nds32_get_section_contents (ibfd, sec_t, &contents, TRUE);
35c08157
KLC
5805 flag_t = bfd_get_32 (ibfd, contents);
5806
5807 /* The value could only be 4 or 16. */
5808
5809 if (!nds32_vec_size)
5810 /* Set if not set yet. */
5811 nds32_vec_size = (flag_t & 0x3);
5812 else if (nds32_vec_size != (flag_t & 0x3))
5813 {
4eca0228 5814 _bfd_error_handler
695344c0 5815 /* xgettext:c-format */
871b3ab2 5816 (_("%pB: ISR vector size mismatch"
4eca0228
AM
5817 " with previous modules, previous %u-byte, current %u-byte"),
5818 ibfd,
5819 nds32_vec_size == 1 ? 4 : nds32_vec_size == 2 ? 16 : 0xffffffff,
5820 (flag_t & 0x3) == 1 ? 4 : (flag_t & 0x3) == 2 ? 16 : 0xffffffff);
35c08157
KLC
5821 return FALSE;
5822 }
5823 else
5824 /* Only keep the first vec_size section. */
5825 sec_t->flags |= SEC_EXCLUDE;
5826 }
5827
5828 return TRUE;
5829}
5830
5831/* Merge backend specific data from an object file to the output
5832 object file when linking. */
5833
5834static bfd_boolean
50e03d47 5835nds32_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info)
35c08157 5836{
50e03d47 5837 bfd *obfd = info->output_bfd;
35c08157
KLC
5838 flagword out_flags;
5839 flagword in_flags;
5840 flagword out_16regs;
5841 flagword in_no_mac;
5842 flagword out_no_mac;
5843 flagword in_16regs;
5844 flagword out_version;
5845 flagword in_version;
5846 flagword out_fpu_config;
5847 flagword in_fpu_config;
5848
5849 /* TODO: Revise to use object-attributes instead. */
5850 if (!nds32_check_vec_size (ibfd))
5851 return FALSE;
5852
5853 if (bfd_get_flavour (ibfd) != bfd_target_elf_flavour
5854 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
5855 return TRUE;
5856
5857 if (bfd_little_endian (ibfd) != bfd_little_endian (obfd))
5858 {
4eca0228 5859 _bfd_error_handler
38f14ab8 5860 (_("%pB: warning: endian mismatch with previous modules"), ibfd);
35c08157
KLC
5861
5862 bfd_set_error (bfd_error_bad_value);
5863 return FALSE;
5864 }
5865
5866 in_version = elf_elfheader (ibfd)->e_flags & EF_NDS32_ELF_VERSION;
5867 if (in_version == E_NDS32_ELF_VER_1_2)
5868 {
4eca0228 5869 _bfd_error_handler
38f14ab8
AM
5870 (_("%pB: warning: older version of object file encountered, "
5871 "please recompile with current tool chain"), ibfd);
35c08157
KLC
5872 }
5873
5874 /* We may need to merge V1 and V2 arch object files to V2. */
5875 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5876 != (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5877 {
5878 /* Need to convert version. */
5879 if ((elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5880 == E_NDS_ARCH_STAR_RESERVED)
5881 {
5882 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5883 }
5884 else if ((elf_elfheader (obfd)->e_flags & EF_NDS_ARCH) == E_NDS_ARCH_STAR_V0_9
5885 || (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH)
5886 > (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH))
5887 {
5888 elf_elfheader (obfd)->e_flags =
5889 convert_e_flags (elf_elfheader (obfd)->e_flags,
5890 (elf_elfheader (ibfd)->e_flags & EF_NDS_ARCH));
5891 }
5892 else
5893 {
5894 elf_elfheader (ibfd)->e_flags =
5895 convert_e_flags (elf_elfheader (ibfd)->e_flags,
5896 (elf_elfheader (obfd)->e_flags & EF_NDS_ARCH));
5897 }
5898 }
5899
5900 /* Extract some flags. */
5901 in_flags = elf_elfheader (ibfd)->e_flags
5902 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5903 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5904
5905 /* The following flags need special treatment. */
5906 in_16regs = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5907 in_no_mac = elf_elfheader (ibfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5908 in_fpu_config = elf_elfheader (ibfd)->e_flags & E_NDS32_FPU_REG_CONF;
5909
5910 /* Extract some flags. */
5911 out_flags = elf_elfheader (obfd)->e_flags
5912 & (~(E_NDS32_HAS_REDUCED_REGS | EF_NDS32_ELF_VERSION
5913 | E_NDS32_HAS_NO_MAC_INST | E_NDS32_FPU_REG_CONF));
5914
5915 /* The following flags need special treatment. */
5916 out_16regs = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_REDUCED_REGS;
5917 out_no_mac = elf_elfheader (obfd)->e_flags & E_NDS32_HAS_NO_MAC_INST;
5918 out_fpu_config = elf_elfheader (obfd)->e_flags & E_NDS32_FPU_REG_CONF;
5919 out_version = elf_elfheader (obfd)->e_flags & EF_NDS32_ELF_VERSION;
5920 if (!elf_flags_init (obfd))
5921 {
5922 /* If the input is the default architecture then do not
5923 bother setting the flags for the output architecture,
5924 instead allow future merges to do this. If no future
5925 merges ever set these flags then they will retain their
5926 unitialised values, which surprise surprise, correspond
5927 to the default values. */
5928 if (bfd_get_arch_info (ibfd)->the_default)
5929 return TRUE;
5930
5931 elf_flags_init (obfd) = TRUE;
5932 elf_elfheader (obfd)->e_flags = elf_elfheader (ibfd)->e_flags;
5933
5934 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
5935 && bfd_get_arch_info (obfd)->the_default)
5936 {
5937 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd),
5938 bfd_get_mach (ibfd));
5939 }
5940
5941 return TRUE;
5942 }
5943
5944 /* Check flag compatibility. */
5945 if ((in_flags & EF_NDS_ABI) != (out_flags & EF_NDS_ABI))
5946 {
4eca0228 5947 _bfd_error_handler
38f14ab8 5948 (_("%pB: error: ABI mismatch with previous modules"), ibfd);
35c08157
KLC
5949
5950 bfd_set_error (bfd_error_bad_value);
5951 return FALSE;
5952 }
5953
5954 if ((in_flags & EF_NDS_ARCH) != (out_flags & EF_NDS_ARCH))
5955 {
5956 if (((in_flags & EF_NDS_ARCH) != E_N1_ARCH))
5957 {
4eca0228 5958 _bfd_error_handler
38f14ab8
AM
5959 (_("%pB: error: instruction set mismatch with previous modules"),
5960 ibfd);
35c08157
KLC
5961
5962 bfd_set_error (bfd_error_bad_value);
5963 return FALSE;
5964 }
5965 }
5966
5967 /* When linking with V1.2 and V1.3 objects together the output is V1.2.
5968 and perf ext1 and DIV are mergerd to perf ext1. */
5969 if (in_version == E_NDS32_ELF_VER_1_2 || out_version == E_NDS32_ELF_VER_1_2)
5970 {
5971 elf_elfheader (obfd)->e_flags =
5972 (in_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5973 | (out_flags & (~(E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5974 | (((in_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5975 ? E_NDS32_HAS_EXT_INST : 0)
5976 | (((out_flags & (E_NDS32_HAS_EXT_INST | E_NDS32_HAS_DIV_INST)))
5977 ? E_NDS32_HAS_EXT_INST : 0)
5978 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5979 | ((in_version > out_version) ? out_version : in_version);
5980 }
5981 else
5982 {
5983 if (in_version != out_version)
4eca0228 5984 _bfd_error_handler
695344c0 5985 /* xgettext:c-format */
38f14ab8 5986 (_("%pB: warning: incompatible elf-versions %s and %s"),
4eca0228
AM
5987 ibfd, nds32_elfver_strtab[out_version],
5988 nds32_elfver_strtab[in_version]);
35c08157
KLC
5989
5990 elf_elfheader (obfd)->e_flags = in_flags | out_flags
5991 | (in_16regs & out_16regs) | (in_no_mac & out_no_mac)
5992 | (in_fpu_config > out_fpu_config ? in_fpu_config : out_fpu_config)
5993 | (in_version > out_version ? out_version : in_version);
5994 }
5995
5996 return TRUE;
5997}
5998
5999/* Display the flags field. */
6000
6001static bfd_boolean
6002nds32_elf_print_private_bfd_data (bfd *abfd, void *ptr)
6003{
6004 FILE *file = (FILE *) ptr;
6005
6006 BFD_ASSERT (abfd != NULL && ptr != NULL);
6007
6008 _bfd_elf_print_private_bfd_data (abfd, ptr);
6009
6010 fprintf (file, _("private flags = %lx"), elf_elfheader (abfd)->e_flags);
6011
6012 switch (elf_elfheader (abfd)->e_flags & EF_NDS_ARCH)
6013 {
6014 default:
6015 case E_N1_ARCH:
6016 fprintf (file, _(": n1 instructions"));
6017 break;
6018 case E_N1H_ARCH:
6019 fprintf (file, _(": n1h instructions"));
6020 break;
6021 }
6022
6023 fputc ('\n', file);
6024
6025 return TRUE;
6026}
6027
6028static unsigned int
6029nds32_elf_action_discarded (asection *sec)
6030{
6031
6032 if (strncmp
6033 (".gcc_except_table", sec->name, sizeof (".gcc_except_table") - 1) == 0)
6034 return 0;
6035
6036 return _bfd_elf_default_action_discarded (sec);
6037}
6038
6039static asection *
6040nds32_elf_gc_mark_hook (asection *sec, struct bfd_link_info *info,
6041 Elf_Internal_Rela *rel, struct elf_link_hash_entry *h,
6042 Elf_Internal_Sym *sym)
6043{
6044 if (h != NULL)
6045 switch (ELF32_R_TYPE (rel->r_info))
6046 {
6047 case R_NDS32_GNU_VTINHERIT:
6048 case R_NDS32_GNU_VTENTRY:
6049 case R_NDS32_RELA_GNU_VTINHERIT:
6050 case R_NDS32_RELA_GNU_VTENTRY:
6051 return NULL;
6052 }
6053
6054 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
6055}
6056
35c08157
KLC
6057/* Look through the relocs for a section during the first phase.
6058 Since we don't do .gots or .plts, we just need to consider the
6059 virtual table relocs for gc. */
6060
6061static bfd_boolean
6062nds32_elf_check_relocs (bfd *abfd, struct bfd_link_info *info,
6063 asection *sec, const Elf_Internal_Rela *relocs)
6064{
6065 Elf_Internal_Shdr *symtab_hdr;
6066 struct elf_link_hash_entry **sym_hashes, **sym_hashes_end;
6067 const Elf_Internal_Rela *rel;
6068 const Elf_Internal_Rela *rel_end;
6069 struct elf_nds32_link_hash_table *htab;
6070 bfd *dynobj;
6071 asection *sreloc = NULL;
6072
0e1862bb 6073 if (bfd_link_relocatable (info))
35c08157
KLC
6074 return TRUE;
6075
65281396
AM
6076 /* Don't do anything special with non-loaded, non-alloced sections.
6077 In particular, any relocs in such sections should not affect GOT
6078 and PLT reference counting (ie. we don't allow them to create GOT
6079 or PLT entries), there's no possibility or desire to optimize TLS
6080 relocs, and there's not much point in propagating relocs to shared
6081 libs that the dynamic linker won't relocate. */
6082 if ((sec->flags & SEC_ALLOC) == 0)
6083 return TRUE;
6084
35c08157
KLC
6085 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
6086 sym_hashes = elf_sym_hashes (abfd);
6087 sym_hashes_end =
6088 sym_hashes + symtab_hdr->sh_size / sizeof (Elf32_External_Sym);
6089 if (!elf_bad_symtab (abfd))
6090 sym_hashes_end -= symtab_hdr->sh_info;
6091
6092 htab = nds32_elf_hash_table (info);
6093 dynobj = htab->root.dynobj;
6094
6095 rel_end = relocs + sec->reloc_count;
6096 for (rel = relocs; rel < rel_end; rel++)
6097 {
6098 enum elf_nds32_reloc_type r_type;
6099 struct elf_link_hash_entry *h;
6100 unsigned long r_symndx;
1c8f6a4d 6101 int tls_type, old_tls_type;
35c08157
KLC
6102
6103 r_symndx = ELF32_R_SYM (rel->r_info);
6104 r_type = ELF32_R_TYPE (rel->r_info);
6105 if (r_symndx < symtab_hdr->sh_info)
6106 h = NULL;
6107 else
6108 {
6109 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
6110 while (h->root.type == bfd_link_hash_indirect
6111 || h->root.type == bfd_link_hash_warning)
6112 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6113 }
6114
1c8f6a4d
KLC
6115 /* Some relocs require a global offset table. We create
6116 got section here, since these relocation need got section
6117 and it is not created yet. */
ce558b89 6118 if (htab->root.sgot == NULL)
35c08157
KLC
6119 {
6120 switch (r_type)
6121 {
6122 case R_NDS32_GOT_HI20:
6123 case R_NDS32_GOT_LO12:
6124 case R_NDS32_GOT_LO15:
6125 case R_NDS32_GOT_LO19:
6126 case R_NDS32_GOT17S2_RELA:
6127 case R_NDS32_GOT15S2_RELA:
6128 case R_NDS32_GOTOFF:
6129 case R_NDS32_GOTOFF_HI20:
6130 case R_NDS32_GOTOFF_LO12:
6131 case R_NDS32_GOTOFF_LO15:
6132 case R_NDS32_GOTOFF_LO19:
6133 case R_NDS32_GOTPC20:
6134 case R_NDS32_GOTPC_HI20:
6135 case R_NDS32_GOTPC_LO12:
6136 case R_NDS32_GOT20:
1c8f6a4d
KLC
6137 case R_NDS32_TLS_IE_HI20:
6138 case R_NDS32_TLS_IE_LO12S2:
35c08157
KLC
6139 if (dynobj == NULL)
6140 htab->root.dynobj = dynobj = abfd;
ce558b89 6141 if (!_bfd_elf_create_got_section (dynobj, info))
35c08157
KLC
6142 return FALSE;
6143 break;
6144
6145 default:
6146 break;
6147 }
6148 }
6149
6150 switch ((int) r_type)
6151 {
6152 case R_NDS32_GOT_HI20:
6153 case R_NDS32_GOT_LO12:
6154 case R_NDS32_GOT_LO15:
6155 case R_NDS32_GOT_LO19:
6156 case R_NDS32_GOT20:
1c8f6a4d
KLC
6157 case R_NDS32_TLS_IE_HI20:
6158 case R_NDS32_TLS_IE_LO12S2:
6159 switch (r_type)
6160 {
6161 case R_NDS32_TLS_IE_HI20:
6162 case R_NDS32_TLS_IE_LO12S2:
6163 tls_type = GOT_TLS_IE;
6164 break;
6165 default:
6166 tls_type = GOT_NORMAL;
6167 break;
6168 }
35c08157 6169 if (h != NULL)
1c8f6a4d
KLC
6170 {
6171 old_tls_type = elf32_nds32_hash_entry (h)->tls_type;
6172 h->got.refcount += 1;
6173 }
35c08157
KLC
6174 else
6175 {
6176 bfd_signed_vma *local_got_refcounts;
6177
6178 /* This is a global offset table entry for a local
6179 symbol. */
6180 local_got_refcounts = elf_local_got_refcounts (abfd);
6181 if (local_got_refcounts == NULL)
6182 {
6183 bfd_size_type size;
6184
6185 size = symtab_hdr->sh_info;
6186 size *= sizeof (bfd_signed_vma);
6187 local_got_refcounts = (bfd_signed_vma *) bfd_zalloc (abfd, size);
6188 if (local_got_refcounts == NULL)
6189 return FALSE;
6190 elf_local_got_refcounts (abfd) = local_got_refcounts;
6191 }
6192 local_got_refcounts[r_symndx] += 1;
1c8f6a4d 6193 old_tls_type = elf32_nds32_local_got_tls_type (abfd)[r_symndx];
35c08157 6194 }
35c08157 6195
1c8f6a4d
KLC
6196 /* We will already have issued an error message if there
6197 is a TLS/non-TLS mismatch, based on the symbol
6198 type. So just combine any TLS types needed. */
6199 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL
6200 && tls_type != GOT_NORMAL)
6201 tls_type |= old_tls_type;
6202
6203 if (old_tls_type != tls_type)
6204 {
6205 if (h != NULL)
6206 elf32_nds32_hash_entry (h)->tls_type = tls_type;
6207 else
6208 elf32_nds32_local_got_tls_type (abfd)[r_symndx] = tls_type;
6209 }
6210 break;
6211 case R_NDS32_9_PLTREL:
35c08157
KLC
6212 case R_NDS32_25_PLTREL:
6213 case R_NDS32_PLTREL_HI20:
6214 case R_NDS32_PLTREL_LO12:
6215 case R_NDS32_PLT_GOTREL_HI20:
6216 case R_NDS32_PLT_GOTREL_LO12:
6217 case R_NDS32_PLT_GOTREL_LO15:
6218 case R_NDS32_PLT_GOTREL_LO19:
6219 case R_NDS32_PLT_GOTREL_LO20:
6220
6221 /* This symbol requires a procedure linkage table entry. We
6222 actually build the entry in adjust_dynamic_symbol,
6223 because this might be a case of linking PIC code without
6224 linking in any dynamic objects, in which case we don't
6225 need to generate a procedure linkage table after all. */
6226
6227 /* If this is a local symbol, we resolve it directly without
6228 creating a procedure linkage table entry. */
6229 if (h == NULL)
6230 continue;
6231
6232 if (h->forced_local)
6233 break;
6234
1c8f6a4d 6235 elf32_nds32_hash_entry (h)->tls_type = GOT_NORMAL;
35c08157
KLC
6236 h->needs_plt = 1;
6237 h->plt.refcount += 1;
6238 break;
6239
6240 case R_NDS32_16_RELA:
6241 case R_NDS32_20_RELA:
6242 case R_NDS32_5_RELA:
6243 case R_NDS32_32_RELA:
6244 case R_NDS32_HI20_RELA:
6245 case R_NDS32_LO12S3_RELA:
6246 case R_NDS32_LO12S2_RELA:
6247 case R_NDS32_LO12S2_DP_RELA:
6248 case R_NDS32_LO12S2_SP_RELA:
6249 case R_NDS32_LO12S1_RELA:
6250 case R_NDS32_LO12S0_RELA:
6251 case R_NDS32_LO12S0_ORI_RELA:
6252 case R_NDS32_SDA16S3_RELA:
6253 case R_NDS32_SDA17S2_RELA:
6254 case R_NDS32_SDA18S1_RELA:
6255 case R_NDS32_SDA19S0_RELA:
6256 case R_NDS32_SDA15S3_RELA:
6257 case R_NDS32_SDA15S2_RELA:
6258 case R_NDS32_SDA12S2_DP_RELA:
6259 case R_NDS32_SDA12S2_SP_RELA:
6260 case R_NDS32_SDA15S1_RELA:
6261 case R_NDS32_SDA15S0_RELA:
6262 case R_NDS32_SDA_FP7U2_RELA:
6263 case R_NDS32_15_PCREL_RELA:
6264 case R_NDS32_17_PCREL_RELA:
6265 case R_NDS32_25_PCREL_RELA:
6266
0e1862bb 6267 if (h != NULL && !bfd_link_pic (info))
35c08157
KLC
6268 {
6269 h->non_got_ref = 1;
6270 h->plt.refcount += 1;
6271 }
6272
6273 /* If we are creating a shared library, and this is a reloc against
6274 a global symbol, or a non PC relative reloc against a local
6275 symbol, then we need to copy the reloc into the shared library.
6276 However, if we are linking with -Bsymbolic, we do not need to
6277 copy a reloc against a global symbol which is defined in an
6278 object we are including in the link (i.e., DEF_REGULAR is set).
6279 At this point we have not seen all the input files, so it is
6280 possible that DEF_REGULAR is not set now but will be set later
6281 (it is never cleared). We account for that possibility below by
6282 storing information in the dyn_relocs field of the hash table
6283 entry. A similar situation occurs when creating shared libraries
6284 and symbol visibility changes render the symbol local.
6285
6286 If on the other hand, we are creating an executable, we may need
6287 to keep relocations for symbols satisfied by a dynamic library
6288 if we manage to avoid copy relocs for the symbol. */
0e1862bb 6289 if ((bfd_link_pic (info)
35c08157
KLC
6290 && (sec->flags & SEC_ALLOC) != 0
6291 && ((r_type != R_NDS32_25_PCREL_RELA
6292 && r_type != R_NDS32_15_PCREL_RELA
6293 && r_type != R_NDS32_17_PCREL_RELA
6294 && !(r_type == R_NDS32_32_RELA
6295 && strcmp (sec->name, ".eh_frame") == 0))
6296 || (h != NULL
6297 && (!info->symbolic
6298 || h->root.type == bfd_link_hash_defweak
6299 || !h->def_regular))))
0e1862bb 6300 || (!bfd_link_pic (info)
35c08157
KLC
6301 && (sec->flags & SEC_ALLOC) != 0
6302 && h != NULL
6303 && (h->root.type == bfd_link_hash_defweak
6304 || !h->def_regular)))
6305 {
3bf083ed
AM
6306 struct elf_dyn_relocs *p;
6307 struct elf_dyn_relocs **head;
35c08157
KLC
6308
6309 if (dynobj == NULL)
6310 htab->root.dynobj = dynobj = abfd;
6311
6312 /* When creating a shared object, we must copy these
6313 relocs into the output file. We create a reloc
6314 section in dynobj and make room for the reloc. */
6315 if (sreloc == NULL)
6316 {
6317 const char *name;
6318
6319 name = bfd_elf_string_from_elf_section
6320 (abfd, elf_elfheader (abfd)->e_shstrndx,
6321 elf_section_data (sec)->rela.hdr->sh_name);
6322 if (name == NULL)
6323 return FALSE;
6324
6325 BFD_ASSERT (strncmp (name, ".rela", 5) == 0
6326 && strcmp (bfd_get_section_name (abfd, sec),
6327 name + 5) == 0);
6328
6329 sreloc = bfd_get_section_by_name (dynobj, name);
6330 if (sreloc == NULL)
6331 {
6332 flagword flags;
6333
6334 sreloc = bfd_make_section (dynobj, name);
6335 flags = (SEC_HAS_CONTENTS | SEC_READONLY
6336 | SEC_IN_MEMORY | SEC_LINKER_CREATED);
6337 if ((sec->flags & SEC_ALLOC) != 0)
6338 flags |= SEC_ALLOC | SEC_LOAD;
6339 if (sreloc == NULL
6340 || !bfd_set_section_flags (dynobj, sreloc, flags)
6341 || !bfd_set_section_alignment (dynobj, sreloc, 2))
6342 return FALSE;
6343
6344 elf_section_type (sreloc) = SHT_RELA;
6345 }
6346 elf_section_data (sec)->sreloc = sreloc;
6347 }
6348
6349 /* If this is a global symbol, we count the number of
6350 relocations we need for this symbol. */
6351 if (h != NULL)
6352 head = &((struct elf_nds32_link_hash_entry *) h)->dyn_relocs;
6353 else
6354 {
6355 asection *s;
61034b0b 6356 void *vpp;
35c08157
KLC
6357
6358 Elf_Internal_Sym *isym;
6359 isym = bfd_sym_from_r_symndx (&htab->sym_cache, abfd, r_symndx);
6360 if (isym == NULL)
6361 return FALSE;
6362
6363 /* Track dynamic relocs needed for local syms too. */
6364 s = bfd_section_from_elf_index (abfd, isym->st_shndx);
6365 if (s == NULL)
6366 return FALSE;
6367
61034b0b 6368 vpp = &elf_section_data (s)->local_dynrel;
3bf083ed 6369 head = (struct elf_dyn_relocs **) vpp;
35c08157
KLC
6370 }
6371
6372 p = *head;
6373 if (p == NULL || p->sec != sec)
6374 {
6375 bfd_size_type amt = sizeof (*p);
3bf083ed 6376 p = (struct elf_dyn_relocs *) bfd_alloc (dynobj, amt);
35c08157
KLC
6377 if (p == NULL)
6378 return FALSE;
6379 p->next = *head;
6380 *head = p;
6381 p->sec = sec;
6382 p->count = 0;
6383 p->pc_count = 0;
6384 }
6385
6386 p->count += 1;
6387 if (ELF32_R_TYPE (rel->r_info) == R_NDS32_25_PCREL_RELA
6388 || ELF32_R_TYPE (rel->r_info) == R_NDS32_15_PCREL_RELA
6389 || ELF32_R_TYPE (rel->r_info) == R_NDS32_17_PCREL_RELA)
6390 p->pc_count += 1;
6391 }
6392 break;
6393
6394 /* This relocation describes the C++ object vtable hierarchy.
6395 Reconstruct it for later use during GC. */
6396 case R_NDS32_RELA_GNU_VTINHERIT:
6397 case R_NDS32_GNU_VTINHERIT:
6398 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
6399 return FALSE;
6400 break;
6401
6402 /* This relocation describes which C++ vtable entries are actually
6403 used. Record for later use during GC. */
6404 case R_NDS32_GNU_VTENTRY:
6405 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset))
6406 return FALSE;
6407 break;
6408 case R_NDS32_RELA_GNU_VTENTRY:
6409 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
6410 return FALSE;
6411 break;
6412 }
6413 }
6414
6415 return TRUE;
6416}
6417
6418/* Write VAL in uleb128 format to P, returning a pointer to the
6419 following byte.
6420 This code is copied from elf-attr.c. */
6421
6422static bfd_byte *
6423write_uleb128 (bfd_byte *p, unsigned int val)
6424{
6425 bfd_byte c;
6426 do
6427 {
6428 c = val & 0x7f;
6429 val >>= 7;
6430 if (val)
6431 c |= 0x80;
6432 *(p++) = c;
6433 }
6434 while (val);
6435 return p;
6436}
6437
6438static bfd_signed_vma
6439calculate_offset (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
6440 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr,
6441 int *pic_ext_target)
6442{
6443 bfd_signed_vma foff;
6444 bfd_vma symval, addend;
6445 asection *sym_sec;
6446
6447 /* Get the value of the symbol referred to by the reloc. */
6448 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6449 {
6450 Elf_Internal_Sym *isym;
6451
6452 /* A local symbol. */
6453 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6454
6455 if (isym->st_shndx == SHN_UNDEF)
6456 sym_sec = bfd_und_section_ptr;
6457 else if (isym->st_shndx == SHN_ABS)
6458 sym_sec = bfd_abs_section_ptr;
6459 else if (isym->st_shndx == SHN_COMMON)
6460 sym_sec = bfd_com_section_ptr;
6461 else
6462 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6463 symval = isym->st_value + sym_sec->output_section->vma
6464 + sym_sec->output_offset;
6465 }
6466 else
6467 {
6468 unsigned long indx;
6469 struct elf_link_hash_entry *h;
6470 bfd *owner;
6471
6472 /* An external symbol. */
6473 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6474 h = elf_sym_hashes (abfd)[indx];
6475 BFD_ASSERT (h != NULL);
6476
6477 if (h->root.type != bfd_link_hash_defined
6478 && h->root.type != bfd_link_hash_defweak)
6479 /* This appears to be a reference to an undefined
6480 symbol. Just ignore it--it will be caught by the
6481 regular reloc processing. */
6482 return 0;
6483 owner = h->root.u.def.section->owner;
6484 if (owner && (elf_elfheader (owner)->e_flags & E_NDS32_HAS_PIC))
6485 *pic_ext_target = 1;
6486
6487 if (h->root.u.def.section->flags & SEC_MERGE)
6488 {
6489 sym_sec = h->root.u.def.section;
6490 symval = _bfd_merged_section_offset (abfd, &sym_sec,
6491 elf_section_data (sym_sec)->sec_info,
6492 h->root.u.def.value);
6493 symval = symval + sym_sec->output_section->vma
6494 + sym_sec->output_offset;
6495 }
6496 else
6497 symval = (h->root.u.def.value
6498 + h->root.u.def.section->output_section->vma
6499 + h->root.u.def.section->output_offset);
6500 }
6501
6502 addend = irel->r_addend;
6503
6504 foff = (symval + addend
6505 - (irel->r_offset + sec->output_section->vma + sec->output_offset));
6506 return foff;
6507}
6508
6509static bfd_vma
6510calculate_plt_memory_address (bfd *abfd, struct bfd_link_info *link_info,
6511 Elf_Internal_Sym *isymbuf,
6512 Elf_Internal_Rela *irel,
6513 Elf_Internal_Shdr *symtab_hdr)
6514{
6515 bfd_vma symval;
6516
6517 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
6518 {
6519 Elf_Internal_Sym *isym;
6520 asection *sym_sec;
6521 /* A local symbol. */
6522 isym = isymbuf + ELF32_R_SYM (irel->r_info);
6523
6524 if (isym->st_shndx == SHN_UNDEF)
6525 sym_sec = bfd_und_section_ptr;
6526 else if (isym->st_shndx == SHN_ABS)
6527 sym_sec = bfd_abs_section_ptr;
6528 else if (isym->st_shndx == SHN_COMMON)
6529 sym_sec = bfd_com_section_ptr;
6530 else
6531 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
6532 symval = isym->st_value + sym_sec->output_section->vma
6533 + sym_sec->output_offset;
6534 }
6535 else
6536 {
6537 unsigned long indx;
6538 struct elf_link_hash_entry *h;
6539 struct elf_nds32_link_hash_table *htab;
6540 asection *splt;
6541
6542 /* An external symbol. */
6543 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
6544 h = elf_sym_hashes (abfd)[indx];
6545 BFD_ASSERT (h != NULL);
6546 htab = nds32_elf_hash_table (link_info);
ce558b89 6547 splt = htab->root.splt;
35c08157
KLC
6548
6549 while (h->root.type == bfd_link_hash_indirect
6550 || h->root.type == bfd_link_hash_warning)
6551 h = (struct elf_link_hash_entry *) h->root.u.i.link;
6552
6553 if (h->plt.offset == (bfd_vma) - 1)
6554 {
6555 if (h->root.type != bfd_link_hash_defined
6556 && h->root.type != bfd_link_hash_defweak)
6557 /* This appears to be a reference to an undefined
6558 * symbol. Just ignore it--it will be caught by the
6559 * regular reloc processing. */
6560 return 0;
6561 symval = (h->root.u.def.value
6562 + h->root.u.def.section->output_section->vma
6563 + h->root.u.def.section->output_offset);
6564 }
6565 else
6566 symval = splt->output_section->vma + h->plt.offset;
6567 }
6568
6569 return symval;
6570}
6571
6572static bfd_signed_vma
6573calculate_plt_offset (bfd *abfd, asection *sec, struct bfd_link_info *link_info,
6574 Elf_Internal_Sym *isymbuf, Elf_Internal_Rela *irel,
6575 Elf_Internal_Shdr *symtab_hdr)
6576{
6577 bfd_vma foff;
6578 if ((foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
6579 symtab_hdr)) == 0)
6580 return 0;
6581 else
6582 return foff - (irel->r_offset
6583 + sec->output_section->vma + sec->output_offset);
6584}
6585\f
6586/* Convert a 32-bit instruction to 16-bit one.
6587 INSN is the input 32-bit instruction, INSN16 is the output 16-bit
6588 instruction. If INSN_TYPE is not NULL, it the CGEN instruction
6589 type of INSN16. Return 1 if successful. */
6590
6591static int
6592nds32_convert_32_to_16_alu1 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6593 int *pinsn_type)
6594{
6595 uint16_t insn16 = 0;
6cae483a 6596 int insn_type = 0;
35c08157
KLC
6597 unsigned long mach = bfd_get_mach (abfd);
6598
6599 if (N32_SH5 (insn) != 0)
6600 return 0;
6601
6602 switch (N32_SUB5 (insn))
6603 {
6604 case N32_ALU1_ADD_SLLI:
6605 case N32_ALU1_ADD_SRLI:
6606 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6607 {
6608 insn16 = N16_TYPE333 (ADD333, N32_RT5 (insn), N32_RA5 (insn),
6609 N32_RB5 (insn));
6610 insn_type = NDS32_INSN_ADD333;
6611 }
6612 else if (N32_IS_RT4 (insn))
6613 {
6614 if (N32_RT5 (insn) == N32_RA5 (insn))
6615 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RB5 (insn));
6616 else if (N32_RT5 (insn) == N32_RB5 (insn))
6617 insn16 = N16_TYPE45 (ADD45, N32_RT54 (insn), N32_RA5 (insn));
6618 insn_type = NDS32_INSN_ADD45;
6619 }
6620 break;
6621
6622 case N32_ALU1_SUB_SLLI:
6623 case N32_ALU1_SUB_SRLI:
6624 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IS_RB3 (insn))
6625 {
6626 insn16 = N16_TYPE333 (SUB333, N32_RT5 (insn), N32_RA5 (insn),
6627 N32_RB5 (insn));
6628 insn_type = NDS32_INSN_SUB333;
6629 }
6630 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6631 {
6632 insn16 = N16_TYPE45 (SUB45, N32_RT54 (insn), N32_RB5 (insn));
6633 insn_type = NDS32_INSN_SUB45;
6634 }
6635 break;
6636
6637 case N32_ALU1_AND_SLLI:
6638 case N32_ALU1_AND_SRLI:
6639 /* and $rt, $rt, $rb -> and33 for v3, v3m. */
6640 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6641 && N32_IS_RB3 (insn))
6642 {
6643 if (N32_RT5 (insn) == N32_RA5 (insn))
6644 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RB5 (insn));
6645 else if (N32_RT5 (insn) == N32_RB5 (insn))
6646 insn16 = N16_MISC33 (AND33, N32_RT5 (insn), N32_RA5 (insn));
6647 if (insn16)
6648 insn_type = NDS32_INSN_AND33;
6649 }
6650 break;
6651
6652 case N32_ALU1_XOR_SLLI:
6653 case N32_ALU1_XOR_SRLI:
6654 /* xor $rt, $rt, $rb -> xor33 for v3, v3m. */
6655 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6656 && N32_IS_RB3 (insn))
6657 {
6658 if (N32_RT5 (insn) == N32_RA5 (insn))
6659 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RB5 (insn));
6660 else if (N32_RT5 (insn) == N32_RB5 (insn))
6661 insn16 = N16_MISC33 (XOR33, N32_RT5 (insn), N32_RA5 (insn));
6662 if (insn16)
6663 insn_type = NDS32_INSN_XOR33;
6664 }
6665 break;
6666
6667 case N32_ALU1_OR_SLLI:
6668 case N32_ALU1_OR_SRLI:
6669 /* or $rt, $rt, $rb -> or33 for v3, v3m. */
6670 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6671 && N32_IS_RB3 (insn))
6672 {
6673 if (N32_RT5 (insn) == N32_RA5 (insn))
6674 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RB5 (insn));
6675 else if (N32_RT5 (insn) == N32_RB5 (insn))
6676 insn16 = N16_MISC33 (OR33, N32_RT5 (insn), N32_RA5 (insn));
6677 if (insn16)
6678 insn_type = NDS32_INSN_OR33;
6679 }
6680 break;
6681 case N32_ALU1_NOR:
6682 /* nor $rt, $ra, $ra -> not33 for v3, v3m. */
6683 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RB3 (insn)
6684 && N32_RA5 (insn) == N32_RB5 (insn))
6685 {
6686 insn16 = N16_MISC33 (NOT33, N32_RT5 (insn), N32_RA5 (insn));
6687 insn_type = NDS32_INSN_NOT33;
6688 }
6689 break;
6690 case N32_ALU1_SRAI:
6691 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6692 {
6693 insn16 = N16_TYPE45 (SRAI45, N32_RT54 (insn), N32_UB5 (insn));
6694 insn_type = NDS32_INSN_SRAI45;
6695 }
6696 break;
6697
6698 case N32_ALU1_SRLI:
6699 if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn))
6700 {
6701 insn16 = N16_TYPE45 (SRLI45, N32_RT54 (insn), N32_UB5 (insn));
6702 insn_type = NDS32_INSN_SRLI45;
6703 }
6704 break;
6705
6706 case N32_ALU1_SLLI:
6707 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_UB5 (insn) < 8)
6708 {
6709 insn16 = N16_TYPE333 (SLLI333, N32_RT5 (insn), N32_RA5 (insn),
6710 N32_UB5 (insn));
6711 insn_type = NDS32_INSN_SLLI333;
6712 }
6713 break;
6714
6715 case N32_ALU1_ZEH:
6716 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6717 {
6718 insn16 = N16_BFMI333 (ZEH33, N32_RT5 (insn), N32_RA5 (insn));
6719 insn_type = NDS32_INSN_ZEH33;
6720 }
6721 break;
6722
6723 case N32_ALU1_SEB:
6724 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6725 {
6726 insn16 = N16_BFMI333 (SEB33, N32_RT5 (insn), N32_RA5 (insn));
6727 insn_type = NDS32_INSN_SEB33;
6728 }
6729 break;
6730
6731 case N32_ALU1_SEH:
6732 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6733 {
6734 insn16 = N16_BFMI333 (SEH33, N32_RT5 (insn), N32_RA5 (insn));
6735 insn_type = NDS32_INSN_SEH33;
6736 }
6737 break;
6738
6739 case N32_ALU1_SLT:
6740 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6741 {
6742 /* Implicit r15. */
6743 insn16 = N16_TYPE45 (SLT45, N32_RA54 (insn), N32_RB5 (insn));
6744 insn_type = NDS32_INSN_SLT45;
6745 }
6746 break;
6747
6748 case N32_ALU1_SLTS:
6749 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn))
6750 {
6751 /* Implicit r15. */
6752 insn16 = N16_TYPE45 (SLTS45, N32_RA54 (insn), N32_RB5 (insn));
6753 insn_type = NDS32_INSN_SLTS45;
6754 }
6755 break;
6756 }
6757
6758 if ((insn16 & 0x8000) == 0)
6759 return 0;
6760
6761 if (pinsn16)
6762 *pinsn16 = insn16;
6763 if (pinsn_type)
6764 *pinsn_type = insn_type;
6765 return 1;
6766}
6767
6768static int
6769nds32_convert_32_to_16_alu2 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6770 int *pinsn_type)
6771{
6772 uint16_t insn16 = 0;
6773 int insn_type;
6774 unsigned long mach = bfd_get_mach (abfd);
6775
6776 /* TODO: bset, bclr, btgl, btst. */
6777 if (__GF (insn, 6, 4) != 0)
6778 return 0;
6779
6780 switch (N32_IMMU (insn, 6))
6781 {
6782 case N32_ALU2_MUL:
6783 if (mach >= MACH_V3 && N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
6784 && N32_IS_RB3 (insn))
6785 {
6786 if (N32_RT5 (insn) == N32_RA5 (insn))
6787 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RB5 (insn));
6788 else if (N32_RT5 (insn) == N32_RB5 (insn))
6789 insn16 = N16_MISC33 (MUL33, N32_RT5 (insn), N32_RA5 (insn));
6790 if (insn16)
6791 insn_type = NDS32_INSN_MUL33;
6792 }
6793 }
6794
6795 if ((insn16 & 0x8000) == 0)
6796 return 0;
6797
6798 if (pinsn16)
6799 *pinsn16 = insn16;
6800 if (pinsn_type)
6801 *pinsn_type = insn_type;
6802 return 1;
6803}
6804
6805int
6806nds32_convert_32_to_16 (bfd *abfd, uint32_t insn, uint16_t *pinsn16,
6807 int *pinsn_type)
6808{
6809 int op6;
6810 uint16_t insn16 = 0;
6811 int insn_type;
6812 unsigned long mach = bfd_get_mach (abfd);
6813
6814 /* Decode 32-bit instruction. */
6815 if (insn & 0x80000000)
6816 {
6817 /* Not 32-bit insn. */
6818 return 0;
6819 }
6820
6821 op6 = N32_OP6 (insn);
6822
6823 /* Convert it to 16-bit instruction. */
6824 switch (op6)
6825 {
6826 case N32_OP6_MOVI:
6827 if (IS_WITHIN_S (N32_IMM20S (insn), 5))
6828 {
6829 insn16 = N16_TYPE55 (MOVI55, N32_RT5 (insn), N32_IMM20S (insn));
6830 insn_type = NDS32_INSN_MOVI55;
6831 }
6832 else if (mach >= MACH_V3 && N32_IMM20S (insn) >= 16
6833 && N32_IMM20S (insn) < 48 && N32_IS_RT4 (insn))
6834 {
6835 insn16 = N16_TYPE45 (MOVPI45, N32_RT54 (insn),
6836 N32_IMM20S (insn) - 16);
6837 insn_type = NDS32_INSN_MOVPI45;
6838 }
6839 break;
6840
6841 case N32_OP6_ADDI:
6842 if (N32_IMM15S (insn) == 0)
6843 {
6844 /* Do not convert `addi $sp, $sp, 0' to `mov55 $sp, $sp',
6845 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6846 if (mach <= MACH_V2
6847 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6848 {
6849 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6850 insn_type = NDS32_INSN_MOV55;
6851 }
6852 }
6853 else if (N32_IMM15S (insn) > 0)
6854 {
6855 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) < 8)
6856 {
6857 insn16 = N16_TYPE333 (ADDI333, N32_RT5 (insn), N32_RA5 (insn),
6858 N32_IMM15S (insn));
6859 insn_type = NDS32_INSN_ADDI333;
6860 }
6861 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6862 && N32_IMM15S (insn) < 32)
6863 {
6864 insn16 = N16_TYPE45 (ADDI45, N32_RT54 (insn), N32_IMM15S (insn));
6865 insn_type = NDS32_INSN_ADDI45;
6866 }
6867 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6868 && N32_RT5 (insn) == N32_RA5 (insn)
6869 && N32_IMM15S (insn) < 512)
6870 {
6871 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6872 insn_type = NDS32_INSN_ADDI10_SP;
6873 }
6874 else if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6875 && N32_RA5 (insn) == REG_SP && N32_IMM15S (insn) < 256
6876 && (N32_IMM15S (insn) % 4 == 0))
6877 {
6878 insn16 = N16_TYPE36 (ADDRI36_SP, N32_RT5 (insn),
6879 N32_IMM15S (insn) >> 2);
6880 insn_type = NDS32_INSN_ADDRI36_SP;
6881 }
6882 }
6883 else
6884 {
6885 /* Less than 0. */
6886 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn) && N32_IMM15S (insn) > -8)
6887 {
6888 insn16 = N16_TYPE333 (SUBI333, N32_RT5 (insn), N32_RA5 (insn),
6889 0 - N32_IMM15S (insn));
6890 insn_type = NDS32_INSN_SUBI333;
6891 }
6892 else if (N32_IS_RT4 (insn) && N32_RT5 (insn) == N32_RA5 (insn)
6893 && N32_IMM15S (insn) > -32)
6894 {
1c8f6a4d
KLC
6895 insn16 = N16_TYPE45 (SUBI45, N32_RT54 (insn),
6896 0 - N32_IMM15S (insn));
35c08157
KLC
6897 insn_type = NDS32_INSN_SUBI45;
6898 }
6899 else if (mach >= MACH_V2 && N32_RT5 (insn) == REG_SP
6900 && N32_RT5 (insn) == N32_RA5 (insn)
6901 && N32_IMM15S (insn) >= -512)
6902 {
6903 insn16 = N16_TYPE10 (ADDI10S, N32_IMM15S (insn));
6904 insn_type = NDS32_INSN_ADDI10_SP;
6905 }
6906 }
6907 break;
6908
6909 case N32_OP6_ORI:
6910 if (N32_IMM15S (insn) == 0)
6911 {
6912 /* Do not convert `ori $sp, $sp, 0' to `mov55 $sp, $sp',
6913 because `mov55 $sp, $sp' is ifret16 in V3 ISA. */
6914 if (mach <= MACH_V2
6915 || N32_RT5 (insn) != REG_SP || N32_RA5 (insn) != REG_SP)
6916 {
6917 insn16 = N16_TYPE55 (MOV55, N32_RT5 (insn), N32_RA5 (insn));
6918 insn_type = NDS32_INSN_MOV55;
6919 }
6920 }
6921 break;
6922
6923 case N32_OP6_SUBRI:
6924 if (mach >= MACH_V3 && N32_IS_RT3 (insn)
6925 && N32_IS_RA3 (insn) && N32_IMM15S (insn) == 0)
6926 {
6927 insn16 = N16_MISC33 (NEG33, N32_RT5 (insn), N32_RA5 (insn));
6928 insn_type = NDS32_INSN_NEG33;
6929 }
6930 break;
6931
6932 case N32_OP6_ANDI:
6933 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn))
6934 {
6935 if (N32_IMM15U (insn) == 1)
6936 {
6937 insn16 = N16_BFMI333 (XLSB33, N32_RT5 (insn), N32_RA5 (insn));
6938 insn_type = NDS32_INSN_XLSB33;
6939 }
6940 else if (N32_IMM15U (insn) == 0x7ff)
6941 {
6942 insn16 = N16_BFMI333 (X11B33, N32_RT5 (insn), N32_RA5 (insn));
6943 insn_type = NDS32_INSN_X11B33;
6944 }
6945 else if (N32_IMM15U (insn) == 0xff)
6946 {
6947 insn16 = N16_BFMI333 (ZEB33, N32_RT5 (insn), N32_RA5 (insn));
6948 insn_type = NDS32_INSN_ZEB33;
6949 }
6950 else if (mach >= MACH_V3 && N32_RT5 (insn) == N32_RA5 (insn)
6951 && N32_IMM15U (insn) < 256)
6952 {
6953 int imm15u = N32_IMM15U (insn);
6954
6955 if (__builtin_popcount (imm15u) == 1)
6956 {
6957 /* BMSKI33 */
6958 int imm3u = __builtin_ctz (imm15u);
6959
6960 insn16 = N16_BFMI333 (BMSKI33, N32_RT5 (insn), imm3u);
6961 insn_type = NDS32_INSN_BMSKI33;
6962 }
6963 else if (imm15u != 0 && __builtin_popcount (imm15u + 1) == 1)
6964 {
6965 /* FEXTI33 */
6966 int imm3u = __builtin_ctz (imm15u + 1) - 1;
6967
6968 insn16 = N16_BFMI333 (FEXTI33, N32_RT5 (insn), imm3u);
6969 insn_type = NDS32_INSN_FEXTI33;
6970 }
6971 }
6972 }
6973 break;
6974
6975 case N32_OP6_SLTI:
6976 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6977 && IS_WITHIN_U (N32_IMM15S (insn), 5))
6978 {
6979 insn16 = N16_TYPE45 (SLTI45, N32_RA54 (insn), N32_IMM15S (insn));
6980 insn_type = NDS32_INSN_SLTI45;
6981 }
6982 break;
6983
6984 case N32_OP6_SLTSI:
6985 if (N32_RT5 (insn) == REG_R15 && N32_IS_RA4 (insn)
6986 && IS_WITHIN_U (N32_IMM15S (insn), 5))
6987 {
6988 insn16 = N16_TYPE45 (SLTSI45, N32_RA54 (insn), N32_IMM15S (insn));
6989 insn_type = NDS32_INSN_SLTSI45;
6990 }
6991 break;
6992
6993 case N32_OP6_LWI:
6994 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
6995 {
6996 insn16 = N16_TYPE45 (LWI450, N32_RT54 (insn), N32_RA5 (insn));
6997 insn_type = NDS32_INSN_LWI450;
6998 }
6999 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7000 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7001 {
7002 insn16 = N16_TYPE333 (LWI333, N32_RT5 (insn), N32_RA5 (insn),
7003 N32_IMM15S (insn));
7004 insn_type = NDS32_INSN_LWI333;
7005 }
7006 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7007 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7008 {
7009 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7010 insn_type = NDS32_INSN_LWI37;
7011 }
7012 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7013 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7014 {
7015 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 0, N32_IMM15S (insn));
7016 insn_type = NDS32_INSN_LWI37_SP;
7017 }
7018 else if (mach >= MACH_V2 && N32_IS_RT4 (insn) && N32_RA5 (insn) == REG_R8
7019 && -32 <= N32_IMM15S (insn) && N32_IMM15S (insn) < 0)
7020 {
1c8f6a4d
KLC
7021 insn16 = N16_TYPE45 (LWI45_FE, N32_RT54 (insn),
7022 N32_IMM15S (insn) + 32);
35c08157
KLC
7023 insn_type = NDS32_INSN_LWI45_FE;
7024 }
7025 break;
7026
7027 case N32_OP6_SWI:
7028 if (N32_IS_RT4 (insn) && N32_IMM15S (insn) == 0)
7029 {
7030 insn16 = N16_TYPE45 (SWI450, N32_RT54 (insn), N32_RA5 (insn));
7031 insn_type = NDS32_INSN_SWI450;
7032 }
7033 else if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7034 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7035 {
1c8f6a4d
KLC
7036 insn16 = N16_TYPE333 (SWI333, N32_RT5 (insn), N32_RA5 (insn),
7037 N32_IMM15S (insn));
35c08157
KLC
7038 insn_type = NDS32_INSN_SWI333;
7039 }
7040 else if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_FP
7041 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7042 {
7043 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7044 insn_type = NDS32_INSN_SWI37;
7045 }
7046 else if (mach >= MACH_V2 && N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_SP
7047 && IS_WITHIN_U (N32_IMM15S (insn), 7))
7048 {
7049 insn16 = N16_TYPE37 (XWI37SP, N32_RT5 (insn), 1, N32_IMM15S (insn));
7050 insn_type = NDS32_INSN_SWI37_SP;
7051 }
7052 break;
7053
7054 case N32_OP6_LWI_BI:
7055 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7056 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7057 {
7058 insn16 = N16_TYPE333 (LWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7059 N32_IMM15S (insn));
7060 insn_type = NDS32_INSN_LWI333_BI;
7061 }
7062 break;
7063
7064 case N32_OP6_SWI_BI:
7065 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7066 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7067 {
7068 insn16 = N16_TYPE333 (SWI333_BI, N32_RT5 (insn), N32_RA5 (insn),
7069 N32_IMM15S (insn));
7070 insn_type = NDS32_INSN_SWI333_BI;
7071 }
7072 break;
7073
7074 case N32_OP6_LHI:
7075 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7076 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7077 {
7078 insn16 = N16_TYPE333 (LHI333, N32_RT5 (insn), N32_RA5 (insn),
7079 N32_IMM15S (insn));
7080 insn_type = NDS32_INSN_LHI333;
7081 }
7082 break;
7083
7084 case N32_OP6_SHI:
7085 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7086 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7087 {
7088 insn16 = N16_TYPE333 (SHI333, N32_RT5 (insn), N32_RA5 (insn),
7089 N32_IMM15S (insn));
7090 insn_type = NDS32_INSN_SHI333;
7091 }
7092 break;
7093
7094 case N32_OP6_LBI:
7095 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7096 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7097 {
7098 insn16 = N16_TYPE333 (LBI333, N32_RT5 (insn), N32_RA5 (insn),
7099 N32_IMM15S (insn));
7100 insn_type = NDS32_INSN_LBI333;
7101 }
7102 break;
7103
7104 case N32_OP6_SBI:
7105 if (N32_IS_RT3 (insn) && N32_IS_RA3 (insn)
7106 && IS_WITHIN_U (N32_IMM15S (insn), 3))
7107 {
7108 insn16 = N16_TYPE333 (SBI333, N32_RT5 (insn), N32_RA5 (insn),
7109 N32_IMM15S (insn));
7110 insn_type = NDS32_INSN_SBI333;
7111 }
7112 break;
7113
7114 case N32_OP6_ALU1:
7115 return nds32_convert_32_to_16_alu1 (abfd, insn, pinsn16, pinsn_type);
7116
7117 case N32_OP6_ALU2:
7118 return nds32_convert_32_to_16_alu2 (abfd, insn, pinsn16, pinsn_type);
7119
7120 case N32_OP6_BR1:
7121 if (!IS_WITHIN_S (N32_IMM14S (insn), 8))
7122 goto done;
7123
4ec521f2 7124 if ((insn & N32_BIT (14)) == 0)
35c08157
KLC
7125 {
7126 /* N32_BR1_BEQ */
7127 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7128 && N32_RT5 (insn) != REG_R5)
7129 insn16 = N16_TYPE38 (BEQS38, N32_RT5 (insn), N32_IMM14S (insn));
7130 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7131 && N32_RA5 (insn) != REG_R5)
7132 insn16 = N16_TYPE38 (BEQS38, N32_RA5 (insn), N32_IMM14S (insn));
7133 insn_type = NDS32_INSN_BEQS38;
7134 break;
7135 }
7136 else
7137 {
7138 /* N32_BR1_BNE */
7139 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5
7140 && N32_RT5 (insn) != REG_R5)
7141 insn16 = N16_TYPE38 (BNES38, N32_RT5 (insn), N32_IMM14S (insn));
7142 else if (N32_IS_RA3 (insn) && N32_RT5 (insn) == REG_R5
7143 && N32_RA5 (insn) != REG_R5)
7144 insn16 = N16_TYPE38 (BNES38, N32_RA5 (insn), N32_IMM14S (insn));
7145 insn_type = NDS32_INSN_BNES38;
7146 break;
7147 }
7148 break;
7149
7150 case N32_OP6_BR2:
7151 switch (N32_BR2_SUB (insn))
7152 {
7153 case N32_BR2_BEQZ:
7154 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7155 {
7156 insn16 = N16_TYPE38 (BEQZ38, N32_RT5 (insn), N32_IMM16S (insn));
7157 insn_type = NDS32_INSN_BEQZ38;
7158 }
1c8f6a4d
KLC
7159 else if (N32_RT5 (insn) == REG_R15
7160 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7161 {
7162 insn16 = N16_TYPE8 (BEQZS8, N32_IMM16S (insn));
7163 insn_type = NDS32_INSN_BEQZS8;
7164 }
7165 break;
7166
7167 case N32_BR2_BNEZ:
7168 if (N32_IS_RT3 (insn) && IS_WITHIN_S (N32_IMM16S (insn), 8))
7169 {
7170 insn16 = N16_TYPE38 (BNEZ38, N32_RT5 (insn), N32_IMM16S (insn));
7171 insn_type = NDS32_INSN_BNEZ38;
7172 }
1c8f6a4d
KLC
7173 else if (N32_RT5 (insn) == REG_R15
7174 && IS_WITHIN_S (N32_IMM16S (insn), 8))
35c08157
KLC
7175 {
7176 insn16 = N16_TYPE8 (BNEZS8, N32_IMM16S (insn));
7177 insn_type = NDS32_INSN_BNEZS8;
7178 }
7179 break;
7180
7181 case N32_BR2_IFCALL:
7182 if (IS_WITHIN_U (N32_IMM16S (insn), 9))
7183 {
7184 insn16 = N16_TYPE9 (IFCALL9, N32_IMM16S (insn));
7185 insn_type = NDS32_INSN_IFCALL9;
7186 }
7187 break;
7188 }
7189 break;
7190
7191 case N32_OP6_JI:
4ec521f2 7192 if ((insn & N32_BIT (24)) == 0)
35c08157
KLC
7193 {
7194 /* N32_JI_J */
7195 if (IS_WITHIN_S (N32_IMM24S (insn), 8))
7196 {
7197 insn16 = N16_TYPE8 (J8, N32_IMM24S (insn));
7198 insn_type = NDS32_INSN_J8;
7199 }
7200 }
7201 break;
7202
7203 case N32_OP6_JREG:
7204 if (__GF (insn, 8, 2) != 0)
7205 goto done;
7206
7207 switch (N32_IMMU (insn, 5))
7208 {
7209 case N32_JREG_JR:
7210 if (N32_JREG_HINT (insn) == 0)
7211 {
7212 /* jr */
7213 insn16 = N16_TYPE5 (JR5, N32_RB5 (insn));
7214 insn_type = NDS32_INSN_JR5;
7215 }
7216 else if (N32_JREG_HINT (insn) == 1)
7217 {
7218 /* ret */
7219 insn16 = N16_TYPE5 (RET5, N32_RB5 (insn));
7220 insn_type = NDS32_INSN_RET5;
7221 }
7222 else if (N32_JREG_HINT (insn) == 3)
7223 {
7224 /* ifret = mov55 $sp, $sp */
7225 insn16 = N16_TYPE55 (MOV55, REG_SP, REG_SP);
7226 insn_type = NDS32_INSN_IFRET;
7227 }
7228 break;
7229
7230 case N32_JREG_JRAL:
7231 /* It's convertible when return rt5 is $lp and address
7232 translation is kept. */
7233 if (N32_RT5 (insn) == REG_LP && N32_JREG_HINT (insn) == 0)
7234 {
7235 insn16 = N16_TYPE5 (JRAL5, N32_RB5 (insn));
7236 insn_type = NDS32_INSN_JRAL5;
7237 }
7238 break;
7239 }
7240 break;
7241
7242 case N32_OP6_MISC:
7243 if (N32_SUB5 (insn) == N32_MISC_BREAK && N32_SWID (insn) < 32)
7244 {
7245 /* For v3, swid above 31 are used for ex9.it. */
7246 insn16 = N16_TYPE5 (BREAK16, N32_SWID (insn));
7247 insn_type = NDS32_INSN_BREAK16;
7248 }
7249 break;
7250
7251 default:
7252 /* This instruction has no 16-bit variant. */
7253 goto done;
7254 }
7255
7256done:
7257 /* Bit-15 of insn16 should be set for a valid instruction. */
7258 if ((insn16 & 0x8000) == 0)
7259 return 0;
7260
7261 if (pinsn16)
7262 *pinsn16 = insn16;
7263 if (pinsn_type)
7264 *pinsn_type = insn_type;
7265 return 1;
7266}
7267
7268static int
7269special_convert_32_to_16 (unsigned long insn, uint16_t *pinsn16,
7270 Elf_Internal_Rela *reloc)
7271{
7272 uint16_t insn16 = 0;
7273
7274 if ((reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG) == 0
7275 || (ELF32_R_TYPE (reloc->r_info) != R_NDS32_INSN16))
7276 return 0;
7277
7278 if (!N32_IS_RT3 (insn))
7279 return 0;
7280
7281 switch (N32_OP6 (insn))
7282 {
7283 case N32_OP6_LWI:
7284 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7285 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM15S (insn));
7286 break;
7287 case N32_OP6_SWI:
7288 if (N32_RA5 (insn) == REG_GP && IS_WITHIN_U (N32_IMM15S (insn), 7))
7289 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM15S (insn));
7290 break;
7291 case N32_OP6_HWGP:
7292 if (!IS_WITHIN_U (N32_IMM17S (insn), 7))
7293 break;
7294
7295 if (__GF (insn, 17, 3) == 6)
7296 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 0, N32_IMM17S (insn));
7297 else if (__GF (insn, 17, 3) == 7)
7298 insn16 = N16_TYPE37 (XWI37, N32_RT5 (insn), 1, N32_IMM17S (insn));
7299 break;
7300 }
7301
7302 if ((insn16 & 0x8000) == 0)
7303 return 0;
7304
7305 *pinsn16 = insn16;
7306 return 1;
7307}
7308
7309/* Convert a 16-bit instruction to 32-bit one.
7310 INSN16 it the input and PINSN it the point to output.
7311 Return non-zero on successful. Otherwise 0 is returned. */
7312
7313int
7314nds32_convert_16_to_32 (bfd *abfd, uint16_t insn16, uint32_t *pinsn)
7315{
7316 uint32_t insn = 0xffffffff;
7317 unsigned long mach = bfd_get_mach (abfd);
7318
7319 /* NOTE: push25, pop25 and movd44 do not have 32-bit variants. */
7320
7321 switch (__GF (insn16, 9, 6))
7322 {
7323 case 0x4: /* add45 */
1c8f6a4d
KLC
7324 insn = N32_ALU1 (ADD, N16_RT4 (insn16), N16_RT4 (insn16),
7325 N16_RA5 (insn16));
35c08157
KLC
7326 goto done;
7327 case 0x5: /* sub45 */
1c8f6a4d
KLC
7328 insn = N32_ALU1 (SUB, N16_RT4 (insn16), N16_RT4 (insn16),
7329 N16_RA5 (insn16));
35c08157
KLC
7330 goto done;
7331 case 0x6: /* addi45 */
1c8f6a4d
KLC
7332 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7333 N16_IMM5U (insn16));
35c08157
KLC
7334 goto done;
7335 case 0x7: /* subi45 */
1c8f6a4d
KLC
7336 insn = N32_TYPE2 (ADDI, N16_RT4 (insn16), N16_RT4 (insn16),
7337 -N16_IMM5U (insn16));
35c08157
KLC
7338 goto done;
7339 case 0x8: /* srai45 */
1c8f6a4d
KLC
7340 insn = N32_ALU1 (SRAI, N16_RT4 (insn16), N16_RT4 (insn16),
7341 N16_IMM5U (insn16));
35c08157
KLC
7342 goto done;
7343 case 0x9: /* srli45 */
1c8f6a4d
KLC
7344 insn = N32_ALU1 (SRLI, N16_RT4 (insn16), N16_RT4 (insn16),
7345 N16_IMM5U (insn16));
35c08157 7346 goto done;
35c08157 7347 case 0xa: /* slli333 */
1c8f6a4d
KLC
7348 insn = N32_ALU1 (SLLI, N16_RT3 (insn16), N16_RA3 (insn16),
7349 N16_IMM3U (insn16));
35c08157
KLC
7350 goto done;
7351 case 0xc: /* add333 */
1c8f6a4d
KLC
7352 insn = N32_ALU1 (ADD, N16_RT3 (insn16), N16_RA3 (insn16),
7353 N16_RB3 (insn16));
35c08157
KLC
7354 goto done;
7355 case 0xd: /* sub333 */
1c8f6a4d
KLC
7356 insn = N32_ALU1 (SUB, N16_RT3 (insn16), N16_RA3 (insn16),
7357 N16_RB3 (insn16));
35c08157
KLC
7358 goto done;
7359 case 0xe: /* addi333 */
1c8f6a4d
KLC
7360 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7361 N16_IMM3U (insn16));
35c08157
KLC
7362 goto done;
7363 case 0xf: /* subi333 */
1c8f6a4d
KLC
7364 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), N16_RA3 (insn16),
7365 -N16_IMM3U (insn16));
35c08157 7366 goto done;
35c08157 7367 case 0x10: /* lwi333 */
1c8f6a4d
KLC
7368 insn = N32_TYPE2 (LWI, N16_RT3 (insn16), N16_RA3 (insn16),
7369 N16_IMM3U (insn16));
35c08157
KLC
7370 goto done;
7371 case 0x12: /* lhi333 */
1c8f6a4d
KLC
7372 insn = N32_TYPE2 (LHI, N16_RT3 (insn16), N16_RA3 (insn16),
7373 N16_IMM3U (insn16));
35c08157
KLC
7374 goto done;
7375 case 0x13: /* lbi333 */
1c8f6a4d
KLC
7376 insn = N32_TYPE2 (LBI, N16_RT3 (insn16), N16_RA3 (insn16),
7377 N16_IMM3U (insn16));
35c08157
KLC
7378 goto done;
7379 case 0x11: /* lwi333.bi */
1c8f6a4d
KLC
7380 insn = N32_TYPE2 (LWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7381 N16_IMM3U (insn16));
35c08157
KLC
7382 goto done;
7383 case 0x14: /* swi333 */
1c8f6a4d
KLC
7384 insn = N32_TYPE2 (SWI, N16_RT3 (insn16), N16_RA3 (insn16),
7385 N16_IMM3U (insn16));
35c08157
KLC
7386 goto done;
7387 case 0x16: /* shi333 */
1c8f6a4d
KLC
7388 insn = N32_TYPE2 (SHI, N16_RT3 (insn16), N16_RA3 (insn16),
7389 N16_IMM3U (insn16));
35c08157
KLC
7390 goto done;
7391 case 0x17: /* sbi333 */
1c8f6a4d
KLC
7392 insn = N32_TYPE2 (SBI, N16_RT3 (insn16), N16_RA3 (insn16),
7393 N16_IMM3U (insn16));
35c08157
KLC
7394 goto done;
7395 case 0x15: /* swi333.bi */
1c8f6a4d
KLC
7396 insn = N32_TYPE2 (SWI_BI, N16_RT3 (insn16), N16_RA3 (insn16),
7397 N16_IMM3U (insn16));
35c08157 7398 goto done;
35c08157 7399 case 0x18: /* addri36.sp */
1c8f6a4d
KLC
7400 insn = N32_TYPE2 (ADDI, N16_RT3 (insn16), REG_SP,
7401 N16_IMM6U (insn16) << 2);
35c08157 7402 goto done;
35c08157 7403 case 0x19: /* lwi45.fe */
1c8f6a4d
KLC
7404 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), REG_R8,
7405 (N16_IMM5U (insn16) - 32));
35c08157
KLC
7406 goto done;
7407 case 0x1a: /* lwi450 */
7408 insn = N32_TYPE2 (LWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7409 goto done;
7410 case 0x1b: /* swi450 */
7411 insn = N32_TYPE2 (SWI, N16_RT4 (insn16), N16_RA5 (insn16), 0);
7412 goto done;
7413
1c8f6a4d 7414 /* These are r15 implied instructions. */
35c08157
KLC
7415 case 0x30: /* slts45 */
7416 insn = N32_ALU1 (SLTS, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7417 goto done;
7418 case 0x31: /* slt45 */
7419 insn = N32_ALU1 (SLT, REG_TA, N16_RT4 (insn16), N16_RA5 (insn16));
7420 goto done;
7421 case 0x32: /* sltsi45 */
7422 insn = N32_TYPE2 (SLTSI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7423 goto done;
7424 case 0x33: /* slti45 */
7425 insn = N32_TYPE2 (SLTI, REG_TA, N16_RT4 (insn16), N16_IMM5U (insn16));
7426 goto done;
7427 case 0x34: /* beqzs8, bnezs8 */
4ec521f2 7428 if (insn16 & N32_BIT (8))
35c08157
KLC
7429 insn = N32_BR2 (BNEZ, REG_TA, N16_IMM8S (insn16));
7430 else
7431 insn = N32_BR2 (BEQZ, REG_TA, N16_IMM8S (insn16));
7432 goto done;
7433
7434 case 0x35: /* break16, ex9.it */
7435 /* Only consider range of v3 break16. */
7436 insn = N32_TYPE0 (MISC, (N16_IMM5U (insn16) << 5) | N32_MISC_BREAK);
7437 goto done;
7438
7439 case 0x3c: /* ifcall9 */
7440 insn = N32_BR2 (IFCALL, 0, N16_IMM9U (insn16));
7441 goto done;
7442 case 0x3d: /* movpi45 */
7443 insn = N32_TYPE1 (MOVI, N16_RT4 (insn16), N16_IMM5U (insn16) + 16);
7444 goto done;
7445
7446 case 0x3f: /* MISC33 */
1c8f6a4d 7447 switch (insn16 & 0x7)
35c08157
KLC
7448 {
7449 case 2: /* neg33 */
7450 insn = N32_TYPE2 (SUBRI, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7451 break;
7452 case 3: /* not33 */
1c8f6a4d
KLC
7453 insn = N32_ALU1 (NOR, N16_RT3 (insn16), N16_RA3 (insn16),
7454 N16_RA3 (insn16));
35c08157
KLC
7455 break;
7456 case 4: /* mul33 */
1c8f6a4d
KLC
7457 insn = N32_ALU2 (MUL, N16_RT3 (insn16), N16_RT3 (insn16),
7458 N16_RA3 (insn16));
35c08157
KLC
7459 break;
7460 case 5: /* xor33 */
1c8f6a4d
KLC
7461 insn = N32_ALU1 (XOR, N16_RT3 (insn16), N16_RT3 (insn16),
7462 N16_RA3 (insn16));
35c08157
KLC
7463 break;
7464 case 6: /* and33 */
1c8f6a4d
KLC
7465 insn = N32_ALU1 (AND, N16_RT3 (insn16), N16_RT3 (insn16),
7466 N16_RA3 (insn16));
35c08157
KLC
7467 break;
7468 case 7: /* or33 */
1c8f6a4d
KLC
7469 insn = N32_ALU1 (OR, N16_RT3 (insn16), N16_RT3 (insn16),
7470 N16_RA3 (insn16));
35c08157
KLC
7471 break;
7472 }
7473 goto done;
7474
1c8f6a4d 7475 case 0xb:
35c08157
KLC
7476 switch (insn16 & 0x7)
7477 {
7478 case 0: /* zeb33 */
7479 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0xff);
7480 break;
7481 case 1: /* zeh33 */
7482 insn = N32_ALU1 (ZEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7483 break;
7484 case 2: /* seb33 */
7485 insn = N32_ALU1 (SEB, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7486 break;
7487 case 3: /* seh33 */
7488 insn = N32_ALU1 (SEH, N16_RT3 (insn16), N16_RA3 (insn16), 0);
7489 break;
7490 case 4: /* xlsb33 */
7491 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 1);
7492 break;
7493 case 5: /* x11b33 */
7494 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RA3 (insn16), 0x7ff);
7495 break;
7496 case 6: /* bmski33 */
7497 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7498 1 << __GF (insn16, 3, 3));
35c08157
KLC
7499 break;
7500 case 7: /* fexti33 */
7501 insn = N32_TYPE2 (ANDI, N16_RT3 (insn16), N16_RT3 (insn16),
1c8f6a4d 7502 (1 << (__GF (insn16, 3, 3) + 1)) - 1);
35c08157
KLC
7503 break;
7504 }
7505 goto done;
7506 }
7507
7508 switch (__GF (insn16, 10, 5))
7509 {
7510 case 0x0: /* mov55 or ifret16 */
7511 if (mach >= MACH_V3 && N16_RT5 (insn16) == REG_SP
7512 && N16_RT5 (insn16) == N16_RA5 (insn16))
1c8f6a4d 7513 insn = N32_JREG (JR, 0, 0, 0, 3);
35c08157 7514 else
1c8f6a4d 7515 insn = N32_TYPE2 (ADDI, N16_RT5 (insn16), N16_RA5 (insn16), 0);
35c08157
KLC
7516 goto done;
7517 case 0x1: /* movi55 */
7518 insn = N32_TYPE1 (MOVI, N16_RT5 (insn16), N16_IMM5S (insn16));
7519 goto done;
7520 case 0x1b: /* addi10s (V2) */
7521 insn = N32_TYPE2 (ADDI, REG_SP, REG_SP, N16_IMM10S (insn16));
7522 goto done;
7523 }
7524
7525 switch (__GF (insn16, 11, 4))
7526 {
7527 case 0x7: /* lwi37.fp/swi37.fp */
4ec521f2 7528 if (insn16 & N32_BIT (7)) /* swi37.fp */
35c08157
KLC
7529 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7530 else /* lwi37.fp */
7531 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_FP, N16_IMM7U (insn16));
7532 goto done;
7533 case 0x8: /* beqz38 */
7534 insn = N32_BR2 (BEQZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7535 goto done;
7536 case 0x9: /* bnez38 */
7537 insn = N32_BR2 (BNEZ, N16_RT38 (insn16), N16_IMM8S (insn16));
7538 goto done;
7539 case 0xa: /* beqs38/j8, implied r5 */
7540 if (N16_RT38 (insn16) == 5)
7541 insn = N32_JI (J, N16_IMM8S (insn16));
7542 else
7543 insn = N32_BR1 (BEQ, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7544 goto done;
7545 case 0xb: /* bnes38 and others */
7546 if (N16_RT38 (insn16) == 5)
7547 {
7548 switch (__GF (insn16, 5, 3))
7549 {
7550 case 0: /* jr5 */
7551 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 0);
7552 break;
7553 case 4: /* ret5 */
7554 insn = N32_JREG (JR, 0, N16_RA5 (insn16), 0, 1);
7555 break;
7556 case 1: /* jral5 */
7557 insn = N32_JREG (JRAL, REG_LP, N16_RA5 (insn16), 0, 0);
7558 break;
7559 case 2: /* ex9.it imm5 */
7560 /* ex9.it had no 32-bit variantl. */
7561 break;
7562 case 5: /* add5.pc */
7563 /* add5.pc had no 32-bit variantl. */
7564 break;
7565 }
7566 }
7567 else /* bnes38 */
7568 insn = N32_BR1 (BNE, N16_RT38 (insn16), REG_R5, N16_IMM8S (insn16));
7569 goto done;
7570 case 0xe: /* lwi37/swi37 */
7571 if (insn16 & (1 << 7)) /* swi37.sp */
7572 insn = N32_TYPE2 (SWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7573 else /* lwi37.sp */
7574 insn = N32_TYPE2 (LWI, N16_RT38 (insn16), REG_SP, N16_IMM7U (insn16));
7575 goto done;
7576 }
7577
7578done:
7579 if (insn & 0x80000000)
7580 return 0;
7581
7582 if (pinsn)
7583 *pinsn = insn;
7584 return 1;
7585}
7586\f
7587static bfd_boolean
7588is_sda_access_insn (unsigned long insn)
7589{
7590 switch (N32_OP6 (insn))
7591 {
7592 case N32_OP6_LWI:
7593 case N32_OP6_LHI:
7594 case N32_OP6_LHSI:
7595 case N32_OP6_LBI:
7596 case N32_OP6_LBSI:
7597 case N32_OP6_SWI:
7598 case N32_OP6_SHI:
7599 case N32_OP6_SBI:
7600 case N32_OP6_LWC:
7601 case N32_OP6_LDC:
7602 case N32_OP6_SWC:
7603 case N32_OP6_SDC:
7604 return TRUE;
7605 default:
7606 ;
7607 }
7608 return FALSE;
7609}
7610
7611static unsigned long
7612turn_insn_to_sda_access (uint32_t insn, bfd_signed_vma type, uint32_t *pinsn)
7613{
7614 uint32_t oinsn = 0;
7615
7616 switch (type)
7617 {
7618 case R_NDS32_GOT_LO12:
7619 case R_NDS32_GOTOFF_LO12:
7620 case R_NDS32_PLTREL_LO12:
7621 case R_NDS32_PLT_GOTREL_LO12:
7622 case R_NDS32_LO12S0_RELA:
7623 switch (N32_OP6 (insn))
7624 {
7625 case N32_OP6_LBI:
7626 /* lbi.gp */
7627 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
7628 break;
7629 case N32_OP6_LBSI:
7630 /* lbsi.gp */
4ec521f2 7631 oinsn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7632 break;
7633 case N32_OP6_SBI:
7634 /* sbi.gp */
7635 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
7636 break;
7637 case N32_OP6_ORI:
7638 /* addi.gp */
4ec521f2 7639 oinsn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7640 break;
7641 }
7642 break;
7643
7644 case R_NDS32_LO12S1_RELA:
7645 switch (N32_OP6 (insn))
7646 {
7647 case N32_OP6_LHI:
7648 /* lhi.gp */
7649 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
7650 break;
7651 case N32_OP6_LHSI:
7652 /* lhsi.gp */
4ec521f2 7653 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
35c08157
KLC
7654 break;
7655 case N32_OP6_SHI:
7656 /* shi.gp */
4ec521f2 7657 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
35c08157
KLC
7658 break;
7659 }
7660 break;
7661
7662 case R_NDS32_LO12S2_RELA:
7663 switch (N32_OP6 (insn))
7664 {
7665 case N32_OP6_LWI:
7666 /* lwi.gp */
7667 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
7668 break;
7669 case N32_OP6_SWI:
7670 /* swi.gp */
7671 oinsn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
7672 break;
7673 }
7674 break;
7675
7676 case R_NDS32_LO12S2_DP_RELA:
7677 case R_NDS32_LO12S2_SP_RELA:
7678 oinsn = (insn & 0x7ff07000) | (REG_GP << 15);
7679 break;
7680 }
7681
7682 if (oinsn)
7683 *pinsn = oinsn;
7684
7685 return oinsn != 0;
7686}
7687
7688/* Linker hasn't found the correct merge section for non-section symbol
7689 in relax time, this work is left to the function elf_link_input_bfd().
7690 So for non-section symbol, _bfd_merged_section_offset is also needed
7691 to find the correct symbol address. */
7692
7693static bfd_vma
7694nds32_elf_rela_local_sym (bfd *abfd, Elf_Internal_Sym *sym,
7695 asection **psec, Elf_Internal_Rela *rel)
7696{
7697 asection *sec = *psec;
7698 bfd_vma relocation;
7699
7700 relocation = (sec->output_section->vma
7701 + sec->output_offset + sym->st_value);
7702 if ((sec->flags & SEC_MERGE) && sec->sec_info_type == SEC_INFO_TYPE_MERGE)
7703 {
7704 if (ELF_ST_TYPE (sym->st_info) == STT_SECTION)
7705 rel->r_addend =
7706 _bfd_merged_section_offset (abfd, psec,
7707 elf_section_data (sec)->sec_info,
7708 sym->st_value + rel->r_addend);
7709 else
7710 rel->r_addend =
7711 _bfd_merged_section_offset (abfd, psec,
7712 elf_section_data (sec)->sec_info,
7713 sym->st_value) + rel->r_addend;
7714
7715 if (sec != *psec)
7716 {
7717 /* If we have changed the section, and our original section is
7718 marked with SEC_EXCLUDE, it means that the original
7719 SEC_MERGE section has been completely subsumed in some
7720 other SEC_MERGE section. In this case, we need to leave
7721 some info around for --emit-relocs. */
7722 if ((sec->flags & SEC_EXCLUDE) != 0)
7723 sec->kept_section = *psec;
7724 sec = *psec;
7725 }
7726 rel->r_addend -= relocation;
7727 rel->r_addend += sec->output_section->vma + sec->output_offset;
7728 }
7729 return relocation;
7730}
7731
7732static bfd_vma
7733calculate_memory_address (bfd *abfd, Elf_Internal_Rela *irel,
7734 Elf_Internal_Sym *isymbuf,
7735 Elf_Internal_Shdr *symtab_hdr)
7736{
7737 bfd_signed_vma foff;
7738 bfd_vma symval, addend;
7739 Elf_Internal_Rela irel_fn;
7740 Elf_Internal_Sym *isym;
7741 asection *sym_sec;
7742
7743 /* Get the value of the symbol referred to by the reloc. */
7744 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
7745 {
7746 /* A local symbol. */
7747 isym = isymbuf + ELF32_R_SYM (irel->r_info);
7748
7749 if (isym->st_shndx == SHN_UNDEF)
7750 sym_sec = bfd_und_section_ptr;
7751 else if (isym->st_shndx == SHN_ABS)
7752 sym_sec = bfd_abs_section_ptr;
7753 else if (isym->st_shndx == SHN_COMMON)
7754 sym_sec = bfd_com_section_ptr;
7755 else
7756 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
7757 memcpy (&irel_fn, irel, sizeof (Elf_Internal_Rela));
7758 symval = nds32_elf_rela_local_sym (abfd, isym, &sym_sec, &irel_fn);
7759 addend = irel_fn.r_addend;
7760 }
7761 else
7762 {
7763 unsigned long indx;
7764 struct elf_link_hash_entry *h;
7765
7766 /* An external symbol. */
7767 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7768 h = elf_sym_hashes (abfd)[indx];
7769 BFD_ASSERT (h != NULL);
7770
7771 while (h->root.type == bfd_link_hash_indirect
7772 || h->root.type == bfd_link_hash_warning)
7773 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7774
7775 if (h->root.type != bfd_link_hash_defined
7776 && h->root.type != bfd_link_hash_defweak)
7777 /* This appears to be a reference to an undefined
7778 symbol. Just ignore it--it will be caught by the
7779 regular reloc processing. */
7780 return 0;
7781
7782 if (h->root.u.def.section->flags & SEC_MERGE)
7783 {
7784 sym_sec = h->root.u.def.section;
7785 symval = _bfd_merged_section_offset (abfd, &sym_sec, elf_section_data
7786 (sym_sec)->sec_info, h->root.u.def.value);
7787 symval = symval + sym_sec->output_section->vma
7788 + sym_sec->output_offset;
7789 }
7790 else
7791 symval = (h->root.u.def.value
7792 + h->root.u.def.section->output_section->vma
7793 + h->root.u.def.section->output_offset);
7794 addend = irel->r_addend;
7795 }
7796
7797 foff = symval + addend;
7798
7799 return foff;
7800}
7801
7802static bfd_vma
7803calculate_got_memory_address (bfd *abfd, struct bfd_link_info *link_info,
7804 Elf_Internal_Rela *irel,
7805 Elf_Internal_Shdr *symtab_hdr)
7806{
7807 int symndx;
7808 bfd_vma *local_got_offsets;
7809 /* Get the value of the symbol referred to by the reloc. */
7810 struct elf_link_hash_entry *h;
7811 struct elf_nds32_link_hash_table *htab = nds32_elf_hash_table (link_info);
7812
7813 /* An external symbol. */
7814 symndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
7815 h = elf_sym_hashes (abfd)[symndx];
7816 while (h->root.type == bfd_link_hash_indirect
7817 || h->root.type == bfd_link_hash_warning)
7818 h = (struct elf_link_hash_entry *) h->root.u.i.link;
7819
7820 if (symndx >= 0)
7821 {
7822 BFD_ASSERT (h != NULL);
ce558b89
AM
7823 return (htab->root.sgot->output_section->vma
7824 + htab->root.sgot->output_offset
7825 + h->got.offset);
35c08157
KLC
7826 }
7827 else
7828 {
7829 local_got_offsets = elf_local_got_offsets (abfd);
7830 BFD_ASSERT (local_got_offsets != NULL);
ce558b89
AM
7831 return (htab->root.sgot->output_section->vma
7832 + htab->root.sgot->output_offset
7833 + local_got_offsets[ELF32_R_SYM (irel->r_info)]);
35c08157
KLC
7834 }
7835
7836 /* The _GLOBAL_OFFSET_TABLE_ may be undefweak(or should be?). */
7837 /* The check of h->root.type is passed. */
7838}
7839
7840static int
7841is_16bit_NOP (bfd *abfd ATTRIBUTE_UNUSED,
7842 asection *sec, Elf_Internal_Rela *rel)
7843{
7844 bfd_byte *contents;
7845 unsigned short insn16;
7846
7847 if (!(rel->r_addend & R_NDS32_INSN16_CONVERT_FLAG))
7848 return FALSE;
7849 contents = elf_section_data (sec)->this_hdr.contents;
7850 insn16 = bfd_getb16 (contents + rel->r_offset);
7851 if (insn16 == NDS32_NOP16)
7852 return TRUE;
7853 return FALSE;
7854}
7855
7856/* It checks whether the instruction could be converted to
7857 16-bit form and returns the converted one.
7858
7859 `internal_relocs' is supposed to be sorted. */
7860
7861static int
7862is_convert_32_to_16 (bfd *abfd, asection *sec,
7863 Elf_Internal_Rela *reloc,
7864 Elf_Internal_Rela *internal_relocs,
7865 Elf_Internal_Rela *irelend,
7866 uint16_t *insn16)
7867{
7868#define NORMAL_32_TO_16 (1 << 0)
7869#define SPECIAL_32_TO_16 (1 << 1)
7870 bfd_byte *contents = NULL;
7871 bfd_signed_vma off;
7872 bfd_vma mem_addr;
7873 uint32_t insn = 0;
7874 Elf_Internal_Rela *pc_rel;
7875 int pic_ext_target = 0;
7876 Elf_Internal_Shdr *symtab_hdr;
7877 Elf_Internal_Sym *isymbuf = NULL;
7878 int convert_type;
7879 bfd_vma offset;
7880
7881 if (reloc->r_offset + 4 > sec->size)
7882 return FALSE;
7883
7884 offset = reloc->r_offset;
7885
0c4bd9d9 7886 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE))
35c08157
KLC
7887 return FALSE;
7888 insn = bfd_getb32 (contents + offset);
7889
7890 if (nds32_convert_32_to_16 (abfd, insn, insn16, NULL))
7891 convert_type = NORMAL_32_TO_16;
7892 else if (special_convert_32_to_16 (insn, insn16, reloc))
7893 convert_type = SPECIAL_32_TO_16;
7894 else
7895 return FALSE;
7896
7897 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
7898 if (!nds32_get_local_syms (abfd, sec, &isymbuf))
7899 return FALSE;
7900
7901 /* Find the first relocation of the same relocation-type,
7902 so we iteratie them forward. */
7903 pc_rel = reloc;
1c8f6a4d 7904 while ((pc_rel - 1) >= internal_relocs && pc_rel[-1].r_offset == offset)
35c08157
KLC
7905 pc_rel--;
7906
7907 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7908 {
7909 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7910 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7911 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA
7912 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
7913 {
7914 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7915 &pic_ext_target);
1c8f6a4d
KLC
7916 if (off >= ACCURATE_8BIT_S1 || off < -ACCURATE_8BIT_S1
7917 || off == 0)
35c08157
KLC
7918 return FALSE;
7919 break;
7920 }
7921 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
7922 {
7923 /* movi => movi55 */
1c8f6a4d
KLC
7924 mem_addr = calculate_memory_address (abfd, pc_rel, isymbuf,
7925 symtab_hdr);
7926 /* mem_addr is unsigned, but the value should
7927 be between [-16, 15]. */
35c08157
KLC
7928 if ((mem_addr + 0x10) >> 5)
7929 return FALSE;
7930 break;
7931 }
1c8f6a4d
KLC
7932 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_20)
7933 || (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_TLS_LE_LO12))
7934 {
7935 /* It never happen movi to movi55 for R_NDS32_TLS_LE_20,
7936 because it can be relaxed to addi for TLS_LE_ADD. */
7937 return FALSE;
7938 }
35c08157
KLC
7939 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
7940 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
7941 && (reloc->r_addend & R_NDS32_INSN16_FP7U2_FLAG)
7942 && convert_type == SPECIAL_32_TO_16)
7943 {
7944 /* fp-as-gp
7945 We've selected a best fp-base for this access, so we can
7946 always resolve it anyway. Do nothing. */
7947 break;
7948 }
7949 else if ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_NONE
7950 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_RELA_GNU_VTINHERIT))
7951 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_RELA_GNU_VTENTRY)
7952 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_INSN16))
7953 || ((ELF32_R_TYPE (pc_rel->r_info) > R_NDS32_LOADSTORE)
7954 && (ELF32_R_TYPE (pc_rel->r_info) < R_NDS32_DWARF2_OP1_RELA)))
7955 {
1c8f6a4d
KLC
7956 /* Prevent unresolved addi instruction translate
7957 to addi45 or addi333. */
35c08157
KLC
7958 return FALSE;
7959 }
1c8f6a4d
KLC
7960 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
7961 {
7962 off = calculate_offset (abfd, sec, pc_rel, isymbuf, symtab_hdr,
7963 &pic_ext_target);
7964 if (off >= ACCURATE_U9BIT_S1 || off <= 0)
7965 return FALSE;
7966 break;
7967 }
35c08157
KLC
7968 }
7969
7970 return TRUE;
7971}
7972
7973static void
7974nds32_elf_write_16 (bfd *abfd ATTRIBUTE_UNUSED, bfd_byte *contents,
7975 Elf_Internal_Rela *reloc,
7976 Elf_Internal_Rela *internal_relocs,
7977 Elf_Internal_Rela *irelend,
7978 unsigned short insn16)
7979{
7980 Elf_Internal_Rela *pc_rel;
7981 bfd_vma offset;
7982
7983 offset = reloc->r_offset;
7984 bfd_putb16 (insn16, contents + offset);
7985 /* Find the first relocation of the same relocation-type,
7986 so we iteratie them forward. */
7987 pc_rel = reloc;
7988 while ((pc_rel - 1) > internal_relocs && pc_rel[-1].r_offset == offset)
7989 pc_rel--;
7990
7991 for (; pc_rel < irelend && pc_rel->r_offset == offset; pc_rel++)
7992 {
7993 if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_15_PCREL_RELA
7994 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17_PCREL_RELA
7995 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PCREL_RELA)
7996 {
7997 pc_rel->r_info =
7998 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PCREL_RELA);
7999 }
8000 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_25_PLTREL)
8001 pc_rel->r_info =
8002 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_9_PLTREL);
8003 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_20_RELA)
8004 pc_rel->r_info =
8005 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_5_RELA);
8006 else if (ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA15S2_RELA
8007 || ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_SDA17S2_RELA)
8008 pc_rel->r_info =
8009 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_SDA_FP7U2_RELA);
1c8f6a4d
KLC
8010 else if ((ELF32_R_TYPE (pc_rel->r_info) == R_NDS32_17IFC_PCREL_RELA))
8011 pc_rel->r_info =
8012 ELF32_R_INFO (ELF32_R_SYM (pc_rel->r_info), R_NDS32_10IFCU_PCREL_RELA);
35c08157
KLC
8013 }
8014}
8015
8016/* Find a relocation of type specified by `reloc_type'
8017 of the same r_offset with reloc.
8018 If not found, return irelend.
8019
8020 Assuming relocations are sorted by r_offset,
8021 we find the relocation from `reloc' backward untill relocs,
8022 or find it from `reloc' forward untill irelend. */
8023
8024static Elf_Internal_Rela *
8025find_relocs_at_address (Elf_Internal_Rela *reloc,
8026 Elf_Internal_Rela *relocs,
8027 Elf_Internal_Rela *irelend,
8028 enum elf_nds32_reloc_type reloc_type)
8029{
8030 Elf_Internal_Rela *rel_t;
8031
8032 /* Find backward. */
8033 for (rel_t = reloc;
8034 rel_t >= relocs && rel_t->r_offset == reloc->r_offset;
8035 rel_t--)
8036 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8037 return rel_t;
8038
1c8f6a4d 8039 /* We didn't find it backward. Try find it forward. */
35c08157
KLC
8040 for (rel_t = reloc;
8041 rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8042 rel_t++)
8043 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8044 return rel_t;
8045
8046 return irelend;
8047}
8048
8049/* Find a relocation of specified type and offset.
8050 `reloc' is just a refence point to find a relocation at specified offset.
8051 If not found, return irelend.
8052
8053 Assuming relocations are sorted by r_offset,
8054 we find the relocation from `reloc' backward untill relocs,
8055 or find it from `reloc' forward untill irelend. */
8056
8057static Elf_Internal_Rela *
8058find_relocs_at_address_addr (Elf_Internal_Rela *reloc,
8059 Elf_Internal_Rela *relocs,
8060 Elf_Internal_Rela *irelend,
6cae483a 8061 enum elf_nds32_reloc_type reloc_type,
35c08157
KLC
8062 bfd_vma offset_p)
8063{
8064 Elf_Internal_Rela *rel_t = NULL;
8065
8066 /* First, we try to find a relocation of offset `offset_p',
8067 and then we use find_relocs_at_address to find specific type. */
8068
8069 if (reloc->r_offset > offset_p)
8070 {
8071 /* Find backward. */
8072 for (rel_t = reloc;
8073 rel_t >= relocs && rel_t->r_offset > offset_p; rel_t--)
8074 /* Do nothing. */;
8075 }
8076 else if (reloc->r_offset < offset_p)
8077 {
8078 /* Find forward. */
8079 for (rel_t = reloc;
8080 rel_t < irelend && rel_t->r_offset < offset_p; rel_t++)
8081 /* Do nothing. */;
8082 }
8083 else
8084 rel_t = reloc;
8085
8086 /* Not found? */
8087 if (rel_t < relocs || rel_t == irelend || rel_t->r_offset != offset_p)
8088 return irelend;
8089
8090 return find_relocs_at_address (rel_t, relocs, irelend, reloc_type);
8091}
8092
8093static bfd_boolean
8094nds32_elf_check_dup_relocs (Elf_Internal_Rela *reloc,
8095 Elf_Internal_Rela *internal_relocs,
8096 Elf_Internal_Rela *irelend,
8097 unsigned char reloc_type)
8098{
8099 Elf_Internal_Rela *rel_t;
8100
8101 for (rel_t = reloc;
8102 rel_t >= internal_relocs && rel_t->r_offset == reloc->r_offset;
8103 rel_t--)
8104 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8105 {
8106 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8107 && rel_t->r_addend == reloc->r_addend)
8108 continue;
8109 return TRUE;
8110 }
8111
8112 for (rel_t = reloc; rel_t < irelend && rel_t->r_offset == reloc->r_offset;
8113 rel_t++)
8114 if (ELF32_R_TYPE (rel_t->r_info) == reloc_type)
8115 {
8116 if (ELF32_R_SYM (rel_t->r_info) == ELF32_R_SYM (reloc->r_info)
8117 && rel_t->r_addend == reloc->r_addend)
8118 continue;
8119 return TRUE;
8120 }
8121
8122 return FALSE;
8123}
8124
8125typedef struct nds32_elf_blank nds32_elf_blank_t;
8126struct nds32_elf_blank
8127{
8128 /* Where the blank begins. */
8129 bfd_vma offset;
8130 /* The size of the blank. */
8131 bfd_vma size;
8132 /* The accumulative size before this blank. */
8133 bfd_vma total_size;
8134 nds32_elf_blank_t *next;
8135 nds32_elf_blank_t *prev;
8136};
8137
8138static nds32_elf_blank_t *blank_free_list = NULL;
8139
8140static nds32_elf_blank_t *
8141create_nds32_elf_blank (bfd_vma offset_p, bfd_vma size_p)
8142{
8143 nds32_elf_blank_t *blank_t;
8144
8145 if (blank_free_list)
8146 {
8147 blank_t = blank_free_list;
8148 blank_free_list = blank_free_list->next;
8149 }
8150 else
8151 blank_t = bfd_malloc (sizeof (nds32_elf_blank_t));
8152
8153 if (blank_t == NULL)
8154 return NULL;
8155
8156 blank_t->offset = offset_p;
8157 blank_t->size = size_p;
8158 blank_t->total_size = 0;
8159 blank_t->next = NULL;
8160 blank_t->prev = NULL;
8161
8162 return blank_t;
8163}
8164
8165static void
8166remove_nds32_elf_blank (nds32_elf_blank_t *blank_p)
8167{
8168 if (blank_free_list)
8169 {
8170 blank_free_list->prev = blank_p;
8171 blank_p->next = blank_free_list;
8172 }
8173 else
8174 blank_p->next = NULL;
8175
8176 blank_p->prev = NULL;
8177 blank_free_list = blank_p;
8178}
8179
8180static void
8181clean_nds32_elf_blank (void)
8182{
8183 nds32_elf_blank_t *blank_t;
8184
8185 while (blank_free_list)
8186 {
8187 blank_t = blank_free_list;
8188 blank_free_list = blank_free_list->next;
8189 free (blank_t);
8190 }
8191}
8192
8193static nds32_elf_blank_t *
8194search_nds32_elf_blank (nds32_elf_blank_t *blank_p, bfd_vma addr)
8195{
8196 nds32_elf_blank_t *blank_t;
8197
8198 if (!blank_p)
8199 return NULL;
8200 blank_t = blank_p;
8201
8202 while (blank_t && addr < blank_t->offset)
8203 blank_t = blank_t->prev;
8204 while (blank_t && blank_t->next && addr >= blank_t->next->offset)
8205 blank_t = blank_t->next;
8206
8207 return blank_t;
8208}
8209
8210static bfd_vma
8211get_nds32_elf_blank_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8212 int overwrite)
8213{
8214 nds32_elf_blank_t *blank_t;
8215
8216 blank_t = search_nds32_elf_blank (*blank_p, addr);
8217 if (!blank_t)
8218 return 0;
8219
8220 if (overwrite)
8221 *blank_p = blank_t;
8222
8223 if (addr < blank_t->offset + blank_t->size)
8224 return blank_t->total_size + (addr - blank_t->offset);
8225 else
8226 return blank_t->total_size + blank_t->size;
8227}
8228
8229static bfd_boolean
8230insert_nds32_elf_blank (nds32_elf_blank_t **blank_p, bfd_vma addr, bfd_vma len)
8231{
8232 nds32_elf_blank_t *blank_t, *blank_t2;
8233
8234 if (!*blank_p)
8235 {
8236 *blank_p = create_nds32_elf_blank (addr, len);
8237 return *blank_p ? TRUE : FALSE;
8238 }
8239
8240 blank_t = search_nds32_elf_blank (*blank_p, addr);
8241
8242 if (blank_t == NULL)
8243 {
8244 blank_t = create_nds32_elf_blank (addr, len);
8245 if (!blank_t)
8246 return FALSE;
8247 while ((*blank_p)->prev != NULL)
8248 *blank_p = (*blank_p)->prev;
8249 blank_t->next = *blank_p;
8250 (*blank_p)->prev = blank_t;
8251 (*blank_p) = blank_t;
8252 return TRUE;
8253 }
8254
8255 if (addr < blank_t->offset + blank_t->size)
8256 {
8257 if (addr > blank_t->offset + blank_t->size)
8258 blank_t->size = addr - blank_t->offset;
8259 }
8260 else
8261 {
8262 blank_t2 = create_nds32_elf_blank (addr, len);
8263 if (!blank_t2)
8264 return FALSE;
8265 if (blank_t->next)
8266 {
8267 blank_t->next->prev = blank_t2;
8268 blank_t2->next = blank_t->next;
8269 }
8270 blank_t2->prev = blank_t;
8271 blank_t->next = blank_t2;
8272 *blank_p = blank_t2;
8273 }
8274
8275 return TRUE;
8276}
8277
8278static bfd_boolean
8279insert_nds32_elf_blank_recalc_total (nds32_elf_blank_t **blank_p, bfd_vma addr,
8280 bfd_vma len)
8281{
8282 nds32_elf_blank_t *blank_t;
8283
8284 if (!insert_nds32_elf_blank (blank_p, addr, len))
8285 return FALSE;
8286
8287 blank_t = *blank_p;
8288
8289 if (!blank_t->prev)
8290 {
8291 blank_t->total_size = 0;
8292 blank_t = blank_t->next;
8293 }
8294
8295 while (blank_t)
8296 {
8297 blank_t->total_size = blank_t->prev->total_size + blank_t->prev->size;
8298 blank_t = blank_t->next;
8299 }
8300
8301 return TRUE;
8302}
8303
8304static void
8305calc_nds32_blank_total (nds32_elf_blank_t *blank_p)
8306{
8307 nds32_elf_blank_t *blank_t;
8308 bfd_vma total_size = 0;
8309
8310 if (!blank_p)
8311 return;
8312
8313 blank_t = blank_p;
8314 while (blank_t->prev)
8315 blank_t = blank_t->prev;
8316 while (blank_t)
8317 {
8318 blank_t->total_size = total_size;
8319 total_size += blank_t->size;
8320 blank_t = blank_t->next;
8321 }
8322}
8323
8324static bfd_boolean
8325nds32_elf_relax_delete_blanks (bfd *abfd, asection *sec,
8326 nds32_elf_blank_t *blank_p)
8327{
8328 Elf_Internal_Shdr *symtab_hdr; /* Symbol table header of this bfd. */
1c8f6a4d 8329 Elf_Internal_Sym *isym = NULL; /* Symbol table of this bfd. */
35c08157
KLC
8330 Elf_Internal_Sym *isymend; /* Symbol entry iterator. */
8331 unsigned int sec_shndx; /* The section the be relaxed. */
8332 bfd_byte *contents; /* Contents data of iterating section. */
8333 Elf_Internal_Rela *internal_relocs;
8334 Elf_Internal_Rela *irel;
8335 Elf_Internal_Rela *irelend;
8336 struct elf_link_hash_entry **sym_hashes;
8337 struct elf_link_hash_entry **end_hashes;
8338 unsigned int symcount;
8339 asection *sect;
8340 nds32_elf_blank_t *blank_t;
8341 nds32_elf_blank_t *blank_t2;
8342 nds32_elf_blank_t *blank_head;
8343
8344 blank_head = blank_t = blank_p;
8345 while (blank_head->prev != NULL)
8346 blank_head = blank_head->prev;
8347 while (blank_t->next != NULL)
8348 blank_t = blank_t->next;
8349
8350 if (blank_t->offset + blank_t->size <= sec->size)
8351 {
8352 blank_t->next = create_nds32_elf_blank (sec->size + 4, 0);
8353 blank_t->next->prev = blank_t;
8354 }
8355 if (blank_head->offset > 0)
8356 {
8357 blank_head->prev = create_nds32_elf_blank (0, 0);
8358 blank_head->prev->next = blank_head;
8359 blank_head = blank_head->prev;
8360 }
8361
8362 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
8363
8364 /* The deletion must stop at the next ALIGN reloc for an alignment
8365 power larger than the number of bytes we are deleting. */
8366
8367 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8368 if (!nds32_get_local_syms (abfd, sec, &isym))
8369 return FALSE;
8370
8371 if (isym == NULL)
8372 {
8373 isym = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8374 symtab_hdr->sh_info, 0, NULL, NULL, NULL);
8375 symtab_hdr->contents = (bfd_byte *) isym;
8376 }
8377
8378 if (isym == NULL || symtab_hdr->sh_info == 0)
8379 return FALSE;
8380
8381 blank_t = blank_head;
8382 calc_nds32_blank_total (blank_head);
8383
8384 for (sect = abfd->sections; sect != NULL; sect = sect->next)
8385 {
8386 /* Adjust all the relocs. */
8387
8388 /* Relocations MUST be kept in memory, because relaxation adjust them. */
8389 internal_relocs = _bfd_elf_link_read_relocs (abfd, sect, NULL, NULL,
8390 TRUE /* keep_memory */);
8391 irelend = internal_relocs + sect->reloc_count;
8392
8393 blank_t = blank_head;
8394 blank_t2 = blank_head;
8395
8396 if (!(sect->flags & SEC_RELOC))
8397 continue;
8398
0c4bd9d9 8399 nds32_get_section_contents (abfd, sect, &contents, TRUE);
35c08157
KLC
8400
8401 for (irel = internal_relocs; irel < irelend; irel++)
8402 {
8403 bfd_vma raddr;
8404
8405 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_DIFF8
8406 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_DIFF32
8407 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8408 {
8409 unsigned long val = 0;
1c8f6a4d
KLC
8410 unsigned long mask;
8411 long before, between;
6cae483a 8412 long offset = 0;
35c08157
KLC
8413
8414 switch (ELF32_R_TYPE (irel->r_info))
8415 {
8416 case R_NDS32_DIFF8:
1c8f6a4d 8417 offset = bfd_get_8 (abfd, contents + irel->r_offset);
35c08157
KLC
8418 break;
8419 case R_NDS32_DIFF16:
1c8f6a4d 8420 offset = bfd_get_16 (abfd, contents + irel->r_offset);
35c08157
KLC
8421 break;
8422 case R_NDS32_DIFF32:
8423 val = bfd_get_32 (abfd, contents + irel->r_offset);
1c8f6a4d
KLC
8424 /* Get the signed bit and mask for the high part. The
8425 gcc will alarm when right shift 32-bit since the
8426 type size of long may be 32-bit. */
8427 mask = 0 - (val >> 31);
8428 if (mask)
8429 offset = (val | (mask - 0xffffffff));
8430 else
8431 offset = val;
35c08157
KLC
8432 break;
8433 default:
8434 BFD_ASSERT (0);
8435 }
8436
8437 /* DIFF value
8438 0 |encoded in location|
8439 |------------|-------------------|---------
8440 sym+off(addend)
8441 -- before ---| *****************
8442 --------------------- between ---|
8443
1c8f6a4d
KLC
8444 We only care how much data are relax between DIFF,
8445 marked as ***. */
35c08157
KLC
8446
8447 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8448 between = get_nds32_elf_blank_total (&blank_t,
8449 irel->r_addend + offset, 0);
35c08157
KLC
8450 if (between == before)
8451 goto done_adjust_diff;
8452
8453 switch (ELF32_R_TYPE (irel->r_info))
8454 {
8455 case R_NDS32_DIFF8:
1c8f6a4d
KLC
8456 bfd_put_8 (abfd, offset - (between - before),
8457 contents + irel->r_offset);
35c08157
KLC
8458 break;
8459 case R_NDS32_DIFF16:
1c8f6a4d
KLC
8460 bfd_put_16 (abfd, offset - (between - before),
8461 contents + irel->r_offset);
35c08157
KLC
8462 break;
8463 case R_NDS32_DIFF32:
1c8f6a4d
KLC
8464 bfd_put_32 (abfd, offset - (between - before),
8465 contents + irel->r_offset);
35c08157
KLC
8466 break;
8467 }
8468 }
8469 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_DIFF_ULEB128
8470 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx)
8471 {
8472 bfd_vma val = 0;
8473 unsigned int len = 0;
8474 unsigned long before, between;
8475 bfd_byte *endp, *p;
8476
4265548c
PA
8477 val = _bfd_read_unsigned_leb128 (abfd, contents + irel->r_offset,
8478 &len);
35c08157
KLC
8479
8480 before = get_nds32_elf_blank_total (&blank_t, irel->r_addend, 0);
1c8f6a4d
KLC
8481 between = get_nds32_elf_blank_total (&blank_t,
8482 irel->r_addend + val, 0);
35c08157
KLC
8483 if (between == before)
8484 goto done_adjust_diff;
8485
8486 p = contents + irel->r_offset;
8487 endp = p + len -1;
8488 memset (p, 0x80, len);
8489 *(endp) = 0;
8490 p = write_uleb128 (p, val - (between - before)) - 1;
8491 if (p < endp)
8492 *p |= 0x80;
8493 }
8494done_adjust_diff:
8495
8496 if (sec == sect)
8497 {
8498 raddr = irel->r_offset;
1c8f6a4d
KLC
8499 irel->r_offset -= get_nds32_elf_blank_total (&blank_t2,
8500 irel->r_offset, 1);
35c08157
KLC
8501
8502 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE)
8503 continue;
8504 if (blank_t2 && blank_t2->next
1c8f6a4d
KLC
8505 && (blank_t2->offset > raddr
8506 || blank_t2->next->offset <= raddr))
4eca0228 8507 _bfd_error_handler
38f14ab8
AM
8508 (_("%pB: error: search_nds32_elf_blank reports wrong node"),
8509 abfd);
35c08157
KLC
8510
8511 /* Mark reloc in deleted portion as NONE.
8512 For some relocs like R_NDS32_LABEL that doesn't modify the
8513 content in the section. R_NDS32_LABEL doesn't belong to the
8514 instruction in the section, so we should preserve it. */
8515 if (raddr >= blank_t2->offset
8516 && raddr < blank_t2->offset + blank_t2->size
8517 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL
8518 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_BEGIN
8519 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_REGION_END
8520 && ELF32_R_TYPE (irel->r_info) != R_NDS32_RELAX_ENTRY
8521 && ELF32_R_TYPE (irel->r_info) != R_NDS32_SUBTRAHEND
8522 && ELF32_R_TYPE (irel->r_info) != R_NDS32_MINUEND)
8523 {
8524 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
8525 R_NDS32_NONE);
8526 continue;
8527 }
8528 }
8529
8530 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_NONE
8531 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
8532 || ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
8533 continue;
8534
8535 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info
8536 && isym[ELF32_R_SYM (irel->r_info)].st_shndx == sec_shndx
8537 && ELF_ST_TYPE (isym[ELF32_R_SYM (irel->r_info)].st_info) == STT_SECTION)
8538 {
8539 if (irel->r_addend <= sec->size)
8540 irel->r_addend -=
8541 get_nds32_elf_blank_total (&blank_t, irel->r_addend, 1);
8542 }
8543 }
8544 }
8545
8546 /* Adjust the local symbols defined in this section. */
8547 blank_t = blank_head;
8548 for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
8549 {
8550 if (isym->st_shndx == sec_shndx)
8551 {
8552 if (isym->st_value <= sec->size)
8553 {
8554 bfd_vma ahead;
8555 bfd_vma orig_addr = isym->st_value;
8556
8557 ahead = get_nds32_elf_blank_total (&blank_t, isym->st_value, 1);
8558 isym->st_value -= ahead;
8559
8560 /* Adjust function size. */
1c8f6a4d
KLC
8561 if (ELF32_ST_TYPE (isym->st_info) == STT_FUNC
8562 && isym->st_size > 0)
8563 isym->st_size -=
8564 get_nds32_elf_blank_total
8565 (&blank_t, orig_addr + isym->st_size, 0) - ahead;
35c08157
KLC
8566 }
8567 }
8568 }
8569
8570 /* Now adjust the global symbols defined in this section. */
8571 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
8572 - symtab_hdr->sh_info);
8573 sym_hashes = elf_sym_hashes (abfd);
8574 end_hashes = sym_hashes + symcount;
8575 blank_t = blank_head;
8576 for (; sym_hashes < end_hashes; sym_hashes++)
8577 {
8578 struct elf_link_hash_entry *sym_hash = *sym_hashes;
8579
8580 if ((sym_hash->root.type == bfd_link_hash_defined
8581 || sym_hash->root.type == bfd_link_hash_defweak)
8582 && sym_hash->root.u.def.section == sec)
8583 {
8584 if (sym_hash->root.u.def.value <= sec->size)
8585 {
8586 bfd_vma ahead;
8587 bfd_vma orig_addr = sym_hash->root.u.def.value;
8588
8589 ahead = get_nds32_elf_blank_total (&blank_t, sym_hash->root.u.def.value, 1);
8590 sym_hash->root.u.def.value -= ahead;
8591
8592 /* Adjust function size. */
8593 if (sym_hash->type == STT_FUNC)
1c8f6a4d
KLC
8594 sym_hash->size -=
8595 get_nds32_elf_blank_total
8596 (&blank_t, orig_addr + sym_hash->size, 0) - ahead;
35c08157
KLC
8597
8598 }
8599 }
8600 }
8601
8602 contents = elf_section_data (sec)->this_hdr.contents;
8603 blank_t = blank_head;
8604 while (blank_t->next)
8605 {
8606 /* Actually delete the bytes. */
8607
8608 /* If current blank is the last blank overlap with current section,
8609 go to finish process. */
8610 if (sec->size <= (blank_t->next->offset))
8611 break;
8612
8613 memmove (contents + blank_t->offset - blank_t->total_size,
8614 contents + blank_t->offset + blank_t->size,
8615 blank_t->next->offset - (blank_t->offset + blank_t->size));
8616
8617 blank_t = blank_t->next;
8618 }
8619
8620 if (sec->size > (blank_t->offset + blank_t->size))
8621 {
8622 /* There are remaining code between blank and section boundary.
8623 Move the remaining code to appropriate location. */
8624 memmove (contents + blank_t->offset - blank_t->total_size,
8625 contents + blank_t->offset + blank_t->size,
8626 sec->size - (blank_t->offset + blank_t->size));
8627 sec->size -= blank_t->total_size + blank_t->size;
8628 }
8629 else
8630 /* This blank is not entirely included in the section,
8631 reduce the section size by only part of the blank size. */
8632 sec->size -= blank_t->total_size + (sec->size - blank_t->offset);
8633
8634 while (blank_head)
8635 {
8636 blank_t = blank_head;
8637 blank_head = blank_head->next;
8638 remove_nds32_elf_blank (blank_t);
8639 }
8640
8641 return TRUE;
8642}
8643
8644/* Get the contents of a section. */
8645
8646static int
0c4bd9d9
KLC
8647nds32_get_section_contents (bfd *abfd, asection *sec,
8648 bfd_byte **contents_p, bfd_boolean cache)
35c08157
KLC
8649{
8650 /* Get the section contents. */
8651 if (elf_section_data (sec)->this_hdr.contents != NULL)
8652 *contents_p = elf_section_data (sec)->this_hdr.contents;
8653 else
8654 {
8655 if (!bfd_malloc_and_get_section (abfd, sec, contents_p))
8656 return FALSE;
0c4bd9d9
KLC
8657 if (cache)
8658 elf_section_data (sec)->this_hdr.contents = *contents_p;
35c08157
KLC
8659 }
8660
8661 return TRUE;
8662}
8663
8664/* Get the contents of the internal symbol of abfd. */
8665
8666static int
8667nds32_get_local_syms (bfd *abfd, asection *sec ATTRIBUTE_UNUSED,
8668 Elf_Internal_Sym **isymbuf_p)
8669{
8670 Elf_Internal_Shdr *symtab_hdr;
8671 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
8672
8673 /* Read this BFD's local symbols if we haven't done so already. */
8674 if (*isymbuf_p == NULL && symtab_hdr->sh_info != 0)
8675 {
8676 *isymbuf_p = (Elf_Internal_Sym *) symtab_hdr->contents;
8677 if (*isymbuf_p == NULL)
8678 {
8679 *isymbuf_p = bfd_elf_get_elf_syms (abfd, symtab_hdr,
8680 symtab_hdr->sh_info, 0,
8681 NULL, NULL, NULL);
8682 if (*isymbuf_p == NULL)
8683 return FALSE;
8684 }
8685 }
8686 symtab_hdr->contents = (bfd_byte *) (*isymbuf_p);
8687
8688 return TRUE;
8689}
8690
8691/* Range of small data. */
1c8f6a4d
KLC
8692static bfd_vma sdata_range[2][2];
8693static bfd_vma const sdata_init_range[2] =
8694{ ACCURATE_12BIT_S1, ACCURATE_19BIT };
35c08157
KLC
8695
8696static int
8697nds32_elf_insn_size (bfd *abfd ATTRIBUTE_UNUSED,
8698 bfd_byte *contents, bfd_vma addr)
8699{
8700 unsigned long insn = bfd_getb32 (contents + addr);
8701
8702 if (insn & 0x80000000)
8703 return 2;
8704
8705 return 4;
8706}
8707
8708/* Set the gp relax range. We have to measure the safe range
8709 to do gp relaxation. */
8710
8711static void
8712relax_range_measurement (bfd *abfd)
8713{
8714 asection *sec_f, *sec_b;
8715 /* For upper bound. */
8716 bfd_vma maxpgsz = get_elf_backend_data (abfd)->maxpagesize;
8717 bfd_vma align;
35c08157
KLC
8718 static int decide_relax_range = 0;
8719 int i;
1c8f6a4d 8720 int range_number = sizeof (sdata_init_range) / sizeof (sdata_init_range[0]);
35c08157
KLC
8721
8722 if (decide_relax_range)
8723 return;
8724 decide_relax_range = 1;
8725
8726 if (sda_rela_sec == NULL)
8727 {
8728 /* Since there is no data sections, we assume the range is page size. */
1c8f6a4d 8729 for (i = 0; i < range_number; i++)
35c08157
KLC
8730 {
8731 sdata_range[i][0] = sdata_init_range[i] - 0x1000;
8732 sdata_range[i][1] = sdata_init_range[i] - 0x1000;
8733 }
8734 return;
8735 }
8736
8737 /* Get the biggest alignment power after the gp located section. */
8738 sec_f = sda_rela_sec->output_section;
8739 sec_b = sec_f->next;
8740 align = 0;
8741 while (sec_b != NULL)
8742 {
8743 if ((unsigned)(1 << sec_b->alignment_power) > align)
8744 align = (1 << sec_b->alignment_power);
8745 sec_b = sec_b->next;
8746 }
8747
8748 /* I guess we can not determine the section before
8749 gp located section, so we assume the align is max page size. */
1c8f6a4d 8750 for (i = 0; i < range_number; i++)
35c08157 8751 {
1c8f6a4d 8752 sdata_range[i][1] = sdata_init_range[i] - align;
35c08157 8753 BFD_ASSERT (sdata_range[i][1] <= sdata_init_range[i]);
1c8f6a4d 8754 sdata_range[i][0] = sdata_init_range[i] - maxpgsz;
35c08157
KLC
8755 BFD_ASSERT (sdata_range[i][0] <= sdata_init_range[i]);
8756 }
8757}
8758
8759/* These are macros used to check flags encoded in r_addend.
8760 They are only used by nds32_elf_relax_section (). */
8761#define GET_SEQ_LEN(addend) ((addend) & 0x000000ff)
8762#define IS_1ST_CONVERT(addend) ((addend) & 0x80000000)
8763#define IS_OPTIMIZE(addend) ((addend) & 0x40000000)
8764#define IS_16BIT_ON(addend) ((addend) & 0x20000000)
8765
695344c0
NC
8766static const char * unrecognized_reloc_msg =
8767 /* xgettext:c-format */
2dcf00ce 8768 N_("%pB: warning: %s points to unrecognized reloc at %#" PRIx64);
695344c0 8769
1c8f6a4d
KLC
8770/* Relax LONGCALL1 relocation for nds32_elf_relax_section. */
8771
35c08157 8772static bfd_boolean
1c8f6a4d
KLC
8773nds32_elf_relax_longcall1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8774 Elf_Internal_Rela *internal_relocs, int *insn_len,
8775 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8776 Elf_Internal_Shdr *symtab_hdr)
8777{
8778 /* There are 3 variations for LONGCALL1
8779 case 4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8 8780 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8781 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8782 jral5 ta ;
1c8f6a4d
KLC
8783
8784 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8 8785 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8786 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8787 jral ta ;
1c8f6a4d
KLC
8788
8789 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8 8790 sethi ta, hi20(symbol) ; LONGCALL1/HI20
1c8f6a4d 8791 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8792 jral ta ;
1c8f6a4d
KLC
8793 Check code for -mlong-calls output. */
8794
8795 /* Get the reloc for the address from which the register is
8796 being loaded. This reloc will tell us which function is
8797 actually being called. */
8798
8799 bfd_vma laddr;
8800 int seq_len; /* Original length of instruction sequence. */
35c08157 8801 uint32_t insn;
1c8f6a4d
KLC
8802 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
8803 int pic_ext_target = 0;
8804 bfd_signed_vma foff;
35c08157 8805 uint16_t insn16;
35c08157 8806
1c8f6a4d
KLC
8807 irelend = internal_relocs + sec->reloc_count;
8808 seq_len = GET_SEQ_LEN (irel->r_addend);
8809 laddr = irel->r_offset;
8810 *insn_len = seq_len;
35c08157 8811
1c8f6a4d
KLC
8812 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8813 R_NDS32_HI20_RELA, laddr);
8814 lo_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
8815 R_NDS32_LO12S0_ORI_RELA,
8816 laddr + 4);
35c08157 8817
1c8f6a4d 8818 if (hi_irelfn == irelend || lo_irelfn == irelend)
35c08157 8819 {
695344c0 8820 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL1",
2dcf00ce 8821 (uint64_t) irel->r_offset);
1c8f6a4d 8822 return FALSE;
35c08157
KLC
8823 }
8824
1c8f6a4d
KLC
8825 /* Get the value of the symbol referred to by the reloc. */
8826 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
8827 &pic_ext_target);
35c08157 8828
1c8f6a4d
KLC
8829 /* This condition only happened when symbol is undefined. */
8830 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
8831 || foff >= CONSERVATIVE_24BIT_S1)
8832 return FALSE;
35c08157 8833
1c8f6a4d
KLC
8834 /* Relax to: jal symbol; 25_PCREL */
8835 /* For simplicity of coding, we are going to modify the section
8836 contents, the section relocs, and the BFD symbol table. We
8837 must tell the rest of the code not to free up this
8838 information. It would be possible to instead create a table
8839 of changes which have to be made, as is done in coff-mips.c;
8840 that would be more work, but would require less memory when
8841 the linker is run. */
8842
8843 /* Replace the long call with a jal. */
8844 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
8845 R_NDS32_25_PCREL_RELA);
8846 irel->r_addend = hi_irelfn->r_addend;
8847
8848 /* We don't resolve this here but resolve it in relocate_section. */
8849 insn = INSN_JAL;
8850 bfd_putb32 (insn, contents + irel->r_offset);
8851
8852 hi_irelfn->r_info =
8853 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
8854 lo_irelfn->r_info =
8855 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
8856 *insn_len = 4;
8857
8858 if (seq_len & 0x2)
8859 {
8860 insn16 = NDS32_NOP16;
8861 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
8862 lo_irelfn->r_info =
8863 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
8864 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
8865 *insn_len += 2;
8866 }
8867 return TRUE;
8868}
35c08157 8869
1c8f6a4d
KLC
8870#define CONVERT_CONDITION_CALL(insn) (((insn) & 0xffff0000) ^ 0x90000)
8871/* Relax LONGCALL2 relocation for nds32_elf_relax_section. */
35c08157 8872
1c8f6a4d
KLC
8873static bfd_boolean
8874nds32_elf_relax_longcall2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8875 Elf_Internal_Rela *internal_relocs, int *insn_len,
8876 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8877 Elf_Internal_Shdr *symtab_hdr)
8878{
8879 /* bltz rt, .L1 ; LONGCALL2
8880 jal symbol ; 25_PCREL
8881 .L1: */
35c08157 8882
1c8f6a4d
KLC
8883 /* Get the reloc for the address from which the register is
8884 being loaded. This reloc will tell us which function is
8885 actually being called. */
35c08157 8886
1c8f6a4d
KLC
8887 bfd_vma laddr;
8888 uint32_t insn;
8889 Elf_Internal_Rela *i1_irelfn, *cond_irelfn, *irelend;
8890 int pic_ext_target = 0;
8891 bfd_signed_vma foff;
35c08157 8892
1c8f6a4d
KLC
8893 irelend = internal_relocs + sec->reloc_count;
8894 laddr = irel->r_offset;
8895 i1_irelfn =
8896 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8897 R_NDS32_25_PCREL_RELA, laddr + 4);
8898
8899 if (i1_irelfn == irelend)
35c08157 8900 {
695344c0 8901 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL2",
2dcf00ce 8902 (uint64_t) irel->r_offset);
1c8f6a4d 8903 return FALSE;
35c08157
KLC
8904 }
8905
1c8f6a4d 8906 insn = bfd_getb32 (contents + laddr);
35c08157 8907
1c8f6a4d
KLC
8908 /* Get the value of the symbol referred to by the reloc. */
8909 foff = calculate_offset (abfd, sec, i1_irelfn, isymbuf, symtab_hdr,
8910 &pic_ext_target);
35c08157 8911
1c8f6a4d
KLC
8912 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
8913 || foff >= CONSERVATIVE_16BIT_S1)
8914 return FALSE;
35c08157 8915
1c8f6a4d
KLC
8916 /* Relax to bgezal rt, label ; 17_PCREL
8917 or bltzal rt, label ; 17_PCREL */
8918
8919 /* Convert to complimentary conditional call. */
8920 insn = CONVERT_CONDITION_CALL (insn);
8921
8922 /* For simplicity of coding, we are going to modify the section
8923 contents, the section relocs, and the BFD symbol table. We
8924 must tell the rest of the code not to free up this
8925 information. It would be possible to instead create a table
8926 of changes which have to be made, as is done in coff-mips.c;
8927 that would be more work, but would require less memory when
8928 the linker is run. */
8929
8930 /* Clean unnessary relocations. */
8931 i1_irelfn->r_info =
8932 ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info), R_NDS32_NONE);
8933 cond_irelfn =
8934 find_relocs_at_address_addr (irel, internal_relocs, irelend,
8935 R_NDS32_17_PCREL_RELA, laddr);
8936 if (cond_irelfn != irelend)
8937 cond_irelfn->r_info =
8938 ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info), R_NDS32_NONE);
8939
8940 /* Replace the long call with a bgezal. */
8941 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i1_irelfn->r_info),
8942 R_NDS32_17_PCREL_RELA);
8943 irel->r_addend = i1_irelfn->r_addend;
8944
8945 bfd_putb32 (insn, contents + irel->r_offset);
8946
8947 *insn_len = 4;
8948 return TRUE;
8949}
35c08157 8950
1c8f6a4d
KLC
8951/* Relax LONGCALL3 relocation for nds32_elf_relax_section. */
8952
8953static bfd_boolean
8954nds32_elf_relax_longcall3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
8955 Elf_Internal_Rela *internal_relocs, int *insn_len,
8956 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
8957 Elf_Internal_Shdr *symtab_hdr)
8958{
8959 /* There are 3 variations for LONGCALL3
8960 case 4-4-4-2; 16-bit on, optimize off or optimize for space
07d6d2b8
AM
8961 bltz rt, $1 ; LONGCALL3
8962 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8963 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8964 jral5 ta ;
1c8f6a4d
KLC
8965 $1
8966
8967 case 4-4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM
8968 bltz rt, $1 ; LONGCALL3
8969 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8970 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8971 jral ta ;
1c8f6a4d
KLC
8972 $1
8973
8974 case 4-4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM
8975 bltz rt, $1 ; LONGCALL3
8976 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 8977 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8 8978 jral ta ;
1c8f6a4d
KLC
8979 $1 */
8980
8981 /* Get the reloc for the address from which the register is
8982 being loaded. This reloc will tell us which function is
8983 actually being called. */
8984
8985 bfd_vma laddr;
8986 int seq_len; /* Original length of instruction sequence. */
8987 uint32_t insn;
8988 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
8989 int pic_ext_target = 0;
8990 bfd_signed_vma foff;
8991 uint16_t insn16;
8992
8993 irelend = internal_relocs + sec->reloc_count;
8994 seq_len = GET_SEQ_LEN (irel->r_addend);
8995 laddr = irel->r_offset;
8996 *insn_len = seq_len;
8997
8998 hi_irelfn =
8999 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9000 R_NDS32_HI20_RELA, laddr + 4);
9001 lo_irelfn =
9002 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9003 R_NDS32_LO12S0_ORI_RELA, laddr + 8);
9004
9005 if (hi_irelfn == irelend || lo_irelfn == irelend)
9006 {
695344c0 9007 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL3",
2dcf00ce 9008 (uint64_t) irel->r_offset);
1c8f6a4d 9009 return FALSE;
35c08157
KLC
9010 }
9011
1c8f6a4d
KLC
9012 /* Get the value of the symbol referred to by the reloc. */
9013 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9014 &pic_ext_target);
35c08157 9015
1c8f6a4d
KLC
9016 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9017 || foff >= CONSERVATIVE_24BIT_S1)
9018 return FALSE;
35c08157 9019
1c8f6a4d
KLC
9020 insn = bfd_getb32 (contents + laddr);
9021 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
35c08157 9022 {
1c8f6a4d
KLC
9023 /* Relax to bgezal rt, label ; 17_PCREL
9024 or bltzal rt, label ; 17_PCREL */
35c08157 9025
1c8f6a4d
KLC
9026 /* Convert to complimentary conditional call. */
9027 insn = CONVERT_CONDITION_CALL (insn);
9028 bfd_putb32 (insn, contents + irel->r_offset);
35c08157 9029
1c8f6a4d
KLC
9030 *insn_len = 4;
9031 irel->r_info =
9032 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9033 hi_irelfn->r_info =
9034 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
9035 lo_irelfn->r_info =
9036 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
9037
9038 cond_irelfn =
9039 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9040 R_NDS32_17_PCREL_RELA, laddr);
9041 if (cond_irelfn != irelend)
35c08157 9042 {
1c8f6a4d
KLC
9043 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9044 R_NDS32_17_PCREL_RELA);
9045 cond_irelfn->r_addend = hi_irelfn->r_addend;
35c08157 9046 }
1c8f6a4d
KLC
9047
9048 if (seq_len & 0x2)
35c08157 9049 {
1c8f6a4d
KLC
9050 insn16 = NDS32_NOP16;
9051 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9052 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9053 R_NDS32_INSN16);
9054 hi_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9055 insn_len += 2;
35c08157 9056 }
1c8f6a4d
KLC
9057 }
9058 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9059 {
9060 /* Relax to the following instruction sequence
9061 bltz rt, $1 ; LONGCALL2
9062 jal symbol ; 25_PCREL
9063 $1 */
9064 *insn_len = 8;
9065 insn = INSN_JAL;
9066 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
35c08157 9067
1c8f6a4d
KLC
9068 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9069 R_NDS32_25_PCREL_RELA);
9070 irel->r_info =
9071 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL2);
9072
9073 lo_irelfn->r_info =
9074 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9075
1c8f6a4d 9076 if (seq_len & 0x2)
35c08157 9077 {
1c8f6a4d
KLC
9078 insn16 = NDS32_NOP16;
9079 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9080 lo_irelfn->r_info =
9081 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_INSN16);
9082 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9083 insn_len += 2;
9084 }
9085 }
9086 return TRUE;
9087}
35c08157 9088
1c8f6a4d 9089/* Relax LONGJUMP1 relocation for nds32_elf_relax_section. */
35c08157 9090
1c8f6a4d
KLC
9091static bfd_boolean
9092nds32_elf_relax_longjump1 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9093 Elf_Internal_Rela *internal_relocs, int *insn_len,
9094 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9095 Elf_Internal_Shdr *symtab_hdr)
9096{
9097 /* There are 3 variations for LONGJUMP1
9098 case 4-4-2; 16-bit bit on, optimize off or optimize for space
07d6d2b8
AM
9099 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9100 ori ta, ta, lo12(symbol) ; LO12S0
9101 jr5 ta ;
1c8f6a4d
KLC
9102
9103 case 4-4-4; 16-bit off, optimize don't care
07d6d2b8
AM
9104 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9105 ori ta, ta, lo12(symbol) ; LO12S0
9106 jr ta ;
1c8f6a4d
KLC
9107
9108 case 4-4-4; 16-bit on, optimize for speed
07d6d2b8
AM
9109 sethi ta, hi20(symbol) ; LONGJUMP1/HI20
9110 ori ta, ta, lo12(symbol) ; LO12S0
9111 jr ta ; */
1c8f6a4d
KLC
9112
9113 /* Get the reloc for the address from which the register is
9114 being loaded. This reloc will tell us which function is
9115 actually being called. */
9116
9117 bfd_vma laddr;
9118 int seq_len; /* Original length of instruction sequence. */
9119 int insn16_on; /* 16-bit on/off. */
9120 uint32_t insn;
9121 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *irelend;
9122 int pic_ext_target = 0;
9123 bfd_signed_vma foff;
9124 uint16_t insn16;
9125 unsigned long reloc;
35c08157 9126
1c8f6a4d
KLC
9127 irelend = internal_relocs + sec->reloc_count;
9128 seq_len = GET_SEQ_LEN (irel->r_addend);
9129 laddr = irel->r_offset;
9130 *insn_len = seq_len;
9131 insn16_on = IS_16BIT_ON (irel->r_addend);
9132
9133 hi_irelfn =
9134 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9135 R_NDS32_HI20_RELA, laddr);
9136 lo_irelfn =
9137 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9138 R_NDS32_LO12S0_ORI_RELA, laddr + 4);
9139 if (hi_irelfn == irelend || lo_irelfn == irelend)
9140 {
695344c0 9141 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP1",
2dcf00ce 9142 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9143 return FALSE;
9144 }
35c08157 9145
1c8f6a4d
KLC
9146 /* Get the value of the symbol referred to by the reloc. */
9147 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9148 &pic_ext_target);
35c08157 9149
1c8f6a4d
KLC
9150 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
9151 || foff < -CONSERVATIVE_24BIT_S1)
9152 return FALSE;
35c08157 9153
1c8f6a4d
KLC
9154 if (insn16_on && foff >= -ACCURATE_8BIT_S1
9155 && foff < ACCURATE_8BIT_S1 && (seq_len & 0x2))
9156 {
9157 /* j8 label */
9158 /* 16-bit on, but not optimized for speed. */
9159 reloc = R_NDS32_9_PCREL_RELA;
9160 insn16 = INSN_J8;
9161 bfd_putb16 (insn16, contents + irel->r_offset);
9162 *insn_len = 2;
9163 irel->r_info =
9164 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
9165 }
9166 else
9167 {
9168 /* j label */
9169 reloc = R_NDS32_25_PCREL_RELA;
9170 insn = INSN_J;
9171 bfd_putb32 (insn, contents + irel->r_offset);
9172 *insn_len = 4;
9173 irel->r_info =
9174 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_INSN16);
9175 irel->r_addend = 0;
9176 }
35c08157 9177
1c8f6a4d
KLC
9178 hi_irelfn->r_info =
9179 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9180 lo_irelfn->r_info =
9181 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_NDS32_NONE);
35c08157 9182
1c8f6a4d
KLC
9183 if ((seq_len & 0x2) && ((*insn_len & 2) == 0))
9184 {
9185 insn16 = NDS32_NOP16;
9186 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9187 lo_irelfn->r_info =
9188 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9189 R_NDS32_INSN16);
9190 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9191 *insn_len += 2;
9192 }
9193 return TRUE;
9194}
9195
9196/* Revert condition branch. This function does not check if the input
9197 instruction is condition branch or not. */
9198
9199static void
9200nds32_elf_convert_branch (uint16_t insn16, uint32_t insn,
9201 uint16_t *re_insn16, uint32_t *re_insn)
9202{
9203 uint32_t comp_insn = 0;
9204 uint16_t comp_insn16 = 0;
9205
9206 if (insn)
9207 {
9208 if (N32_OP6 (insn) == N32_OP6_BR1)
9209 {
9210 /* beqs label. */
9211 comp_insn = (insn ^ 0x4000) & 0xffffc000;
9212 if (N32_IS_RT3 (insn) && N32_RA5 (insn) == REG_R5)
35c08157 9213 {
1c8f6a4d
KLC
9214 /* Insn can be contracted to 16-bit implied r5. */
9215 comp_insn16 =
9216 (comp_insn & 0x4000) ? INSN_BNES38 : INSN_BEQS38;
9217 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
35c08157 9218 }
1c8f6a4d
KLC
9219 }
9220 else if (N32_OP6 (insn) == N32_OP6_BR3)
9221 {
9222 /* bnec $ta, imm11, label. */
9223 comp_insn = (insn ^ 0x80000) & 0xffffff00;
9224 }
9225 else
9226 {
9227 comp_insn = (insn ^ 0x10000) & 0xffffc000;
9228 if (N32_BR2_SUB (insn) == N32_BR2_BEQZ
9229 || N32_BR2_SUB (insn) == N32_BR2_BNEZ)
35c08157 9230 {
1c8f6a4d 9231 if (N32_IS_RT3 (insn))
35c08157 9232 {
1c8f6a4d
KLC
9233 /* Insn can be contracted to 16-bit. */
9234 comp_insn16 =
9235 (comp_insn & 0x10000) ? INSN_BNEZ38 : INSN_BEQZ38;
9236 comp_insn16 |= (N32_RT5 (insn) & 0x7) << 8;
9237 }
9238 else if (N32_RT5 (insn) == REG_R15)
9239 {
9240 /* Insn can be contracted to 16-bit. */
9241 comp_insn16 =
9242 (comp_insn & 0x10000) ? INSN_BNES38 : INSN_BEQS38;
35c08157 9243 }
35c08157
KLC
9244 }
9245 }
1c8f6a4d
KLC
9246 }
9247 else
9248 {
9249 switch ((insn16 & 0xf000) >> 12)
35c08157 9250 {
1c8f6a4d
KLC
9251 case 0xc:
9252 /* beqz38 or bnez38 */
9253 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9254 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNEZ : INSN_BEQZ;
9255 comp_insn |= ((comp_insn16 & 0x0700) >> 8) << 20;
9256 break;
35c08157 9257
1c8f6a4d
KLC
9258 case 0xd:
9259 /* beqs38 or bnes38 */
9260 comp_insn16 = (insn16 ^ 0x0800) & 0xff00;
9261 comp_insn = (comp_insn16 & 0x0800) ? INSN_BNE : INSN_BEQ;
9262 comp_insn |= (((comp_insn16 & 0x0700) >> 8) << 20)
9263 | (REG_R5 << 15);
9264 break;
35c08157 9265
1c8f6a4d
KLC
9266 case 0xe:
9267 /* beqzS8 or bnezS8 */
9268 comp_insn16 = (insn16 ^ 0x0100) & 0xff00;
9269 comp_insn = (comp_insn16 & 0x0100) ? INSN_BNEZ : INSN_BEQZ;
9270 comp_insn |= REG_R15 << 20;
9271 break;
35c08157 9272
1c8f6a4d
KLC
9273 default:
9274 break;
9275 }
9276 }
9277 if (comp_insn && re_insn)
9278 *re_insn = comp_insn;
9279 if (comp_insn16 && re_insn16)
9280 *re_insn16 = comp_insn16;
9281}
35c08157 9282
1c8f6a4d 9283/* Relax LONGJUMP2 relocation for nds32_elf_relax_section. */
35c08157 9284
1c8f6a4d
KLC
9285static bfd_boolean
9286nds32_elf_relax_longjump2 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9287 Elf_Internal_Rela *internal_relocs, int *insn_len,
9288 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9289 Elf_Internal_Shdr *symtab_hdr)
9290{
9291 /* There are 3 variations for LONGJUMP2
9292 case 2-4; 1st insn convertible, 16-bit on,
9293 optimize off or optimize for space
9294 bnes38 rt, ra, $1 ; LONGJUMP2
9295 j label ; 25_PCREL
9296 $1:
9297
9298 case 4-4; 1st insn not convertible
9299 bne rt, ra, $1 ; LONGJUMP2
9300 j label ; 25_PCREL
9301 $1:
9302
9303 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9304 bne rt, ra, $1 ; LONGJUMP2
9305 j label ; 25_PCREL
9306 $1: */
9307
9308 /* Get the reloc for the address from which the register is
9309 being loaded. This reloc will tell us which function is
9310 actually being called. */
9311
9312 bfd_vma laddr;
9313 int seq_len; /* Original length of instruction sequence. */
9314 Elf_Internal_Rela *i2_irelfn, *cond_irelfn, *irelend;
9315 int pic_ext_target = 0, first_size;
9316 unsigned int i;
9317 bfd_signed_vma foff;
9318 uint32_t insn, re_insn = 0;
9319 uint16_t insn16, re_insn16 = 0;
9320 unsigned long reloc, cond_reloc;
35c08157 9321
1c8f6a4d
KLC
9322 enum elf_nds32_reloc_type checked_types[] =
9323 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
35c08157 9324
1c8f6a4d
KLC
9325 irelend = internal_relocs + sec->reloc_count;
9326 seq_len = GET_SEQ_LEN (irel->r_addend);
9327 laddr = irel->r_offset;
9328 *insn_len = seq_len;
9329 first_size = (seq_len == 6) ? 2 : 4;
9330
9331 i2_irelfn =
9332 find_relocs_at_address_addr (irel, internal_relocs,
9333 irelend, R_NDS32_25_PCREL_RELA,
9334 laddr + first_size);
9335
9336 for (i = 0; i < sizeof (checked_types) / sizeof(checked_types[0]); i++)
9337 {
9338 cond_irelfn =
9339 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9340 checked_types[i], laddr);
9341 if (cond_irelfn != irelend)
9342 break;
9343 }
35c08157 9344
1c8f6a4d
KLC
9345 if (i2_irelfn == irelend || cond_irelfn == irelend)
9346 {
695344c0 9347 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP2",
2dcf00ce 9348 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9349 return FALSE;
9350 }
35c08157 9351
1c8f6a4d
KLC
9352 /* Get the value of the symbol referred to by the reloc. */
9353 foff =
9354 calculate_offset (abfd, sec, i2_irelfn, isymbuf, symtab_hdr,
9355 &pic_ext_target);
9356 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9357 || foff >= CONSERVATIVE_16BIT_S1)
9358 return FALSE;
35c08157 9359
1c8f6a4d
KLC
9360 /* Get the all corresponding instructions. */
9361 if (first_size == 4)
9362 {
9363 insn = bfd_getb32 (contents + laddr);
9364 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9365 }
9366 else
9367 {
9368 insn16 = bfd_getb16 (contents + laddr);
9369 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9370 }
35c08157 9371
1c8f6a4d
KLC
9372 if (re_insn16 && foff >= -(ACCURATE_8BIT_S1 - first_size)
9373 && foff < ACCURATE_8BIT_S1 - first_size)
9374 {
9375 if (first_size == 4)
9376 {
9377 /* Don't convert it to 16-bit now, keep this as relaxable for
9378 ``label reloc; INSN16''. */
35c08157 9379
1c8f6a4d
KLC
9380 /* Save comp_insn32 to buffer. */
9381 bfd_putb32 (re_insn, contents + irel->r_offset);
9382 *insn_len = 4;
9383 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9384 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9385 cond_reloc = R_NDS32_INSN16;
9386 }
9387 else
9388 {
9389 bfd_putb16 (re_insn16, contents + irel->r_offset);
9390 *insn_len = 2;
9391 reloc = R_NDS32_9_PCREL_RELA;
9392 cond_reloc = R_NDS32_NONE;
9393 }
9394 }
9395 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9396 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9397 && foff < ACCURATE_14BIT_S1 - first_size))
9398 {
9399 /* beqs label ; 15_PCREL */
9400 bfd_putb32 (re_insn, contents + irel->r_offset);
9401 *insn_len = 4;
9402 reloc = R_NDS32_15_PCREL_RELA;
9403 cond_reloc = R_NDS32_NONE;
9404 }
9405 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9406 && foff >= -CONSERVATIVE_16BIT_S1
9407 && foff < CONSERVATIVE_16BIT_S1)
9408 {
9409 /* beqz label ; 17_PCREL */
9410 bfd_putb32 (re_insn, contents + irel->r_offset);
9411 *insn_len = 4;
9412 reloc = R_NDS32_17_PCREL_RELA;
9413 cond_reloc = R_NDS32_NONE;
9414 }
9415 else
9416 return FALSE;
35c08157 9417
1c8f6a4d
KLC
9418 /* Set all relocations. */
9419 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info), reloc);
9420 irel->r_addend = i2_irelfn->r_addend;
35c08157 9421
1c8f6a4d
KLC
9422 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9423 cond_reloc);
9424 cond_irelfn->r_addend = 0;
35c08157 9425
1c8f6a4d
KLC
9426 if ((seq_len ^ *insn_len ) & 0x2)
9427 {
9428 insn16 = NDS32_NOP16;
9429 bfd_putb16 (insn16, contents + irel->r_offset + 4);
9430 i2_irelfn->r_offset = 4;
9431 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9432 R_NDS32_INSN16);
9433 i2_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9434 *insn_len += 2;
9435 }
9436 else
9437 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (i2_irelfn->r_info),
9438 R_NDS32_NONE);
9439 return TRUE;
9440}
35c08157 9441
1c8f6a4d 9442/* Relax LONGJUMP3 relocation for nds32_elf_relax_section. */
35c08157 9443
1c8f6a4d
KLC
9444static bfd_boolean
9445nds32_elf_relax_longjump3 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9446 Elf_Internal_Rela *internal_relocs, int *insn_len,
9447 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9448 Elf_Internal_Shdr *symtab_hdr)
9449{
9450 /* There are 5 variations for LONGJUMP3
9451 case 1: 2-4-4-2; 1st insn convertible, 16-bit on,
9452 optimize off or optimize for space
07d6d2b8
AM
9453 bnes38 rt, ra, $1 ; LONGJUMP3
9454 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9455 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM
9456 jr5 ta ;
9457 $1: ;
1c8f6a4d
KLC
9458
9459 case 2: 2-4-4-2; 1st insn convertible, 16-bit on, optimize for speed
07d6d2b8
AM
9460 bnes38 rt, ra, $1 ; LONGJUMP3
9461 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9462 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM
9463 jr5 ta ;
9464 $1: ; LABEL
1c8f6a4d
KLC
9465
9466 case 3: 4-4-4-2; 1st insn not convertible, 16-bit on,
9467 optimize off or optimize for space
07d6d2b8
AM
9468 bne rt, ra, $1 ; LONGJUMP3
9469 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9470 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM
9471 jr5 ta ;
9472 $1: ;
1c8f6a4d
KLC
9473
9474 case 4: 4-4-4-4; 1st insn don't care, 16-bit off, optimize don't care
9475 16-bit off if no INSN16
07d6d2b8
AM
9476 bne rt, ra, $1 ; LONGJUMP3
9477 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9478 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM
9479 jr ta ;
9480 $1: ;
1c8f6a4d
KLC
9481
9482 case 5: 4-4-4-4; 1st insn not convertible, 16-bit on, optimize for speed
9483 16-bit off if no INSN16
07d6d2b8
AM
9484 bne rt, ra, $1 ; LONGJUMP3
9485 sethi ta, hi20(symbol) ; HI20
1c8f6a4d 9486 ori ta, ta, lo12(symbol) ; LO12S0
07d6d2b8
AM
9487 jr ta ;
9488 $1: ; LABEL */
1c8f6a4d
KLC
9489
9490 /* Get the reloc for the address from which the register is
9491 being loaded. This reloc will tell us which function is
9492 actually being called. */
9493 enum elf_nds32_reloc_type checked_types[] =
9494 { R_NDS32_15_PCREL_RELA, R_NDS32_9_PCREL_RELA };
9495
9496 int reloc_off = 0, cond_removed = 0, convertible;
9497 bfd_vma laddr;
9498 int seq_len; /* Original length of instruction sequence. */
9499 Elf_Internal_Rela *hi_irelfn, *lo_irelfn, *cond_irelfn, *irelend;
9500 int pic_ext_target = 0, first_size;
9501 unsigned int i;
9502 bfd_signed_vma foff;
9503 uint32_t insn, re_insn = 0;
9504 uint16_t insn16, re_insn16 = 0;
9505 unsigned long reloc, cond_reloc;
35c08157 9506
1c8f6a4d
KLC
9507 irelend = internal_relocs + sec->reloc_count;
9508 seq_len = GET_SEQ_LEN (irel->r_addend);
9509 laddr = irel->r_offset;
9510 *insn_len = seq_len;
35c08157 9511
1c8f6a4d 9512 convertible = IS_1ST_CONVERT (irel->r_addend);
35c08157 9513
1c8f6a4d
KLC
9514 if (convertible)
9515 first_size = 2;
9516 else
9517 first_size = 4;
9518
9519 /* Get all needed relocations. */
9520 hi_irelfn =
9521 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9522 R_NDS32_HI20_RELA, laddr + first_size);
9523 lo_irelfn =
9524 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9525 R_NDS32_LO12S0_ORI_RELA,
9526 laddr + first_size + 4);
9527
9528 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
9529 {
9530 cond_irelfn =
9531 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9532 checked_types[i], laddr);
9533 if (cond_irelfn != irelend)
9534 break;
9535 }
35c08157 9536
1c8f6a4d
KLC
9537 if (hi_irelfn == irelend || lo_irelfn == irelend || cond_irelfn == irelend)
9538 {
695344c0 9539 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP3",
2dcf00ce 9540 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9541 return FALSE;
9542 }
35c08157 9543
1c8f6a4d
KLC
9544 /* Get the value of the symbol referred to by the reloc. */
9545 foff = calculate_offset (abfd, sec, hi_irelfn, isymbuf, symtab_hdr,
9546 &pic_ext_target);
35c08157 9547
1c8f6a4d
KLC
9548 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9549 || foff >= CONSERVATIVE_24BIT_S1)
9550 return FALSE;
35c08157 9551
1c8f6a4d
KLC
9552 /* Get the all corresponding instructions. */
9553 if (first_size == 4)
9554 {
9555 insn = bfd_getb32 (contents + laddr);
9556 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
9557 }
9558 else
9559 {
9560 insn16 = bfd_getb16 (contents + laddr);
9561 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
9562 }
35c08157 9563
1c8f6a4d
KLC
9564 /* For simplicity of coding, we are going to modify the section
9565 contents, the section relocs, and the BFD symbol table. We
9566 must tell the rest of the code not to free up this
9567 information. It would be possible to instead create a table
9568 of changes which have to be made, as is done in coff-mips.c;
9569 that would be more work, but would require less memory when
9570 the linker is run. */
35c08157 9571
1c8f6a4d
KLC
9572 if (re_insn16 && foff >= -ACCURATE_8BIT_S1 - first_size
9573 && foff < ACCURATE_8BIT_S1 - first_size)
9574 {
9575 if (!(seq_len & 0x2))
9576 {
9577 /* Don't convert it to 16-bit now, keep this as relaxable
9578 for ``label reloc; INSN1a''6. */
9579 /* Save comp_insn32 to buffer. */
9580 bfd_putb32 (re_insn, contents + irel->r_offset);
9581 *insn_len = 4;
9582 reloc = (N32_OP6 (re_insn) == N32_OP6_BR1) ?
9583 R_NDS32_15_PCREL_RELA : R_NDS32_17_PCREL_RELA;
9584 cond_reloc = R_NDS32_INSN16;
9585 }
9586 else
9587 {
9588 /* Not optimize for speed; convert sequence to 16-bit. */
9589 /* Save comp_insn16 to buffer. */
9590 bfd_putb16 (re_insn16, contents + irel->r_offset);
9591 *insn_len = 2;
9592 reloc = R_NDS32_9_PCREL_RELA;
9593 cond_reloc = R_NDS32_NONE;
9594 }
9595 cond_removed = 1;
9596 }
9597 else if (N32_OP6 (re_insn) == N32_OP6_BR1
9598 && (foff >= -(ACCURATE_14BIT_S1 - first_size)
9599 && foff < ACCURATE_14BIT_S1 - first_size))
9600 {
9601 /* beqs label ; 15_PCREL */
9602 bfd_putb32 (re_insn, contents + irel->r_offset);
9603 *insn_len = 4;
9604 reloc = R_NDS32_15_PCREL_RELA;
9605 cond_reloc = R_NDS32_NONE;
9606 cond_removed = 1;
9607 }
9608 else if (N32_OP6 (re_insn) == N32_OP6_BR2
9609 && foff >= -CONSERVATIVE_16BIT_S1
9610 && foff < CONSERVATIVE_16BIT_S1)
9611 {
9612 /* beqz label ; 17_PCREL */
9613 bfd_putb32 (re_insn, contents + irel->r_offset);
9614 *insn_len = 4;
9615 reloc = R_NDS32_17_PCREL_RELA;
9616 cond_reloc = R_NDS32_NONE;
9617 cond_removed = 1;
9618 }
9619 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
9620 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
9621 {
9622 /* Relax to one of the following 3 variations
9623
9624 case 2-4; 1st insn convertible, 16-bit on, optimize off or optimize
9625 for space
9626 bnes38 rt, $1 ; LONGJUMP2
9627 j label ; 25_PCREL
9628 $1
9629
9630 case 4-4; 1st insn not convertible, others don't care
9631 bne rt, ra, $1 ; LONGJUMP2
9632 j label ; 25_PCREL
9633 $1
9634
9635 case 4-4; 1st insn convertible, 16-bit on, optimize for speed
9636 bne rt, ra, $1 ; LONGJUMP2
9637 j label ; 25_PCREL
9638 $1 */
9639
9640 /* Offset for first instruction. */
9641
9642 /* Use j label as second instruction. */
9643 *insn_len = 4 + first_size;
9644 insn = INSN_J;
9645 bfd_putb32 (insn, contents + hi_irelfn->r_offset);
9646 reloc = R_NDS32_LONGJUMP2;
9647 cond_reloc = R_NDS32_25_PLTREL;
9648 }
9649 else
9650 return FALSE;
35c08157 9651
1c8f6a4d
KLC
9652 if (cond_removed == 1)
9653 {
9654 /* Set all relocations. */
9655 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), reloc);
9656 irel->r_addend = hi_irelfn->r_addend;
9657
9658 cond_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irelfn->r_info),
9659 cond_reloc);
9660 cond_irelfn->r_addend = 0;
9661 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9662 R_NDS32_NONE);
9663 }
9664 else
9665 {
9666 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
1c8f6a4d
KLC
9667 hi_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info),
9668 cond_reloc);
9669 }
35c08157 9670
1c8f6a4d
KLC
9671 if ((seq_len ^ *insn_len ) & 0x2)
9672 {
9673 insn16 = NDS32_NOP16;
9674 bfd_putb16 (insn16, contents + irel->r_offset + *insn_len);
9675 lo_irelfn->r_offset = *insn_len;
9676 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9677 R_NDS32_INSN16);
9678 lo_irelfn->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
9679 *insn_len += 2;
9680 }
9681 else
9682 lo_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info),
9683 R_NDS32_NONE);
9684 return TRUE;
9685}
35c08157 9686
1c8f6a4d 9687/* Relax LONGCALL4 relocation for nds32_elf_relax_section. */
35c08157 9688
1c8f6a4d
KLC
9689static bfd_boolean
9690nds32_elf_relax_longcall4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9691 Elf_Internal_Rela *internal_relocs, int *insn_len,
9692 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9693 Elf_Internal_Shdr *symtab_hdr)
9694{
9695 /* The pattern for LONGCALL4. Support for function cse.
9696 sethi ta, hi20(symbol) ; LONGCALL4/HI20
9697 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9698 jral ta ; PTR_RES/EMPTY/INSN16 */
35c08157 9699
1c8f6a4d
KLC
9700 bfd_vma laddr;
9701 uint32_t insn;
9702 Elf_Internal_Rela *hi_irel, *ptr_irel, *insn_irel, *em_irel, *call_irel;
9703 Elf_Internal_Rela *irelend;
9704 int pic_ext_target = 0;
9705 bfd_signed_vma foff;
35c08157 9706
1c8f6a4d
KLC
9707 irelend = internal_relocs + sec->reloc_count;
9708 laddr = irel->r_offset;
35c08157 9709
1c8f6a4d
KLC
9710 /* Get the reloc for the address from which the register is
9711 being loaded. This reloc will tell us which function is
9712 actually being called. */
9713 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9714 R_NDS32_HI20_RELA, laddr);
35c08157 9715
1c8f6a4d
KLC
9716 if (hi_irel == irelend)
9717 {
695344c0 9718 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9719 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9720 return FALSE;
9721 }
35c08157 9722
1c8f6a4d
KLC
9723 /* Get the value of the symbol referred to by the reloc. */
9724 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
9725 &pic_ext_target);
35c08157 9726
1c8f6a4d
KLC
9727 /* This condition only happened when symbol is undefined. */
9728 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9729 || foff >= CONSERVATIVE_24BIT_S1)
9730 return FALSE;
35c08157 9731
1c8f6a4d
KLC
9732 /* Relax to: jal symbol; 25_PCREL */
9733 /* For simplicity of coding, we are going to modify the section
9734 contents, the section relocs, and the BFD symbol table. We
9735 must tell the rest of the code not to free up this
9736 information. It would be possible to instead create a table
9737 of changes which have to be made, as is done in coff-mips.c;
9738 that would be more work, but would require less memory when
9739 the linker is run. */
35c08157 9740
1c8f6a4d
KLC
9741 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9742 R_NDS32_PTR_RESOLVED, irel->r_addend);
9743 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9744 R_NDS32_EMPTY, irel->r_addend);
35c08157 9745
1c8f6a4d
KLC
9746 if (ptr_irel == irelend || em_irel == irelend)
9747 {
695344c0 9748 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL4",
2dcf00ce 9749 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9750 return FALSE;
9751 }
9752 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9753 insn = bfd_getb32 (contents + irel->r_addend);
9754 if (insn & 0x80000000)
9755 return FALSE;
35c08157 9756
1c8f6a4d
KLC
9757 /* Replace the long call with a jal. */
9758 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9759 R_NDS32_25_PCREL_RELA);
9760 ptr_irel->r_addend = 1;
35c08157 9761
1c8f6a4d
KLC
9762 /* We don't resolve this here but resolve it in relocate_section. */
9763 insn = INSN_JAL;
9764 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9765
1c8f6a4d
KLC
9766 irel->r_info =
9767 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9768
1c8f6a4d
KLC
9769 /* If there is function cse, HI20 can not remove now. */
9770 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9771 R_NDS32_LONGCALL4, laddr);
9772 if (call_irel == irelend)
9773 {
9774 *insn_len = 0;
9775 hi_irel->r_info =
9776 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
9777 }
35c08157 9778
1c8f6a4d
KLC
9779 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9780 R_NDS32_INSN16, irel->r_addend);
9781 if (insn_irel != irelend)
9782 insn_irel->r_info =
9783 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9784
1c8f6a4d
KLC
9785 return TRUE;
9786}
35c08157 9787
1c8f6a4d 9788/* Relax LONGCALL5 relocation for nds32_elf_relax_section. */
35c08157 9789
1c8f6a4d
KLC
9790static bfd_boolean
9791nds32_elf_relax_longcall5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9792 Elf_Internal_Rela *internal_relocs, int *insn_len,
9793 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9794 Elf_Internal_Shdr *symtab_hdr)
9795{
9796 /* The pattern for LONGCALL5.
9797 bltz rt, .L1 ; LONGCALL5/17_PCREL
9798 jal symbol ; 25_PCREL
9799 .L1: */
35c08157 9800
1c8f6a4d
KLC
9801 bfd_vma laddr;
9802 uint32_t insn;
9803 Elf_Internal_Rela *cond_irel, *irelend;
9804 int pic_ext_target = 0;
9805 bfd_signed_vma foff;
35c08157 9806
1c8f6a4d
KLC
9807 irelend = internal_relocs + sec->reloc_count;
9808 laddr = irel->r_offset;
9809 insn = bfd_getb32 (contents + laddr);
35c08157 9810
1c8f6a4d
KLC
9811 /* Get the reloc for the address from which the register is
9812 being loaded. This reloc will tell us which function is
9813 actually being called. */
9814 cond_irel =
9815 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9816 R_NDS32_25_PCREL_RELA, irel->r_addend);
9817 if (cond_irel == irelend)
9818 {
695344c0 9819 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL5",
2dcf00ce 9820 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9821 return FALSE;
9822 }
35c08157 9823
1c8f6a4d
KLC
9824 /* Get the value of the symbol referred to by the reloc. */
9825 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
9826 &pic_ext_target);
35c08157 9827
1c8f6a4d
KLC
9828 if (foff == 0 || foff < -CONSERVATIVE_16BIT_S1
9829 || foff >= CONSERVATIVE_16BIT_S1)
9830 return FALSE;
35c08157 9831
1c8f6a4d
KLC
9832 /* Relax to bgezal rt, label ; 17_PCREL
9833 or bltzal rt, label ; 17_PCREL */
35c08157 9834
1c8f6a4d
KLC
9835 /* Convert to complimentary conditional call. */
9836 insn = CONVERT_CONDITION_CALL (insn);
35c08157 9837
1c8f6a4d
KLC
9838 /* For simplicity of coding, we are going to modify the section
9839 contents, the section relocs, and the BFD symbol table. We
9840 must tell the rest of the code not to free up this
9841 information. It would be possible to instead create a table
9842 of changes which have to be made, as is done in coff-mips.c;
9843 that would be more work, but would require less memory when
9844 the linker is run. */
35c08157 9845
1c8f6a4d
KLC
9846 /* Modify relocation and contents. */
9847 cond_irel->r_info =
9848 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_17_PCREL_RELA);
35c08157 9849
1c8f6a4d
KLC
9850 /* Replace the long call with a bgezal. */
9851 bfd_putb32 (insn, contents + cond_irel->r_offset);
9852 *insn_len = 0;
35c08157 9853
1c8f6a4d
KLC
9854 /* Clean unnessary relocations. */
9855 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9856
1c8f6a4d
KLC
9857 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9858 R_NDS32_17_PCREL_RELA, laddr);
9859 cond_irel->r_info =
9860 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9861
1c8f6a4d
KLC
9862 return TRUE;
9863}
35c08157 9864
1c8f6a4d 9865/* Relax LONGCALL6 relocation for nds32_elf_relax_section. */
35c08157 9866
1c8f6a4d
KLC
9867static bfd_boolean
9868nds32_elf_relax_longcall6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
9869 Elf_Internal_Rela *internal_relocs, int *insn_len,
9870 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
9871 Elf_Internal_Shdr *symtab_hdr)
9872{
9873 /* The pattern for LONGCALL6.
9874 bltz rt, .L1 ; LONGCALL6/17_PCREL
9875 sethi ta, hi20(symbol) ; HI20/PTR
9876 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
9877 jral ta ; PTR_RES/EMPTY/INSN16
9878 .L1 */
9879
9880 bfd_vma laddr;
9881 uint32_t insn;
9882 Elf_Internal_Rela *em_irel, *cond_irel, *irelend;
9883 int pic_ext_target = 0;
9884 bfd_signed_vma foff;
35c08157 9885
1c8f6a4d
KLC
9886 irelend = internal_relocs + sec->reloc_count;
9887 laddr = irel->r_offset;
35c08157 9888
1c8f6a4d
KLC
9889 /* Get the reloc for the address from which the register is
9890 being loaded. This reloc will tell us which function is
9891 actually being called. */
9892 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
9893 R_NDS32_EMPTY, irel->r_addend);
35c08157 9894
1c8f6a4d
KLC
9895 if (em_irel == irelend)
9896 {
695344c0 9897 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGCALL6",
2dcf00ce 9898 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9899 return FALSE;
9900 }
35c08157 9901
1c8f6a4d
KLC
9902 /* Get the value of the symbol referred to by the reloc. */
9903 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
9904 &pic_ext_target);
35c08157 9905
1c8f6a4d
KLC
9906 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
9907 || foff >= CONSERVATIVE_24BIT_S1)
9908 return FALSE;
35c08157 9909
1c8f6a4d
KLC
9910 /* Check these is enough space to insert jal in R_NDS32_EMPTY. */
9911 insn = bfd_getb32 (contents + irel->r_addend);
9912 if (insn & 0x80000000)
9913 return FALSE;
35c08157 9914
1c8f6a4d
KLC
9915 insn = bfd_getb32 (contents + laddr);
9916 if (foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
9917 {
9918 /* Relax to bgezal rt, label ; 17_PCREL
9919 or bltzal rt, label ; 17_PCREL */
35c08157 9920
1c8f6a4d
KLC
9921 /* Convert to complimentary conditional call. */
9922 *insn_len = 0;
9923 insn = CONVERT_CONDITION_CALL (insn);
9924 bfd_putb32 (insn, contents + em_irel->r_offset);
9925
9926 em_irel->r_info =
9927 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_17_PCREL_RELA);
9928
9929 /* Set resolved relocation. */
9930 cond_irel =
9931 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9932 R_NDS32_PTR_RESOLVED, irel->r_addend);
9933 if (cond_irel == irelend)
35c08157 9934 {
695344c0 9935 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9936 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9937 return FALSE;
9938 }
9939 cond_irel->r_addend = 1;
35c08157 9940
1c8f6a4d 9941 /* Clear relocations. */
35c08157 9942
1c8f6a4d
KLC
9943 irel->r_info =
9944 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 9945
1c8f6a4d
KLC
9946 cond_irel =
9947 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9948 R_NDS32_17_PCREL_RELA, laddr);
9949 if (cond_irel != irelend)
9950 cond_irel->r_info =
9951 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9952
1c8f6a4d
KLC
9953 cond_irel =
9954 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9955 R_NDS32_INSN16, irel->r_addend);
9956 if (cond_irel != irelend)
9957 cond_irel->r_info =
9958 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 9959
1c8f6a4d
KLC
9960 }
9961 else if (foff >= -CONSERVATIVE_24BIT_S1 && foff < CONSERVATIVE_24BIT_S1)
9962 {
9963 /* Relax to the following instruction sequence
9964 bltz rt, .L1 ; LONGCALL2/17_PCREL
9965 jal symbol ; 25_PCREL/PTR_RES
9966 .L1 */
9967 *insn_len = 4;
9968 /* Convert instruction. */
9969 insn = INSN_JAL;
9970 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 9971
1c8f6a4d
KLC
9972 /* Convert relocations. */
9973 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info),
9974 R_NDS32_25_PCREL_RELA);
9975 irel->r_info =
9976 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_LONGCALL5);
35c08157 9977
1c8f6a4d
KLC
9978 /* Set resolved relocation. */
9979 cond_irel =
9980 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9981 R_NDS32_PTR_RESOLVED, irel->r_addend);
9982 if (cond_irel == irelend)
9983 {
695344c0 9984 _bfd_error_handler (unrecognized_reloc_msg, abfd,
2dcf00ce 9985 "R_NDS32_LONGCALL6", (uint64_t) irel->r_offset);
1c8f6a4d
KLC
9986 return FALSE;
9987 }
9988 cond_irel->r_addend = 1;
35c08157 9989
1c8f6a4d
KLC
9990 cond_irel =
9991 find_relocs_at_address_addr (irel, internal_relocs, irelend,
9992 R_NDS32_INSN16, irel->r_addend);
9993 if (cond_irel != irelend)
9994 cond_irel->r_info =
9995 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
9996 }
9997 return TRUE;
9998}
35c08157 9999
1c8f6a4d 10000/* Relax LONGJUMP4 relocation for nds32_elf_relax_section. */
35c08157 10001
1c8f6a4d
KLC
10002static bfd_boolean
10003nds32_elf_relax_longjump4 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10004 Elf_Internal_Rela *internal_relocs, int *insn_len,
10005 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10006 Elf_Internal_Shdr *symtab_hdr)
10007{
10008 /* The pattern for LONGJUMP4.
10009 sethi ta, hi20(symbol) ; LONGJUMP4/HI20
10010 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10011 jr ta ; PTR_RES/INSN16/EMPTY */
10012
10013 bfd_vma laddr;
10014 int seq_len; /* Original length of instruction sequence. */
10015 uint32_t insn;
10016 Elf_Internal_Rela *hi_irel, *ptr_irel, *em_irel, *call_irel, *irelend;
10017 int pic_ext_target = 0;
10018 bfd_signed_vma foff;
35c08157 10019
1c8f6a4d
KLC
10020 irelend = internal_relocs + sec->reloc_count;
10021 seq_len = GET_SEQ_LEN (irel->r_addend);
10022 laddr = irel->r_offset;
10023 *insn_len = seq_len;
35c08157 10024
1c8f6a4d
KLC
10025 /* Get the reloc for the address from which the register is
10026 being loaded. This reloc will tell us which function is
10027 actually being called. */
35c08157 10028
1c8f6a4d
KLC
10029 hi_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10030 R_NDS32_HI20_RELA, laddr);
35c08157 10031
1c8f6a4d
KLC
10032 if (hi_irel == irelend)
10033 {
695344c0 10034 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10035 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10036 return FALSE;
10037 }
35c08157 10038
1c8f6a4d
KLC
10039 /* Get the value of the symbol referred to by the reloc. */
10040 foff = calculate_offset (abfd, sec, hi_irel, isymbuf, symtab_hdr,
10041 &pic_ext_target);
35c08157 10042
1c8f6a4d
KLC
10043 if (pic_ext_target || foff == 0 || foff >= CONSERVATIVE_24BIT_S1
10044 || foff < -CONSERVATIVE_24BIT_S1)
10045 return FALSE;
35c08157 10046
1c8f6a4d
KLC
10047 /* Convert it to "j label", it may be converted to j8 in the final
10048 pass of relaxation. Therefore, we do not consider this currently. */
10049 ptr_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10050 R_NDS32_PTR_RESOLVED, irel->r_addend);
10051 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10052 R_NDS32_EMPTY, irel->r_addend);
35c08157 10053
1c8f6a4d
KLC
10054 if (ptr_irel == irelend || em_irel == irelend)
10055 {
695344c0 10056 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP4",
2dcf00ce 10057 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10058 return FALSE;
10059 }
35c08157 10060
1c8f6a4d
KLC
10061 em_irel->r_info =
10062 ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), R_NDS32_25_PCREL_RELA);
10063 ptr_irel->r_addend = 1;
35c08157 10064
1c8f6a4d
KLC
10065 /* Write instruction. */
10066 insn = INSN_J;
10067 bfd_putb32 (insn, contents + em_irel->r_offset);
35c08157 10068
1c8f6a4d
KLC
10069 /* Clear relocations. */
10070 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10071
1c8f6a4d
KLC
10072 /* If there is function cse, HI20 can not remove now. */
10073 call_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10074 R_NDS32_LONGJUMP4, laddr);
10075 if (call_irel == irelend)
10076 {
10077 *insn_len = 0;
10078 hi_irel->r_info =
10079 ELF32_R_INFO (ELF32_R_SYM (hi_irel->r_info), R_NDS32_NONE);
10080 }
35c08157 10081
1c8f6a4d
KLC
10082 return TRUE;
10083}
35c08157 10084
1c8f6a4d 10085/* Relax LONGJUMP5 relocation for nds32_elf_relax_section. */
35c08157 10086
1c8f6a4d
KLC
10087static bfd_boolean
10088nds32_elf_relax_longjump5 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10089 Elf_Internal_Rela *internal_relocs, int *insn_len,
10090 int *seq_len, bfd_byte *contents,
10091 Elf_Internal_Sym *isymbuf,
10092 Elf_Internal_Shdr *symtab_hdr)
10093{
10094 /* There are 2 variations for LONGJUMP5
10095 case 2-4; 1st insn convertible, 16-bit on.
10096 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10097 j label ; 25_PCREL/INSN16
10098 $1:
10099
10100 case 4-4; 1st insn not convertible
10101 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10102 j label ; 25_PCREL/INSN16
10103 .L1: */
10104
10105 bfd_vma laddr;
10106 Elf_Internal_Rela *cond_irel, *irelend;
10107 int pic_ext_target = 0;
10108 unsigned int i;
10109 bfd_signed_vma foff;
10110 uint32_t insn, re_insn = 0;
10111 uint16_t insn16, re_insn16 = 0;
10112 unsigned long reloc;
35c08157 10113
1c8f6a4d
KLC
10114 enum elf_nds32_reloc_type checked_types[] =
10115 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10116 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
35c08157 10117
1c8f6a4d
KLC
10118 irelend = internal_relocs + sec->reloc_count;
10119 laddr = irel->r_offset;
35c08157 10120
1c8f6a4d
KLC
10121 /* Get the reloc for the address from which the register is
10122 being loaded. This reloc will tell us which function is
10123 actually being called. */
35c08157 10124
1c8f6a4d
KLC
10125 cond_irel =
10126 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10127 R_NDS32_25_PCREL_RELA, irel->r_addend);
10128 if (cond_irel == irelend)
10129 {
695344c0 10130 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP5",
2dcf00ce 10131 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10132 return FALSE;
10133 }
35c08157 10134
1c8f6a4d
KLC
10135 /* Get the value of the symbol referred to by the reloc. */
10136 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10137 &pic_ext_target);
35c08157 10138
1c8f6a4d
KLC
10139 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_16BIT_S1
10140 || foff >= CONSERVATIVE_16BIT_S1)
10141 return FALSE;
35c08157 10142
1c8f6a4d
KLC
10143 /* Get the all corresponding instructions. */
10144 insn = bfd_getb32 (contents + laddr);
10145 /* Check instruction size. */
10146 if (insn & 0x80000000)
10147 {
10148 *seq_len = 0;
10149 insn16 = insn >> 16;
10150 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10151 }
10152 else
10153 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10154
1c8f6a4d
KLC
10155 if (N32_OP6 (re_insn) == N32_OP6_BR1
10156 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10157 {
10158 /* beqs label ; 15_PCREL. */
10159 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10160 reloc = R_NDS32_15_PCREL_RELA;
10161 }
10162 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10163 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10164 {
10165 /* beqz label ; 17_PCREL. */
10166 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10167 reloc = R_NDS32_17_PCREL_RELA;
10168 }
10169 else if ( N32_OP6 (re_insn) == N32_OP6_BR3
10170 && foff >= -CONSERVATIVE_8BIT_S1 && foff < CONSERVATIVE_8BIT_S1)
10171 {
10172 /* beqc label ; 9_PCREL. */
10173 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
10174 reloc = R_NDS32_WORD_9_PCREL_RELA;
10175 }
10176 else
10177 return FALSE;
35c08157 10178
1c8f6a4d
KLC
10179 /* Set all relocations. */
10180 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), reloc);
35c08157 10181
1c8f6a4d
KLC
10182 /* Clean relocations. */
10183 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10184 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10185 {
10186 cond_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10187 checked_types[i], laddr);
10188 if (cond_irel != irelend)
10189 {
10190 if (*seq_len == 0
10191 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
35c08157 10192 {
1c8f6a4d
KLC
10193 /* If the branch instruction is 2 byte, it cannot remove
10194 directly. Only convert it to nop16 and remove it after
10195 checking alignment issue. */
10196 insn16 = NDS32_NOP16;
10197 bfd_putb16 (insn16, contents + laddr);
10198 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157
KLC
10199 }
10200 else
1c8f6a4d
KLC
10201 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10202 R_NDS32_NONE);
35c08157 10203 }
1c8f6a4d
KLC
10204 }
10205 *insn_len = 0;
35c08157 10206
1c8f6a4d
KLC
10207 return TRUE;
10208}
35c08157 10209
1c8f6a4d 10210/* Relax LONGJUMP6 relocation for nds32_elf_relax_section. */
35c08157 10211
1c8f6a4d
KLC
10212static bfd_boolean
10213nds32_elf_relax_longjump6 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10214 Elf_Internal_Rela *internal_relocs, int *insn_len,
10215 int *seq_len, bfd_byte *contents,
10216 Elf_Internal_Sym *isymbuf,
10217 Elf_Internal_Shdr *symtab_hdr)
10218{
10219 /* There are 5 variations for LONGJUMP6
10220 case : 2-4-4-4; 1st insn convertible, 16-bit on.
10221 bnes38 rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10222 sethi ta, hi20(symbol) ; HI20/PTR
10223 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10224 jr ta ; PTR_RES/INSN16/EMPTY
10225 .L1:
10226
10227 case : 4-4-4-4; 1st insn not convertible, 16-bit on.
10228 bne rt, ra, .L1 ; LONGJUMP6/15_PCREL/INSN16
10229 sethi ta, hi20(symbol) ; HI20/PTR
10230 ori ta, ta, lo12(symbol) ; LO12S0_ORI/PTR
10231 jr ta ; PTR_RES/INSN16/EMPTY
10232 .L1: */
10233
10234 enum elf_nds32_reloc_type checked_types[] =
10235 { R_NDS32_17_PCREL_RELA, R_NDS32_15_PCREL_RELA,
10236 R_NDS32_9_PCREL_RELA, R_NDS32_INSN16 };
10237
10238 int reloc_off = 0, cond_removed = 0;
10239 bfd_vma laddr;
10240 Elf_Internal_Rela *cond_irel, *em_irel, *irelend, *insn_irel;
10241 int pic_ext_target = 0;
10242 unsigned int i;
10243 bfd_signed_vma foff;
10244 uint32_t insn, re_insn = 0;
10245 uint16_t insn16, re_insn16 = 0;
10246 unsigned long reloc;
35c08157 10247
1c8f6a4d
KLC
10248 irelend = internal_relocs + sec->reloc_count;
10249 laddr = irel->r_offset;
35c08157 10250
1c8f6a4d
KLC
10251 /* Get the reloc for the address from which the register is
10252 being loaded. This reloc will tell us which function is
10253 actually being called. */
10254 em_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10255 R_NDS32_EMPTY, irel->r_addend);
35c08157 10256
1c8f6a4d
KLC
10257 if (em_irel == irelend)
10258 {
695344c0 10259 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP6",
2dcf00ce 10260 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10261 return FALSE;
10262 }
35c08157 10263
1c8f6a4d
KLC
10264 /* Get the value of the symbol referred to by the reloc. */
10265 foff = calculate_offset (abfd, sec, em_irel, isymbuf, symtab_hdr,
10266 &pic_ext_target);
35c08157 10267
1c8f6a4d
KLC
10268 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_24BIT_S1
10269 || foff >= CONSERVATIVE_24BIT_S1)
10270 return FALSE;
35c08157 10271
1c8f6a4d
KLC
10272 insn = bfd_getb32 (contents + laddr);
10273 /* Check instruction size. */
10274 if (insn & 0x80000000)
10275 {
10276 *seq_len = 0;
10277 insn16 = insn >> 16;
10278 nds32_elf_convert_branch (insn16, 0, &re_insn16, &re_insn);
10279 }
10280 else
10281 nds32_elf_convert_branch (0, insn, &re_insn16, &re_insn);
35c08157 10282
1c8f6a4d
KLC
10283 /* For simplicity of coding, we are going to modify the section
10284 contents, the section relocs, and the BFD symbol table. We
10285 must tell the rest of the code not to free up this
10286 information. It would be possible to instead create a table
10287 of changes which have to be made, as is done in coff-mips.c;
10288 that would be more work, but would require less memory when
10289 the linker is run. */
35c08157 10290
1c8f6a4d
KLC
10291 if (N32_OP6 (re_insn) == N32_OP6_BR1
10292 && (foff >= -CONSERVATIVE_14BIT_S1 && foff < CONSERVATIVE_14BIT_S1))
10293 {
10294 /* beqs label ; 15_PCREL */
10295 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10296 reloc = R_NDS32_15_PCREL_RELA;
10297 cond_removed = 1;
10298 }
10299 else if (N32_OP6 (re_insn) == N32_OP6_BR2
10300 && foff >= -CONSERVATIVE_16BIT_S1 && foff < CONSERVATIVE_16BIT_S1)
10301 {
10302 /* beqz label ; 17_PCREL */
10303 bfd_putb32 (re_insn, contents + em_irel->r_offset);
10304 reloc = R_NDS32_17_PCREL_RELA;
10305 cond_removed = 1;
10306 }
10307 else if (foff >= -CONSERVATIVE_24BIT_S1 - reloc_off
10308 && foff < CONSERVATIVE_24BIT_S1 - reloc_off)
10309 {
10310 /* Relax to one of the following 2 variations
35c08157 10311
1c8f6a4d
KLC
10312 case 2-4; 1st insn convertible, 16-bit on.
10313 bnes38 rt, ra, .L1 ; LONGJUMP5/9_PCREL/INSN16
10314 j label ; 25_PCREL/INSN16
10315 $1:
35c08157 10316
1c8f6a4d
KLC
10317 case 4-4; 1st insn not convertible
10318 bne rt, ra, .L1 ; LONGJUMP5/15_PCREL/INSN16
10319 j label ; 25_PCREL/INSN16
10320 .L1: */
35c08157 10321
1c8f6a4d
KLC
10322 /* Use j label as second instruction. */
10323 insn = INSN_J;
10324 reloc = R_NDS32_25_PCREL_RELA;
10325 bfd_putb32 (insn, contents + em_irel->r_offset);
10326 }
10327 else
10328 return FALSE;
35c08157 10329
1c8f6a4d
KLC
10330 /* Set all relocations. */
10331 em_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (em_irel->r_info), reloc);
35c08157 10332
1c8f6a4d
KLC
10333 cond_irel =
10334 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10335 R_NDS32_PTR_RESOLVED, em_irel->r_offset);
10336 cond_irel->r_addend = 1;
35c08157 10337
1c8f6a4d
KLC
10338 /* Use INSN16 of first branch instruction to distinguish if keeping
10339 INSN16 of final instruction or not. */
10340 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10341 R_NDS32_INSN16, irel->r_offset);
10342 if (insn_irel == irelend)
10343 {
10344 /* Clean the final INSN16. */
10345 insn_irel =
10346 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10347 R_NDS32_INSN16, em_irel->r_offset);
10348 insn_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10349 R_NDS32_NONE);
10350 }
10351
10352 if (cond_removed == 1)
10353 {
10354 *insn_len = 0;
10355
10356 /* Clear relocations. */
10357 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 10358
1c8f6a4d
KLC
10359 for (i = 0; i < sizeof (checked_types) / sizeof (checked_types[0]); i++)
10360 {
10361 cond_irel =
10362 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10363 checked_types[i], laddr);
10364 if (cond_irel != irelend)
35c08157 10365 {
1c8f6a4d
KLC
10366 if (*seq_len == 0
10367 && (ELF32_R_TYPE (cond_irel->r_info) == R_NDS32_INSN16))
10368 {
10369 /* If the branch instruction is 2 byte, it cannot remove
10370 directly. Only convert it to nop16 and remove it after
10371 checking alignment issue. */
10372 insn16 = NDS32_NOP16;
10373 bfd_putb16 (insn16, contents + laddr);
10374 cond_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
10375 }
10376 else
10377 cond_irel->r_info =
10378 ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info), R_NDS32_NONE);
35c08157 10379 }
35c08157 10380 }
1c8f6a4d
KLC
10381 }
10382 else
10383 {
10384 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
10385 R_NDS32_LONGJUMP5);
10386 }
35c08157 10387
1c8f6a4d
KLC
10388 return TRUE;
10389}
35c08157 10390
1c8f6a4d 10391/* Relax LONGJUMP7 relocation for nds32_elf_relax_section. */
35c08157 10392
1c8f6a4d
KLC
10393static bfd_boolean
10394nds32_elf_relax_longjump7 (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10395 Elf_Internal_Rela *internal_relocs, int *insn_len,
10396 int *seq_len, bfd_byte *contents,
10397 Elf_Internal_Sym *isymbuf,
10398 Elf_Internal_Shdr *symtab_hdr)
10399{
10400 /* There are 2 variations for LONGJUMP5
10401 case 2-4; 1st insn convertible, 16-bit on.
10402 movi55 ta, imm11 ; LONGJUMP7/INSN16
10403 beq rt, ta, label ; 15_PCREL
10404
10405 case 4-4; 1st insn not convertible
10406 movi55 ta, imm11 ; LONGJUMP7/INSN16
10407 beq rt, ta, label ; 15_PCREL */
10408
10409 bfd_vma laddr;
10410 Elf_Internal_Rela *cond_irel, *irelend, *insn_irel;
10411 int pic_ext_target = 0;
10412 bfd_signed_vma foff;
10413 uint32_t insn, re_insn = 0;
10414 uint16_t insn16;
10415 uint32_t imm11;
35c08157 10416
1c8f6a4d
KLC
10417 irelend = internal_relocs + sec->reloc_count;
10418 laddr = irel->r_offset;
35c08157 10419
1c8f6a4d
KLC
10420 /* Get the reloc for the address from which the register is
10421 being loaded. This reloc will tell us which function is
10422 actually being called. */
35c08157 10423
1c8f6a4d
KLC
10424 cond_irel =
10425 find_relocs_at_address_addr (irel, internal_relocs, irelend,
10426 R_NDS32_15_PCREL_RELA, irel->r_addend);
10427 if (cond_irel == irelend)
10428 {
695344c0 10429 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LONGJUMP7",
2dcf00ce 10430 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10431 return FALSE;
10432 }
35c08157 10433
1c8f6a4d
KLC
10434 /* Get the value of the symbol referred to by the reloc. */
10435 foff = calculate_offset (abfd, sec, cond_irel, isymbuf, symtab_hdr,
10436 &pic_ext_target);
35c08157 10437
1c8f6a4d
KLC
10438 if (pic_ext_target || foff == 0 || foff < -CONSERVATIVE_8BIT_S1
10439 || foff >= CONSERVATIVE_8BIT_S1)
10440 return FALSE;
35c08157 10441
1c8f6a4d
KLC
10442 /* Get the first instruction for its size. */
10443 insn = bfd_getb32 (contents + laddr);
10444 if (insn & 0x80000000)
10445 {
10446 *seq_len = 0;
10447 /* Get the immediate from movi55. */
10448 imm11 = N16_IMM5S (insn >> 16);
10449 }
10450 else
10451 {
10452 /* Get the immediate from movi. */
10453 imm11 = N32_IMM20S (insn);
35c08157
KLC
10454 }
10455
1c8f6a4d
KLC
10456 /* Get the branch instruction. */
10457 insn = bfd_getb32 (contents + irel->r_addend);
10458 /* Convert instruction to BR3. */
10459 if ((insn >> 14) & 0x1)
10460 re_insn = N32_BR3 (BNEC, N32_RT5 (insn), imm11, 0);
10461 else
10462 re_insn = N32_BR3 (BEQC, N32_RT5 (insn), imm11, 0);
35c08157 10463
1c8f6a4d 10464 bfd_putb32 (re_insn, contents + cond_irel->r_offset);
35c08157 10465
1c8f6a4d
KLC
10466 /* Set all relocations. */
10467 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10468 R_NDS32_WORD_9_PCREL_RELA);
10469
10470 /* Clean relocations. */
10471 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10472 insn_irel = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10473 R_NDS32_INSN16, irel->r_offset);
10474 if (insn_irel != irelend)
10475 {
10476 if (*seq_len == 0)
35c08157 10477 {
1c8f6a4d
KLC
10478 /* If the first insntruction is 16bit, convert it to nop16. */
10479 insn16 = NDS32_NOP16;
10480 bfd_putb16 (insn16, contents + laddr);
10481 insn_irel->r_addend = R_NDS32_INSN16_CONVERT_FLAG;
35c08157 10482 }
1c8f6a4d
KLC
10483 else
10484 cond_irel->r_info = ELF32_R_INFO (ELF32_R_SYM (cond_irel->r_info),
10485 R_NDS32_NONE);
35c08157 10486 }
1c8f6a4d 10487 *insn_len = 0;
35c08157 10488
1c8f6a4d
KLC
10489 return TRUE;
10490}
35c08157 10491
1c8f6a4d 10492#define GET_LOADSTORE_RANGE(addend) (((addend) >> 8) & 0x3f)
35c08157 10493
1c8f6a4d 10494/* Relax LOADSTORE relocation for nds32_elf_relax_section. */
35c08157 10495
1c8f6a4d
KLC
10496static bfd_boolean
10497nds32_elf_relax_loadstore (struct bfd_link_info *link_info, bfd *abfd,
10498 asection *sec, Elf_Internal_Rela *irel,
10499 Elf_Internal_Rela *internal_relocs, int *insn_len,
10500 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10501 Elf_Internal_Shdr *symtab_hdr, int load_store_relax)
10502{
6cae483a
AM
10503 int eliminate_sethi = 0, range_type;
10504 unsigned int i;
1c8f6a4d
KLC
10505 bfd_vma local_sda, laddr;
10506 int seq_len; /* Original length of instruction sequence. */
10507 uint32_t insn;
10508 Elf_Internal_Rela *hi_irelfn = NULL, *irelend;
10509 bfd_vma access_addr = 0;
10510 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10511 enum elf_nds32_reloc_type checked_types[] =
10512 { R_NDS32_HI20_RELA, R_NDS32_GOT_HI20,
10513 R_NDS32_GOTPC_HI20, R_NDS32_GOTOFF_HI20,
10514 R_NDS32_PLTREL_HI20, R_NDS32_PLT_GOTREL_HI20,
10515 R_NDS32_TLS_LE_HI20
10516 };
35c08157 10517
1c8f6a4d
KLC
10518 irelend = internal_relocs + sec->reloc_count;
10519 seq_len = GET_SEQ_LEN (irel->r_addend);
10520 laddr = irel->r_offset;
10521 *insn_len = seq_len;
35c08157 10522
1c8f6a4d 10523 /* Get the high part relocation. */
6cae483a 10524 for (i = 0; i < ARRAY_SIZE (checked_types); i++)
1c8f6a4d
KLC
10525 {
10526 hi_irelfn = find_relocs_at_address_addr (irel, internal_relocs, irelend,
10527 checked_types[i], laddr);
10528 if (hi_irelfn != irelend)
10529 break;
10530 }
35c08157 10531
1c8f6a4d
KLC
10532 if (hi_irelfn == irelend)
10533 {
695344c0 10534 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_LOADSTORE",
2dcf00ce 10535 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
10536 return FALSE;
10537 }
35c08157 10538
1c8f6a4d
KLC
10539 range_type = GET_LOADSTORE_RANGE (irel->r_addend);
10540 nds32_elf_final_sda_base (sec->output_section->owner,
10541 link_info, &local_sda, FALSE);
35c08157 10542
1c8f6a4d
KLC
10543 switch (ELF32_R_TYPE (hi_irelfn->r_info))
10544 {
10545 case R_NDS32_HI20_RELA:
10546 insn = bfd_getb32 (contents + laddr);
10547 access_addr =
10548 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10549
10550 if (range_type == NDS32_LOADSTORE_IMM)
10551 {
10552 struct elf_link_hash_entry *h = NULL;
10553 int indx;
35c08157 10554
1c8f6a4d 10555 if (ELF32_R_SYM (hi_irelfn->r_info) >= symtab_hdr->sh_info)
35c08157 10556 {
1c8f6a4d
KLC
10557 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
10558 h = elf_sym_hashes (abfd)[indx];
35c08157 10559 }
35c08157 10560
1c8f6a4d
KLC
10561 if ((access_addr < CONSERVATIVE_20BIT)
10562 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
35c08157 10563 {
1c8f6a4d
KLC
10564 eliminate_sethi = 1;
10565 break;
35c08157 10566 }
1c8f6a4d
KLC
10567
10568 /* This is avoid to relax symbol address which is fixed
10569 relocations. Ex: _stack. */
10570 if (h && bfd_is_abs_section (h->root.u.def.section))
10571 return FALSE;
10572 }
10573
10574 if (!load_store_relax)
10575 return FALSE;
10576
10577 /* Case for set gp register. */
10578 if (N32_RT5 (insn) == REG_GP)
10579 break;
10580
10581 if (range_type == NDS32_LOADSTORE_FLOAT_S
6cef73f9 10582 || range_type == NDS32_LOADSTORE_FLOAT_D)
1c8f6a4d
KLC
10583 {
10584 range_l = sdata_range[0][0];
10585 range_h = sdata_range[0][1];
10586 }
10587 else
10588 {
10589 range_l = sdata_range[1][0];
10590 range_h = sdata_range[1][1];
10591 }
10592 break;
10593
10594 case R_NDS32_GOT_HI20:
10595 access_addr =
10596 calculate_got_memory_address (abfd, link_info, hi_irelfn, symtab_hdr);
10597
10598 /* If this symbol is not in .got, the return value will be -1.
10599 Since the gp value is set to SDA_BASE but not GLOBAL_OFFSET_TABLE,
10600 a negative offset is allowed. */
10601 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10602 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10603 eliminate_sethi = 1;
10604 break;
10605
10606 case R_NDS32_PLT_GOTREL_HI20:
10607 access_addr = calculate_plt_memory_address (abfd, link_info, isymbuf,
10608 hi_irelfn, symtab_hdr);
10609
10610 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10611 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10612 eliminate_sethi = 1;
10613 break;
10614
10615 case R_NDS32_GOTOFF_HI20:
10616 access_addr =
10617 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10618
10619 if ((bfd_signed_vma) (access_addr - local_sda) < CONSERVATIVE_20BIT
10620 && (bfd_signed_vma) (access_addr - local_sda) >= -CONSERVATIVE_20BIT)
10621 eliminate_sethi = 1;
10622 break;
10623
10624 case R_NDS32_GOTPC_HI20:
10625 /* The access_addr must consider r_addend of hi_irel. */
10626 access_addr = sec->output_section->vma + sec->output_offset
10627 + irel->r_offset + hi_irelfn->r_addend;
10628
10629 if ((bfd_signed_vma) (local_sda - access_addr) < CONSERVATIVE_20BIT
10630 && (bfd_signed_vma) (local_sda - access_addr) >= -CONSERVATIVE_20BIT)
10631 eliminate_sethi = 1;
10632 break;
10633
10634 case R_NDS32_TLS_LE_HI20:
10635 access_addr =
10636 calculate_memory_address (abfd, hi_irelfn, isymbuf, symtab_hdr);
10637 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10638 access_addr -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10639 if ((range_type == NDS32_LOADSTORE_IMM)
10640 && (bfd_signed_vma) (access_addr) < CONSERVATIVE_20BIT
10641 && (bfd_signed_vma) (access_addr) >= -CONSERVATIVE_20BIT)
10642 eliminate_sethi = 1;
10643 break;
10644
10645 default:
10646 return FALSE;
10647 }
10648
10649 /* Delete sethi instruction. */
10650 if (eliminate_sethi == 1
10651 || (local_sda <= access_addr && (access_addr - local_sda) < range_h)
10652 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10653 {
10654 hi_irelfn->r_info =
10655 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_NDS32_NONE);
10656 irel->r_info =
10657 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
10658 *insn_len = 0;
10659 }
10660 return TRUE;
10661}
10662
10663/* Relax LO12 relocation for nds32_elf_relax_section. */
10664
10665static void
10666nds32_elf_relax_lo12 (struct bfd_link_info *link_info, bfd *abfd,
10667 asection *sec, Elf_Internal_Rela *irel,
10668 Elf_Internal_Rela *internal_relocs, bfd_byte *contents,
10669 Elf_Internal_Sym *isymbuf, Elf_Internal_Shdr *symtab_hdr)
10670{
10671 uint32_t insn;
10672 bfd_vma local_sda, laddr;
10673 unsigned long reloc;
10674 bfd_vma access_addr;
10675 bfd_vma range_l = 0, range_h = 0; /* Upper/lower bound. */
10676 Elf_Internal_Rela *irelfn = NULL, *irelend;
10677 struct elf_link_hash_entry *h = NULL;
10678 int indx;
10679
10680 /* For SDA base relative relaxation. */
10681 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10682 &local_sda, FALSE);
10683
10684 irelend = internal_relocs + sec->reloc_count;
10685 laddr = irel->r_offset;
10686 insn = bfd_getb32 (contents + laddr);
10687
10688 if (!is_sda_access_insn (insn) && N32_OP6 (insn) != N32_OP6_ORI)
10689 return;
10690
10691 access_addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10692
10693 if (ELF32_R_SYM (irel->r_info) >= symtab_hdr->sh_info)
10694 {
10695 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
10696 h = elf_sym_hashes (abfd)[indx];
10697 }
10698
10699 if (N32_OP6 (insn) == N32_OP6_ORI && access_addr < CONSERVATIVE_20BIT
10700 && (!h || (h && strcmp (h->root.root.string, FP_BASE_NAME) != 0)))
10701 {
10702 reloc = R_NDS32_20_RELA;
10703 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10704 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10705 bfd_putb32 (insn, contents + laddr);
10706 }
10707 /* This is avoid to relax symbol address which is fixed
10708 relocations. Ex: _stack. */
10709 else if (N32_OP6 (insn) == N32_OP6_ORI
10710 && h && bfd_is_abs_section (h->root.u.def.section))
10711 return;
10712 else
10713 {
10714 range_l = sdata_range[1][0];
10715 range_h = sdata_range[1][1];
10716 switch (ELF32_R_TYPE (irel->r_info))
10717 {
10718 case R_NDS32_LO12S0_RELA:
10719 reloc = R_NDS32_SDA19S0_RELA;
10720 break;
10721 case R_NDS32_LO12S1_RELA:
10722 reloc = R_NDS32_SDA18S1_RELA;
10723 break;
10724 case R_NDS32_LO12S2_RELA:
10725 reloc = R_NDS32_SDA17S2_RELA;
10726 break;
10727 case R_NDS32_LO12S2_DP_RELA:
10728 range_l = sdata_range[0][0];
10729 range_h = sdata_range[0][1];
10730 reloc = R_NDS32_SDA12S2_DP_RELA;
10731 break;
10732 case R_NDS32_LO12S2_SP_RELA:
10733 range_l = sdata_range[0][0];
10734 range_h = sdata_range[0][1];
10735 reloc = R_NDS32_SDA12S2_SP_RELA;
10736 break;
10737 default:
10738 return;
10739 }
10740
10741 /* There are range_h and range_l because linker has to promise
10742 all sections move cross one page together. */
10743 if ((local_sda <= access_addr && (access_addr - local_sda) < range_h)
10744 || (local_sda > access_addr && (local_sda - access_addr) <= range_l))
10745 {
10746 if (N32_OP6 (insn) == N32_OP6_ORI && N32_RT5 (insn) == REG_GP)
35c08157 10747 {
1c8f6a4d
KLC
10748 /* Maybe we should add R_NDS32_INSN16 reloc type here
10749 or manually do some optimization. sethi can't be
10750 eliminated when updating $gp so the relative ori
10751 needs to be preserved. */
10752 return;
35c08157 10753 }
1c8f6a4d
KLC
10754 if (!turn_insn_to_sda_access (insn, ELF32_R_TYPE (irel->r_info),
10755 &insn))
10756 return;
10757 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10758 bfd_putb32 (insn, contents + laddr);
10759
10760 irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10761 R_NDS32_INSN16);
10762 /* SDA17 must keep INSN16 for converting fp_as_gp. */
10763 if (irelfn != irelend && reloc != R_NDS32_SDA17S2_RELA)
10764 irelfn->r_info =
10765 ELF32_R_INFO (ELF32_R_SYM (irelfn->r_info), R_NDS32_NONE);
10766
35c08157 10767 }
1c8f6a4d
KLC
10768 }
10769 return;
10770}
35c08157 10771
1c8f6a4d
KLC
10772/* Relax low part of PIC instruction pattern. */
10773
10774static void
10775nds32_elf_relax_piclo12 (struct bfd_link_info *link_info, bfd *abfd,
10776 asection *sec, Elf_Internal_Rela *irel,
10777 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10778 Elf_Internal_Shdr *symtab_hdr)
10779{
10780 uint32_t insn;
10781 bfd_vma local_sda, laddr;
10782 bfd_signed_vma foff;
10783 unsigned long reloc;
10784
10785 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
10786 &local_sda, FALSE);
10787 laddr = irel->r_offset;
10788 insn = bfd_getb32 (contents + laddr);
10789
10790 if (N32_OP6 (insn) != N32_OP6_ORI)
10791 return;
10792
10793 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12)
10794 {
10795 foff = calculate_got_memory_address (abfd, link_info, irel,
10796 symtab_hdr) - local_sda;
10797 reloc = R_NDS32_GOT20;
10798 }
10799 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12)
10800 {
10801 foff = calculate_plt_memory_address (abfd, link_info, isymbuf, irel,
10802 symtab_hdr) - local_sda;
10803 reloc = R_NDS32_PLT_GOTREL_LO20;
10804 }
10805 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12)
10806 {
10807 foff = calculate_memory_address (abfd, irel, isymbuf,
10808 symtab_hdr) - local_sda;
10809 reloc = R_NDS32_GOTOFF;
10810 }
10811 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12)
10812 {
10813 foff = local_sda - sec->output_section->vma + sec->output_offset
10814 + irel->r_offset + irel->r_addend;
10815 reloc = R_NDS32_GOTPC20;
10816 }
10817 else
10818 return;
10819
10820 if ((foff < CONSERVATIVE_20BIT) && (foff >= -CONSERVATIVE_20BIT))
10821 {
10822 /* Turn into MOVI. */
10823 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10824 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10825 bfd_putb32 (insn, contents + laddr);
10826 }
10827}
10828
10829/* Relax low part of LE TLS instruction pattern. */
10830
10831static void
10832nds32_elf_relax_letlslo12 (struct bfd_link_info *link_info, bfd *abfd,
10833 Elf_Internal_Rela *irel,
10834 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10835 Elf_Internal_Shdr *symtab_hdr)
10836{
10837 uint32_t insn;
10838 bfd_vma laddr;
10839 bfd_signed_vma foff;
10840 unsigned long reloc;
10841
10842 laddr = irel->r_offset;
10843 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10844 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10845 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10846 insn = bfd_getb32 (contents + laddr);
10847
10848 if ( (bfd_signed_vma) (foff) < CONSERVATIVE_20BIT
10849 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_20BIT)
10850 {
10851 /* Pattern sethi-ori transform to movi. */
10852 reloc = R_NDS32_TLS_LE_20;
10853 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), reloc);
10854 insn = N32_TYPE1 (MOVI, N32_RT5 (insn), 0);
10855 bfd_putb32 (insn, contents + laddr);
10856 }
10857}
10858
10859/* Relax LE TLS calculate address instruction pattern. */
10860
10861static void
10862nds32_elf_relax_letlsadd (struct bfd_link_info *link_info, bfd *abfd,
10863 asection *sec, Elf_Internal_Rela *irel,
10864 Elf_Internal_Rela *internal_relocs,
10865 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10866 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10867{
10868 /* Local TLS non-pic
07d6d2b8 10869 sethi ta, hi20(symbol@tpoff) ; TLS_LE_HI20
1c8f6a4d 10870 ori ta, ta, lo12(symbol@tpoff) ; TLS_LE_LO12
07d6d2b8 10871 add ra, ta, tp ; TLS_LE_ADD */
1c8f6a4d
KLC
10872
10873 uint32_t insn;
10874 bfd_vma laddr;
10875 bfd_signed_vma foff;
10876 Elf_Internal_Rela *i1_irelfn, *irelend;
10877
10878 irelend = internal_relocs + sec->reloc_count;
10879 laddr = irel->r_offset;
10880 insn = bfd_getb32 (contents + laddr);
10881 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10882 R_NDS32_PTR_RESOLVED);
10883 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10884 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10885 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10886
10887 /* The range is +/-16k. */
10888 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10889 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10890 {
10891 /* Transform add to addi. */
10892 insn = N32_TYPE2 (ADDI, N32_RT5 (insn), N32_RB5 (insn), 0);
10893 irel->r_info =
10894 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10895
10896 bfd_putb32 (insn, contents + laddr);
10897 if (i1_irelfn != irelend)
10898 {
10899 i1_irelfn->r_addend |= 1;
10900 *again = TRUE;
10901 }
10902 }
10903}
10904
10905/* Relax LE TLS load store instruction pattern. */
10906
10907static void
10908nds32_elf_relax_letlsls (struct bfd_link_info *link_info, bfd *abfd,
10909 asection *sec, Elf_Internal_Rela *irel,
10910 Elf_Internal_Rela *internal_relocs,
10911 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
10912 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
10913{
10914
10915 uint32_t insn;
10916 bfd_vma laddr;
10917 bfd_signed_vma foff;
10918 Elf_Internal_Rela *i1_irelfn, *irelend;
10919 int success = 0;
10920
10921 irelend = internal_relocs + sec->reloc_count;
10922 laddr = irel->r_offset;
10923 insn = bfd_getb32 (contents + laddr);
10924 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
10925 R_NDS32_PTR_RESOLVED);
10926 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
10927 BFD_ASSERT (elf_hash_table (link_info)->tls_sec != NULL);
10928 foff -= (elf_hash_table (link_info)->tls_sec->vma + TP_OFFSET);
10929
10930 switch ((N32_OP6 (insn) << 8) | (insn & 0xff))
10931 {
10932 case (N32_OP6_MEM << 8) | N32_MEM_LB:
10933 case (N32_OP6_MEM << 8) | N32_MEM_SB:
10934 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
10935 /* The range is +/-16k. */
10936 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT
10937 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT)
10938 {
10939 insn =
10940 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10941 irel->r_info =
10942 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S0);
10943 success = 1;
10944 break;
10945 }
1a0670f3 10946 /* Fall through. */
1c8f6a4d
KLC
10947 case (N32_OP6_MEM << 8) | N32_MEM_LH:
10948 case (N32_OP6_MEM << 8) | N32_MEM_SH:
10949 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
10950 /* The range is +/-32k. */
10951 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S1
10952 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S1)
35c08157 10953 {
1c8f6a4d
KLC
10954 insn =
10955 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10956 irel->r_info =
10957 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S1);
10958 success = 1;
10959 break;
10960 }
1a0670f3 10961 /* Fall through. */
1c8f6a4d
KLC
10962 case (N32_OP6_MEM << 8) | N32_MEM_LW:
10963 case (N32_OP6_MEM << 8) | N32_MEM_SW:
10964 /* The range is +/-64k. */
10965 if ((bfd_signed_vma) (foff) < CONSERVATIVE_15BIT_S2
10966 && (bfd_signed_vma) (foff) >= -CONSERVATIVE_15BIT_S2)
10967 {
10968 insn =
10969 ((insn & 0xff) << 25) | (insn & 0x1f00000) | ((insn & 0x7c00) << 5);
10970 irel->r_info =
10971 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_TLS_LE_15S2);
10972 success = 1;
10973 break;
10974 }
1a0670f3 10975 /* Fall through. */
1c8f6a4d
KLC
10976 default:
10977 break;
10978 }
35c08157 10979
1c8f6a4d
KLC
10980 if (success)
10981 {
10982 bfd_putb32 (insn, contents + laddr);
10983 if (i1_irelfn != irelend)
10984 {
10985 i1_irelfn->r_addend |= 1;
10986 *again = TRUE;
10987 }
10988 }
10989}
35c08157 10990
1c8f6a4d 10991/* Relax PTR relocation for nds32_elf_relax_section. */
35c08157 10992
1c8f6a4d
KLC
10993static bfd_boolean
10994nds32_elf_relax_ptr (bfd *abfd, asection *sec, Elf_Internal_Rela *irel,
10995 Elf_Internal_Rela *internal_relocs, int *insn_len,
10996 int *seq_len, bfd_byte *contents)
10997{
10998 Elf_Internal_Rela *ptr_irel, *irelend, *count_irel, *re_irel;
35c08157 10999
1c8f6a4d 11000 irelend = internal_relocs + sec->reloc_count;
35c08157 11001
1c8f6a4d
KLC
11002 re_irel =
11003 find_relocs_at_address_addr (irel, internal_relocs, irelend,
11004 R_NDS32_PTR_RESOLVED, irel->r_addend);
35c08157 11005
1c8f6a4d
KLC
11006 if (re_irel == irelend)
11007 {
695344c0 11008 _bfd_error_handler (unrecognized_reloc_msg, abfd, "R_NDS32_PTR",
2dcf00ce 11009 (uint64_t) irel->r_offset);
1c8f6a4d
KLC
11010 return FALSE;
11011 }
35c08157 11012
1c8f6a4d
KLC
11013 if (re_irel->r_addend != 1)
11014 return FALSE;
35c08157 11015
1c8f6a4d
KLC
11016 /* Pointed target is relaxed and no longer needs this void *,
11017 change the type to NONE. */
11018 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
35c08157 11019
1c8f6a4d
KLC
11020 /* Find PTR_COUNT to decide remove it or not. If PTR_COUNT does
11021 not exist, it means only count 1 and remove it directly. */
11022 /* TODO: I hope we can obsolate R_NDS32_COUNT in the future. */
11023 count_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11024 R_NDS32_PTR_COUNT);
11025 ptr_irel = find_relocs_at_address (irel, internal_relocs, irelend,
11026 R_NDS32_PTR);
11027 if (count_irel != irelend)
11028 {
11029 if (--count_irel->r_addend > 0)
11030 return FALSE;
11031 }
11032
11033 if (ptr_irel != irelend)
11034 return FALSE;
11035
11036 /* If the PTR_COUNT is already 0, remove current instruction. */
11037 *seq_len = nds32_elf_insn_size (abfd, contents, irel->r_offset);
11038 *insn_len = 0;
11039 return TRUE;
11040}
11041
11042/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11043
11044static void
11045nds32_elf_relax_pltgot_suff (struct bfd_link_info *link_info, bfd *abfd,
11046 asection *sec, Elf_Internal_Rela *irel,
11047 Elf_Internal_Rela *internal_relocs,
11048 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11049 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11050{
11051 uint32_t insn;
11052 bfd_signed_vma foff;
11053 Elf_Internal_Rela *i1_irelfn, *irelend;
11054 bfd_vma local_sda, laddr;
11055
11056 irelend = internal_relocs + sec->reloc_count;
11057 laddr = irel->r_offset;
11058 insn = bfd_getb32 (contents + laddr);
11059
11060 /* FIXME: It's a little trouble to turn JRAL5 to JAL since
11061 we need additional space. It might be help if we could
11062 borrow some space from instructions to be eliminated
11063 such as sethi, ori, add. */
11064 if (insn & 0x80000000)
11065 return;
11066
11067 if (nds32_elf_check_dup_relocs
11068 (irel, internal_relocs, irelend, R_NDS32_PLT_GOT_SUFF))
11069 return;
11070
11071 i1_irelfn =
11072 find_relocs_at_address (irel, internal_relocs, irelend,
11073 R_NDS32_PTR_RESOLVED);
11074
11075 /* FIXIT 090606
11076 The boundary should be reduced since the .plt section hasn't
11077 been created and the address of specific entry is still unknown
11078 Maybe the range between the function call and the begin of the
11079 .text section can be used to decide if the .plt is in the range
11080 of function call. */
11081
11082 if (N32_OP6 (insn) == N32_OP6_ALU1
11083 && N32_SUB5 (insn) == N32_ALU1_ADD)
11084 {
11085 /* Get the value of the symbol referred to by the reloc. */
11086 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11087 &local_sda, FALSE);
11088 foff = (bfd_signed_vma) (calculate_plt_memory_address
11089 (abfd, link_info, isymbuf, irel,
11090 symtab_hdr) - local_sda);
11091 /* This condition only happened when symbol is undefined. */
11092 if (foff == 0)
11093 return;
11094
11095 if (foff < -CONSERVATIVE_19BIT || foff >= CONSERVATIVE_19BIT)
11096 return;
11097 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11098 R_NDS32_PLT_GOTREL_LO19);
11099 /* addi.gp */
4ec521f2 11100 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11101 }
11102 else if (N32_OP6 (insn) == N32_OP6_JREG
11103 && N32_SUB5 (insn) == N32_JREG_JRAL)
11104 {
11105 /* Get the value of the symbol referred to by the reloc. */
11106 foff =
11107 calculate_plt_offset (abfd, sec, link_info, isymbuf, irel, symtab_hdr);
11108 /* This condition only happened when symbol is undefined. */
11109 if (foff == 0)
11110 return;
11111 if (foff < -CONSERVATIVE_24BIT_S1 || foff >= CONSERVATIVE_24BIT_S1)
11112 return;
11113 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_25_PLTREL);
11114 insn = INSN_JAL;
11115 }
11116 else
11117 return;
11118
11119 bfd_putb32 (insn, contents + laddr);
11120 if (i1_irelfn != irelend)
11121 {
11122 i1_irelfn->r_addend |= 1;
11123 *again = TRUE;
11124 }
11125}
11126
11127/* Relax GOT_SUFF relocation for nds32_elf_relax_section. */
11128
11129static void
11130nds32_elf_relax_got_suff (struct bfd_link_info *link_info, bfd *abfd,
11131 asection *sec, Elf_Internal_Rela *irel,
11132 Elf_Internal_Rela *internal_relocs,
11133 bfd_byte *contents, Elf_Internal_Shdr *symtab_hdr,
11134 bfd_boolean *again)
11135{
11136 uint32_t insn;
11137 bfd_signed_vma foff;
11138 Elf_Internal_Rela *i1_irelfn, *irelend;
11139 bfd_vma local_sda, laddr;
11140
11141 irelend = internal_relocs + sec->reloc_count;
11142 laddr = irel->r_offset;
11143 insn = bfd_getb32 (contents + laddr);
11144 if (insn & 0x80000000)
11145 return;
11146
11147 if (nds32_elf_check_dup_relocs
11148 (irel, internal_relocs, irelend, R_NDS32_GOT_SUFF))
11149 return;
11150
11151 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11152 R_NDS32_PTR_RESOLVED);
11153
11154 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11155 &local_sda, FALSE);
11156 foff = calculate_got_memory_address (abfd, link_info, irel,
11157 symtab_hdr) - local_sda;
11158
11159 if (foff < CONSERVATIVE_19BIT && foff >= -CONSERVATIVE_19BIT)
11160 {
11161 /* Turn LW to LWI.GP. Change relocation type to R_NDS32_GOT_REL. */
11162 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11163 irel->r_info =
11164 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_GOT17S2_RELA);
11165 bfd_putb32 (insn, contents + laddr);
11166 if (i1_irelfn != irelend)
11167 {
11168 i1_irelfn->r_addend |= 1;
11169 *again = TRUE;
11170 }
11171 }
11172}
11173
11174/* Relax PLT_GOT_SUFF relocation for nds32_elf_relax_section. */
11175
11176static void
11177nds32_elf_relax_gotoff_suff (struct bfd_link_info *link_info, bfd *abfd,
11178 asection *sec, Elf_Internal_Rela *irel,
11179 Elf_Internal_Rela *internal_relocs,
11180 bfd_byte *contents, Elf_Internal_Sym *isymbuf,
11181 Elf_Internal_Shdr *symtab_hdr, bfd_boolean *again)
11182{
11183 int opc_insn_gotoff;
11184 uint32_t insn;
11185 bfd_signed_vma foff;
11186 Elf_Internal_Rela *i1_irelfn, *i2_irelfn, *irelend;
11187 bfd_vma local_sda, laddr;
11188
11189 irelend = internal_relocs + sec->reloc_count;
11190 laddr = irel->r_offset;
11191 insn = bfd_getb32 (contents + laddr);
11192
11193 if (insn & 0x80000000)
11194 return;
11195
11196 if (nds32_elf_check_dup_relocs
11197 (irel, internal_relocs, irelend, R_NDS32_GOTOFF_SUFF))
11198 return;
11199
11200 i1_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11201 R_NDS32_PTR_RESOLVED);
11202 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11203 &local_sda, FALSE);
11204 foff = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
11205 foff = foff - local_sda;
11206
11207 if (foff >= CONSERVATIVE_19BIT || foff < -CONSERVATIVE_19BIT)
11208 return;
11209
11210 /* Concatenate opcode and sub-opcode for switch case.
11211 It may be MEM or ALU1. */
11212 opc_insn_gotoff = (N32_OP6 (insn) << 8) | (insn & 0xff);
11213 switch (opc_insn_gotoff)
11214 {
11215 case (N32_OP6_MEM << 8) | N32_MEM_LW:
11216 /* 4-byte aligned. */
11217 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (6, 17, 3));
11218 irel->r_info =
11219 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11220 break;
11221 case (N32_OP6_MEM << 8) | N32_MEM_SW:
11222 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), __MF (7, 17, 3));
11223 irel->r_info =
11224 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA17S2_RELA);
11225 break;
11226 case (N32_OP6_MEM << 8) | N32_MEM_LH:
11227 /* 2-byte aligned. */
11228 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), 0);
11229 irel->r_info =
11230 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11231 break;
11232 case (N32_OP6_MEM << 8) | N32_MEM_LHS:
4ec521f2 11233 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (18));
1c8f6a4d
KLC
11234 irel->r_info =
11235 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11236 break;
11237 case (N32_OP6_MEM << 8) | N32_MEM_SH:
4ec521f2 11238 insn = N32_TYPE1 (HWGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11239 irel->r_info =
11240 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA18S1_RELA);
11241 break;
11242 case (N32_OP6_MEM << 8) | N32_MEM_LB:
11243 /* 1-byte aligned. */
11244 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), 0);
11245 irel->r_info =
11246 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11247 break;
11248 case (N32_OP6_MEM << 8) | N32_MEM_LBS:
4ec521f2 11249 insn = N32_TYPE1 (LBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11250 irel->r_info =
11251 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11252 break;
11253 case (N32_OP6_MEM << 8) | N32_MEM_SB:
11254 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), 0);
11255 irel->r_info =
11256 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11257 break;
11258 case (N32_OP6_ALU1 << 8) | N32_ALU1_ADD:
4ec521f2 11259 insn = N32_TYPE1 (SBGP, N32_RT5 (insn), N32_BIT (19));
1c8f6a4d
KLC
11260 irel->r_info =
11261 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_SDA19S0_RELA);
11262 break;
11263 default:
11264 return;
11265 }
11266
11267 bfd_putb32 (insn, contents + laddr);
11268 if (i1_irelfn != irelend)
11269 {
11270 i1_irelfn->r_addend |= 1;
11271 *again = TRUE;
11272 }
11273 if ((i2_irelfn = find_relocs_at_address (irel, internal_relocs, irelend,
11274 R_NDS32_INSN16)) != irelend)
11275 i2_irelfn->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11276
11277}
11278
11279static bfd_boolean
11280nds32_relax_adjust_label (bfd *abfd, asection *sec,
11281 Elf_Internal_Rela *internal_relocs,
11282 bfd_byte *contents,
11283 nds32_elf_blank_t **relax_blank_list,
11284 int optimize, int opt_size)
11285{
11286 /* This code block is used to adjust 4-byte alignment by relax a pair
11287 of instruction a time.
11288
11289 It recognizes three types of relocations.
de194d85 11290 1. R_NDS32_LABEL - a alignment.
1c8f6a4d
KLC
11291 2. R_NDS32_INSN16 - relax a 32-bit instruction to 16-bit.
11292 3. is_16bit_NOP () - remove a 16-bit instruction. */
11293
de194d85
YC
11294 /* TODO: It seems currently implementation only support 4-byte alignment.
11295 We should handle any-alignment. */
1c8f6a4d
KLC
11296
11297 Elf_Internal_Rela *insn_rel = NULL, *label_rel = NULL, *irel;
11298 Elf_Internal_Rela *tmp_rel, *tmp2_rel = NULL;
11299 Elf_Internal_Rela rel_temp;
11300 Elf_Internal_Rela *irelend;
11301 bfd_vma address;
11302 uint16_t insn16;
11303
11304 /* Checking for branch relaxation relies on the relocations to
11305 be sorted on 'r_offset'. This is not guaranteed so we must sort. */
11306 nds32_insertion_sort (internal_relocs, sec->reloc_count,
11307 sizeof (Elf_Internal_Rela), compar_reloc);
11308
11309 irelend = internal_relocs + sec->reloc_count;
11310
11311 /* Force R_NDS32_LABEL before R_NDS32_INSN16. */
11312 /* FIXME: Can we generate the right order in assembler?
11313 So we don't have to swapping them here. */
11314
11315 for (label_rel = internal_relocs, insn_rel = internal_relocs;
11316 label_rel < irelend; label_rel++)
11317 {
11318 if (ELF32_R_TYPE (label_rel->r_info) != R_NDS32_LABEL)
11319 continue;
11320
11321 /* Find the first reloc has the same offset with label_rel. */
11322 while (insn_rel < irelend && insn_rel->r_offset < label_rel->r_offset)
11323 insn_rel++;
11324
11325 for (;insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset;
11326 insn_rel++)
11327 /* Check if there were R_NDS32_INSN16 and R_NDS32_LABEL at the same
11328 address. */
11329 if (ELF32_R_TYPE (insn_rel->r_info) == R_NDS32_INSN16)
11330 break;
11331
11332 if (insn_rel < irelend && insn_rel->r_offset == label_rel->r_offset
11333 && insn_rel < label_rel)
11334 {
11335 /* Swap the two reloc if the R_NDS32_INSN16 is
11336 before R_NDS32_LABEL. */
11337 memcpy (&rel_temp, insn_rel, sizeof (Elf_Internal_Rela));
11338 memcpy (insn_rel, label_rel, sizeof (Elf_Internal_Rela));
11339 memcpy (label_rel, &rel_temp, sizeof (Elf_Internal_Rela));
11340 }
11341 }
11342
11343 label_rel = NULL;
11344 insn_rel = NULL;
11345 /* If there were a sequence of R_NDS32_LABEL end up with .align 2
11346 or higher, remove other R_NDS32_LABEL with lower alignment.
11347 If an R_NDS32_INSN16 in between R_NDS32_LABELs must be converted,
11348 then the R_NDS32_LABEL sequence is broke. */
11349 for (tmp_rel = internal_relocs; tmp_rel < irelend; tmp_rel++)
11350 {
11351 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_LABEL)
11352 {
11353 if (label_rel == NULL)
11354 {
11355 if (tmp_rel->r_addend < 2)
11356 label_rel = tmp_rel;
11357 continue;
11358 }
11359 else if (tmp_rel->r_addend > 1)
11360 {
11361 /* Remove all LABEL relocation from label_rel to tmp_rel
11362 including relocations with same offset as tmp_rel. */
11363 for (tmp2_rel = label_rel; tmp2_rel < tmp_rel
11364 || tmp2_rel->r_offset == tmp_rel->r_offset; tmp2_rel++)
11365 {
11366 if (ELF32_R_TYPE (tmp2_rel->r_info) == R_NDS32_LABEL
11367 && tmp2_rel->r_addend < 2)
11368 tmp2_rel->r_info =
11369 ELF32_R_INFO (ELF32_R_SYM (tmp2_rel->r_info),
11370 R_NDS32_NONE);
11371 }
11372 label_rel = NULL;
11373 }
11374 }
11375 else if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16 && label_rel)
11376 {
11377 /* A new INSN16 which can be converted, so clear label_rel. */
11378 if (is_convert_32_to_16 (abfd, sec, tmp_rel, internal_relocs,
11379 irelend, &insn16)
11380 || is_16bit_NOP (abfd, sec, tmp_rel))
11381 label_rel = NULL;
11382 }
11383 }
11384
11385 label_rel = NULL;
11386 insn_rel = NULL;
11387 /* Optimized for speed and nothing has not been relaxed.
11388 It's time to align labels.
11389 We may convert a 16-bit instruction right before a label to
11390 32-bit, in order to align the label if necessary
11391 all reloc entries has been sorted by r_offset. */
11392 for (irel = internal_relocs; irel < irelend; irel++)
11393 {
11394 if (ELF32_R_TYPE (irel->r_info) != R_NDS32_INSN16
11395 && ELF32_R_TYPE (irel->r_info) != R_NDS32_LABEL)
11396 continue;
11397
11398 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_INSN16)
11399 {
11400 /* A new INSN16 found, resize the old one. */
11401 if (is_convert_32_to_16
11402 (abfd, sec, irel, internal_relocs, irelend, &insn16)
11403 || is_16bit_NOP (abfd, sec, irel))
11404 {
11405 if (insn_rel)
11406 {
11407 /* Previous INSN16 reloc exists, reduce its
11408 size to 16-bit. */
11409 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11410 irelend, &insn16))
35c08157 11411 {
1c8f6a4d
KLC
11412 nds32_elf_write_16 (abfd, contents, insn_rel,
11413 internal_relocs, irelend, insn16);
11414
11415 if (!insert_nds32_elf_blank_recalc_total
11416 (relax_blank_list, insn_rel->r_offset + 2, 2))
11417 return FALSE;
11418 }
11419 else if (is_16bit_NOP (abfd, sec, insn_rel))
11420 {
11421 if (!insert_nds32_elf_blank_recalc_total
11422 (relax_blank_list, insn_rel->r_offset, 2))
11423 return FALSE;
11424 }
11425 insn_rel->r_info =
11426 ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info), R_NDS32_NONE);
11427 }
11428 /* Save the new one for later use. */
11429 insn_rel = irel;
11430 }
11431 else
11432 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
11433 R_NDS32_NONE);
11434 }
11435 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL)
11436 {
11437 /* Search for label. */
11438 int force_relax = 0;
11439
11440 /* Label on 16-bit instruction or optimization
11441 needless, just reset this reloc. */
11442 insn16 = bfd_getb16 (contents + irel->r_offset);
11443 if ((irel->r_addend & 0x1f) < 2 && (!optimize || (insn16 & 0x8000)))
11444 {
11445 irel->r_info =
11446 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_NDS32_NONE);
11447 continue;
11448 }
11449
11450 address =
11451 irel->r_offset - get_nds32_elf_blank_total (relax_blank_list,
11452 irel->r_offset, 1);
11453
11454 if (!insn_rel)
11455 {
11456 /* Check if there is case which can not be aligned. */
11457 if (irel->r_addend == 2 && address & 0x2)
11458 return FALSE;
11459 continue;
11460 }
11461
11462 /* Try to align this label. */
11463
11464 if ((irel->r_addend & 0x1f) < 2)
11465 {
11466 /* Check if there is a INSN16 at the same address.
11467 Label_rel always seats before insn_rel after
11468 our sort. */
11469
11470 /* Search for INSN16 at LABEL location. If INSN16 is at
11471 same location and this LABEL alignment is lower than 2,
11472 the INSN16 can be converted to 2-byte. */
11473 for (tmp_rel = irel;
11474 tmp_rel < irelend && tmp_rel->r_offset == irel->r_offset;
11475 tmp_rel++)
11476 {
11477 if (ELF32_R_TYPE (tmp_rel->r_info) == R_NDS32_INSN16
11478 && (is_convert_32_to_16
11479 (abfd, sec, tmp_rel, internal_relocs,
11480 irelend, &insn16)
11481 || is_16bit_NOP (abfd, sec, tmp_rel)))
11482 {
11483 force_relax = 1;
11484 break;
11485 }
11486 }
11487 }
11488
11489 if (force_relax || irel->r_addend == 1 || address & 0x2)
11490 {
11491 /* Label not aligned. */
11492 /* Previous reloc exists, reduce its size to 16-bit. */
11493 if (is_convert_32_to_16 (abfd, sec, insn_rel,
11494 internal_relocs, irelend, &insn16))
11495 {
11496 nds32_elf_write_16 (abfd, contents, insn_rel,
11497 internal_relocs, irelend, insn16);
11498
11499 if (!insert_nds32_elf_blank_recalc_total
11500 (relax_blank_list, insn_rel->r_offset + 2, 2))
11501 return FALSE;
11502 }
11503 else if (is_16bit_NOP (abfd, sec, insn_rel))
11504 {
11505 if (!insert_nds32_elf_blank_recalc_total
11506 (relax_blank_list, insn_rel->r_offset, 2))
11507 return FALSE;
11508 }
11509
11510 }
11511 /* INSN16 reloc is used. */
11512 insn_rel = NULL;
11513 }
11514 }
11515
11516 address =
11517 sec->size - get_nds32_elf_blank_total (relax_blank_list, sec->size, 0);
11518 if (insn_rel && (address & 0x2 || opt_size))
11519 {
11520 if (is_convert_32_to_16 (abfd, sec, insn_rel, internal_relocs,
11521 irelend, &insn16))
11522 {
11523 nds32_elf_write_16 (abfd, contents, insn_rel, internal_relocs,
11524 irelend, insn16);
11525 if (!insert_nds32_elf_blank_recalc_total
11526 (relax_blank_list, insn_rel->r_offset + 2, 2))
11527 return FALSE;
11528 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11529 R_NDS32_NONE);
11530 }
11531 else if (is_16bit_NOP (abfd, sec, insn_rel))
11532 {
11533 if (!insert_nds32_elf_blank_recalc_total
11534 (relax_blank_list, insn_rel->r_offset, 2))
11535 return FALSE;
11536 insn_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (insn_rel->r_info),
11537 R_NDS32_NONE);
11538 }
11539 }
11540 insn_rel = NULL;
11541 return TRUE;
11542}
11543
1c8f6a4d
KLC
11544static bfd_boolean
11545nds32_elf_relax_section (bfd *abfd, asection *sec,
11546 struct bfd_link_info *link_info, bfd_boolean *again)
11547{
11548 nds32_elf_blank_t *relax_blank_list = NULL;
11549 Elf_Internal_Shdr *symtab_hdr;
11550 Elf_Internal_Rela *internal_relocs;
11551 Elf_Internal_Rela *irel;
11552 Elf_Internal_Rela *irelend;
11553 Elf_Internal_Sym *isymbuf = NULL;
11554 bfd_byte *contents = NULL;
11555 bfd_boolean result = TRUE;
11556 int optimize = 0;
11557 int opt_size = 0;
11558 uint32_t insn;
11559 uint16_t insn16;
11560
11561 /* Target dependnet option. */
11562 struct elf_nds32_link_hash_table *table;
11563 int load_store_relax;
1c8f6a4d
KLC
11564
11565 relax_blank_list = NULL;
11566
11567 *again = FALSE;
11568
11569 /* Nothing to do for
11570 * relocatable link or
11571 * non-relocatable section or
11572 * non-code section or
11573 * empty content or
11574 * no reloc entry. */
0e1862bb 11575 if (bfd_link_relocatable (link_info)
1c8f6a4d 11576 || (sec->flags & SEC_RELOC) == 0
cd28e7aa 11577 || (sec->flags & SEC_EXCLUDE) != 0
1c8f6a4d
KLC
11578 || (sec->flags & SEC_CODE) == 0
11579 || sec->size == 0)
11580 return TRUE;
11581
11582 /* 09.12.11 Workaround. */
11583 /* We have to adjust align for R_NDS32_LABEL if needed.
11584 The adjust approach only can fix 2-byte align once. */
11585 if (sec->alignment_power > 2)
11586 return TRUE;
11587
11588 /* The optimization type to do. */
11589
11590 table = nds32_elf_hash_table (link_info);
1c8f6a4d
KLC
11591
11592 /* The begining of general relaxation. */
11593
11594 if (is_SDA_BASE_set == 0)
11595 {
11596 bfd_vma gp;
11597 is_SDA_BASE_set = 1;
11598 nds32_elf_final_sda_base (sec->output_section->owner, link_info,
11599 &gp, FALSE);
11600 relax_range_measurement (abfd);
11601 }
11602
1c8f6a4d
KLC
11603 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
11604 /* Relocations MUST be kept in memory, because relaxation adjust them. */
11605 internal_relocs = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL,
11606 TRUE /* keep_memory */);
11607 if (internal_relocs == NULL)
11608 goto error_return;
11609
11610 irelend = internal_relocs + sec->reloc_count;
11611 irel = find_relocs_at_address (internal_relocs, internal_relocs,
11612 irelend, R_NDS32_RELAX_ENTRY);
11613
11614 if (irel == irelend)
11615 return TRUE;
11616
11617 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_ENTRY)
11618 {
11619 if (irel->r_addend & R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG)
f9671640 11620 return TRUE;
1c8f6a4d
KLC
11621
11622 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FLAG)
11623 optimize = 1;
11624
11625 if (irel->r_addend & R_NDS32_RELAX_ENTRY_OPTIMIZE_FOR_SPACE_FLAG)
11626 opt_size = 1;
11627 }
11628
11629 load_store_relax = table->load_store_relax;
11630
11631 /* Get symbol table and section content. */
0c4bd9d9 11632 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
1c8f6a4d
KLC
11633 || !nds32_get_local_syms (abfd, sec, &isymbuf))
11634 goto error_return;
11635
11636 /* Do relax loop only when finalize is not done.
11637 Take care of relaxable relocs except INSN16. */
11638 for (irel = internal_relocs; irel < irelend; irel++)
11639 {
11640 int seq_len; /* Original length of instruction sequence. */
11641 int insn_len = 0; /* Final length of instruction sequence. */
11642 bfd_boolean removed;
11643
11644 insn = 0;
11645 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_LABEL
11646 && (irel->r_addend & 0x1f) >= 2)
11647 optimize = 1;
11648
11649 /* Relocation Types
11650 R_NDS32_LONGCALL1 53
11651 R_NDS32_LONGCALL2 54
11652 R_NDS32_LONGCALL3 55
11653 R_NDS32_LONGJUMP1 56
11654 R_NDS32_LONGJUMP2 57
11655 R_NDS32_LONGJUMP3 58
11656 R_NDS32_LOADSTORE 59 */
11657 if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL1
11658 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LOADSTORE)
11659 seq_len = GET_SEQ_LEN (irel->r_addend);
11660
11661 /* Relocation Types
11662 R_NDS32_LONGCALL4 107
11663 R_NDS32_LONGCALL5 108
11664 R_NDS32_LONGCALL6 109
11665 R_NDS32_LONGJUMP4 110
11666 R_NDS32_LONGJUMP5 111
11667 R_NDS32_LONGJUMP6 112
11668 R_NDS32_LONGJUMP7 113 */
11669 else if (ELF32_R_TYPE (irel->r_info) >= R_NDS32_LONGCALL4
11670 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_LONGJUMP7)
11671 seq_len = 4;
11672
11673 /* Relocation Types
11674 R_NDS32_LO12S0_RELA 30
11675 R_NDS32_LO12S1_RELA 29
11676 R_NDS32_LO12S2_RELA 28
11677 R_NDS32_LO12S2_SP_RELA 71
11678 R_NDS32_LO12S2_DP_RELA 70
11679 R_NDS32_GOT_LO12 46
11680 R_NDS32_GOTOFF_LO12 50
11681 R_NDS32_PLTREL_LO12 65
11682 R_NDS32_PLT_GOTREL_LO12 67
11683 R_NDS32_17IFC_PCREL_RELA 96
11684 R_NDS32_GOT_SUFF 193
11685 R_NDS32_GOTOFF_SUFF 194
11686 R_NDS32_PLT_GOT_SUFF 195
11687 R_NDS32_MULCALL_SUFF 196
11688 R_NDS32_PTR 197 */
11689 else if ((ELF32_R_TYPE (irel->r_info) <= R_NDS32_LO12S0_RELA
11690 && ELF32_R_TYPE (irel->r_info) >= R_NDS32_LO12S2_RELA)
11691 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_SP_RELA
11692 || ELF32_R_TYPE (irel->r_info) == R_NDS32_LO12S2_DP_RELA
11693 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOT_LO12
11694 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTOFF_LO12
11695 || ELF32_R_TYPE (irel->r_info) == R_NDS32_GOTPC_LO12
11696 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLTREL_LO12
11697 || ELF32_R_TYPE (irel->r_info) == R_NDS32_PLT_GOTREL_LO12
11698 || (ELF32_R_TYPE (irel->r_info) >= R_NDS32_GOT_SUFF
11699 && ELF32_R_TYPE (irel->r_info) <= R_NDS32_PTR)
11700 || ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
11701 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LO12
11702 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_ADD
11703 || ELF32_R_TYPE (irel->r_info) == R_NDS32_TLS_LE_LS)
11704 seq_len = 0;
11705 else
11706 continue;
11707
11708 insn_len = seq_len;
11709 removed = FALSE;
11710
11711 switch (ELF32_R_TYPE (irel->r_info))
11712 {
11713 case R_NDS32_LONGCALL1:
11714 removed = nds32_elf_relax_longcall1 (abfd, sec, irel, internal_relocs,
11715 &insn_len, contents, isymbuf,
11716 symtab_hdr);
11717 break;
11718 case R_NDS32_LONGCALL2:
11719 removed = nds32_elf_relax_longcall2 (abfd, sec, irel, internal_relocs,
11720 &insn_len, contents, isymbuf,
11721 symtab_hdr);
11722 break;
11723 case R_NDS32_LONGCALL3:
11724 removed = nds32_elf_relax_longcall3 (abfd, sec, irel, internal_relocs,
11725 &insn_len, contents, isymbuf,
11726 symtab_hdr);
11727 break;
11728 case R_NDS32_LONGJUMP1:
11729 removed = nds32_elf_relax_longjump1 (abfd, sec, irel, internal_relocs,
11730 &insn_len, contents, isymbuf,
11731 symtab_hdr);
11732 break;
11733 case R_NDS32_LONGJUMP2:
11734 removed = nds32_elf_relax_longjump2 (abfd, sec, irel, internal_relocs,
11735 &insn_len, contents, isymbuf,
11736 symtab_hdr);
11737 break;
11738 case R_NDS32_LONGJUMP3:
11739 removed = nds32_elf_relax_longjump3 (abfd, sec, irel, internal_relocs,
11740 &insn_len, contents, isymbuf,
11741 symtab_hdr);
11742 break;
11743 case R_NDS32_LONGCALL4:
11744 removed = nds32_elf_relax_longcall4 (abfd, sec, irel, internal_relocs,
11745 &insn_len, contents, isymbuf,
11746 symtab_hdr);
11747 break;
11748 case R_NDS32_LONGCALL5:
11749 removed = nds32_elf_relax_longcall5 (abfd, sec, irel, internal_relocs,
11750 &insn_len, contents, isymbuf,
11751 symtab_hdr);
11752 break;
11753 case R_NDS32_LONGCALL6:
11754 removed = nds32_elf_relax_longcall6 (abfd, sec, irel, internal_relocs,
11755 &insn_len, contents, isymbuf,
11756 symtab_hdr);
11757 break;
11758 case R_NDS32_LONGJUMP4:
11759 removed = nds32_elf_relax_longjump4 (abfd, sec, irel, internal_relocs,
11760 &insn_len, contents, isymbuf,
11761 symtab_hdr);
11762 break;
11763 case R_NDS32_LONGJUMP5:
11764 removed = nds32_elf_relax_longjump5 (abfd, sec, irel, internal_relocs,
11765 &insn_len, &seq_len, contents,
11766 isymbuf, symtab_hdr);
11767 break;
11768 case R_NDS32_LONGJUMP6:
11769 removed = nds32_elf_relax_longjump6 (abfd, sec, irel, internal_relocs,
11770 &insn_len, &seq_len, contents,
11771 isymbuf, symtab_hdr);
11772 break;
11773 case R_NDS32_LONGJUMP7:
11774 removed = nds32_elf_relax_longjump7 (abfd, sec, irel, internal_relocs,
11775 &insn_len, &seq_len, contents,
11776 isymbuf, symtab_hdr);
11777 break;
11778 case R_NDS32_LOADSTORE:
11779 removed = nds32_elf_relax_loadstore (link_info, abfd, sec, irel,
11780 internal_relocs, &insn_len,
11781 contents, isymbuf, symtab_hdr,
11782 load_store_relax);
11783 break;
11784 case R_NDS32_LO12S0_RELA:
11785 case R_NDS32_LO12S1_RELA:
11786 case R_NDS32_LO12S2_DP_RELA:
11787 case R_NDS32_LO12S2_SP_RELA:
11788 case R_NDS32_LO12S2_RELA:
11789 /* Relax for low part. */
11790 nds32_elf_relax_lo12 (link_info, abfd, sec, irel, internal_relocs,
11791 contents, isymbuf, symtab_hdr);
11792
11793 /* It is impossible to delete blank, so just continue. */
11794 continue;
11795 case R_NDS32_GOT_LO12:
11796 case R_NDS32_GOTOFF_LO12:
11797 case R_NDS32_PLTREL_LO12:
11798 case R_NDS32_PLT_GOTREL_LO12:
11799 case R_NDS32_GOTPC_LO12:
11800 /* Relax for PIC gp-relative low part. */
11801 nds32_elf_relax_piclo12 (link_info, abfd, sec, irel, contents,
11802 isymbuf, symtab_hdr);
35c08157 11803
1c8f6a4d
KLC
11804 /* It is impossible to delete blank, so just continue. */
11805 continue;
11806 case R_NDS32_TLS_LE_LO12:
11807 /* Relax for LE TLS low part. */
11808 nds32_elf_relax_letlslo12 (link_info, abfd, irel, contents,
11809 isymbuf, symtab_hdr);
35c08157 11810
1c8f6a4d
KLC
11811 /* It is impossible to delete blank, so just continue. */
11812 continue;
11813 case R_NDS32_TLS_LE_ADD:
11814 nds32_elf_relax_letlsadd (link_info, abfd, sec, irel, internal_relocs,
11815 contents, isymbuf, symtab_hdr, again);
11816 /* It is impossible to delete blank, so just continue. */
11817 continue;
11818 case R_NDS32_TLS_LE_LS:
11819 nds32_elf_relax_letlsls (link_info, abfd, sec, irel, internal_relocs,
11820 contents, isymbuf, symtab_hdr, again);
11821 continue;
11822 case R_NDS32_PTR:
11823 removed = nds32_elf_relax_ptr (abfd, sec, irel, internal_relocs,
11824 &insn_len, &seq_len, contents);
11825 break;
11826 case R_NDS32_PLT_GOT_SUFF:
11827 nds32_elf_relax_pltgot_suff (link_info, abfd, sec, irel,
11828 internal_relocs, contents,
11829 isymbuf, symtab_hdr, again);
11830 /* It is impossible to delete blank, so just continue. */
11831 continue;
11832 case R_NDS32_GOT_SUFF:
11833 nds32_elf_relax_got_suff (link_info, abfd, sec, irel,
11834 internal_relocs, contents,
11835 symtab_hdr, again);
11836 /* It is impossible to delete blank, so just continue. */
11837 continue;
11838 case R_NDS32_GOTOFF_SUFF:
11839 nds32_elf_relax_gotoff_suff (link_info, abfd, sec, irel,
11840 internal_relocs, contents,
11841 isymbuf, symtab_hdr, again);
11842 /* It is impossible to delete blank, so just continue. */
11843 continue;
11844 default:
11845 continue;
11846
11847 }
11848 if (removed && seq_len - insn_len > 0)
11849 {
11850 if (!insert_nds32_elf_blank
11851 (&relax_blank_list, irel->r_offset + insn_len,
11852 seq_len - insn_len))
11853 goto error_return;
11854 *again = TRUE;
35c08157 11855 }
1c8f6a4d
KLC
11856 }
11857
11858 calc_nds32_blank_total (relax_blank_list);
11859
11860 if (table->relax_fp_as_gp)
11861 {
11862 if (!nds32_relax_fp_as_gp (link_info, abfd, sec, internal_relocs,
11863 irelend, isymbuf))
11864 goto error_return;
35c08157 11865
535b785f 11866 if (!*again)
35c08157 11867 {
1c8f6a4d
KLC
11868 if (!nds32_fag_remove_unused_fpbase (abfd, sec, internal_relocs,
11869 irelend))
11870 goto error_return;
35c08157
KLC
11871 }
11872 }
1c8f6a4d 11873
535b785f 11874 if (!*again)
1c8f6a4d
KLC
11875 {
11876 if (!nds32_relax_adjust_label (abfd, sec, internal_relocs, contents,
11877 &relax_blank_list, optimize, opt_size))
11878 goto error_return;
11879 }
11880
11881 /* It doesn't matter optimize_for_space_no_align anymore.
35c08157
KLC
11882 If object file is assembled with flag '-Os',
11883 the we don't adjust jump-destination on 4-byte boundary. */
11884
11885 if (relax_blank_list)
11886 {
11887 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
11888 relax_blank_list = NULL;
11889 }
11890
535b785f 11891 if (!*again)
35c08157
KLC
11892 {
11893 /* Closing the section, so we don't relax it anymore. */
11894 bfd_vma sec_size_align;
11895 Elf_Internal_Rela *tmp_rel;
11896
11897 /* Pad to alignment boundary. Only handle current section alignment. */
609332f1
NC
11898 sec_size_align = (sec->size + (~((-1U) << sec->alignment_power)))
11899 & ((-1U) << sec->alignment_power);
35c08157
KLC
11900 if ((sec_size_align - sec->size) & 0x2)
11901 {
11902 insn16 = NDS32_NOP16;
11903 bfd_putb16 (insn16, contents + sec->size);
11904 sec->size += 2;
11905 }
11906
11907 while (sec_size_align != sec->size)
11908 {
11909 insn = NDS32_NOP32;
11910 bfd_putb32 (insn, contents + sec->size);
11911 sec->size += 4;
11912 }
11913
1c8f6a4d
KLC
11914 tmp_rel = find_relocs_at_address (internal_relocs, internal_relocs,
11915 irelend, R_NDS32_RELAX_ENTRY);
35c08157
KLC
11916 if (tmp_rel != irelend)
11917 tmp_rel->r_addend |= R_NDS32_RELAX_ENTRY_DISABLE_RELAX_FLAG;
11918
11919 clean_nds32_elf_blank ();
11920 }
11921
11922finish:
11923 if (internal_relocs != NULL
11924 && elf_section_data (sec)->relocs != internal_relocs)
11925 free (internal_relocs);
11926
11927 if (contents != NULL
11928 && elf_section_data (sec)->this_hdr.contents != contents)
11929 free (contents);
11930
11931 if (isymbuf != NULL && symtab_hdr->contents != (bfd_byte *) isymbuf)
11932 free (isymbuf);
11933
11934 return result;
11935
11936error_return:
11937 result = FALSE;
11938 goto finish;
11939}
11940
11941static struct bfd_elf_special_section const nds32_elf_special_sections[] =
11942{
11943 {".sdata", 6, -2, SHT_PROGBITS, SHF_ALLOC + SHF_WRITE},
11944 {".sbss", 5, -2, SHT_NOBITS, SHF_ALLOC + SHF_WRITE},
11945 {NULL, 0, 0, 0, 0}
11946};
11947
11948static bfd_boolean
11949nds32_elf_output_arch_syms (bfd *output_bfd ATTRIBUTE_UNUSED,
11950 struct bfd_link_info *info,
11951 void *finfo ATTRIBUTE_UNUSED,
11952 bfd_boolean (*func) (void *, const char *,
11953 Elf_Internal_Sym *,
11954 asection *,
11955 struct elf_link_hash_entry *)
11956 ATTRIBUTE_UNUSED)
11957{
11958 FILE *sym_ld_script = NULL;
11959 struct elf_nds32_link_hash_table *table;
11960
11961 table = nds32_elf_hash_table (info);
11962 sym_ld_script = table->sym_ld_script;
11963
11964 if (check_start_export_sym)
11965 fprintf (sym_ld_script, "}\n");
11966
11967 return TRUE;
11968}
11969
11970static enum elf_reloc_type_class
11971nds32_elf_reloc_type_class (const struct bfd_link_info *info ATTRIBUTE_UNUSED,
11972 const asection *rel_sec ATTRIBUTE_UNUSED,
11973 const Elf_Internal_Rela *rela)
11974{
11975 switch ((int) ELF32_R_TYPE (rela->r_info))
11976 {
11977 case R_NDS32_RELATIVE:
11978 return reloc_class_relative;
11979 case R_NDS32_JMP_SLOT:
11980 return reloc_class_plt;
11981 case R_NDS32_COPY:
11982 return reloc_class_copy;
11983 default:
11984 return reloc_class_normal;
11985 }
11986}
11987
11988/* Put target dependent option into info hash table. */
11989void
11990bfd_elf32_nds32_set_target_option (struct bfd_link_info *link_info,
11991 int relax_fp_as_gp,
11992 int eliminate_gc_relocs,
11993 FILE * sym_ld_script, int load_store_relax,
11994 int target_optimize, int relax_status,
11995 int relax_round, FILE * ex9_export_file,
11996 FILE * ex9_import_file,
11997 int update_ex9_table, int ex9_limit,
11998 bfd_boolean ex9_loop_aware,
11999 bfd_boolean ifc_loop_aware)
12000{
12001 struct elf_nds32_link_hash_table *table;
12002
12003 table = nds32_elf_hash_table (link_info);
12004 if (table == NULL)
12005 return;
12006
12007 table->relax_fp_as_gp = relax_fp_as_gp;
12008 table->eliminate_gc_relocs = eliminate_gc_relocs;
12009 table->sym_ld_script = sym_ld_script;
12010 table ->load_store_relax = load_store_relax;
12011 table->target_optimize = target_optimize;
12012 table->relax_status = relax_status;
12013 table->relax_round = relax_round;
12014 table->ex9_export_file = ex9_export_file;
12015 table->ex9_import_file = ex9_import_file;
12016 table->update_ex9_table = update_ex9_table;
12017 table->ex9_limit = ex9_limit;
12018 table->ex9_loop_aware = ex9_loop_aware;
12019 table->ifc_loop_aware = ifc_loop_aware;
12020}
12021\f
12022/* These functions and data-structures are used for fp-as-gp
12023 optimization. */
12024
12025#define FAG_THRESHOLD 3 /* At least 3 gp-access. */
1c8f6a4d
KLC
12026/* lwi37.fp covers 508 bytes, but there may be 32-byte padding between
12027 the read-only section and read-write section. */
12028#define FAG_WINDOW (508 - 32)
35c08157
KLC
12029
12030/* An nds32_fag represent a gp-relative access.
12031 We find best fp-base by using a sliding window
12032 to find a base address which can cover most gp-access. */
12033struct nds32_fag
12034{
12035 struct nds32_fag *next; /* NULL-teminated linked list. */
12036 bfd_vma addr; /* The address of this fag. */
12037 Elf_Internal_Rela **relas; /* The relocations associated with this fag.
12038 It is used for applying FP7U2_FLAG. */
12039 int count; /* How many times this address is referred.
12040 There should be exactly `count' relocations
12041 in relas. */
12042 int relas_capcity; /* The buffer size of relas.
12043 We use an array instead of linked-list,
12044 and realloc is used to adjust buffer size. */
12045};
12046
12047static void
12048nds32_fag_init (struct nds32_fag *head)
12049{
12050 memset (head, 0, sizeof (struct nds32_fag));
12051}
12052
12053static void
12054nds32_fag_verify (struct nds32_fag *head)
12055{
12056 struct nds32_fag *iter;
12057 struct nds32_fag *prev;
12058
12059 prev = NULL;
12060 iter = head->next;
12061 while (iter)
12062 {
12063 if (prev && prev->addr >= iter->addr)
12064 puts ("Bug in fp-as-gp insertion.");
12065 prev = iter;
12066 iter = iter->next;
12067 }
12068}
12069
12070/* Insert a fag in ascending order.
12071 If a fag of the same address already exists,
12072 they are chained by relas array. */
12073
12074static void
12075nds32_fag_insert (struct nds32_fag *head, bfd_vma addr,
12076 Elf_Internal_Rela * rel)
12077{
12078 struct nds32_fag *iter;
12079 struct nds32_fag *new_fag;
12080 const int INIT_RELAS_CAP = 4;
12081
12082 for (iter = head;
12083 iter->next && iter->next->addr <= addr;
12084 iter = iter->next)
12085 /* Find somewhere to insert. */ ;
12086
12087 /* `iter' will be equal to `head' if the list is empty. */
12088 if (iter != head && iter->addr == addr)
12089 {
12090 /* The address exists in the list.
12091 Insert `rel' into relocation list, relas. */
12092
12093 /* Check whether relas is big enough. */
12094 if (iter->count >= iter->relas_capcity)
12095 {
12096 iter->relas_capcity *= 2;
12097 iter->relas = bfd_realloc
12098 (iter->relas, iter->relas_capcity * sizeof (void *));
12099 }
12100 iter->relas[iter->count++] = rel;
12101 return;
12102 }
12103
12104 /* This is a new address. Create a fag node for it. */
12105 new_fag = bfd_malloc (sizeof (struct nds32_fag));
12106 memset (new_fag, 0, sizeof (*new_fag));
12107 new_fag->addr = addr;
12108 new_fag->count = 1;
12109 new_fag->next = iter->next;
12110 new_fag->relas_capcity = INIT_RELAS_CAP;
12111 new_fag->relas = (Elf_Internal_Rela **)
12112 bfd_malloc (new_fag->relas_capcity * sizeof (void *));
12113 new_fag->relas[0] = rel;
12114 iter->next = new_fag;
12115
12116 nds32_fag_verify (head);
12117}
12118
12119static void
12120nds32_fag_free_list (struct nds32_fag *head)
12121{
12122 struct nds32_fag *iter;
12123
12124 iter = head->next;
12125 while (iter)
12126 {
12127 struct nds32_fag *tmp = iter;
12128 iter = iter->next;
12129 free (tmp->relas);
12130 tmp->relas = NULL;
12131 free (tmp);
12132 }
12133}
12134
35c08157
KLC
12135/* Find the best fp-base address.
12136 The relocation associated with that address is returned,
12137 so we can track the symbol instead of a fixed address.
12138
12139 When relaxation, the address of an datum may change,
12140 because a text section is shrinked, so the data section
1c8f6a4d 12141 moves forward. If the aligments of text and data section
35c08157
KLC
12142 are different, their distance may change too.
12143 Therefore, tracking a fixed address is not appriate. */
12144
12145static int
12146nds32_fag_find_base (struct nds32_fag *head, struct nds32_fag **bestpp)
12147{
12148 struct nds32_fag *base; /* First fag in the window. */
12149 struct nds32_fag *last; /* First fag outside the window. */
12150 int accu = 0; /* Usage accumulation. */
12151 struct nds32_fag *best; /* Best fag. */
12152 int baccu = 0; /* Best accumulation. */
12153
12154 /* Use first fag for initial, and find the last fag in the window.
12155
12156 In each iteration, we could simply subtract previous fag
12157 and accumulate following fags which are inside the window,
12158 untill we each the end. */
12159
1c8f6a4d
KLC
12160 if (head->next == NULL)
12161 {
12162 *bestpp = NULL;
12163 return 0;
12164 }
35c08157
KLC
12165
12166 /* Initialize base. */
12167 base = head->next;
12168 best = base;
12169 for (last = base;
12170 last && last->addr < base->addr + FAG_WINDOW;
12171 last = last->next)
12172 accu += last->count;
12173
12174 baccu = accu;
12175
12176 /* Record the best base in each iteration. */
12177 while (base->next)
1c8f6a4d
KLC
12178 {
12179 accu -= base->count;
12180 base = base->next;
12181 /* Account fags in window. */
12182 for (/* Nothing. */;
12183 last && last->addr < base->addr + FAG_WINDOW;
12184 last = last->next)
12185 accu += last->count;
12186
12187 /* A better fp-base? */
12188 if (accu > baccu)
12189 {
12190 best = base;
12191 baccu = accu;
12192 }
12193 }
35c08157
KLC
12194
12195 if (bestpp)
12196 *bestpp = best;
12197 return baccu;
12198}
12199
12200/* Apply R_NDS32_INSN16_FP7U2_FLAG on gp-relative accesses,
12201 so we can convert it fo fp-relative access later.
12202 `best_fag' is the best fp-base. Only those inside the window
12203 of best_fag is applied the flag. */
12204
12205static bfd_boolean
12206nds32_fag_mark_relax (struct bfd_link_info *link_info,
12207 bfd *abfd, struct nds32_fag *best_fag,
12208 Elf_Internal_Rela *internal_relocs,
12209 Elf_Internal_Rela *irelend)
12210{
12211 struct nds32_fag *ifag;
12212 bfd_vma best_fpbase, gp;
12213 bfd *output_bfd;
12214
12215 output_bfd = abfd->sections->output_section->owner;
12216 nds32_elf_final_sda_base (output_bfd, link_info, &gp, FALSE);
12217 best_fpbase = best_fag->addr;
12218
1c8f6a4d
KLC
12219 if (best_fpbase > gp + sdata_range[1][1]
12220 || best_fpbase < gp - sdata_range[1][0])
35c08157
KLC
12221 return FALSE;
12222
12223 /* Mark these inside the window R_NDS32_INSN16_FP7U2_FLAG flag,
12224 so we know they can be converted to lwi37.fp. */
12225 for (ifag = best_fag;
12226 ifag && ifag->addr < best_fpbase + FAG_WINDOW; ifag = ifag->next)
12227 {
12228 int i;
12229
12230 for (i = 0; i < ifag->count; i++)
12231 {
12232 Elf_Internal_Rela *insn16_rel;
12233 Elf_Internal_Rela *fag_rel;
12234
12235 fag_rel = ifag->relas[i];
12236
12237 /* Only if this is within the WINDOWS, FP7U2_FLAG
12238 is applied. */
12239
12240 insn16_rel = find_relocs_at_address
12241 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12242
12243 if (insn16_rel != irelend)
12244 insn16_rel->r_addend = R_NDS32_INSN16_FP7U2_FLAG;
12245 }
12246 }
12247 return TRUE;
12248}
12249
1c8f6a4d
KLC
12250/* Reset INSN16 to clean fp as gp. */
12251
12252static void
12253nds32_fag_unmark_relax (struct nds32_fag *fag,
12254 Elf_Internal_Rela *internal_relocs,
12255 Elf_Internal_Rela *irelend)
12256{
12257 struct nds32_fag *ifag;
12258 int i;
12259 Elf_Internal_Rela *insn16_rel;
12260 Elf_Internal_Rela *fag_rel;
12261
12262 for (ifag = fag; ifag; ifag = ifag->next)
12263 {
12264 for (i = 0; i < ifag->count; i++)
12265 {
12266 fag_rel = ifag->relas[i];
12267
12268 /* Restore the INSN16 relocation. */
12269 insn16_rel = find_relocs_at_address
12270 (fag_rel, internal_relocs, irelend, R_NDS32_INSN16);
12271
12272 if (insn16_rel != irelend)
12273 insn16_rel->r_addend &= ~R_NDS32_INSN16_FP7U2_FLAG;
12274 }
12275 }
12276}
12277
35c08157
KLC
12278/* This is the main function of fp-as-gp optimization.
12279 It should be called by relax_section. */
12280
12281static bfd_boolean
12282nds32_relax_fp_as_gp (struct bfd_link_info *link_info,
12283 bfd *abfd, asection *sec,
12284 Elf_Internal_Rela *internal_relocs,
12285 Elf_Internal_Rela *irelend,
12286 Elf_Internal_Sym *isymbuf)
12287{
12288 Elf_Internal_Rela *begin_rel = NULL;
12289 Elf_Internal_Rela *irel;
12290 struct nds32_fag fag_head;
12291 Elf_Internal_Shdr *symtab_hdr;
12292 bfd_byte *contents;
1c8f6a4d 12293 bfd_boolean ifc_inside = FALSE;
35c08157
KLC
12294
12295 /* FIXME: Can we bfd_elf_link_read_relocs for the relocs? */
12296
12297 /* Per-function fp-base selection.
12298 1. Create a list for all the gp-relative access.
12299 2. Base on those gp-relative address,
12300 find a fp-base which can cover most access.
12301 3. Use the fp-base for fp-as-gp relaxation.
12302
12303 NOTE: If fp-as-gp is not worth to do, (e.g., less than 3 times),
12304 we should
12305 1. delete the `la $fp, _FP_BASE_' instruction and
12306 2. not convert lwi.gp to lwi37.fp.
12307
12308 To delete the _FP_BASE_ instruction, we simply apply
12309 R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG flag in the r_addend to disable it.
12310
12311 To suppress the conversion, we simply NOT to apply
12312 R_NDS32_INSN16_FP7U2_FLAG flag. */
12313
12314 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
12315
0c4bd9d9 12316 if (!nds32_get_section_contents (abfd, sec, &contents, TRUE)
35c08157
KLC
12317 || !nds32_get_local_syms (abfd, sec, &isymbuf))
12318 return FALSE;
12319
12320 /* Check whether it is worth for fp-as-gp optimization,
12321 i.e., at least 3 gp-load.
12322
12323 Set R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG if we should NOT
12324 apply this optimization. */
12325
12326 for (irel = internal_relocs; irel < irelend; irel++)
12327 {
12328 /* We recognize R_NDS32_RELAX_REGION_BEGIN/_END for the region.
12329 One we enter the begin of the region, we track all the LW/ST
12330 instructions, so when we leave the region, we try to find
12331 the best fp-base address for those LW/ST instructions. */
12332
12333 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12334 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12335 {
12336 /* Begin of the region. */
12337 if (begin_rel)
695344c0 12338 /* xgettext:c-format */
38f14ab8 12339 _bfd_error_handler (_("%pB: nested OMIT_FP in %pA"), abfd, sec);
35c08157
KLC
12340
12341 begin_rel = irel;
12342 nds32_fag_init (&fag_head);
1c8f6a4d 12343 ifc_inside = FALSE;
35c08157
KLC
12344 }
12345 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12346 && (irel->r_addend & R_NDS32_RELAX_REGION_OMIT_FP_FLAG))
12347 {
12348 int accu;
1c8f6a4d 12349 struct nds32_fag *best_fag, *tmp_fag;
35c08157
KLC
12350 int dist;
12351
12352 /* End of the region.
12353 Check whether it is worth to do fp-as-gp. */
12354
12355 if (begin_rel == NULL)
12356 {
695344c0 12357 /* xgettext:c-format */
38f14ab8
AM
12358 _bfd_error_handler (_("%pB: unmatched OMIT_FP in %pA"),
12359 abfd, sec);
35c08157
KLC
12360 continue;
12361 }
12362
12363 accu = nds32_fag_find_base (&fag_head, &best_fag);
12364
1c8f6a4d
KLC
12365 /* Clean FP7U2_FLAG because they may set ever. */
12366 tmp_fag = fag_head.next;
12367 nds32_fag_unmark_relax (tmp_fag, internal_relocs, irelend);
12368
35c08157
KLC
12369 /* Check if it is worth, and FP_BASE is near enough to SDA_BASE. */
12370 if (accu < FAG_THRESHOLD
12371 || !nds32_fag_mark_relax (link_info, abfd, best_fag,
12372 internal_relocs, irelend))
12373 {
12374 /* Not worth to do fp-as-gp. */
12375 begin_rel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12376 begin_rel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12377 irel->r_addend |= R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG;
12378 irel->r_addend &= ~R_NDS32_RELAX_REGION_OMIT_FP_FLAG;
12379 nds32_fag_free_list (&fag_head);
12380 begin_rel = NULL;
12381 continue;
12382 }
12383
12384 /* R_SYM of R_NDS32_RELAX_REGION_BEGIN is not used by assembler,
12385 so we use it to record the distance to the reloction of best
12386 fp-base. */
12387 dist = best_fag->relas[0] - begin_rel;
12388 BFD_ASSERT (dist > 0 && dist < 0xffffff);
12389 /* Use high 16 bits of addend to record the _FP_BASE_ matched
12390 relocation. And get the base value when relocating. */
1c8f6a4d 12391 begin_rel->r_addend &= (0x1 << 16) - 1;
35c08157
KLC
12392 begin_rel->r_addend |= dist << 16;
12393
12394 nds32_fag_free_list (&fag_head);
12395 begin_rel = NULL;
12396 }
12397
1c8f6a4d 12398 if (begin_rel == NULL || ifc_inside)
35c08157
KLC
12399 /* Skip if we are not in the region of fp-as-gp. */
12400 continue;
12401
12402 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S2_RELA
12403 || ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA17S2_RELA)
12404 {
12405 bfd_vma addr;
12406 uint32_t insn;
12407
12408 /* A gp-relative access is found. Insert it to the fag-list. */
12409
12410 /* Rt is necessary an RT3, so it can be converted to lwi37.fp. */
12411 insn = bfd_getb32 (contents + irel->r_offset);
12412 if (!N32_IS_RT3 (insn))
12413 continue;
12414
12415 addr = calculate_memory_address (abfd, irel, isymbuf, symtab_hdr);
12416 nds32_fag_insert (&fag_head, addr, irel);
12417 }
12418 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA_FP7U2_RELA)
12419 {
12420 begin_rel = NULL;
12421 }
1c8f6a4d
KLC
12422 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_17IFC_PCREL_RELA
12423 || ELF32_R_TYPE (irel->r_info) == R_NDS32_10IFCU_PCREL_RELA)
12424 {
12425 /* Suppress fp as gp when encounter ifc. */
12426 ifc_inside = TRUE;
12427 }
35c08157
KLC
12428 }
12429
12430 return TRUE;
12431}
12432
12433/* Remove unused `la $fp, _FD_BASE_' instruction. */
12434
12435static bfd_boolean
12436nds32_fag_remove_unused_fpbase (bfd *abfd, asection *sec,
12437 Elf_Internal_Rela *internal_relocs,
12438 Elf_Internal_Rela *irelend)
12439{
12440 Elf_Internal_Rela *irel;
12441 Elf_Internal_Shdr *symtab_hdr;
12442 bfd_byte *contents = NULL;
12443 nds32_elf_blank_t *relax_blank_list = NULL;
12444 bfd_boolean result = TRUE;
12445 bfd_boolean unused_region = FALSE;
12446
12447 /*
12448 NOTE: Disable fp-as-gp if we encounter ifcall relocations.
12449 * R_NDS32_17IFC_PCREL_RELA
12450 * R_NDS32_10IFCU_PCREL_RELA
12451
12452 CASE??????????????
12453 */
12454
12455 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
0c4bd9d9 12456 nds32_get_section_contents (abfd, sec, &contents, TRUE);
35c08157
KLC
12457
12458 for (irel = internal_relocs; irel < irelend; irel++)
12459 {
12460 /* To remove unused fp-base, we simply find the REGION_NOT_OMIT_FP
12461 we marked to in previous pass.
12462 DO NOT scan relocations again, since we've alreadly decided it
12463 and set the flag. */
12464 const char *syname;
12465 int syndx;
12466 uint32_t insn;
12467
12468 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_BEGIN
12469 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12470 unused_region = TRUE;
12471 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_RELAX_REGION_END
12472 && (irel->r_addend & R_NDS32_RELAX_REGION_NOT_OMIT_FP_FLAG))
12473 unused_region = FALSE;
12474
12475 /* We're not in the region. */
12476 if (!unused_region)
12477 continue;
12478
12479 /* _FP_BASE_ must be a GLOBAL symbol. */
12480 syndx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
12481 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
12482 continue;
12483
12484 /* The symbol name must be _FP_BASE_. */
12485 syname = elf_sym_hashes (abfd)[syndx]->root.root.string;
12486 if (strcmp (syname, FP_BASE_NAME) != 0)
12487 continue;
12488
12489 if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA19S0_RELA)
12490 {
12491 /* addi.gp $fp, -256 */
12492 insn = bfd_getb32 (contents + irel->r_offset);
12493 if (insn != INSN_ADDIGP_TO_FP)
12494 continue;
12495 }
12496 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_SDA15S0_RELA)
12497 {
12498 /* addi $fp, $gp, -256 */
12499 insn = bfd_getb32 (contents + irel->r_offset);
12500 if (insn != INSN_ADDI_GP_TO_FP)
12501 continue;
12502 }
12503 else if (ELF32_R_TYPE (irel->r_info) == R_NDS32_20_RELA)
12504 {
12505 /* movi $fp, FP_BASE */
12506 insn = bfd_getb32 (contents + irel->r_offset);
12507 if (insn != INSN_MOVI_TO_FP)
12508 continue;
12509 }
12510 else
12511 continue;
12512
12513 /* We got here because a FP_BASE instruction is found. */
12514 if (!insert_nds32_elf_blank_recalc_total
12515 (&relax_blank_list, irel->r_offset, 4))
12516 goto error_return;
12517 }
12518
12519finish:
12520 if (relax_blank_list)
12521 {
12522 nds32_elf_relax_delete_blanks (abfd, sec, relax_blank_list);
12523 relax_blank_list = NULL;
12524 }
12525 return result;
12526
12527error_return:
12528 result = FALSE;
12529 goto finish;
12530}
1c8f6a4d
KLC
12531
12532/* This is a version of bfd_generic_get_relocated_section_contents.
12533 We need this variety because relaxation will modify the dwarf
12534 infomation. When there is undefined symbol reference error mesage,
12535 linker need to dump line number where the symbol be used. However
12536 the address is be relaxed, it can not get the original dwarf contents.
12537 The variety only modify function call for reading in the section. */
12538
12539static bfd_byte *
12540nds32_elf_get_relocated_section_contents (bfd *abfd,
12541 struct bfd_link_info *link_info,
12542 struct bfd_link_order *link_order,
12543 bfd_byte *data,
12544 bfd_boolean relocatable,
12545 asymbol **symbols)
12546{
12547 bfd *input_bfd = link_order->u.indirect.section->owner;
12548 asection *input_section = link_order->u.indirect.section;
12549 long reloc_size;
12550 arelent **reloc_vector;
12551 long reloc_count;
12552
12553 reloc_size = bfd_get_reloc_upper_bound (input_bfd, input_section);
12554 if (reloc_size < 0)
12555 return NULL;
12556
12557 /* Read in the section. */
0c4bd9d9 12558 if (!nds32_get_section_contents (input_bfd, input_section, &data, FALSE))
1c8f6a4d
KLC
12559 return NULL;
12560
12561 if (reloc_size == 0)
12562 return data;
12563
12564 reloc_vector = (arelent **) bfd_malloc (reloc_size);
12565 if (reloc_vector == NULL)
12566 return NULL;
12567
12568 reloc_count = bfd_canonicalize_reloc (input_bfd, input_section,
12569 reloc_vector, symbols);
12570 if (reloc_count < 0)
12571 goto error_return;
12572
12573 if (reloc_count > 0)
12574 {
12575 arelent **parent;
12576 for (parent = reloc_vector; *parent != NULL; parent++)
12577 {
12578 char *error_message = NULL;
12579 asymbol *symbol;
12580 bfd_reloc_status_type r;
12581
12582 symbol = *(*parent)->sym_ptr_ptr;
12583 if (symbol->section && discarded_section (symbol->section))
12584 {
12585 bfd_byte *p;
12586 static reloc_howto_type none_howto
12587 = HOWTO (0, 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL,
12588 "unused", FALSE, 0, 0, FALSE);
12589
12590 p = data + (*parent)->address * bfd_octets_per_byte (input_bfd);
12591 _bfd_clear_contents ((*parent)->howto, input_bfd, input_section,
12592 p);
12593 (*parent)->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
12594 (*parent)->addend = 0;
12595 (*parent)->howto = &none_howto;
12596 r = bfd_reloc_ok;
12597 }
12598 else
12599 r = bfd_perform_relocation (input_bfd, *parent, data,
12600 input_section,
12601 relocatable ? abfd : NULL,
12602 &error_message);
12603
12604 if (relocatable)
12605 {
12606 asection *os = input_section->output_section;
12607
12608 /* A partial link, so keep the relocs. */
12609 os->orelocation[os->reloc_count] = *parent;
12610 os->reloc_count++;
12611 }
12612
12613 if (r != bfd_reloc_ok)
12614 {
12615 switch (r)
12616 {
12617 case bfd_reloc_undefined:
1a72702b
AM
12618 (*link_info->callbacks->undefined_symbol)
12619 (link_info, bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12620 input_bfd, input_section, (*parent)->address, TRUE);
1c8f6a4d
KLC
12621 break;
12622 case bfd_reloc_dangerous:
12623 BFD_ASSERT (error_message != NULL);
1a72702b
AM
12624 (*link_info->callbacks->reloc_dangerous)
12625 (link_info, error_message,
12626 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
12627 break;
12628 case bfd_reloc_overflow:
1a72702b
AM
12629 (*link_info->callbacks->reloc_overflow)
12630 (link_info, NULL,
12631 bfd_asymbol_name (*(*parent)->sym_ptr_ptr),
12632 (*parent)->howto->name, (*parent)->addend,
12633 input_bfd, input_section, (*parent)->address);
1c8f6a4d
KLC
12634 break;
12635 case bfd_reloc_outofrange:
12636 /* PR ld/13730:
12637 This error can result when processing some partially
12638 complete binaries. Do not abort, but issue an error
12639 message instead. */
12640 link_info->callbacks->einfo
695344c0 12641 /* xgettext:c-format */
c1c8c1ef 12642 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
1c8f6a4d
KLC
12643 abfd, input_section, * parent);
12644 goto error_return;
12645
12646 default:
12647 abort ();
12648 break;
12649 }
12650 }
12651 }
12652 }
12653
12654 free (reloc_vector);
12655 return data;
12656
12657error_return:
12658 free (reloc_vector);
12659 return NULL;
12660}
35c08157 12661\f
35c08157
KLC
12662
12663#define ELF_ARCH bfd_arch_nds32
12664#define ELF_MACHINE_CODE EM_NDS32
12665#define ELF_MAXPAGESIZE 0x1000
07d6d2b8 12666#define ELF_TARGET_ID NDS32_ELF_DATA
35c08157 12667
6d00b590 12668#define TARGET_BIG_SYM nds32_elf32_be_vec
35c08157 12669#define TARGET_BIG_NAME "elf32-nds32be"
6d00b590 12670#define TARGET_LITTLE_SYM nds32_elf32_le_vec
35c08157
KLC
12671#define TARGET_LITTLE_NAME "elf32-nds32le"
12672
12673#define elf_info_to_howto nds32_info_to_howto
12674#define elf_info_to_howto_rel nds32_info_to_howto_rel
12675
12676#define bfd_elf32_bfd_link_hash_table_create nds32_elf_link_hash_table_create
12677#define bfd_elf32_bfd_merge_private_bfd_data nds32_elf_merge_private_bfd_data
12678#define bfd_elf32_bfd_print_private_bfd_data nds32_elf_print_private_bfd_data
12679#define bfd_elf32_bfd_relax_section nds32_elf_relax_section
12680#define bfd_elf32_bfd_set_private_flags nds32_elf_set_private_flags
12681
07d6d2b8 12682#define bfd_elf32_mkobject nds32_elf_mkobject
35c08157
KLC
12683#define elf_backend_action_discarded nds32_elf_action_discarded
12684#define elf_backend_add_symbol_hook nds32_elf_add_symbol_hook
12685#define elf_backend_check_relocs nds32_elf_check_relocs
12686#define elf_backend_adjust_dynamic_symbol nds32_elf_adjust_dynamic_symbol
12687#define elf_backend_create_dynamic_sections nds32_elf_create_dynamic_sections
12688#define elf_backend_finish_dynamic_sections nds32_elf_finish_dynamic_sections
12689#define elf_backend_finish_dynamic_symbol nds32_elf_finish_dynamic_symbol
12690#define elf_backend_size_dynamic_sections nds32_elf_size_dynamic_sections
12691#define elf_backend_relocate_section nds32_elf_relocate_section
12692#define elf_backend_gc_mark_hook nds32_elf_gc_mark_hook
35c08157
KLC
12693#define elf_backend_grok_prstatus nds32_elf_grok_prstatus
12694#define elf_backend_grok_psinfo nds32_elf_grok_psinfo
12695#define elf_backend_reloc_type_class nds32_elf_reloc_type_class
12696#define elf_backend_copy_indirect_symbol nds32_elf_copy_indirect_symbol
12697#define elf_backend_link_output_symbol_hook nds32_elf_output_symbol_hook
12698#define elf_backend_output_arch_syms nds32_elf_output_arch_syms
12699#define elf_backend_object_p nds32_elf_object_p
12700#define elf_backend_final_write_processing nds32_elf_final_write_processing
12701#define elf_backend_special_sections nds32_elf_special_sections
1c8f6a4d 12702#define bfd_elf32_bfd_get_relocated_section_contents \
07d6d2b8 12703 nds32_elf_get_relocated_section_contents
35c08157
KLC
12704
12705#define elf_backend_can_gc_sections 1
12706#define elf_backend_can_refcount 1
12707#define elf_backend_want_got_plt 1
12708#define elf_backend_plt_readonly 1
12709#define elf_backend_want_plt_sym 0
12710#define elf_backend_got_header_size 12
12711#define elf_backend_may_use_rel_p 1
12712#define elf_backend_default_use_rela_p 1
12713#define elf_backend_may_use_rela_p 1
64f52338 12714#define elf_backend_dtrel_excludes_plt 1
35c08157
KLC
12715
12716#include "elf32-target.h"
12717
12718#undef ELF_MAXPAGESIZE
12719#define ELF_MAXPAGESIZE 0x2000
12720
12721#undef TARGET_BIG_SYM
6d00b590 12722#define TARGET_BIG_SYM nds32_elf32_linux_be_vec
35c08157
KLC
12723#undef TARGET_BIG_NAME
12724#define TARGET_BIG_NAME "elf32-nds32be-linux"
12725#undef TARGET_LITTLE_SYM
6d00b590 12726#define TARGET_LITTLE_SYM nds32_elf32_linux_le_vec
35c08157
KLC
12727#undef TARGET_LITTLE_NAME
12728#define TARGET_LITTLE_NAME "elf32-nds32le-linux"
12729#undef elf32_bed
12730#define elf32_bed elf32_nds32_lin_bed
12731
12732#include "elf32-target.h"
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