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[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
dbaa2011 2 Copyright (C) 2011, 2012
99c513f6
DD		 3 Free Software Foundation, Inc.
4
5 This file is part of BFD, the Binary File Descriptor library.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21#include "sysdep.h"
22#include "bfd.h"
23#include "bfd_stdint.h"
24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/rl78.h"
27#include "libiberty.h"
28
29#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
30
31#define RL78REL(n,sz,bit,shift,complain,pcrel) \
32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
34
35/* Note that the relocations around 0x7f are internal to this file;
36 feel free to move them as needed to avoid conflicts with published
37 relocation numbers. */
38
39static reloc_howto_type rl78_elf_howto_table [] =
40{
41 RL78REL (NONE, 0, 0, 0, dont, FALSE),
42 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
43 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
44 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
45 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
46 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
47 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
48 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
49 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
50 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
51 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
52 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
53 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
54 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
55 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
56 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
57 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
59 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
60
61 EMPTY_HOWTO (0x13),
62 EMPTY_HOWTO (0x14),
63 EMPTY_HOWTO (0x15),
64 EMPTY_HOWTO (0x16),
65 EMPTY_HOWTO (0x17),
66 EMPTY_HOWTO (0x18),
67 EMPTY_HOWTO (0x19),
68 EMPTY_HOWTO (0x1a),
69 EMPTY_HOWTO (0x1b),
70 EMPTY_HOWTO (0x1c),
71 EMPTY_HOWTO (0x1d),
72 EMPTY_HOWTO (0x1e),
73 EMPTY_HOWTO (0x1f),
74
75 EMPTY_HOWTO (0x20),
76 EMPTY_HOWTO (0x21),
77 EMPTY_HOWTO (0x22),
78 EMPTY_HOWTO (0x23),
79 EMPTY_HOWTO (0x24),
80 EMPTY_HOWTO (0x25),
81 EMPTY_HOWTO (0x26),
82 EMPTY_HOWTO (0x27),
83 EMPTY_HOWTO (0x28),
84 EMPTY_HOWTO (0x29),
85 EMPTY_HOWTO (0x2a),
86 EMPTY_HOWTO (0x2b),
87 EMPTY_HOWTO (0x2c),
9cea966c 88 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 89
90 EMPTY_HOWTO (0x2e),
91 EMPTY_HOWTO (0x2f),
92 EMPTY_HOWTO (0x30),
93 EMPTY_HOWTO (0x31),
94 EMPTY_HOWTO (0x32),
95 EMPTY_HOWTO (0x33),
96 EMPTY_HOWTO (0x34),
97 EMPTY_HOWTO (0x35),
98 EMPTY_HOWTO (0x36),
99 EMPTY_HOWTO (0x37),
100 EMPTY_HOWTO (0x38),
101 EMPTY_HOWTO (0x39),
102 EMPTY_HOWTO (0x3a),
103 EMPTY_HOWTO (0x3b),
104 EMPTY_HOWTO (0x3c),
105 EMPTY_HOWTO (0x3d),
106 EMPTY_HOWTO (0x3e),
107 EMPTY_HOWTO (0x3f),
108 EMPTY_HOWTO (0x40),
109
110 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
111 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
112 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
113 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
114 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
115 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
116 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
117 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
118 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
119 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
120 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
121 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
123 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
125 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
126 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
127
128#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
129
130 EMPTY_HOWTO (0x52),
131 EMPTY_HOWTO (0x53),
132 EMPTY_HOWTO (0x54),
133 EMPTY_HOWTO (0x55),
134 EMPTY_HOWTO (0x56),
135 EMPTY_HOWTO (0x57),
136 EMPTY_HOWTO (0x58),
137 EMPTY_HOWTO (0x59),
138 EMPTY_HOWTO (0x5a),
139 EMPTY_HOWTO (0x5b),
140 EMPTY_HOWTO (0x5c),
141 EMPTY_HOWTO (0x5d),
142 EMPTY_HOWTO (0x5e),
143 EMPTY_HOWTO (0x5f),
144 EMPTY_HOWTO (0x60),
145 EMPTY_HOWTO (0x61),
146 EMPTY_HOWTO (0x62),
147 EMPTY_HOWTO (0x63),
148 EMPTY_HOWTO (0x64),
149 EMPTY_HOWTO (0x65),
150 EMPTY_HOWTO (0x66),
151 EMPTY_HOWTO (0x67),
152 EMPTY_HOWTO (0x68),
153 EMPTY_HOWTO (0x69),
154 EMPTY_HOWTO (0x6a),
155 EMPTY_HOWTO (0x6b),
156 EMPTY_HOWTO (0x6c),
157 EMPTY_HOWTO (0x6d),
158 EMPTY_HOWTO (0x6e),
159 EMPTY_HOWTO (0x6f),
160 EMPTY_HOWTO (0x70),
161 EMPTY_HOWTO (0x71),
162 EMPTY_HOWTO (0x72),
163 EMPTY_HOWTO (0x73),
164 EMPTY_HOWTO (0x74),
165 EMPTY_HOWTO (0x75),
166 EMPTY_HOWTO (0x76),
167 EMPTY_HOWTO (0x77),
168
169 EMPTY_HOWTO (0x78),
170 EMPTY_HOWTO (0x79),
171 EMPTY_HOWTO (0x7a),
172 EMPTY_HOWTO (0x7b),
173 EMPTY_HOWTO (0x7c),
174 EMPTY_HOWTO (0x7d),
175 EMPTY_HOWTO (0x7e),
176 EMPTY_HOWTO (0x7f),
177
178 RL78REL (SYM, 2, 32, 0, dont, FALSE),
179 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
180 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
181 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
182 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
183 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
185 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
186 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
187 EMPTY_HOWTO (0x89),
188 EMPTY_HOWTO (0x8a),
189 EMPTY_HOWTO (0x8b),
190 EMPTY_HOWTO (0x8c),
191 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
192 EMPTY_HOWTO (0x8e),
193 EMPTY_HOWTO (0x8f),
194 RL78REL (OPand, 2, 32, 0, dont, FALSE),
195 RL78REL (OPor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
197 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
198 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
199 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
200 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
201};
202\f
203/* Map BFD reloc types to RL78 ELF reloc types. */
204
205struct rl78_reloc_map
206{
207 bfd_reloc_code_real_type bfd_reloc_val;
208 unsigned int rl78_reloc_val;
209};
210
211static const struct rl78_reloc_map rl78_reloc_map [] =
212{
213 { BFD_RELOC_NONE, R_RL78_NONE },
214 { BFD_RELOC_8, R_RL78_DIR8S },
215 { BFD_RELOC_16, R_RL78_DIR16S },
216 { BFD_RELOC_24, R_RL78_DIR24S },
217 { BFD_RELOC_32, R_RL78_DIR32 },
218 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
219 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
220 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
221 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
222 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
223 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
224 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
225 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
226 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
227 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
228 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
229 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
230 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
231 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
232 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
233 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
234 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
235 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
236 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 237 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
238 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 239};
240
241static reloc_howto_type *
242rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
243 bfd_reloc_code_real_type code)
244{
245 unsigned int i;
246
247 if (code == BFD_RELOC_RL78_32_OP)
248 return rl78_elf_howto_table + R_RL78_DIR32;
249
250 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
251 if (rl78_reloc_map [i].bfd_reloc_val == code)
252 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
253
254 return NULL;
255}
256
257static reloc_howto_type *
258rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
259{
260 unsigned int i;
261
262 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
263 if (rl78_elf_howto_table[i].name != NULL
264 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
265 return rl78_elf_howto_table + i;
266
267 return NULL;
268}
269
270/* Set the howto pointer for an RL78 ELF reloc. */
271
272static void
273rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
274 arelent * cache_ptr,
275 Elf_Internal_Rela * dst)
276{
277 unsigned int r_type;
278
279 r_type = ELF32_R_TYPE (dst->r_info);
280 BFD_ASSERT (r_type < (unsigned int) R_RL78_max);
281 cache_ptr->howto = rl78_elf_howto_table + r_type;
282}
283\f
284static bfd_vma
285get_symbol_value (const char * name,
286 bfd_reloc_status_type * status,
287 struct bfd_link_info * info,
288 bfd * input_bfd,
289 asection * input_section,
290 int offset)
291{
292 bfd_vma value = 0;
293 struct bfd_link_hash_entry * h;
294
295 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
296
297 if (h == NULL
298 || (h->type != bfd_link_hash_defined
299 && h->type != bfd_link_hash_defweak))
300 * status = info->callbacks->undefined_symbol
301 (info, name, input_bfd, input_section, offset, TRUE);
302 else
303 value = (h->u.def.value
304 + h->u.def.section->output_section->vma
305 + h->u.def.section->output_offset);
306
307 return value;
308}
309
310static bfd_vma
311get_romstart (bfd_reloc_status_type * status,
312 struct bfd_link_info * info,
313 bfd * abfd,
314 asection * sec,
315 int offset)
316{
317 static bfd_boolean cached = FALSE;
318 static bfd_vma cached_value = 0;
319
320 if (!cached)
321 {
322 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
323 cached = TRUE;
324 }
325 return cached_value;
326}
327
328static bfd_vma
329get_ramstart (bfd_reloc_status_type * status,
330 struct bfd_link_info * info,
331 bfd * abfd,
332 asection * sec,
333 int offset)
334{
335 static bfd_boolean cached = FALSE;
336 static bfd_vma cached_value = 0;
337
338 if (!cached)
339 {
340 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
341 cached = TRUE;
342 }
343 return cached_value;
344}
345
346#define NUM_STACK_ENTRIES 16
347static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
348static unsigned int rl78_stack_top;
349
350#define RL78_STACK_PUSH(val) \
351 do \
352 { \
353 if (rl78_stack_top < NUM_STACK_ENTRIES) \
354 rl78_stack [rl78_stack_top ++] = (val); \
355 else \
356 r = bfd_reloc_dangerous; \
357 } \
358 while (0)
359
360#define RL78_STACK_POP(dest) \
361 do \
362 { \
363 if (rl78_stack_top > 0) \
364 (dest) = rl78_stack [-- rl78_stack_top]; \
365 else \
366 (dest) = 0, r = bfd_reloc_dangerous; \
367 } \
368 while (0)
369
370/* Relocate an RL78 ELF section.
371 There is some attempt to make this function usable for many architectures,
372 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
373 if only to serve as a learning tool.
374
375 The RELOCATE_SECTION function is called by the new ELF backend linker
376 to handle the relocations for a section.
377
378 The relocs are always passed as Rela structures; if the section
379 actually uses Rel structures, the r_addend field will always be
380 zero.
381
382 This function is responsible for adjusting the section contents as
383 necessary, and (if using Rela relocs and generating a relocatable
384 output file) adjusting the reloc addend as necessary.
385
386 This function does not have to worry about setting the reloc
387 address or the reloc symbol index.
388
389 LOCAL_SYMS is a pointer to the swapped in local symbols.
390
391 LOCAL_SECTIONS is an array giving the section in the input file
392 corresponding to the st_shndx field of each local symbol.
393
394 The global hash table entry for the global symbols can be found
395 via elf_sym_hashes (input_bfd).
396
397 When generating relocatable output, this function must handle
398 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
399 going to be the section symbol corresponding to the output
400 section, which means that the addend must be adjusted
401 accordingly. */
402
403static bfd_boolean
404rl78_elf_relocate_section
405 (bfd * output_bfd,
406 struct bfd_link_info * info,
407 bfd * input_bfd,
408 asection * input_section,
409 bfd_byte * contents,
410 Elf_Internal_Rela * relocs,
411 Elf_Internal_Sym * local_syms,
412 asection ** local_sections)
413{
414 Elf_Internal_Shdr * symtab_hdr;
415 struct elf_link_hash_entry ** sym_hashes;
416 Elf_Internal_Rela * rel;
417 Elf_Internal_Rela * relend;
418 bfd *dynobj;
419 asection *splt;
420
421 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
422 sym_hashes = elf_sym_hashes (input_bfd);
423 relend = relocs + input_section->reloc_count;
424
425 dynobj = elf_hash_table (info)->dynobj;
426 splt = NULL;
427 if (dynobj != NULL)
3d4d4302 428 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 429
430 for (rel = relocs; rel < relend; rel ++)
431 {
432 reloc_howto_type * howto;
433 unsigned long r_symndx;
434 Elf_Internal_Sym * sym;
435 asection * sec;
436 struct elf_link_hash_entry * h;
437 bfd_vma relocation;
438 bfd_reloc_status_type r;
439 const char * name = NULL;
440 bfd_boolean unresolved_reloc = TRUE;
441 int r_type;
442
443 r_type = ELF32_R_TYPE (rel->r_info);
444 r_symndx = ELF32_R_SYM (rel->r_info);
445
446 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
447 h = NULL;
448 sym = NULL;
449 sec = NULL;
450 relocation = 0;
451
452 if (r_symndx < symtab_hdr->sh_info)
453 {
454 sym = local_syms + r_symndx;
455 sec = local_sections [r_symndx];
456 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
457
458 name = bfd_elf_string_from_elf_section
459 (input_bfd, symtab_hdr->sh_link, sym->st_name);
460 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
461 }
462 else
463 {
464 bfd_boolean warned;
465
466 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
467 r_symndx, symtab_hdr, sym_hashes, h,
468 sec, relocation, unresolved_reloc,
469 warned);
470
471 name = h->root.root.string;
472 }
473
dbaa2011 474 if (sec != NULL && discarded_section (sec))
99c513f6 475 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 476 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 477
478 if (info->relocatable)
479 {
480 /* This is a relocatable link. We don't have to change
481 anything, unless the reloc is against a section symbol,
482 in which case we have to adjust according to where the
483 section symbol winds up in the output section. */
484 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
485 rel->r_addend += sec->output_offset;
486 continue;
487 }
488
489 switch (ELF32_R_TYPE (rel->r_info))
490 {
491 case R_RL78_DIR16S:
492 {
493 bfd_vma *plt_offset;
494
495 if (h != NULL)
496 plt_offset = &h->plt.offset;
497 else
498 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
499
9cea966c 500 if (! valid_16bit_address (relocation))
99c513f6 501 {
99c513f6
DD		 502 /* If this is the first time we've processed this symbol,
503 fill in the plt entry with the correct symbol address. */
504 if ((*plt_offset & 1) == 0)
505 {
506 unsigned int x;
507
508 x = 0x000000ec; /* br !!abs24 */
509 x |= (relocation << 8) & 0xffffff00;
510 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
511 *plt_offset |= 1;
512 }
513
514 relocation = (splt->output_section->vma
515 + splt->output_offset
516 + (*plt_offset & -2));
517 if (name)
518 {
519 char *newname = bfd_malloc (strlen(name)+5);
520 strcpy (newname, name);
521 strcat(newname, ".plt");
522 _bfd_generic_link_add_one_symbol (info,
523 input_bfd,
524 newname,
525 BSF_FUNCTION | BSF_WEAK,
526 splt,
527 (*plt_offset & -2),
528 0,
529 1,
530 0,
531 0);
532 }
533 }
534 }
535 break;
536 }
537
538 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
539 /* If the symbol is undefined and weak
540 then the relocation resolves to zero. */
541 relocation = 0;
542 else
543 {
544 if (howto->pc_relative)
545 {
546 relocation -= (input_section->output_section->vma
547 + input_section->output_offset
548 + rel->r_offset);
549 relocation -= bfd_get_reloc_size (howto);
550 }
551
552 relocation += rel->r_addend;
553 }
554
555 r = bfd_reloc_ok;
556
557#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
558#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
559#define OP(i) (contents[rel->r_offset + (i)])
560
561 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
562 switch (r_type)
563 {
564 case R_RL78_NONE:
565 break;
566
9cea966c
DD		 567 case R_RL78_RH_RELAX:
568 break;
569
99c513f6
DD		 570 case R_RL78_DIR8S_PCREL:
571 RANGE (-128, 127);
572 OP (0) = relocation;
573 break;
574
575 case R_RL78_DIR8S:
576 RANGE (-128, 255);
577 OP (0) = relocation;
578 break;
579
580 case R_RL78_DIR8U:
581 RANGE (0, 255);
582 OP (0) = relocation;
583 break;
584
585 case R_RL78_DIR16S_PCREL:
586 RANGE (-32768, 32767);
587 OP (0) = relocation;
588 OP (1) = relocation >> 8;
589 break;
590
591 case R_RL78_DIR16S:
592 if ((relocation & 0xf0000) == 0xf0000)
593 relocation &= 0xffff;
594 RANGE (-32768, 65535);
595 OP (0) = relocation;
596 OP (1) = relocation >> 8;
597 break;
598
599 case R_RL78_DIR16U:
600 RANGE (0, 65536);
601 OP (0) = relocation;
602 OP (1) = relocation >> 8;
603 break;
604
605 case R_RL78_DIR16:
606 RANGE (-32768, 65536);
607 OP (0) = relocation;
608 OP (1) = relocation >> 8;
609 break;
610
611 case R_RL78_DIR16_REV:
612 RANGE (-32768, 65536);
613 OP (1) = relocation;
614 OP (0) = relocation >> 8;
615 break;
616
617 case R_RL78_DIR3U_PCREL:
618 RANGE (3, 10);
619 OP (0) &= 0xf8;
620 OP (0) |= relocation & 0x07;
621 break;
622
623 case R_RL78_DIR24S_PCREL:
624 RANGE (-0x800000, 0x7fffff);
625 OP (0) = relocation;
626 OP (1) = relocation >> 8;
627 OP (2) = relocation >> 16;
628 break;
629
630 case R_RL78_DIR24S:
631 RANGE (-0x800000, 0x7fffff);
632 OP (0) = relocation;
633 OP (1) = relocation >> 8;
634 OP (2) = relocation >> 16;
635 break;
636
637 case R_RL78_DIR32:
638 OP (0) = relocation;
639 OP (1) = relocation >> 8;
640 OP (2) = relocation >> 16;
641 OP (3) = relocation >> 24;
642 break;
643
644 case R_RL78_DIR32_REV:
645 OP (3) = relocation;
646 OP (2) = relocation >> 8;
647 OP (1) = relocation >> 16;
648 OP (0) = relocation >> 24;
649 break;
650
9cea966c 651 case R_RL78_RH_SFR:
9cea966c
DD		 652 RANGE (0xfff00, 0xfffff);
653 OP (0) = relocation & 0xff;
654 break;
655
656 case R_RL78_RH_SADDR:
9cea966c
DD		 657 RANGE (0xffe20, 0xfff1f);
658 OP (0) = relocation & 0xff;
9cea966c
DD		 659 break;
660
99c513f6
DD		 661 /* Complex reloc handling: */
662
663 case R_RL78_ABS32:
664 RL78_STACK_POP (relocation);
665 OP (0) = relocation;
666 OP (1) = relocation >> 8;
667 OP (2) = relocation >> 16;
668 OP (3) = relocation >> 24;
669 break;
670
671 case R_RL78_ABS32_REV:
672 RL78_STACK_POP (relocation);
673 OP (3) = relocation;
674 OP (2) = relocation >> 8;
675 OP (1) = relocation >> 16;
676 OP (0) = relocation >> 24;
677 break;
678
679 case R_RL78_ABS24S_PCREL:
680 case R_RL78_ABS24S:
681 RL78_STACK_POP (relocation);
682 RANGE (-0x800000, 0x7fffff);
683 OP (0) = relocation;
684 OP (1) = relocation >> 8;
685 OP (2) = relocation >> 16;
686 break;
687
688 case R_RL78_ABS16:
689 RL78_STACK_POP (relocation);
690 RANGE (-32768, 65535);
691 OP (0) = relocation;
692 OP (1) = relocation >> 8;
693 break;
694
695 case R_RL78_ABS16_REV:
696 RL78_STACK_POP (relocation);
697 RANGE (-32768, 65535);
698 OP (1) = relocation;
699 OP (0) = relocation >> 8;
700 break;
701
702 case R_RL78_ABS16S_PCREL:
703 case R_RL78_ABS16S:
704 RL78_STACK_POP (relocation);
705 RANGE (-32768, 32767);
706 OP (0) = relocation;
707 OP (1) = relocation >> 8;
708 break;
709
710 case R_RL78_ABS16U:
711 RL78_STACK_POP (relocation);
712 RANGE (0, 65536);
713 OP (0) = relocation;
714 OP (1) = relocation >> 8;
715 break;
716
717 case R_RL78_ABS16UL:
718 RL78_STACK_POP (relocation);
719 relocation >>= 2;
720 RANGE (0, 65536);
721 OP (0) = relocation;
722 OP (1) = relocation >> 8;
723 break;
724
725 case R_RL78_ABS16UW:
726 RL78_STACK_POP (relocation);
727 relocation >>= 1;
728 RANGE (0, 65536);
729 OP (0) = relocation;
730 OP (1) = relocation >> 8;
731 break;
732
733 case R_RL78_ABS8:
734 RL78_STACK_POP (relocation);
735 RANGE (-128, 255);
736 OP (0) = relocation;
737 break;
738
739 case R_RL78_ABS8U:
740 RL78_STACK_POP (relocation);
741 RANGE (0, 255);
742 OP (0) = relocation;
743 break;
744
745 case R_RL78_ABS8UL:
746 RL78_STACK_POP (relocation);
747 relocation >>= 2;
748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RL78_ABS8UW:
753 RL78_STACK_POP (relocation);
754 relocation >>= 1;
755 RANGE (0, 255);
756 OP (0) = relocation;
757 break;
758
759 case R_RL78_ABS8S_PCREL:
760 case R_RL78_ABS8S:
761 RL78_STACK_POP (relocation);
762 RANGE (-128, 127);
763 OP (0) = relocation;
764 break;
765
766 case R_RL78_SYM:
767 if (r_symndx < symtab_hdr->sh_info)
768 RL78_STACK_PUSH (sec->output_section->vma
769 + sec->output_offset
770 + sym->st_value
771 + rel->r_addend);
772 else
773 {
774 if (h != NULL
775 && (h->root.type == bfd_link_hash_defined
776 || h->root.type == bfd_link_hash_defweak))
777 RL78_STACK_PUSH (h->root.u.def.value
778 + sec->output_section->vma
779 + sec->output_offset
780 + rel->r_addend);
4107ae22
DD		 781 else if (h->root.type == bfd_link_hash_undefweak)
782 RL78_STACK_PUSH (0);
99c513f6
DD		 783 else
784 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
785 }
786 break;
787
788 case R_RL78_OPneg:
789 {
790 int32_t tmp;
791
792 RL78_STACK_POP (tmp);
793 tmp = - tmp;
794 RL78_STACK_PUSH (tmp);
795 }
796 break;
797
798 case R_RL78_OPadd:
799 {
800 int32_t tmp1, tmp2;
801
802 RL78_STACK_POP (tmp2);
803 RL78_STACK_POP (tmp1);
804 tmp1 += tmp2;
805 RL78_STACK_PUSH (tmp1);
806 }
807 break;
808
809 case R_RL78_OPsub:
810 {
811 int32_t tmp1, tmp2;
812
34064ff3
DD		 813 /* For the expression "A - B", the assembler pushes A,
814 then B, then OPSUB. So the first op we pop is B, not
815 A. */
816 RL78_STACK_POP (tmp2); /* B */
817 RL78_STACK_POP (tmp1); /* A */
818 tmp1 -= tmp2; /* A - B */
819 RL78_STACK_PUSH (tmp1);
99c513f6
DD		 820 }
821 break;
822
823 case R_RL78_OPmul:
824 {
825 int32_t tmp1, tmp2;
826
827 RL78_STACK_POP (tmp2);
828 RL78_STACK_POP (tmp1);
829 tmp1 *= tmp2;
830 RL78_STACK_PUSH (tmp1);
831 }
832 break;
833
834 case R_RL78_OPdiv:
835 {
836 int32_t tmp1, tmp2;
837
838 RL78_STACK_POP (tmp2);
839 RL78_STACK_POP (tmp1);
840 tmp1 /= tmp2;
841 RL78_STACK_PUSH (tmp1);
842 }
843 break;
844
845 case R_RL78_OPshla:
846 {
847 int32_t tmp1, tmp2;
848
849 RL78_STACK_POP (tmp2);
850 RL78_STACK_POP (tmp1);
851 tmp1 <<= tmp2;
852 RL78_STACK_PUSH (tmp1);
853 }
854 break;
855
856 case R_RL78_OPshra:
857 {
858 int32_t tmp1, tmp2;
859
860 RL78_STACK_POP (tmp2);
861 RL78_STACK_POP (tmp1);
862 tmp1 >>= tmp2;
863 RL78_STACK_PUSH (tmp1);
864 }
865 break;
866
867 case R_RL78_OPsctsize:
868 RL78_STACK_PUSH (input_section->size);
869 break;
870
871 case R_RL78_OPscttop:
872 RL78_STACK_PUSH (input_section->output_section->vma);
873 break;
874
875 case R_RL78_OPand:
876 {
877 int32_t tmp1, tmp2;
878
879 RL78_STACK_POP (tmp2);
880 RL78_STACK_POP (tmp1);
881 tmp1 &= tmp2;
882 RL78_STACK_PUSH (tmp1);
883 }
884 break;
885
886 case R_RL78_OPor:
887 {
888 int32_t tmp1, tmp2;
889
890 RL78_STACK_POP (tmp2);
891 RL78_STACK_POP (tmp1);
892 tmp1 |= tmp2;
893 RL78_STACK_PUSH (tmp1);
894 }
895 break;
896
897 case R_RL78_OPxor:
898 {
899 int32_t tmp1, tmp2;
900
901 RL78_STACK_POP (tmp2);
902 RL78_STACK_POP (tmp1);
903 tmp1 ^= tmp2;
904 RL78_STACK_PUSH (tmp1);
905 }
906 break;
907
908 case R_RL78_OPnot:
909 {
910 int32_t tmp;
911
912 RL78_STACK_POP (tmp);
913 tmp = ~ tmp;
914 RL78_STACK_PUSH (tmp);
915 }
916 break;
917
918 case R_RL78_OPmod:
919 {
920 int32_t tmp1, tmp2;
921
922 RL78_STACK_POP (tmp2);
923 RL78_STACK_POP (tmp1);
924 tmp1 %= tmp2;
925 RL78_STACK_PUSH (tmp1);
926 }
927 break;
928
929 case R_RL78_OPromtop:
930 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
931 break;
932
933 case R_RL78_OPramtop:
934 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
935 break;
936
937 default:
938 r = bfd_reloc_notsupported;
939 break;
940 }
941
942 if (r != bfd_reloc_ok)
943 {
944 const char * msg = NULL;
945
946 switch (r)
947 {
948 case bfd_reloc_overflow:
949 /* Catch the case of a missing function declaration
950 and emit a more helpful error message. */
951 if (r_type == R_RL78_DIR24S_PCREL)
952 msg = _("%B(%A): error: call to undefined function '%s'");
953 else
954 r = info->callbacks->reloc_overflow
955 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
956 input_bfd, input_section, rel->r_offset);
957 break;
958
959 case bfd_reloc_undefined:
960 r = info->callbacks->undefined_symbol
961 (info, name, input_bfd, input_section, rel->r_offset,
962 TRUE);
963 break;
964
965 case bfd_reloc_other:
966 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
967 break;
968
969 case bfd_reloc_outofrange:
970 msg = _("%B(%A): internal error: out of range error");
971 break;
972
973 case bfd_reloc_notsupported:
974 msg = _("%B(%A): internal error: unsupported relocation error");
975 break;
976
977 case bfd_reloc_dangerous:
978 msg = _("%B(%A): internal error: dangerous relocation");
979 break;
980
981 default:
982 msg = _("%B(%A): internal error: unknown error");
983 break;
984 }
985
986 if (msg)
987 _bfd_error_handler (msg, input_bfd, input_section, name);
988
989 if (! r)
990 return FALSE;
991 }
992 }
993
994 return TRUE;
995}
996\f
997/* Function to set the ELF flag bits. */
998
999static bfd_boolean
1000rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1001{
1002 elf_elfheader (abfd)->e_flags = flags;
1003 elf_flags_init (abfd) = TRUE;
1004 return TRUE;
1005}
1006
1007static bfd_boolean no_warn_mismatch = FALSE;
1008
1009void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1010
1011void
1012bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1013{
1014 no_warn_mismatch = user_no_warn_mismatch;
1015}
1016
1017/* Merge backend specific data from an object file to the output
1018 object file when linking. */
1019
1020static bfd_boolean
1021rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1022{
99c513f6
DD		 1023 flagword new_flags;
1024 bfd_boolean error = FALSE;
1025
1026 new_flags = elf_elfheader (ibfd)->e_flags;
99c513f6
DD		 1027
1028 if (!elf_flags_init (obfd))
1029 {
1030 /* First call, no flags set. */
1031 elf_flags_init (obfd) = TRUE;
1032 elf_elfheader (obfd)->e_flags = new_flags;
1033 }
1034
1035 return !error;
1036}
1037\f
1038static bfd_boolean
1039rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1040{
1041 FILE * file = (FILE *) ptr;
1042 flagword flags;
1043
1044 BFD_ASSERT (abfd != NULL && ptr != NULL);
1045
1046 /* Print normal ELF private data. */
1047 _bfd_elf_print_private_bfd_data (abfd, ptr);
1048
1049 flags = elf_elfheader (abfd)->e_flags;
1050 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1051
1052 fputc ('\n', file);
1053 return TRUE;
1054}
1055
1056/* Return the MACH for an e_flags value. */
1057
1058static int
1059elf32_rl78_machine (bfd * abfd)
1060{
1061 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1062 return bfd_mach_rl78;
1063
1064 return 0;
1065}
1066
1067static bfd_boolean
1068rl78_elf_object_p (bfd * abfd)
1069{
1070 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1071 elf32_rl78_machine (abfd));
1072 return TRUE;
1073}
1074 \f
1075#ifdef DEBUG
1076void
1077rl78_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
1078{
1079 size_t locsymcount;
1080 Elf_Internal_Sym * isymbuf;
1081 Elf_Internal_Sym * isymend;
1082 Elf_Internal_Sym * isym;
1083 Elf_Internal_Shdr * symtab_hdr;
1084 bfd_boolean free_internal = FALSE, free_external = FALSE;
1085 char * st_info_str;
1086 char * st_info_stb_str;
1087 char * st_other_str;
1088 char * st_shndx_str;
1089
1090 if (! internal_syms)
1091 {
1092 internal_syms = bfd_malloc (1000);
1093 free_internal = 1;
1094 }
1095 if (! external_syms)
1096 {
1097 external_syms = bfd_malloc (1000);
1098 free_external = 1;
1099 }
1100
1101 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1102 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
1103 if (free_internal)
1104 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
1105 symtab_hdr->sh_info, 0,
1106 internal_syms, external_syms, NULL);
1107 else
1108 isymbuf = internal_syms;
1109 isymend = isymbuf + locsymcount;
1110
1111 for (isym = isymbuf ; isym < isymend ; isym++)
1112 {
1113 switch (ELF_ST_TYPE (isym->st_info))
1114 {
1115 case STT_FUNC: st_info_str = "STT_FUNC";
1116 case STT_SECTION: st_info_str = "STT_SECTION";
1117 case STT_FILE: st_info_str = "STT_FILE";
1118 case STT_OBJECT: st_info_str = "STT_OBJECT";
1119 case STT_TLS: st_info_str = "STT_TLS";
1120 default: st_info_str = "";
1121 }
1122 switch (ELF_ST_BIND (isym->st_info))
1123 {
1124 case STB_LOCAL: st_info_stb_str = "STB_LOCAL";
1125 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL";
1126 default: st_info_stb_str = "";
1127 }
1128 switch (ELF_ST_VISIBILITY (isym->st_other))
1129 {
1130 case STV_DEFAULT: st_other_str = "STV_DEFAULT";
1131 case STV_INTERNAL: st_other_str = "STV_INTERNAL";
1132 case STV_PROTECTED: st_other_str = "STV_PROTECTED";
1133 default: st_other_str = "";
1134 }
1135 switch (isym->st_shndx)
1136 {
1137 case SHN_ABS: st_shndx_str = "SHN_ABS";
1138 case SHN_COMMON: st_shndx_str = "SHN_COMMON";
1139 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF";
1140 default: st_shndx_str = "";
1141 }
99c513f6
DD		 1142 }
1143 if (free_internal)
1144 free (internal_syms);
1145 if (free_external)
1146 free (external_syms);
1147}
1148
1149char *
1150rl78_get_reloc (long reloc)
1151{
1152 if (0 <= reloc && reloc < R_RL78_max)
1153 return rl78_elf_howto_table[reloc].name;
1154 return "";
1155}
1156#endif /* DEBUG */
1157
1158\f
1159/* support PLT for 16-bit references to 24-bit functions. */
1160
1161/* We support 16-bit pointers to code above 64k by generating a thunk
1162 below 64k containing a JMP instruction to the final address. */
68ffbac6 1163
99c513f6
DD		 1164static bfd_boolean
1165rl78_elf_check_relocs
1166 (bfd * abfd,
1167 struct bfd_link_info * info,
1168 asection * sec,
1169 const Elf_Internal_Rela * relocs)
1170{
1171 Elf_Internal_Shdr * symtab_hdr;
1172 struct elf_link_hash_entry ** sym_hashes;
1173 const Elf_Internal_Rela * rel;
1174 const Elf_Internal_Rela * rel_end;
1175 bfd_vma *local_plt_offsets;
1176 asection *splt;
1177 bfd *dynobj;
1178
1179 if (info->relocatable)
1180 return TRUE;
68ffbac6 1181
99c513f6
DD		 1182 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1183 sym_hashes = elf_sym_hashes (abfd);
1184 local_plt_offsets = elf_local_got_offsets (abfd);
1185 splt = NULL;
1186 dynobj = elf_hash_table(info)->dynobj;
1187
1188 rel_end = relocs + sec->reloc_count;
1189 for (rel = relocs; rel < rel_end; rel++)
1190 {
1191 struct elf_link_hash_entry *h;
1192 unsigned long r_symndx;
1193 bfd_vma *offset;
68ffbac6 1194
99c513f6
DD		 1195 r_symndx = ELF32_R_SYM (rel->r_info);
1196 if (r_symndx < symtab_hdr->sh_info)
1197 h = NULL;
1198 else
1199 {
1200 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1201 while (h->root.type == bfd_link_hash_indirect
1202 || h->root.type == bfd_link_hash_warning)
1203 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1204
1205 /* PR15323, ref flags aren't set for references in the same
1206 object. */
1207 h->root.non_ir_ref = 1;
99c513f6 1208 }
68ffbac6 1209
99c513f6
DD		 1210 switch (ELF32_R_TYPE (rel->r_info))
1211 {
1212 /* This relocation describes a 16-bit pointer to a function.
1213 We may need to allocate a thunk in low memory; reserve memory
1214 for it now. */
1215 case R_RL78_DIR16S:
1216 if (dynobj == NULL)
1217 elf_hash_table (info)->dynobj = dynobj = abfd;
1218 if (splt == NULL)
1219 {
3d4d4302 1220 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1221 if (splt == NULL)
1222 {
1223 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1224 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1225 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1226 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1227 flags);
99c513f6
DD		 1228 if (splt == NULL
1229 || ! bfd_set_section_alignment (dynobj, splt, 1))
1230 return FALSE;
1231 }
1232 }
1233
1234 if (h != NULL)
1235 offset = &h->plt.offset;
1236 else
1237 {
1238 if (local_plt_offsets == NULL)
1239 {
1240 size_t size;
1241 unsigned int i;
1242
1243 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1244 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1245 if (local_plt_offsets == NULL)
1246 return FALSE;
1247 elf_local_got_offsets (abfd) = local_plt_offsets;
1248
1249 for (i = 0; i < symtab_hdr->sh_info; i++)
1250 local_plt_offsets[i] = (bfd_vma) -1;
1251 }
1252 offset = &local_plt_offsets[r_symndx];
1253 }
1254
1255 if (*offset == (bfd_vma) -1)
1256 {
1257 *offset = splt->size;
1258 splt->size += 4;
1259 }
1260 break;
1261 }
1262 }
68ffbac6 1263
99c513f6
DD		 1264 return TRUE;
1265}
1266
1267/* This must exist if dynobj is ever set. */
1268
1269static bfd_boolean
1270rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1271 struct bfd_link_info *info)
1272{
1273 bfd *dynobj;
1274 asection *splt;
1275
47fc0f1f
NC		 1276 if (!elf_hash_table (info)->dynamic_sections_created)
1277 return TRUE;
1278
9cea966c
DD		 1279 /* As an extra sanity check, verify that all plt entries have been
1280 filled in. However, relaxing might have changed the relocs so
1281 that some plt entries don't get filled in, so we have to skip
1282 this check if we're relaxing. Unfortunately, check_relocs is
1283 called before relaxation. */
99c513f6 1284
47fc0f1f
NC		 1285 if (info->relax_trip > 0)
1286 return TRUE;
1287
1288 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1289 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1290 {
47fc0f1f
NC		 1291 bfd_byte *contents = splt->contents;
1292 unsigned int i, size = splt->size;
1293
1294 for (i = 0; i < size; i += 4)
99c513f6 1295 {
47fc0f1f
NC		 1296 unsigned int x = bfd_get_32 (dynobj, contents + i);
1297 BFD_ASSERT (x != 0);
99c513f6
DD		 1298 }
1299 }
1300
1301 return TRUE;
1302}
1303
1304static bfd_boolean
1305rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1306 struct bfd_link_info *info)
1307{
1308 bfd *dynobj;
1309 asection *splt;
1310
1311 if (info->relocatable)
1312 return TRUE;
1313
1314 dynobj = elf_hash_table (info)->dynobj;
1315 if (dynobj == NULL)
1316 return TRUE;
1317
3d4d4302 1318 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1319 BFD_ASSERT (splt != NULL);
1320
1321 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1322 if (splt->contents == NULL)
1323 return FALSE;
1324
1325 return TRUE;
1326}
1327
1328\f
1329
1330/* Handle relaxing. */
1331
1332/* A subroutine of rl78_elf_relax_section. If the global symbol H
1333 is within the low 64k, remove any entry for it in the plt. */
1334
1335struct relax_plt_data
1336{
1337 asection *splt;
1338 bfd_boolean *again;
1339};
1340
1341static bfd_boolean
2c3fc389 1342rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1343{
1344 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1345
1346 if (h->plt.offset != (bfd_vma) -1)
1347 {
1348 bfd_vma address;
1349
1350 if (h->root.type == bfd_link_hash_undefined
1351 || h->root.type == bfd_link_hash_undefweak)
1352 address = 0;
1353 else
1354 address = (h->root.u.def.section->output_section->vma
1355 + h->root.u.def.section->output_offset
1356 + h->root.u.def.value);
1357
1358 if (valid_16bit_address (address))
1359 {
1360 h->plt.offset = -1;
1361 data->splt->size -= 4;
1362 *data->again = TRUE;
1363 }
1364 }
1365
1366 return TRUE;
1367}
1368
1369/* A subroutine of rl78_elf_relax_section. If the global symbol H
1370 previously had a plt entry, give it a new entry offset. */
1371
1372static bfd_boolean
2c3fc389 1373rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1374{
1375 bfd_vma *entry = (bfd_vma *) xdata;
1376
1377 if (h->plt.offset != (bfd_vma) -1)
1378 {
1379 h->plt.offset = *entry;
1380 *entry += 4;
1381 }
1382
1383 return TRUE;
1384}
1385
1386static bfd_boolean
1387rl78_elf_relax_plt_section (bfd *dynobj,
1388 asection *splt,
1389 struct bfd_link_info *info,
1390 bfd_boolean *again)
1391{
1392 struct relax_plt_data relax_plt_data;
1393 bfd *ibfd;
1394
1395 /* Assume nothing changes. */
1396 *again = FALSE;
1397
1398 if (info->relocatable)
1399 return TRUE;
1400
1401 /* We only relax the .plt section at the moment. */
1402 if (dynobj != elf_hash_table (info)->dynobj
1403 || strcmp (splt->name, ".plt") != 0)
1404 return TRUE;
1405
1406 /* Quick check for an empty plt. */
1407 if (splt->size == 0)
1408 return TRUE;
1409
1410 /* Map across all global symbols; see which ones happen to
1411 fall in the low 64k. */
1412 relax_plt_data.splt = splt;
1413 relax_plt_data.again = again;
1414 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1415 &relax_plt_data);
1416
1417 /* Likewise for local symbols, though that's somewhat less convenient
1418 as we have to walk the list of input bfds and swap in symbol data. */
1419 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1420 {
1421 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1422 Elf_Internal_Shdr *symtab_hdr;
1423 Elf_Internal_Sym *isymbuf = NULL;
1424 unsigned int idx;
1425
1426 if (! local_plt_offsets)
1427 continue;
1428
1429 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1430 if (symtab_hdr->sh_info != 0)
1431 {
1432 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1433 if (isymbuf == NULL)
1434 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1435 symtab_hdr->sh_info, 0,
1436 NULL, NULL, NULL);
1437 if (isymbuf == NULL)
1438 return FALSE;
1439 }
1440
1441 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1442 {
1443 Elf_Internal_Sym *isym;
1444 asection *tsec;
1445 bfd_vma address;
1446
1447 if (local_plt_offsets[idx] == (bfd_vma) -1)
1448 continue;
1449
1450 isym = &isymbuf[idx];
1451 if (isym->st_shndx == SHN_UNDEF)
1452 continue;
1453 else if (isym->st_shndx == SHN_ABS)
1454 tsec = bfd_abs_section_ptr;
1455 else if (isym->st_shndx == SHN_COMMON)
1456 tsec = bfd_com_section_ptr;
1457 else
1458 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1459
1460 address = (tsec->output_section->vma
1461 + tsec->output_offset
1462 + isym->st_value);
1463 if (valid_16bit_address (address))
1464 {
1465 local_plt_offsets[idx] = -1;
1466 splt->size -= 4;
1467 *again = TRUE;
1468 }
1469 }
1470
1471 if (isymbuf != NULL
1472 && symtab_hdr->contents != (unsigned char *) isymbuf)
1473 {
1474 if (! info->keep_memory)
1475 free (isymbuf);
1476 else
1477 {
1478 /* Cache the symbols for elf_link_input_bfd. */
1479 symtab_hdr->contents = (unsigned char *) isymbuf;
1480 }
1481 }
1482 }
1483
1484 /* If we changed anything, walk the symbols again to reallocate
1485 .plt entry addresses. */
1486 if (*again && splt->size > 0)
1487 {
1488 bfd_vma entry = 0;
1489
1490 elf_link_hash_traverse (elf_hash_table (info),
1491 rl78_relax_plt_realloc, &entry);
1492
1493 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link_next)
1494 {
1495 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1496 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1497 unsigned int idx;
1498
1499 if (! local_plt_offsets)
1500 continue;
1501
1502 for (idx = 0; idx < nlocals; ++idx)
1503 if (local_plt_offsets[idx] != (bfd_vma) -1)
1504 {
1505 local_plt_offsets[idx] = entry;
1506 entry += 4;
1507 }
1508 }
1509 }
1510
1511 return TRUE;
1512}
1513
9cea966c
DD		 1514/* Delete some bytes from a section while relaxing. */
1515
1516static bfd_boolean
1517elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1518 Elf_Internal_Rela *alignment_rel, int force_snip)
1519{
1520 Elf_Internal_Shdr * symtab_hdr;
1521 unsigned int sec_shndx;
1522 bfd_byte * contents;
1523 Elf_Internal_Rela * irel;
1524 Elf_Internal_Rela * irelend;
1525 Elf_Internal_Sym * isym;
1526 Elf_Internal_Sym * isymend;
1527 bfd_vma toaddr;
1528 unsigned int symcount;
1529 struct elf_link_hash_entry ** sym_hashes;
1530 struct elf_link_hash_entry ** end_hashes;
1531
1532 if (!alignment_rel)
1533 force_snip = 1;
1534
1535 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1536
1537 contents = elf_section_data (sec)->this_hdr.contents;
1538
1539 /* The deletion must stop at the next alignment boundary, if
1540 ALIGNMENT_REL is non-NULL. */
1541 toaddr = sec->size;
1542 if (alignment_rel)
1543 toaddr = alignment_rel->r_offset;
1544
1545 irel = elf_section_data (sec)->relocs;
1546 irelend = irel + sec->reloc_count;
1547
1548 /* Actually delete the bytes. */
1549 memmove (contents + addr, contents + addr + count,
1550 (size_t) (toaddr - addr - count));
1551
1552 /* If we don't have an alignment marker to worry about, we can just
1553 shrink the section. Otherwise, we have to fill in the newly
1554 created gap with NOP insns (0x03). */
1555 if (force_snip)
1556 sec->size -= count;
1557 else
1558 memset (contents + toaddr - count, 0x03, count);
1559
1560 /* Adjust all the relocs. */
1561 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1562 {
1563 /* Get the new reloc address. */
1564 if (irel->r_offset > addr
1565 && (irel->r_offset < toaddr
1566 || (force_snip && irel->r_offset == toaddr)))
1567 irel->r_offset -= count;
1568
1569 /* If we see an ALIGN marker at the end of the gap, we move it
1570 to the beginning of the gap, since marking these gaps is what
1571 they're for. */
1572 if (irel->r_offset == toaddr
1573 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1574 && irel->r_addend & RL78_RELAXA_ALIGN)
1575 irel->r_offset -= count;
1576 }
1577
1578 /* Adjust the local symbols defined in this section. */
1579 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1580 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1581 isymend = isym + symtab_hdr->sh_info;
1582
1583 for (; isym < isymend; isym++)
1584 {
1585 /* If the symbol is in the range of memory we just moved, we
1586 have to adjust its value. */
1587 if (isym->st_shndx == sec_shndx
1588 && isym->st_value > addr
1589 && isym->st_value < toaddr)
1590 isym->st_value -= count;
1591
1592 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1593 *end* is in the moved bytes but it's *start* isn't), then we
1594 must adjust its size. */
1595 if (isym->st_shndx == sec_shndx
1596 && isym->st_value < addr
1597 && isym->st_value + isym->st_size > addr
1598 && isym->st_value + isym->st_size < toaddr)
1599 isym->st_size -= count;
1600 }
1601
1602 /* Now adjust the global symbols defined in this section. */
1603 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1604 - symtab_hdr->sh_info);
1605 sym_hashes = elf_sym_hashes (abfd);
1606 end_hashes = sym_hashes + symcount;
1607
1608 for (; sym_hashes < end_hashes; sym_hashes++)
1609 {
1610 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1611
1612 if ((sym_hash->root.type == bfd_link_hash_defined
1613 || sym_hash->root.type == bfd_link_hash_defweak)
1614 && sym_hash->root.u.def.section == sec)
1615 {
1616 /* As above, adjust the value if needed. */
1617 if (sym_hash->root.u.def.value > addr
1618 && sym_hash->root.u.def.value < toaddr)
1619 sym_hash->root.u.def.value -= count;
1620
1621 /* As above, adjust the size if needed. */
1622 if (sym_hash->root.u.def.value < addr
1623 && sym_hash->root.u.def.value + sym_hash->size > addr
1624 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1625 sym_hash->size -= count;
1626 }
1627 }
1628
1629 return TRUE;
1630}
1631
1632/* Used to sort relocs by address. If relocs have the same address,
1633 we maintain their relative order, except that R_RL78_RH_RELAX
1634 alignment relocs must be the first reloc for any given address. */
1635
1636static void
1637reloc_bubblesort (Elf_Internal_Rela * r, int count)
1638{
1639 int i;
1640 bfd_boolean again;
1641 bfd_boolean swappit;
1642
1643 /* This is almost a classic bubblesort. It's the slowest sort, but
1644 we're taking advantage of the fact that the relocations are
1645 mostly in order already (the assembler emits them that way) and
1646 we need relocs with the same address to remain in the same
1647 relative order. */
1648 again = TRUE;
1649 while (again)
1650 {
1651 again = FALSE;
1652 for (i = 0; i < count - 1; i ++)
1653 {
1654 if (r[i].r_offset > r[i + 1].r_offset)
1655 swappit = TRUE;
1656 else if (r[i].r_offset < r[i + 1].r_offset)
1657 swappit = FALSE;
1658 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1659 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1660 swappit = TRUE;
1661 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1662 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1663 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1664 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1665 swappit = TRUE;
1666 else
1667 swappit = FALSE;
1668
1669 if (swappit)
1670 {
1671 Elf_Internal_Rela tmp;
1672
1673 tmp = r[i];
1674 r[i] = r[i + 1];
1675 r[i + 1] = tmp;
1676 /* If we do move a reloc back, re-scan to see if it
1677 needs to be moved even further back. This avoids
1678 most of the O(n^2) behavior for our cases. */
1679 if (i > 0)
1680 i -= 2;
1681 again = TRUE;
1682 }
1683 }
1684 }
1685}
1686
1687
1688#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1689 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1690 lrel, abfd, sec, link_info, scale)
1691
1692static bfd_vma
1693rl78_offset_for_reloc (bfd * abfd,
1694 Elf_Internal_Rela * rel,
1695 Elf_Internal_Shdr * symtab_hdr,
1696 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1697 Elf_Internal_Sym * intsyms,
1698 Elf_Internal_Rela ** lrel,
1699 bfd * input_bfd,
1700 asection * input_section,
1701 struct bfd_link_info * info,
1702 int * scale)
1703{
1704 bfd_vma symval;
1705 bfd_reloc_status_type r;
1706
1707 *scale = 1;
1708
1709 /* REL is the first of 1..N relocations. We compute the symbol
1710 value for each relocation, then combine them if needed. LREL
1711 gets a pointer to the last relocation used. */
1712 while (1)
1713 {
1714 int32_t tmp1, tmp2;
1715
1716 /* Get the value of the symbol referred to by the reloc. */
1717 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1718 {
1719 /* A local symbol. */
1720 Elf_Internal_Sym *isym;
1721 asection *ssec;
1722
1723 isym = intsyms + ELF32_R_SYM (rel->r_info);
1724
1725 if (isym->st_shndx == SHN_UNDEF)
1726 ssec = bfd_und_section_ptr;
1727 else if (isym->st_shndx == SHN_ABS)
1728 ssec = bfd_abs_section_ptr;
1729 else if (isym->st_shndx == SHN_COMMON)
1730 ssec = bfd_com_section_ptr;
1731 else
1732 ssec = bfd_section_from_elf_index (abfd,
1733 isym->st_shndx);
1734
1735 /* Initial symbol value. */
1736 symval = isym->st_value;
1737
1738 /* GAS may have made this symbol relative to a section, in
1739 which case, we have to add the addend to find the
1740 symbol. */
1741 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1742 symval += rel->r_addend;
1743
1744 if (ssec)
1745 {
1746 if ((ssec->flags & SEC_MERGE)
dbaa2011 1747 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1748 symval = _bfd_merged_section_offset (abfd, & ssec,
1749 elf_section_data (ssec)->sec_info,
1750 symval);
1751 }
1752
1753 /* Now make the offset relative to where the linker is putting it. */
1754 if (ssec)
1755 symval +=
1756 ssec->output_section->vma + ssec->output_offset;
1757
1758 symval += rel->r_addend;
1759 }
1760 else
1761 {
1762 unsigned long indx;
1763 struct elf_link_hash_entry * h;
1764
1765 /* An external symbol. */
1766 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1767 h = elf_sym_hashes (abfd)[indx];
1768 BFD_ASSERT (h != NULL);
1769
1770 if (h->root.type != bfd_link_hash_defined
1771 && h->root.type != bfd_link_hash_defweak)
1772 {
1773 /* This appears to be a reference to an undefined
1774 symbol. Just ignore it--it will be caught by the
1775 regular reloc processing. */
1776 if (lrel)
1777 *lrel = rel;
1778 return 0;
1779 }
1780
1781 symval = (h->root.u.def.value
1782 + h->root.u.def.section->output_section->vma
1783 + h->root.u.def.section->output_offset);
1784
1785 symval += rel->r_addend;
1786 }
1787
1788 switch (ELF32_R_TYPE (rel->r_info))
1789 {
1790 case R_RL78_SYM:
1791 RL78_STACK_PUSH (symval);
1792 break;
1793
1794 case R_RL78_OPneg:
1795 RL78_STACK_POP (tmp1);
1796 tmp1 = - tmp1;
1797 RL78_STACK_PUSH (tmp1);
1798 break;
1799
1800 case R_RL78_OPadd:
1801 RL78_STACK_POP (tmp1);
1802 RL78_STACK_POP (tmp2);
1803 tmp1 += tmp2;
1804 RL78_STACK_PUSH (tmp1);
1805 break;
1806
1807 case R_RL78_OPsub:
1808 RL78_STACK_POP (tmp1);
1809 RL78_STACK_POP (tmp2);
1810 tmp2 -= tmp1;
1811 RL78_STACK_PUSH (tmp2);
1812 break;
1813
1814 case R_RL78_OPmul:
1815 RL78_STACK_POP (tmp1);
1816 RL78_STACK_POP (tmp2);
1817 tmp1 *= tmp2;
1818 RL78_STACK_PUSH (tmp1);
1819 break;
1820
1821 case R_RL78_OPdiv:
1822 RL78_STACK_POP (tmp1);
1823 RL78_STACK_POP (tmp2);
1824 tmp1 /= tmp2;
1825 RL78_STACK_PUSH (tmp1);
1826 break;
1827
1828 case R_RL78_OPshla:
1829 RL78_STACK_POP (tmp1);
1830 RL78_STACK_POP (tmp2);
1831 tmp1 <<= tmp2;
1832 RL78_STACK_PUSH (tmp1);
1833 break;
1834
1835 case R_RL78_OPshra:
1836 RL78_STACK_POP (tmp1);
1837 RL78_STACK_POP (tmp2);
1838 tmp1 >>= tmp2;
1839 RL78_STACK_PUSH (tmp1);
1840 break;
1841
1842 case R_RL78_OPsctsize:
1843 RL78_STACK_PUSH (input_section->size);
1844 break;
1845
1846 case R_RL78_OPscttop:
1847 RL78_STACK_PUSH (input_section->output_section->vma);
1848 break;
1849
1850 case R_RL78_OPand:
1851 RL78_STACK_POP (tmp1);
1852 RL78_STACK_POP (tmp2);
1853 tmp1 &= tmp2;
1854 RL78_STACK_PUSH (tmp1);
1855 break;
1856
1857 case R_RL78_OPor:
1858 RL78_STACK_POP (tmp1);
1859 RL78_STACK_POP (tmp2);
1860 tmp1 |= tmp2;
1861 RL78_STACK_PUSH (tmp1);
1862 break;
1863
1864 case R_RL78_OPxor:
1865 RL78_STACK_POP (tmp1);
1866 RL78_STACK_POP (tmp2);
1867 tmp1 ^= tmp2;
1868 RL78_STACK_PUSH (tmp1);
1869 break;
1870
1871 case R_RL78_OPnot:
1872 RL78_STACK_POP (tmp1);
1873 tmp1 = ~ tmp1;
1874 RL78_STACK_PUSH (tmp1);
1875 break;
1876
1877 case R_RL78_OPmod:
1878 RL78_STACK_POP (tmp1);
1879 RL78_STACK_POP (tmp2);
1880 tmp1 %= tmp2;
1881 RL78_STACK_PUSH (tmp1);
1882 break;
1883
1884 case R_RL78_OPromtop:
1885 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1886 break;
1887
1888 case R_RL78_OPramtop:
1889 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1890 break;
1891
1892 case R_RL78_DIR16UL:
1893 case R_RL78_DIR8UL:
1894 case R_RL78_ABS16UL:
1895 case R_RL78_ABS8UL:
1896 if (rl78_stack_top)
1897 RL78_STACK_POP (symval);
1898 if (lrel)
1899 *lrel = rel;
1900 *scale = 4;
1901 return symval;
1902
1903 case R_RL78_DIR16UW:
1904 case R_RL78_DIR8UW:
1905 case R_RL78_ABS16UW:
1906 case R_RL78_ABS8UW:
1907 if (rl78_stack_top)
1908 RL78_STACK_POP (symval);
1909 if (lrel)
1910 *lrel = rel;
1911 *scale = 2;
1912 return symval;
1913
1914 default:
1915 if (rl78_stack_top)
1916 RL78_STACK_POP (symval);
1917 if (lrel)
1918 *lrel = rel;
1919 return symval;
1920 }
1921
1922 rel ++;
1923 }
1924}
1925
1926struct {
1927 int prefix; /* or -1 for "no prefix" */
1928 int insn; /* or -1 for "end of list" */
1929 int insn_for_saddr; /* or -1 for "no alternative" */
1930 int insn_for_sfr; /* or -1 for "no alternative" */
1931} relax_addr16[] = {
1932 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1933 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1934 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1935 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1936
1937 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1938 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1939 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1940 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1941 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1942 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1943 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1944 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1945
1946 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1947 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1948 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1949 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1950 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1951
1952 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1953 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1954 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1955 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1956
1957 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1958 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1959 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1960
1961 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1962 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1963 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1964 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1965 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1966 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1967
1968 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1969
1970 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1971 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1972 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1973 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1974 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1975 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1976 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1977 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1978
1979 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1980 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1981 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1982 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1983 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1984 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1985 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1986 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1987
9cea966c
DD		 1988 { -1, -1, -1, -1 }
1989};
1990
1991/* Relax one section. */
1992
99c513f6
DD		 1993static bfd_boolean
1994rl78_elf_relax_section
1995 (bfd * abfd,
1996 asection * sec,
1997 struct bfd_link_info * link_info,
1998 bfd_boolean * again)
1999{
9cea966c
DD		 2000 Elf_Internal_Shdr * symtab_hdr;
2001 Elf_Internal_Shdr * shndx_hdr;
2002 Elf_Internal_Rela * internal_relocs;
2003 Elf_Internal_Rela * free_relocs = NULL;
2004 Elf_Internal_Rela * irel;
2005 Elf_Internal_Rela * srel;
2006 Elf_Internal_Rela * irelend;
2007 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 2008 bfd_byte * contents = NULL;
2009 bfd_byte * free_contents = NULL;
2010 Elf_Internal_Sym * intsyms = NULL;
2011 Elf_Internal_Sym * free_intsyms = NULL;
2012 Elf_External_Sym_Shndx * shndx_buf = NULL;
2013 bfd_vma pc;
9cea966c
DD		 2014 bfd_vma symval ATTRIBUTE_UNUSED = 0;
2015 int pcrel ATTRIBUTE_UNUSED = 0;
2016 int code ATTRIBUTE_UNUSED = 0;
2017 int section_alignment_glue;
2018 int scale;
2019
99c513f6
DD		 2020 if (abfd == elf_hash_table (link_info)->dynobj
2021 && strcmp (sec->name, ".plt") == 0)
2022 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
2023
2024 /* Assume nothing changes. */
2025 *again = FALSE;
9cea966c
DD		 2026
2027 /* We don't have to do anything for a relocatable link, if
2028 this section does not have relocs, or if this is not a
2029 code section. */
2030 if (link_info->relocatable
2031 || (sec->flags & SEC_RELOC) == 0
2032 || sec->reloc_count == 0
2033 || (sec->flags & SEC_CODE) == 0)
2034 return TRUE;
2035
2036 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2037 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2038
9cea966c
DD		 2039 /* Get the section contents. */
2040 if (elf_section_data (sec)->this_hdr.contents != NULL)
2041 contents = elf_section_data (sec)->this_hdr.contents;
2042 /* Go get them off disk. */
2043 else
2044 {
2045 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2046 goto error_return;
2047 elf_section_data (sec)->this_hdr.contents = contents;
2048 }
2049
2050 /* Read this BFD's symbols. */
2051 /* Get cached copy if it exists. */
2052 if (symtab_hdr->contents != NULL)
2053 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2054 else
2055 {
2056 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2057 symtab_hdr->contents = (bfd_byte *) intsyms;
2058 }
2059
2060 if (shndx_hdr->sh_size != 0)
2061 {
2062 bfd_size_type amt;
2063
2064 amt = symtab_hdr->sh_info;
2065 amt *= sizeof (Elf_External_Sym_Shndx);
2066 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2067 if (shndx_buf == NULL)
2068 goto error_return;
2069 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2070 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2071 goto error_return;
2072 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2073 }
2074
2075 /* Get a copy of the native relocations. */
2076 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2077 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2078 link_info->keep_memory));
2079 if (internal_relocs == NULL)
2080 goto error_return;
2081 if (! link_info->keep_memory)
2082 free_relocs = internal_relocs;
2083
2084 /* The RL_ relocs must be just before the operand relocs they go
2085 with, so we must sort them to guarantee this. We use bubblesort
2086 instead of qsort so we can guarantee that relocs with the same
2087 address remain in the same relative order. */
2088 reloc_bubblesort (internal_relocs, sec->reloc_count);
2089
2090 /* Walk through them looking for relaxing opportunities. */
2091 irelend = internal_relocs + sec->reloc_count;
2092
2093
2094 /* This will either be NULL or a pointer to the next alignment
2095 relocation. */
2096 next_alignment = internal_relocs;
9cea966c
DD		 2097
2098 /* We calculate worst case shrinkage caused by alignment directives.
2099 No fool-proof, but better than either ignoring the problem or
2100 doing heavy duty analysis of all the alignment markers in all
2101 input sections. */
2102 section_alignment_glue = 0;
2103 for (irel = internal_relocs; irel < irelend; irel++)
2104 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2105 && irel->r_addend & RL78_RELAXA_ALIGN)
2106 {
2107 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2108
2109 if (section_alignment_glue < this_glue)
2110 section_alignment_glue = this_glue;
2111 }
2112 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2113 shrinkage. */
2114 section_alignment_glue *= 2;
2115
2116 for (irel = internal_relocs; irel < irelend; irel++)
2117 {
2118 unsigned char *insn;
2119 int nrelocs;
2120
2121 /* The insns we care about are all marked with one of these. */
2122 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2123 continue;
2124
2125 if (irel->r_addend & RL78_RELAXA_ALIGN
2126 || next_alignment == internal_relocs)
2127 {
2128 /* When we delete bytes, we need to maintain all the alignments
2129 indicated. In addition, we need to be careful about relaxing
2130 jumps across alignment boundaries - these displacements
2131 *grow* when we delete bytes. For now, don't shrink
2132 displacements across an alignment boundary, just in case.
2133 Note that this only affects relocations to the same
2134 section. */
9cea966c
DD		 2135 next_alignment += 2;
2136 while (next_alignment < irelend
2137 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2138 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2139 next_alignment ++;
2140 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2141 next_alignment = NULL;
2142 }
2143
2144 /* When we hit alignment markers, see if we've shrunk enough
2145 before them to reduce the gap without violating the alignment
2146 requirements. */
2147 if (irel->r_addend & RL78_RELAXA_ALIGN)
2148 {
2149 /* At this point, the next relocation *should* be the ELIGN
2150 end marker. */
2151 Elf_Internal_Rela *erel = irel + 1;
2152 unsigned int alignment, nbytes;
2153
2154 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2155 continue;
2156 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2157 continue;
2158
2159 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2160
2161 if (erel->r_offset - irel->r_offset < alignment)
2162 continue;
2163
2164 nbytes = erel->r_offset - irel->r_offset;
2165 nbytes /= alignment;
2166 nbytes *= alignment;
2167
2168 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2169 erel->r_offset == sec->size);
2170 *again = TRUE;
2171
2172 continue;
2173 }
2174
2175 if (irel->r_addend & RL78_RELAXA_ELIGN)
2176 continue;
2177
2178 insn = contents + irel->r_offset;
2179
2180 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2181
2182 /* At this point, we have an insn that is a candidate for linker
2183 relaxation. There are NRELOCS relocs following that may be
2184 relaxed, although each reloc may be made of more than one
2185 reloc entry (such as gp-rel symbols). */
2186
2187 /* Get the value of the symbol referred to by the reloc. Just
2188 in case this is the last reloc in the list, use the RL's
2189 addend to choose between this reloc (no addend) or the next
2190 (yes addend, which means at least one following reloc). */
2191
2192 /* srel points to the "current" reloction for this insn -
2193 actually the last reloc for a given operand, which is the one
2194 we need to update. We check the relaxations in the same
2195 order that the relocations happen, so we'll just push it
2196 along as we go. */
2197 srel = irel;
2198
2199 pc = sec->output_section->vma + sec->output_offset
2200 + srel->r_offset;
2201
2202#define GET_RELOC \
1122dc88 2203 BFD_ASSERT (nrelocs > 0); \
9cea966c
DD		 2204 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2205 pcrel = symval - pc + srel->r_addend; \
2206 nrelocs --;
2207
2208#define SNIPNR(offset, nbytes) \
2209 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2210#define SNIP(offset, nbytes, newtype) \
2211 SNIPNR (offset, nbytes); \
2212 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2213
2214 /* The order of these bit tests must match the order that the
2215 relocs appear in. Since we sorted those by offset, we can
2216 predict them. */
2217
2218 /*----------------------------------------------------------------------*/
2219 /* EF ad BR $rel8 pcrel
2220 ED al ah BR !abs16 abs
2221 EE al ah BR $!rel16 pcrel
2222 EC al ah as BR !!abs20 abs
2223
2224 FD al ah CALL !abs16 abs
2225 FE al ah CALL $!rel16 pcrel
2226 FC al ah as CALL !!abs20 abs
2227
2228 DC ad BC $rel8
2229 DE ad BNC $rel8
2230 DD ad BZ $rel8
2231 DF ad BNZ $rel8
2232 61 C3 ad BH $rel8
2233 61 D3 ad BNH $rel8
2234 61 C8 EF ad SKC ; BR $rel8
2235 61 D8 EF ad SKNC ; BR $rel8
2236 61 E8 EF ad SKZ ; BR $rel8
2237 61 F8 EF ad SKNZ ; BR $rel8
2238 61 E3 EF ad SKH ; BR $rel8
2239 61 F3 EF ad SKNH ; BR $rel8
2240 */
2241
2242 if (irel->r_addend & RL78_RELAXA_BRA)
2243 {
1122dc88
DD		 2244 /* SKIP opcodes that skip non-branches will have a relax tag
2245 but no corresponding symbol to relax against; we just
2246 skip those. */
2247 if (irel->r_addend & RL78_RELAXA_RNUM)
2248 {
2249 GET_RELOC;
2250 }
9cea966c
DD		 2251
2252 switch (insn[0])
2253 {
2254 case 0xec: /* BR !!abs20 */
2255
2256 if (pcrel < 127
2257 && pcrel > -127)
2258 {
2259 insn[0] = 0xef;
2260 insn[1] = pcrel;
2261 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2262 *again = TRUE;
2263 }
2264 else if (symval < 65536)
2265 {
2266 insn[0] = 0xed;
2267 insn[1] = symval & 0xff;
2268 insn[2] = symval >> 8;
2269 SNIP (2, 1, R_RL78_DIR16S);
2270 *again = TRUE;
2271 }
2272 else if (pcrel < 32767
2273 && pcrel > -32767)
2274 {
2275 insn[0] = 0xee;
2276 insn[1] = pcrel & 0xff;
2277 insn[2] = pcrel >> 8;
2278 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2279 *again = TRUE;
2280 }
2281 break;
2282
2283 case 0xee: /* BR $!pcrel16 */
2284 case 0xed: /* BR $!abs16 */
2285 if (pcrel < 127
2286 && pcrel > -127)
2287 {
2288 insn[0] = 0xef;
2289 insn[1] = pcrel;
2290 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2291 *again = TRUE;
2292 }
2293 break;
2294
2295 case 0xfc: /* CALL !!abs20 */
2296 if (symval < 65536)
2297 {
2298 insn[0] = 0xfd;
2299 insn[1] = symval & 0xff;
2300 insn[2] = symval >> 8;
2301 SNIP (2, 1, R_RL78_DIR16S);
2302 *again = TRUE;
2303 }
2304 else if (pcrel < 32767
2305 && pcrel > -32767)
2306 {
2307 insn[0] = 0xfe;
2308 insn[1] = pcrel & 0xff;
2309 insn[2] = pcrel >> 8;
2310 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2311 *again = TRUE;
2312 }
2313 break;
2314
2315 case 0x61: /* PREFIX */
2316 /* For SKIP/BR, we change the BR opcode and delete the
2317 SKIP. That way, we don't have to find and change the
2318 relocation for the BR. */
1122dc88
DD		 2319 /* Note that, for the case where we're skipping some
2320 other insn, we have no "other" reloc but that's safe
2321 here anyway. */
9cea966c
DD		 2322 switch (insn[1])
2323 {
2324 case 0xc8: /* SKC */
2325 if (insn[2] == 0xef)
2326 {
2327 insn[2] = 0xde; /* BNC */
2328 SNIPNR (0, 2);
2329 }
2330 break;
2331
2332 case 0xd8: /* SKNC */
2333 if (insn[2] == 0xef)
2334 {
2335 insn[2] = 0xdc; /* BC */
2336 SNIPNR (0, 2);
2337 }
2338 break;
2339
2340 case 0xe8: /* SKZ */
2341 if (insn[2] == 0xef)
2342 {
2343 insn[2] = 0xdf; /* BNZ */
2344 SNIPNR (0, 2);
2345 }
2346 break;
2347
2348 case 0xf8: /* SKNZ */
2349 if (insn[2] == 0xef)
2350 {
2351 insn[2] = 0xdd; /* BZ */
2352 SNIPNR (0, 2);
2353 }
2354 break;
2355
2356 case 0xe3: /* SKH */
2357 if (insn[2] == 0xef)
2358 {
2359 insn[2] = 0xd3; /* BNH */
2360 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2361 }
2362 break;
2363
2364 case 0xf3: /* SKNH */
2365 if (insn[2] == 0xef)
2366 {
2367 insn[2] = 0xc3; /* BH */
2368 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2369 }
2370 break;
2371 }
2372 break;
2373 }
68ffbac6 2374
9cea966c
DD		 2375 }
2376
2377 if (irel->r_addend & RL78_RELAXA_ADDR16)
2378 {
2379 /*----------------------------------------------------------------------*/
2380 /* Some insns have both a 16-bit address operand and an 8-bit
2381 variant if the address is within a special range:
2382
2383 Address 16-bit operand SADDR range SFR range
2384 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2385 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2386
2387 The RELAX_ADDR16[] array has the insn encodings for the
2388 16-bit operand version, as well as the SFR and SADDR
2389 variants. We only need to replace the encodings and
2390 adjust the operand.
2391
2392 Note: we intentionally do not attempt to decode and skip
2393 any ES: prefix, as adding ES: means the addr16 (likely)
2394 no longer points to saddr/sfr space.
2395 */
2396
2397 int is_sfr;
2398 int is_saddr;
2399 int idx;
2400 int poff;
2401
2402 GET_RELOC;
2403
9cea966c
DD		 2404 if (0xffe20 <= symval && symval <= 0xfffff)
2405 {
2406
2407 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2408 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2409
2410 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2411 {
2412 if (relax_addr16[idx].prefix != -1
2413 && insn[0] == relax_addr16[idx].prefix
2414 && insn[1] == relax_addr16[idx].insn)
2415 {
2416 poff = 1;
2417 }
2418 else if (relax_addr16[idx].prefix == -1
2419 && insn[0] == relax_addr16[idx].insn)
2420 {
2421 poff = 0;
2422 }
2423 else
2424 continue;
2425
2426 /* We have a matched insn, and poff is 0 or 1 depending
2427 on the base pattern size. */
2428
2429 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2430 {
2431 insn[poff] = relax_addr16[idx].insn_for_sfr;
2432 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2433 }
2434
2435 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2436 {
2437 insn[poff] = relax_addr16[idx].insn_for_saddr;
2438 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2439 }
68ffbac6 2440
9cea966c
DD		 2441 }
2442 }
2443 }
2444
2445 /*----------------------------------------------------------------------*/
2446
2447 }
2448
2449 return TRUE;
2450
2451 error_return:
2452 if (free_relocs != NULL)
2453 free (free_relocs);
2454
2455 if (free_contents != NULL)
2456 free (free_contents);
2457
2458 if (shndx_buf != NULL)
2459 {
2460 shndx_hdr->contents = NULL;
2461 free (shndx_buf);
2462 }
2463
2464 if (free_intsyms != NULL)
2465 free (free_intsyms);
2466
99c513f6
DD		 2467 return TRUE;
2468}
2469
2470\f
2471
2472#define ELF_ARCH bfd_arch_rl78
2473#define ELF_MACHINE_CODE EM_RL78
2474#define ELF_MAXPAGESIZE 0x1000
2475
2476#define TARGET_LITTLE_SYM bfd_elf32_rl78_vec
2477#define TARGET_LITTLE_NAME "elf32-rl78"
2478
2479#define elf_info_to_howto_rel NULL
2480#define elf_info_to_howto rl78_info_to_howto_rela
2481#define elf_backend_object_p rl78_elf_object_p
2482#define elf_backend_relocate_section rl78_elf_relocate_section
2483#define elf_symbol_leading_char ('_')
2484#define elf_backend_can_gc_sections 1
2485
2486#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2487#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2488#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2489#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2490#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2491
2492#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2493#define elf_backend_check_relocs rl78_elf_check_relocs
2494#define elf_backend_always_size_sections \
2495 rl78_elf_always_size_sections
2496#define elf_backend_finish_dynamic_sections \
2497 rl78_elf_finish_dynamic_sections
2498
2499#include "elf32-target.h"
GDB Binutils - Deliverables
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