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ChangeLog rotatation and copyright year update
[deliverable/binutils-gdb.git] / bfd / elf32-rl78.c
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99c513f6 1/* Renesas RL78 specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2011-2015 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
22#include "bfd_stdint.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rl78.h"
26#include "libiberty.h"
27
28#define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000)
29
30#define RL78REL(n,sz,bit,shift,complain,pcrel) \
31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
32 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE)
33
34/* Note that the relocations around 0x7f are internal to this file;
35 feel free to move them as needed to avoid conflicts with published
36 relocation numbers. */
37
38static reloc_howto_type rl78_elf_howto_table [] =
39{
40 RL78REL (NONE, 0, 0, 0, dont, FALSE),
41 RL78REL (DIR32, 2, 32, 0, signed, FALSE),
42 RL78REL (DIR24S, 2, 24, 0, signed, FALSE),
43 RL78REL (DIR16, 1, 16, 0, dont, FALSE),
44 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE),
45 RL78REL (DIR16S, 1, 16, 0, signed, FALSE),
46 RL78REL (DIR8, 0, 8, 0, dont, FALSE),
47 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE),
48 RL78REL (DIR8S, 0, 8, 0, signed, FALSE),
49 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
50 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
51 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
52 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE),
53 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE),
54 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE),
55 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE),
56 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE),
57 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE),
58 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
59
60 EMPTY_HOWTO (0x13),
61 EMPTY_HOWTO (0x14),
62 EMPTY_HOWTO (0x15),
63 EMPTY_HOWTO (0x16),
64 EMPTY_HOWTO (0x17),
65 EMPTY_HOWTO (0x18),
66 EMPTY_HOWTO (0x19),
67 EMPTY_HOWTO (0x1a),
68 EMPTY_HOWTO (0x1b),
69 EMPTY_HOWTO (0x1c),
70 EMPTY_HOWTO (0x1d),
71 EMPTY_HOWTO (0x1e),
72 EMPTY_HOWTO (0x1f),
73
74 EMPTY_HOWTO (0x20),
75 EMPTY_HOWTO (0x21),
76 EMPTY_HOWTO (0x22),
77 EMPTY_HOWTO (0x23),
78 EMPTY_HOWTO (0x24),
79 EMPTY_HOWTO (0x25),
80 EMPTY_HOWTO (0x26),
81 EMPTY_HOWTO (0x27),
82 EMPTY_HOWTO (0x28),
83 EMPTY_HOWTO (0x29),
84 EMPTY_HOWTO (0x2a),
85 EMPTY_HOWTO (0x2b),
86 EMPTY_HOWTO (0x2c),
9cea966c 87 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE),
99c513f6
DD		 88
89 EMPTY_HOWTO (0x2e),
90 EMPTY_HOWTO (0x2f),
91 EMPTY_HOWTO (0x30),
92 EMPTY_HOWTO (0x31),
93 EMPTY_HOWTO (0x32),
94 EMPTY_HOWTO (0x33),
95 EMPTY_HOWTO (0x34),
96 EMPTY_HOWTO (0x35),
97 EMPTY_HOWTO (0x36),
98 EMPTY_HOWTO (0x37),
99 EMPTY_HOWTO (0x38),
100 EMPTY_HOWTO (0x39),
101 EMPTY_HOWTO (0x3a),
102 EMPTY_HOWTO (0x3b),
103 EMPTY_HOWTO (0x3c),
104 EMPTY_HOWTO (0x3d),
105 EMPTY_HOWTO (0x3e),
106 EMPTY_HOWTO (0x3f),
107 EMPTY_HOWTO (0x40),
108
109 RL78REL (ABS32, 2, 32, 0, dont, FALSE),
110 RL78REL (ABS24S, 2, 24, 0, signed, FALSE),
111 RL78REL (ABS16, 1, 16, 0, dont, FALSE),
112 RL78REL (ABS16U, 1, 16, 0, unsigned, FALSE),
113 RL78REL (ABS16S, 1, 16, 0, signed, FALSE),
114 RL78REL (ABS8, 0, 8, 0, dont, FALSE),
115 RL78REL (ABS8U, 0, 8, 0, unsigned, FALSE),
116 RL78REL (ABS8S, 0, 8, 0, signed, FALSE),
117 RL78REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
118 RL78REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
119 RL78REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
120 RL78REL (ABS16UL, 1, 16, 0, unsigned, FALSE),
121 RL78REL (ABS16UW, 1, 16, 0, unsigned, FALSE),
122 RL78REL (ABS8UL, 0, 8, 0, unsigned, FALSE),
123 RL78REL (ABS8UW, 0, 8, 0, unsigned, FALSE),
124 RL78REL (ABS32_REV, 2, 32, 0, dont, FALSE),
125 RL78REL (ABS16_REV, 1, 16, 0, dont, FALSE),
126
127#define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32)
128
129 EMPTY_HOWTO (0x52),
130 EMPTY_HOWTO (0x53),
131 EMPTY_HOWTO (0x54),
132 EMPTY_HOWTO (0x55),
133 EMPTY_HOWTO (0x56),
134 EMPTY_HOWTO (0x57),
135 EMPTY_HOWTO (0x58),
136 EMPTY_HOWTO (0x59),
137 EMPTY_HOWTO (0x5a),
138 EMPTY_HOWTO (0x5b),
139 EMPTY_HOWTO (0x5c),
140 EMPTY_HOWTO (0x5d),
141 EMPTY_HOWTO (0x5e),
142 EMPTY_HOWTO (0x5f),
143 EMPTY_HOWTO (0x60),
144 EMPTY_HOWTO (0x61),
145 EMPTY_HOWTO (0x62),
146 EMPTY_HOWTO (0x63),
147 EMPTY_HOWTO (0x64),
148 EMPTY_HOWTO (0x65),
149 EMPTY_HOWTO (0x66),
150 EMPTY_HOWTO (0x67),
151 EMPTY_HOWTO (0x68),
152 EMPTY_HOWTO (0x69),
153 EMPTY_HOWTO (0x6a),
154 EMPTY_HOWTO (0x6b),
155 EMPTY_HOWTO (0x6c),
156 EMPTY_HOWTO (0x6d),
157 EMPTY_HOWTO (0x6e),
158 EMPTY_HOWTO (0x6f),
159 EMPTY_HOWTO (0x70),
160 EMPTY_HOWTO (0x71),
161 EMPTY_HOWTO (0x72),
162 EMPTY_HOWTO (0x73),
163 EMPTY_HOWTO (0x74),
164 EMPTY_HOWTO (0x75),
165 EMPTY_HOWTO (0x76),
166 EMPTY_HOWTO (0x77),
167
168 EMPTY_HOWTO (0x78),
169 EMPTY_HOWTO (0x79),
170 EMPTY_HOWTO (0x7a),
171 EMPTY_HOWTO (0x7b),
172 EMPTY_HOWTO (0x7c),
173 EMPTY_HOWTO (0x7d),
174 EMPTY_HOWTO (0x7e),
175 EMPTY_HOWTO (0x7f),
176
177 RL78REL (SYM, 2, 32, 0, dont, FALSE),
178 RL78REL (OPneg, 2, 32, 0, dont, FALSE),
179 RL78REL (OPadd, 2, 32, 0, dont, FALSE),
180 RL78REL (OPsub, 2, 32, 0, dont, FALSE),
181 RL78REL (OPmul, 2, 32, 0, dont, FALSE),
182 RL78REL (OPdiv, 2, 32, 0, dont, FALSE),
183 RL78REL (OPshla, 2, 32, 0, dont, FALSE),
184 RL78REL (OPshra, 2, 32, 0, dont, FALSE),
185 RL78REL (OPsctsize, 2, 32, 0, dont, FALSE),
186 EMPTY_HOWTO (0x89),
187 EMPTY_HOWTO (0x8a),
188 EMPTY_HOWTO (0x8b),
189 EMPTY_HOWTO (0x8c),
190 RL78REL (OPscttop, 2, 32, 0, dont, FALSE),
191 EMPTY_HOWTO (0x8e),
192 EMPTY_HOWTO (0x8f),
193 RL78REL (OPand, 2, 32, 0, dont, FALSE),
194 RL78REL (OPor, 2, 32, 0, dont, FALSE),
195 RL78REL (OPxor, 2, 32, 0, dont, FALSE),
196 RL78REL (OPnot, 2, 32, 0, dont, FALSE),
197 RL78REL (OPmod, 2, 32, 0, dont, FALSE),
198 RL78REL (OPromtop, 2, 32, 0, dont, FALSE),
199 RL78REL (OPramtop, 2, 32, 0, dont, FALSE)
200};
201\f
202/* Map BFD reloc types to RL78 ELF reloc types. */
203
204struct rl78_reloc_map
205{
206 bfd_reloc_code_real_type bfd_reloc_val;
207 unsigned int rl78_reloc_val;
208};
209
210static const struct rl78_reloc_map rl78_reloc_map [] =
211{
212 { BFD_RELOC_NONE, R_RL78_NONE },
213 { BFD_RELOC_8, R_RL78_DIR8S },
214 { BFD_RELOC_16, R_RL78_DIR16S },
215 { BFD_RELOC_24, R_RL78_DIR24S },
216 { BFD_RELOC_32, R_RL78_DIR32 },
217 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 },
218 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL },
219 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL },
220 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL },
221 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL },
222 { BFD_RELOC_RL78_8U, R_RL78_DIR8U },
223 { BFD_RELOC_RL78_16U, R_RL78_DIR16U },
224 { BFD_RELOC_RL78_SYM, R_RL78_SYM },
225 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub },
226 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg },
227 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand },
228 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra },
229 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 },
230 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 },
231 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV },
232 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 },
233 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV },
234 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL },
235 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW },
9cea966c
DD		 236 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U },
237 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX }
99c513f6
DD		 238};
239
240static reloc_howto_type *
241rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
242 bfd_reloc_code_real_type code)
243{
244 unsigned int i;
245
246 if (code == BFD_RELOC_RL78_32_OP)
247 return rl78_elf_howto_table + R_RL78_DIR32;
248
249 for (i = ARRAY_SIZE (rl78_reloc_map); --i;)
250 if (rl78_reloc_map [i].bfd_reloc_val == code)
251 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val;
252
253 return NULL;
254}
255
256static reloc_howto_type *
257rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
258{
259 unsigned int i;
260
261 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++)
262 if (rl78_elf_howto_table[i].name != NULL
263 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0)
264 return rl78_elf_howto_table + i;
265
266 return NULL;
267}
268
269/* Set the howto pointer for an RL78 ELF reloc. */
270
271static void
272rl78_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
273 arelent * cache_ptr,
274 Elf_Internal_Rela * dst)
275{
276 unsigned int r_type;
277
278 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 279 if (r_type >= (unsigned int) R_RL78_max)
280 {
281 _bfd_error_handler (_("%A: invalid RL78 reloc number: %d"), abfd, r_type);
282 r_type = 0;
283 }
99c513f6
DD		 284 cache_ptr->howto = rl78_elf_howto_table + r_type;
285}
286\f
287static bfd_vma
288get_symbol_value (const char * name,
289 bfd_reloc_status_type * status,
290 struct bfd_link_info * info,
291 bfd * input_bfd,
292 asection * input_section,
293 int offset)
294{
295 bfd_vma value = 0;
296 struct bfd_link_hash_entry * h;
297
298 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
299
300 if (h == NULL
301 || (h->type != bfd_link_hash_defined
302 && h->type != bfd_link_hash_defweak))
303 * status = info->callbacks->undefined_symbol
304 (info, name, input_bfd, input_section, offset, TRUE);
305 else
306 value = (h->u.def.value
307 + h->u.def.section->output_section->vma
308 + h->u.def.section->output_offset);
309
310 return value;
311}
312
313static bfd_vma
314get_romstart (bfd_reloc_status_type * status,
315 struct bfd_link_info * info,
316 bfd * abfd,
317 asection * sec,
318 int offset)
319{
320 static bfd_boolean cached = FALSE;
321 static bfd_vma cached_value = 0;
322
323 if (!cached)
324 {
325 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
326 cached = TRUE;
327 }
328 return cached_value;
329}
330
331static bfd_vma
332get_ramstart (bfd_reloc_status_type * status,
333 struct bfd_link_info * info,
334 bfd * abfd,
335 asection * sec,
336 int offset)
337{
338 static bfd_boolean cached = FALSE;
339 static bfd_vma cached_value = 0;
340
341 if (!cached)
342 {
343 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
344 cached = TRUE;
345 }
346 return cached_value;
347}
348
349#define NUM_STACK_ENTRIES 16
350static int32_t rl78_stack [ NUM_STACK_ENTRIES ];
351static unsigned int rl78_stack_top;
352
353#define RL78_STACK_PUSH(val) \
354 do \
355 { \
356 if (rl78_stack_top < NUM_STACK_ENTRIES) \
357 rl78_stack [rl78_stack_top ++] = (val); \
358 else \
359 r = bfd_reloc_dangerous; \
360 } \
361 while (0)
362
363#define RL78_STACK_POP(dest) \
364 do \
365 { \
366 if (rl78_stack_top > 0) \
367 (dest) = rl78_stack [-- rl78_stack_top]; \
368 else \
369 (dest) = 0, r = bfd_reloc_dangerous; \
370 } \
371 while (0)
372
373/* Relocate an RL78 ELF section.
374 There is some attempt to make this function usable for many architectures,
375 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
376 if only to serve as a learning tool.
377
378 The RELOCATE_SECTION function is called by the new ELF backend linker
379 to handle the relocations for a section.
380
381 The relocs are always passed as Rela structures; if the section
382 actually uses Rel structures, the r_addend field will always be
383 zero.
384
385 This function is responsible for adjusting the section contents as
386 necessary, and (if using Rela relocs and generating a relocatable
387 output file) adjusting the reloc addend as necessary.
388
389 This function does not have to worry about setting the reloc
390 address or the reloc symbol index.
391
392 LOCAL_SYMS is a pointer to the swapped in local symbols.
393
394 LOCAL_SECTIONS is an array giving the section in the input file
395 corresponding to the st_shndx field of each local symbol.
396
397 The global hash table entry for the global symbols can be found
398 via elf_sym_hashes (input_bfd).
399
400 When generating relocatable output, this function must handle
401 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
402 going to be the section symbol corresponding to the output
403 section, which means that the addend must be adjusted
404 accordingly. */
405
406static bfd_boolean
407rl78_elf_relocate_section
408 (bfd * output_bfd,
409 struct bfd_link_info * info,
410 bfd * input_bfd,
411 asection * input_section,
412 bfd_byte * contents,
413 Elf_Internal_Rela * relocs,
414 Elf_Internal_Sym * local_syms,
415 asection ** local_sections)
416{
417 Elf_Internal_Shdr * symtab_hdr;
418 struct elf_link_hash_entry ** sym_hashes;
419 Elf_Internal_Rela * rel;
420 Elf_Internal_Rela * relend;
421 bfd *dynobj;
422 asection *splt;
423
424 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
425 sym_hashes = elf_sym_hashes (input_bfd);
426 relend = relocs + input_section->reloc_count;
427
428 dynobj = elf_hash_table (info)->dynobj;
429 splt = NULL;
430 if (dynobj != NULL)
3d4d4302 431 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 432
433 for (rel = relocs; rel < relend; rel ++)
434 {
435 reloc_howto_type * howto;
436 unsigned long r_symndx;
437 Elf_Internal_Sym * sym;
438 asection * sec;
439 struct elf_link_hash_entry * h;
440 bfd_vma relocation;
441 bfd_reloc_status_type r;
442 const char * name = NULL;
443 bfd_boolean unresolved_reloc = TRUE;
444 int r_type;
445
446 r_type = ELF32_R_TYPE (rel->r_info);
447 r_symndx = ELF32_R_SYM (rel->r_info);
448
449 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info);
450 h = NULL;
451 sym = NULL;
452 sec = NULL;
453 relocation = 0;
454
455 if (r_symndx < symtab_hdr->sh_info)
456 {
457 sym = local_syms + r_symndx;
458 sec = local_sections [r_symndx];
459 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
460
461 name = bfd_elf_string_from_elf_section
462 (input_bfd, symtab_hdr->sh_link, sym->st_name);
463 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
464 }
465 else
466 {
62d887d4
L		 467 bfd_boolean warned ATTRIBUTE_UNUSED;
468 bfd_boolean ignored ATTRIBUTE_UNUSED;
99c513f6
DD		 469
470 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
471 r_symndx, symtab_hdr, sym_hashes, h,
472 sec, relocation, unresolved_reloc,
62d887d4 473 warned, ignored);
99c513f6
DD		 474
475 name = h->root.root.string;
476 }
477
dbaa2011 478 if (sec != NULL && discarded_section (sec))
99c513f6 479 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 480 rel, 1, relend, howto, 0, contents);
99c513f6
DD		 481
482 if (info->relocatable)
483 {
484 /* This is a relocatable link. We don't have to change
485 anything, unless the reloc is against a section symbol,
486 in which case we have to adjust according to where the
487 section symbol winds up in the output section. */
488 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
489 rel->r_addend += sec->output_offset;
490 continue;
491 }
492
493 switch (ELF32_R_TYPE (rel->r_info))
494 {
495 case R_RL78_DIR16S:
496 {
497 bfd_vma *plt_offset;
498
499 if (h != NULL)
500 plt_offset = &h->plt.offset;
501 else
502 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx;
503
9cea966c 504 if (! valid_16bit_address (relocation))
99c513f6 505 {
99c513f6
DD		 506 /* If this is the first time we've processed this symbol,
507 fill in the plt entry with the correct symbol address. */
508 if ((*plt_offset & 1) == 0)
509 {
510 unsigned int x;
511
512 x = 0x000000ec; /* br !!abs24 */
513 x |= (relocation << 8) & 0xffffff00;
514 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset);
515 *plt_offset |= 1;
516 }
517
518 relocation = (splt->output_section->vma
519 + splt->output_offset
520 + (*plt_offset & -2));
521 if (name)
522 {
523 char *newname = bfd_malloc (strlen(name)+5);
524 strcpy (newname, name);
525 strcat(newname, ".plt");
526 _bfd_generic_link_add_one_symbol (info,
527 input_bfd,
528 newname,
529 BSF_FUNCTION | BSF_WEAK,
530 splt,
531 (*plt_offset & -2),
532 0,
533 1,
534 0,
535 0);
536 }
537 }
538 }
539 break;
540 }
541
542 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
543 /* If the symbol is undefined and weak
544 then the relocation resolves to zero. */
545 relocation = 0;
546 else
547 {
548 if (howto->pc_relative)
549 {
550 relocation -= (input_section->output_section->vma
551 + input_section->output_offset
552 + rel->r_offset);
553 relocation -= bfd_get_reloc_size (howto);
554 }
555
556 relocation += rel->r_addend;
557 }
558
559 r = bfd_reloc_ok;
560
561#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
562#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
563#define OP(i) (contents[rel->r_offset + (i)])
564
565 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
566 switch (r_type)
567 {
568 case R_RL78_NONE:
569 break;
570
9cea966c
DD		 571 case R_RL78_RH_RELAX:
572 break;
573
99c513f6
DD		 574 case R_RL78_DIR8S_PCREL:
575 RANGE (-128, 127);
576 OP (0) = relocation;
577 break;
578
579 case R_RL78_DIR8S:
580 RANGE (-128, 255);
581 OP (0) = relocation;
582 break;
583
584 case R_RL78_DIR8U:
585 RANGE (0, 255);
586 OP (0) = relocation;
587 break;
588
589 case R_RL78_DIR16S_PCREL:
590 RANGE (-32768, 32767);
591 OP (0) = relocation;
592 OP (1) = relocation >> 8;
593 break;
594
595 case R_RL78_DIR16S:
596 if ((relocation & 0xf0000) == 0xf0000)
597 relocation &= 0xffff;
598 RANGE (-32768, 65535);
599 OP (0) = relocation;
600 OP (1) = relocation >> 8;
601 break;
602
603 case R_RL78_DIR16U:
604 RANGE (0, 65536);
605 OP (0) = relocation;
606 OP (1) = relocation >> 8;
607 break;
608
609 case R_RL78_DIR16:
610 RANGE (-32768, 65536);
611 OP (0) = relocation;
612 OP (1) = relocation >> 8;
613 break;
614
615 case R_RL78_DIR16_REV:
616 RANGE (-32768, 65536);
617 OP (1) = relocation;
618 OP (0) = relocation >> 8;
619 break;
620
621 case R_RL78_DIR3U_PCREL:
622 RANGE (3, 10);
623 OP (0) &= 0xf8;
624 OP (0) |= relocation & 0x07;
625 break;
626
627 case R_RL78_DIR24S_PCREL:
628 RANGE (-0x800000, 0x7fffff);
629 OP (0) = relocation;
630 OP (1) = relocation >> 8;
631 OP (2) = relocation >> 16;
632 break;
633
634 case R_RL78_DIR24S:
635 RANGE (-0x800000, 0x7fffff);
636 OP (0) = relocation;
637 OP (1) = relocation >> 8;
638 OP (2) = relocation >> 16;
639 break;
640
641 case R_RL78_DIR32:
642 OP (0) = relocation;
643 OP (1) = relocation >> 8;
644 OP (2) = relocation >> 16;
645 OP (3) = relocation >> 24;
646 break;
647
648 case R_RL78_DIR32_REV:
649 OP (3) = relocation;
650 OP (2) = relocation >> 8;
651 OP (1) = relocation >> 16;
652 OP (0) = relocation >> 24;
653 break;
654
9cea966c 655 case R_RL78_RH_SFR:
9cea966c
DD		 656 RANGE (0xfff00, 0xfffff);
657 OP (0) = relocation & 0xff;
658 break;
659
660 case R_RL78_RH_SADDR:
9cea966c
DD		 661 RANGE (0xffe20, 0xfff1f);
662 OP (0) = relocation & 0xff;
9cea966c
DD		 663 break;
664
99c513f6
DD		 665 /* Complex reloc handling: */
666
667 case R_RL78_ABS32:
668 RL78_STACK_POP (relocation);
669 OP (0) = relocation;
670 OP (1) = relocation >> 8;
671 OP (2) = relocation >> 16;
672 OP (3) = relocation >> 24;
673 break;
674
675 case R_RL78_ABS32_REV:
676 RL78_STACK_POP (relocation);
677 OP (3) = relocation;
678 OP (2) = relocation >> 8;
679 OP (1) = relocation >> 16;
680 OP (0) = relocation >> 24;
681 break;
682
683 case R_RL78_ABS24S_PCREL:
684 case R_RL78_ABS24S:
685 RL78_STACK_POP (relocation);
686 RANGE (-0x800000, 0x7fffff);
687 OP (0) = relocation;
688 OP (1) = relocation >> 8;
689 OP (2) = relocation >> 16;
690 break;
691
692 case R_RL78_ABS16:
693 RL78_STACK_POP (relocation);
694 RANGE (-32768, 65535);
695 OP (0) = relocation;
696 OP (1) = relocation >> 8;
697 break;
698
699 case R_RL78_ABS16_REV:
700 RL78_STACK_POP (relocation);
701 RANGE (-32768, 65535);
702 OP (1) = relocation;
703 OP (0) = relocation >> 8;
704 break;
705
706 case R_RL78_ABS16S_PCREL:
707 case R_RL78_ABS16S:
708 RL78_STACK_POP (relocation);
709 RANGE (-32768, 32767);
710 OP (0) = relocation;
711 OP (1) = relocation >> 8;
712 break;
713
714 case R_RL78_ABS16U:
715 RL78_STACK_POP (relocation);
716 RANGE (0, 65536);
717 OP (0) = relocation;
718 OP (1) = relocation >> 8;
719 break;
720
721 case R_RL78_ABS16UL:
722 RL78_STACK_POP (relocation);
723 relocation >>= 2;
724 RANGE (0, 65536);
725 OP (0) = relocation;
726 OP (1) = relocation >> 8;
727 break;
728
729 case R_RL78_ABS16UW:
730 RL78_STACK_POP (relocation);
731 relocation >>= 1;
732 RANGE (0, 65536);
733 OP (0) = relocation;
734 OP (1) = relocation >> 8;
735 break;
736
737 case R_RL78_ABS8:
738 RL78_STACK_POP (relocation);
739 RANGE (-128, 255);
740 OP (0) = relocation;
741 break;
742
743 case R_RL78_ABS8U:
744 RL78_STACK_POP (relocation);
745 RANGE (0, 255);
746 OP (0) = relocation;
747 break;
748
749 case R_RL78_ABS8UL:
750 RL78_STACK_POP (relocation);
751 relocation >>= 2;
752 RANGE (0, 255);
753 OP (0) = relocation;
754 break;
755
756 case R_RL78_ABS8UW:
757 RL78_STACK_POP (relocation);
758 relocation >>= 1;
759 RANGE (0, 255);
760 OP (0) = relocation;
761 break;
762
763 case R_RL78_ABS8S_PCREL:
764 case R_RL78_ABS8S:
765 RL78_STACK_POP (relocation);
766 RANGE (-128, 127);
767 OP (0) = relocation;
768 break;
769
770 case R_RL78_SYM:
771 if (r_symndx < symtab_hdr->sh_info)
772 RL78_STACK_PUSH (sec->output_section->vma
773 + sec->output_offset
774 + sym->st_value
775 + rel->r_addend);
776 else
777 {
778 if (h != NULL
779 && (h->root.type == bfd_link_hash_defined
780 || h->root.type == bfd_link_hash_defweak))
781 RL78_STACK_PUSH (h->root.u.def.value
782 + sec->output_section->vma
783 + sec->output_offset
784 + rel->r_addend);
4107ae22
DD		 785 else if (h->root.type == bfd_link_hash_undefweak)
786 RL78_STACK_PUSH (0);
99c513f6
DD		 787 else
788 _bfd_error_handler (_("Warning: RL78_SYM reloc with an unknown symbol"));
789 }
790 break;
791
792 case R_RL78_OPneg:
793 {
794 int32_t tmp;
795
796 RL78_STACK_POP (tmp);
797 tmp = - tmp;
798 RL78_STACK_PUSH (tmp);
799 }
800 break;
801
802 case R_RL78_OPadd:
803 {
804 int32_t tmp1, tmp2;
805
806 RL78_STACK_POP (tmp2);
807 RL78_STACK_POP (tmp1);
808 tmp1 += tmp2;
809 RL78_STACK_PUSH (tmp1);
810 }
811 break;
812
813 case R_RL78_OPsub:
814 {
815 int32_t tmp1, tmp2;
816
34064ff3
DD		 817 /* For the expression "A - B", the assembler pushes A,
818 then B, then OPSUB. So the first op we pop is B, not
819 A. */
820 RL78_STACK_POP (tmp2); /* B */
821 RL78_STACK_POP (tmp1); /* A */
822 tmp1 -= tmp2; /* A - B */
823 RL78_STACK_PUSH (tmp1);
99c513f6
DD		 824 }
825 break;
826
827 case R_RL78_OPmul:
828 {
829 int32_t tmp1, tmp2;
830
831 RL78_STACK_POP (tmp2);
832 RL78_STACK_POP (tmp1);
833 tmp1 *= tmp2;
834 RL78_STACK_PUSH (tmp1);
835 }
836 break;
837
838 case R_RL78_OPdiv:
839 {
840 int32_t tmp1, tmp2;
841
842 RL78_STACK_POP (tmp2);
843 RL78_STACK_POP (tmp1);
844 tmp1 /= tmp2;
845 RL78_STACK_PUSH (tmp1);
846 }
847 break;
848
849 case R_RL78_OPshla:
850 {
851 int32_t tmp1, tmp2;
852
853 RL78_STACK_POP (tmp2);
854 RL78_STACK_POP (tmp1);
855 tmp1 <<= tmp2;
856 RL78_STACK_PUSH (tmp1);
857 }
858 break;
859
860 case R_RL78_OPshra:
861 {
862 int32_t tmp1, tmp2;
863
864 RL78_STACK_POP (tmp2);
865 RL78_STACK_POP (tmp1);
866 tmp1 >>= tmp2;
867 RL78_STACK_PUSH (tmp1);
868 }
869 break;
870
871 case R_RL78_OPsctsize:
872 RL78_STACK_PUSH (input_section->size);
873 break;
874
875 case R_RL78_OPscttop:
876 RL78_STACK_PUSH (input_section->output_section->vma);
877 break;
878
879 case R_RL78_OPand:
880 {
881 int32_t tmp1, tmp2;
882
883 RL78_STACK_POP (tmp2);
884 RL78_STACK_POP (tmp1);
885 tmp1 &= tmp2;
886 RL78_STACK_PUSH (tmp1);
887 }
888 break;
889
890 case R_RL78_OPor:
891 {
892 int32_t tmp1, tmp2;
893
894 RL78_STACK_POP (tmp2);
895 RL78_STACK_POP (tmp1);
896 tmp1 |= tmp2;
897 RL78_STACK_PUSH (tmp1);
898 }
899 break;
900
901 case R_RL78_OPxor:
902 {
903 int32_t tmp1, tmp2;
904
905 RL78_STACK_POP (tmp2);
906 RL78_STACK_POP (tmp1);
907 tmp1 ^= tmp2;
908 RL78_STACK_PUSH (tmp1);
909 }
910 break;
911
912 case R_RL78_OPnot:
913 {
914 int32_t tmp;
915
916 RL78_STACK_POP (tmp);
917 tmp = ~ tmp;
918 RL78_STACK_PUSH (tmp);
919 }
920 break;
921
922 case R_RL78_OPmod:
923 {
924 int32_t tmp1, tmp2;
925
926 RL78_STACK_POP (tmp2);
927 RL78_STACK_POP (tmp1);
928 tmp1 %= tmp2;
929 RL78_STACK_PUSH (tmp1);
930 }
931 break;
932
933 case R_RL78_OPromtop:
934 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
935 break;
936
937 case R_RL78_OPramtop:
938 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
939 break;
940
941 default:
942 r = bfd_reloc_notsupported;
943 break;
944 }
945
946 if (r != bfd_reloc_ok)
947 {
948 const char * msg = NULL;
949
950 switch (r)
951 {
952 case bfd_reloc_overflow:
953 /* Catch the case of a missing function declaration
954 and emit a more helpful error message. */
955 if (r_type == R_RL78_DIR24S_PCREL)
956 msg = _("%B(%A): error: call to undefined function '%s'");
957 else
958 r = info->callbacks->reloc_overflow
959 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
960 input_bfd, input_section, rel->r_offset);
961 break;
962
963 case bfd_reloc_undefined:
964 r = info->callbacks->undefined_symbol
965 (info, name, input_bfd, input_section, rel->r_offset,
966 TRUE);
967 break;
968
969 case bfd_reloc_other:
970 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
971 break;
972
973 case bfd_reloc_outofrange:
974 msg = _("%B(%A): internal error: out of range error");
975 break;
976
977 case bfd_reloc_notsupported:
978 msg = _("%B(%A): internal error: unsupported relocation error");
979 break;
980
981 case bfd_reloc_dangerous:
982 msg = _("%B(%A): internal error: dangerous relocation");
983 break;
984
985 default:
986 msg = _("%B(%A): internal error: unknown error");
987 break;
988 }
989
990 if (msg)
991 _bfd_error_handler (msg, input_bfd, input_section, name);
992
993 if (! r)
994 return FALSE;
995 }
996 }
997
998 return TRUE;
999}
1000\f
1001/* Function to set the ELF flag bits. */
1002
1003static bfd_boolean
1004rl78_elf_set_private_flags (bfd * abfd, flagword flags)
1005{
1006 elf_elfheader (abfd)->e_flags = flags;
1007 elf_flags_init (abfd) = TRUE;
1008 return TRUE;
1009}
1010
1011static bfd_boolean no_warn_mismatch = FALSE;
1012
1013void bfd_elf32_rl78_set_target_flags (bfd_boolean);
1014
1015void
1016bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch)
1017{
1018 no_warn_mismatch = user_no_warn_mismatch;
1019}
1020
1021/* Merge backend specific data from an object file to the output
1022 object file when linking. */
1023
1024static bfd_boolean
1025rl78_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
1026{
99c513f6 1027 flagword new_flags;
4046d87a 1028 flagword old_flags;
99c513f6
DD		 1029 bfd_boolean error = FALSE;
1030
1031 new_flags = elf_elfheader (ibfd)->e_flags;
4046d87a 1032 old_flags = elf_elfheader (obfd)->e_flags;
99c513f6
DD		 1033
1034 if (!elf_flags_init (obfd))
1035 {
1036 /* First call, no flags set. */
1037 elf_flags_init (obfd) = TRUE;
1038 elf_elfheader (obfd)->e_flags = new_flags;
1039 }
4046d87a
NC		 1040 else if (old_flags != new_flags)
1041 {
1042 flagword changed_flags = old_flags ^ new_flags;
1043
1044 if (changed_flags & E_FLAG_RL78_G10)
1045 {
1046 (*_bfd_error_handler)
1047 (_("RL78/G10 ABI conflict: cannot link G10 and non-G10 objects together"));
1048
1049 if (old_flags & E_FLAG_RL78_G10)
1050 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1051 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1052 else
1053 (*_bfd_error_handler) (_("- %s is G10, %s is not"),
1054 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1055 }
856ea05c
KP		 1056
1057 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES)
1058 {
1059 (*_bfd_error_handler)
1060 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together"));
1061
1062 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES)
1063 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1064 bfd_get_filename (obfd), bfd_get_filename (ibfd));
1065 else
1066 (*_bfd_error_handler) (_("- %s is 64-bit, %s is not"),
1067 bfd_get_filename (ibfd), bfd_get_filename (obfd));
1068 }
4046d87a 1069 }
99c513f6
DD		 1070
1071 return !error;
1072}
1073\f
1074static bfd_boolean
1075rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr)
1076{
1077 FILE * file = (FILE *) ptr;
1078 flagword flags;
1079
1080 BFD_ASSERT (abfd != NULL && ptr != NULL);
1081
1082 /* Print normal ELF private data. */
1083 _bfd_elf_print_private_bfd_data (abfd, ptr);
1084
1085 flags = elf_elfheader (abfd)->e_flags;
1086 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
1087
4046d87a
NC		 1088 if (flags & E_FLAG_RL78_G10)
1089 fprintf (file, _(" [G10]"));
1090
856ea05c
KP		 1091 if (flags & E_FLAG_RL78_64BIT_DOUBLES)
1092 fprintf (file, _(" [64-bit doubles]"));
1093
99c513f6
DD		 1094 fputc ('\n', file);
1095 return TRUE;
1096}
1097
1098/* Return the MACH for an e_flags value. */
1099
1100static int
1101elf32_rl78_machine (bfd * abfd)
1102{
1103 if ((elf_elfheader (abfd)->e_flags & EF_RL78_CPU_MASK) == EF_RL78_CPU_RL78)
1104 return bfd_mach_rl78;
1105
1106 return 0;
1107}
1108
1109static bfd_boolean
1110rl78_elf_object_p (bfd * abfd)
1111{
1112 bfd_default_set_arch_mach (abfd, bfd_arch_rl78,
1113 elf32_rl78_machine (abfd));
1114 return TRUE;
1115}
99c513f6
DD		 1116\f
1117/* support PLT for 16-bit references to 24-bit functions. */
1118
1119/* We support 16-bit pointers to code above 64k by generating a thunk
1120 below 64k containing a JMP instruction to the final address. */
68ffbac6 1121
99c513f6
DD		 1122static bfd_boolean
1123rl78_elf_check_relocs
1124 (bfd * abfd,
1125 struct bfd_link_info * info,
1126 asection * sec,
1127 const Elf_Internal_Rela * relocs)
1128{
1129 Elf_Internal_Shdr * symtab_hdr;
1130 struct elf_link_hash_entry ** sym_hashes;
1131 const Elf_Internal_Rela * rel;
1132 const Elf_Internal_Rela * rel_end;
1133 bfd_vma *local_plt_offsets;
1134 asection *splt;
1135 bfd *dynobj;
1136
1137 if (info->relocatable)
1138 return TRUE;
68ffbac6 1139
99c513f6
DD		 1140 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1141 sym_hashes = elf_sym_hashes (abfd);
1142 local_plt_offsets = elf_local_got_offsets (abfd);
1143 splt = NULL;
1144 dynobj = elf_hash_table(info)->dynobj;
1145
1146 rel_end = relocs + sec->reloc_count;
1147 for (rel = relocs; rel < rel_end; rel++)
1148 {
1149 struct elf_link_hash_entry *h;
1150 unsigned long r_symndx;
1151 bfd_vma *offset;
68ffbac6 1152
99c513f6
DD		 1153 r_symndx = ELF32_R_SYM (rel->r_info);
1154 if (r_symndx < symtab_hdr->sh_info)
1155 h = NULL;
1156 else
1157 {
1158 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
1159 while (h->root.type == bfd_link_hash_indirect
1160 || h->root.type == bfd_link_hash_warning)
1161 h = (struct elf_link_hash_entry *) h->root.u.i.link;
81fbe831
AM		 1162
1163 /* PR15323, ref flags aren't set for references in the same
1164 object. */
1165 h->root.non_ir_ref = 1;
99c513f6 1166 }
68ffbac6 1167
99c513f6
DD		 1168 switch (ELF32_R_TYPE (rel->r_info))
1169 {
1170 /* This relocation describes a 16-bit pointer to a function.
1171 We may need to allocate a thunk in low memory; reserve memory
1172 for it now. */
1173 case R_RL78_DIR16S:
1174 if (dynobj == NULL)
1175 elf_hash_table (info)->dynobj = dynobj = abfd;
1176 if (splt == NULL)
1177 {
3d4d4302 1178 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1179 if (splt == NULL)
1180 {
1181 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS
1182 | SEC_IN_MEMORY | SEC_LINKER_CREATED
1183 | SEC_READONLY | SEC_CODE);
3d4d4302
AM		 1184 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt",
1185 flags);
99c513f6
DD		 1186 if (splt == NULL
1187 || ! bfd_set_section_alignment (dynobj, splt, 1))
1188 return FALSE;
1189 }
1190 }
1191
1192 if (h != NULL)
1193 offset = &h->plt.offset;
1194 else
1195 {
1196 if (local_plt_offsets == NULL)
1197 {
1198 size_t size;
1199 unsigned int i;
1200
1201 size = symtab_hdr->sh_info * sizeof (bfd_vma);
1202 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size);
1203 if (local_plt_offsets == NULL)
1204 return FALSE;
1205 elf_local_got_offsets (abfd) = local_plt_offsets;
1206
1207 for (i = 0; i < symtab_hdr->sh_info; i++)
1208 local_plt_offsets[i] = (bfd_vma) -1;
1209 }
1210 offset = &local_plt_offsets[r_symndx];
1211 }
1212
1213 if (*offset == (bfd_vma) -1)
1214 {
1215 *offset = splt->size;
1216 splt->size += 4;
1217 }
1218 break;
1219 }
1220 }
68ffbac6 1221
99c513f6
DD		 1222 return TRUE;
1223}
1224
1225/* This must exist if dynobj is ever set. */
1226
1227static bfd_boolean
1228rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED,
1229 struct bfd_link_info *info)
1230{
1231 bfd *dynobj;
1232 asection *splt;
1233
47fc0f1f
NC		 1234 if (!elf_hash_table (info)->dynamic_sections_created)
1235 return TRUE;
1236
9cea966c
DD		 1237 /* As an extra sanity check, verify that all plt entries have been
1238 filled in. However, relaxing might have changed the relocs so
1239 that some plt entries don't get filled in, so we have to skip
1240 this check if we're relaxing. Unfortunately, check_relocs is
1241 called before relaxation. */
99c513f6 1242
47fc0f1f
NC		 1243 if (info->relax_trip > 0)
1244 return TRUE;
1245
1246 if ((dynobj = elf_hash_table (info)->dynobj) != NULL
1247 && (splt = bfd_get_linker_section (dynobj, ".plt")) != NULL)
99c513f6 1248 {
47fc0f1f
NC		 1249 bfd_byte *contents = splt->contents;
1250 unsigned int i, size = splt->size;
1251
1252 for (i = 0; i < size; i += 4)
99c513f6 1253 {
47fc0f1f
NC		 1254 unsigned int x = bfd_get_32 (dynobj, contents + i);
1255 BFD_ASSERT (x != 0);
99c513f6
DD		 1256 }
1257 }
1258
1259 return TRUE;
1260}
1261
1262static bfd_boolean
1263rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED,
1264 struct bfd_link_info *info)
1265{
1266 bfd *dynobj;
1267 asection *splt;
1268
1269 if (info->relocatable)
1270 return TRUE;
1271
1272 dynobj = elf_hash_table (info)->dynobj;
1273 if (dynobj == NULL)
1274 return TRUE;
1275
3d4d4302 1276 splt = bfd_get_linker_section (dynobj, ".plt");
99c513f6
DD		 1277 BFD_ASSERT (splt != NULL);
1278
1279 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size);
1280 if (splt->contents == NULL)
1281 return FALSE;
1282
1283 return TRUE;
1284}
1285
1286\f
1287
1288/* Handle relaxing. */
1289
1290/* A subroutine of rl78_elf_relax_section. If the global symbol H
1291 is within the low 64k, remove any entry for it in the plt. */
1292
1293struct relax_plt_data
1294{
1295 asection *splt;
1296 bfd_boolean *again;
1297};
1298
1299static bfd_boolean
2c3fc389 1300rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1301{
1302 struct relax_plt_data *data = (struct relax_plt_data *) xdata;
1303
1304 if (h->plt.offset != (bfd_vma) -1)
1305 {
1306 bfd_vma address;
1307
1308 if (h->root.type == bfd_link_hash_undefined
1309 || h->root.type == bfd_link_hash_undefweak)
1310 address = 0;
1311 else
1312 address = (h->root.u.def.section->output_section->vma
1313 + h->root.u.def.section->output_offset
1314 + h->root.u.def.value);
1315
1316 if (valid_16bit_address (address))
1317 {
1318 h->plt.offset = -1;
1319 data->splt->size -= 4;
1320 *data->again = TRUE;
1321 }
1322 }
1323
1324 return TRUE;
1325}
1326
1327/* A subroutine of rl78_elf_relax_section. If the global symbol H
1328 previously had a plt entry, give it a new entry offset. */
1329
1330static bfd_boolean
2c3fc389 1331rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata)
99c513f6
DD		 1332{
1333 bfd_vma *entry = (bfd_vma *) xdata;
1334
1335 if (h->plt.offset != (bfd_vma) -1)
1336 {
1337 h->plt.offset = *entry;
1338 *entry += 4;
1339 }
1340
1341 return TRUE;
1342}
1343
1344static bfd_boolean
1345rl78_elf_relax_plt_section (bfd *dynobj,
1346 asection *splt,
1347 struct bfd_link_info *info,
1348 bfd_boolean *again)
1349{
1350 struct relax_plt_data relax_plt_data;
1351 bfd *ibfd;
1352
1353 /* Assume nothing changes. */
1354 *again = FALSE;
1355
1356 if (info->relocatable)
1357 return TRUE;
1358
1359 /* We only relax the .plt section at the moment. */
1360 if (dynobj != elf_hash_table (info)->dynobj
1361 || strcmp (splt->name, ".plt") != 0)
1362 return TRUE;
1363
1364 /* Quick check for an empty plt. */
1365 if (splt->size == 0)
1366 return TRUE;
1367
1368 /* Map across all global symbols; see which ones happen to
1369 fall in the low 64k. */
1370 relax_plt_data.splt = splt;
1371 relax_plt_data.again = again;
1372 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check,
1373 &relax_plt_data);
1374
1375 /* Likewise for local symbols, though that's somewhat less convenient
1376 as we have to walk the list of input bfds and swap in symbol data. */
c72f2fb2 1377 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1378 {
1379 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1380 Elf_Internal_Shdr *symtab_hdr;
1381 Elf_Internal_Sym *isymbuf = NULL;
1382 unsigned int idx;
1383
1384 if (! local_plt_offsets)
1385 continue;
1386
1387 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr;
1388 if (symtab_hdr->sh_info != 0)
1389 {
1390 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
1391 if (isymbuf == NULL)
1392 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr,
1393 symtab_hdr->sh_info, 0,
1394 NULL, NULL, NULL);
1395 if (isymbuf == NULL)
1396 return FALSE;
1397 }
1398
1399 for (idx = 0; idx < symtab_hdr->sh_info; ++idx)
1400 {
1401 Elf_Internal_Sym *isym;
1402 asection *tsec;
1403 bfd_vma address;
1404
1405 if (local_plt_offsets[idx] == (bfd_vma) -1)
1406 continue;
1407
1408 isym = &isymbuf[idx];
1409 if (isym->st_shndx == SHN_UNDEF)
1410 continue;
1411 else if (isym->st_shndx == SHN_ABS)
1412 tsec = bfd_abs_section_ptr;
1413 else if (isym->st_shndx == SHN_COMMON)
1414 tsec = bfd_com_section_ptr;
1415 else
1416 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx);
1417
1418 address = (tsec->output_section->vma
1419 + tsec->output_offset
1420 + isym->st_value);
1421 if (valid_16bit_address (address))
1422 {
1423 local_plt_offsets[idx] = -1;
1424 splt->size -= 4;
1425 *again = TRUE;
1426 }
1427 }
1428
1429 if (isymbuf != NULL
1430 && symtab_hdr->contents != (unsigned char *) isymbuf)
1431 {
1432 if (! info->keep_memory)
1433 free (isymbuf);
1434 else
1435 {
1436 /* Cache the symbols for elf_link_input_bfd. */
1437 symtab_hdr->contents = (unsigned char *) isymbuf;
1438 }
1439 }
1440 }
1441
1442 /* If we changed anything, walk the symbols again to reallocate
1443 .plt entry addresses. */
1444 if (*again && splt->size > 0)
1445 {
1446 bfd_vma entry = 0;
1447
1448 elf_link_hash_traverse (elf_hash_table (info),
1449 rl78_relax_plt_realloc, &entry);
1450
c72f2fb2 1451 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next)
99c513f6
DD		 1452 {
1453 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd);
1454 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info;
1455 unsigned int idx;
1456
1457 if (! local_plt_offsets)
1458 continue;
1459
1460 for (idx = 0; idx < nlocals; ++idx)
1461 if (local_plt_offsets[idx] != (bfd_vma) -1)
1462 {
1463 local_plt_offsets[idx] = entry;
1464 entry += 4;
1465 }
1466 }
1467 }
1468
1469 return TRUE;
1470}
1471
9cea966c
DD		 1472/* Delete some bytes from a section while relaxing. */
1473
1474static bfd_boolean
1475elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1476 Elf_Internal_Rela *alignment_rel, int force_snip)
1477{
1478 Elf_Internal_Shdr * symtab_hdr;
1479 unsigned int sec_shndx;
1480 bfd_byte * contents;
1481 Elf_Internal_Rela * irel;
1482 Elf_Internal_Rela * irelend;
1483 Elf_Internal_Sym * isym;
1484 Elf_Internal_Sym * isymend;
1485 bfd_vma toaddr;
1486 unsigned int symcount;
1487 struct elf_link_hash_entry ** sym_hashes;
1488 struct elf_link_hash_entry ** end_hashes;
1489
1490 if (!alignment_rel)
1491 force_snip = 1;
1492
1493 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1494
1495 contents = elf_section_data (sec)->this_hdr.contents;
1496
1497 /* The deletion must stop at the next alignment boundary, if
1498 ALIGNMENT_REL is non-NULL. */
1499 toaddr = sec->size;
1500 if (alignment_rel)
1501 toaddr = alignment_rel->r_offset;
1502
1503 irel = elf_section_data (sec)->relocs;
2bc56d66
DD		 1504 if (irel == NULL)
1505 {
1506 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE);
1507 irel = elf_section_data (sec)->relocs;
1508 }
1509
9cea966c
DD		 1510 irelend = irel + sec->reloc_count;
1511
1512 /* Actually delete the bytes. */
1513 memmove (contents + addr, contents + addr + count,
1514 (size_t) (toaddr - addr - count));
1515
1516 /* If we don't have an alignment marker to worry about, we can just
1517 shrink the section. Otherwise, we have to fill in the newly
1518 created gap with NOP insns (0x03). */
1519 if (force_snip)
1520 sec->size -= count;
1521 else
1522 memset (contents + toaddr - count, 0x03, count);
1523
1524 /* Adjust all the relocs. */
2bc56d66 1525 for (; irel && irel < irelend; irel++)
9cea966c
DD		 1526 {
1527 /* Get the new reloc address. */
1528 if (irel->r_offset > addr
1529 && (irel->r_offset < toaddr
1530 || (force_snip && irel->r_offset == toaddr)))
1531 irel->r_offset -= count;
1532
1533 /* If we see an ALIGN marker at the end of the gap, we move it
1534 to the beginning of the gap, since marking these gaps is what
1535 they're for. */
1536 if (irel->r_offset == toaddr
1537 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
1538 && irel->r_addend & RL78_RELAXA_ALIGN)
1539 irel->r_offset -= count;
1540 }
1541
1542 /* Adjust the local symbols defined in this section. */
1543 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1544 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1545 isymend = isym + symtab_hdr->sh_info;
1546
1547 for (; isym < isymend; isym++)
1548 {
1549 /* If the symbol is in the range of memory we just moved, we
1550 have to adjust its value. */
1551 if (isym->st_shndx == sec_shndx
1552 && isym->st_value > addr
1553 && isym->st_value < toaddr)
1554 isym->st_value -= count;
1555
1556 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1557 *end* is in the moved bytes but it's *start* isn't), then we
1558 must adjust its size. */
1559 if (isym->st_shndx == sec_shndx
1560 && isym->st_value < addr
1561 && isym->st_value + isym->st_size > addr
1562 && isym->st_value + isym->st_size < toaddr)
1563 isym->st_size -= count;
1564 }
1565
1566 /* Now adjust the global symbols defined in this section. */
1567 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1568 - symtab_hdr->sh_info);
1569 sym_hashes = elf_sym_hashes (abfd);
1570 end_hashes = sym_hashes + symcount;
1571
1572 for (; sym_hashes < end_hashes; sym_hashes++)
1573 {
1574 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1575
1576 if ((sym_hash->root.type == bfd_link_hash_defined
1577 || sym_hash->root.type == bfd_link_hash_defweak)
1578 && sym_hash->root.u.def.section == sec)
1579 {
1580 /* As above, adjust the value if needed. */
1581 if (sym_hash->root.u.def.value > addr
1582 && sym_hash->root.u.def.value < toaddr)
1583 sym_hash->root.u.def.value -= count;
1584
1585 /* As above, adjust the size if needed. */
1586 if (sym_hash->root.u.def.value < addr
1587 && sym_hash->root.u.def.value + sym_hash->size > addr
1588 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1589 sym_hash->size -= count;
1590 }
1591 }
1592
1593 return TRUE;
1594}
1595
1596/* Used to sort relocs by address. If relocs have the same address,
1597 we maintain their relative order, except that R_RL78_RH_RELAX
1598 alignment relocs must be the first reloc for any given address. */
1599
1600static void
1601reloc_bubblesort (Elf_Internal_Rela * r, int count)
1602{
1603 int i;
1604 bfd_boolean again;
1605 bfd_boolean swappit;
1606
1607 /* This is almost a classic bubblesort. It's the slowest sort, but
1608 we're taking advantage of the fact that the relocations are
1609 mostly in order already (the assembler emits them that way) and
1610 we need relocs with the same address to remain in the same
1611 relative order. */
1612 again = TRUE;
1613 while (again)
1614 {
1615 again = FALSE;
1616 for (i = 0; i < count - 1; i ++)
1617 {
1618 if (r[i].r_offset > r[i + 1].r_offset)
1619 swappit = TRUE;
1620 else if (r[i].r_offset < r[i + 1].r_offset)
1621 swappit = FALSE;
1622 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1623 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN))
1624 swappit = TRUE;
1625 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX
1626 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN)
1627 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX
1628 && (r[i].r_addend & RL78_RELAXA_ALIGN)))
1629 swappit = TRUE;
1630 else
1631 swappit = FALSE;
1632
1633 if (swappit)
1634 {
1635 Elf_Internal_Rela tmp;
1636
1637 tmp = r[i];
1638 r[i] = r[i + 1];
1639 r[i + 1] = tmp;
1640 /* If we do move a reloc back, re-scan to see if it
1641 needs to be moved even further back. This avoids
1642 most of the O(n^2) behavior for our cases. */
1643 if (i > 0)
1644 i -= 2;
1645 again = TRUE;
1646 }
1647 }
1648 }
1649}
1650
1651
1652#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1653 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1654 lrel, abfd, sec, link_info, scale)
1655
1656static bfd_vma
1657rl78_offset_for_reloc (bfd * abfd,
1658 Elf_Internal_Rela * rel,
1659 Elf_Internal_Shdr * symtab_hdr,
1660 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
1661 Elf_Internal_Sym * intsyms,
1662 Elf_Internal_Rela ** lrel,
1663 bfd * input_bfd,
1664 asection * input_section,
1665 struct bfd_link_info * info,
1666 int * scale)
1667{
1668 bfd_vma symval;
1669 bfd_reloc_status_type r;
1670
1671 *scale = 1;
1672
1673 /* REL is the first of 1..N relocations. We compute the symbol
1674 value for each relocation, then combine them if needed. LREL
1675 gets a pointer to the last relocation used. */
1676 while (1)
1677 {
1678 int32_t tmp1, tmp2;
1679
1680 /* Get the value of the symbol referred to by the reloc. */
1681 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1682 {
1683 /* A local symbol. */
1684 Elf_Internal_Sym *isym;
1685 asection *ssec;
1686
1687 isym = intsyms + ELF32_R_SYM (rel->r_info);
1688
1689 if (isym->st_shndx == SHN_UNDEF)
1690 ssec = bfd_und_section_ptr;
1691 else if (isym->st_shndx == SHN_ABS)
1692 ssec = bfd_abs_section_ptr;
1693 else if (isym->st_shndx == SHN_COMMON)
1694 ssec = bfd_com_section_ptr;
1695 else
1696 ssec = bfd_section_from_elf_index (abfd,
1697 isym->st_shndx);
1698
1699 /* Initial symbol value. */
1700 symval = isym->st_value;
1701
1702 /* GAS may have made this symbol relative to a section, in
1703 which case, we have to add the addend to find the
1704 symbol. */
1705 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1706 symval += rel->r_addend;
1707
1708 if (ssec)
1709 {
1710 if ((ssec->flags & SEC_MERGE)
dbaa2011 1711 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
9cea966c
DD		 1712 symval = _bfd_merged_section_offset (abfd, & ssec,
1713 elf_section_data (ssec)->sec_info,
1714 symval);
1715 }
1716
1717 /* Now make the offset relative to where the linker is putting it. */
1718 if (ssec)
1719 symval +=
1720 ssec->output_section->vma + ssec->output_offset;
1721
1722 symval += rel->r_addend;
1723 }
1724 else
1725 {
1726 unsigned long indx;
1727 struct elf_link_hash_entry * h;
1728
1729 /* An external symbol. */
1730 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1731 h = elf_sym_hashes (abfd)[indx];
1732 BFD_ASSERT (h != NULL);
1733
1734 if (h->root.type != bfd_link_hash_defined
1735 && h->root.type != bfd_link_hash_defweak)
1736 {
1737 /* This appears to be a reference to an undefined
1738 symbol. Just ignore it--it will be caught by the
1739 regular reloc processing. */
1740 if (lrel)
1741 *lrel = rel;
1742 return 0;
1743 }
1744
1745 symval = (h->root.u.def.value
1746 + h->root.u.def.section->output_section->vma
1747 + h->root.u.def.section->output_offset);
1748
1749 symval += rel->r_addend;
1750 }
1751
1752 switch (ELF32_R_TYPE (rel->r_info))
1753 {
1754 case R_RL78_SYM:
1755 RL78_STACK_PUSH (symval);
1756 break;
1757
1758 case R_RL78_OPneg:
1759 RL78_STACK_POP (tmp1);
1760 tmp1 = - tmp1;
1761 RL78_STACK_PUSH (tmp1);
1762 break;
1763
1764 case R_RL78_OPadd:
1765 RL78_STACK_POP (tmp1);
1766 RL78_STACK_POP (tmp2);
1767 tmp1 += tmp2;
1768 RL78_STACK_PUSH (tmp1);
1769 break;
1770
1771 case R_RL78_OPsub:
1772 RL78_STACK_POP (tmp1);
1773 RL78_STACK_POP (tmp2);
1774 tmp2 -= tmp1;
1775 RL78_STACK_PUSH (tmp2);
1776 break;
1777
1778 case R_RL78_OPmul:
1779 RL78_STACK_POP (tmp1);
1780 RL78_STACK_POP (tmp2);
1781 tmp1 *= tmp2;
1782 RL78_STACK_PUSH (tmp1);
1783 break;
1784
1785 case R_RL78_OPdiv:
1786 RL78_STACK_POP (tmp1);
1787 RL78_STACK_POP (tmp2);
1788 tmp1 /= tmp2;
1789 RL78_STACK_PUSH (tmp1);
1790 break;
1791
1792 case R_RL78_OPshla:
1793 RL78_STACK_POP (tmp1);
1794 RL78_STACK_POP (tmp2);
1795 tmp1 <<= tmp2;
1796 RL78_STACK_PUSH (tmp1);
1797 break;
1798
1799 case R_RL78_OPshra:
1800 RL78_STACK_POP (tmp1);
1801 RL78_STACK_POP (tmp2);
1802 tmp1 >>= tmp2;
1803 RL78_STACK_PUSH (tmp1);
1804 break;
1805
1806 case R_RL78_OPsctsize:
1807 RL78_STACK_PUSH (input_section->size);
1808 break;
1809
1810 case R_RL78_OPscttop:
1811 RL78_STACK_PUSH (input_section->output_section->vma);
1812 break;
1813
1814 case R_RL78_OPand:
1815 RL78_STACK_POP (tmp1);
1816 RL78_STACK_POP (tmp2);
1817 tmp1 &= tmp2;
1818 RL78_STACK_PUSH (tmp1);
1819 break;
1820
1821 case R_RL78_OPor:
1822 RL78_STACK_POP (tmp1);
1823 RL78_STACK_POP (tmp2);
1824 tmp1 |= tmp2;
1825 RL78_STACK_PUSH (tmp1);
1826 break;
1827
1828 case R_RL78_OPxor:
1829 RL78_STACK_POP (tmp1);
1830 RL78_STACK_POP (tmp2);
1831 tmp1 ^= tmp2;
1832 RL78_STACK_PUSH (tmp1);
1833 break;
1834
1835 case R_RL78_OPnot:
1836 RL78_STACK_POP (tmp1);
1837 tmp1 = ~ tmp1;
1838 RL78_STACK_PUSH (tmp1);
1839 break;
1840
1841 case R_RL78_OPmod:
1842 RL78_STACK_POP (tmp1);
1843 RL78_STACK_POP (tmp2);
1844 tmp1 %= tmp2;
1845 RL78_STACK_PUSH (tmp1);
1846 break;
1847
1848 case R_RL78_OPromtop:
1849 RL78_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1850 break;
1851
1852 case R_RL78_OPramtop:
1853 RL78_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1854 break;
1855
1856 case R_RL78_DIR16UL:
1857 case R_RL78_DIR8UL:
1858 case R_RL78_ABS16UL:
1859 case R_RL78_ABS8UL:
1860 if (rl78_stack_top)
1861 RL78_STACK_POP (symval);
1862 if (lrel)
1863 *lrel = rel;
1864 *scale = 4;
1865 return symval;
1866
1867 case R_RL78_DIR16UW:
1868 case R_RL78_DIR8UW:
1869 case R_RL78_ABS16UW:
1870 case R_RL78_ABS8UW:
1871 if (rl78_stack_top)
1872 RL78_STACK_POP (symval);
1873 if (lrel)
1874 *lrel = rel;
1875 *scale = 2;
1876 return symval;
1877
1878 default:
1879 if (rl78_stack_top)
1880 RL78_STACK_POP (symval);
1881 if (lrel)
1882 *lrel = rel;
1883 return symval;
1884 }
1885
1886 rel ++;
1887 }
1888}
1889
1890struct {
1891 int prefix; /* or -1 for "no prefix" */
1892 int insn; /* or -1 for "end of list" */
1893 int insn_for_saddr; /* or -1 for "no alternative" */
1894 int insn_for_sfr; /* or -1 for "no alternative" */
1895} relax_addr16[] = {
1896 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */
1897 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */
1898 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */
1899 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */
1900
1901 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */
1902 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */
1903 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */
1904 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */
1905 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */
1906 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */
1907 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */
1908 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */
1909
1910 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */
1911 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */
1912 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */
1913 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */
1914 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */
1915
1916 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */
1917 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */
1918 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */
1919 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */
1920
1921 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */
1922 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */
1923 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */
1924
1925 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */
1926 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */
1927 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */
1928 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */
1929 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */
1930 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */
1931
1932 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */
1933
1934 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */
1935 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */
1936 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */
1937 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */
1938 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */
1939 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */
1940 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */
1941 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */
1942
1943 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */
1944 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */
1945 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */
1946 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */
1947 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */
1948 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */
1949 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */
1950 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */
68ffbac6 1951
9cea966c
DD		 1952 { -1, -1, -1, -1 }
1953};
1954
1955/* Relax one section. */
1956
99c513f6
DD		 1957static bfd_boolean
1958rl78_elf_relax_section
1959 (bfd * abfd,
1960 asection * sec,
1961 struct bfd_link_info * link_info,
1962 bfd_boolean * again)
1963{
9cea966c
DD		 1964 Elf_Internal_Shdr * symtab_hdr;
1965 Elf_Internal_Shdr * shndx_hdr;
1966 Elf_Internal_Rela * internal_relocs;
1967 Elf_Internal_Rela * free_relocs = NULL;
1968 Elf_Internal_Rela * irel;
1969 Elf_Internal_Rela * srel;
1970 Elf_Internal_Rela * irelend;
1971 Elf_Internal_Rela * next_alignment;
9cea966c
DD		 1972 bfd_byte * contents = NULL;
1973 bfd_byte * free_contents = NULL;
1974 Elf_Internal_Sym * intsyms = NULL;
1975 Elf_Internal_Sym * free_intsyms = NULL;
1976 Elf_External_Sym_Shndx * shndx_buf = NULL;
1977 bfd_vma pc;
9cea966c
DD		 1978 bfd_vma symval ATTRIBUTE_UNUSED = 0;
1979 int pcrel ATTRIBUTE_UNUSED = 0;
1980 int code ATTRIBUTE_UNUSED = 0;
1981 int section_alignment_glue;
1982 int scale;
1983
99c513f6
DD		 1984 if (abfd == elf_hash_table (link_info)->dynobj
1985 && strcmp (sec->name, ".plt") == 0)
1986 return rl78_elf_relax_plt_section (abfd, sec, link_info, again);
1987
1988 /* Assume nothing changes. */
1989 *again = FALSE;
9cea966c
DD		 1990
1991 /* We don't have to do anything for a relocatable link, if
1992 this section does not have relocs, or if this is not a
1993 code section. */
1994 if (link_info->relocatable
1995 || (sec->flags & SEC_RELOC) == 0
1996 || sec->reloc_count == 0
1997 || (sec->flags & SEC_CODE) == 0)
1998 return TRUE;
1999
2000 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2001 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2002
9cea966c
DD		 2003 /* Get the section contents. */
2004 if (elf_section_data (sec)->this_hdr.contents != NULL)
2005 contents = elf_section_data (sec)->this_hdr.contents;
2006 /* Go get them off disk. */
2007 else
2008 {
2009 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2010 goto error_return;
2011 elf_section_data (sec)->this_hdr.contents = contents;
2012 }
2013
2014 /* Read this BFD's symbols. */
2015 /* Get cached copy if it exists. */
2016 if (symtab_hdr->contents != NULL)
2017 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2018 else
2019 {
2020 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2021 symtab_hdr->contents = (bfd_byte *) intsyms;
2022 }
2023
2024 if (shndx_hdr->sh_size != 0)
2025 {
2026 bfd_size_type amt;
2027
2028 amt = symtab_hdr->sh_info;
2029 amt *= sizeof (Elf_External_Sym_Shndx);
2030 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2031 if (shndx_buf == NULL)
2032 goto error_return;
2033 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2034 || bfd_bread (shndx_buf, amt, abfd) != amt)
9cea966c
DD		 2035 goto error_return;
2036 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2037 }
2038
2039 /* Get a copy of the native relocations. */
2040 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2041 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
9cea966c
DD		 2042 link_info->keep_memory));
2043 if (internal_relocs == NULL)
2044 goto error_return;
2045 if (! link_info->keep_memory)
2046 free_relocs = internal_relocs;
2047
2048 /* The RL_ relocs must be just before the operand relocs they go
2049 with, so we must sort them to guarantee this. We use bubblesort
2050 instead of qsort so we can guarantee that relocs with the same
2051 address remain in the same relative order. */
2052 reloc_bubblesort (internal_relocs, sec->reloc_count);
2053
2054 /* Walk through them looking for relaxing opportunities. */
2055 irelend = internal_relocs + sec->reloc_count;
2056
2057
2058 /* This will either be NULL or a pointer to the next alignment
2059 relocation. */
2060 next_alignment = internal_relocs;
9cea966c
DD		 2061
2062 /* We calculate worst case shrinkage caused by alignment directives.
2063 No fool-proof, but better than either ignoring the problem or
2064 doing heavy duty analysis of all the alignment markers in all
2065 input sections. */
2066 section_alignment_glue = 0;
2067 for (irel = internal_relocs; irel < irelend; irel++)
2068 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX
2069 && irel->r_addend & RL78_RELAXA_ALIGN)
2070 {
2071 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2072
2073 if (section_alignment_glue < this_glue)
2074 section_alignment_glue = this_glue;
2075 }
2076 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2077 shrinkage. */
2078 section_alignment_glue *= 2;
2079
2080 for (irel = internal_relocs; irel < irelend; irel++)
2081 {
2082 unsigned char *insn;
2083 int nrelocs;
2084
2085 /* The insns we care about are all marked with one of these. */
2086 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX)
2087 continue;
2088
2089 if (irel->r_addend & RL78_RELAXA_ALIGN
2090 || next_alignment == internal_relocs)
2091 {
2092 /* When we delete bytes, we need to maintain all the alignments
2093 indicated. In addition, we need to be careful about relaxing
2094 jumps across alignment boundaries - these displacements
2095 *grow* when we delete bytes. For now, don't shrink
2096 displacements across an alignment boundary, just in case.
2097 Note that this only affects relocations to the same
2098 section. */
9cea966c
DD		 2099 next_alignment += 2;
2100 while (next_alignment < irelend
2101 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX
2102 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN)))
2103 next_alignment ++;
2104 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2105 next_alignment = NULL;
2106 }
2107
2108 /* When we hit alignment markers, see if we've shrunk enough
2109 before them to reduce the gap without violating the alignment
2110 requirements. */
2111 if (irel->r_addend & RL78_RELAXA_ALIGN)
2112 {
2113 /* At this point, the next relocation *should* be the ELIGN
2114 end marker. */
2115 Elf_Internal_Rela *erel = irel + 1;
2116 unsigned int alignment, nbytes;
2117
2118 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX)
2119 continue;
2120 if (!(erel->r_addend & RL78_RELAXA_ELIGN))
2121 continue;
2122
2123 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM);
2124
2125 if (erel->r_offset - irel->r_offset < alignment)
2126 continue;
2127
2128 nbytes = erel->r_offset - irel->r_offset;
2129 nbytes /= alignment;
2130 nbytes *= alignment;
2131
2132 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2133 erel->r_offset == sec->size);
2134 *again = TRUE;
2135
2136 continue;
2137 }
2138
2139 if (irel->r_addend & RL78_RELAXA_ELIGN)
2140 continue;
2141
2142 insn = contents + irel->r_offset;
2143
2144 nrelocs = irel->r_addend & RL78_RELAXA_RNUM;
2145
2146 /* At this point, we have an insn that is a candidate for linker
2147 relaxation. There are NRELOCS relocs following that may be
2148 relaxed, although each reloc may be made of more than one
2149 reloc entry (such as gp-rel symbols). */
2150
2151 /* Get the value of the symbol referred to by the reloc. Just
2152 in case this is the last reloc in the list, use the RL's
2153 addend to choose between this reloc (no addend) or the next
2154 (yes addend, which means at least one following reloc). */
2155
2156 /* srel points to the "current" reloction for this insn -
2157 actually the last reloc for a given operand, which is the one
2158 we need to update. We check the relaxations in the same
2159 order that the relocations happen, so we'll just push it
2160 along as we go. */
2161 srel = irel;
2162
2163 pc = sec->output_section->vma + sec->output_offset
2164 + srel->r_offset;
2165
2166#define GET_RELOC \
1122dc88 2167 BFD_ASSERT (nrelocs > 0); \
9cea966c
DD		 2168 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2169 pcrel = symval - pc + srel->r_addend; \
2170 nrelocs --;
2171
2172#define SNIPNR(offset, nbytes) \
2173 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2174#define SNIP(offset, nbytes, newtype) \
2175 SNIPNR (offset, nbytes); \
2176 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2177
2178 /* The order of these bit tests must match the order that the
2179 relocs appear in. Since we sorted those by offset, we can
2180 predict them. */
2181
2182 /*----------------------------------------------------------------------*/
2183 /* EF ad BR $rel8 pcrel
2184 ED al ah BR !abs16 abs
2185 EE al ah BR $!rel16 pcrel
2186 EC al ah as BR !!abs20 abs
2187
2188 FD al ah CALL !abs16 abs
2189 FE al ah CALL $!rel16 pcrel
2190 FC al ah as CALL !!abs20 abs
2191
2192 DC ad BC $rel8
2193 DE ad BNC $rel8
2194 DD ad BZ $rel8
2195 DF ad BNZ $rel8
2196 61 C3 ad BH $rel8
2197 61 D3 ad BNH $rel8
2198 61 C8 EF ad SKC ; BR $rel8
2199 61 D8 EF ad SKNC ; BR $rel8
2200 61 E8 EF ad SKZ ; BR $rel8
2201 61 F8 EF ad SKNZ ; BR $rel8
2202 61 E3 EF ad SKH ; BR $rel8
2203 61 F3 EF ad SKNH ; BR $rel8
2204 */
2205
32e79d39 2206 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA)
9cea966c 2207 {
1122dc88
DD		 2208 /* SKIP opcodes that skip non-branches will have a relax tag
2209 but no corresponding symbol to relax against; we just
2210 skip those. */
2211 if (irel->r_addend & RL78_RELAXA_RNUM)
2212 {
2213 GET_RELOC;
2214 }
9cea966c
DD		 2215
2216 switch (insn[0])
2217 {
2218 case 0xec: /* BR !!abs20 */
2219
2220 if (pcrel < 127
2221 && pcrel > -127)
2222 {
2223 insn[0] = 0xef;
2224 insn[1] = pcrel;
2225 SNIP (2, 2, R_RL78_DIR8S_PCREL);
2226 *again = TRUE;
2227 }
2228 else if (symval < 65536)
2229 {
2230 insn[0] = 0xed;
2231 insn[1] = symval & 0xff;
2232 insn[2] = symval >> 8;
2233 SNIP (2, 1, R_RL78_DIR16S);
2234 *again = TRUE;
2235 }
2236 else if (pcrel < 32767
2237 && pcrel > -32767)
2238 {
2239 insn[0] = 0xee;
2240 insn[1] = pcrel & 0xff;
2241 insn[2] = pcrel >> 8;
2242 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2243 *again = TRUE;
2244 }
2245 break;
2246
2247 case 0xee: /* BR $!pcrel16 */
2248 case 0xed: /* BR $!abs16 */
2249 if (pcrel < 127
2250 && pcrel > -127)
2251 {
2252 insn[0] = 0xef;
2253 insn[1] = pcrel;
2254 SNIP (2, 1, R_RL78_DIR8S_PCREL);
2255 *again = TRUE;
2256 }
2257 break;
2258
2259 case 0xfc: /* CALL !!abs20 */
2260 if (symval < 65536)
2261 {
2262 insn[0] = 0xfd;
2263 insn[1] = symval & 0xff;
2264 insn[2] = symval >> 8;
2265 SNIP (2, 1, R_RL78_DIR16S);
2266 *again = TRUE;
2267 }
2268 else if (pcrel < 32767
2269 && pcrel > -32767)
2270 {
2271 insn[0] = 0xfe;
2272 insn[1] = pcrel & 0xff;
2273 insn[2] = pcrel >> 8;
2274 SNIP (2, 1, R_RL78_DIR16S_PCREL);
2275 *again = TRUE;
2276 }
2277 break;
2278
2279 case 0x61: /* PREFIX */
2280 /* For SKIP/BR, we change the BR opcode and delete the
2281 SKIP. That way, we don't have to find and change the
2282 relocation for the BR. */
1122dc88
DD		 2283 /* Note that, for the case where we're skipping some
2284 other insn, we have no "other" reloc but that's safe
2285 here anyway. */
9cea966c
DD		 2286 switch (insn[1])
2287 {
2288 case 0xc8: /* SKC */
2289 if (insn[2] == 0xef)
2290 {
2291 insn[2] = 0xde; /* BNC */
2292 SNIPNR (0, 2);
2293 }
2294 break;
2295
2296 case 0xd8: /* SKNC */
2297 if (insn[2] == 0xef)
2298 {
2299 insn[2] = 0xdc; /* BC */
2300 SNIPNR (0, 2);
2301 }
2302 break;
2303
2304 case 0xe8: /* SKZ */
2305 if (insn[2] == 0xef)
2306 {
2307 insn[2] = 0xdf; /* BNZ */
2308 SNIPNR (0, 2);
2309 }
2310 break;
2311
2312 case 0xf8: /* SKNZ */
2313 if (insn[2] == 0xef)
2314 {
2315 insn[2] = 0xdd; /* BZ */
2316 SNIPNR (0, 2);
2317 }
2318 break;
2319
2320 case 0xe3: /* SKH */
2321 if (insn[2] == 0xef)
2322 {
2323 insn[2] = 0xd3; /* BNH */
2324 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2325 }
2326 break;
2327
2328 case 0xf3: /* SKNH */
2329 if (insn[2] == 0xef)
2330 {
2331 insn[2] = 0xc3; /* BH */
2332 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */
2333 }
2334 break;
2335 }
2336 break;
2337 }
68ffbac6 2338
9cea966c
DD		 2339 }
2340
32e79d39 2341 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16)
9cea966c
DD		 2342 {
2343 /*----------------------------------------------------------------------*/
2344 /* Some insns have both a 16-bit address operand and an 8-bit
2345 variant if the address is within a special range:
2346
2347 Address 16-bit operand SADDR range SFR range
2348 FFF00-FFFFF 0xff00-0xffff 0x00-0xff
2349 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff
2350
2351 The RELAX_ADDR16[] array has the insn encodings for the
2352 16-bit operand version, as well as the SFR and SADDR
2353 variants. We only need to replace the encodings and
2354 adjust the operand.
2355
2356 Note: we intentionally do not attempt to decode and skip
2357 any ES: prefix, as adding ES: means the addr16 (likely)
2358 no longer points to saddr/sfr space.
2359 */
2360
2361 int is_sfr;
2362 int is_saddr;
2363 int idx;
2364 int poff;
2365
2366 GET_RELOC;
2367
9cea966c
DD		 2368 if (0xffe20 <= symval && symval <= 0xfffff)
2369 {
2370
2371 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f);
2372 is_sfr = (0xfff00 <= symval && symval <= 0xfffff);
2373
2374 for (idx = 0; relax_addr16[idx].insn != -1; idx ++)
2375 {
2376 if (relax_addr16[idx].prefix != -1
2377 && insn[0] == relax_addr16[idx].prefix
2378 && insn[1] == relax_addr16[idx].insn)
2379 {
2380 poff = 1;
2381 }
2382 else if (relax_addr16[idx].prefix == -1
2383 && insn[0] == relax_addr16[idx].insn)
2384 {
2385 poff = 0;
2386 }
2387 else
2388 continue;
2389
2390 /* We have a matched insn, and poff is 0 or 1 depending
2391 on the base pattern size. */
2392
2393 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1)
2394 {
2395 insn[poff] = relax_addr16[idx].insn_for_sfr;
2396 SNIP (poff+2, 1, R_RL78_RH_SFR);
9cea966c
DD		 2397 }
2398
2399 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1)
2400 {
2401 insn[poff] = relax_addr16[idx].insn_for_saddr;
2402 SNIP (poff+2, 1, R_RL78_RH_SADDR);
9cea966c 2403 }
68ffbac6 2404
9cea966c
DD		 2405 }
2406 }
2407 }
2408
2409 /*----------------------------------------------------------------------*/
2410
2411 }
2412
2413 return TRUE;
2414
2415 error_return:
2416 if (free_relocs != NULL)
2417 free (free_relocs);
2418
2419 if (free_contents != NULL)
2420 free (free_contents);
2421
2422 if (shndx_buf != NULL)
2423 {
2424 shndx_hdr->contents = NULL;
2425 free (shndx_buf);
2426 }
2427
2428 if (free_intsyms != NULL)
2429 free (free_intsyms);
2430
99c513f6
DD		 2431 return TRUE;
2432}
2433
2434\f
2435
2436#define ELF_ARCH bfd_arch_rl78
2437#define ELF_MACHINE_CODE EM_RL78
2438#define ELF_MAXPAGESIZE 0x1000
2439
6d00b590 2440#define TARGET_LITTLE_SYM rl78_elf32_vec
99c513f6
DD		 2441#define TARGET_LITTLE_NAME "elf32-rl78"
2442
2443#define elf_info_to_howto_rel NULL
2444#define elf_info_to_howto rl78_info_to_howto_rela
2445#define elf_backend_object_p rl78_elf_object_p
2446#define elf_backend_relocate_section rl78_elf_relocate_section
2447#define elf_symbol_leading_char ('_')
2448#define elf_backend_can_gc_sections 1
2449
2450#define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup
2451#define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup
2452#define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags
2453#define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data
2454#define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data
2455
2456#define bfd_elf32_bfd_relax_section rl78_elf_relax_section
2457#define elf_backend_check_relocs rl78_elf_check_relocs
2458#define elf_backend_always_size_sections \
2459 rl78_elf_always_size_sections
2460#define elf_backend_finish_dynamic_sections \
2461 rl78_elf_finish_dynamic_sections
2462
2463#include "elf32-target.h"
GDB Binutils - Deliverables
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