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_bfd_mul_overflow
[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
CommitLineData
c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
b3adc24a 2 Copyright (C) 2008-2020 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
863f7a5f
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
c7927a3c
NC		 20
21#include "sysdep.h"
22#include "bfd.h"
23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
07d6d2b8
AM		 52 RXREL (NONE, 3, 0, 0, dont, FALSE),
53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
c7927a3c 54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
07d6d2b8 55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
07d6d2b8
AM		 68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
c7927a3c
NC		 71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
07d6d2b8
AM		 86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
c7927a3c 90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
07d6d2b8
AM		 91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
c7927a3c
NC		 96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
07d6d2b8 99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
07d6d2b8 121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
c7927a3c 122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
07d6d2b8 123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
07d6d2b8
AM		 136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
07d6d2b8 184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
c7927a3c 185#define R_RX_RH_ABS5p8W 0x79
07d6d2b8 186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
c7927a3c 187#define R_RX_RH_ABS5p8L 0x7a
07d6d2b8 188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
07d6d2b8 192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
c7927a3c 193#define R_RX_RH_ABS5p5W 0x7c
07d6d2b8 194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
c7927a3c 195#define R_RX_RH_ABS5p5L 0x7d
07d6d2b8 196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
07d6d2b8 199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
07d6d2b8 202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 203 /* End of internal relocs. */
204
07d6d2b8
AM		 205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
07d6d2b8
AM		 215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222};
223\f
224/* Map BFD reloc types to RX ELF reloc types. */
225
226struct rx_reloc_map
227{
228 bfd_reloc_code_real_type bfd_reloc_val;
07d6d2b8 229 unsigned int rx_reloc_val;
c7927a3c
NC		 230};
231
232static const struct rx_reloc_map rx_reloc_map [] =
233{
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267};
268
269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271static reloc_howto_type *
07d6d2b8 272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
c7927a3c
NC		 273 bfd_reloc_code_real_type code)
274{
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
0ba38529 280 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285}
286
287static reloc_howto_type *
288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289{
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298}
299
300/* Set the howto pointer for an RX ELF reloc. */
301
f3185997
NC		 302static bfd_boolean
303rx_info_to_howto_rela (bfd * abfd,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
c7927a3c
NC		 306{
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 310 if (r_type >= (unsigned int) R_RX_max)
311 {
695344c0 312 /* xgettext:c-format */
0aa13fee
AM		 313 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
314 abfd, r_type);
f3185997
NC		 315 bfd_set_error (bfd_error_bad_value);
316 return FALSE;
5860e3f8 317 }
c7927a3c 318 cache_ptr->howto = rx_elf_howto_table + r_type;
f3185997
NC		 319 if (cache_ptr->howto->name == NULL)
320 {
321 /* xgettext:c-format */
322 _bfd_error_handler (_("%pB: unsupported relocation type %#x"),
323 abfd, r_type);
324 bfd_set_error (bfd_error_bad_value);
325 return FALSE;
326 }
327 return TRUE;
c7927a3c
NC		 328}
329\f
330static bfd_vma
07d6d2b8 331get_symbol_value (const char * name,
c7927a3c 332 struct bfd_link_info * info,
07d6d2b8
AM		 333 bfd * input_bfd,
334 asection * input_section,
c7927a3c
NC		 335 int offset)
336{
337 bfd_vma value = 0;
338 struct bfd_link_hash_entry * h;
339
340 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
341
342 if (h == NULL
343 || (h->type != bfd_link_hash_defined
344 && h->type != bfd_link_hash_defweak))
1a72702b 345 (*info->callbacks->undefined_symbol)
c7927a3c
NC		 346 (info, name, input_bfd, input_section, offset, TRUE);
347 else
348 value = (h->u.def.value
349 + h->u.def.section->output_section->vma
350 + h->u.def.section->output_offset);
351
352 return value;
353}
1a72702b 354
7a2f2d82 355static bfd_vma
07d6d2b8 356get_symbol_value_maybe (const char * name,
7a2f2d82
DD		 357 struct bfd_link_info * info)
358{
359 bfd_vma value = 0;
360 struct bfd_link_hash_entry * h;
361
362 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
363
364 if (h == NULL
365 || (h->type != bfd_link_hash_defined
366 && h->type != bfd_link_hash_defweak))
367 return 0;
368 else
369 value = (h->u.def.value
370 + h->u.def.section->output_section->vma
371 + h->u.def.section->output_offset);
372
373 return value;
374}
c7927a3c
NC		 375
376static bfd_vma
07d6d2b8
AM		 377get_gp (struct bfd_link_info * info,
378 bfd * abfd,
379 asection * sec,
c7927a3c
NC		 380 int offset)
381{
382 static bfd_boolean cached = FALSE;
383 static bfd_vma cached_value = 0;
384
385 if (!cached)
386 {
1a72702b 387 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
c7927a3c
NC		 388 cached = TRUE;
389 }
390 return cached_value;
391}
392
393static bfd_vma
1a72702b 394get_romstart (struct bfd_link_info * info,
07d6d2b8
AM		 395 bfd * abfd,
396 asection * sec,
c7927a3c
NC		 397 int offset)
398{
399 static bfd_boolean cached = FALSE;
400 static bfd_vma cached_value = 0;
401
402 if (!cached)
403 {
1a72702b 404 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
c7927a3c
NC		 405 cached = TRUE;
406 }
407 return cached_value;
408}
409
410static bfd_vma
1a72702b 411get_ramstart (struct bfd_link_info * info,
07d6d2b8
AM		 412 bfd * abfd,
413 asection * sec,
c7927a3c
NC		 414 int offset)
415{
416 static bfd_boolean cached = FALSE;
417 static bfd_vma cached_value = 0;
418
419 if (!cached)
420 {
1a72702b 421 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
c7927a3c
NC		 422 cached = TRUE;
423 }
424 return cached_value;
425}
426
427#define NUM_STACK_ENTRIES 16
428static int32_t rx_stack [ NUM_STACK_ENTRIES ];
429static unsigned int rx_stack_top;
430
431#define RX_STACK_PUSH(val) \
432 do \
433 { \
434 if (rx_stack_top < NUM_STACK_ENTRIES) \
07d6d2b8 435 rx_stack [rx_stack_top ++] = (val); \
c7927a3c 436 else \
07d6d2b8 437 r = bfd_reloc_dangerous; \
c7927a3c
NC		 438 } \
439 while (0)
440
441#define RX_STACK_POP(dest) \
442 do \
443 { \
444 if (rx_stack_top > 0) \
07d6d2b8 445 (dest) = rx_stack [-- rx_stack_top]; \
c7927a3c 446 else \
07d6d2b8 447 (dest) = 0, r = bfd_reloc_dangerous; \
c7927a3c
NC		 448 } \
449 while (0)
450
451/* Relocate an RX ELF section.
452 There is some attempt to make this function usable for many architectures,
453 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
454 if only to serve as a learning tool.
455
456 The RELOCATE_SECTION function is called by the new ELF backend linker
457 to handle the relocations for a section.
458
459 The relocs are always passed as Rela structures; if the section
460 actually uses Rel structures, the r_addend field will always be
461 zero.
462
463 This function is responsible for adjusting the section contents as
464 necessary, and (if using Rela relocs and generating a relocatable
465 output file) adjusting the reloc addend as necessary.
466
467 This function does not have to worry about setting the reloc
468 address or the reloc symbol index.
469
470 LOCAL_SYMS is a pointer to the swapped in local symbols.
471
472 LOCAL_SECTIONS is an array giving the section in the input file
473 corresponding to the st_shndx field of each local symbol.
474
475 The global hash table entry for the global symbols can be found
476 via elf_sym_hashes (input_bfd).
477
478 When generating relocatable output, this function must handle
479 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
480 going to be the section symbol corresponding to the output
481 section, which means that the addend must be adjusted
482 accordingly. */
483
484static bfd_boolean
485rx_elf_relocate_section
07d6d2b8 486 (bfd * output_bfd,
c7927a3c 487 struct bfd_link_info * info,
07d6d2b8
AM		 488 bfd * input_bfd,
489 asection * input_section,
490 bfd_byte * contents,
c7927a3c 491 Elf_Internal_Rela * relocs,
07d6d2b8
AM		 492 Elf_Internal_Sym * local_syms,
493 asection ** local_sections)
c7927a3c 494{
07d6d2b8 495 Elf_Internal_Shdr * symtab_hdr;
c7927a3c 496 struct elf_link_hash_entry ** sym_hashes;
07d6d2b8
AM		 497 Elf_Internal_Rela * rel;
498 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 499 bfd_boolean pid_mode;
500 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 501 const char * table_default_cache = NULL;
502 bfd_vma table_start_cache = 0;
503 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 504
505 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
506 pid_mode = TRUE;
507 else
508 pid_mode = FALSE;
c7927a3c
NC		 509
510 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
511 sym_hashes = elf_sym_hashes (input_bfd);
512 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 513 for (rel = relocs; rel < relend; rel ++)
514 {
07d6d2b8
AM		 515 reloc_howto_type * howto;
516 unsigned long r_symndx;
517 Elf_Internal_Sym * sym;
518 asection * sec;
c7927a3c 519 struct elf_link_hash_entry * h;
07d6d2b8
AM		 520 bfd_vma relocation;
521 bfd_reloc_status_type r;
522 const char * name = NULL;
523 bfd_boolean unresolved_reloc = TRUE;
524 int r_type;
c7927a3c
NC		 525
526 r_type = ELF32_R_TYPE (rel->r_info);
527 r_symndx = ELF32_R_SYM (rel->r_info);
528
529 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
07d6d2b8 530 h = NULL;
c7927a3c
NC		 531 sym = NULL;
532 sec = NULL;
533 relocation = 0;
534
d4cb0ea0
NC		 535 if (rx_stack_top == 0)
536 saw_subtract = FALSE;
537
c7927a3c
NC		 538 if (r_symndx < symtab_hdr->sh_info)
539 {
540 sym = local_syms + r_symndx;
541 sec = local_sections [r_symndx];
542 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
543
544 name = bfd_elf_string_from_elf_section
545 (input_bfd, symtab_hdr->sh_link, sym->st_name);
fd361982 546 name = sym->st_name == 0 ? bfd_section_name (sec) : name;
c7927a3c
NC		 547 }
548 else
549 {
62d887d4 550 bfd_boolean warned, ignored;
c7927a3c
NC		 551
552 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
553 r_symndx, symtab_hdr, sym_hashes, h,
554 sec, relocation, unresolved_reloc,
62d887d4 555 warned, ignored);
c7927a3c
NC		 556
557 name = h->root.root.string;
558 }
559
7a2f2d82
DD		 560 if (strncmp (name, "$tableentry$default$", 20) == 0)
561 {
562 bfd_vma entry_vma;
563 int idx;
564 char *buf;
7a2f2d82
DD		 565
566 if (table_default_cache != name)
567 {
568
569 /* All relocs for a given table should be to the same
570 (weak) default symbol) so we can use it to detect a
571 cache miss. We use the offset into the table to find
572 the "real" symbol. Calculate and store the table's
573 offset here. */
574
575 table_default_cache = name;
576
577 /* We have already done error checking in rx_table_find(). */
578
579 buf = (char *) malloc (13 + strlen (name + 20));
580
581 sprintf (buf, "$tablestart$%s", name + 20);
7a2f2d82 582 table_start_cache = get_symbol_value (buf,
7a2f2d82
DD		 583 info,
584 input_bfd,
585 input_section,
586 rel->r_offset);
587
588 sprintf (buf, "$tableend$%s", name + 20);
7a2f2d82 589 table_end_cache = get_symbol_value (buf,
7a2f2d82
DD		 590 info,
591 input_bfd,
592 input_section,
593 rel->r_offset);
594
595 free (buf);
596 }
597
598 entry_vma = (input_section->output_section->vma
599 + input_section->output_offset
600 + rel->r_offset);
601
602 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
603 {
695344c0 604 /* xgettext:c-format */
871b3ab2 605 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"),
7a2f2d82
DD		 606 input_bfd, input_section,
607 name);
608 }
609 else if ((int) (entry_vma - table_start_cache) % 4)
610 {
695344c0 611 /* xgettext:c-format */
871b3ab2 612 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"),
7a2f2d82
DD		 613 input_bfd, input_section,
614 name);
615 }
616 else
617 {
618 idx = (int) (entry_vma - table_start_cache) / 4;
619
620 /* This will look like $tableentry$<N>$<name> */
621 buf = (char *) malloc (12 + 20 + strlen (name + 20));
622 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
623
624 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
625
626 if (h)
627 {
628 relocation = (h->root.u.def.value
629 + h->root.u.def.section->output_section->vma
630 + h->root.u.def.section->output_offset);;
631 }
632
633 free (buf);
634 }
635 }
636
dbaa2011 637 if (sec != NULL && discarded_section (sec))
e4067dbb 638 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 639 rel, 1, relend, howto, 0, contents);
c7927a3c 640
0e1862bb 641 if (bfd_link_relocatable (info))
c7927a3c
NC		 642 {
643 /* This is a relocatable link. We don't have to change
07d6d2b8
AM		 644 anything, unless the reloc is against a section symbol,
645 in which case we have to adjust according to where the
646 section symbol winds up in the output section. */
c7927a3c
NC		 647 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
648 rel->r_addend += sec->output_offset;
649 continue;
650 }
651
652 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
653 /* If the symbol is undefined and weak
654 then the relocation resolves to zero. */
655 relocation = 0;
656 else
657 {
658 if (howto->pc_relative)
659 {
660 relocation -= (input_section->output_section->vma
661 + input_section->output_offset
662 + rel->r_offset);
663 if (r_type != R_RX_RH_3_PCREL
664 && r_type != R_RX_DIR3U_PCREL)
665 relocation ++;
666 }
667
668 relocation += rel->r_addend;
669 }
670
671 r = bfd_reloc_ok;
672
38f14ab8
AM		 673#define RANGE(a,b) \
674 if (a > (long) relocation || (long) relocation > b) \
675 r = bfd_reloc_overflow
676#define ALIGN(m) \
677 if (relocation & m) \
678 r = bfd_reloc_other
679#define OP(i) \
680 (contents[rel->r_offset + (i)])
c7927a3c 681#define WARN_REDHAT(type) \
38f14ab8
AM		 682 /* xgettext:c-format */ \
683 _bfd_error_handler \
684 (_("%pB:%pA: warning: deprecated Red Hat reloc " \
685 "%s detected against: %s"), \
686 input_bfd, input_section, #type, name)
c7927a3c 687
d4cb0ea0
NC		 688 /* Check for unsafe relocs in PID mode. These are any relocs where
689 an absolute address is being computed. There are special cases
690 for relocs against symbols that are known to be referenced in
691 crt0.o before the PID base address register has been initialised. */
692#define UNSAFE_FOR_PID \
693 do \
694 { \
695 if (pid_mode \
07d6d2b8 696 && sec != NULL \
d4cb0ea0
NC		 697 && sec->flags & SEC_READONLY \
698 && !(input_section->flags & SEC_DEBUGGING) \
699 && strcmp (name, "__pid_base") != 0 \
700 && strcmp (name, "__gp") != 0 \
701 && strcmp (name, "__romdatastart") != 0 \
702 && !saw_subtract) \
695344c0 703 /* xgettext:c-format */ \
2dcf00ce
AM		 704 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \
705 "at %#" PRIx64 " (against %s in %s)"), \
d4cb0ea0 706 input_bfd, input_section, howto->name, \
2dcf00ce
AM		 707 (uint64_t) (input_section->output_section->vma \
708 + input_section->output_offset \
709 + rel->r_offset), \
d4cb0ea0
NC		 710 name, sec->name); \
711 } \
712 while (0)
713
c7927a3c
NC		 714 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
715 switch (r_type)
716 {
717 case R_RX_NONE:
718 break;
719
720 case R_RX_RH_RELAX:
721 break;
722
723 case R_RX_RH_3_PCREL:
724 WARN_REDHAT ("RX_RH_3_PCREL");
725 RANGE (3, 10);
726 OP (0) &= 0xf8;
727 OP (0) |= relocation & 0x07;
728 break;
729
730 case R_RX_RH_8_NEG:
731 WARN_REDHAT ("RX_RH_8_NEG");
732 relocation = - relocation;
1a0670f3 733 /* Fall through. */
c7927a3c 734 case R_RX_DIR8S_PCREL:
d4cb0ea0 735 UNSAFE_FOR_PID;
c7927a3c
NC		 736 RANGE (-128, 127);
737 OP (0) = relocation;
738 break;
739
740 case R_RX_DIR8S:
d4cb0ea0 741 UNSAFE_FOR_PID;
c7927a3c
NC		 742 RANGE (-128, 255);
743 OP (0) = relocation;
744 break;
745
746 case R_RX_DIR8U:
d4cb0ea0 747 UNSAFE_FOR_PID;
c7927a3c
NC		 748 RANGE (0, 255);
749 OP (0) = relocation;
750 break;
751
752 case R_RX_RH_16_NEG:
753 WARN_REDHAT ("RX_RH_16_NEG");
754 relocation = - relocation;
1a0670f3 755 /* Fall through. */
c7927a3c 756 case R_RX_DIR16S_PCREL:
d4cb0ea0 757 UNSAFE_FOR_PID;
c7927a3c
NC		 758 RANGE (-32768, 32767);
759#if RX_OPCODE_BIG_ENDIAN
760#else
761 OP (0) = relocation;
762 OP (1) = relocation >> 8;
763#endif
764 break;
765
766 case R_RX_RH_16_OP:
767 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 768 UNSAFE_FOR_PID;
c7927a3c
NC		 769 RANGE (-32768, 32767);
770#if RX_OPCODE_BIG_ENDIAN
771 OP (1) = relocation;
772 OP (0) = relocation >> 8;
773#else
774 OP (0) = relocation;
775 OP (1) = relocation >> 8;
776#endif
777 break;
778
779 case R_RX_DIR16S:
d4cb0ea0 780 UNSAFE_FOR_PID;
c7927a3c
NC		 781 RANGE (-32768, 65535);
782 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
783 {
784 OP (1) = relocation;
785 OP (0) = relocation >> 8;
786 }
787 else
788 {
789 OP (0) = relocation;
790 OP (1) = relocation >> 8;
791 }
792 break;
793
794 case R_RX_DIR16U:
d4cb0ea0 795 UNSAFE_FOR_PID;
c7927a3c
NC		 796 RANGE (0, 65536);
797#if RX_OPCODE_BIG_ENDIAN
798 OP (1) = relocation;
799 OP (0) = relocation >> 8;
800#else
801 OP (0) = relocation;
802 OP (1) = relocation >> 8;
803#endif
804 break;
805
806 case R_RX_DIR16:
d4cb0ea0 807 UNSAFE_FOR_PID;
c7927a3c
NC		 808 RANGE (-32768, 65536);
809#if RX_OPCODE_BIG_ENDIAN
810 OP (1) = relocation;
811 OP (0) = relocation >> 8;
812#else
813 OP (0) = relocation;
814 OP (1) = relocation >> 8;
815#endif
816 break;
817
818 case R_RX_DIR16_REV:
d4cb0ea0 819 UNSAFE_FOR_PID;
c7927a3c
NC		 820 RANGE (-32768, 65536);
821#if RX_OPCODE_BIG_ENDIAN
822 OP (0) = relocation;
823 OP (1) = relocation >> 8;
824#else
825 OP (1) = relocation;
826 OP (0) = relocation >> 8;
827#endif
828 break;
829
830 case R_RX_DIR3U_PCREL:
831 RANGE (3, 10);
832 OP (0) &= 0xf8;
833 OP (0) |= relocation & 0x07;
834 break;
835
836 case R_RX_RH_24_NEG:
d4cb0ea0 837 UNSAFE_FOR_PID;
c7927a3c
NC		 838 WARN_REDHAT ("RX_RH_24_NEG");
839 relocation = - relocation;
1a0670f3 840 /* Fall through. */
c7927a3c
NC		 841 case R_RX_DIR24S_PCREL:
842 RANGE (-0x800000, 0x7fffff);
843#if RX_OPCODE_BIG_ENDIAN
844 OP (2) = relocation;
845 OP (1) = relocation >> 8;
846 OP (0) = relocation >> 16;
847#else
848 OP (0) = relocation;
849 OP (1) = relocation >> 8;
850 OP (2) = relocation >> 16;
851#endif
852 break;
853
854 case R_RX_RH_24_OP:
d4cb0ea0 855 UNSAFE_FOR_PID;
c7927a3c
NC		 856 WARN_REDHAT ("RX_RH_24_OP");
857 RANGE (-0x800000, 0x7fffff);
858#if RX_OPCODE_BIG_ENDIAN
859 OP (2) = relocation;
860 OP (1) = relocation >> 8;
861 OP (0) = relocation >> 16;
862#else
863 OP (0) = relocation;
864 OP (1) = relocation >> 8;
865 OP (2) = relocation >> 16;
866#endif
867 break;
868
869 case R_RX_DIR24S:
d4cb0ea0 870 UNSAFE_FOR_PID;
c7927a3c
NC		 871 RANGE (-0x800000, 0x7fffff);
872 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
873 {
874 OP (2) = relocation;
875 OP (1) = relocation >> 8;
876 OP (0) = relocation >> 16;
877 }
878 else
879 {
880 OP (0) = relocation;
881 OP (1) = relocation >> 8;
882 OP (2) = relocation >> 16;
883 }
884 break;
885
886 case R_RX_RH_24_UNS:
d4cb0ea0 887 UNSAFE_FOR_PID;
c7927a3c
NC		 888 WARN_REDHAT ("RX_RH_24_UNS");
889 RANGE (0, 0xffffff);
890#if RX_OPCODE_BIG_ENDIAN
891 OP (2) = relocation;
892 OP (1) = relocation >> 8;
893 OP (0) = relocation >> 16;
894#else
895 OP (0) = relocation;
896 OP (1) = relocation >> 8;
897 OP (2) = relocation >> 16;
898#endif
899 break;
900
901 case R_RX_RH_32_NEG:
d4cb0ea0 902 UNSAFE_FOR_PID;
c7927a3c
NC		 903 WARN_REDHAT ("RX_RH_32_NEG");
904 relocation = - relocation;
905#if RX_OPCODE_BIG_ENDIAN
906 OP (3) = relocation;
907 OP (2) = relocation >> 8;
908 OP (1) = relocation >> 16;
909 OP (0) = relocation >> 24;
910#else
911 OP (0) = relocation;
912 OP (1) = relocation >> 8;
913 OP (2) = relocation >> 16;
914 OP (3) = relocation >> 24;
915#endif
916 break;
917
918 case R_RX_RH_32_OP:
d4cb0ea0 919 UNSAFE_FOR_PID;
c7927a3c
NC		 920 WARN_REDHAT ("RX_RH_32_OP");
921#if RX_OPCODE_BIG_ENDIAN
922 OP (3) = relocation;
923 OP (2) = relocation >> 8;
924 OP (1) = relocation >> 16;
925 OP (0) = relocation >> 24;
926#else
927 OP (0) = relocation;
928 OP (1) = relocation >> 8;
929 OP (2) = relocation >> 16;
930 OP (3) = relocation >> 24;
931#endif
932 break;
933
934 case R_RX_DIR32:
935 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
936 {
937 OP (3) = relocation;
938 OP (2) = relocation >> 8;
939 OP (1) = relocation >> 16;
940 OP (0) = relocation >> 24;
941 }
942 else
943 {
944 OP (0) = relocation;
945 OP (1) = relocation >> 8;
946 OP (2) = relocation >> 16;
947 OP (3) = relocation >> 24;
948 }
949 break;
950
951 case R_RX_DIR32_REV:
952 if (BIGE (output_bfd))
953 {
954 OP (0) = relocation;
955 OP (1) = relocation >> 8;
956 OP (2) = relocation >> 16;
957 OP (3) = relocation >> 24;
958 }
959 else
960 {
961 OP (3) = relocation;
962 OP (2) = relocation >> 8;
963 OP (1) = relocation >> 16;
964 OP (0) = relocation >> 24;
965 }
966 break;
967
968 case R_RX_RH_DIFF:
969 {
970 bfd_vma val;
971 WARN_REDHAT ("RX_RH_DIFF");
972 val = bfd_get_32 (output_bfd, & OP (0));
973 val -= relocation;
974 bfd_put_32 (output_bfd, val, & OP (0));
975 }
976 break;
977
978 case R_RX_RH_GPRELB:
979 WARN_REDHAT ("RX_RH_GPRELB");
1a72702b 980 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 981 RANGE (0, 65535);
982#if RX_OPCODE_BIG_ENDIAN
983 OP (1) = relocation;
984 OP (0) = relocation >> 8;
985#else
986 OP (0) = relocation;
987 OP (1) = relocation >> 8;
988#endif
989 break;
990
991 case R_RX_RH_GPRELW:
992 WARN_REDHAT ("RX_RH_GPRELW");
1a72702b 993 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 994 ALIGN (1);
995 relocation >>= 1;
996 RANGE (0, 65535);
997#if RX_OPCODE_BIG_ENDIAN
998 OP (1) = relocation;
999 OP (0) = relocation >> 8;
1000#else
1001 OP (0) = relocation;
1002 OP (1) = relocation >> 8;
1003#endif
1004 break;
1005
1006 case R_RX_RH_GPRELL:
1007 WARN_REDHAT ("RX_RH_GPRELL");
1a72702b 1008 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 1009 ALIGN (3);
1010 relocation >>= 2;
1011 RANGE (0, 65535);
1012#if RX_OPCODE_BIG_ENDIAN
1013 OP (1) = relocation;
1014 OP (0) = relocation >> 8;
1015#else
1016 OP (0) = relocation;
1017 OP (1) = relocation >> 8;
1018#endif
1019 break;
1020
1021 /* Internal relocations just for relaxation: */
1022 case R_RX_RH_ABS5p5B:
1023 RX_STACK_POP (relocation);
1024 RANGE (0, 31);
1025 OP (0) &= 0xf8;
1026 OP (0) |= relocation >> 2;
1027 OP (1) &= 0x77;
1028 OP (1) |= (relocation << 6) & 0x80;
1029 OP (1) |= (relocation << 3) & 0x08;
1030 break;
1031
1032 case R_RX_RH_ABS5p5W:
1033 RX_STACK_POP (relocation);
1034 RANGE (0, 62);
1035 ALIGN (1);
1036 relocation >>= 1;
1037 OP (0) &= 0xf8;
1038 OP (0) |= relocation >> 2;
1039 OP (1) &= 0x77;
1040 OP (1) |= (relocation << 6) & 0x80;
1041 OP (1) |= (relocation << 3) & 0x08;
1042 break;
1043
1044 case R_RX_RH_ABS5p5L:
1045 RX_STACK_POP (relocation);
1046 RANGE (0, 124);
1047 ALIGN (3);
1048 relocation >>= 2;
1049 OP (0) &= 0xf8;
1050 OP (0) |= relocation >> 2;
1051 OP (1) &= 0x77;
1052 OP (1) |= (relocation << 6) & 0x80;
1053 OP (1) |= (relocation << 3) & 0x08;
1054 break;
1055
1056 case R_RX_RH_ABS5p8B:
1057 RX_STACK_POP (relocation);
1058 RANGE (0, 31);
1059 OP (0) &= 0x70;
1060 OP (0) |= (relocation << 3) & 0x80;
1061 OP (0) |= relocation & 0x0f;
1062 break;
1063
1064 case R_RX_RH_ABS5p8W:
1065 RX_STACK_POP (relocation);
1066 RANGE (0, 62);
1067 ALIGN (1);
1068 relocation >>= 1;
1069 OP (0) &= 0x70;
1070 OP (0) |= (relocation << 3) & 0x80;
1071 OP (0) |= relocation & 0x0f;
1072 break;
1073
1074 case R_RX_RH_ABS5p8L:
1075 RX_STACK_POP (relocation);
1076 RANGE (0, 124);
1077 ALIGN (3);
1078 relocation >>= 2;
1079 OP (0) &= 0x70;
1080 OP (0) |= (relocation << 3) & 0x80;
1081 OP (0) |= relocation & 0x0f;
1082 break;
1083
1084 case R_RX_RH_UIMM4p8:
1085 RANGE (0, 15);
1086 OP (0) &= 0x0f;
1087 OP (0) |= relocation << 4;
1088 break;
1089
1090 case R_RX_RH_UNEG4p8:
1091 RANGE (-15, 0);
1092 OP (0) &= 0x0f;
1093 OP (0) |= (-relocation) << 4;
1094 break;
1095
1096 /* Complex reloc handling: */
1097
1098 case R_RX_ABS32:
d4cb0ea0 1099 UNSAFE_FOR_PID;
c7927a3c
NC		 1100 RX_STACK_POP (relocation);
1101#if RX_OPCODE_BIG_ENDIAN
1102 OP (3) = relocation;
1103 OP (2) = relocation >> 8;
1104 OP (1) = relocation >> 16;
1105 OP (0) = relocation >> 24;
1106#else
1107 OP (0) = relocation;
1108 OP (1) = relocation >> 8;
1109 OP (2) = relocation >> 16;
1110 OP (3) = relocation >> 24;
1111#endif
1112 break;
1113
1114 case R_RX_ABS32_REV:
d4cb0ea0 1115 UNSAFE_FOR_PID;
c7927a3c
NC		 1116 RX_STACK_POP (relocation);
1117#if RX_OPCODE_BIG_ENDIAN
1118 OP (0) = relocation;
1119 OP (1) = relocation >> 8;
1120 OP (2) = relocation >> 16;
1121 OP (3) = relocation >> 24;
1122#else
1123 OP (3) = relocation;
1124 OP (2) = relocation >> 8;
1125 OP (1) = relocation >> 16;
1126 OP (0) = relocation >> 24;
1127#endif
1128 break;
1129
1130 case R_RX_ABS24S_PCREL:
1131 case R_RX_ABS24S:
d4cb0ea0 1132 UNSAFE_FOR_PID;
c7927a3c
NC		 1133 RX_STACK_POP (relocation);
1134 RANGE (-0x800000, 0x7fffff);
1135 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1136 {
1137 OP (2) = relocation;
1138 OP (1) = relocation >> 8;
1139 OP (0) = relocation >> 16;
1140 }
1141 else
1142 {
1143 OP (0) = relocation;
1144 OP (1) = relocation >> 8;
1145 OP (2) = relocation >> 16;
1146 }
1147 break;
1148
1149 case R_RX_ABS16:
d4cb0ea0 1150 UNSAFE_FOR_PID;
c7927a3c
NC		 1151 RX_STACK_POP (relocation);
1152 RANGE (-32768, 65535);
1153#if RX_OPCODE_BIG_ENDIAN
1154 OP (1) = relocation;
1155 OP (0) = relocation >> 8;
1156#else
1157 OP (0) = relocation;
1158 OP (1) = relocation >> 8;
1159#endif
1160 break;
1161
1162 case R_RX_ABS16_REV:
d4cb0ea0 1163 UNSAFE_FOR_PID;
c7927a3c
NC		 1164 RX_STACK_POP (relocation);
1165 RANGE (-32768, 65535);
1166#if RX_OPCODE_BIG_ENDIAN
1167 OP (0) = relocation;
1168 OP (1) = relocation >> 8;
1169#else
1170 OP (1) = relocation;
1171 OP (0) = relocation >> 8;
1172#endif
1173 break;
1174
1175 case R_RX_ABS16S_PCREL:
1176 case R_RX_ABS16S:
1177 RX_STACK_POP (relocation);
1178 RANGE (-32768, 32767);
1179 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1180 {
1181 OP (1) = relocation;
1182 OP (0) = relocation >> 8;
1183 }
1184 else
1185 {
1186 OP (0) = relocation;
1187 OP (1) = relocation >> 8;
1188 }
1189 break;
1190
1191 case R_RX_ABS16U:
d4cb0ea0 1192 UNSAFE_FOR_PID;
c7927a3c
NC		 1193 RX_STACK_POP (relocation);
1194 RANGE (0, 65536);
1195#if RX_OPCODE_BIG_ENDIAN
1196 OP (1) = relocation;
1197 OP (0) = relocation >> 8;
1198#else
1199 OP (0) = relocation;
1200 OP (1) = relocation >> 8;
1201#endif
1202 break;
1203
1204 case R_RX_ABS16UL:
d4cb0ea0 1205 UNSAFE_FOR_PID;
c7927a3c
NC		 1206 RX_STACK_POP (relocation);
1207 relocation >>= 2;
1208 RANGE (0, 65536);
1209#if RX_OPCODE_BIG_ENDIAN
1210 OP (1) = relocation;
1211 OP (0) = relocation >> 8;
1212#else
1213 OP (0) = relocation;
1214 OP (1) = relocation >> 8;
1215#endif
1216 break;
1217
1218 case R_RX_ABS16UW:
d4cb0ea0 1219 UNSAFE_FOR_PID;
c7927a3c
NC		 1220 RX_STACK_POP (relocation);
1221 relocation >>= 1;
1222 RANGE (0, 65536);
1223#if RX_OPCODE_BIG_ENDIAN
1224 OP (1) = relocation;
1225 OP (0) = relocation >> 8;
1226#else
1227 OP (0) = relocation;
1228 OP (1) = relocation >> 8;
1229#endif
1230 break;
1231
1232 case R_RX_ABS8:
d4cb0ea0 1233 UNSAFE_FOR_PID;
c7927a3c
NC		 1234 RX_STACK_POP (relocation);
1235 RANGE (-128, 255);
1236 OP (0) = relocation;
1237 break;
1238
1239 case R_RX_ABS8U:
d4cb0ea0 1240 UNSAFE_FOR_PID;
c7927a3c
NC		 1241 RX_STACK_POP (relocation);
1242 RANGE (0, 255);
1243 OP (0) = relocation;
1244 break;
1245
1246 case R_RX_ABS8UL:
d4cb0ea0 1247 UNSAFE_FOR_PID;
c7927a3c
NC		 1248 RX_STACK_POP (relocation);
1249 relocation >>= 2;
1250 RANGE (0, 255);
1251 OP (0) = relocation;
1252 break;
1253
1254 case R_RX_ABS8UW:
d4cb0ea0 1255 UNSAFE_FOR_PID;
c7927a3c
NC		 1256 RX_STACK_POP (relocation);
1257 relocation >>= 1;
1258 RANGE (0, 255);
1259 OP (0) = relocation;
1260 break;
1261
c7927a3c 1262 case R_RX_ABS8S:
d4cb0ea0 1263 UNSAFE_FOR_PID;
1a0670f3 1264 /* Fall through. */
d4cb0ea0 1265 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1266 RX_STACK_POP (relocation);
1267 RANGE (-128, 127);
1268 OP (0) = relocation;
1269 break;
1270
1271 case R_RX_SYM:
1272 if (r_symndx < symtab_hdr->sh_info)
1273 RX_STACK_PUSH (sec->output_section->vma
1274 + sec->output_offset
d4cb0ea0
NC		 1275 + sym->st_value
1276 + rel->r_addend);
c7927a3c
NC		 1277 else
1278 {
1279 if (h != NULL
1280 && (h->root.type == bfd_link_hash_defined
1281 || h->root.type == bfd_link_hash_defweak))
1282 RX_STACK_PUSH (h->root.u.def.value
1283 + sec->output_section->vma
d4cb0ea0
NC		 1284 + sec->output_offset
1285 + rel->r_addend);
c7927a3c 1286 else
38f14ab8
AM		 1287 _bfd_error_handler
1288 (_("warning: RX_SYM reloc with an unknown symbol"));
c7927a3c
NC		 1289 }
1290 break;
1291
1292 case R_RX_OPneg:
1293 {
1294 int32_t tmp;
1295
ee181c72 1296 saw_subtract = TRUE;
c7927a3c
NC		 1297 RX_STACK_POP (tmp);
1298 tmp = - tmp;
1299 RX_STACK_PUSH (tmp);
1300 }
1301 break;
1302
1303 case R_RX_OPadd:
1304 {
1305 int32_t tmp1, tmp2;
1306
1307 RX_STACK_POP (tmp1);
1308 RX_STACK_POP (tmp2);
1309 tmp1 += tmp2;
1310 RX_STACK_PUSH (tmp1);
1311 }
1312 break;
1313
1314 case R_RX_OPsub:
1315 {
1316 int32_t tmp1, tmp2;
1317
d4cb0ea0 1318 saw_subtract = TRUE;
c7927a3c
NC		 1319 RX_STACK_POP (tmp1);
1320 RX_STACK_POP (tmp2);
1321 tmp2 -= tmp1;
1322 RX_STACK_PUSH (tmp2);
1323 }
1324 break;
1325
1326 case R_RX_OPmul:
1327 {
1328 int32_t tmp1, tmp2;
1329
1330 RX_STACK_POP (tmp1);
1331 RX_STACK_POP (tmp2);
1332 tmp1 *= tmp2;
1333 RX_STACK_PUSH (tmp1);
1334 }
1335 break;
1336
1337 case R_RX_OPdiv:
1338 {
1339 int32_t tmp1, tmp2;
1340
1341 RX_STACK_POP (tmp1);
1342 RX_STACK_POP (tmp2);
1343 tmp1 /= tmp2;
1344 RX_STACK_PUSH (tmp1);
1345 }
1346 break;
1347
1348 case R_RX_OPshla:
1349 {
1350 int32_t tmp1, tmp2;
1351
1352 RX_STACK_POP (tmp1);
1353 RX_STACK_POP (tmp2);
1354 tmp1 <<= tmp2;
1355 RX_STACK_PUSH (tmp1);
1356 }
1357 break;
1358
1359 case R_RX_OPshra:
1360 {
1361 int32_t tmp1, tmp2;
1362
1363 RX_STACK_POP (tmp1);
1364 RX_STACK_POP (tmp2);
1365 tmp1 >>= tmp2;
1366 RX_STACK_PUSH (tmp1);
1367 }
1368 break;
1369
1370 case R_RX_OPsctsize:
1371 RX_STACK_PUSH (input_section->size);
1372 break;
1373
1374 case R_RX_OPscttop:
1375 RX_STACK_PUSH (input_section->output_section->vma);
1376 break;
1377
1378 case R_RX_OPand:
1379 {
1380 int32_t tmp1, tmp2;
1381
1382 RX_STACK_POP (tmp1);
1383 RX_STACK_POP (tmp2);
1384 tmp1 &= tmp2;
1385 RX_STACK_PUSH (tmp1);
1386 }
1387 break;
1388
1389 case R_RX_OPor:
1390 {
1391 int32_t tmp1, tmp2;
1392
1393 RX_STACK_POP (tmp1);
1394 RX_STACK_POP (tmp2);
1395 tmp1 |= tmp2;
1396 RX_STACK_PUSH (tmp1);
1397 }
1398 break;
1399
1400 case R_RX_OPxor:
1401 {
1402 int32_t tmp1, tmp2;
1403
1404 RX_STACK_POP (tmp1);
1405 RX_STACK_POP (tmp2);
1406 tmp1 ^= tmp2;
1407 RX_STACK_PUSH (tmp1);
1408 }
1409 break;
1410
1411 case R_RX_OPnot:
1412 {
1413 int32_t tmp;
1414
1415 RX_STACK_POP (tmp);
1416 tmp = ~ tmp;
1417 RX_STACK_PUSH (tmp);
1418 }
1419 break;
1420
1421 case R_RX_OPmod:
1422 {
1423 int32_t tmp1, tmp2;
1424
1425 RX_STACK_POP (tmp1);
1426 RX_STACK_POP (tmp2);
1427 tmp1 %= tmp2;
1428 RX_STACK_PUSH (tmp1);
1429 }
1430 break;
1431
1432 case R_RX_OPromtop:
1a72702b 1433 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1434 break;
1435
1436 case R_RX_OPramtop:
1a72702b 1437 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1438 break;
1439
1440 default:
1441 r = bfd_reloc_notsupported;
1442 break;
1443 }
1444
1445 if (r != bfd_reloc_ok)
1446 {
1447 const char * msg = NULL;
1448
1449 switch (r)
1450 {
1451 case bfd_reloc_overflow:
1452 /* Catch the case of a missing function declaration
1453 and emit a more helpful error message. */
1454 if (r_type == R_RX_DIR24S_PCREL)
695344c0 1455 /* xgettext:c-format */
871b3ab2 1456 msg = _("%pB(%pA): error: call to undefined function '%s'");
c7927a3c 1457 else
1a72702b 1458 (*info->callbacks->reloc_overflow)
c7927a3c
NC		 1459 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1460 input_bfd, input_section, rel->r_offset);
1461 break;
1462
1463 case bfd_reloc_undefined:
1a72702b
AM		 1464 (*info->callbacks->undefined_symbol)
1465 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
c7927a3c
NC		 1466 break;
1467
1468 case bfd_reloc_other:
695344c0 1469 /* xgettext:c-format */
871b3ab2 1470 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
c7927a3c
NC		 1471 break;
1472
1473 case bfd_reloc_outofrange:
695344c0 1474 /* xgettext:c-format */
871b3ab2 1475 msg = _("%pB(%pA): internal error: out of range error");
c7927a3c
NC		 1476 break;
1477
1478 case bfd_reloc_notsupported:
695344c0 1479 /* xgettext:c-format */
871b3ab2 1480 msg = _("%pB(%pA): internal error: unsupported relocation error");
c7927a3c
NC		 1481 break;
1482
1483 case bfd_reloc_dangerous:
695344c0 1484 /* xgettext:c-format */
871b3ab2 1485 msg = _("%pB(%pA): internal error: dangerous relocation");
c7927a3c
NC		 1486 break;
1487
1488 default:
695344c0 1489 /* xgettext:c-format */
871b3ab2 1490 msg = _("%pB(%pA): internal error: unknown error");
c7927a3c
NC		 1491 break;
1492 }
1493
1494 if (msg)
1495 _bfd_error_handler (msg, input_bfd, input_section, name);
c7927a3c
NC		 1496 }
1497 }
1498
1499 return TRUE;
1500}
1501\f
1502/* Relaxation Support. */
1503
1504/* Progression of relocations from largest operand size to smallest
1505 operand size. */
1506
1507static int
1508next_smaller_reloc (int r)
1509{
1510 switch (r)
1511 {
1512 case R_RX_DIR32: return R_RX_DIR24S;
1513 case R_RX_DIR24S: return R_RX_DIR16S;
1514 case R_RX_DIR16S: return R_RX_DIR8S;
1515 case R_RX_DIR8S: return R_RX_NONE;
1516
1517 case R_RX_DIR16: return R_RX_DIR8;
1518 case R_RX_DIR8: return R_RX_NONE;
1519
1520 case R_RX_DIR16U: return R_RX_DIR8U;
1521 case R_RX_DIR8U: return R_RX_NONE;
1522
1523 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1524 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1525 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1526
1527 case R_RX_DIR16UL: return R_RX_DIR8UL;
1528 case R_RX_DIR8UL: return R_RX_NONE;
1529 case R_RX_DIR16UW: return R_RX_DIR8UW;
1530 case R_RX_DIR8UW: return R_RX_NONE;
1531
1532 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1533 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1534 case R_RX_RH_16_OP: return R_RX_DIR8;
1535
1536 case R_RX_ABS32: return R_RX_ABS24S;
1537 case R_RX_ABS24S: return R_RX_ABS16S;
1538 case R_RX_ABS16: return R_RX_ABS8;
1539 case R_RX_ABS16U: return R_RX_ABS8U;
1540 case R_RX_ABS16S: return R_RX_ABS8S;
1541 case R_RX_ABS8: return R_RX_NONE;
1542 case R_RX_ABS8U: return R_RX_NONE;
1543 case R_RX_ABS8S: return R_RX_NONE;
1544 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1545 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1546 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1547 case R_RX_ABS16UL: return R_RX_ABS8UL;
1548 case R_RX_ABS16UW: return R_RX_ABS8UW;
1549 case R_RX_ABS8UL: return R_RX_NONE;
1550 case R_RX_ABS8UW: return R_RX_NONE;
1551 }
1552 return r;
1553};
1554
1555/* Delete some bytes from a section while relaxing. */
1556
1557static bfd_boolean
1558elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
5ee4a06a
NC		 1559 Elf_Internal_Rela *alignment_rel, int force_snip,
1560 Elf_Internal_Rela *irelstart)
c7927a3c
NC		 1561{
1562 Elf_Internal_Shdr * symtab_hdr;
07d6d2b8
AM		 1563 unsigned int sec_shndx;
1564 bfd_byte * contents;
c7927a3c
NC		 1565 Elf_Internal_Rela * irel;
1566 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1567 Elf_Internal_Sym * isym;
1568 Elf_Internal_Sym * isymend;
07d6d2b8
AM		 1569 bfd_vma toaddr;
1570 unsigned int symcount;
c7927a3c
NC		 1571 struct elf_link_hash_entry ** sym_hashes;
1572 struct elf_link_hash_entry ** end_hashes;
1573
1574 if (!alignment_rel)
1575 force_snip = 1;
1576
1577 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1578
1579 contents = elf_section_data (sec)->this_hdr.contents;
1580
1581 /* The deletion must stop at the next alignment boundary, if
1582 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1583 toaddr = sec->size;
1584 if (alignment_rel)
1585 toaddr = alignment_rel->r_offset;
1586
07d6d2b8 1587 BFD_ASSERT (toaddr > addr);
9c761a55 1588
c7927a3c
NC		 1589 /* Actually delete the bytes. */
1590 memmove (contents + addr, contents + addr + count,
1591 (size_t) (toaddr - addr - count));
1592
1593 /* If we don't have an alignment marker to worry about, we can just
1594 shrink the section. Otherwise, we have to fill in the newly
1595 created gap with NOP insns (0x03). */
1596 if (force_snip)
1597 sec->size -= count;
1598 else
1599 memset (contents + toaddr - count, 0x03, count);
1600
5ee4a06a
NC		 1601 irel = irelstart;
1602 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1603 irelend = irel + sec->reloc_count;
1604
c7927a3c 1605 /* Adjust all the relocs. */
9c761a55 1606 for (; irel < irelend; irel++)
c7927a3c
NC		 1607 {
1608 /* Get the new reloc address. */
1609 if (irel->r_offset > addr
1610 && (irel->r_offset < toaddr
1611 || (force_snip && irel->r_offset == toaddr)))
1612 irel->r_offset -= count;
1613
1614 /* If we see an ALIGN marker at the end of the gap, we move it
1615 to the beginning of the gap, since marking these gaps is what
1616 they're for. */
1617 if (irel->r_offset == toaddr
1618 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1619 && irel->r_addend & RX_RELAXA_ALIGN)
1620 irel->r_offset -= count;
1621 }
1622
1623 /* Adjust the local symbols defined in this section. */
1624 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1625 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1626 isymend = isym + symtab_hdr->sh_info;
1627
1628 for (; isym < isymend; isym++)
1629 {
1630 /* If the symbol is in the range of memory we just moved, we
1631 have to adjust its value. */
1632 if (isym->st_shndx == sec_shndx
1633 && isym->st_value > addr
1634 && isym->st_value < toaddr)
1635 isym->st_value -= count;
1636
1637 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1638 *end* is in the moved bytes but it's *start* isn't), then we
1639 must adjust its size. */
1640 if (isym->st_shndx == sec_shndx
1641 && isym->st_value < addr
1642 && isym->st_value + isym->st_size > addr
1643 && isym->st_value + isym->st_size < toaddr)
1644 isym->st_size -= count;
1645 }
1646
1647 /* Now adjust the global symbols defined in this section. */
1648 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1649 - symtab_hdr->sh_info);
1650 sym_hashes = elf_sym_hashes (abfd);
1651 end_hashes = sym_hashes + symcount;
1652
1653 for (; sym_hashes < end_hashes; sym_hashes++)
1654 {
1655 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1656
1657 if ((sym_hash->root.type == bfd_link_hash_defined
1658 || sym_hash->root.type == bfd_link_hash_defweak)
1659 && sym_hash->root.u.def.section == sec)
1660 {
1661 /* As above, adjust the value if needed. */
1662 if (sym_hash->root.u.def.value > addr
1663 && sym_hash->root.u.def.value < toaddr)
1664 sym_hash->root.u.def.value -= count;
1665
1666 /* As above, adjust the size if needed. */
1667 if (sym_hash->root.u.def.value < addr
1668 && sym_hash->root.u.def.value + sym_hash->size > addr
1669 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1670 sym_hash->size -= count;
1671 }
1672 }
1673
1674 return TRUE;
1675}
1676
1677/* Used to sort relocs by address. If relocs have the same address,
1678 we maintain their relative order, except that R_RX_RH_RELAX
1679 alignment relocs must be the first reloc for any given address. */
1680
1681static void
1682reloc_bubblesort (Elf_Internal_Rela * r, int count)
1683{
1684 int i;
1685 bfd_boolean again;
1686 bfd_boolean swappit;
1687
1688 /* This is almost a classic bubblesort. It's the slowest sort, but
1689 we're taking advantage of the fact that the relocations are
1690 mostly in order already (the assembler emits them that way) and
1691 we need relocs with the same address to remain in the same
1692 relative order. */
1693 again = TRUE;
1694 while (again)
1695 {
1696 again = FALSE;
1697 for (i = 0; i < count - 1; i ++)
1698 {
1699 if (r[i].r_offset > r[i + 1].r_offset)
1700 swappit = TRUE;
1701 else if (r[i].r_offset < r[i + 1].r_offset)
1702 swappit = FALSE;
1703 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1704 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1705 swappit = TRUE;
1706 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1707 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1708 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1709 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1710 swappit = TRUE;
1711 else
1712 swappit = FALSE;
1713
1714 if (swappit)
1715 {
1716 Elf_Internal_Rela tmp;
1717
1718 tmp = r[i];
1719 r[i] = r[i + 1];
1720 r[i + 1] = tmp;
1721 /* If we do move a reloc back, re-scan to see if it
1722 needs to be moved even further back. This avoids
1723 most of the O(n^2) behavior for our cases. */
1724 if (i > 0)
1725 i -= 2;
1726 again = TRUE;
1727 }
1728 }
1729 }
1730}
1731
1732
1733#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1734 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1735 lrel, abfd, sec, link_info, scale)
1736
1737static bfd_vma
07d6d2b8 1738rx_offset_for_reloc (bfd * abfd,
c7927a3c
NC		 1739 Elf_Internal_Rela * rel,
1740 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1741 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
07d6d2b8 1742 Elf_Internal_Sym * intsyms,
c7927a3c 1743 Elf_Internal_Rela ** lrel,
07d6d2b8
AM		 1744 bfd * input_bfd,
1745 asection * input_section,
c7927a3c 1746 struct bfd_link_info * info,
07d6d2b8 1747 int * scale)
c7927a3c
NC		 1748{
1749 bfd_vma symval;
1750 bfd_reloc_status_type r;
1751
1752 *scale = 1;
1753
1754 /* REL is the first of 1..N relocations. We compute the symbol
1755 value for each relocation, then combine them if needed. LREL
1756 gets a pointer to the last relocation used. */
1757 while (1)
1758 {
1759 int32_t tmp1, tmp2;
1760
1761 /* Get the value of the symbol referred to by the reloc. */
1762 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1763 {
1764 /* A local symbol. */
1765 Elf_Internal_Sym *isym;
c7927a3c
NC		 1766 asection *ssec;
1767
1768 isym = intsyms + ELF32_R_SYM (rel->r_info);
1769
1770 if (isym->st_shndx == SHN_UNDEF)
1771 ssec = bfd_und_section_ptr;
1772 else if (isym->st_shndx == SHN_ABS)
1773 ssec = bfd_abs_section_ptr;
1774 else if (isym->st_shndx == SHN_COMMON)
1775 ssec = bfd_com_section_ptr;
1776 else
1777 ssec = bfd_section_from_elf_index (abfd,
1778 isym->st_shndx);
1779
c7927a3c
NC		 1780 /* Initial symbol value. */
1781 symval = isym->st_value;
1782
1783 /* GAS may have made this symbol relative to a section, in
1784 which case, we have to add the addend to find the
1785 symbol. */
1786 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1787 symval += rel->r_addend;
1788
1789 if (ssec)
1790 {
1791 if ((ssec->flags & SEC_MERGE)
dbaa2011 1792 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1793 symval = _bfd_merged_section_offset (abfd, & ssec,
1794 elf_section_data (ssec)->sec_info,
1795 symval);
1796 }
1797
1798 /* Now make the offset relative to where the linker is putting it. */
1799 if (ssec)
1800 symval +=
1801 ssec->output_section->vma + ssec->output_offset;
1802
1803 symval += rel->r_addend;
1804 }
1805 else
1806 {
1807 unsigned long indx;
1808 struct elf_link_hash_entry * h;
1809
1810 /* An external symbol. */
1811 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1812 h = elf_sym_hashes (abfd)[indx];
1813 BFD_ASSERT (h != NULL);
1814
1815 if (h->root.type != bfd_link_hash_defined
1816 && h->root.type != bfd_link_hash_defweak)
1817 {
1818 /* This appears to be a reference to an undefined
1819 symbol. Just ignore it--it will be caught by the
1820 regular reloc processing. */
1821 if (lrel)
1822 *lrel = rel;
1823 return 0;
1824 }
1825
1826 symval = (h->root.u.def.value
1827 + h->root.u.def.section->output_section->vma
1828 + h->root.u.def.section->output_offset);
1829
1830 symval += rel->r_addend;
1831 }
1832
1833 switch (ELF32_R_TYPE (rel->r_info))
1834 {
1835 case R_RX_SYM:
1836 RX_STACK_PUSH (symval);
1837 break;
1838
1839 case R_RX_OPneg:
1840 RX_STACK_POP (tmp1);
1841 tmp1 = - tmp1;
1842 RX_STACK_PUSH (tmp1);
1843 break;
1844
1845 case R_RX_OPadd:
1846 RX_STACK_POP (tmp1);
1847 RX_STACK_POP (tmp2);
1848 tmp1 += tmp2;
1849 RX_STACK_PUSH (tmp1);
1850 break;
1851
1852 case R_RX_OPsub:
1853 RX_STACK_POP (tmp1);
1854 RX_STACK_POP (tmp2);
1855 tmp2 -= tmp1;
1856 RX_STACK_PUSH (tmp2);
1857 break;
1858
1859 case R_RX_OPmul:
1860 RX_STACK_POP (tmp1);
1861 RX_STACK_POP (tmp2);
1862 tmp1 *= tmp2;
1863 RX_STACK_PUSH (tmp1);
1864 break;
1865
1866 case R_RX_OPdiv:
1867 RX_STACK_POP (tmp1);
1868 RX_STACK_POP (tmp2);
1869 tmp1 /= tmp2;
1870 RX_STACK_PUSH (tmp1);
1871 break;
1872
1873 case R_RX_OPshla:
1874 RX_STACK_POP (tmp1);
1875 RX_STACK_POP (tmp2);
1876 tmp1 <<= tmp2;
1877 RX_STACK_PUSH (tmp1);
1878 break;
1879
1880 case R_RX_OPshra:
1881 RX_STACK_POP (tmp1);
1882 RX_STACK_POP (tmp2);
1883 tmp1 >>= tmp2;
1884 RX_STACK_PUSH (tmp1);
1885 break;
1886
1887 case R_RX_OPsctsize:
1888 RX_STACK_PUSH (input_section->size);
1889 break;
1890
1891 case R_RX_OPscttop:
1892 RX_STACK_PUSH (input_section->output_section->vma);
1893 break;
1894
1895 case R_RX_OPand:
1896 RX_STACK_POP (tmp1);
1897 RX_STACK_POP (tmp2);
1898 tmp1 &= tmp2;
1899 RX_STACK_PUSH (tmp1);
1900 break;
1901
1902 case R_RX_OPor:
1903 RX_STACK_POP (tmp1);
1904 RX_STACK_POP (tmp2);
1905 tmp1 |= tmp2;
1906 RX_STACK_PUSH (tmp1);
1907 break;
1908
1909 case R_RX_OPxor:
1910 RX_STACK_POP (tmp1);
1911 RX_STACK_POP (tmp2);
1912 tmp1 ^= tmp2;
1913 RX_STACK_PUSH (tmp1);
1914 break;
1915
1916 case R_RX_OPnot:
1917 RX_STACK_POP (tmp1);
1918 tmp1 = ~ tmp1;
1919 RX_STACK_PUSH (tmp1);
1920 break;
1921
1922 case R_RX_OPmod:
1923 RX_STACK_POP (tmp1);
1924 RX_STACK_POP (tmp2);
1925 tmp1 %= tmp2;
1926 RX_STACK_PUSH (tmp1);
1927 break;
1928
1929 case R_RX_OPromtop:
1a72702b 1930 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1931 break;
1932
1933 case R_RX_OPramtop:
1a72702b 1934 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1935 break;
1936
1937 case R_RX_DIR16UL:
1938 case R_RX_DIR8UL:
1939 case R_RX_ABS16UL:
1940 case R_RX_ABS8UL:
1941 if (rx_stack_top)
1942 RX_STACK_POP (symval);
1943 if (lrel)
1944 *lrel = rel;
1945 *scale = 4;
1946 return symval;
1947
1948 case R_RX_DIR16UW:
1949 case R_RX_DIR8UW:
1950 case R_RX_ABS16UW:
1951 case R_RX_ABS8UW:
1952 if (rx_stack_top)
1953 RX_STACK_POP (symval);
1954 if (lrel)
1955 *lrel = rel;
1956 *scale = 2;
1957 return symval;
1958
1959 default:
1960 if (rx_stack_top)
1961 RX_STACK_POP (symval);
1962 if (lrel)
1963 *lrel = rel;
1964 return symval;
1965 }
1966
1967 rel ++;
1968 }
1a72702b
AM		 1969 /* FIXME. */
1970 (void) r;
c7927a3c
NC		 1971}
1972
1973static void
1974move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1975{
1976 bfd_vma old_offset = srel->r_offset;
1977
1978 irel ++;
1979 while (irel <= srel)
1980 {
1981 if (irel->r_offset == old_offset)
1982 irel->r_offset += delta;
1983 irel ++;
1984 }
1985}
1986
1987/* Relax one section. */
1988
1989static bfd_boolean
07d6d2b8
AM		 1990elf32_rx_relax_section (bfd * abfd,
1991 asection * sec,
c7927a3c 1992 struct bfd_link_info * link_info,
07d6d2b8
AM		 1993 bfd_boolean * again,
1994 bfd_boolean allow_pcrel3)
c7927a3c
NC		 1995{
1996 Elf_Internal_Shdr * symtab_hdr;
1997 Elf_Internal_Shdr * shndx_hdr;
1998 Elf_Internal_Rela * internal_relocs;
c7927a3c
NC		 1999 Elf_Internal_Rela * irel;
2000 Elf_Internal_Rela * srel;
2001 Elf_Internal_Rela * irelend;
2002 Elf_Internal_Rela * next_alignment;
2003 Elf_Internal_Rela * prev_alignment;
07d6d2b8
AM		 2004 bfd_byte * contents = NULL;
2005 bfd_byte * free_contents = NULL;
c7927a3c
NC		 2006 Elf_Internal_Sym * intsyms = NULL;
2007 Elf_Internal_Sym * free_intsyms = NULL;
2008 Elf_External_Sym_Shndx * shndx_buf = NULL;
2009 bfd_vma pc;
2010 bfd_vma sec_start;
c7927a3c
NC		 2011 bfd_vma symval = 0;
2012 int pcrel = 0;
2013 int code = 0;
2014 int section_alignment_glue;
2015 /* how much to scale the relocation by - 1, 2, or 4. */
2016 int scale;
2017
2018 /* Assume nothing changes. */
2019 *again = FALSE;
2020
2021 /* We don't have to do anything for a relocatable link, if
2022 this section does not have relocs, or if this is not a
2023 code section. */
0e1862bb 2024 if (bfd_link_relocatable (link_info)
c7927a3c
NC		 2025 || (sec->flags & SEC_RELOC) == 0
2026 || sec->reloc_count == 0
2027 || (sec->flags & SEC_CODE) == 0)
2028 return TRUE;
2029
6a40cf0c
NC		 2030 symtab_hdr = & elf_symtab_hdr (abfd);
2031 if (elf_symtab_shndx_list (abfd))
2032 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2033 else
2034 shndx_hdr = NULL;
c7927a3c
NC		 2035
2036 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2037
2038 /* Get the section contents. */
2039 if (elf_section_data (sec)->this_hdr.contents != NULL)
2040 contents = elf_section_data (sec)->this_hdr.contents;
2041 /* Go get them off disk. */
2042 else
2043 {
2044 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2045 goto error_return;
2046 elf_section_data (sec)->this_hdr.contents = contents;
2047 }
2048
2049 /* Read this BFD's symbols. */
2050 /* Get cached copy if it exists. */
2051 if (symtab_hdr->contents != NULL)
2052 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2053 else
2054 {
2055 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2056 symtab_hdr->contents = (bfd_byte *) intsyms;
2057 }
2058
6a40cf0c 2059 if (shndx_hdr && shndx_hdr->sh_size != 0)
c7927a3c 2060 {
1f4361a7 2061 size_t amt;
c7927a3c 2062
1f4361a7
AM		 2063 if (_bfd_mul_overflow (symtab_hdr->sh_info,
2064 sizeof (Elf_External_Sym_Shndx), &amt))
2065 {
2066 bfd_set_error (bfd_error_file_too_big);
2067 goto error_return;
2068 }
c7927a3c
NC		 2069 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2070 if (shndx_buf == NULL)
2071 goto error_return;
2072 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2073 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2074 goto error_return;
2075 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2076 }
2077
2078 /* Get a copy of the native relocations. */
5ee4a06a
NC		 2079 /* Note - we ignore the setting of link_info->keep_memory when reading
2080 in these relocs. We have to maintain a permanent copy of the relocs
2081 because we are going to walk over them multiple times, adjusting them
2082 as bytes are deleted from the section, and with this relaxation
2083 function itself being called multiple times on the same section... */
2084 internal_relocs = _bfd_elf_link_read_relocs
2085 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE);
c7927a3c
NC		 2086 if (internal_relocs == NULL)
2087 goto error_return;
c7927a3c
NC		 2088
2089 /* The RL_ relocs must be just before the operand relocs they go
2090 with, so we must sort them to guarantee this. We use bubblesort
2091 instead of qsort so we can guarantee that relocs with the same
2092 address remain in the same relative order. */
2093 reloc_bubblesort (internal_relocs, sec->reloc_count);
2094
2095 /* Walk through them looking for relaxing opportunities. */
2096 irelend = internal_relocs + sec->reloc_count;
2097
2098 /* This will either be NULL or a pointer to the next alignment
2099 relocation. */
2100 next_alignment = internal_relocs;
2101 /* This will be the previous alignment, although at first it points
2102 to the first real relocation. */
2103 prev_alignment = internal_relocs;
2104
2105 /* We calculate worst case shrinkage caused by alignment directives.
2106 No fool-proof, but better than either ignoring the problem or
2107 doing heavy duty analysis of all the alignment markers in all
2108 input sections. */
2109 section_alignment_glue = 0;
2110 for (irel = internal_relocs; irel < irelend; irel++)
2111 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2112 && irel->r_addend & RX_RELAXA_ALIGN)
2113 {
2114 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2115
2116 if (section_alignment_glue < this_glue)
2117 section_alignment_glue = this_glue;
2118 }
2119 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2120 shrinkage. */
2121 section_alignment_glue *= 2;
2122
2123 for (irel = internal_relocs; irel < irelend; irel++)
2124 {
2125 unsigned char *insn;
2126 int nrelocs;
2127
2128 /* The insns we care about are all marked with one of these. */
2129 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2130 continue;
2131
2132 if (irel->r_addend & RX_RELAXA_ALIGN
2133 || next_alignment == internal_relocs)
2134 {
2135 /* When we delete bytes, we need to maintain all the alignments
2136 indicated. In addition, we need to be careful about relaxing
2137 jumps across alignment boundaries - these displacements
2138 *grow* when we delete bytes. For now, don't shrink
2139 displacements across an alignment boundary, just in case.
2140 Note that this only affects relocations to the same
2141 section. */
2142 prev_alignment = next_alignment;
2143 next_alignment += 2;
2144 while (next_alignment < irelend
2145 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2146 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2147 next_alignment ++;
2148 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2149 next_alignment = NULL;
2150 }
2151
2152 /* When we hit alignment markers, see if we've shrunk enough
2153 before them to reduce the gap without violating the alignment
2154 requirements. */
2155 if (irel->r_addend & RX_RELAXA_ALIGN)
2156 {
2157 /* At this point, the next relocation *should* be the ELIGN
2158 end marker. */
2159 Elf_Internal_Rela *erel = irel + 1;
2160 unsigned int alignment, nbytes;
2161
2162 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2163 continue;
2164 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2165 continue;
2166
2167 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2168
2169 if (erel->r_offset - irel->r_offset < alignment)
2170 continue;
2171
2172 nbytes = erel->r_offset - irel->r_offset;
2173 nbytes /= alignment;
2174 nbytes *= alignment;
2175
2176 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
5ee4a06a 2177 erel->r_offset == sec->size, internal_relocs);
c7927a3c
NC		 2178 *again = TRUE;
2179
2180 continue;
2181 }
2182
2183 if (irel->r_addend & RX_RELAXA_ELIGN)
2184 continue;
2185
2186 insn = contents + irel->r_offset;
2187
2188 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2189
2190 /* At this point, we have an insn that is a candidate for linker
2191 relaxation. There are NRELOCS relocs following that may be
2192 relaxed, although each reloc may be made of more than one
2193 reloc entry (such as gp-rel symbols). */
2194
2195 /* Get the value of the symbol referred to by the reloc. Just
07d6d2b8
AM		 2196 in case this is the last reloc in the list, use the RL's
2197 addend to choose between this reloc (no addend) or the next
2198 (yes addend, which means at least one following reloc). */
c7927a3c
NC		 2199
2200 /* srel points to the "current" reloction for this insn -
2201 actually the last reloc for a given operand, which is the one
2202 we need to update. We check the relaxations in the same
2203 order that the relocations happen, so we'll just push it
2204 along as we go. */
2205 srel = irel;
2206
2207 pc = sec->output_section->vma + sec->output_offset
2208 + srel->r_offset;
2209
2210#define GET_RELOC \
2211 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2212 pcrel = symval - pc + srel->r_addend; \
2213 nrelocs --;
2214
2215#define SNIPNR(offset, nbytes) \
5ee4a06a 2216 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
c7927a3c 2217#define SNIP(offset, nbytes, newtype) \
07d6d2b8 2218 SNIPNR (offset, nbytes); \
c7927a3c
NC		 2219 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2220
2221 /* The order of these bit tests must match the order that the
2222 relocs appear in. Since we sorted those by offset, we can
2223 predict them. */
2224
2225 /* Note that the numbers in, say, DSP6 are the bit offsets of
2226 the code fields that describe the operand. Bits number 0 for
2227 the MSB of insn[0]. */
2228
2229 /* DSP* codes:
2230 0 00 [reg]
2231 1 01 dsp:8[reg]
2232 2 10 dsp:16[reg]
2233 3 11 reg */
2234 if (irel->r_addend & RX_RELAXA_DSP6)
2235 {
2236 GET_RELOC;
2237
2238 code = insn[0] & 3;
2239 if (code == 2 && symval/scale <= 255)
2240 {
2241 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2242 insn[0] &= 0xfc;
2243 insn[0] |= 0x01;
2244 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2245 if (newrel != ELF32_R_TYPE (srel->r_info))
2246 {
2247 SNIP (3, 1, newrel);
2248 *again = TRUE;
2249 }
2250 }
2251
2252 else if (code == 1 && symval == 0)
2253 {
2254 insn[0] &= 0xfc;
2255 SNIP (2, 1, R_RX_NONE);
2256 *again = TRUE;
2257 }
2258
2259 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2260 else if (code == 1 && symval/scale <= 31
2261 /* Decodable bits. */
2262 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2263 /* Width. */
eb8c5f3f 2264 && (insn[0] & 0x30) != 0x30
91d6fa6a 2265 /* Register MSBs. */
c7927a3c
NC		 2266 && (insn[1] & 0x88) == 0x00)
2267 {
2268 int newrel = 0;
2269
2270 insn[0] = 0x88 | (insn[0] & 0x30);
2271 /* The register fields are in the right place already. */
2272
2273 /* We can't relax this new opcode. */
2274 irel->r_addend = 0;
2275
2276 switch ((insn[0] & 0x30) >> 4)
2277 {
2278 case 0:
2279 newrel = R_RX_RH_ABS5p5B;
2280 break;
2281 case 1:
2282 newrel = R_RX_RH_ABS5p5W;
2283 break;
2284 case 2:
2285 newrel = R_RX_RH_ABS5p5L;
2286 break;
2287 }
2288
2289 move_reloc (irel, srel, -2);
2290 SNIP (2, 1, newrel);
2291 }
2292
2293 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2294 else if (code == 1 && symval/scale <= 31
2295 /* Decodable bits. */
2296 && (insn[0] & 0xf8) == 0x58
2297 /* Register MSBs. */
2298 && (insn[1] & 0x88) == 0x00)
2299 {
2300 int newrel = 0;
2301
2302 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2303 /* The register fields are in the right place already. */
2304
2305 /* We can't relax this new opcode. */
2306 irel->r_addend = 0;
2307
2308 switch ((insn[0] & 0x08) >> 3)
2309 {
2310 case 0:
2311 newrel = R_RX_RH_ABS5p5B;
2312 break;
2313 case 1:
2314 newrel = R_RX_RH_ABS5p5W;
2315 break;
2316 }
2317
2318 move_reloc (irel, srel, -2);
2319 SNIP (2, 1, newrel);
2320 }
2321 }
2322
2323 /* A DSP4 operand always follows a DSP6 operand, even if there's
2324 no relocation for it. We have to read the code out of the
2325 opcode to calculate the offset of the operand. */
2326 if (irel->r_addend & RX_RELAXA_DSP4)
2327 {
2328 int code6, offset = 0;
2329
2330 GET_RELOC;
2331
2332 code6 = insn[0] & 0x03;
2333 switch (code6)
2334 {
2335 case 0: offset = 2; break;
2336 case 1: offset = 3; break;
2337 case 2: offset = 4; break;
2338 case 3: offset = 2; break;
2339 }
2340
2341 code = (insn[0] & 0x0c) >> 2;
2342
2343 if (code == 2 && symval / scale <= 255)
2344 {
2345 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2346
2347 insn[0] &= 0xf3;
2348 insn[0] |= 0x04;
2349 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2350 if (newrel != ELF32_R_TYPE (srel->r_info))
2351 {
2352 SNIP (offset+1, 1, newrel);
2353 *again = TRUE;
2354 }
2355 }
2356
2357 else if (code == 1 && symval == 0)
2358 {
2359 insn[0] &= 0xf3;
2360 SNIP (offset, 1, R_RX_NONE);
2361 *again = TRUE;
2362 }
2363 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2364 else if (code == 1 && symval/scale <= 31
2365 /* Decodable bits. */
2366 && (insn[0] & 0xc3) == 0xc3
2367 /* Width. */
eb8c5f3f 2368 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2369 /* Register MSBs. */
2370 && (insn[1] & 0x88) == 0x00)
2371 {
2372 int newrel = 0;
2373
2374 insn[0] = 0x80 | (insn[0] & 0x30);
2375 /* The register fields are in the right place already. */
2376
2377 /* We can't relax this new opcode. */
2378 irel->r_addend = 0;
2379
2380 switch ((insn[0] & 0x30) >> 4)
2381 {
2382 case 0:
2383 newrel = R_RX_RH_ABS5p5B;
2384 break;
2385 case 1:
2386 newrel = R_RX_RH_ABS5p5W;
2387 break;
2388 case 2:
2389 newrel = R_RX_RH_ABS5p5L;
2390 break;
2391 }
2392
2393 move_reloc (irel, srel, -2);
2394 SNIP (2, 1, newrel);
2395 }
2396 }
2397
2398 /* These always occur alone, but the offset depends on whether
2399 it's a MEMEX opcode (0x06) or not. */
2400 if (irel->r_addend & RX_RELAXA_DSP14)
2401 {
2402 int offset;
2403 GET_RELOC;
2404
2405 if (insn[0] == 0x06)
2406 offset = 3;
2407 else
2408 offset = 4;
2409
2410 code = insn[1] & 3;
2411
2412 if (code == 2 && symval / scale <= 255)
2413 {
2414 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2415
2416 insn[1] &= 0xfc;
2417 insn[1] |= 0x01;
2418 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2419 if (newrel != ELF32_R_TYPE (srel->r_info))
2420 {
2421 SNIP (offset, 1, newrel);
2422 *again = TRUE;
2423 }
2424 }
2425 else if (code == 1 && symval == 0)
2426 {
2427 insn[1] &= 0xfc;
2428 SNIP (offset, 1, R_RX_NONE);
2429 *again = TRUE;
2430 }
2431 }
2432
2433 /* IMM* codes:
2434 0 00 imm:32
2435 1 01 simm:8
2436 2 10 simm:16
2437 3 11 simm:24. */
2438
2439 /* These always occur alone. */
2440 if (irel->r_addend & RX_RELAXA_IMM6)
2441 {
2442 long ssymval;
2443
2444 GET_RELOC;
2445
2446 /* These relocations sign-extend, so we must do signed compares. */
2447 ssymval = (long) symval;
2448
2449 code = insn[0] & 0x03;
2450
2451 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2452 {
2453 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2454
2455 insn[0] &= 0xfc;
2456 insn[0] |= 0x03;
2457 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2458 if (newrel != ELF32_R_TYPE (srel->r_info))
2459 {
2460 SNIP (2, 1, newrel);
2461 *again = TRUE;
2462 }
2463 }
2464
2465 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2466 {
2467 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2468
2469 insn[0] &= 0xfc;
2470 insn[0] |= 0x02;
2471 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2472 if (newrel != ELF32_R_TYPE (srel->r_info))
2473 {
2474 SNIP (2, 1, newrel);
2475 *again = TRUE;
2476 }
2477 }
2478
2479 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2480 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2481 /* Decodable bits. */
2482 && (insn[0] & 0xfc) == 0x74
2483 /* Decodable bits. */
2484 && ((insn[1] & 0xf0) == 0x00))
2485 {
2486 int newrel;
2487
2488 insn[0] = 0x75;
2489 insn[1] = 0x50 | (insn[1] & 0x0f);
2490
2491 /* We can't relax this new opcode. */
2492 irel->r_addend = 0;
2493
2494 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2495 newrel = R_RX_ABS8U;
2496 else
2497 newrel = R_RX_DIR8U;
2498
2499 SNIP (2, 1, newrel);
2500 *again = TRUE;
2501 }
2502
2503 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2504 {
2505 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2506
2507 insn[0] &= 0xfc;
2508 insn[0] |= 0x01;
2509 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2510 if (newrel != ELF32_R_TYPE (srel->r_info))
2511 {
2512 SNIP (2, 1, newrel);
2513 *again = TRUE;
2514 }
2515 }
2516
2517 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2518 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2519 /* Decodable bits and immediate type. */
2520 && insn[0] == 0x75
2521 /* Decodable bits. */
2522 && (insn[1] & 0xc0) == 0x00)
2523 {
2524 static const int newop[4] = { 1, 3, 4, 5 };
2525
2526 insn[0] = 0x60 | newop[insn[1] >> 4];
2527 /* The register number doesn't move. */
2528
2529 /* We can't relax this new opcode. */
2530 irel->r_addend = 0;
2531
2532 move_reloc (irel, srel, -1);
2533
2534 SNIP (2, 1, R_RX_RH_UIMM4p8);
2535 *again = TRUE;
2536 }
2537
2538 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2539 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2540 /* Decodable bits and immediate type. */
2541 && insn[0] == 0x71
2542 /* Same register for source and destination. */
2543 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2544 {
2545 int newrel;
2546
2547 /* Note that we can't turn "add $0,Rs" into a NOP
2548 because the flags need to be set right. */
2549
2550 if (ssymval < 0)
2551 {
2552 insn[0] = 0x60; /* Subtract. */
2553 newrel = R_RX_RH_UNEG4p8;
2554 }
2555 else
2556 {
2557 insn[0] = 0x62; /* Add. */
2558 newrel = R_RX_RH_UIMM4p8;
2559 }
2560
2561 /* The register number is in the right place. */
2562
2563 /* We can't relax this new opcode. */
2564 irel->r_addend = 0;
2565
2566 move_reloc (irel, srel, -1);
2567
2568 SNIP (2, 1, newrel);
2569 *again = TRUE;
2570 }
2571 }
2572
2573 /* These are either matched with a DSP6 (2-byte base) or an id24
2574 (3-byte base). */
2575 if (irel->r_addend & RX_RELAXA_IMM12)
2576 {
2577 int dspcode, offset = 0;
2578 long ssymval;
2579
2580 GET_RELOC;
2581
2582 if ((insn[0] & 0xfc) == 0xfc)
2583 dspcode = 1; /* Just something with one byte operand. */
2584 else
2585 dspcode = insn[0] & 3;
2586 switch (dspcode)
2587 {
2588 case 0: offset = 2; break;
2589 case 1: offset = 3; break;
2590 case 2: offset = 4; break;
2591 case 3: offset = 2; break;
2592 }
2593
2594 /* These relocations sign-extend, so we must do signed compares. */
2595 ssymval = (long) symval;
2596
2597 code = (insn[1] >> 2) & 3;
2598 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2599 {
2600 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2601
2602 insn[1] &= 0xf3;
2603 insn[1] |= 0x0c;
2604 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2605 if (newrel != ELF32_R_TYPE (srel->r_info))
2606 {
2607 SNIP (offset, 1, newrel);
2608 *again = TRUE;
2609 }
2610 }
2611
2612 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2613 {
2614 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2615
2616 insn[1] &= 0xf3;
2617 insn[1] |= 0x08;
2618 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2619 if (newrel != ELF32_R_TYPE (srel->r_info))
2620 {
2621 SNIP (offset, 1, newrel);
2622 *again = TRUE;
2623 }
2624 }
2625
2626 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2627 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2628 /* Decodable bits. */
2629 && insn[0] == 0xfb
2630 /* Decodable bits. */
2631 && ((insn[1] & 0x03) == 0x02))
2632 {
2633 int newrel;
2634
2635 insn[0] = 0x75;
2636 insn[1] = 0x40 | (insn[1] >> 4);
2637
2638 /* We can't relax this new opcode. */
2639 irel->r_addend = 0;
2640
2641 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2642 newrel = R_RX_ABS8U;
2643 else
2644 newrel = R_RX_DIR8U;
2645
2646 SNIP (2, 1, newrel);
2647 *again = TRUE;
2648 }
2649
2650 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2651 {
2652 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2653
2654 insn[1] &= 0xf3;
2655 insn[1] |= 0x04;
2656 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2657 if (newrel != ELF32_R_TYPE(srel->r_info))
2658 {
2659 SNIP (offset, 1, newrel);
2660 *again = TRUE;
2661 }
2662 }
2663
2664 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2665 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2666 /* Decodable bits. */
2667 && insn[0] == 0xfb
2668 /* Decodable bits. */
2669 && ((insn[1] & 0x03) == 0x02))
2670 {
2671 insn[0] = 0x66;
2672 insn[1] = insn[1] >> 4;
2673
2674 /* We can't relax this new opcode. */
2675 irel->r_addend = 0;
2676
2677 move_reloc (irel, srel, -1);
2678
2679 SNIP (2, 1, R_RX_RH_UIMM4p8);
2680 *again = TRUE;
2681 }
2682 }
2683
2684 if (irel->r_addend & RX_RELAXA_BRA)
2685 {
2686 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2687 int max_pcrel3 = 4;
2688 int alignment_glue = 0;
2689
2690 GET_RELOC;
2691
2692 /* Branches over alignment chunks are problematic, as
2693 deleting bytes here makes the branch *further* away. We
2694 can be agressive with branches within this alignment
2695 block, but not branches outside it. */
2696 if ((prev_alignment == NULL
2697 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2698 && (next_alignment == NULL
2699 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2700 alignment_glue = section_alignment_glue;
2701
2702 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2703 && srel[1].r_addend & RX_RELAXA_BRA
2704 && srel[1].r_offset < irel->r_offset + pcrel)
2705 max_pcrel3 ++;
2706
2707 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2708
2709 /* The values we compare PCREL with are not what you'd
2710 expect; they're off by a little to compensate for (1)
2711 where the reloc is relative to the insn, and (2) how much
2712 the insn is going to change when we relax it. */
2713
2714 /* These we have to decode. */
2715 switch (insn[0])
2716 {
2717 case 0x04: /* BRA pcdsp:24 */
2718 if (-32768 + alignment_glue <= pcrel
2719 && pcrel <= 32765 - alignment_glue)
2720 {
2721 insn[0] = 0x38;
2722 SNIP (3, 1, newrel);
2723 *again = TRUE;
2724 }
2725 break;
2726
2727 case 0x38: /* BRA pcdsp:16 */
2728 if (-128 + alignment_glue <= pcrel
2729 && pcrel <= 127 - alignment_glue)
2730 {
2731 insn[0] = 0x2e;
2732 SNIP (2, 1, newrel);
2733 *again = TRUE;
2734 }
2735 break;
2736
2737 case 0x2e: /* BRA pcdsp:8 */
2738 /* Note that there's a risk here of shortening things so
2739 much that we no longer fit this reloc; it *should*
2740 only happen when you branch across a branch, and that
2741 branch also devolves into BRA.S. "Real" code should
2742 be OK. */
2743 if (max_pcrel3 + alignment_glue <= pcrel
2744 && pcrel <= 10 - alignment_glue
2745 && allow_pcrel3)
2746 {
2747 insn[0] = 0x08;
2748 SNIP (1, 1, newrel);
2749 move_reloc (irel, srel, -1);
2750 *again = TRUE;
2751 }
2752 break;
2753
2754 case 0x05: /* BSR pcdsp:24 */
2755 if (-32768 + alignment_glue <= pcrel
2756 && pcrel <= 32765 - alignment_glue)
2757 {
2758 insn[0] = 0x39;
2759 SNIP (1, 1, newrel);
2760 *again = TRUE;
2761 }
2762 break;
2763
2764 case 0x3a: /* BEQ.W pcdsp:16 */
2765 case 0x3b: /* BNE.W pcdsp:16 */
2766 if (-128 + alignment_glue <= pcrel
2767 && pcrel <= 127 - alignment_glue)
2768 {
2769 insn[0] = 0x20 | (insn[0] & 1);
2770 SNIP (1, 1, newrel);
2771 *again = TRUE;
2772 }
2773 break;
2774
2775 case 0x20: /* BEQ.B pcdsp:8 */
2776 case 0x21: /* BNE.B pcdsp:8 */
2777 if (max_pcrel3 + alignment_glue <= pcrel
2778 && pcrel - alignment_glue <= 10
2779 && allow_pcrel3)
2780 {
2781 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2782 SNIP (1, 1, newrel);
2783 move_reloc (irel, srel, -1);
2784 *again = TRUE;
2785 }
2786 break;
2787
2788 case 0x16: /* synthetic BNE dsp24 */
2789 case 0x1e: /* synthetic BEQ dsp24 */
2790 if (-32767 + alignment_glue <= pcrel
2791 && pcrel <= 32766 - alignment_glue
2792 && insn[1] == 0x04)
2793 {
2794 if (insn[0] == 0x16)
2795 insn[0] = 0x3b;
2796 else
2797 insn[0] = 0x3a;
2798 /* We snip out the bytes at the end else the reloc
2799 will get moved too, and too much. */
2800 SNIP (3, 2, newrel);
2801 move_reloc (irel, srel, -1);
2802 *again = TRUE;
2803 }
2804 break;
2805 }
2806
2807 /* Special case - synthetic conditional branches, pcrel24.
2808 Note that EQ and NE have been handled above. */
2809 if ((insn[0] & 0xf0) == 0x20
2810 && insn[1] == 0x06
2811 && insn[2] == 0x04
2812 && srel->r_offset != irel->r_offset + 1
2813 && -32767 + alignment_glue <= pcrel
2814 && pcrel <= 32766 - alignment_glue)
2815 {
2816 insn[1] = 0x05;
2817 insn[2] = 0x38;
2818 SNIP (5, 1, newrel);
2819 *again = TRUE;
2820 }
2821
2822 /* Special case - synthetic conditional branches, pcrel16 */
2823 if ((insn[0] & 0xf0) == 0x20
2824 && insn[1] == 0x05
2825 && insn[2] == 0x38
2826 && srel->r_offset != irel->r_offset + 1
2827 && -127 + alignment_glue <= pcrel
2828 && pcrel <= 126 - alignment_glue)
2829 {
2830 int cond = (insn[0] & 0x0f) ^ 0x01;
2831
2832 insn[0] = 0x20 | cond;
2833 /* By moving the reloc first, we avoid having
2834 delete_bytes move it also. */
2835 move_reloc (irel, srel, -2);
2836 SNIP (2, 3, newrel);
2837 *again = TRUE;
2838 }
2839 }
2840
2841 BFD_ASSERT (nrelocs == 0);
2842
2843 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2844 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2845 because it may have one or two relocations. */
2846 if ((insn[0] & 0xfc) == 0xf8
2847 && (insn[1] & 0x80) == 0x00
2848 && (insn[0] & 0x03) != 0x03)
2849 {
2850 int dcode, icode, reg, ioff, dscale, ilen;
2851 bfd_vma disp_val = 0;
2852 long imm_val = 0;
2853 Elf_Internal_Rela * disp_rel = 0;
2854 Elf_Internal_Rela * imm_rel = 0;
2855
2856 /* Reset this. */
2857 srel = irel;
2858
2859 dcode = insn[0] & 0x03;
2860 icode = (insn[1] >> 2) & 0x03;
2861 reg = (insn[1] >> 4) & 0x0f;
2862
2863 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2864
2865 /* Figure out what the dispacement is. */
2866 if (dcode == 1 || dcode == 2)
2867 {
2868 /* There's a displacement. See if there's a reloc for it. */
2869 if (srel[1].r_offset == irel->r_offset + 2)
2870 {
2871 GET_RELOC;
2872 disp_val = symval;
2873 disp_rel = srel;
2874 }
2875 else
2876 {
2877 if (dcode == 1)
2878 disp_val = insn[2];
2879 else
2880 {
2881#if RX_OPCODE_BIG_ENDIAN
2882 disp_val = insn[2] * 256 + insn[3];
2883#else
2884 disp_val = insn[2] + insn[3] * 256;
2885#endif
2886 }
2887 switch (insn[1] & 3)
2888 {
2889 case 1:
2890 disp_val *= 2;
2891 scale = 2;
2892 break;
2893 case 2:
2894 disp_val *= 4;
2895 scale = 4;
2896 break;
2897 }
2898 }
2899 }
2900
2901 dscale = scale;
2902
2903 /* Figure out what the immediate is. */
2904 if (srel[1].r_offset == irel->r_offset + ioff)
2905 {
2906 GET_RELOC;
2907 imm_val = (long) symval;
2908 imm_rel = srel;
2909 }
2910 else
2911 {
2912 unsigned char * ip = insn + ioff;
2913
2914 switch (icode)
2915 {
2916 case 1:
2917 /* For byte writes, we don't sign extend. Makes the math easier later. */
2918 if (scale == 1)
2919 imm_val = ip[0];
2920 else
2921 imm_val = (char) ip[0];
2922 break;
2923 case 2:
2924#if RX_OPCODE_BIG_ENDIAN
2925 imm_val = ((char) ip[0] << 8) | ip[1];
2926#else
2927 imm_val = ((char) ip[1] << 8) | ip[0];
2928#endif
2929 break;
2930 case 3:
2931#if RX_OPCODE_BIG_ENDIAN
2932 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2933#else
2934 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2935#endif
2936 break;
2937 case 0:
2938#if RX_OPCODE_BIG_ENDIAN
13c9c485 2939 imm_val = ((unsigned) ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
c7927a3c 2940#else
13c9c485 2941 imm_val = ((unsigned) ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
c7927a3c
NC		 2942#endif
2943 break;
2944 }
2945 }
2946
2947 ilen = 2;
2948
2949 switch (dcode)
2950 {
2951 case 1:
2952 ilen += 1;
2953 break;
2954 case 2:
2955 ilen += 2;
2956 break;
2957 }
2958
2959 switch (icode)
2960 {
2961 case 1:
2962 ilen += 1;
2963 break;
2964 case 2:
2965 ilen += 2;
2966 break;
2967 case 3:
2968 ilen += 3;
2969 break;
2970 case 4:
2971 ilen += 4;
2972 break;
2973 }
2974
2975 /* The shortcut happens when the immediate is 0..255,
2976 register r0 to r7, and displacement (scaled) 0..31. */
2977
2978 if (0 <= imm_val && imm_val <= 255
2979 && 0 <= reg && reg <= 7
2980 && disp_val / dscale <= 31)
2981 {
2982 insn[0] = 0x3c | (insn[1] & 0x03);
2983 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2984 insn[2] = imm_val;
2985
2986 if (disp_rel)
2987 {
2988 int newrel = R_RX_NONE;
2989
2990 switch (dscale)
2991 {
2992 case 1:
2993 newrel = R_RX_RH_ABS5p8B;
2994 break;
2995 case 2:
2996 newrel = R_RX_RH_ABS5p8W;
2997 break;
2998 case 4:
2999 newrel = R_RX_RH_ABS5p8L;
3000 break;
3001 }
3002 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
3003 move_reloc (irel, disp_rel, -1);
3004 }
3005 if (imm_rel)
3006 {
3007 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
3008 move_reloc (disp_rel ? disp_rel : irel,
3009 imm_rel,
3010 irel->r_offset - imm_rel->r_offset + 2);
3011 }
3012
3013 SNIPNR (3, ilen - 3);
3014 *again = TRUE;
3015
3016 /* We can't relax this new opcode. */
3017 irel->r_addend = 0;
3018 }
3019 }
3020 }
3021
3022 /* We can't reliably relax branches to DIR3U_PCREL unless we know
3023 whatever they're branching over won't shrink any more. If we're
3024 basically done here, do one more pass just for branches - but
3025 don't request a pass after that one! */
3026 if (!*again && !allow_pcrel3)
3027 {
3028 bfd_boolean ignored;
3029
3030 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3031 }
3032
3033 return TRUE;
3034
3035 error_return:
c7927a3c
NC		 3036 if (free_contents != NULL)
3037 free (free_contents);
3038
3039 if (shndx_buf != NULL)
3040 {
3041 shndx_hdr->contents = NULL;
3042 free (shndx_buf);
3043 }
3044
3045 if (free_intsyms != NULL)
3046 free (free_intsyms);
3047
3048 return FALSE;
3049}
3050
3051static bfd_boolean
07d6d2b8
AM		 3052elf32_rx_relax_section_wrapper (bfd * abfd,
3053 asection * sec,
c7927a3c 3054 struct bfd_link_info * link_info,
07d6d2b8 3055 bfd_boolean * again)
c7927a3c
NC		 3056{
3057 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3058}
3059\f
3060/* Function to set the ELF flag bits. */
3061
3062static bfd_boolean
3063rx_elf_set_private_flags (bfd * abfd, flagword flags)
3064{
3065 elf_elfheader (abfd)->e_flags = flags;
3066 elf_flags_init (abfd) = TRUE;
3067 return TRUE;
3068}
3069
3070static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3071static bfd_boolean ignore_lma = TRUE;
c7927a3c 3072
84bff83f 3073void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3074
3075void
84bff83f
NC		 3076bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3077 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3078{
3079 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3080 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3081}
3082
708e2187
NC		 3083/* Converts FLAGS into a descriptive string.
3084 Returns a static pointer. */
3085
3086static const char *
3087describe_flags (flagword flags)
3088{
3089 static char buf [128];
3090
3091 buf[0] = 0;
3092
3093 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3094 strcat (buf, "64-bit doubles");
3095 else
3096 strcat (buf, "32-bit doubles");
3097
3098 if (flags & E_FLAG_RX_DSP)
3099 strcat (buf, ", dsp");
3100 else
3101 strcat (buf, ", no dsp");
3102
3103 if (flags & E_FLAG_RX_PID)
3104 strcat (buf, ", pid");
3105 else
3106 strcat (buf, ", no pid");
3107
3108 if (flags & E_FLAG_RX_ABI)
3109 strcat (buf, ", RX ABI");
3110 else
3111 strcat (buf, ", GCC ABI");
3112
3525236c
NC		 3113 if (flags & E_FLAG_RX_SINSNS_SET)
3114 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3115
708e2187
NC		 3116 return buf;
3117}
3118
c7927a3c
NC		 3119/* Merge backend specific data from an object file to the output
3120 object file when linking. */
3121
3122static bfd_boolean
50e03d47 3123rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
c7927a3c 3124{
50e03d47 3125 bfd *obfd = info->output_bfd;
c7927a3c
NC		 3126 flagword old_flags;
3127 flagword new_flags;
3128 bfd_boolean error = FALSE;
3129
3130 new_flags = elf_elfheader (ibfd)->e_flags;
3131 old_flags = elf_elfheader (obfd)->e_flags;
3132
3133 if (!elf_flags_init (obfd))
3134 {
3135 /* First call, no flags set. */
3136 elf_flags_init (obfd) = TRUE;
3137 elf_elfheader (obfd)->e_flags = new_flags;
3138 }
3139 else if (old_flags != new_flags)
3140 {
708e2187
NC		 3141 flagword known_flags;
3142
3525236c
NC		 3143 if (old_flags & E_FLAG_RX_SINSNS_SET)
3144 {
3145 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3146 {
3147 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3148 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3149 }
3150 }
3151 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3152 {
3153 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3154 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3155 }
3156
708e2187 3157 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3158 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3159
3160 if ((old_flags ^ new_flags) & known_flags)
3161 {
3162 /* Only complain if flag bits we care about do not match.
3163 Other bits may be set, since older binaries did use some
3164 deprecated flags. */
3165 if (no_warn_mismatch)
3166 {
3167 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3168 }
3169 else
3170 {
38f14ab8 3171 _bfd_error_handler (_("there is a conflict merging the"
871b3ab2 3172 " ELF header flags from %pB"),
dae82561 3173 ibfd);
695344c0 3174 _bfd_error_handler (_(" the input file's flags: %s"),
708e2187 3175 describe_flags (new_flags));
695344c0 3176 _bfd_error_handler (_(" the output file's flags: %s"),
708e2187 3177 describe_flags (old_flags));
c7927a3c
NC		 3178 error = TRUE;
3179 }
3180 }
3181 else
3182 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3183 }
3184
3185 if (error)
3186 bfd_set_error (bfd_error_bad_value);
3187
3188 return !error;
3189}
3190\f
3191static bfd_boolean
3192rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3193{
3194 FILE * file = (FILE *) ptr;
3195 flagword flags;
3196
3197 BFD_ASSERT (abfd != NULL && ptr != NULL);
3198
3199 /* Print normal ELF private data. */
3200 _bfd_elf_print_private_bfd_data (abfd, ptr);
3201
3202 flags = elf_elfheader (abfd)->e_flags;
3203 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3204
6d8a3ede 3205 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3206 return TRUE;
3207}
3208
3209/* Return the MACH for an e_flags value. */
3210
3211static int
708e2187 3212elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3213{
708e2187
NC		 3214#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3215 Need to sort out how these flag bits are used.
07d6d2b8 3216 For now we assume that the flags are OK. */
c7927a3c 3217 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3218#endif
c8c89dac
YS		 3219 if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V2))
3220 return bfd_mach_rx_v2;
3221 else if ((elf_elfheader (abfd)->e_flags & E_FLAG_RX_V3))
3222 return bfd_mach_rx_v3;
3223 else
3224 return bfd_mach_rx;
c7927a3c
NC		 3225
3226 return 0;
3227}
3228
3229static bfd_boolean
3230rx_elf_object_p (bfd * abfd)
3231{
1ce74905
DD		 3232 int i;
3233 unsigned int u;
3234 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
63920300
AM		 3235 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3236 int nphdrs = ehdr->e_phnum;
1ce74905 3237 sec_ptr bsec;
fc87b9e8 3238 static int saw_be = FALSE;
63920300 3239 bfd_vma end_phdroff;
1ce74905 3240
4c422395
DD		 3241 /* We never want to automatically choose the non-swapping big-endian
3242 target. The user can only get that explicitly, such as with -I
3243 and objcopy. */
6d00b590 3244 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3245 && abfd->target_defaulted)
3246 return FALSE;
3247
fc87b9e8
DD		 3248 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3249 as a fallback, so we check for "scanning" to know when to stop
3250 using the non-swapping target. */
6d00b590 3251 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3252 && saw_be)
3253 return FALSE;
6d00b590 3254 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3255 saw_be = TRUE;
3256
c7927a3c
NC		 3257 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3258 elf32_rx_machine (abfd));
1ce74905
DD		 3259
3260 /* For each PHDR in the object, we must find some section that
3261 corresponds (based on matching file offsets) and use its VMA
3262 information to reconstruct the p_vaddr field we clobbered when we
3263 wrote it out. */
63920300
AM		 3264 /* If PT_LOAD headers include the ELF file header or program headers
3265 then the PT_LOAD header does not start with some section contents.
3266 Making adjustments based on the difference between sh_offset and
3267 p_offset is nonsense in such cases. Exclude them. Note that
3268 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3269 the linker won't normally create PT_LOAD segments covering the
3270 headers so this is mainly for passing the ld testsuite.
3271 FIXME. Why are we looking at non-PT_LOAD headers here? */
3272 end_phdroff = ehdr->e_ehsize;
3273 if (ehdr->e_phoff != 0)
3274 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
1ce74905
DD		 3275 for (i=0; i<nphdrs; i++)
3276 {
3277 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3278 {
3279 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3280
74b1e045 3281 if (phdr[i].p_filesz
63920300 3282 && phdr[i].p_offset >= end_phdroff
74b1e045 3283 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
7859afc4
DD		 3284 && sec->sh_size > 0
3285 && sec->sh_type != SHT_NOBITS
1ce74905
DD		 3286 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3287 {
3288 /* Found one! The difference between the two addresses,
3289 plus the difference between the two file offsets, is
3290 enough information to reconstruct the lma. */
3291
3292 /* Example where they aren't:
3293 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3294 SEC[6] = vma 00000050 offset 00002050 size 00000040
3295
3296 The correct LMA for the section is fffc0140 + (2050-2010).
3297 */
3298
92ff23a1 3299 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3300 break;
3301 }
3302 }
3303
3304 /* We must update the bfd sections as well, so we don't stop
3305 with one match. */
3306 bsec = abfd->sections;
3307 while (bsec)
3308 {
74b1e045
DD		 3309 if (phdr[i].p_filesz
3310 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3311 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3312 {
3313 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3314 }
3315 bsec = bsec->next;
3316 }
3317 }
3318
c7927a3c
NC		 3319 return TRUE;
3320}
8d3c78e4
YS		 3321
3322static bfd_boolean
3323rx_linux_object_p (bfd * abfd)
3324{
4b24dd1a 3325 bfd_default_set_arch_mach (abfd, bfd_arch_rx, elf32_rx_machine (abfd));
8d3c78e4
YS		 3326 return TRUE;
3327}
c7927a3c
NC		 3328 \f
3329
3330#ifdef DEBUG
3331void
9ccb8af9 3332rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3333{
3334 size_t locsymcount;
3335 Elf_Internal_Sym * isymbuf;
3336 Elf_Internal_Sym * isymend;
3337 Elf_Internal_Sym * isym;
3338 Elf_Internal_Shdr * symtab_hdr;
3339 bfd_boolean free_internal = FALSE, free_external = FALSE;
3340 char * st_info_str;
3341 char * st_info_stb_str;
3342 char * st_other_str;
3343 char * st_shndx_str;
3344
3345 if (! internal_syms)
3346 {
3347 internal_syms = bfd_malloc (1000);
3348 free_internal = 1;
3349 }
3350 if (! external_syms)
3351 {
3352 external_syms = bfd_malloc (1000);
3353 free_external = 1;
3354 }
3355
3356 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3357 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3358 if (free_internal)
3359 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3360 symtab_hdr->sh_info, 0,
3361 internal_syms, external_syms, NULL);
3362 else
3363 isymbuf = internal_syms;
3364 isymend = isymbuf + locsymcount;
3365
3366 for (isym = isymbuf ; isym < isymend ; isym++)
3367 {
3368 switch (ELF_ST_TYPE (isym->st_info))
3369 {
b707aa49
NC		 3370 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3371 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3372 case STT_FILE: st_info_str = "STT_FILE"; break;
3373 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3374 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3375 default: st_info_str = "";
3376 }
3377 switch (ELF_ST_BIND (isym->st_info))
3378 {
b707aa49
NC		 3379 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3380 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3381 default: st_info_stb_str = "";
3382 }
3383 switch (ELF_ST_VISIBILITY (isym->st_other))
3384 {
b707aa49
NC		 3385 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3386 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3387 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3388 default: st_other_str = "";
3389 }
3390 switch (isym->st_shndx)
3391 {
b707aa49
NC		 3392 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3393 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3394 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3395 default: st_shndx_str = "";
3396 }
3397
3398 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3399 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3400 isym,
3401 (unsigned long) isym->st_value,
3402 (unsigned long) isym->st_size,
3403 isym->st_name,
3404 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3405 isym->st_name),
3406 isym->st_info, st_info_str, st_info_stb_str,
3407 isym->st_other, st_other_str,
3408 isym->st_shndx, st_shndx_str);
3409 }
3410 if (free_internal)
3411 free (internal_syms);
3412 if (free_external)
3413 free (external_syms);
3414}
3415
3416char *
3417rx_get_reloc (long reloc)
3418{
3419 if (0 <= reloc && reloc < R_RX_max)
3420 return rx_elf_howto_table[reloc].name;
3421 return "";
3422}
3423#endif /* DEBUG */
3424
3425\f
3426/* We must take care to keep the on-disk copy of any code sections
3427 that are fully linked swapped if the target is big endian, to match
3428 the Renesas tools. */
3429
3430/* The rule is: big endian object that are final-link executables,
3431 have code sections stored with 32-bit words swapped relative to
3432 what you'd get by default. */
3433
3434static bfd_boolean
07d6d2b8 3435rx_get_section_contents (bfd * abfd,
c7927a3c 3436 sec_ptr section,
07d6d2b8 3437 void * location,
c7927a3c
NC		 3438 file_ptr offset,
3439 bfd_size_type count)
3440{
3441 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3442 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3443 bfd_boolean rv;
3444
3445#ifdef DJDEBUG
3446 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3447 (long) offset, (long) count, section->name,
3448 bfd_big_endian(abfd) ? "be" : "le",
3449 exec, s_code, (long unsigned) section->filepos,
3450 (long unsigned) offset);
3451#endif
3452
3453 if (exec && s_code && bfd_big_endian (abfd))
3454 {
3455 char * cloc = (char *) location;
3456 bfd_size_type cnt, end_cnt;
3457
3458 rv = TRUE;
3459
3460 /* Fetch and swap unaligned bytes at the beginning. */
3461 if (offset % 4)
07d6d2b8 3462 {
c7927a3c
NC		 3463 char buf[4];
3464
3465 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3466 (offset & -4), 4);
c7927a3c
NC		 3467 if (!rv)
3468 return FALSE;
3469
3470 bfd_putb32 (bfd_getl32 (buf), buf);
3471
3472 cnt = 4 - (offset % 4);
3473 if (cnt > count)
3474 cnt = count;
3475
3476 memcpy (location, buf + (offset % 4), cnt);
3477
3478 count -= cnt;
3479 offset += cnt;
3480 cloc += count;
3481 }
3482
3483 end_cnt = count % 4;
3484
3485 /* Fetch and swap the middle bytes. */
3486 if (count >= 4)
3487 {
3488 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3489 count - end_cnt);
3490 if (!rv)
3491 return FALSE;
3492
3493 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3494 bfd_putb32 (bfd_getl32 (cloc), cloc);
3495 }
3496
3497 /* Fetch and swap the end bytes. */
3498 if (end_cnt > 0)
3499 {
3500 char buf[4];
3501
3502 /* Fetch the end bytes. */
3503 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3504 offset + count - end_cnt, 4);
c7927a3c
NC		 3505 if (!rv)
3506 return FALSE;
3507
3508 bfd_putb32 (bfd_getl32 (buf), buf);
3509 memcpy (cloc, buf, end_cnt);
3510 }
3511 }
3512 else
3513 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3514
3515 return rv;
3516}
3517
3518#ifdef DJDEBUG
3519static bfd_boolean
07d6d2b8 3520rx2_set_section_contents (bfd * abfd,
c7927a3c
NC		 3521 sec_ptr section,
3522 const void * location,
3523 file_ptr offset,
3524 bfd_size_type count)
3525{
3526 bfd_size_type i;
3527
3528 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3529 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3530 for (i = 0; i < count; i++)
3531 {
3532 if (i % 16 == 0 && i > 0)
3533 fprintf (stderr, "\n");
3534
3535 if (i % 16 && i % 4 == 0)
3536 fprintf (stderr, " ");
3537
3538 if (i % 16 == 0)
3539 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3540
3541 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3542 }
3543 fprintf (stderr, "\n");
3544
3545 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3546}
3547#define _bfd_elf_set_section_contents rx2_set_section_contents
3548#endif
3549
3550static bfd_boolean
07d6d2b8 3551rx_set_section_contents (bfd * abfd,
c7927a3c
NC		 3552 sec_ptr section,
3553 const void * location,
3554 file_ptr offset,
3555 bfd_size_type count)
3556{
3557 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3558 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3559 bfd_boolean rv;
3560 char * swapped_data = NULL;
3561 bfd_size_type i;
3562 bfd_vma caddr = section->vma + offset;
3563 file_ptr faddr = 0;
3564 bfd_size_type scount;
3565
3566#ifdef DJDEBUG
3567 bfd_size_type i;
3568
3569 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3570 (long) offset, (long) count, section->name,
3571 bfd_big_endian (abfd) ? "be" : "le",
3572 exec, s_code);
3573
3574 for (i = 0; i < count; i++)
3575 {
3576 int a = section->vma + offset + i;
3577
3578 if (a % 16 == 0 && a > 0)
3579 fprintf (stderr, "\n");
3580
3581 if (a % 16 && a % 4 == 0)
3582 fprintf (stderr, " ");
3583
3584 if (a % 16 == 0 || i == 0)
3585 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3586
3587 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3588 }
3589
3590 fprintf (stderr, "\n");
3591#endif
3592
3593 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3594 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3595
3596 while (count > 0 && caddr > 0 && caddr % 4)
3597 {
3598 switch (caddr % 4)
3599 {
3600 case 0: faddr = offset + 3; break;
3601 case 1: faddr = offset + 1; break;
3602 case 2: faddr = offset - 1; break;
3603 case 3: faddr = offset - 3; break;
3604 }
3605
3606 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3607 if (! rv)
3608 return rv;
3609
28cc9170 3610 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3611 offset ++;
3612 count --;
3613 caddr ++;
3614 }
3615
3616 scount = (int)(count / 4) * 4;
3617 if (scount > 0)
3618 {
3619 char * cloc = (char *) location;
3620
3621 swapped_data = (char *) bfd_alloc (abfd, count);
3622
3623 for (i = 0; i < count; i += 4)
3624 {
3625 bfd_vma v = bfd_getl32 (cloc + i);
3626 bfd_putb32 (v, swapped_data + i);
3627 }
3628
3629 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3630
3631 if (!rv)
3632 return rv;
3633 }
3634
3635 count -= scount;
28cc9170 3636 location = (bfd_byte *) location + scount;
c7927a3c
NC		 3637 offset += scount;
3638
3639 if (count > 0)
3640 {
3641 caddr = section->vma + offset;
3642 while (count > 0)
3643 {
3644 switch (caddr % 4)
3645 {
3646 case 0: faddr = offset + 3; break;
3647 case 1: faddr = offset + 1; break;
3648 case 2: faddr = offset - 1; break;
3649 case 3: faddr = offset - 3; break;
3650 }
3651 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3652 if (! rv)
3653 return rv;
3654
28cc9170 3655 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3656 offset ++;
3657 count --;
3658 caddr ++;
3659 }
3660 }
3661
3662 return TRUE;
3663}
3664
3665static bfd_boolean
3666rx_final_link (bfd * abfd, struct bfd_link_info * info)
3667{
3668 asection * o;
3669
3670 for (o = abfd->sections; o != NULL; o = o->next)
3671 {
3672#ifdef DJDEBUG
3673 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3674 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3675#endif
3676 if (o->flags & SEC_CODE
3677 && bfd_big_endian (abfd)
e57278ef 3678 && o->size % 4)
c7927a3c
NC		 3679 {
3680#ifdef DJDEBUG
3681 fprintf (stderr, "adjusting...\n");
3682#endif
3683 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3684 }
3685 }
3686
3687 return bfd_elf_final_link (abfd, info);
3688}
3689
3690static bfd_boolean
6d6c25c8 3691elf32_rx_modify_headers (bfd *abfd, struct bfd_link_info *info)
c7927a3c
NC		 3692{
3693 const struct elf_backend_data * bed;
3694 struct elf_obj_tdata * tdata;
3695 Elf_Internal_Phdr * phdr;
3696 unsigned int count;
3697 unsigned int i;
3698
3699 bed = get_elf_backend_data (abfd);
3700 tdata = elf_tdata (abfd);
3701 phdr = tdata->phdr;
12bd6957 3702 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3703
84bff83f
NC		 3704 if (ignore_lma)
3705 for (i = count; i-- != 0;)
3706 if (phdr[i].p_type == PT_LOAD)
3707 {
3708 /* The Renesas tools expect p_paddr to be zero. However,
3709 there is no other way to store the writable data in ROM for
3710 startup initialization. So, we let the linker *think*
3711 we're using paddr and vaddr the "usual" way, but at the
3712 last minute we move the paddr into the vaddr (which is what
3713 the simulator uses) and zero out paddr. Note that this
3714 does not affect the section headers, just the program
3715 headers. We hope. */
c7927a3c 3716 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3717#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3718 becomes wrong. */
84bff83f
NC		 3719 phdr[i].p_paddr = 0;
3720#endif
3721 }
c7927a3c 3722
6d6c25c8 3723 return _bfd_elf_modify_headers (abfd, info);
c7927a3c 3724}
708e2187
NC		 3725
3726/* The default literal sections should always be marked as "code" (i.e.,
3727 SHF_EXECINSTR). This is particularly important for big-endian mode
3728 when we do not want their contents byte reversed. */
3729static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3730{
07d6d2b8
AM		 3731 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3732 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
708e2187 3733 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
07d6d2b8 3734 { NULL, 0, 0, 0, 0 }
708e2187 3735};
7a2f2d82
DD		 3736\f
3737typedef struct {
3738 bfd *abfd;
3739 struct bfd_link_info *info;
3740 bfd_vma table_start;
3741 int table_size;
3742 bfd_vma *table_handlers;
3743 bfd_vma table_default_handler;
3744 struct bfd_link_hash_entry **table_entries;
3745 struct bfd_link_hash_entry *table_default_entry;
3746 FILE *mapfile;
3747} RX_Table_Info;
3748
3749static bfd_boolean
3750rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3751{
3752 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3753 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3754 const char *name; /* of the symbol we've found */
3755 asection *sec;
3756 struct bfd *abfd;
3757 int idx;
3758 const char *tname; /* name of the table */
3759 bfd_vma start_addr, end_addr;
3760 char *buf;
3761 struct bfd_link_hash_entry * h;
3762
3763 /* We're looking for globally defined symbols of the form
3764 $tablestart$<NAME>. */
3765 if (ent->type != bfd_link_hash_defined
3766 && ent->type != bfd_link_hash_defweak)
3767 return TRUE;
3768
3769 name = ent->root.string;
3770 sec = ent->u.def.section;
3771 abfd = sec->owner;
3772
3773 if (strncmp (name, "$tablestart$", 12))
3774 return TRUE;
3775
3776 sec->flags |= SEC_KEEP;
3777
3778 tname = name + 12;
3779
3780 start_addr = ent->u.def.value;
3781
3782 /* At this point, we can't build the table but we can (and must)
3783 find all the related symbols and mark their sections as SEC_KEEP
3784 so we don't garbage collect them. */
3785
3786 buf = (char *) malloc (12 + 10 + strlen (tname));
3787
3788 sprintf (buf, "$tableend$%s", tname);
3789 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3790 if (!h || (h->type != bfd_link_hash_defined
3791 && h->type != bfd_link_hash_defweak))
3792 {
695344c0 3793 /* xgettext:c-format */
871b3ab2 3794 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"),
7a2f2d82
DD		 3795 abfd, sec, name, buf);
3796 return TRUE;
3797 }
3798
3799 if (h->u.def.section != ent->u.def.section)
3800 {
695344c0 3801 /* xgettext:c-format */
871b3ab2 3802 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"),
7a2f2d82
DD		 3803 h->u.def.section->owner, h->u.def.section,
3804 name, buf);
3805 return TRUE;
3806 }
3807
3808 end_addr = h->u.def.value;
3809
3810 sprintf (buf, "$tableentry$default$%s", tname);
3811 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3812 if (h && (h->type == bfd_link_hash_defined
3813 || h->type == bfd_link_hash_defweak))
3814 {
3815 h->u.def.section->flags |= SEC_KEEP;
3816 }
3817
3818 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3819 {
3820 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3821 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3822 if (h && (h->type == bfd_link_hash_defined
3823 || h->type == bfd_link_hash_defweak))
3824 {
3825 h->u.def.section->flags |= SEC_KEEP;
3826 }
3827 }
3828
3829 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3830 return TRUE;
3831}
3832
3833/* We need to check for table entry symbols and build the tables, and
3834 we need to do it before the linker does garbage collection. This function is
3835 called once per input object file. */
3836static bfd_boolean
3837rx_check_directives
07d6d2b8 3838 (bfd * abfd ATTRIBUTE_UNUSED,
7a2f2d82
DD		 3839 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3840{
3841 RX_Table_Info stuff;
3842
3843 stuff.abfd = abfd;
3844 stuff.info = info;
3845 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3846
3847 return TRUE;
3848}
3849
3850\f
3851static bfd_boolean
3852rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3853{
3854 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3855 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3856 int idx;
3857 const char *name;
3858 bfd_vma addr;
3859
3860 /* See if the symbol ENT has an address listed in the table, and
3861 isn't a debug/special symbol. If so, put it in the table. */
3862
3863 if (ent->type != bfd_link_hash_defined
3864 && ent->type != bfd_link_hash_defweak)
3865 return TRUE;
3866
3867 name = ent->root.string;
3868
3869 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3870 return TRUE;
3871
3872 addr = (ent->u.def.value
3873 + ent->u.def.section->output_section->vma
3874 + ent->u.def.section->output_offset);
3875
3876 for (idx = 0; idx < info->table_size; idx ++)
3877 if (addr == info->table_handlers[idx])
3878 info->table_entries[idx] = ent;
3879
3880 if (addr == info->table_default_handler)
3881 info->table_default_entry = ent;
3882
3883 return TRUE;
3884}
3885
3886static bfd_boolean
3887rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3888{
3889 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3890 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3891 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3892 int idx;
3893 const char *tname; /* name of the table */
3894 bfd_vma start_addr, end_addr;
3895 char *buf;
3896 struct bfd_link_hash_entry * h;
3897 int need_elipses;
3898
3899 /* We're looking for globally defined symbols of the form
3900 $tablestart$<NAME>. */
3901 if (ent->type != bfd_link_hash_defined
3902 && ent->type != bfd_link_hash_defweak)
3903 return TRUE;
3904
3905 name = ent->root.string;
7a2f2d82
DD		 3906
3907 if (strncmp (name, "$tablestart$", 12))
3908 return TRUE;
3909
3910 tname = name + 12;
3911 start_addr = (ent->u.def.value
3912 + ent->u.def.section->output_section->vma
3913 + ent->u.def.section->output_offset);
3914
3915 buf = (char *) malloc (12 + 10 + strlen (tname));
3916
3917 sprintf (buf, "$tableend$%s", tname);
3918 end_addr = get_symbol_value_maybe (buf, info->info);
3919
3920 sprintf (buf, "$tableentry$default$%s", tname);
3921 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3922 if (h)
3923 {
3924 info->table_default_handler = (h->u.def.value
3925 + h->u.def.section->output_section->vma
3926 + h->u.def.section->output_offset);
3927 }
3928 else
3929 /* Zero is a valid handler address! */
3930 info->table_default_handler = (bfd_vma) (-1);
3931 info->table_default_entry = NULL;
3932
3933 info->table_start = start_addr;
3934 info->table_size = (int) (end_addr - start_addr) / 4;
3935 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3936 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3937
3938 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3939 {
3940 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3941 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3942 if (h && (h->type == bfd_link_hash_defined
3943 || h->type == bfd_link_hash_defweak))
3944 {
3945 info->table_handlers[idx] = (h->u.def.value
3946 + h->u.def.section->output_section->vma
3947 + h->u.def.section->output_offset);
3948 }
3949 else
3950 info->table_handlers[idx] = info->table_default_handler;
3951 info->table_entries[idx] = NULL;
3952 }
3953
3954 free (buf);
3955
3956 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3957
33ac0ca1 3958 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3959 tname, info->table_size, start_addr);
3960
3961 if (info->table_default_entry)
33ac0ca1 3962 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3963 info->table_default_entry->root.string,
3964 info->table_default_handler);
3965 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3966 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3967 info->table_default_handler);
3968 else
3969 fprintf (info->mapfile, " no default handler\n");
3970
3971 need_elipses = 1;
3972 for (idx = 0; idx < info->table_size; idx ++)
3973 {
3974 if (info->table_handlers[idx] == info->table_default_handler)
3975 {
3976 if (need_elipses)
3977 fprintf (info->mapfile, " . . .\n");
3978 need_elipses = 0;
3979 continue;
3980 }
3981 need_elipses = 1;
3982
33ac0ca1 3983 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3984
3985 if (info->table_handlers[idx] == (bfd_vma) (-1))
3986 fprintf (info->mapfile, "(no handler found)\n");
3987
3988 else if (info->table_handlers[idx] == info->table_default_handler)
3989 {
3990 if (info->table_default_entry)
3991 fprintf (info->mapfile, "(default)\n");
3992 else
3993 fprintf (info->mapfile, "(default)\n");
3994 }
3995
3996 else if (info->table_entries[idx])
3997 {
33ac0ca1 3998 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3999 }
4000
4001 else
4002 {
33ac0ca1 4003 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 4004 }
4005 }
4006 if (need_elipses)
4007 fprintf (info->mapfile, " . . .\n");
4008
4009 return TRUE;
4010}
4011
4012void
4013rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
4014{
4015 /* We scan the symbol table looking for $tableentry$'s, and for
4016 each, try to deduce which handlers go with which entries. */
4017
4018 RX_Table_Info stuff;
4019
4020 stuff.abfd = obfd;
4021 stuff.info = info;
4022 stuff.mapfile = mapfile;
4023 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
4024}
4025
c7927a3c
NC		 4026\f
4027#define ELF_ARCH bfd_arch_rx
4028#define ELF_MACHINE_CODE EM_RX
4029#define ELF_MAXPAGESIZE 0x1000
4030
6d00b590 4031#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 4032#define TARGET_BIG_NAME "elf32-rx-be"
4033
6d00b590 4034#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 4035#define TARGET_LITTLE_NAME "elf32-rx-le"
4036
4037#define elf_info_to_howto_rel NULL
4038#define elf_info_to_howto rx_info_to_howto_rela
4039#define elf_backend_object_p rx_elf_object_p
4040#define elf_backend_relocate_section rx_elf_relocate_section
07d6d2b8 4041#define elf_symbol_leading_char ('_')
c7927a3c 4042#define elf_backend_can_gc_sections 1
6d6c25c8 4043#define elf_backend_modify_headers elf32_rx_modify_headers
c7927a3c
NC		 4044
4045#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4046#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4047#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4048#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4049#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4050#define bfd_elf32_get_section_contents rx_get_section_contents
4051#define bfd_elf32_set_section_contents rx_set_section_contents
4052#define bfd_elf32_bfd_final_link rx_final_link
4053#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
07d6d2b8 4054#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4055#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4056
4057#include "elf32-target.h"
4c422395
DD		 4058
4059/* We define a second big-endian target that doesn't have the custom
4060 section get/set hooks, for times when we want to preserve the
4061 pre-swapped .text sections (like objcopy). */
4062
07d6d2b8 4063#undef TARGET_BIG_SYM
6d00b590 4064#define TARGET_BIG_SYM rx_elf32_be_ns_vec
07d6d2b8 4065#undef TARGET_BIG_NAME
4c422395 4066#define TARGET_BIG_NAME "elf32-rx-be-ns"
07d6d2b8 4067#undef TARGET_LITTLE_SYM
4c422395
DD		 4068
4069#undef bfd_elf32_get_section_contents
4070#undef bfd_elf32_set_section_contents
4071
4072#undef elf32_bed
4073#define elf32_bed elf32_rx_be_ns_bed
4074
4075#include "elf32-target.h"
8d3c78e4
YS		 4076
4077#undef TARGET_LITTLE_SYM
4078#define TARGET_LITTLE_SYM rx_elf32_linux_le_vec
4079#undef TARGET_LITTLE_NAME
4080#define TARGET_LITTLE_NAME "elf32-rx-linux"
4081#undef TARGET_BIG_SYM
4082#undef TARGET_BIG_NAME
4083
4084#undef elf_backend_object_p
4085#define elf_backend_object_p rx_linux_object_p
4086#undef elf_symbol_leading_char
4087#undef elf32_bed
4b24dd1a 4088#define elf32_bed elf32_rx_le_linux_bed
8d3c78e4
YS		 4089
4090#include "elf32-target.h"
GDB Binutils - Deliverables
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