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x86/Linux: disable all-stop on top of non-stop
[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
CommitLineData
c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2008-2015 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
d68cd58c 22#include "bfd_stdint.h"
c7927a3c
NC		 23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
6346d5ca 52 RXREL (NONE, 3, 0, 0, dont, FALSE),
c7927a3c
NC		 53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
185#define R_RX_RH_ABS5p8W 0x79
186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
187#define R_RX_RH_ABS5p8L 0x7a
188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
193#define R_RX_RH_ABS5p5W 0x7c
194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
195#define R_RX_RH_ABS5p5L 0x7d
196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
203 /* End of internal relocs. */
204
205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222};
223\f
224/* Map BFD reloc types to RX ELF reloc types. */
225
226struct rx_reloc_map
227{
228 bfd_reloc_code_real_type bfd_reloc_val;
229 unsigned int rx_reloc_val;
230};
231
232static const struct rx_reloc_map rx_reloc_map [] =
233{
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267};
268
269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271static reloc_howto_type *
272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
273 bfd_reloc_code_real_type code)
274{
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
0ba38529 280 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285}
286
287static reloc_howto_type *
288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289{
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298}
299
300/* Set the howto pointer for an RX ELF reloc. */
301
302static void
303rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
306{
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 310 if (r_type >= (unsigned int) R_RX_max)
311 {
64d29018 312 _bfd_error_handler (_("%B: invalid RX reloc number: %d"), abfd, r_type);
5860e3f8
NC		 313 r_type = 0;
314 }
c7927a3c
NC		 315 cache_ptr->howto = rx_elf_howto_table + r_type;
316}
317\f
318static bfd_vma
319get_symbol_value (const char * name,
91d6fa6a 320 bfd_reloc_status_type * status,
c7927a3c
NC		 321 struct bfd_link_info * info,
322 bfd * input_bfd,
323 asection * input_section,
324 int offset)
325{
326 bfd_vma value = 0;
327 struct bfd_link_hash_entry * h;
328
329 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
330
331 if (h == NULL
332 || (h->type != bfd_link_hash_defined
333 && h->type != bfd_link_hash_defweak))
91d6fa6a 334 * status = info->callbacks->undefined_symbol
c7927a3c
NC		 335 (info, name, input_bfd, input_section, offset, TRUE);
336 else
337 value = (h->u.def.value
338 + h->u.def.section->output_section->vma
339 + h->u.def.section->output_offset);
340
341 return value;
342}
7a2f2d82
DD		 343static bfd_vma
344get_symbol_value_maybe (const char * name,
345 struct bfd_link_info * info)
346{
347 bfd_vma value = 0;
348 struct bfd_link_hash_entry * h;
349
350 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
351
352 if (h == NULL
353 || (h->type != bfd_link_hash_defined
354 && h->type != bfd_link_hash_defweak))
355 return 0;
356 else
357 value = (h->u.def.value
358 + h->u.def.section->output_section->vma
359 + h->u.def.section->output_offset);
360
361 return value;
362}
c7927a3c
NC		 363
364static bfd_vma
91d6fa6a 365get_gp (bfd_reloc_status_type * status,
c7927a3c
NC		 366 struct bfd_link_info * info,
367 bfd * abfd,
368 asection * sec,
369 int offset)
370{
371 static bfd_boolean cached = FALSE;
372 static bfd_vma cached_value = 0;
373
374 if (!cached)
375 {
91d6fa6a 376 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
c7927a3c
NC		 377 cached = TRUE;
378 }
379 return cached_value;
380}
381
382static bfd_vma
91d6fa6a 383get_romstart (bfd_reloc_status_type * status,
c7927a3c
NC		 384 struct bfd_link_info * info,
385 bfd * abfd,
386 asection * sec,
387 int offset)
388{
389 static bfd_boolean cached = FALSE;
390 static bfd_vma cached_value = 0;
391
392 if (!cached)
393 {
91d6fa6a 394 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
c7927a3c
NC		 395 cached = TRUE;
396 }
397 return cached_value;
398}
399
400static bfd_vma
91d6fa6a 401get_ramstart (bfd_reloc_status_type * status,
c7927a3c
NC		 402 struct bfd_link_info * info,
403 bfd * abfd,
404 asection * sec,
405 int offset)
406{
407 static bfd_boolean cached = FALSE;
408 static bfd_vma cached_value = 0;
409
410 if (!cached)
411 {
91d6fa6a 412 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
c7927a3c
NC		 413 cached = TRUE;
414 }
415 return cached_value;
416}
417
418#define NUM_STACK_ENTRIES 16
419static int32_t rx_stack [ NUM_STACK_ENTRIES ];
420static unsigned int rx_stack_top;
421
422#define RX_STACK_PUSH(val) \
423 do \
424 { \
425 if (rx_stack_top < NUM_STACK_ENTRIES) \
426 rx_stack [rx_stack_top ++] = (val); \
427 else \
428 r = bfd_reloc_dangerous; \
429 } \
430 while (0)
431
432#define RX_STACK_POP(dest) \
433 do \
434 { \
435 if (rx_stack_top > 0) \
436 (dest) = rx_stack [-- rx_stack_top]; \
437 else \
438 (dest) = 0, r = bfd_reloc_dangerous; \
439 } \
440 while (0)
441
442/* Relocate an RX ELF section.
443 There is some attempt to make this function usable for many architectures,
444 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
445 if only to serve as a learning tool.
446
447 The RELOCATE_SECTION function is called by the new ELF backend linker
448 to handle the relocations for a section.
449
450 The relocs are always passed as Rela structures; if the section
451 actually uses Rel structures, the r_addend field will always be
452 zero.
453
454 This function is responsible for adjusting the section contents as
455 necessary, and (if using Rela relocs and generating a relocatable
456 output file) adjusting the reloc addend as necessary.
457
458 This function does not have to worry about setting the reloc
459 address or the reloc symbol index.
460
461 LOCAL_SYMS is a pointer to the swapped in local symbols.
462
463 LOCAL_SECTIONS is an array giving the section in the input file
464 corresponding to the st_shndx field of each local symbol.
465
466 The global hash table entry for the global symbols can be found
467 via elf_sym_hashes (input_bfd).
468
469 When generating relocatable output, this function must handle
470 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
471 going to be the section symbol corresponding to the output
472 section, which means that the addend must be adjusted
473 accordingly. */
474
475static bfd_boolean
476rx_elf_relocate_section
477 (bfd * output_bfd,
478 struct bfd_link_info * info,
479 bfd * input_bfd,
480 asection * input_section,
481 bfd_byte * contents,
482 Elf_Internal_Rela * relocs,
483 Elf_Internal_Sym * local_syms,
484 asection ** local_sections)
485{
486 Elf_Internal_Shdr * symtab_hdr;
487 struct elf_link_hash_entry ** sym_hashes;
488 Elf_Internal_Rela * rel;
489 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 490 bfd_boolean pid_mode;
491 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 492 const char * table_default_cache = NULL;
493 bfd_vma table_start_cache = 0;
494 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 495
496 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
497 pid_mode = TRUE;
498 else
499 pid_mode = FALSE;
c7927a3c
NC		 500
501 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
502 sym_hashes = elf_sym_hashes (input_bfd);
503 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 504 for (rel = relocs; rel < relend; rel ++)
505 {
506 reloc_howto_type * howto;
507 unsigned long r_symndx;
508 Elf_Internal_Sym * sym;
509 asection * sec;
510 struct elf_link_hash_entry * h;
511 bfd_vma relocation;
512 bfd_reloc_status_type r;
513 const char * name = NULL;
514 bfd_boolean unresolved_reloc = TRUE;
515 int r_type;
516
517 r_type = ELF32_R_TYPE (rel->r_info);
518 r_symndx = ELF32_R_SYM (rel->r_info);
519
520 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
521 h = NULL;
522 sym = NULL;
523 sec = NULL;
524 relocation = 0;
525
d4cb0ea0
NC		 526 if (rx_stack_top == 0)
527 saw_subtract = FALSE;
528
c7927a3c
NC		 529 if (r_symndx < symtab_hdr->sh_info)
530 {
531 sym = local_syms + r_symndx;
532 sec = local_sections [r_symndx];
533 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
534
535 name = bfd_elf_string_from_elf_section
536 (input_bfd, symtab_hdr->sh_link, sym->st_name);
537 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
538 }
539 else
540 {
62d887d4 541 bfd_boolean warned, ignored;
c7927a3c
NC		 542
543 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
544 r_symndx, symtab_hdr, sym_hashes, h,
545 sec, relocation, unresolved_reloc,
62d887d4 546 warned, ignored);
c7927a3c
NC		 547
548 name = h->root.root.string;
549 }
550
7a2f2d82
DD		 551 if (strncmp (name, "$tableentry$default$", 20) == 0)
552 {
553 bfd_vma entry_vma;
554 int idx;
555 char *buf;
556 bfd_reloc_status_type tstat = 0;
557
558 if (table_default_cache != name)
559 {
560
561 /* All relocs for a given table should be to the same
562 (weak) default symbol) so we can use it to detect a
563 cache miss. We use the offset into the table to find
564 the "real" symbol. Calculate and store the table's
565 offset here. */
566
567 table_default_cache = name;
568
569 /* We have already done error checking in rx_table_find(). */
570
571 buf = (char *) malloc (13 + strlen (name + 20));
572
573 sprintf (buf, "$tablestart$%s", name + 20);
574 tstat = 0;
575 table_start_cache = get_symbol_value (buf,
576 &tstat,
577 info,
578 input_bfd,
579 input_section,
580 rel->r_offset);
581
582 sprintf (buf, "$tableend$%s", name + 20);
583 tstat = 0;
584 table_end_cache = get_symbol_value (buf,
585 &tstat,
586 info,
587 input_bfd,
588 input_section,
589 rel->r_offset);
590
591 free (buf);
592 }
593
594 entry_vma = (input_section->output_section->vma
595 + input_section->output_offset
596 + rel->r_offset);
597
598 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
599 {
600 _bfd_error_handler (_("%B:%A: table entry %s outside table"),
601 input_bfd, input_section,
602 name);
603 }
604 else if ((int) (entry_vma - table_start_cache) % 4)
605 {
606 _bfd_error_handler (_("%B:%A: table entry %s not word-aligned within table"),
607 input_bfd, input_section,
608 name);
609 }
610 else
611 {
612 idx = (int) (entry_vma - table_start_cache) / 4;
613
614 /* This will look like $tableentry$<N>$<name> */
615 buf = (char *) malloc (12 + 20 + strlen (name + 20));
616 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
617
618 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
619
620 if (h)
621 {
622 relocation = (h->root.u.def.value
623 + h->root.u.def.section->output_section->vma
624 + h->root.u.def.section->output_offset);;
625 }
626
627 free (buf);
628 }
629 }
630
dbaa2011 631 if (sec != NULL && discarded_section (sec))
e4067dbb 632 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 633 rel, 1, relend, howto, 0, contents);
c7927a3c
NC		 634
635 if (info->relocatable)
636 {
637 /* This is a relocatable link. We don't have to change
638 anything, unless the reloc is against a section symbol,
639 in which case we have to adjust according to where the
640 section symbol winds up in the output section. */
641 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
642 rel->r_addend += sec->output_offset;
643 continue;
644 }
645
646 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
647 /* If the symbol is undefined and weak
648 then the relocation resolves to zero. */
649 relocation = 0;
650 else
651 {
652 if (howto->pc_relative)
653 {
654 relocation -= (input_section->output_section->vma
655 + input_section->output_offset
656 + rel->r_offset);
657 if (r_type != R_RX_RH_3_PCREL
658 && r_type != R_RX_DIR3U_PCREL)
659 relocation ++;
660 }
661
662 relocation += rel->r_addend;
663 }
664
665 r = bfd_reloc_ok;
666
667#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
668#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
669#define OP(i) (contents[rel->r_offset + (i)])
670#define WARN_REDHAT(type) \
671 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
672 input_bfd, input_section, name)
673
d4cb0ea0
NC		 674 /* Check for unsafe relocs in PID mode. These are any relocs where
675 an absolute address is being computed. There are special cases
676 for relocs against symbols that are known to be referenced in
677 crt0.o before the PID base address register has been initialised. */
678#define UNSAFE_FOR_PID \
679 do \
680 { \
681 if (pid_mode \
682 && sec != NULL \
683 && sec->flags & SEC_READONLY \
684 && !(input_section->flags & SEC_DEBUGGING) \
685 && strcmp (name, "__pid_base") != 0 \
686 && strcmp (name, "__gp") != 0 \
687 && strcmp (name, "__romdatastart") != 0 \
688 && !saw_subtract) \
689 _bfd_error_handler (_("%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"), \
690 input_bfd, input_section, howto->name, \
691 input_section->output_section->vma + input_section->output_offset + rel->r_offset, \
692 name, sec->name); \
693 } \
694 while (0)
695
c7927a3c
NC		 696 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
697 switch (r_type)
698 {
699 case R_RX_NONE:
700 break;
701
702 case R_RX_RH_RELAX:
703 break;
704
705 case R_RX_RH_3_PCREL:
706 WARN_REDHAT ("RX_RH_3_PCREL");
707 RANGE (3, 10);
708 OP (0) &= 0xf8;
709 OP (0) |= relocation & 0x07;
710 break;
711
712 case R_RX_RH_8_NEG:
713 WARN_REDHAT ("RX_RH_8_NEG");
714 relocation = - relocation;
715 case R_RX_DIR8S_PCREL:
d4cb0ea0 716 UNSAFE_FOR_PID;
c7927a3c
NC		 717 RANGE (-128, 127);
718 OP (0) = relocation;
719 break;
720
721 case R_RX_DIR8S:
d4cb0ea0 722 UNSAFE_FOR_PID;
c7927a3c
NC		 723 RANGE (-128, 255);
724 OP (0) = relocation;
725 break;
726
727 case R_RX_DIR8U:
d4cb0ea0 728 UNSAFE_FOR_PID;
c7927a3c
NC		 729 RANGE (0, 255);
730 OP (0) = relocation;
731 break;
732
733 case R_RX_RH_16_NEG:
734 WARN_REDHAT ("RX_RH_16_NEG");
735 relocation = - relocation;
736 case R_RX_DIR16S_PCREL:
d4cb0ea0 737 UNSAFE_FOR_PID;
c7927a3c
NC		 738 RANGE (-32768, 32767);
739#if RX_OPCODE_BIG_ENDIAN
740#else
741 OP (0) = relocation;
742 OP (1) = relocation >> 8;
743#endif
744 break;
745
746 case R_RX_RH_16_OP:
747 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 748 UNSAFE_FOR_PID;
c7927a3c
NC		 749 RANGE (-32768, 32767);
750#if RX_OPCODE_BIG_ENDIAN
751 OP (1) = relocation;
752 OP (0) = relocation >> 8;
753#else
754 OP (0) = relocation;
755 OP (1) = relocation >> 8;
756#endif
757 break;
758
759 case R_RX_DIR16S:
d4cb0ea0 760 UNSAFE_FOR_PID;
c7927a3c
NC		 761 RANGE (-32768, 65535);
762 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
763 {
764 OP (1) = relocation;
765 OP (0) = relocation >> 8;
766 }
767 else
768 {
769 OP (0) = relocation;
770 OP (1) = relocation >> 8;
771 }
772 break;
773
774 case R_RX_DIR16U:
d4cb0ea0 775 UNSAFE_FOR_PID;
c7927a3c
NC		 776 RANGE (0, 65536);
777#if RX_OPCODE_BIG_ENDIAN
778 OP (1) = relocation;
779 OP (0) = relocation >> 8;
780#else
781 OP (0) = relocation;
782 OP (1) = relocation >> 8;
783#endif
784 break;
785
786 case R_RX_DIR16:
d4cb0ea0 787 UNSAFE_FOR_PID;
c7927a3c
NC		 788 RANGE (-32768, 65536);
789#if RX_OPCODE_BIG_ENDIAN
790 OP (1) = relocation;
791 OP (0) = relocation >> 8;
792#else
793 OP (0) = relocation;
794 OP (1) = relocation >> 8;
795#endif
796 break;
797
798 case R_RX_DIR16_REV:
d4cb0ea0 799 UNSAFE_FOR_PID;
c7927a3c
NC		 800 RANGE (-32768, 65536);
801#if RX_OPCODE_BIG_ENDIAN
802 OP (0) = relocation;
803 OP (1) = relocation >> 8;
804#else
805 OP (1) = relocation;
806 OP (0) = relocation >> 8;
807#endif
808 break;
809
810 case R_RX_DIR3U_PCREL:
811 RANGE (3, 10);
812 OP (0) &= 0xf8;
813 OP (0) |= relocation & 0x07;
814 break;
815
816 case R_RX_RH_24_NEG:
d4cb0ea0 817 UNSAFE_FOR_PID;
c7927a3c
NC		 818 WARN_REDHAT ("RX_RH_24_NEG");
819 relocation = - relocation;
820 case R_RX_DIR24S_PCREL:
821 RANGE (-0x800000, 0x7fffff);
822#if RX_OPCODE_BIG_ENDIAN
823 OP (2) = relocation;
824 OP (1) = relocation >> 8;
825 OP (0) = relocation >> 16;
826#else
827 OP (0) = relocation;
828 OP (1) = relocation >> 8;
829 OP (2) = relocation >> 16;
830#endif
831 break;
832
833 case R_RX_RH_24_OP:
d4cb0ea0 834 UNSAFE_FOR_PID;
c7927a3c
NC		 835 WARN_REDHAT ("RX_RH_24_OP");
836 RANGE (-0x800000, 0x7fffff);
837#if RX_OPCODE_BIG_ENDIAN
838 OP (2) = relocation;
839 OP (1) = relocation >> 8;
840 OP (0) = relocation >> 16;
841#else
842 OP (0) = relocation;
843 OP (1) = relocation >> 8;
844 OP (2) = relocation >> 16;
845#endif
846 break;
847
848 case R_RX_DIR24S:
d4cb0ea0 849 UNSAFE_FOR_PID;
c7927a3c
NC		 850 RANGE (-0x800000, 0x7fffff);
851 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
852 {
853 OP (2) = relocation;
854 OP (1) = relocation >> 8;
855 OP (0) = relocation >> 16;
856 }
857 else
858 {
859 OP (0) = relocation;
860 OP (1) = relocation >> 8;
861 OP (2) = relocation >> 16;
862 }
863 break;
864
865 case R_RX_RH_24_UNS:
d4cb0ea0 866 UNSAFE_FOR_PID;
c7927a3c
NC		 867 WARN_REDHAT ("RX_RH_24_UNS");
868 RANGE (0, 0xffffff);
869#if RX_OPCODE_BIG_ENDIAN
870 OP (2) = relocation;
871 OP (1) = relocation >> 8;
872 OP (0) = relocation >> 16;
873#else
874 OP (0) = relocation;
875 OP (1) = relocation >> 8;
876 OP (2) = relocation >> 16;
877#endif
878 break;
879
880 case R_RX_RH_32_NEG:
d4cb0ea0 881 UNSAFE_FOR_PID;
c7927a3c
NC		 882 WARN_REDHAT ("RX_RH_32_NEG");
883 relocation = - relocation;
884#if RX_OPCODE_BIG_ENDIAN
885 OP (3) = relocation;
886 OP (2) = relocation >> 8;
887 OP (1) = relocation >> 16;
888 OP (0) = relocation >> 24;
889#else
890 OP (0) = relocation;
891 OP (1) = relocation >> 8;
892 OP (2) = relocation >> 16;
893 OP (3) = relocation >> 24;
894#endif
895 break;
896
897 case R_RX_RH_32_OP:
d4cb0ea0 898 UNSAFE_FOR_PID;
c7927a3c
NC		 899 WARN_REDHAT ("RX_RH_32_OP");
900#if RX_OPCODE_BIG_ENDIAN
901 OP (3) = relocation;
902 OP (2) = relocation >> 8;
903 OP (1) = relocation >> 16;
904 OP (0) = relocation >> 24;
905#else
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 OP (3) = relocation >> 24;
910#endif
911 break;
912
913 case R_RX_DIR32:
914 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
915 {
916 OP (3) = relocation;
917 OP (2) = relocation >> 8;
918 OP (1) = relocation >> 16;
919 OP (0) = relocation >> 24;
920 }
921 else
922 {
923 OP (0) = relocation;
924 OP (1) = relocation >> 8;
925 OP (2) = relocation >> 16;
926 OP (3) = relocation >> 24;
927 }
928 break;
929
930 case R_RX_DIR32_REV:
931 if (BIGE (output_bfd))
932 {
933 OP (0) = relocation;
934 OP (1) = relocation >> 8;
935 OP (2) = relocation >> 16;
936 OP (3) = relocation >> 24;
937 }
938 else
939 {
940 OP (3) = relocation;
941 OP (2) = relocation >> 8;
942 OP (1) = relocation >> 16;
943 OP (0) = relocation >> 24;
944 }
945 break;
946
947 case R_RX_RH_DIFF:
948 {
949 bfd_vma val;
950 WARN_REDHAT ("RX_RH_DIFF");
951 val = bfd_get_32 (output_bfd, & OP (0));
952 val -= relocation;
953 bfd_put_32 (output_bfd, val, & OP (0));
954 }
955 break;
956
957 case R_RX_RH_GPRELB:
958 WARN_REDHAT ("RX_RH_GPRELB");
959 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
960 RANGE (0, 65535);
961#if RX_OPCODE_BIG_ENDIAN
962 OP (1) = relocation;
963 OP (0) = relocation >> 8;
964#else
965 OP (0) = relocation;
966 OP (1) = relocation >> 8;
967#endif
968 break;
969
970 case R_RX_RH_GPRELW:
971 WARN_REDHAT ("RX_RH_GPRELW");
972 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
973 ALIGN (1);
974 relocation >>= 1;
975 RANGE (0, 65535);
976#if RX_OPCODE_BIG_ENDIAN
977 OP (1) = relocation;
978 OP (0) = relocation >> 8;
979#else
980 OP (0) = relocation;
981 OP (1) = relocation >> 8;
982#endif
983 break;
984
985 case R_RX_RH_GPRELL:
986 WARN_REDHAT ("RX_RH_GPRELL");
987 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
988 ALIGN (3);
989 relocation >>= 2;
990 RANGE (0, 65535);
991#if RX_OPCODE_BIG_ENDIAN
992 OP (1) = relocation;
993 OP (0) = relocation >> 8;
994#else
995 OP (0) = relocation;
996 OP (1) = relocation >> 8;
997#endif
998 break;
999
1000 /* Internal relocations just for relaxation: */
1001 case R_RX_RH_ABS5p5B:
1002 RX_STACK_POP (relocation);
1003 RANGE (0, 31);
1004 OP (0) &= 0xf8;
1005 OP (0) |= relocation >> 2;
1006 OP (1) &= 0x77;
1007 OP (1) |= (relocation << 6) & 0x80;
1008 OP (1) |= (relocation << 3) & 0x08;
1009 break;
1010
1011 case R_RX_RH_ABS5p5W:
1012 RX_STACK_POP (relocation);
1013 RANGE (0, 62);
1014 ALIGN (1);
1015 relocation >>= 1;
1016 OP (0) &= 0xf8;
1017 OP (0) |= relocation >> 2;
1018 OP (1) &= 0x77;
1019 OP (1) |= (relocation << 6) & 0x80;
1020 OP (1) |= (relocation << 3) & 0x08;
1021 break;
1022
1023 case R_RX_RH_ABS5p5L:
1024 RX_STACK_POP (relocation);
1025 RANGE (0, 124);
1026 ALIGN (3);
1027 relocation >>= 2;
1028 OP (0) &= 0xf8;
1029 OP (0) |= relocation >> 2;
1030 OP (1) &= 0x77;
1031 OP (1) |= (relocation << 6) & 0x80;
1032 OP (1) |= (relocation << 3) & 0x08;
1033 break;
1034
1035 case R_RX_RH_ABS5p8B:
1036 RX_STACK_POP (relocation);
1037 RANGE (0, 31);
1038 OP (0) &= 0x70;
1039 OP (0) |= (relocation << 3) & 0x80;
1040 OP (0) |= relocation & 0x0f;
1041 break;
1042
1043 case R_RX_RH_ABS5p8W:
1044 RX_STACK_POP (relocation);
1045 RANGE (0, 62);
1046 ALIGN (1);
1047 relocation >>= 1;
1048 OP (0) &= 0x70;
1049 OP (0) |= (relocation << 3) & 0x80;
1050 OP (0) |= relocation & 0x0f;
1051 break;
1052
1053 case R_RX_RH_ABS5p8L:
1054 RX_STACK_POP (relocation);
1055 RANGE (0, 124);
1056 ALIGN (3);
1057 relocation >>= 2;
1058 OP (0) &= 0x70;
1059 OP (0) |= (relocation << 3) & 0x80;
1060 OP (0) |= relocation & 0x0f;
1061 break;
1062
1063 case R_RX_RH_UIMM4p8:
1064 RANGE (0, 15);
1065 OP (0) &= 0x0f;
1066 OP (0) |= relocation << 4;
1067 break;
1068
1069 case R_RX_RH_UNEG4p8:
1070 RANGE (-15, 0);
1071 OP (0) &= 0x0f;
1072 OP (0) |= (-relocation) << 4;
1073 break;
1074
1075 /* Complex reloc handling: */
1076
1077 case R_RX_ABS32:
d4cb0ea0 1078 UNSAFE_FOR_PID;
c7927a3c
NC		 1079 RX_STACK_POP (relocation);
1080#if RX_OPCODE_BIG_ENDIAN
1081 OP (3) = relocation;
1082 OP (2) = relocation >> 8;
1083 OP (1) = relocation >> 16;
1084 OP (0) = relocation >> 24;
1085#else
1086 OP (0) = relocation;
1087 OP (1) = relocation >> 8;
1088 OP (2) = relocation >> 16;
1089 OP (3) = relocation >> 24;
1090#endif
1091 break;
1092
1093 case R_RX_ABS32_REV:
d4cb0ea0 1094 UNSAFE_FOR_PID;
c7927a3c
NC		 1095 RX_STACK_POP (relocation);
1096#if RX_OPCODE_BIG_ENDIAN
1097 OP (0) = relocation;
1098 OP (1) = relocation >> 8;
1099 OP (2) = relocation >> 16;
1100 OP (3) = relocation >> 24;
1101#else
1102 OP (3) = relocation;
1103 OP (2) = relocation >> 8;
1104 OP (1) = relocation >> 16;
1105 OP (0) = relocation >> 24;
1106#endif
1107 break;
1108
1109 case R_RX_ABS24S_PCREL:
1110 case R_RX_ABS24S:
d4cb0ea0 1111 UNSAFE_FOR_PID;
c7927a3c
NC		 1112 RX_STACK_POP (relocation);
1113 RANGE (-0x800000, 0x7fffff);
1114 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1115 {
1116 OP (2) = relocation;
1117 OP (1) = relocation >> 8;
1118 OP (0) = relocation >> 16;
1119 }
1120 else
1121 {
1122 OP (0) = relocation;
1123 OP (1) = relocation >> 8;
1124 OP (2) = relocation >> 16;
1125 }
1126 break;
1127
1128 case R_RX_ABS16:
d4cb0ea0 1129 UNSAFE_FOR_PID;
c7927a3c
NC		 1130 RX_STACK_POP (relocation);
1131 RANGE (-32768, 65535);
1132#if RX_OPCODE_BIG_ENDIAN
1133 OP (1) = relocation;
1134 OP (0) = relocation >> 8;
1135#else
1136 OP (0) = relocation;
1137 OP (1) = relocation >> 8;
1138#endif
1139 break;
1140
1141 case R_RX_ABS16_REV:
d4cb0ea0 1142 UNSAFE_FOR_PID;
c7927a3c
NC		 1143 RX_STACK_POP (relocation);
1144 RANGE (-32768, 65535);
1145#if RX_OPCODE_BIG_ENDIAN
1146 OP (0) = relocation;
1147 OP (1) = relocation >> 8;
1148#else
1149 OP (1) = relocation;
1150 OP (0) = relocation >> 8;
1151#endif
1152 break;
1153
1154 case R_RX_ABS16S_PCREL:
1155 case R_RX_ABS16S:
1156 RX_STACK_POP (relocation);
1157 RANGE (-32768, 32767);
1158 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1159 {
1160 OP (1) = relocation;
1161 OP (0) = relocation >> 8;
1162 }
1163 else
1164 {
1165 OP (0) = relocation;
1166 OP (1) = relocation >> 8;
1167 }
1168 break;
1169
1170 case R_RX_ABS16U:
d4cb0ea0 1171 UNSAFE_FOR_PID;
c7927a3c
NC		 1172 RX_STACK_POP (relocation);
1173 RANGE (0, 65536);
1174#if RX_OPCODE_BIG_ENDIAN
1175 OP (1) = relocation;
1176 OP (0) = relocation >> 8;
1177#else
1178 OP (0) = relocation;
1179 OP (1) = relocation >> 8;
1180#endif
1181 break;
1182
1183 case R_RX_ABS16UL:
d4cb0ea0 1184 UNSAFE_FOR_PID;
c7927a3c
NC		 1185 RX_STACK_POP (relocation);
1186 relocation >>= 2;
1187 RANGE (0, 65536);
1188#if RX_OPCODE_BIG_ENDIAN
1189 OP (1) = relocation;
1190 OP (0) = relocation >> 8;
1191#else
1192 OP (0) = relocation;
1193 OP (1) = relocation >> 8;
1194#endif
1195 break;
1196
1197 case R_RX_ABS16UW:
d4cb0ea0 1198 UNSAFE_FOR_PID;
c7927a3c
NC		 1199 RX_STACK_POP (relocation);
1200 relocation >>= 1;
1201 RANGE (0, 65536);
1202#if RX_OPCODE_BIG_ENDIAN
1203 OP (1) = relocation;
1204 OP (0) = relocation >> 8;
1205#else
1206 OP (0) = relocation;
1207 OP (1) = relocation >> 8;
1208#endif
1209 break;
1210
1211 case R_RX_ABS8:
d4cb0ea0 1212 UNSAFE_FOR_PID;
c7927a3c
NC		 1213 RX_STACK_POP (relocation);
1214 RANGE (-128, 255);
1215 OP (0) = relocation;
1216 break;
1217
1218 case R_RX_ABS8U:
d4cb0ea0 1219 UNSAFE_FOR_PID;
c7927a3c
NC		 1220 RX_STACK_POP (relocation);
1221 RANGE (0, 255);
1222 OP (0) = relocation;
1223 break;
1224
1225 case R_RX_ABS8UL:
d4cb0ea0 1226 UNSAFE_FOR_PID;
c7927a3c
NC		 1227 RX_STACK_POP (relocation);
1228 relocation >>= 2;
1229 RANGE (0, 255);
1230 OP (0) = relocation;
1231 break;
1232
1233 case R_RX_ABS8UW:
d4cb0ea0 1234 UNSAFE_FOR_PID;
c7927a3c
NC		 1235 RX_STACK_POP (relocation);
1236 relocation >>= 1;
1237 RANGE (0, 255);
1238 OP (0) = relocation;
1239 break;
1240
c7927a3c 1241 case R_RX_ABS8S:
d4cb0ea0
NC		 1242 UNSAFE_FOR_PID;
1243 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1244 RX_STACK_POP (relocation);
1245 RANGE (-128, 127);
1246 OP (0) = relocation;
1247 break;
1248
1249 case R_RX_SYM:
1250 if (r_symndx < symtab_hdr->sh_info)
1251 RX_STACK_PUSH (sec->output_section->vma
1252 + sec->output_offset
d4cb0ea0
NC		 1253 + sym->st_value
1254 + rel->r_addend);
c7927a3c
NC		 1255 else
1256 {
1257 if (h != NULL
1258 && (h->root.type == bfd_link_hash_defined
1259 || h->root.type == bfd_link_hash_defweak))
1260 RX_STACK_PUSH (h->root.u.def.value
1261 + sec->output_section->vma
d4cb0ea0
NC		 1262 + sec->output_offset
1263 + rel->r_addend);
c7927a3c
NC		 1264 else
1265 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1266 }
1267 break;
1268
1269 case R_RX_OPneg:
1270 {
1271 int32_t tmp;
1272
ee181c72 1273 saw_subtract = TRUE;
c7927a3c
NC		 1274 RX_STACK_POP (tmp);
1275 tmp = - tmp;
1276 RX_STACK_PUSH (tmp);
1277 }
1278 break;
1279
1280 case R_RX_OPadd:
1281 {
1282 int32_t tmp1, tmp2;
1283
1284 RX_STACK_POP (tmp1);
1285 RX_STACK_POP (tmp2);
1286 tmp1 += tmp2;
1287 RX_STACK_PUSH (tmp1);
1288 }
1289 break;
1290
1291 case R_RX_OPsub:
1292 {
1293 int32_t tmp1, tmp2;
1294
d4cb0ea0 1295 saw_subtract = TRUE;
c7927a3c
NC		 1296 RX_STACK_POP (tmp1);
1297 RX_STACK_POP (tmp2);
1298 tmp2 -= tmp1;
1299 RX_STACK_PUSH (tmp2);
1300 }
1301 break;
1302
1303 case R_RX_OPmul:
1304 {
1305 int32_t tmp1, tmp2;
1306
1307 RX_STACK_POP (tmp1);
1308 RX_STACK_POP (tmp2);
1309 tmp1 *= tmp2;
1310 RX_STACK_PUSH (tmp1);
1311 }
1312 break;
1313
1314 case R_RX_OPdiv:
1315 {
1316 int32_t tmp1, tmp2;
1317
1318 RX_STACK_POP (tmp1);
1319 RX_STACK_POP (tmp2);
1320 tmp1 /= tmp2;
1321 RX_STACK_PUSH (tmp1);
1322 }
1323 break;
1324
1325 case R_RX_OPshla:
1326 {
1327 int32_t tmp1, tmp2;
1328
1329 RX_STACK_POP (tmp1);
1330 RX_STACK_POP (tmp2);
1331 tmp1 <<= tmp2;
1332 RX_STACK_PUSH (tmp1);
1333 }
1334 break;
1335
1336 case R_RX_OPshra:
1337 {
1338 int32_t tmp1, tmp2;
1339
1340 RX_STACK_POP (tmp1);
1341 RX_STACK_POP (tmp2);
1342 tmp1 >>= tmp2;
1343 RX_STACK_PUSH (tmp1);
1344 }
1345 break;
1346
1347 case R_RX_OPsctsize:
1348 RX_STACK_PUSH (input_section->size);
1349 break;
1350
1351 case R_RX_OPscttop:
1352 RX_STACK_PUSH (input_section->output_section->vma);
1353 break;
1354
1355 case R_RX_OPand:
1356 {
1357 int32_t tmp1, tmp2;
1358
1359 RX_STACK_POP (tmp1);
1360 RX_STACK_POP (tmp2);
1361 tmp1 &= tmp2;
1362 RX_STACK_PUSH (tmp1);
1363 }
1364 break;
1365
1366 case R_RX_OPor:
1367 {
1368 int32_t tmp1, tmp2;
1369
1370 RX_STACK_POP (tmp1);
1371 RX_STACK_POP (tmp2);
1372 tmp1 |= tmp2;
1373 RX_STACK_PUSH (tmp1);
1374 }
1375 break;
1376
1377 case R_RX_OPxor:
1378 {
1379 int32_t tmp1, tmp2;
1380
1381 RX_STACK_POP (tmp1);
1382 RX_STACK_POP (tmp2);
1383 tmp1 ^= tmp2;
1384 RX_STACK_PUSH (tmp1);
1385 }
1386 break;
1387
1388 case R_RX_OPnot:
1389 {
1390 int32_t tmp;
1391
1392 RX_STACK_POP (tmp);
1393 tmp = ~ tmp;
1394 RX_STACK_PUSH (tmp);
1395 }
1396 break;
1397
1398 case R_RX_OPmod:
1399 {
1400 int32_t tmp1, tmp2;
1401
1402 RX_STACK_POP (tmp1);
1403 RX_STACK_POP (tmp2);
1404 tmp1 %= tmp2;
1405 RX_STACK_PUSH (tmp1);
1406 }
1407 break;
1408
1409 case R_RX_OPromtop:
1410 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1411 break;
1412
1413 case R_RX_OPramtop:
1414 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1415 break;
1416
1417 default:
1418 r = bfd_reloc_notsupported;
1419 break;
1420 }
1421
1422 if (r != bfd_reloc_ok)
1423 {
1424 const char * msg = NULL;
1425
1426 switch (r)
1427 {
1428 case bfd_reloc_overflow:
1429 /* Catch the case of a missing function declaration
1430 and emit a more helpful error message. */
1431 if (r_type == R_RX_DIR24S_PCREL)
1432 msg = _("%B(%A): error: call to undefined function '%s'");
1433 else
1434 r = info->callbacks->reloc_overflow
1435 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1436 input_bfd, input_section, rel->r_offset);
1437 break;
1438
1439 case bfd_reloc_undefined:
1440 r = info->callbacks->undefined_symbol
1441 (info, name, input_bfd, input_section, rel->r_offset,
1442 TRUE);
1443 break;
1444
1445 case bfd_reloc_other:
1446 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1447 break;
1448
1449 case bfd_reloc_outofrange:
1450 msg = _("%B(%A): internal error: out of range error");
1451 break;
1452
1453 case bfd_reloc_notsupported:
1454 msg = _("%B(%A): internal error: unsupported relocation error");
1455 break;
1456
1457 case bfd_reloc_dangerous:
1458 msg = _("%B(%A): internal error: dangerous relocation");
1459 break;
1460
1461 default:
1462 msg = _("%B(%A): internal error: unknown error");
1463 break;
1464 }
1465
1466 if (msg)
1467 _bfd_error_handler (msg, input_bfd, input_section, name);
1468
1469 if (! r)
1470 return FALSE;
1471 }
1472 }
1473
1474 return TRUE;
1475}
1476\f
1477/* Relaxation Support. */
1478
1479/* Progression of relocations from largest operand size to smallest
1480 operand size. */
1481
1482static int
1483next_smaller_reloc (int r)
1484{
1485 switch (r)
1486 {
1487 case R_RX_DIR32: return R_RX_DIR24S;
1488 case R_RX_DIR24S: return R_RX_DIR16S;
1489 case R_RX_DIR16S: return R_RX_DIR8S;
1490 case R_RX_DIR8S: return R_RX_NONE;
1491
1492 case R_RX_DIR16: return R_RX_DIR8;
1493 case R_RX_DIR8: return R_RX_NONE;
1494
1495 case R_RX_DIR16U: return R_RX_DIR8U;
1496 case R_RX_DIR8U: return R_RX_NONE;
1497
1498 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1499 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1500 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1501
1502 case R_RX_DIR16UL: return R_RX_DIR8UL;
1503 case R_RX_DIR8UL: return R_RX_NONE;
1504 case R_RX_DIR16UW: return R_RX_DIR8UW;
1505 case R_RX_DIR8UW: return R_RX_NONE;
1506
1507 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1508 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1509 case R_RX_RH_16_OP: return R_RX_DIR8;
1510
1511 case R_RX_ABS32: return R_RX_ABS24S;
1512 case R_RX_ABS24S: return R_RX_ABS16S;
1513 case R_RX_ABS16: return R_RX_ABS8;
1514 case R_RX_ABS16U: return R_RX_ABS8U;
1515 case R_RX_ABS16S: return R_RX_ABS8S;
1516 case R_RX_ABS8: return R_RX_NONE;
1517 case R_RX_ABS8U: return R_RX_NONE;
1518 case R_RX_ABS8S: return R_RX_NONE;
1519 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1520 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1521 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1522 case R_RX_ABS16UL: return R_RX_ABS8UL;
1523 case R_RX_ABS16UW: return R_RX_ABS8UW;
1524 case R_RX_ABS8UL: return R_RX_NONE;
1525 case R_RX_ABS8UW: return R_RX_NONE;
1526 }
1527 return r;
1528};
1529
1530/* Delete some bytes from a section while relaxing. */
1531
1532static bfd_boolean
1533elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1534 Elf_Internal_Rela *alignment_rel, int force_snip)
1535{
1536 Elf_Internal_Shdr * symtab_hdr;
1537 unsigned int sec_shndx;
1538 bfd_byte * contents;
1539 Elf_Internal_Rela * irel;
1540 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1541 Elf_Internal_Sym * isym;
1542 Elf_Internal_Sym * isymend;
1543 bfd_vma toaddr;
1544 unsigned int symcount;
1545 struct elf_link_hash_entry ** sym_hashes;
1546 struct elf_link_hash_entry ** end_hashes;
1547
1548 if (!alignment_rel)
1549 force_snip = 1;
1550
1551 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1552
1553 contents = elf_section_data (sec)->this_hdr.contents;
1554
1555 /* The deletion must stop at the next alignment boundary, if
1556 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1557 toaddr = sec->size;
1558 if (alignment_rel)
1559 toaddr = alignment_rel->r_offset;
1560
1561 irel = elf_section_data (sec)->relocs;
1562 irelend = irel + sec->reloc_count;
1563
9c761a55
NC		 1564 if (irel == NULL && sec->reloc_count > 0)
1565 {
1566 /* If the relocs have not been kept in the section data
1567 structure (because -no-keep-memory was used) then
1568 reread them now. */
1569 irel = (_bfd_elf_link_read_relocs
1570 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, FALSE));
1571 if (irel == NULL)
1572 /* FIXME: Return FALSE instead ? */
1573 irelend = irel;
1574 }
1575
c7927a3c
NC		 1576 /* Actually delete the bytes. */
1577 memmove (contents + addr, contents + addr + count,
1578 (size_t) (toaddr - addr - count));
1579
1580 /* If we don't have an alignment marker to worry about, we can just
1581 shrink the section. Otherwise, we have to fill in the newly
1582 created gap with NOP insns (0x03). */
1583 if (force_snip)
1584 sec->size -= count;
1585 else
1586 memset (contents + toaddr - count, 0x03, count);
1587
1588 /* Adjust all the relocs. */
9c761a55 1589 for (; irel < irelend; irel++)
c7927a3c
NC		 1590 {
1591 /* Get the new reloc address. */
1592 if (irel->r_offset > addr
1593 && (irel->r_offset < toaddr
1594 || (force_snip && irel->r_offset == toaddr)))
1595 irel->r_offset -= count;
1596
1597 /* If we see an ALIGN marker at the end of the gap, we move it
1598 to the beginning of the gap, since marking these gaps is what
1599 they're for. */
1600 if (irel->r_offset == toaddr
1601 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1602 && irel->r_addend & RX_RELAXA_ALIGN)
1603 irel->r_offset -= count;
1604 }
1605
1606 /* Adjust the local symbols defined in this section. */
1607 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1608 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1609 isymend = isym + symtab_hdr->sh_info;
1610
1611 for (; isym < isymend; isym++)
1612 {
1613 /* If the symbol is in the range of memory we just moved, we
1614 have to adjust its value. */
1615 if (isym->st_shndx == sec_shndx
1616 && isym->st_value > addr
1617 && isym->st_value < toaddr)
1618 isym->st_value -= count;
1619
1620 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1621 *end* is in the moved bytes but it's *start* isn't), then we
1622 must adjust its size. */
1623 if (isym->st_shndx == sec_shndx
1624 && isym->st_value < addr
1625 && isym->st_value + isym->st_size > addr
1626 && isym->st_value + isym->st_size < toaddr)
1627 isym->st_size -= count;
1628 }
1629
1630 /* Now adjust the global symbols defined in this section. */
1631 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1632 - symtab_hdr->sh_info);
1633 sym_hashes = elf_sym_hashes (abfd);
1634 end_hashes = sym_hashes + symcount;
1635
1636 for (; sym_hashes < end_hashes; sym_hashes++)
1637 {
1638 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1639
1640 if ((sym_hash->root.type == bfd_link_hash_defined
1641 || sym_hash->root.type == bfd_link_hash_defweak)
1642 && sym_hash->root.u.def.section == sec)
1643 {
1644 /* As above, adjust the value if needed. */
1645 if (sym_hash->root.u.def.value > addr
1646 && sym_hash->root.u.def.value < toaddr)
1647 sym_hash->root.u.def.value -= count;
1648
1649 /* As above, adjust the size if needed. */
1650 if (sym_hash->root.u.def.value < addr
1651 && sym_hash->root.u.def.value + sym_hash->size > addr
1652 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1653 sym_hash->size -= count;
1654 }
1655 }
1656
1657 return TRUE;
1658}
1659
1660/* Used to sort relocs by address. If relocs have the same address,
1661 we maintain their relative order, except that R_RX_RH_RELAX
1662 alignment relocs must be the first reloc for any given address. */
1663
1664static void
1665reloc_bubblesort (Elf_Internal_Rela * r, int count)
1666{
1667 int i;
1668 bfd_boolean again;
1669 bfd_boolean swappit;
1670
1671 /* This is almost a classic bubblesort. It's the slowest sort, but
1672 we're taking advantage of the fact that the relocations are
1673 mostly in order already (the assembler emits them that way) and
1674 we need relocs with the same address to remain in the same
1675 relative order. */
1676 again = TRUE;
1677 while (again)
1678 {
1679 again = FALSE;
1680 for (i = 0; i < count - 1; i ++)
1681 {
1682 if (r[i].r_offset > r[i + 1].r_offset)
1683 swappit = TRUE;
1684 else if (r[i].r_offset < r[i + 1].r_offset)
1685 swappit = FALSE;
1686 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1687 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1688 swappit = TRUE;
1689 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1690 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1691 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1692 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1693 swappit = TRUE;
1694 else
1695 swappit = FALSE;
1696
1697 if (swappit)
1698 {
1699 Elf_Internal_Rela tmp;
1700
1701 tmp = r[i];
1702 r[i] = r[i + 1];
1703 r[i + 1] = tmp;
1704 /* If we do move a reloc back, re-scan to see if it
1705 needs to be moved even further back. This avoids
1706 most of the O(n^2) behavior for our cases. */
1707 if (i > 0)
1708 i -= 2;
1709 again = TRUE;
1710 }
1711 }
1712 }
1713}
1714
1715
1716#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1717 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1718 lrel, abfd, sec, link_info, scale)
1719
1720static bfd_vma
1721rx_offset_for_reloc (bfd * abfd,
1722 Elf_Internal_Rela * rel,
1723 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1724 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
c7927a3c
NC		 1725 Elf_Internal_Sym * intsyms,
1726 Elf_Internal_Rela ** lrel,
1727 bfd * input_bfd,
1728 asection * input_section,
1729 struct bfd_link_info * info,
1730 int * scale)
1731{
1732 bfd_vma symval;
1733 bfd_reloc_status_type r;
1734
1735 *scale = 1;
1736
1737 /* REL is the first of 1..N relocations. We compute the symbol
1738 value for each relocation, then combine them if needed. LREL
1739 gets a pointer to the last relocation used. */
1740 while (1)
1741 {
1742 int32_t tmp1, tmp2;
1743
1744 /* Get the value of the symbol referred to by the reloc. */
1745 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1746 {
1747 /* A local symbol. */
1748 Elf_Internal_Sym *isym;
c7927a3c
NC		 1749 asection *ssec;
1750
1751 isym = intsyms + ELF32_R_SYM (rel->r_info);
1752
1753 if (isym->st_shndx == SHN_UNDEF)
1754 ssec = bfd_und_section_ptr;
1755 else if (isym->st_shndx == SHN_ABS)
1756 ssec = bfd_abs_section_ptr;
1757 else if (isym->st_shndx == SHN_COMMON)
1758 ssec = bfd_com_section_ptr;
1759 else
1760 ssec = bfd_section_from_elf_index (abfd,
1761 isym->st_shndx);
1762
c7927a3c
NC		 1763 /* Initial symbol value. */
1764 symval = isym->st_value;
1765
1766 /* GAS may have made this symbol relative to a section, in
1767 which case, we have to add the addend to find the
1768 symbol. */
1769 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1770 symval += rel->r_addend;
1771
1772 if (ssec)
1773 {
1774 if ((ssec->flags & SEC_MERGE)
dbaa2011 1775 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1776 symval = _bfd_merged_section_offset (abfd, & ssec,
1777 elf_section_data (ssec)->sec_info,
1778 symval);
1779 }
1780
1781 /* Now make the offset relative to where the linker is putting it. */
1782 if (ssec)
1783 symval +=
1784 ssec->output_section->vma + ssec->output_offset;
1785
1786 symval += rel->r_addend;
1787 }
1788 else
1789 {
1790 unsigned long indx;
1791 struct elf_link_hash_entry * h;
1792
1793 /* An external symbol. */
1794 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1795 h = elf_sym_hashes (abfd)[indx];
1796 BFD_ASSERT (h != NULL);
1797
1798 if (h->root.type != bfd_link_hash_defined
1799 && h->root.type != bfd_link_hash_defweak)
1800 {
1801 /* This appears to be a reference to an undefined
1802 symbol. Just ignore it--it will be caught by the
1803 regular reloc processing. */
1804 if (lrel)
1805 *lrel = rel;
1806 return 0;
1807 }
1808
1809 symval = (h->root.u.def.value
1810 + h->root.u.def.section->output_section->vma
1811 + h->root.u.def.section->output_offset);
1812
1813 symval += rel->r_addend;
1814 }
1815
1816 switch (ELF32_R_TYPE (rel->r_info))
1817 {
1818 case R_RX_SYM:
1819 RX_STACK_PUSH (symval);
1820 break;
1821
1822 case R_RX_OPneg:
1823 RX_STACK_POP (tmp1);
1824 tmp1 = - tmp1;
1825 RX_STACK_PUSH (tmp1);
1826 break;
1827
1828 case R_RX_OPadd:
1829 RX_STACK_POP (tmp1);
1830 RX_STACK_POP (tmp2);
1831 tmp1 += tmp2;
1832 RX_STACK_PUSH (tmp1);
1833 break;
1834
1835 case R_RX_OPsub:
1836 RX_STACK_POP (tmp1);
1837 RX_STACK_POP (tmp2);
1838 tmp2 -= tmp1;
1839 RX_STACK_PUSH (tmp2);
1840 break;
1841
1842 case R_RX_OPmul:
1843 RX_STACK_POP (tmp1);
1844 RX_STACK_POP (tmp2);
1845 tmp1 *= tmp2;
1846 RX_STACK_PUSH (tmp1);
1847 break;
1848
1849 case R_RX_OPdiv:
1850 RX_STACK_POP (tmp1);
1851 RX_STACK_POP (tmp2);
1852 tmp1 /= tmp2;
1853 RX_STACK_PUSH (tmp1);
1854 break;
1855
1856 case R_RX_OPshla:
1857 RX_STACK_POP (tmp1);
1858 RX_STACK_POP (tmp2);
1859 tmp1 <<= tmp2;
1860 RX_STACK_PUSH (tmp1);
1861 break;
1862
1863 case R_RX_OPshra:
1864 RX_STACK_POP (tmp1);
1865 RX_STACK_POP (tmp2);
1866 tmp1 >>= tmp2;
1867 RX_STACK_PUSH (tmp1);
1868 break;
1869
1870 case R_RX_OPsctsize:
1871 RX_STACK_PUSH (input_section->size);
1872 break;
1873
1874 case R_RX_OPscttop:
1875 RX_STACK_PUSH (input_section->output_section->vma);
1876 break;
1877
1878 case R_RX_OPand:
1879 RX_STACK_POP (tmp1);
1880 RX_STACK_POP (tmp2);
1881 tmp1 &= tmp2;
1882 RX_STACK_PUSH (tmp1);
1883 break;
1884
1885 case R_RX_OPor:
1886 RX_STACK_POP (tmp1);
1887 RX_STACK_POP (tmp2);
1888 tmp1 |= tmp2;
1889 RX_STACK_PUSH (tmp1);
1890 break;
1891
1892 case R_RX_OPxor:
1893 RX_STACK_POP (tmp1);
1894 RX_STACK_POP (tmp2);
1895 tmp1 ^= tmp2;
1896 RX_STACK_PUSH (tmp1);
1897 break;
1898
1899 case R_RX_OPnot:
1900 RX_STACK_POP (tmp1);
1901 tmp1 = ~ tmp1;
1902 RX_STACK_PUSH (tmp1);
1903 break;
1904
1905 case R_RX_OPmod:
1906 RX_STACK_POP (tmp1);
1907 RX_STACK_POP (tmp2);
1908 tmp1 %= tmp2;
1909 RX_STACK_PUSH (tmp1);
1910 break;
1911
1912 case R_RX_OPromtop:
1913 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1914 break;
1915
1916 case R_RX_OPramtop:
1917 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1918 break;
1919
1920 case R_RX_DIR16UL:
1921 case R_RX_DIR8UL:
1922 case R_RX_ABS16UL:
1923 case R_RX_ABS8UL:
1924 if (rx_stack_top)
1925 RX_STACK_POP (symval);
1926 if (lrel)
1927 *lrel = rel;
1928 *scale = 4;
1929 return symval;
1930
1931 case R_RX_DIR16UW:
1932 case R_RX_DIR8UW:
1933 case R_RX_ABS16UW:
1934 case R_RX_ABS8UW:
1935 if (rx_stack_top)
1936 RX_STACK_POP (symval);
1937 if (lrel)
1938 *lrel = rel;
1939 *scale = 2;
1940 return symval;
1941
1942 default:
1943 if (rx_stack_top)
1944 RX_STACK_POP (symval);
1945 if (lrel)
1946 *lrel = rel;
1947 return symval;
1948 }
1949
1950 rel ++;
1951 }
1952}
1953
1954static void
1955move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1956{
1957 bfd_vma old_offset = srel->r_offset;
1958
1959 irel ++;
1960 while (irel <= srel)
1961 {
1962 if (irel->r_offset == old_offset)
1963 irel->r_offset += delta;
1964 irel ++;
1965 }
1966}
1967
1968/* Relax one section. */
1969
1970static bfd_boolean
1971elf32_rx_relax_section (bfd * abfd,
1972 asection * sec,
1973 struct bfd_link_info * link_info,
1974 bfd_boolean * again,
1975 bfd_boolean allow_pcrel3)
1976{
1977 Elf_Internal_Shdr * symtab_hdr;
1978 Elf_Internal_Shdr * shndx_hdr;
1979 Elf_Internal_Rela * internal_relocs;
1980 Elf_Internal_Rela * free_relocs = NULL;
1981 Elf_Internal_Rela * irel;
1982 Elf_Internal_Rela * srel;
1983 Elf_Internal_Rela * irelend;
1984 Elf_Internal_Rela * next_alignment;
1985 Elf_Internal_Rela * prev_alignment;
1986 bfd_byte * contents = NULL;
1987 bfd_byte * free_contents = NULL;
1988 Elf_Internal_Sym * intsyms = NULL;
1989 Elf_Internal_Sym * free_intsyms = NULL;
1990 Elf_External_Sym_Shndx * shndx_buf = NULL;
1991 bfd_vma pc;
1992 bfd_vma sec_start;
c7927a3c
NC		 1993 bfd_vma symval = 0;
1994 int pcrel = 0;
1995 int code = 0;
1996 int section_alignment_glue;
1997 /* how much to scale the relocation by - 1, 2, or 4. */
1998 int scale;
1999
2000 /* Assume nothing changes. */
2001 *again = FALSE;
2002
2003 /* We don't have to do anything for a relocatable link, if
2004 this section does not have relocs, or if this is not a
2005 code section. */
2006 if (link_info->relocatable
2007 || (sec->flags & SEC_RELOC) == 0
2008 || sec->reloc_count == 0
2009 || (sec->flags & SEC_CODE) == 0)
2010 return TRUE;
2011
2012 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2013 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2014
2015 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2016
2017 /* Get the section contents. */
2018 if (elf_section_data (sec)->this_hdr.contents != NULL)
2019 contents = elf_section_data (sec)->this_hdr.contents;
2020 /* Go get them off disk. */
2021 else
2022 {
2023 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2024 goto error_return;
2025 elf_section_data (sec)->this_hdr.contents = contents;
2026 }
2027
2028 /* Read this BFD's symbols. */
2029 /* Get cached copy if it exists. */
2030 if (symtab_hdr->contents != NULL)
2031 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2032 else
2033 {
2034 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2035 symtab_hdr->contents = (bfd_byte *) intsyms;
2036 }
2037
2038 if (shndx_hdr->sh_size != 0)
2039 {
2040 bfd_size_type amt;
2041
2042 amt = symtab_hdr->sh_info;
2043 amt *= sizeof (Elf_External_Sym_Shndx);
2044 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2045 if (shndx_buf == NULL)
2046 goto error_return;
2047 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2048 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2049 goto error_return;
2050 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2051 }
2052
2053 /* Get a copy of the native relocations. */
2054 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2055 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
c7927a3c
NC		 2056 link_info->keep_memory));
2057 if (internal_relocs == NULL)
2058 goto error_return;
2059 if (! link_info->keep_memory)
2060 free_relocs = internal_relocs;
2061
2062 /* The RL_ relocs must be just before the operand relocs they go
2063 with, so we must sort them to guarantee this. We use bubblesort
2064 instead of qsort so we can guarantee that relocs with the same
2065 address remain in the same relative order. */
2066 reloc_bubblesort (internal_relocs, sec->reloc_count);
2067
2068 /* Walk through them looking for relaxing opportunities. */
2069 irelend = internal_relocs + sec->reloc_count;
2070
2071 /* This will either be NULL or a pointer to the next alignment
2072 relocation. */
2073 next_alignment = internal_relocs;
2074 /* This will be the previous alignment, although at first it points
2075 to the first real relocation. */
2076 prev_alignment = internal_relocs;
2077
2078 /* We calculate worst case shrinkage caused by alignment directives.
2079 No fool-proof, but better than either ignoring the problem or
2080 doing heavy duty analysis of all the alignment markers in all
2081 input sections. */
2082 section_alignment_glue = 0;
2083 for (irel = internal_relocs; irel < irelend; irel++)
2084 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2085 && irel->r_addend & RX_RELAXA_ALIGN)
2086 {
2087 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2088
2089 if (section_alignment_glue < this_glue)
2090 section_alignment_glue = this_glue;
2091 }
2092 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2093 shrinkage. */
2094 section_alignment_glue *= 2;
2095
2096 for (irel = internal_relocs; irel < irelend; irel++)
2097 {
2098 unsigned char *insn;
2099 int nrelocs;
2100
2101 /* The insns we care about are all marked with one of these. */
2102 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2103 continue;
2104
2105 if (irel->r_addend & RX_RELAXA_ALIGN
2106 || next_alignment == internal_relocs)
2107 {
2108 /* When we delete bytes, we need to maintain all the alignments
2109 indicated. In addition, we need to be careful about relaxing
2110 jumps across alignment boundaries - these displacements
2111 *grow* when we delete bytes. For now, don't shrink
2112 displacements across an alignment boundary, just in case.
2113 Note that this only affects relocations to the same
2114 section. */
2115 prev_alignment = next_alignment;
2116 next_alignment += 2;
2117 while (next_alignment < irelend
2118 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2119 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2120 next_alignment ++;
2121 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2122 next_alignment = NULL;
2123 }
2124
2125 /* When we hit alignment markers, see if we've shrunk enough
2126 before them to reduce the gap without violating the alignment
2127 requirements. */
2128 if (irel->r_addend & RX_RELAXA_ALIGN)
2129 {
2130 /* At this point, the next relocation *should* be the ELIGN
2131 end marker. */
2132 Elf_Internal_Rela *erel = irel + 1;
2133 unsigned int alignment, nbytes;
2134
2135 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2136 continue;
2137 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2138 continue;
2139
2140 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2141
2142 if (erel->r_offset - irel->r_offset < alignment)
2143 continue;
2144
2145 nbytes = erel->r_offset - irel->r_offset;
2146 nbytes /= alignment;
2147 nbytes *= alignment;
2148
2149 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2150 erel->r_offset == sec->size);
2151 *again = TRUE;
2152
2153 continue;
2154 }
2155
2156 if (irel->r_addend & RX_RELAXA_ELIGN)
2157 continue;
2158
2159 insn = contents + irel->r_offset;
2160
2161 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2162
2163 /* At this point, we have an insn that is a candidate for linker
2164 relaxation. There are NRELOCS relocs following that may be
2165 relaxed, although each reloc may be made of more than one
2166 reloc entry (such as gp-rel symbols). */
2167
2168 /* Get the value of the symbol referred to by the reloc. Just
2169 in case this is the last reloc in the list, use the RL's
2170 addend to choose between this reloc (no addend) or the next
2171 (yes addend, which means at least one following reloc). */
2172
2173 /* srel points to the "current" reloction for this insn -
2174 actually the last reloc for a given operand, which is the one
2175 we need to update. We check the relaxations in the same
2176 order that the relocations happen, so we'll just push it
2177 along as we go. */
2178 srel = irel;
2179
2180 pc = sec->output_section->vma + sec->output_offset
2181 + srel->r_offset;
2182
2183#define GET_RELOC \
2184 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2185 pcrel = symval - pc + srel->r_addend; \
2186 nrelocs --;
2187
2188#define SNIPNR(offset, nbytes) \
2189 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2190#define SNIP(offset, nbytes, newtype) \
2191 SNIPNR (offset, nbytes); \
2192 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2193
2194 /* The order of these bit tests must match the order that the
2195 relocs appear in. Since we sorted those by offset, we can
2196 predict them. */
2197
2198 /* Note that the numbers in, say, DSP6 are the bit offsets of
2199 the code fields that describe the operand. Bits number 0 for
2200 the MSB of insn[0]. */
2201
2202 /* DSP* codes:
2203 0 00 [reg]
2204 1 01 dsp:8[reg]
2205 2 10 dsp:16[reg]
2206 3 11 reg */
2207 if (irel->r_addend & RX_RELAXA_DSP6)
2208 {
2209 GET_RELOC;
2210
2211 code = insn[0] & 3;
2212 if (code == 2 && symval/scale <= 255)
2213 {
2214 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2215 insn[0] &= 0xfc;
2216 insn[0] |= 0x01;
2217 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2218 if (newrel != ELF32_R_TYPE (srel->r_info))
2219 {
2220 SNIP (3, 1, newrel);
2221 *again = TRUE;
2222 }
2223 }
2224
2225 else if (code == 1 && symval == 0)
2226 {
2227 insn[0] &= 0xfc;
2228 SNIP (2, 1, R_RX_NONE);
2229 *again = TRUE;
2230 }
2231
2232 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2233 else if (code == 1 && symval/scale <= 31
2234 /* Decodable bits. */
2235 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2236 /* Width. */
eb8c5f3f 2237 && (insn[0] & 0x30) != 0x30
91d6fa6a 2238 /* Register MSBs. */
c7927a3c
NC		 2239 && (insn[1] & 0x88) == 0x00)
2240 {
2241 int newrel = 0;
2242
2243 insn[0] = 0x88 | (insn[0] & 0x30);
2244 /* The register fields are in the right place already. */
2245
2246 /* We can't relax this new opcode. */
2247 irel->r_addend = 0;
2248
2249 switch ((insn[0] & 0x30) >> 4)
2250 {
2251 case 0:
2252 newrel = R_RX_RH_ABS5p5B;
2253 break;
2254 case 1:
2255 newrel = R_RX_RH_ABS5p5W;
2256 break;
2257 case 2:
2258 newrel = R_RX_RH_ABS5p5L;
2259 break;
2260 }
2261
2262 move_reloc (irel, srel, -2);
2263 SNIP (2, 1, newrel);
2264 }
2265
2266 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2267 else if (code == 1 && symval/scale <= 31
2268 /* Decodable bits. */
2269 && (insn[0] & 0xf8) == 0x58
2270 /* Register MSBs. */
2271 && (insn[1] & 0x88) == 0x00)
2272 {
2273 int newrel = 0;
2274
2275 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2276 /* The register fields are in the right place already. */
2277
2278 /* We can't relax this new opcode. */
2279 irel->r_addend = 0;
2280
2281 switch ((insn[0] & 0x08) >> 3)
2282 {
2283 case 0:
2284 newrel = R_RX_RH_ABS5p5B;
2285 break;
2286 case 1:
2287 newrel = R_RX_RH_ABS5p5W;
2288 break;
2289 }
2290
2291 move_reloc (irel, srel, -2);
2292 SNIP (2, 1, newrel);
2293 }
2294 }
2295
2296 /* A DSP4 operand always follows a DSP6 operand, even if there's
2297 no relocation for it. We have to read the code out of the
2298 opcode to calculate the offset of the operand. */
2299 if (irel->r_addend & RX_RELAXA_DSP4)
2300 {
2301 int code6, offset = 0;
2302
2303 GET_RELOC;
2304
2305 code6 = insn[0] & 0x03;
2306 switch (code6)
2307 {
2308 case 0: offset = 2; break;
2309 case 1: offset = 3; break;
2310 case 2: offset = 4; break;
2311 case 3: offset = 2; break;
2312 }
2313
2314 code = (insn[0] & 0x0c) >> 2;
2315
2316 if (code == 2 && symval / scale <= 255)
2317 {
2318 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2319
2320 insn[0] &= 0xf3;
2321 insn[0] |= 0x04;
2322 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2323 if (newrel != ELF32_R_TYPE (srel->r_info))
2324 {
2325 SNIP (offset+1, 1, newrel);
2326 *again = TRUE;
2327 }
2328 }
2329
2330 else if (code == 1 && symval == 0)
2331 {
2332 insn[0] &= 0xf3;
2333 SNIP (offset, 1, R_RX_NONE);
2334 *again = TRUE;
2335 }
2336 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2337 else if (code == 1 && symval/scale <= 31
2338 /* Decodable bits. */
2339 && (insn[0] & 0xc3) == 0xc3
2340 /* Width. */
eb8c5f3f 2341 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2342 /* Register MSBs. */
2343 && (insn[1] & 0x88) == 0x00)
2344 {
2345 int newrel = 0;
2346
2347 insn[0] = 0x80 | (insn[0] & 0x30);
2348 /* The register fields are in the right place already. */
2349
2350 /* We can't relax this new opcode. */
2351 irel->r_addend = 0;
2352
2353 switch ((insn[0] & 0x30) >> 4)
2354 {
2355 case 0:
2356 newrel = R_RX_RH_ABS5p5B;
2357 break;
2358 case 1:
2359 newrel = R_RX_RH_ABS5p5W;
2360 break;
2361 case 2:
2362 newrel = R_RX_RH_ABS5p5L;
2363 break;
2364 }
2365
2366 move_reloc (irel, srel, -2);
2367 SNIP (2, 1, newrel);
2368 }
2369 }
2370
2371 /* These always occur alone, but the offset depends on whether
2372 it's a MEMEX opcode (0x06) or not. */
2373 if (irel->r_addend & RX_RELAXA_DSP14)
2374 {
2375 int offset;
2376 GET_RELOC;
2377
2378 if (insn[0] == 0x06)
2379 offset = 3;
2380 else
2381 offset = 4;
2382
2383 code = insn[1] & 3;
2384
2385 if (code == 2 && symval / scale <= 255)
2386 {
2387 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2388
2389 insn[1] &= 0xfc;
2390 insn[1] |= 0x01;
2391 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2392 if (newrel != ELF32_R_TYPE (srel->r_info))
2393 {
2394 SNIP (offset, 1, newrel);
2395 *again = TRUE;
2396 }
2397 }
2398 else if (code == 1 && symval == 0)
2399 {
2400 insn[1] &= 0xfc;
2401 SNIP (offset, 1, R_RX_NONE);
2402 *again = TRUE;
2403 }
2404 }
2405
2406 /* IMM* codes:
2407 0 00 imm:32
2408 1 01 simm:8
2409 2 10 simm:16
2410 3 11 simm:24. */
2411
2412 /* These always occur alone. */
2413 if (irel->r_addend & RX_RELAXA_IMM6)
2414 {
2415 long ssymval;
2416
2417 GET_RELOC;
2418
2419 /* These relocations sign-extend, so we must do signed compares. */
2420 ssymval = (long) symval;
2421
2422 code = insn[0] & 0x03;
2423
2424 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2425 {
2426 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2427
2428 insn[0] &= 0xfc;
2429 insn[0] |= 0x03;
2430 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2431 if (newrel != ELF32_R_TYPE (srel->r_info))
2432 {
2433 SNIP (2, 1, newrel);
2434 *again = TRUE;
2435 }
2436 }
2437
2438 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2439 {
2440 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2441
2442 insn[0] &= 0xfc;
2443 insn[0] |= 0x02;
2444 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2445 if (newrel != ELF32_R_TYPE (srel->r_info))
2446 {
2447 SNIP (2, 1, newrel);
2448 *again = TRUE;
2449 }
2450 }
2451
2452 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2453 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2454 /* Decodable bits. */
2455 && (insn[0] & 0xfc) == 0x74
2456 /* Decodable bits. */
2457 && ((insn[1] & 0xf0) == 0x00))
2458 {
2459 int newrel;
2460
2461 insn[0] = 0x75;
2462 insn[1] = 0x50 | (insn[1] & 0x0f);
2463
2464 /* We can't relax this new opcode. */
2465 irel->r_addend = 0;
2466
2467 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2468 newrel = R_RX_ABS8U;
2469 else
2470 newrel = R_RX_DIR8U;
2471
2472 SNIP (2, 1, newrel);
2473 *again = TRUE;
2474 }
2475
2476 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2477 {
2478 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2479
2480 insn[0] &= 0xfc;
2481 insn[0] |= 0x01;
2482 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2483 if (newrel != ELF32_R_TYPE (srel->r_info))
2484 {
2485 SNIP (2, 1, newrel);
2486 *again = TRUE;
2487 }
2488 }
2489
2490 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2491 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2492 /* Decodable bits and immediate type. */
2493 && insn[0] == 0x75
2494 /* Decodable bits. */
2495 && (insn[1] & 0xc0) == 0x00)
2496 {
2497 static const int newop[4] = { 1, 3, 4, 5 };
2498
2499 insn[0] = 0x60 | newop[insn[1] >> 4];
2500 /* The register number doesn't move. */
2501
2502 /* We can't relax this new opcode. */
2503 irel->r_addend = 0;
2504
2505 move_reloc (irel, srel, -1);
2506
2507 SNIP (2, 1, R_RX_RH_UIMM4p8);
2508 *again = TRUE;
2509 }
2510
2511 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2512 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2513 /* Decodable bits and immediate type. */
2514 && insn[0] == 0x71
2515 /* Same register for source and destination. */
2516 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2517 {
2518 int newrel;
2519
2520 /* Note that we can't turn "add $0,Rs" into a NOP
2521 because the flags need to be set right. */
2522
2523 if (ssymval < 0)
2524 {
2525 insn[0] = 0x60; /* Subtract. */
2526 newrel = R_RX_RH_UNEG4p8;
2527 }
2528 else
2529 {
2530 insn[0] = 0x62; /* Add. */
2531 newrel = R_RX_RH_UIMM4p8;
2532 }
2533
2534 /* The register number is in the right place. */
2535
2536 /* We can't relax this new opcode. */
2537 irel->r_addend = 0;
2538
2539 move_reloc (irel, srel, -1);
2540
2541 SNIP (2, 1, newrel);
2542 *again = TRUE;
2543 }
2544 }
2545
2546 /* These are either matched with a DSP6 (2-byte base) or an id24
2547 (3-byte base). */
2548 if (irel->r_addend & RX_RELAXA_IMM12)
2549 {
2550 int dspcode, offset = 0;
2551 long ssymval;
2552
2553 GET_RELOC;
2554
2555 if ((insn[0] & 0xfc) == 0xfc)
2556 dspcode = 1; /* Just something with one byte operand. */
2557 else
2558 dspcode = insn[0] & 3;
2559 switch (dspcode)
2560 {
2561 case 0: offset = 2; break;
2562 case 1: offset = 3; break;
2563 case 2: offset = 4; break;
2564 case 3: offset = 2; break;
2565 }
2566
2567 /* These relocations sign-extend, so we must do signed compares. */
2568 ssymval = (long) symval;
2569
2570 code = (insn[1] >> 2) & 3;
2571 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2572 {
2573 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2574
2575 insn[1] &= 0xf3;
2576 insn[1] |= 0x0c;
2577 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2578 if (newrel != ELF32_R_TYPE (srel->r_info))
2579 {
2580 SNIP (offset, 1, newrel);
2581 *again = TRUE;
2582 }
2583 }
2584
2585 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2586 {
2587 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2588
2589 insn[1] &= 0xf3;
2590 insn[1] |= 0x08;
2591 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2592 if (newrel != ELF32_R_TYPE (srel->r_info))
2593 {
2594 SNIP (offset, 1, newrel);
2595 *again = TRUE;
2596 }
2597 }
2598
2599 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2600 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2601 /* Decodable bits. */
2602 && insn[0] == 0xfb
2603 /* Decodable bits. */
2604 && ((insn[1] & 0x03) == 0x02))
2605 {
2606 int newrel;
2607
2608 insn[0] = 0x75;
2609 insn[1] = 0x40 | (insn[1] >> 4);
2610
2611 /* We can't relax this new opcode. */
2612 irel->r_addend = 0;
2613
2614 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2615 newrel = R_RX_ABS8U;
2616 else
2617 newrel = R_RX_DIR8U;
2618
2619 SNIP (2, 1, newrel);
2620 *again = TRUE;
2621 }
2622
2623 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2624 {
2625 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2626
2627 insn[1] &= 0xf3;
2628 insn[1] |= 0x04;
2629 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2630 if (newrel != ELF32_R_TYPE(srel->r_info))
2631 {
2632 SNIP (offset, 1, newrel);
2633 *again = TRUE;
2634 }
2635 }
2636
2637 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2638 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2639 /* Decodable bits. */
2640 && insn[0] == 0xfb
2641 /* Decodable bits. */
2642 && ((insn[1] & 0x03) == 0x02))
2643 {
2644 insn[0] = 0x66;
2645 insn[1] = insn[1] >> 4;
2646
2647 /* We can't relax this new opcode. */
2648 irel->r_addend = 0;
2649
2650 move_reloc (irel, srel, -1);
2651
2652 SNIP (2, 1, R_RX_RH_UIMM4p8);
2653 *again = TRUE;
2654 }
2655 }
2656
2657 if (irel->r_addend & RX_RELAXA_BRA)
2658 {
2659 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2660 int max_pcrel3 = 4;
2661 int alignment_glue = 0;
2662
2663 GET_RELOC;
2664
2665 /* Branches over alignment chunks are problematic, as
2666 deleting bytes here makes the branch *further* away. We
2667 can be agressive with branches within this alignment
2668 block, but not branches outside it. */
2669 if ((prev_alignment == NULL
2670 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2671 && (next_alignment == NULL
2672 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2673 alignment_glue = section_alignment_glue;
2674
2675 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2676 && srel[1].r_addend & RX_RELAXA_BRA
2677 && srel[1].r_offset < irel->r_offset + pcrel)
2678 max_pcrel3 ++;
2679
2680 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2681
2682 /* The values we compare PCREL with are not what you'd
2683 expect; they're off by a little to compensate for (1)
2684 where the reloc is relative to the insn, and (2) how much
2685 the insn is going to change when we relax it. */
2686
2687 /* These we have to decode. */
2688 switch (insn[0])
2689 {
2690 case 0x04: /* BRA pcdsp:24 */
2691 if (-32768 + alignment_glue <= pcrel
2692 && pcrel <= 32765 - alignment_glue)
2693 {
2694 insn[0] = 0x38;
2695 SNIP (3, 1, newrel);
2696 *again = TRUE;
2697 }
2698 break;
2699
2700 case 0x38: /* BRA pcdsp:16 */
2701 if (-128 + alignment_glue <= pcrel
2702 && pcrel <= 127 - alignment_glue)
2703 {
2704 insn[0] = 0x2e;
2705 SNIP (2, 1, newrel);
2706 *again = TRUE;
2707 }
2708 break;
2709
2710 case 0x2e: /* BRA pcdsp:8 */
2711 /* Note that there's a risk here of shortening things so
2712 much that we no longer fit this reloc; it *should*
2713 only happen when you branch across a branch, and that
2714 branch also devolves into BRA.S. "Real" code should
2715 be OK. */
2716 if (max_pcrel3 + alignment_glue <= pcrel
2717 && pcrel <= 10 - alignment_glue
2718 && allow_pcrel3)
2719 {
2720 insn[0] = 0x08;
2721 SNIP (1, 1, newrel);
2722 move_reloc (irel, srel, -1);
2723 *again = TRUE;
2724 }
2725 break;
2726
2727 case 0x05: /* BSR pcdsp:24 */
2728 if (-32768 + alignment_glue <= pcrel
2729 && pcrel <= 32765 - alignment_glue)
2730 {
2731 insn[0] = 0x39;
2732 SNIP (1, 1, newrel);
2733 *again = TRUE;
2734 }
2735 break;
2736
2737 case 0x3a: /* BEQ.W pcdsp:16 */
2738 case 0x3b: /* BNE.W pcdsp:16 */
2739 if (-128 + alignment_glue <= pcrel
2740 && pcrel <= 127 - alignment_glue)
2741 {
2742 insn[0] = 0x20 | (insn[0] & 1);
2743 SNIP (1, 1, newrel);
2744 *again = TRUE;
2745 }
2746 break;
2747
2748 case 0x20: /* BEQ.B pcdsp:8 */
2749 case 0x21: /* BNE.B pcdsp:8 */
2750 if (max_pcrel3 + alignment_glue <= pcrel
2751 && pcrel - alignment_glue <= 10
2752 && allow_pcrel3)
2753 {
2754 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2755 SNIP (1, 1, newrel);
2756 move_reloc (irel, srel, -1);
2757 *again = TRUE;
2758 }
2759 break;
2760
2761 case 0x16: /* synthetic BNE dsp24 */
2762 case 0x1e: /* synthetic BEQ dsp24 */
2763 if (-32767 + alignment_glue <= pcrel
2764 && pcrel <= 32766 - alignment_glue
2765 && insn[1] == 0x04)
2766 {
2767 if (insn[0] == 0x16)
2768 insn[0] = 0x3b;
2769 else
2770 insn[0] = 0x3a;
2771 /* We snip out the bytes at the end else the reloc
2772 will get moved too, and too much. */
2773 SNIP (3, 2, newrel);
2774 move_reloc (irel, srel, -1);
2775 *again = TRUE;
2776 }
2777 break;
2778 }
2779
2780 /* Special case - synthetic conditional branches, pcrel24.
2781 Note that EQ and NE have been handled above. */
2782 if ((insn[0] & 0xf0) == 0x20
2783 && insn[1] == 0x06
2784 && insn[2] == 0x04
2785 && srel->r_offset != irel->r_offset + 1
2786 && -32767 + alignment_glue <= pcrel
2787 && pcrel <= 32766 - alignment_glue)
2788 {
2789 insn[1] = 0x05;
2790 insn[2] = 0x38;
2791 SNIP (5, 1, newrel);
2792 *again = TRUE;
2793 }
2794
2795 /* Special case - synthetic conditional branches, pcrel16 */
2796 if ((insn[0] & 0xf0) == 0x20
2797 && insn[1] == 0x05
2798 && insn[2] == 0x38
2799 && srel->r_offset != irel->r_offset + 1
2800 && -127 + alignment_glue <= pcrel
2801 && pcrel <= 126 - alignment_glue)
2802 {
2803 int cond = (insn[0] & 0x0f) ^ 0x01;
2804
2805 insn[0] = 0x20 | cond;
2806 /* By moving the reloc first, we avoid having
2807 delete_bytes move it also. */
2808 move_reloc (irel, srel, -2);
2809 SNIP (2, 3, newrel);
2810 *again = TRUE;
2811 }
2812 }
2813
2814 BFD_ASSERT (nrelocs == 0);
2815
2816 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2817 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2818 because it may have one or two relocations. */
2819 if ((insn[0] & 0xfc) == 0xf8
2820 && (insn[1] & 0x80) == 0x00
2821 && (insn[0] & 0x03) != 0x03)
2822 {
2823 int dcode, icode, reg, ioff, dscale, ilen;
2824 bfd_vma disp_val = 0;
2825 long imm_val = 0;
2826 Elf_Internal_Rela * disp_rel = 0;
2827 Elf_Internal_Rela * imm_rel = 0;
2828
2829 /* Reset this. */
2830 srel = irel;
2831
2832 dcode = insn[0] & 0x03;
2833 icode = (insn[1] >> 2) & 0x03;
2834 reg = (insn[1] >> 4) & 0x0f;
2835
2836 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2837
2838 /* Figure out what the dispacement is. */
2839 if (dcode == 1 || dcode == 2)
2840 {
2841 /* There's a displacement. See if there's a reloc for it. */
2842 if (srel[1].r_offset == irel->r_offset + 2)
2843 {
2844 GET_RELOC;
2845 disp_val = symval;
2846 disp_rel = srel;
2847 }
2848 else
2849 {
2850 if (dcode == 1)
2851 disp_val = insn[2];
2852 else
2853 {
2854#if RX_OPCODE_BIG_ENDIAN
2855 disp_val = insn[2] * 256 + insn[3];
2856#else
2857 disp_val = insn[2] + insn[3] * 256;
2858#endif
2859 }
2860 switch (insn[1] & 3)
2861 {
2862 case 1:
2863 disp_val *= 2;
2864 scale = 2;
2865 break;
2866 case 2:
2867 disp_val *= 4;
2868 scale = 4;
2869 break;
2870 }
2871 }
2872 }
2873
2874 dscale = scale;
2875
2876 /* Figure out what the immediate is. */
2877 if (srel[1].r_offset == irel->r_offset + ioff)
2878 {
2879 GET_RELOC;
2880 imm_val = (long) symval;
2881 imm_rel = srel;
2882 }
2883 else
2884 {
2885 unsigned char * ip = insn + ioff;
2886
2887 switch (icode)
2888 {
2889 case 1:
2890 /* For byte writes, we don't sign extend. Makes the math easier later. */
2891 if (scale == 1)
2892 imm_val = ip[0];
2893 else
2894 imm_val = (char) ip[0];
2895 break;
2896 case 2:
2897#if RX_OPCODE_BIG_ENDIAN
2898 imm_val = ((char) ip[0] << 8) | ip[1];
2899#else
2900 imm_val = ((char) ip[1] << 8) | ip[0];
2901#endif
2902 break;
2903 case 3:
2904#if RX_OPCODE_BIG_ENDIAN
2905 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2906#else
2907 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2908#endif
2909 break;
2910 case 0:
2911#if RX_OPCODE_BIG_ENDIAN
2912 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2913#else
2914 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2915#endif
2916 break;
2917 }
2918 }
2919
2920 ilen = 2;
2921
2922 switch (dcode)
2923 {
2924 case 1:
2925 ilen += 1;
2926 break;
2927 case 2:
2928 ilen += 2;
2929 break;
2930 }
2931
2932 switch (icode)
2933 {
2934 case 1:
2935 ilen += 1;
2936 break;
2937 case 2:
2938 ilen += 2;
2939 break;
2940 case 3:
2941 ilen += 3;
2942 break;
2943 case 4:
2944 ilen += 4;
2945 break;
2946 }
2947
2948 /* The shortcut happens when the immediate is 0..255,
2949 register r0 to r7, and displacement (scaled) 0..31. */
2950
2951 if (0 <= imm_val && imm_val <= 255
2952 && 0 <= reg && reg <= 7
2953 && disp_val / dscale <= 31)
2954 {
2955 insn[0] = 0x3c | (insn[1] & 0x03);
2956 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2957 insn[2] = imm_val;
2958
2959 if (disp_rel)
2960 {
2961 int newrel = R_RX_NONE;
2962
2963 switch (dscale)
2964 {
2965 case 1:
2966 newrel = R_RX_RH_ABS5p8B;
2967 break;
2968 case 2:
2969 newrel = R_RX_RH_ABS5p8W;
2970 break;
2971 case 4:
2972 newrel = R_RX_RH_ABS5p8L;
2973 break;
2974 }
2975 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2976 move_reloc (irel, disp_rel, -1);
2977 }
2978 if (imm_rel)
2979 {
2980 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2981 move_reloc (disp_rel ? disp_rel : irel,
2982 imm_rel,
2983 irel->r_offset - imm_rel->r_offset + 2);
2984 }
2985
2986 SNIPNR (3, ilen - 3);
2987 *again = TRUE;
2988
2989 /* We can't relax this new opcode. */
2990 irel->r_addend = 0;
2991 }
2992 }
2993 }
2994
2995 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2996 whatever they're branching over won't shrink any more. If we're
2997 basically done here, do one more pass just for branches - but
2998 don't request a pass after that one! */
2999 if (!*again && !allow_pcrel3)
3000 {
3001 bfd_boolean ignored;
3002
3003 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3004 }
3005
3006 return TRUE;
3007
3008 error_return:
3009 if (free_relocs != NULL)
3010 free (free_relocs);
3011
3012 if (free_contents != NULL)
3013 free (free_contents);
3014
3015 if (shndx_buf != NULL)
3016 {
3017 shndx_hdr->contents = NULL;
3018 free (shndx_buf);
3019 }
3020
3021 if (free_intsyms != NULL)
3022 free (free_intsyms);
3023
3024 return FALSE;
3025}
3026
3027static bfd_boolean
3028elf32_rx_relax_section_wrapper (bfd * abfd,
3029 asection * sec,
3030 struct bfd_link_info * link_info,
3031 bfd_boolean * again)
3032{
3033 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3034}
3035\f
3036/* Function to set the ELF flag bits. */
3037
3038static bfd_boolean
3039rx_elf_set_private_flags (bfd * abfd, flagword flags)
3040{
3041 elf_elfheader (abfd)->e_flags = flags;
3042 elf_flags_init (abfd) = TRUE;
3043 return TRUE;
3044}
3045
3046static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3047static bfd_boolean ignore_lma = TRUE;
c7927a3c 3048
84bff83f 3049void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3050
3051void
84bff83f
NC		 3052bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3053 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3054{
3055 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3056 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3057}
3058
708e2187
NC		 3059/* Converts FLAGS into a descriptive string.
3060 Returns a static pointer. */
3061
3062static const char *
3063describe_flags (flagword flags)
3064{
3065 static char buf [128];
3066
3067 buf[0] = 0;
3068
3069 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3070 strcat (buf, "64-bit doubles");
3071 else
3072 strcat (buf, "32-bit doubles");
3073
3074 if (flags & E_FLAG_RX_DSP)
3075 strcat (buf, ", dsp");
3076 else
3077 strcat (buf, ", no dsp");
3078
3079 if (flags & E_FLAG_RX_PID)
3080 strcat (buf, ", pid");
3081 else
3082 strcat (buf, ", no pid");
3083
3084 if (flags & E_FLAG_RX_ABI)
3085 strcat (buf, ", RX ABI");
3086 else
3087 strcat (buf, ", GCC ABI");
3088
3525236c
NC		 3089 if (flags & E_FLAG_RX_SINSNS_SET)
3090 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3091
708e2187
NC		 3092 return buf;
3093}
3094
c7927a3c
NC		 3095/* Merge backend specific data from an object file to the output
3096 object file when linking. */
3097
3098static bfd_boolean
3099rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
3100{
3101 flagword old_flags;
3102 flagword new_flags;
3103 bfd_boolean error = FALSE;
3104
3105 new_flags = elf_elfheader (ibfd)->e_flags;
3106 old_flags = elf_elfheader (obfd)->e_flags;
3107
3108 if (!elf_flags_init (obfd))
3109 {
3110 /* First call, no flags set. */
3111 elf_flags_init (obfd) = TRUE;
3112 elf_elfheader (obfd)->e_flags = new_flags;
3113 }
3114 else if (old_flags != new_flags)
3115 {
708e2187
NC		 3116 flagword known_flags;
3117
3525236c
NC		 3118 if (old_flags & E_FLAG_RX_SINSNS_SET)
3119 {
3120 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3121 {
3122 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3123 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3124 }
3125 }
3126 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3127 {
3128 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3129 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3130 }
3131
708e2187 3132 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3133 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3134
3135 if ((old_flags ^ new_flags) & known_flags)
3136 {
3137 /* Only complain if flag bits we care about do not match.
3138 Other bits may be set, since older binaries did use some
3139 deprecated flags. */
3140 if (no_warn_mismatch)
3141 {
3142 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3143 }
3144 else
3145 {
708e2187
NC		 3146 _bfd_error_handler ("There is a conflict merging the ELF header flags from %s",
3147 bfd_get_filename (ibfd));
3148 _bfd_error_handler (" the input file's flags: %s",
3149 describe_flags (new_flags));
3150 _bfd_error_handler (" the output file's flags: %s",
3151 describe_flags (old_flags));
c7927a3c
NC		 3152 error = TRUE;
3153 }
3154 }
3155 else
3156 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3157 }
3158
3159 if (error)
3160 bfd_set_error (bfd_error_bad_value);
3161
3162 return !error;
3163}
3164\f
3165static bfd_boolean
3166rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3167{
3168 FILE * file = (FILE *) ptr;
3169 flagword flags;
3170
3171 BFD_ASSERT (abfd != NULL && ptr != NULL);
3172
3173 /* Print normal ELF private data. */
3174 _bfd_elf_print_private_bfd_data (abfd, ptr);
3175
3176 flags = elf_elfheader (abfd)->e_flags;
3177 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3178
6d8a3ede 3179 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3180 return TRUE;
3181}
3182
3183/* Return the MACH for an e_flags value. */
3184
3185static int
708e2187 3186elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3187{
708e2187
NC		 3188#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3189 Need to sort out how these flag bits are used.
3190 For now we assume that the flags are OK. */
c7927a3c 3191 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3192#endif
c7927a3c
NC		 3193 return bfd_mach_rx;
3194
3195 return 0;
3196}
3197
3198static bfd_boolean
3199rx_elf_object_p (bfd * abfd)
3200{
1ce74905
DD		 3201 int i;
3202 unsigned int u;
3203 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
3204 int nphdrs = elf_elfheader (abfd)->e_phnum;
3205 sec_ptr bsec;
fc87b9e8 3206 static int saw_be = FALSE;
1ce74905 3207
4c422395
DD		 3208 /* We never want to automatically choose the non-swapping big-endian
3209 target. The user can only get that explicitly, such as with -I
3210 and objcopy. */
6d00b590 3211 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3212 && abfd->target_defaulted)
3213 return FALSE;
3214
fc87b9e8
DD		 3215 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3216 as a fallback, so we check for "scanning" to know when to stop
3217 using the non-swapping target. */
6d00b590 3218 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3219 && saw_be)
3220 return FALSE;
6d00b590 3221 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3222 saw_be = TRUE;
3223
c7927a3c
NC		 3224 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3225 elf32_rx_machine (abfd));
1ce74905
DD		 3226
3227 /* For each PHDR in the object, we must find some section that
3228 corresponds (based on matching file offsets) and use its VMA
3229 information to reconstruct the p_vaddr field we clobbered when we
3230 wrote it out. */
3231 for (i=0; i<nphdrs; i++)
3232 {
3233 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3234 {
3235 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3236
74b1e045
DD		 3237 if (phdr[i].p_filesz
3238 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
1ce74905
DD		 3239 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3240 {
3241 /* Found one! The difference between the two addresses,
3242 plus the difference between the two file offsets, is
3243 enough information to reconstruct the lma. */
3244
3245 /* Example where they aren't:
3246 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3247 SEC[6] = vma 00000050 offset 00002050 size 00000040
3248
3249 The correct LMA for the section is fffc0140 + (2050-2010).
3250 */
3251
92ff23a1 3252 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3253 break;
3254 }
3255 }
3256
3257 /* We must update the bfd sections as well, so we don't stop
3258 with one match. */
3259 bsec = abfd->sections;
3260 while (bsec)
3261 {
74b1e045
DD		 3262 if (phdr[i].p_filesz
3263 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3264 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3265 {
3266 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3267 }
3268 bsec = bsec->next;
3269 }
3270 }
3271
c7927a3c
NC		 3272 return TRUE;
3273}
3274 \f
3275
3276#ifdef DEBUG
3277void
9ccb8af9 3278rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3279{
3280 size_t locsymcount;
3281 Elf_Internal_Sym * isymbuf;
3282 Elf_Internal_Sym * isymend;
3283 Elf_Internal_Sym * isym;
3284 Elf_Internal_Shdr * symtab_hdr;
3285 bfd_boolean free_internal = FALSE, free_external = FALSE;
3286 char * st_info_str;
3287 char * st_info_stb_str;
3288 char * st_other_str;
3289 char * st_shndx_str;
3290
3291 if (! internal_syms)
3292 {
3293 internal_syms = bfd_malloc (1000);
3294 free_internal = 1;
3295 }
3296 if (! external_syms)
3297 {
3298 external_syms = bfd_malloc (1000);
3299 free_external = 1;
3300 }
3301
3302 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3303 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3304 if (free_internal)
3305 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3306 symtab_hdr->sh_info, 0,
3307 internal_syms, external_syms, NULL);
3308 else
3309 isymbuf = internal_syms;
3310 isymend = isymbuf + locsymcount;
3311
3312 for (isym = isymbuf ; isym < isymend ; isym++)
3313 {
3314 switch (ELF_ST_TYPE (isym->st_info))
3315 {
b707aa49
NC		 3316 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3317 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3318 case STT_FILE: st_info_str = "STT_FILE"; break;
3319 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3320 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3321 default: st_info_str = "";
3322 }
3323 switch (ELF_ST_BIND (isym->st_info))
3324 {
b707aa49
NC		 3325 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3326 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3327 default: st_info_stb_str = "";
3328 }
3329 switch (ELF_ST_VISIBILITY (isym->st_other))
3330 {
b707aa49
NC		 3331 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3332 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3333 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3334 default: st_other_str = "";
3335 }
3336 switch (isym->st_shndx)
3337 {
b707aa49
NC		 3338 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3339 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3340 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3341 default: st_shndx_str = "";
3342 }
3343
3344 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3345 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3346 isym,
3347 (unsigned long) isym->st_value,
3348 (unsigned long) isym->st_size,
3349 isym->st_name,
3350 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3351 isym->st_name),
3352 isym->st_info, st_info_str, st_info_stb_str,
3353 isym->st_other, st_other_str,
3354 isym->st_shndx, st_shndx_str);
3355 }
3356 if (free_internal)
3357 free (internal_syms);
3358 if (free_external)
3359 free (external_syms);
3360}
3361
3362char *
3363rx_get_reloc (long reloc)
3364{
3365 if (0 <= reloc && reloc < R_RX_max)
3366 return rx_elf_howto_table[reloc].name;
3367 return "";
3368}
3369#endif /* DEBUG */
3370
3371\f
3372/* We must take care to keep the on-disk copy of any code sections
3373 that are fully linked swapped if the target is big endian, to match
3374 the Renesas tools. */
3375
3376/* The rule is: big endian object that are final-link executables,
3377 have code sections stored with 32-bit words swapped relative to
3378 what you'd get by default. */
3379
3380static bfd_boolean
3381rx_get_section_contents (bfd * abfd,
3382 sec_ptr section,
3383 void * location,
3384 file_ptr offset,
3385 bfd_size_type count)
3386{
3387 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3388 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3389 bfd_boolean rv;
3390
3391#ifdef DJDEBUG
3392 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3393 (long) offset, (long) count, section->name,
3394 bfd_big_endian(abfd) ? "be" : "le",
3395 exec, s_code, (long unsigned) section->filepos,
3396 (long unsigned) offset);
3397#endif
3398
3399 if (exec && s_code && bfd_big_endian (abfd))
3400 {
3401 char * cloc = (char *) location;
3402 bfd_size_type cnt, end_cnt;
3403
3404 rv = TRUE;
3405
3406 /* Fetch and swap unaligned bytes at the beginning. */
3407 if (offset % 4)
3408 {
3409 char buf[4];
3410
3411 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3412 (offset & -4), 4);
3413 if (!rv)
3414 return FALSE;
3415
3416 bfd_putb32 (bfd_getl32 (buf), buf);
3417
3418 cnt = 4 - (offset % 4);
3419 if (cnt > count)
3420 cnt = count;
3421
3422 memcpy (location, buf + (offset % 4), cnt);
3423
3424 count -= cnt;
3425 offset += cnt;
3426 cloc += count;
3427 }
3428
3429 end_cnt = count % 4;
3430
3431 /* Fetch and swap the middle bytes. */
3432 if (count >= 4)
3433 {
3434 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3435 count - end_cnt);
3436 if (!rv)
3437 return FALSE;
3438
3439 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3440 bfd_putb32 (bfd_getl32 (cloc), cloc);
3441 }
3442
3443 /* Fetch and swap the end bytes. */
3444 if (end_cnt > 0)
3445 {
3446 char buf[4];
3447
3448 /* Fetch the end bytes. */
3449 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3450 offset + count - end_cnt, 4);
3451 if (!rv)
3452 return FALSE;
3453
3454 bfd_putb32 (bfd_getl32 (buf), buf);
3455 memcpy (cloc, buf, end_cnt);
3456 }
3457 }
3458 else
3459 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3460
3461 return rv;
3462}
3463
3464#ifdef DJDEBUG
3465static bfd_boolean
3466rx2_set_section_contents (bfd * abfd,
3467 sec_ptr section,
3468 const void * location,
3469 file_ptr offset,
3470 bfd_size_type count)
3471{
3472 bfd_size_type i;
3473
3474 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3475 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3476 for (i = 0; i < count; i++)
3477 {
3478 if (i % 16 == 0 && i > 0)
3479 fprintf (stderr, "\n");
3480
3481 if (i % 16 && i % 4 == 0)
3482 fprintf (stderr, " ");
3483
3484 if (i % 16 == 0)
3485 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3486
3487 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3488 }
3489 fprintf (stderr, "\n");
3490
3491 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3492}
3493#define _bfd_elf_set_section_contents rx2_set_section_contents
3494#endif
3495
3496static bfd_boolean
3497rx_set_section_contents (bfd * abfd,
3498 sec_ptr section,
3499 const void * location,
3500 file_ptr offset,
3501 bfd_size_type count)
3502{
3503 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3504 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3505 bfd_boolean rv;
3506 char * swapped_data = NULL;
3507 bfd_size_type i;
3508 bfd_vma caddr = section->vma + offset;
3509 file_ptr faddr = 0;
3510 bfd_size_type scount;
3511
3512#ifdef DJDEBUG
3513 bfd_size_type i;
3514
3515 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3516 (long) offset, (long) count, section->name,
3517 bfd_big_endian (abfd) ? "be" : "le",
3518 exec, s_code);
3519
3520 for (i = 0; i < count; i++)
3521 {
3522 int a = section->vma + offset + i;
3523
3524 if (a % 16 == 0 && a > 0)
3525 fprintf (stderr, "\n");
3526
3527 if (a % 16 && a % 4 == 0)
3528 fprintf (stderr, " ");
3529
3530 if (a % 16 == 0 || i == 0)
3531 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3532
3533 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3534 }
3535
3536 fprintf (stderr, "\n");
3537#endif
3538
3539 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3540 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3541
3542 while (count > 0 && caddr > 0 && caddr % 4)
3543 {
3544 switch (caddr % 4)
3545 {
3546 case 0: faddr = offset + 3; break;
3547 case 1: faddr = offset + 1; break;
3548 case 2: faddr = offset - 1; break;
3549 case 3: faddr = offset - 3; break;
3550 }
3551
3552 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3553 if (! rv)
3554 return rv;
3555
3556 location ++;
3557 offset ++;
3558 count --;
3559 caddr ++;
3560 }
3561
3562 scount = (int)(count / 4) * 4;
3563 if (scount > 0)
3564 {
3565 char * cloc = (char *) location;
3566
3567 swapped_data = (char *) bfd_alloc (abfd, count);
3568
3569 for (i = 0; i < count; i += 4)
3570 {
3571 bfd_vma v = bfd_getl32 (cloc + i);
3572 bfd_putb32 (v, swapped_data + i);
3573 }
3574
3575 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3576
3577 if (!rv)
3578 return rv;
3579 }
3580
3581 count -= scount;
3582 location += scount;
3583 offset += scount;
3584
3585 if (count > 0)
3586 {
3587 caddr = section->vma + offset;
3588 while (count > 0)
3589 {
3590 switch (caddr % 4)
3591 {
3592 case 0: faddr = offset + 3; break;
3593 case 1: faddr = offset + 1; break;
3594 case 2: faddr = offset - 1; break;
3595 case 3: faddr = offset - 3; break;
3596 }
3597 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3598 if (! rv)
3599 return rv;
3600
3601 location ++;
3602 offset ++;
3603 count --;
3604 caddr ++;
3605 }
3606 }
3607
3608 return TRUE;
3609}
3610
3611static bfd_boolean
3612rx_final_link (bfd * abfd, struct bfd_link_info * info)
3613{
3614 asection * o;
3615
3616 for (o = abfd->sections; o != NULL; o = o->next)
3617 {
3618#ifdef DJDEBUG
3619 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3620 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3621#endif
3622 if (o->flags & SEC_CODE
3623 && bfd_big_endian (abfd)
e57278ef 3624 && o->size % 4)
c7927a3c
NC		 3625 {
3626#ifdef DJDEBUG
3627 fprintf (stderr, "adjusting...\n");
3628#endif
3629 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3630 }
3631 }
3632
3633 return bfd_elf_final_link (abfd, info);
3634}
3635
3636static bfd_boolean
3637elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3638 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3639{
3640 const struct elf_backend_data * bed;
3641 struct elf_obj_tdata * tdata;
3642 Elf_Internal_Phdr * phdr;
3643 unsigned int count;
3644 unsigned int i;
3645
3646 bed = get_elf_backend_data (abfd);
3647 tdata = elf_tdata (abfd);
3648 phdr = tdata->phdr;
12bd6957 3649 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3650
84bff83f
NC		 3651 if (ignore_lma)
3652 for (i = count; i-- != 0;)
3653 if (phdr[i].p_type == PT_LOAD)
3654 {
3655 /* The Renesas tools expect p_paddr to be zero. However,
3656 there is no other way to store the writable data in ROM for
3657 startup initialization. So, we let the linker *think*
3658 we're using paddr and vaddr the "usual" way, but at the
3659 last minute we move the paddr into the vaddr (which is what
3660 the simulator uses) and zero out paddr. Note that this
3661 does not affect the section headers, just the program
3662 headers. We hope. */
c7927a3c 3663 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3664#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3665 becomes wrong. */
84bff83f
NC		 3666 phdr[i].p_paddr = 0;
3667#endif
3668 }
c7927a3c
NC		 3669
3670 return TRUE;
3671}
708e2187
NC		 3672
3673/* The default literal sections should always be marked as "code" (i.e.,
3674 SHF_EXECINSTR). This is particularly important for big-endian mode
3675 when we do not want their contents byte reversed. */
3676static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3677{
3678 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3679 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3680 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3681 { NULL, 0, 0, 0, 0 }
3682};
7a2f2d82
DD		 3683\f
3684typedef struct {
3685 bfd *abfd;
3686 struct bfd_link_info *info;
3687 bfd_vma table_start;
3688 int table_size;
3689 bfd_vma *table_handlers;
3690 bfd_vma table_default_handler;
3691 struct bfd_link_hash_entry **table_entries;
3692 struct bfd_link_hash_entry *table_default_entry;
3693 FILE *mapfile;
3694} RX_Table_Info;
3695
3696static bfd_boolean
3697rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3698{
3699 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3700 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3701 const char *name; /* of the symbol we've found */
3702 asection *sec;
3703 struct bfd *abfd;
3704 int idx;
3705 const char *tname; /* name of the table */
3706 bfd_vma start_addr, end_addr;
3707 char *buf;
3708 struct bfd_link_hash_entry * h;
3709
3710 /* We're looking for globally defined symbols of the form
3711 $tablestart$<NAME>. */
3712 if (ent->type != bfd_link_hash_defined
3713 && ent->type != bfd_link_hash_defweak)
3714 return TRUE;
3715
3716 name = ent->root.string;
3717 sec = ent->u.def.section;
3718 abfd = sec->owner;
3719
3720 if (strncmp (name, "$tablestart$", 12))
3721 return TRUE;
3722
3723 sec->flags |= SEC_KEEP;
3724
3725 tname = name + 12;
3726
3727 start_addr = ent->u.def.value;
3728
3729 /* At this point, we can't build the table but we can (and must)
3730 find all the related symbols and mark their sections as SEC_KEEP
3731 so we don't garbage collect them. */
3732
3733 buf = (char *) malloc (12 + 10 + strlen (tname));
3734
3735 sprintf (buf, "$tableend$%s", tname);
3736 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3737 if (!h || (h->type != bfd_link_hash_defined
3738 && h->type != bfd_link_hash_defweak))
3739 {
3740 _bfd_error_handler (_("%B:%A: table %s missing corresponding %s"),
3741 abfd, sec, name, buf);
3742 return TRUE;
3743 }
3744
3745 if (h->u.def.section != ent->u.def.section)
3746 {
3747 _bfd_error_handler (_("%B:%A: %s and %s must be in the same input section"),
3748 h->u.def.section->owner, h->u.def.section,
3749 name, buf);
3750 return TRUE;
3751 }
3752
3753 end_addr = h->u.def.value;
3754
3755 sprintf (buf, "$tableentry$default$%s", tname);
3756 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3757 if (h && (h->type == bfd_link_hash_defined
3758 || h->type == bfd_link_hash_defweak))
3759 {
3760 h->u.def.section->flags |= SEC_KEEP;
3761 }
3762
3763 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3764 {
3765 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3766 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3767 if (h && (h->type == bfd_link_hash_defined
3768 || h->type == bfd_link_hash_defweak))
3769 {
3770 h->u.def.section->flags |= SEC_KEEP;
3771 }
3772 }
3773
3774 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3775 return TRUE;
3776}
3777
3778/* We need to check for table entry symbols and build the tables, and
3779 we need to do it before the linker does garbage collection. This function is
3780 called once per input object file. */
3781static bfd_boolean
3782rx_check_directives
3783 (bfd * abfd ATTRIBUTE_UNUSED,
3784 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3785{
3786 RX_Table_Info stuff;
3787
3788 stuff.abfd = abfd;
3789 stuff.info = info;
3790 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3791
3792 return TRUE;
3793}
3794
3795\f
3796static bfd_boolean
3797rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3798{
3799 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3800 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3801 int idx;
3802 const char *name;
3803 bfd_vma addr;
3804
3805 /* See if the symbol ENT has an address listed in the table, and
3806 isn't a debug/special symbol. If so, put it in the table. */
3807
3808 if (ent->type != bfd_link_hash_defined
3809 && ent->type != bfd_link_hash_defweak)
3810 return TRUE;
3811
3812 name = ent->root.string;
3813
3814 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3815 return TRUE;
3816
3817 addr = (ent->u.def.value
3818 + ent->u.def.section->output_section->vma
3819 + ent->u.def.section->output_offset);
3820
3821 for (idx = 0; idx < info->table_size; idx ++)
3822 if (addr == info->table_handlers[idx])
3823 info->table_entries[idx] = ent;
3824
3825 if (addr == info->table_default_handler)
3826 info->table_default_entry = ent;
3827
3828 return TRUE;
3829}
3830
3831static bfd_boolean
3832rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3833{
3834 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3835 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3836 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3837 int idx;
3838 const char *tname; /* name of the table */
3839 bfd_vma start_addr, end_addr;
3840 char *buf;
3841 struct bfd_link_hash_entry * h;
3842 int need_elipses;
3843
3844 /* We're looking for globally defined symbols of the form
3845 $tablestart$<NAME>. */
3846 if (ent->type != bfd_link_hash_defined
3847 && ent->type != bfd_link_hash_defweak)
3848 return TRUE;
3849
3850 name = ent->root.string;
7a2f2d82
DD		 3851
3852 if (strncmp (name, "$tablestart$", 12))
3853 return TRUE;
3854
3855 tname = name + 12;
3856 start_addr = (ent->u.def.value
3857 + ent->u.def.section->output_section->vma
3858 + ent->u.def.section->output_offset);
3859
3860 buf = (char *) malloc (12 + 10 + strlen (tname));
3861
3862 sprintf (buf, "$tableend$%s", tname);
3863 end_addr = get_symbol_value_maybe (buf, info->info);
3864
3865 sprintf (buf, "$tableentry$default$%s", tname);
3866 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3867 if (h)
3868 {
3869 info->table_default_handler = (h->u.def.value
3870 + h->u.def.section->output_section->vma
3871 + h->u.def.section->output_offset);
3872 }
3873 else
3874 /* Zero is a valid handler address! */
3875 info->table_default_handler = (bfd_vma) (-1);
3876 info->table_default_entry = NULL;
3877
3878 info->table_start = start_addr;
3879 info->table_size = (int) (end_addr - start_addr) / 4;
3880 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3881 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3882
3883 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3884 {
3885 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3886 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3887 if (h && (h->type == bfd_link_hash_defined
3888 || h->type == bfd_link_hash_defweak))
3889 {
3890 info->table_handlers[idx] = (h->u.def.value
3891 + h->u.def.section->output_section->vma
3892 + h->u.def.section->output_offset);
3893 }
3894 else
3895 info->table_handlers[idx] = info->table_default_handler;
3896 info->table_entries[idx] = NULL;
3897 }
3898
3899 free (buf);
3900
3901 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3902
33ac0ca1 3903 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3904 tname, info->table_size, start_addr);
3905
3906 if (info->table_default_entry)
33ac0ca1 3907 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3908 info->table_default_entry->root.string,
3909 info->table_default_handler);
3910 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3911 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3912 info->table_default_handler);
3913 else
3914 fprintf (info->mapfile, " no default handler\n");
3915
3916 need_elipses = 1;
3917 for (idx = 0; idx < info->table_size; idx ++)
3918 {
3919 if (info->table_handlers[idx] == info->table_default_handler)
3920 {
3921 if (need_elipses)
3922 fprintf (info->mapfile, " . . .\n");
3923 need_elipses = 0;
3924 continue;
3925 }
3926 need_elipses = 1;
3927
33ac0ca1 3928 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3929
3930 if (info->table_handlers[idx] == (bfd_vma) (-1))
3931 fprintf (info->mapfile, "(no handler found)\n");
3932
3933 else if (info->table_handlers[idx] == info->table_default_handler)
3934 {
3935 if (info->table_default_entry)
3936 fprintf (info->mapfile, "(default)\n");
3937 else
3938 fprintf (info->mapfile, "(default)\n");
3939 }
3940
3941 else if (info->table_entries[idx])
3942 {
33ac0ca1 3943 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3944 }
3945
3946 else
3947 {
33ac0ca1 3948 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3949 }
3950 }
3951 if (need_elipses)
3952 fprintf (info->mapfile, " . . .\n");
3953
3954 return TRUE;
3955}
3956
3957void
3958rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3959{
3960 /* We scan the symbol table looking for $tableentry$'s, and for
3961 each, try to deduce which handlers go with which entries. */
3962
3963 RX_Table_Info stuff;
3964
3965 stuff.abfd = obfd;
3966 stuff.info = info;
3967 stuff.mapfile = mapfile;
3968 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
3969}
3970
c7927a3c
NC		 3971\f
3972#define ELF_ARCH bfd_arch_rx
3973#define ELF_MACHINE_CODE EM_RX
3974#define ELF_MAXPAGESIZE 0x1000
3975
6d00b590 3976#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 3977#define TARGET_BIG_NAME "elf32-rx-be"
3978
6d00b590 3979#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 3980#define TARGET_LITTLE_NAME "elf32-rx-le"
3981
3982#define elf_info_to_howto_rel NULL
3983#define elf_info_to_howto rx_info_to_howto_rela
3984#define elf_backend_object_p rx_elf_object_p
3985#define elf_backend_relocate_section rx_elf_relocate_section
3986#define elf_symbol_leading_char ('_')
3987#define elf_backend_can_gc_sections 1
3988#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3989
3990#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3991#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3992#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3993#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3994#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3995#define bfd_elf32_get_section_contents rx_get_section_contents
3996#define bfd_elf32_set_section_contents rx_set_section_contents
3997#define bfd_elf32_bfd_final_link rx_final_link
3998#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
708e2187 3999#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4000#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4001
4002#include "elf32-target.h"
4c422395
DD		 4003
4004/* We define a second big-endian target that doesn't have the custom
4005 section get/set hooks, for times when we want to preserve the
4006 pre-swapped .text sections (like objcopy). */
4007
4008#undef TARGET_BIG_SYM
6d00b590 4009#define TARGET_BIG_SYM rx_elf32_be_ns_vec
4c422395
DD		 4010#undef TARGET_BIG_NAME
4011#define TARGET_BIG_NAME "elf32-rx-be-ns"
4012#undef TARGET_LITTLE_SYM
4013
4014#undef bfd_elf32_get_section_contents
4015#undef bfd_elf32_set_section_contents
4016
4017#undef elf32_bed
4018#define elf32_bed elf32_rx_be_ns_bed
4019
4020#include "elf32-target.h"
GDB Binutils - Deliverables
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