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[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
b90efa5b 2 Copyright (C) 2008-2015 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
20#include "sysdep.h"
21#include "bfd.h"
d68cd58c 22#include "bfd_stdint.h"
c7927a3c
NC		 23#include "libbfd.h"
24#include "elf-bfd.h"
25#include "elf/rx.h"
26#include "libiberty.h"
7a2f2d82 27#include "elf32-rx.h"
c7927a3c
NC		 28
29#define RX_OPCODE_BIG_ENDIAN 0
30
4c422395
DD		 31/* This is a meta-target that's used only with objcopy, to avoid the
32 endian-swap we would otherwise get. We check for this in
33 rx_elf_object_p(). */
6d00b590
AM		 34const bfd_target rx_elf32_be_ns_vec;
35const bfd_target rx_elf32_be_vec;
4c422395 36
c7927a3c
NC		 37#ifdef DEBUG
38char * rx_get_reloc (long);
9ccb8af9 39void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 40#endif
41
42#define RXREL(n,sz,bit,shift,complain,pcrel) \
43 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
44 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
45
46/* Note that the relocations around 0x7f are internal to this file;
47 feel free to move them as needed to avoid conflicts with published
48 relocation numbers. */
49
50static reloc_howto_type rx_elf_howto_table [] =
51{
52 RXREL (NONE, 0, 0, 0, dont, FALSE),
53 RXREL (DIR32, 2, 32, 0, signed, FALSE),
54 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
55 RXREL (DIR16, 1, 16, 0, dont, FALSE),
56 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
57 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
58 RXREL (DIR8, 0, 8, 0, dont, FALSE),
59 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
60 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
61 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
62 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
63 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
64 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
65 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
66 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
67 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
68 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
69 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
71
72 EMPTY_HOWTO (0x13),
73 EMPTY_HOWTO (0x14),
74 EMPTY_HOWTO (0x15),
75 EMPTY_HOWTO (0x16),
76 EMPTY_HOWTO (0x17),
77 EMPTY_HOWTO (0x18),
78 EMPTY_HOWTO (0x19),
79 EMPTY_HOWTO (0x1a),
80 EMPTY_HOWTO (0x1b),
81 EMPTY_HOWTO (0x1c),
82 EMPTY_HOWTO (0x1d),
83 EMPTY_HOWTO (0x1e),
84 EMPTY_HOWTO (0x1f),
85
86 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
87 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
88 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
89 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
90 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
91 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
92 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
93 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
94 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
95 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
96 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
97 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
100
101 EMPTY_HOWTO (0x2e),
102 EMPTY_HOWTO (0x2f),
103 EMPTY_HOWTO (0x30),
104 EMPTY_HOWTO (0x31),
105 EMPTY_HOWTO (0x32),
106 EMPTY_HOWTO (0x33),
107 EMPTY_HOWTO (0x34),
108 EMPTY_HOWTO (0x35),
109 EMPTY_HOWTO (0x36),
110 EMPTY_HOWTO (0x37),
111 EMPTY_HOWTO (0x38),
112 EMPTY_HOWTO (0x39),
113 EMPTY_HOWTO (0x3a),
114 EMPTY_HOWTO (0x3b),
115 EMPTY_HOWTO (0x3c),
116 EMPTY_HOWTO (0x3d),
117 EMPTY_HOWTO (0x3e),
118 EMPTY_HOWTO (0x3f),
119 EMPTY_HOWTO (0x40),
120
121 RXREL (ABS32, 2, 32, 0, dont, FALSE),
122 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
123 RXREL (ABS16, 1, 16, 0, dont, FALSE),
124 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
125 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
126 RXREL (ABS8, 0, 8, 0, dont, FALSE),
127 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
128 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
129 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
130 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
131 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
132 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
133 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
135 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
137 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
138
139#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
140
141 EMPTY_HOWTO (0x52),
142 EMPTY_HOWTO (0x53),
143 EMPTY_HOWTO (0x54),
144 EMPTY_HOWTO (0x55),
145 EMPTY_HOWTO (0x56),
146 EMPTY_HOWTO (0x57),
147 EMPTY_HOWTO (0x58),
148 EMPTY_HOWTO (0x59),
149 EMPTY_HOWTO (0x5a),
150 EMPTY_HOWTO (0x5b),
151 EMPTY_HOWTO (0x5c),
152 EMPTY_HOWTO (0x5d),
153 EMPTY_HOWTO (0x5e),
154 EMPTY_HOWTO (0x5f),
155 EMPTY_HOWTO (0x60),
156 EMPTY_HOWTO (0x61),
157 EMPTY_HOWTO (0x62),
158 EMPTY_HOWTO (0x63),
159 EMPTY_HOWTO (0x64),
160 EMPTY_HOWTO (0x65),
161 EMPTY_HOWTO (0x66),
162 EMPTY_HOWTO (0x67),
163 EMPTY_HOWTO (0x68),
164 EMPTY_HOWTO (0x69),
165 EMPTY_HOWTO (0x6a),
166 EMPTY_HOWTO (0x6b),
167 EMPTY_HOWTO (0x6c),
168 EMPTY_HOWTO (0x6d),
169 EMPTY_HOWTO (0x6e),
170 EMPTY_HOWTO (0x6f),
171 EMPTY_HOWTO (0x70),
172 EMPTY_HOWTO (0x71),
173 EMPTY_HOWTO (0x72),
174 EMPTY_HOWTO (0x73),
175 EMPTY_HOWTO (0x74),
176 EMPTY_HOWTO (0x75),
177 EMPTY_HOWTO (0x76),
178 EMPTY_HOWTO (0x77),
179
180 /* These are internal. */
181 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
182 /* ---- ---- 4--- 3210. */
183#define R_RX_RH_ABS5p8B 0x78
184 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
185#define R_RX_RH_ABS5p8W 0x79
186 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
187#define R_RX_RH_ABS5p8L 0x7a
188 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
189 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
190 /* ---- -432 1--- 0---. */
191#define R_RX_RH_ABS5p5B 0x7b
192 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
193#define R_RX_RH_ABS5p5W 0x7c
194 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
195#define R_RX_RH_ABS5p5L 0x7d
196 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
197 /* A 4-bit unsigned immediate at bit position 8. */
198#define R_RX_RH_UIMM4p8 0x7e
199 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
200 /* A 4-bit negative unsigned immediate at bit position 8. */
201#define R_RX_RH_UNEG4p8 0x7f
202 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
203 /* End of internal relocs. */
204
205 RXREL (SYM, 2, 32, 0, dont, FALSE),
206 RXREL (OPneg, 2, 32, 0, dont, FALSE),
207 RXREL (OPadd, 2, 32, 0, dont, FALSE),
208 RXREL (OPsub, 2, 32, 0, dont, FALSE),
209 RXREL (OPmul, 2, 32, 0, dont, FALSE),
210 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
211 RXREL (OPshla, 2, 32, 0, dont, FALSE),
212 RXREL (OPshra, 2, 32, 0, dont, FALSE),
213 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
214 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
215 RXREL (OPand, 2, 32, 0, dont, FALSE),
216 RXREL (OPor, 2, 32, 0, dont, FALSE),
217 RXREL (OPxor, 2, 32, 0, dont, FALSE),
218 RXREL (OPnot, 2, 32, 0, dont, FALSE),
219 RXREL (OPmod, 2, 32, 0, dont, FALSE),
220 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
221 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
222};
223\f
224/* Map BFD reloc types to RX ELF reloc types. */
225
226struct rx_reloc_map
227{
228 bfd_reloc_code_real_type bfd_reloc_val;
229 unsigned int rx_reloc_val;
230};
231
232static const struct rx_reloc_map rx_reloc_map [] =
233{
234 { BFD_RELOC_NONE, R_RX_NONE },
235 { BFD_RELOC_8, R_RX_DIR8S },
236 { BFD_RELOC_16, R_RX_DIR16S },
237 { BFD_RELOC_24, R_RX_DIR24S },
238 { BFD_RELOC_32, R_RX_DIR32 },
239 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
240 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
241 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
242 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
243 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
244 { BFD_RELOC_RX_8U, R_RX_DIR8U },
245 { BFD_RELOC_RX_16U, R_RX_DIR16U },
246 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
247 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
248 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
249 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
250 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
251 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
252 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
253 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
254 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
255 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
256 { BFD_RELOC_RX_SYM, R_RX_SYM },
257 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 258 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 259 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
260 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 261 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 262 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 263 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 264 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
265 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
266 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
267};
268
269#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
270
271static reloc_howto_type *
272rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
273 bfd_reloc_code_real_type code)
274{
275 unsigned int i;
276
277 if (code == BFD_RELOC_RX_32_OP)
278 return rx_elf_howto_table + R_RX_DIR32;
279
280 for (i = ARRAY_SIZE (rx_reloc_map); --i;)
281 if (rx_reloc_map [i].bfd_reloc_val == code)
282 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
283
284 return NULL;
285}
286
287static reloc_howto_type *
288rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
289{
290 unsigned int i;
291
292 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
293 if (rx_elf_howto_table[i].name != NULL
294 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
295 return rx_elf_howto_table + i;
296
297 return NULL;
298}
299
300/* Set the howto pointer for an RX ELF reloc. */
301
302static void
303rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
304 arelent * cache_ptr,
305 Elf_Internal_Rela * dst)
306{
307 unsigned int r_type;
308
309 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 310 if (r_type >= (unsigned int) R_RX_max)
311 {
312 _bfd_error_handler (_("%A: invalid RX reloc number: %d"), abfd, r_type);
313 r_type = 0;
314 }
c7927a3c
NC		 315 cache_ptr->howto = rx_elf_howto_table + r_type;
316}
317\f
318static bfd_vma
319get_symbol_value (const char * name,
91d6fa6a 320 bfd_reloc_status_type * status,
c7927a3c
NC		 321 struct bfd_link_info * info,
322 bfd * input_bfd,
323 asection * input_section,
324 int offset)
325{
326 bfd_vma value = 0;
327 struct bfd_link_hash_entry * h;
328
329 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
330
331 if (h == NULL
332 || (h->type != bfd_link_hash_defined
333 && h->type != bfd_link_hash_defweak))
91d6fa6a 334 * status = info->callbacks->undefined_symbol
c7927a3c
NC		 335 (info, name, input_bfd, input_section, offset, TRUE);
336 else
337 value = (h->u.def.value
338 + h->u.def.section->output_section->vma
339 + h->u.def.section->output_offset);
340
341 return value;
342}
7a2f2d82
DD		 343static bfd_vma
344get_symbol_value_maybe (const char * name,
345 struct bfd_link_info * info)
346{
347 bfd_vma value = 0;
348 struct bfd_link_hash_entry * h;
349
350 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
351
352 if (h == NULL
353 || (h->type != bfd_link_hash_defined
354 && h->type != bfd_link_hash_defweak))
355 return 0;
356 else
357 value = (h->u.def.value
358 + h->u.def.section->output_section->vma
359 + h->u.def.section->output_offset);
360
361 return value;
362}
c7927a3c
NC		 363
364static bfd_vma
91d6fa6a 365get_gp (bfd_reloc_status_type * status,
c7927a3c
NC		 366 struct bfd_link_info * info,
367 bfd * abfd,
368 asection * sec,
369 int offset)
370{
371 static bfd_boolean cached = FALSE;
372 static bfd_vma cached_value = 0;
373
374 if (!cached)
375 {
91d6fa6a 376 cached_value = get_symbol_value ("__gp", status, info, abfd, sec, offset);
c7927a3c
NC		 377 cached = TRUE;
378 }
379 return cached_value;
380}
381
382static bfd_vma
91d6fa6a 383get_romstart (bfd_reloc_status_type * status,
c7927a3c
NC		 384 struct bfd_link_info * info,
385 bfd * abfd,
386 asection * sec,
387 int offset)
388{
389 static bfd_boolean cached = FALSE;
390 static bfd_vma cached_value = 0;
391
392 if (!cached)
393 {
91d6fa6a 394 cached_value = get_symbol_value ("_start", status, info, abfd, sec, offset);
c7927a3c
NC		 395 cached = TRUE;
396 }
397 return cached_value;
398}
399
400static bfd_vma
91d6fa6a 401get_ramstart (bfd_reloc_status_type * status,
c7927a3c
NC		 402 struct bfd_link_info * info,
403 bfd * abfd,
404 asection * sec,
405 int offset)
406{
407 static bfd_boolean cached = FALSE;
408 static bfd_vma cached_value = 0;
409
410 if (!cached)
411 {
91d6fa6a 412 cached_value = get_symbol_value ("__datastart", status, info, abfd, sec, offset);
c7927a3c
NC		 413 cached = TRUE;
414 }
415 return cached_value;
416}
417
418#define NUM_STACK_ENTRIES 16
419static int32_t rx_stack [ NUM_STACK_ENTRIES ];
420static unsigned int rx_stack_top;
421
422#define RX_STACK_PUSH(val) \
423 do \
424 { \
425 if (rx_stack_top < NUM_STACK_ENTRIES) \
426 rx_stack [rx_stack_top ++] = (val); \
427 else \
428 r = bfd_reloc_dangerous; \
429 } \
430 while (0)
431
432#define RX_STACK_POP(dest) \
433 do \
434 { \
435 if (rx_stack_top > 0) \
436 (dest) = rx_stack [-- rx_stack_top]; \
437 else \
438 (dest) = 0, r = bfd_reloc_dangerous; \
439 } \
440 while (0)
441
442/* Relocate an RX ELF section.
443 There is some attempt to make this function usable for many architectures,
444 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
445 if only to serve as a learning tool.
446
447 The RELOCATE_SECTION function is called by the new ELF backend linker
448 to handle the relocations for a section.
449
450 The relocs are always passed as Rela structures; if the section
451 actually uses Rel structures, the r_addend field will always be
452 zero.
453
454 This function is responsible for adjusting the section contents as
455 necessary, and (if using Rela relocs and generating a relocatable
456 output file) adjusting the reloc addend as necessary.
457
458 This function does not have to worry about setting the reloc
459 address or the reloc symbol index.
460
461 LOCAL_SYMS is a pointer to the swapped in local symbols.
462
463 LOCAL_SECTIONS is an array giving the section in the input file
464 corresponding to the st_shndx field of each local symbol.
465
466 The global hash table entry for the global symbols can be found
467 via elf_sym_hashes (input_bfd).
468
469 When generating relocatable output, this function must handle
470 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
471 going to be the section symbol corresponding to the output
472 section, which means that the addend must be adjusted
473 accordingly. */
474
475static bfd_boolean
476rx_elf_relocate_section
477 (bfd * output_bfd,
478 struct bfd_link_info * info,
479 bfd * input_bfd,
480 asection * input_section,
481 bfd_byte * contents,
482 Elf_Internal_Rela * relocs,
483 Elf_Internal_Sym * local_syms,
484 asection ** local_sections)
485{
486 Elf_Internal_Shdr * symtab_hdr;
487 struct elf_link_hash_entry ** sym_hashes;
488 Elf_Internal_Rela * rel;
489 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 490 bfd_boolean pid_mode;
491 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 492 const char * table_default_cache = NULL;
493 bfd_vma table_start_cache = 0;
494 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 495
496 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
497 pid_mode = TRUE;
498 else
499 pid_mode = FALSE;
c7927a3c
NC		 500
501 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
502 sym_hashes = elf_sym_hashes (input_bfd);
503 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 504 for (rel = relocs; rel < relend; rel ++)
505 {
506 reloc_howto_type * howto;
507 unsigned long r_symndx;
508 Elf_Internal_Sym * sym;
509 asection * sec;
510 struct elf_link_hash_entry * h;
511 bfd_vma relocation;
512 bfd_reloc_status_type r;
513 const char * name = NULL;
514 bfd_boolean unresolved_reloc = TRUE;
515 int r_type;
516
517 r_type = ELF32_R_TYPE (rel->r_info);
518 r_symndx = ELF32_R_SYM (rel->r_info);
519
520 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
521 h = NULL;
522 sym = NULL;
523 sec = NULL;
524 relocation = 0;
525
d4cb0ea0
NC		 526 if (rx_stack_top == 0)
527 saw_subtract = FALSE;
528
c7927a3c
NC		 529 if (r_symndx < symtab_hdr->sh_info)
530 {
531 sym = local_syms + r_symndx;
532 sec = local_sections [r_symndx];
533 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
534
535 name = bfd_elf_string_from_elf_section
536 (input_bfd, symtab_hdr->sh_link, sym->st_name);
537 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
538 }
539 else
540 {
62d887d4 541 bfd_boolean warned, ignored;
c7927a3c
NC		 542
543 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
544 r_symndx, symtab_hdr, sym_hashes, h,
545 sec, relocation, unresolved_reloc,
62d887d4 546 warned, ignored);
c7927a3c
NC		 547
548 name = h->root.root.string;
549 }
550
7a2f2d82
DD		 551 if (strncmp (name, "$tableentry$default$", 20) == 0)
552 {
553 bfd_vma entry_vma;
554 int idx;
555 char *buf;
556 bfd_reloc_status_type tstat = 0;
557
558 if (table_default_cache != name)
559 {
560
561 /* All relocs for a given table should be to the same
562 (weak) default symbol) so we can use it to detect a
563 cache miss. We use the offset into the table to find
564 the "real" symbol. Calculate and store the table's
565 offset here. */
566
567 table_default_cache = name;
568
569 /* We have already done error checking in rx_table_find(). */
570
571 buf = (char *) malloc (13 + strlen (name + 20));
572
573 sprintf (buf, "$tablestart$%s", name + 20);
574 tstat = 0;
575 table_start_cache = get_symbol_value (buf,
576 &tstat,
577 info,
578 input_bfd,
579 input_section,
580 rel->r_offset);
581
582 sprintf (buf, "$tableend$%s", name + 20);
583 tstat = 0;
584 table_end_cache = get_symbol_value (buf,
585 &tstat,
586 info,
587 input_bfd,
588 input_section,
589 rel->r_offset);
590
591 free (buf);
592 }
593
594 entry_vma = (input_section->output_section->vma
595 + input_section->output_offset
596 + rel->r_offset);
597
598 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
599 {
600 _bfd_error_handler (_("%B:%A: table entry %s outside table"),
601 input_bfd, input_section,
602 name);
603 }
604 else if ((int) (entry_vma - table_start_cache) % 4)
605 {
606 _bfd_error_handler (_("%B:%A: table entry %s not word-aligned within table"),
607 input_bfd, input_section,
608 name);
609 }
610 else
611 {
612 idx = (int) (entry_vma - table_start_cache) / 4;
613
614 /* This will look like $tableentry$<N>$<name> */
615 buf = (char *) malloc (12 + 20 + strlen (name + 20));
616 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
617
618 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
619
620 if (h)
621 {
622 relocation = (h->root.u.def.value
623 + h->root.u.def.section->output_section->vma
624 + h->root.u.def.section->output_offset);;
625 }
626
627 free (buf);
628 }
629 }
630
dbaa2011 631 if (sec != NULL && discarded_section (sec))
e4067dbb 632 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 633 rel, 1, relend, howto, 0, contents);
c7927a3c
NC		 634
635 if (info->relocatable)
636 {
637 /* This is a relocatable link. We don't have to change
638 anything, unless the reloc is against a section symbol,
639 in which case we have to adjust according to where the
640 section symbol winds up in the output section. */
641 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
642 rel->r_addend += sec->output_offset;
643 continue;
644 }
645
646 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
647 /* If the symbol is undefined and weak
648 then the relocation resolves to zero. */
649 relocation = 0;
650 else
651 {
652 if (howto->pc_relative)
653 {
654 relocation -= (input_section->output_section->vma
655 + input_section->output_offset
656 + rel->r_offset);
657 if (r_type != R_RX_RH_3_PCREL
658 && r_type != R_RX_DIR3U_PCREL)
659 relocation ++;
660 }
661
662 relocation += rel->r_addend;
663 }
664
665 r = bfd_reloc_ok;
666
667#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
668#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
669#define OP(i) (contents[rel->r_offset + (i)])
670#define WARN_REDHAT(type) \
671 _bfd_error_handler (_("%B:%A: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
672 input_bfd, input_section, name)
673
d4cb0ea0
NC		 674 /* Check for unsafe relocs in PID mode. These are any relocs where
675 an absolute address is being computed. There are special cases
676 for relocs against symbols that are known to be referenced in
677 crt0.o before the PID base address register has been initialised. */
678#define UNSAFE_FOR_PID \
679 do \
680 { \
681 if (pid_mode \
682 && sec != NULL \
683 && sec->flags & SEC_READONLY \
684 && !(input_section->flags & SEC_DEBUGGING) \
685 && strcmp (name, "__pid_base") != 0 \
686 && strcmp (name, "__gp") != 0 \
687 && strcmp (name, "__romdatastart") != 0 \
688 && !saw_subtract) \
689 _bfd_error_handler (_("%B(%A): unsafe PID relocation %s at 0x%08lx (against %s in %s)"), \
690 input_bfd, input_section, howto->name, \
691 input_section->output_section->vma + input_section->output_offset + rel->r_offset, \
692 name, sec->name); \
693 } \
694 while (0)
695
c7927a3c
NC		 696 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
697 switch (r_type)
698 {
699 case R_RX_NONE:
700 break;
701
702 case R_RX_RH_RELAX:
703 break;
704
705 case R_RX_RH_3_PCREL:
706 WARN_REDHAT ("RX_RH_3_PCREL");
707 RANGE (3, 10);
708 OP (0) &= 0xf8;
709 OP (0) |= relocation & 0x07;
710 break;
711
712 case R_RX_RH_8_NEG:
713 WARN_REDHAT ("RX_RH_8_NEG");
714 relocation = - relocation;
715 case R_RX_DIR8S_PCREL:
d4cb0ea0 716 UNSAFE_FOR_PID;
c7927a3c
NC		 717 RANGE (-128, 127);
718 OP (0) = relocation;
719 break;
720
721 case R_RX_DIR8S:
d4cb0ea0 722 UNSAFE_FOR_PID;
c7927a3c
NC		 723 RANGE (-128, 255);
724 OP (0) = relocation;
725 break;
726
727 case R_RX_DIR8U:
d4cb0ea0 728 UNSAFE_FOR_PID;
c7927a3c
NC		 729 RANGE (0, 255);
730 OP (0) = relocation;
731 break;
732
733 case R_RX_RH_16_NEG:
734 WARN_REDHAT ("RX_RH_16_NEG");
735 relocation = - relocation;
736 case R_RX_DIR16S_PCREL:
d4cb0ea0 737 UNSAFE_FOR_PID;
c7927a3c
NC		 738 RANGE (-32768, 32767);
739#if RX_OPCODE_BIG_ENDIAN
740#else
741 OP (0) = relocation;
742 OP (1) = relocation >> 8;
743#endif
744 break;
745
746 case R_RX_RH_16_OP:
747 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 748 UNSAFE_FOR_PID;
c7927a3c
NC		 749 RANGE (-32768, 32767);
750#if RX_OPCODE_BIG_ENDIAN
751 OP (1) = relocation;
752 OP (0) = relocation >> 8;
753#else
754 OP (0) = relocation;
755 OP (1) = relocation >> 8;
756#endif
757 break;
758
759 case R_RX_DIR16S:
d4cb0ea0 760 UNSAFE_FOR_PID;
c7927a3c
NC		 761 RANGE (-32768, 65535);
762 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
763 {
764 OP (1) = relocation;
765 OP (0) = relocation >> 8;
766 }
767 else
768 {
769 OP (0) = relocation;
770 OP (1) = relocation >> 8;
771 }
772 break;
773
774 case R_RX_DIR16U:
d4cb0ea0 775 UNSAFE_FOR_PID;
c7927a3c
NC		 776 RANGE (0, 65536);
777#if RX_OPCODE_BIG_ENDIAN
778 OP (1) = relocation;
779 OP (0) = relocation >> 8;
780#else
781 OP (0) = relocation;
782 OP (1) = relocation >> 8;
783#endif
784 break;
785
786 case R_RX_DIR16:
d4cb0ea0 787 UNSAFE_FOR_PID;
c7927a3c
NC		 788 RANGE (-32768, 65536);
789#if RX_OPCODE_BIG_ENDIAN
790 OP (1) = relocation;
791 OP (0) = relocation >> 8;
792#else
793 OP (0) = relocation;
794 OP (1) = relocation >> 8;
795#endif
796 break;
797
798 case R_RX_DIR16_REV:
d4cb0ea0 799 UNSAFE_FOR_PID;
c7927a3c
NC		 800 RANGE (-32768, 65536);
801#if RX_OPCODE_BIG_ENDIAN
802 OP (0) = relocation;
803 OP (1) = relocation >> 8;
804#else
805 OP (1) = relocation;
806 OP (0) = relocation >> 8;
807#endif
808 break;
809
810 case R_RX_DIR3U_PCREL:
811 RANGE (3, 10);
812 OP (0) &= 0xf8;
813 OP (0) |= relocation & 0x07;
814 break;
815
816 case R_RX_RH_24_NEG:
d4cb0ea0 817 UNSAFE_FOR_PID;
c7927a3c
NC		 818 WARN_REDHAT ("RX_RH_24_NEG");
819 relocation = - relocation;
820 case R_RX_DIR24S_PCREL:
821 RANGE (-0x800000, 0x7fffff);
822#if RX_OPCODE_BIG_ENDIAN
823 OP (2) = relocation;
824 OP (1) = relocation >> 8;
825 OP (0) = relocation >> 16;
826#else
827 OP (0) = relocation;
828 OP (1) = relocation >> 8;
829 OP (2) = relocation >> 16;
830#endif
831 break;
832
833 case R_RX_RH_24_OP:
d4cb0ea0 834 UNSAFE_FOR_PID;
c7927a3c
NC		 835 WARN_REDHAT ("RX_RH_24_OP");
836 RANGE (-0x800000, 0x7fffff);
837#if RX_OPCODE_BIG_ENDIAN
838 OP (2) = relocation;
839 OP (1) = relocation >> 8;
840 OP (0) = relocation >> 16;
841#else
842 OP (0) = relocation;
843 OP (1) = relocation >> 8;
844 OP (2) = relocation >> 16;
845#endif
846 break;
847
848 case R_RX_DIR24S:
d4cb0ea0 849 UNSAFE_FOR_PID;
c7927a3c
NC		 850 RANGE (-0x800000, 0x7fffff);
851 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
852 {
853 OP (2) = relocation;
854 OP (1) = relocation >> 8;
855 OP (0) = relocation >> 16;
856 }
857 else
858 {
859 OP (0) = relocation;
860 OP (1) = relocation >> 8;
861 OP (2) = relocation >> 16;
862 }
863 break;
864
865 case R_RX_RH_24_UNS:
d4cb0ea0 866 UNSAFE_FOR_PID;
c7927a3c
NC		 867 WARN_REDHAT ("RX_RH_24_UNS");
868 RANGE (0, 0xffffff);
869#if RX_OPCODE_BIG_ENDIAN
870 OP (2) = relocation;
871 OP (1) = relocation >> 8;
872 OP (0) = relocation >> 16;
873#else
874 OP (0) = relocation;
875 OP (1) = relocation >> 8;
876 OP (2) = relocation >> 16;
877#endif
878 break;
879
880 case R_RX_RH_32_NEG:
d4cb0ea0 881 UNSAFE_FOR_PID;
c7927a3c
NC		 882 WARN_REDHAT ("RX_RH_32_NEG");
883 relocation = - relocation;
884#if RX_OPCODE_BIG_ENDIAN
885 OP (3) = relocation;
886 OP (2) = relocation >> 8;
887 OP (1) = relocation >> 16;
888 OP (0) = relocation >> 24;
889#else
890 OP (0) = relocation;
891 OP (1) = relocation >> 8;
892 OP (2) = relocation >> 16;
893 OP (3) = relocation >> 24;
894#endif
895 break;
896
897 case R_RX_RH_32_OP:
d4cb0ea0 898 UNSAFE_FOR_PID;
c7927a3c
NC		 899 WARN_REDHAT ("RX_RH_32_OP");
900#if RX_OPCODE_BIG_ENDIAN
901 OP (3) = relocation;
902 OP (2) = relocation >> 8;
903 OP (1) = relocation >> 16;
904 OP (0) = relocation >> 24;
905#else
906 OP (0) = relocation;
907 OP (1) = relocation >> 8;
908 OP (2) = relocation >> 16;
909 OP (3) = relocation >> 24;
910#endif
911 break;
912
913 case R_RX_DIR32:
914 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
915 {
916 OP (3) = relocation;
917 OP (2) = relocation >> 8;
918 OP (1) = relocation >> 16;
919 OP (0) = relocation >> 24;
920 }
921 else
922 {
923 OP (0) = relocation;
924 OP (1) = relocation >> 8;
925 OP (2) = relocation >> 16;
926 OP (3) = relocation >> 24;
927 }
928 break;
929
930 case R_RX_DIR32_REV:
931 if (BIGE (output_bfd))
932 {
933 OP (0) = relocation;
934 OP (1) = relocation >> 8;
935 OP (2) = relocation >> 16;
936 OP (3) = relocation >> 24;
937 }
938 else
939 {
940 OP (3) = relocation;
941 OP (2) = relocation >> 8;
942 OP (1) = relocation >> 16;
943 OP (0) = relocation >> 24;
944 }
945 break;
946
947 case R_RX_RH_DIFF:
948 {
949 bfd_vma val;
950 WARN_REDHAT ("RX_RH_DIFF");
951 val = bfd_get_32 (output_bfd, & OP (0));
952 val -= relocation;
953 bfd_put_32 (output_bfd, val, & OP (0));
954 }
955 break;
956
957 case R_RX_RH_GPRELB:
958 WARN_REDHAT ("RX_RH_GPRELB");
959 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
960 RANGE (0, 65535);
961#if RX_OPCODE_BIG_ENDIAN
962 OP (1) = relocation;
963 OP (0) = relocation >> 8;
964#else
965 OP (0) = relocation;
966 OP (1) = relocation >> 8;
967#endif
968 break;
969
970 case R_RX_RH_GPRELW:
971 WARN_REDHAT ("RX_RH_GPRELW");
972 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
973 ALIGN (1);
974 relocation >>= 1;
975 RANGE (0, 65535);
976#if RX_OPCODE_BIG_ENDIAN
977 OP (1) = relocation;
978 OP (0) = relocation >> 8;
979#else
980 OP (0) = relocation;
981 OP (1) = relocation >> 8;
982#endif
983 break;
984
985 case R_RX_RH_GPRELL:
986 WARN_REDHAT ("RX_RH_GPRELL");
987 relocation -= get_gp (&r, info, input_bfd, input_section, rel->r_offset);
988 ALIGN (3);
989 relocation >>= 2;
990 RANGE (0, 65535);
991#if RX_OPCODE_BIG_ENDIAN
992 OP (1) = relocation;
993 OP (0) = relocation >> 8;
994#else
995 OP (0) = relocation;
996 OP (1) = relocation >> 8;
997#endif
998 break;
999
1000 /* Internal relocations just for relaxation: */
1001 case R_RX_RH_ABS5p5B:
1002 RX_STACK_POP (relocation);
1003 RANGE (0, 31);
1004 OP (0) &= 0xf8;
1005 OP (0) |= relocation >> 2;
1006 OP (1) &= 0x77;
1007 OP (1) |= (relocation << 6) & 0x80;
1008 OP (1) |= (relocation << 3) & 0x08;
1009 break;
1010
1011 case R_RX_RH_ABS5p5W:
1012 RX_STACK_POP (relocation);
1013 RANGE (0, 62);
1014 ALIGN (1);
1015 relocation >>= 1;
1016 OP (0) &= 0xf8;
1017 OP (0) |= relocation >> 2;
1018 OP (1) &= 0x77;
1019 OP (1) |= (relocation << 6) & 0x80;
1020 OP (1) |= (relocation << 3) & 0x08;
1021 break;
1022
1023 case R_RX_RH_ABS5p5L:
1024 RX_STACK_POP (relocation);
1025 RANGE (0, 124);
1026 ALIGN (3);
1027 relocation >>= 2;
1028 OP (0) &= 0xf8;
1029 OP (0) |= relocation >> 2;
1030 OP (1) &= 0x77;
1031 OP (1) |= (relocation << 6) & 0x80;
1032 OP (1) |= (relocation << 3) & 0x08;
1033 break;
1034
1035 case R_RX_RH_ABS5p8B:
1036 RX_STACK_POP (relocation);
1037 RANGE (0, 31);
1038 OP (0) &= 0x70;
1039 OP (0) |= (relocation << 3) & 0x80;
1040 OP (0) |= relocation & 0x0f;
1041 break;
1042
1043 case R_RX_RH_ABS5p8W:
1044 RX_STACK_POP (relocation);
1045 RANGE (0, 62);
1046 ALIGN (1);
1047 relocation >>= 1;
1048 OP (0) &= 0x70;
1049 OP (0) |= (relocation << 3) & 0x80;
1050 OP (0) |= relocation & 0x0f;
1051 break;
1052
1053 case R_RX_RH_ABS5p8L:
1054 RX_STACK_POP (relocation);
1055 RANGE (0, 124);
1056 ALIGN (3);
1057 relocation >>= 2;
1058 OP (0) &= 0x70;
1059 OP (0) |= (relocation << 3) & 0x80;
1060 OP (0) |= relocation & 0x0f;
1061 break;
1062
1063 case R_RX_RH_UIMM4p8:
1064 RANGE (0, 15);
1065 OP (0) &= 0x0f;
1066 OP (0) |= relocation << 4;
1067 break;
1068
1069 case R_RX_RH_UNEG4p8:
1070 RANGE (-15, 0);
1071 OP (0) &= 0x0f;
1072 OP (0) |= (-relocation) << 4;
1073 break;
1074
1075 /* Complex reloc handling: */
1076
1077 case R_RX_ABS32:
d4cb0ea0 1078 UNSAFE_FOR_PID;
c7927a3c
NC		 1079 RX_STACK_POP (relocation);
1080#if RX_OPCODE_BIG_ENDIAN
1081 OP (3) = relocation;
1082 OP (2) = relocation >> 8;
1083 OP (1) = relocation >> 16;
1084 OP (0) = relocation >> 24;
1085#else
1086 OP (0) = relocation;
1087 OP (1) = relocation >> 8;
1088 OP (2) = relocation >> 16;
1089 OP (3) = relocation >> 24;
1090#endif
1091 break;
1092
1093 case R_RX_ABS32_REV:
d4cb0ea0 1094 UNSAFE_FOR_PID;
c7927a3c
NC		 1095 RX_STACK_POP (relocation);
1096#if RX_OPCODE_BIG_ENDIAN
1097 OP (0) = relocation;
1098 OP (1) = relocation >> 8;
1099 OP (2) = relocation >> 16;
1100 OP (3) = relocation >> 24;
1101#else
1102 OP (3) = relocation;
1103 OP (2) = relocation >> 8;
1104 OP (1) = relocation >> 16;
1105 OP (0) = relocation >> 24;
1106#endif
1107 break;
1108
1109 case R_RX_ABS24S_PCREL:
1110 case R_RX_ABS24S:
d4cb0ea0 1111 UNSAFE_FOR_PID;
c7927a3c
NC		 1112 RX_STACK_POP (relocation);
1113 RANGE (-0x800000, 0x7fffff);
1114 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1115 {
1116 OP (2) = relocation;
1117 OP (1) = relocation >> 8;
1118 OP (0) = relocation >> 16;
1119 }
1120 else
1121 {
1122 OP (0) = relocation;
1123 OP (1) = relocation >> 8;
1124 OP (2) = relocation >> 16;
1125 }
1126 break;
1127
1128 case R_RX_ABS16:
d4cb0ea0 1129 UNSAFE_FOR_PID;
c7927a3c
NC		 1130 RX_STACK_POP (relocation);
1131 RANGE (-32768, 65535);
1132#if RX_OPCODE_BIG_ENDIAN
1133 OP (1) = relocation;
1134 OP (0) = relocation >> 8;
1135#else
1136 OP (0) = relocation;
1137 OP (1) = relocation >> 8;
1138#endif
1139 break;
1140
1141 case R_RX_ABS16_REV:
d4cb0ea0 1142 UNSAFE_FOR_PID;
c7927a3c
NC		 1143 RX_STACK_POP (relocation);
1144 RANGE (-32768, 65535);
1145#if RX_OPCODE_BIG_ENDIAN
1146 OP (0) = relocation;
1147 OP (1) = relocation >> 8;
1148#else
1149 OP (1) = relocation;
1150 OP (0) = relocation >> 8;
1151#endif
1152 break;
1153
1154 case R_RX_ABS16S_PCREL:
1155 case R_RX_ABS16S:
1156 RX_STACK_POP (relocation);
1157 RANGE (-32768, 32767);
1158 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1159 {
1160 OP (1) = relocation;
1161 OP (0) = relocation >> 8;
1162 }
1163 else
1164 {
1165 OP (0) = relocation;
1166 OP (1) = relocation >> 8;
1167 }
1168 break;
1169
1170 case R_RX_ABS16U:
d4cb0ea0 1171 UNSAFE_FOR_PID;
c7927a3c
NC		 1172 RX_STACK_POP (relocation);
1173 RANGE (0, 65536);
1174#if RX_OPCODE_BIG_ENDIAN
1175 OP (1) = relocation;
1176 OP (0) = relocation >> 8;
1177#else
1178 OP (0) = relocation;
1179 OP (1) = relocation >> 8;
1180#endif
1181 break;
1182
1183 case R_RX_ABS16UL:
d4cb0ea0 1184 UNSAFE_FOR_PID;
c7927a3c
NC		 1185 RX_STACK_POP (relocation);
1186 relocation >>= 2;
1187 RANGE (0, 65536);
1188#if RX_OPCODE_BIG_ENDIAN
1189 OP (1) = relocation;
1190 OP (0) = relocation >> 8;
1191#else
1192 OP (0) = relocation;
1193 OP (1) = relocation >> 8;
1194#endif
1195 break;
1196
1197 case R_RX_ABS16UW:
d4cb0ea0 1198 UNSAFE_FOR_PID;
c7927a3c
NC		 1199 RX_STACK_POP (relocation);
1200 relocation >>= 1;
1201 RANGE (0, 65536);
1202#if RX_OPCODE_BIG_ENDIAN
1203 OP (1) = relocation;
1204 OP (0) = relocation >> 8;
1205#else
1206 OP (0) = relocation;
1207 OP (1) = relocation >> 8;
1208#endif
1209 break;
1210
1211 case R_RX_ABS8:
d4cb0ea0 1212 UNSAFE_FOR_PID;
c7927a3c
NC		 1213 RX_STACK_POP (relocation);
1214 RANGE (-128, 255);
1215 OP (0) = relocation;
1216 break;
1217
1218 case R_RX_ABS8U:
d4cb0ea0 1219 UNSAFE_FOR_PID;
c7927a3c
NC		 1220 RX_STACK_POP (relocation);
1221 RANGE (0, 255);
1222 OP (0) = relocation;
1223 break;
1224
1225 case R_RX_ABS8UL:
d4cb0ea0 1226 UNSAFE_FOR_PID;
c7927a3c
NC		 1227 RX_STACK_POP (relocation);
1228 relocation >>= 2;
1229 RANGE (0, 255);
1230 OP (0) = relocation;
1231 break;
1232
1233 case R_RX_ABS8UW:
d4cb0ea0 1234 UNSAFE_FOR_PID;
c7927a3c
NC		 1235 RX_STACK_POP (relocation);
1236 relocation >>= 1;
1237 RANGE (0, 255);
1238 OP (0) = relocation;
1239 break;
1240
c7927a3c 1241 case R_RX_ABS8S:
d4cb0ea0
NC		 1242 UNSAFE_FOR_PID;
1243 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1244 RX_STACK_POP (relocation);
1245 RANGE (-128, 127);
1246 OP (0) = relocation;
1247 break;
1248
1249 case R_RX_SYM:
1250 if (r_symndx < symtab_hdr->sh_info)
1251 RX_STACK_PUSH (sec->output_section->vma
1252 + sec->output_offset
d4cb0ea0
NC		 1253 + sym->st_value
1254 + rel->r_addend);
c7927a3c
NC		 1255 else
1256 {
1257 if (h != NULL
1258 && (h->root.type == bfd_link_hash_defined
1259 || h->root.type == bfd_link_hash_defweak))
1260 RX_STACK_PUSH (h->root.u.def.value
1261 + sec->output_section->vma
d4cb0ea0
NC		 1262 + sec->output_offset
1263 + rel->r_addend);
c7927a3c
NC		 1264 else
1265 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1266 }
1267 break;
1268
1269 case R_RX_OPneg:
1270 {
1271 int32_t tmp;
1272
ee181c72 1273 saw_subtract = TRUE;
c7927a3c
NC		 1274 RX_STACK_POP (tmp);
1275 tmp = - tmp;
1276 RX_STACK_PUSH (tmp);
1277 }
1278 break;
1279
1280 case R_RX_OPadd:
1281 {
1282 int32_t tmp1, tmp2;
1283
1284 RX_STACK_POP (tmp1);
1285 RX_STACK_POP (tmp2);
1286 tmp1 += tmp2;
1287 RX_STACK_PUSH (tmp1);
1288 }
1289 break;
1290
1291 case R_RX_OPsub:
1292 {
1293 int32_t tmp1, tmp2;
1294
d4cb0ea0 1295 saw_subtract = TRUE;
c7927a3c
NC		 1296 RX_STACK_POP (tmp1);
1297 RX_STACK_POP (tmp2);
1298 tmp2 -= tmp1;
1299 RX_STACK_PUSH (tmp2);
1300 }
1301 break;
1302
1303 case R_RX_OPmul:
1304 {
1305 int32_t tmp1, tmp2;
1306
1307 RX_STACK_POP (tmp1);
1308 RX_STACK_POP (tmp2);
1309 tmp1 *= tmp2;
1310 RX_STACK_PUSH (tmp1);
1311 }
1312 break;
1313
1314 case R_RX_OPdiv:
1315 {
1316 int32_t tmp1, tmp2;
1317
1318 RX_STACK_POP (tmp1);
1319 RX_STACK_POP (tmp2);
1320 tmp1 /= tmp2;
1321 RX_STACK_PUSH (tmp1);
1322 }
1323 break;
1324
1325 case R_RX_OPshla:
1326 {
1327 int32_t tmp1, tmp2;
1328
1329 RX_STACK_POP (tmp1);
1330 RX_STACK_POP (tmp2);
1331 tmp1 <<= tmp2;
1332 RX_STACK_PUSH (tmp1);
1333 }
1334 break;
1335
1336 case R_RX_OPshra:
1337 {
1338 int32_t tmp1, tmp2;
1339
1340 RX_STACK_POP (tmp1);
1341 RX_STACK_POP (tmp2);
1342 tmp1 >>= tmp2;
1343 RX_STACK_PUSH (tmp1);
1344 }
1345 break;
1346
1347 case R_RX_OPsctsize:
1348 RX_STACK_PUSH (input_section->size);
1349 break;
1350
1351 case R_RX_OPscttop:
1352 RX_STACK_PUSH (input_section->output_section->vma);
1353 break;
1354
1355 case R_RX_OPand:
1356 {
1357 int32_t tmp1, tmp2;
1358
1359 RX_STACK_POP (tmp1);
1360 RX_STACK_POP (tmp2);
1361 tmp1 &= tmp2;
1362 RX_STACK_PUSH (tmp1);
1363 }
1364 break;
1365
1366 case R_RX_OPor:
1367 {
1368 int32_t tmp1, tmp2;
1369
1370 RX_STACK_POP (tmp1);
1371 RX_STACK_POP (tmp2);
1372 tmp1 |= tmp2;
1373 RX_STACK_PUSH (tmp1);
1374 }
1375 break;
1376
1377 case R_RX_OPxor:
1378 {
1379 int32_t tmp1, tmp2;
1380
1381 RX_STACK_POP (tmp1);
1382 RX_STACK_POP (tmp2);
1383 tmp1 ^= tmp2;
1384 RX_STACK_PUSH (tmp1);
1385 }
1386 break;
1387
1388 case R_RX_OPnot:
1389 {
1390 int32_t tmp;
1391
1392 RX_STACK_POP (tmp);
1393 tmp = ~ tmp;
1394 RX_STACK_PUSH (tmp);
1395 }
1396 break;
1397
1398 case R_RX_OPmod:
1399 {
1400 int32_t tmp1, tmp2;
1401
1402 RX_STACK_POP (tmp1);
1403 RX_STACK_POP (tmp2);
1404 tmp1 %= tmp2;
1405 RX_STACK_PUSH (tmp1);
1406 }
1407 break;
1408
1409 case R_RX_OPromtop:
1410 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1411 break;
1412
1413 case R_RX_OPramtop:
1414 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1415 break;
1416
1417 default:
1418 r = bfd_reloc_notsupported;
1419 break;
1420 }
1421
1422 if (r != bfd_reloc_ok)
1423 {
1424 const char * msg = NULL;
1425
1426 switch (r)
1427 {
1428 case bfd_reloc_overflow:
1429 /* Catch the case of a missing function declaration
1430 and emit a more helpful error message. */
1431 if (r_type == R_RX_DIR24S_PCREL)
1432 msg = _("%B(%A): error: call to undefined function '%s'");
1433 else
1434 r = info->callbacks->reloc_overflow
1435 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1436 input_bfd, input_section, rel->r_offset);
1437 break;
1438
1439 case bfd_reloc_undefined:
1440 r = info->callbacks->undefined_symbol
1441 (info, name, input_bfd, input_section, rel->r_offset,
1442 TRUE);
1443 break;
1444
1445 case bfd_reloc_other:
1446 msg = _("%B(%A): warning: unaligned access to symbol '%s' in the small data area");
1447 break;
1448
1449 case bfd_reloc_outofrange:
1450 msg = _("%B(%A): internal error: out of range error");
1451 break;
1452
1453 case bfd_reloc_notsupported:
1454 msg = _("%B(%A): internal error: unsupported relocation error");
1455 break;
1456
1457 case bfd_reloc_dangerous:
1458 msg = _("%B(%A): internal error: dangerous relocation");
1459 break;
1460
1461 default:
1462 msg = _("%B(%A): internal error: unknown error");
1463 break;
1464 }
1465
1466 if (msg)
1467 _bfd_error_handler (msg, input_bfd, input_section, name);
1468
1469 if (! r)
1470 return FALSE;
1471 }
1472 }
1473
1474 return TRUE;
1475}
1476\f
1477/* Relaxation Support. */
1478
1479/* Progression of relocations from largest operand size to smallest
1480 operand size. */
1481
1482static int
1483next_smaller_reloc (int r)
1484{
1485 switch (r)
1486 {
1487 case R_RX_DIR32: return R_RX_DIR24S;
1488 case R_RX_DIR24S: return R_RX_DIR16S;
1489 case R_RX_DIR16S: return R_RX_DIR8S;
1490 case R_RX_DIR8S: return R_RX_NONE;
1491
1492 case R_RX_DIR16: return R_RX_DIR8;
1493 case R_RX_DIR8: return R_RX_NONE;
1494
1495 case R_RX_DIR16U: return R_RX_DIR8U;
1496 case R_RX_DIR8U: return R_RX_NONE;
1497
1498 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1499 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1500 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1501
1502 case R_RX_DIR16UL: return R_RX_DIR8UL;
1503 case R_RX_DIR8UL: return R_RX_NONE;
1504 case R_RX_DIR16UW: return R_RX_DIR8UW;
1505 case R_RX_DIR8UW: return R_RX_NONE;
1506
1507 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1508 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1509 case R_RX_RH_16_OP: return R_RX_DIR8;
1510
1511 case R_RX_ABS32: return R_RX_ABS24S;
1512 case R_RX_ABS24S: return R_RX_ABS16S;
1513 case R_RX_ABS16: return R_RX_ABS8;
1514 case R_RX_ABS16U: return R_RX_ABS8U;
1515 case R_RX_ABS16S: return R_RX_ABS8S;
1516 case R_RX_ABS8: return R_RX_NONE;
1517 case R_RX_ABS8U: return R_RX_NONE;
1518 case R_RX_ABS8S: return R_RX_NONE;
1519 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1520 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1521 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1522 case R_RX_ABS16UL: return R_RX_ABS8UL;
1523 case R_RX_ABS16UW: return R_RX_ABS8UW;
1524 case R_RX_ABS8UL: return R_RX_NONE;
1525 case R_RX_ABS8UW: return R_RX_NONE;
1526 }
1527 return r;
1528};
1529
1530/* Delete some bytes from a section while relaxing. */
1531
1532static bfd_boolean
1533elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
1534 Elf_Internal_Rela *alignment_rel, int force_snip)
1535{
1536 Elf_Internal_Shdr * symtab_hdr;
1537 unsigned int sec_shndx;
1538 bfd_byte * contents;
1539 Elf_Internal_Rela * irel;
1540 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1541 Elf_Internal_Sym * isym;
1542 Elf_Internal_Sym * isymend;
1543 bfd_vma toaddr;
1544 unsigned int symcount;
1545 struct elf_link_hash_entry ** sym_hashes;
1546 struct elf_link_hash_entry ** end_hashes;
1547
1548 if (!alignment_rel)
1549 force_snip = 1;
1550
1551 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1552
1553 contents = elf_section_data (sec)->this_hdr.contents;
1554
1555 /* The deletion must stop at the next alignment boundary, if
1556 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1557 toaddr = sec->size;
1558 if (alignment_rel)
1559 toaddr = alignment_rel->r_offset;
1560
1561 irel = elf_section_data (sec)->relocs;
1562 irelend = irel + sec->reloc_count;
1563
1564 /* Actually delete the bytes. */
1565 memmove (contents + addr, contents + addr + count,
1566 (size_t) (toaddr - addr - count));
1567
1568 /* If we don't have an alignment marker to worry about, we can just
1569 shrink the section. Otherwise, we have to fill in the newly
1570 created gap with NOP insns (0x03). */
1571 if (force_snip)
1572 sec->size -= count;
1573 else
1574 memset (contents + toaddr - count, 0x03, count);
1575
1576 /* Adjust all the relocs. */
1577 for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
1578 {
1579 /* Get the new reloc address. */
1580 if (irel->r_offset > addr
1581 && (irel->r_offset < toaddr
1582 || (force_snip && irel->r_offset == toaddr)))
1583 irel->r_offset -= count;
1584
1585 /* If we see an ALIGN marker at the end of the gap, we move it
1586 to the beginning of the gap, since marking these gaps is what
1587 they're for. */
1588 if (irel->r_offset == toaddr
1589 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1590 && irel->r_addend & RX_RELAXA_ALIGN)
1591 irel->r_offset -= count;
1592 }
1593
1594 /* Adjust the local symbols defined in this section. */
1595 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1596 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1597 isymend = isym + symtab_hdr->sh_info;
1598
1599 for (; isym < isymend; isym++)
1600 {
1601 /* If the symbol is in the range of memory we just moved, we
1602 have to adjust its value. */
1603 if (isym->st_shndx == sec_shndx
1604 && isym->st_value > addr
1605 && isym->st_value < toaddr)
1606 isym->st_value -= count;
1607
1608 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1609 *end* is in the moved bytes but it's *start* isn't), then we
1610 must adjust its size. */
1611 if (isym->st_shndx == sec_shndx
1612 && isym->st_value < addr
1613 && isym->st_value + isym->st_size > addr
1614 && isym->st_value + isym->st_size < toaddr)
1615 isym->st_size -= count;
1616 }
1617
1618 /* Now adjust the global symbols defined in this section. */
1619 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1620 - symtab_hdr->sh_info);
1621 sym_hashes = elf_sym_hashes (abfd);
1622 end_hashes = sym_hashes + symcount;
1623
1624 for (; sym_hashes < end_hashes; sym_hashes++)
1625 {
1626 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1627
1628 if ((sym_hash->root.type == bfd_link_hash_defined
1629 || sym_hash->root.type == bfd_link_hash_defweak)
1630 && sym_hash->root.u.def.section == sec)
1631 {
1632 /* As above, adjust the value if needed. */
1633 if (sym_hash->root.u.def.value > addr
1634 && sym_hash->root.u.def.value < toaddr)
1635 sym_hash->root.u.def.value -= count;
1636
1637 /* As above, adjust the size if needed. */
1638 if (sym_hash->root.u.def.value < addr
1639 && sym_hash->root.u.def.value + sym_hash->size > addr
1640 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1641 sym_hash->size -= count;
1642 }
1643 }
1644
1645 return TRUE;
1646}
1647
1648/* Used to sort relocs by address. If relocs have the same address,
1649 we maintain their relative order, except that R_RX_RH_RELAX
1650 alignment relocs must be the first reloc for any given address. */
1651
1652static void
1653reloc_bubblesort (Elf_Internal_Rela * r, int count)
1654{
1655 int i;
1656 bfd_boolean again;
1657 bfd_boolean swappit;
1658
1659 /* This is almost a classic bubblesort. It's the slowest sort, but
1660 we're taking advantage of the fact that the relocations are
1661 mostly in order already (the assembler emits them that way) and
1662 we need relocs with the same address to remain in the same
1663 relative order. */
1664 again = TRUE;
1665 while (again)
1666 {
1667 again = FALSE;
1668 for (i = 0; i < count - 1; i ++)
1669 {
1670 if (r[i].r_offset > r[i + 1].r_offset)
1671 swappit = TRUE;
1672 else if (r[i].r_offset < r[i + 1].r_offset)
1673 swappit = FALSE;
1674 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1675 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1676 swappit = TRUE;
1677 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1678 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1679 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1680 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1681 swappit = TRUE;
1682 else
1683 swappit = FALSE;
1684
1685 if (swappit)
1686 {
1687 Elf_Internal_Rela tmp;
1688
1689 tmp = r[i];
1690 r[i] = r[i + 1];
1691 r[i + 1] = tmp;
1692 /* If we do move a reloc back, re-scan to see if it
1693 needs to be moved even further back. This avoids
1694 most of the O(n^2) behavior for our cases. */
1695 if (i > 0)
1696 i -= 2;
1697 again = TRUE;
1698 }
1699 }
1700 }
1701}
1702
1703
1704#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1705 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1706 lrel, abfd, sec, link_info, scale)
1707
1708static bfd_vma
1709rx_offset_for_reloc (bfd * abfd,
1710 Elf_Internal_Rela * rel,
1711 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1712 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
c7927a3c
NC		 1713 Elf_Internal_Sym * intsyms,
1714 Elf_Internal_Rela ** lrel,
1715 bfd * input_bfd,
1716 asection * input_section,
1717 struct bfd_link_info * info,
1718 int * scale)
1719{
1720 bfd_vma symval;
1721 bfd_reloc_status_type r;
1722
1723 *scale = 1;
1724
1725 /* REL is the first of 1..N relocations. We compute the symbol
1726 value for each relocation, then combine them if needed. LREL
1727 gets a pointer to the last relocation used. */
1728 while (1)
1729 {
1730 int32_t tmp1, tmp2;
1731
1732 /* Get the value of the symbol referred to by the reloc. */
1733 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1734 {
1735 /* A local symbol. */
1736 Elf_Internal_Sym *isym;
c7927a3c
NC		 1737 asection *ssec;
1738
1739 isym = intsyms + ELF32_R_SYM (rel->r_info);
1740
1741 if (isym->st_shndx == SHN_UNDEF)
1742 ssec = bfd_und_section_ptr;
1743 else if (isym->st_shndx == SHN_ABS)
1744 ssec = bfd_abs_section_ptr;
1745 else if (isym->st_shndx == SHN_COMMON)
1746 ssec = bfd_com_section_ptr;
1747 else
1748 ssec = bfd_section_from_elf_index (abfd,
1749 isym->st_shndx);
1750
c7927a3c
NC		 1751 /* Initial symbol value. */
1752 symval = isym->st_value;
1753
1754 /* GAS may have made this symbol relative to a section, in
1755 which case, we have to add the addend to find the
1756 symbol. */
1757 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1758 symval += rel->r_addend;
1759
1760 if (ssec)
1761 {
1762 if ((ssec->flags & SEC_MERGE)
dbaa2011 1763 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1764 symval = _bfd_merged_section_offset (abfd, & ssec,
1765 elf_section_data (ssec)->sec_info,
1766 symval);
1767 }
1768
1769 /* Now make the offset relative to where the linker is putting it. */
1770 if (ssec)
1771 symval +=
1772 ssec->output_section->vma + ssec->output_offset;
1773
1774 symval += rel->r_addend;
1775 }
1776 else
1777 {
1778 unsigned long indx;
1779 struct elf_link_hash_entry * h;
1780
1781 /* An external symbol. */
1782 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1783 h = elf_sym_hashes (abfd)[indx];
1784 BFD_ASSERT (h != NULL);
1785
1786 if (h->root.type != bfd_link_hash_defined
1787 && h->root.type != bfd_link_hash_defweak)
1788 {
1789 /* This appears to be a reference to an undefined
1790 symbol. Just ignore it--it will be caught by the
1791 regular reloc processing. */
1792 if (lrel)
1793 *lrel = rel;
1794 return 0;
1795 }
1796
1797 symval = (h->root.u.def.value
1798 + h->root.u.def.section->output_section->vma
1799 + h->root.u.def.section->output_offset);
1800
1801 symval += rel->r_addend;
1802 }
1803
1804 switch (ELF32_R_TYPE (rel->r_info))
1805 {
1806 case R_RX_SYM:
1807 RX_STACK_PUSH (symval);
1808 break;
1809
1810 case R_RX_OPneg:
1811 RX_STACK_POP (tmp1);
1812 tmp1 = - tmp1;
1813 RX_STACK_PUSH (tmp1);
1814 break;
1815
1816 case R_RX_OPadd:
1817 RX_STACK_POP (tmp1);
1818 RX_STACK_POP (tmp2);
1819 tmp1 += tmp2;
1820 RX_STACK_PUSH (tmp1);
1821 break;
1822
1823 case R_RX_OPsub:
1824 RX_STACK_POP (tmp1);
1825 RX_STACK_POP (tmp2);
1826 tmp2 -= tmp1;
1827 RX_STACK_PUSH (tmp2);
1828 break;
1829
1830 case R_RX_OPmul:
1831 RX_STACK_POP (tmp1);
1832 RX_STACK_POP (tmp2);
1833 tmp1 *= tmp2;
1834 RX_STACK_PUSH (tmp1);
1835 break;
1836
1837 case R_RX_OPdiv:
1838 RX_STACK_POP (tmp1);
1839 RX_STACK_POP (tmp2);
1840 tmp1 /= tmp2;
1841 RX_STACK_PUSH (tmp1);
1842 break;
1843
1844 case R_RX_OPshla:
1845 RX_STACK_POP (tmp1);
1846 RX_STACK_POP (tmp2);
1847 tmp1 <<= tmp2;
1848 RX_STACK_PUSH (tmp1);
1849 break;
1850
1851 case R_RX_OPshra:
1852 RX_STACK_POP (tmp1);
1853 RX_STACK_POP (tmp2);
1854 tmp1 >>= tmp2;
1855 RX_STACK_PUSH (tmp1);
1856 break;
1857
1858 case R_RX_OPsctsize:
1859 RX_STACK_PUSH (input_section->size);
1860 break;
1861
1862 case R_RX_OPscttop:
1863 RX_STACK_PUSH (input_section->output_section->vma);
1864 break;
1865
1866 case R_RX_OPand:
1867 RX_STACK_POP (tmp1);
1868 RX_STACK_POP (tmp2);
1869 tmp1 &= tmp2;
1870 RX_STACK_PUSH (tmp1);
1871 break;
1872
1873 case R_RX_OPor:
1874 RX_STACK_POP (tmp1);
1875 RX_STACK_POP (tmp2);
1876 tmp1 |= tmp2;
1877 RX_STACK_PUSH (tmp1);
1878 break;
1879
1880 case R_RX_OPxor:
1881 RX_STACK_POP (tmp1);
1882 RX_STACK_POP (tmp2);
1883 tmp1 ^= tmp2;
1884 RX_STACK_PUSH (tmp1);
1885 break;
1886
1887 case R_RX_OPnot:
1888 RX_STACK_POP (tmp1);
1889 tmp1 = ~ tmp1;
1890 RX_STACK_PUSH (tmp1);
1891 break;
1892
1893 case R_RX_OPmod:
1894 RX_STACK_POP (tmp1);
1895 RX_STACK_POP (tmp2);
1896 tmp1 %= tmp2;
1897 RX_STACK_PUSH (tmp1);
1898 break;
1899
1900 case R_RX_OPromtop:
1901 RX_STACK_PUSH (get_romstart (&r, info, input_bfd, input_section, rel->r_offset));
1902 break;
1903
1904 case R_RX_OPramtop:
1905 RX_STACK_PUSH (get_ramstart (&r, info, input_bfd, input_section, rel->r_offset));
1906 break;
1907
1908 case R_RX_DIR16UL:
1909 case R_RX_DIR8UL:
1910 case R_RX_ABS16UL:
1911 case R_RX_ABS8UL:
1912 if (rx_stack_top)
1913 RX_STACK_POP (symval);
1914 if (lrel)
1915 *lrel = rel;
1916 *scale = 4;
1917 return symval;
1918
1919 case R_RX_DIR16UW:
1920 case R_RX_DIR8UW:
1921 case R_RX_ABS16UW:
1922 case R_RX_ABS8UW:
1923 if (rx_stack_top)
1924 RX_STACK_POP (symval);
1925 if (lrel)
1926 *lrel = rel;
1927 *scale = 2;
1928 return symval;
1929
1930 default:
1931 if (rx_stack_top)
1932 RX_STACK_POP (symval);
1933 if (lrel)
1934 *lrel = rel;
1935 return symval;
1936 }
1937
1938 rel ++;
1939 }
1940}
1941
1942static void
1943move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1944{
1945 bfd_vma old_offset = srel->r_offset;
1946
1947 irel ++;
1948 while (irel <= srel)
1949 {
1950 if (irel->r_offset == old_offset)
1951 irel->r_offset += delta;
1952 irel ++;
1953 }
1954}
1955
1956/* Relax one section. */
1957
1958static bfd_boolean
1959elf32_rx_relax_section (bfd * abfd,
1960 asection * sec,
1961 struct bfd_link_info * link_info,
1962 bfd_boolean * again,
1963 bfd_boolean allow_pcrel3)
1964{
1965 Elf_Internal_Shdr * symtab_hdr;
1966 Elf_Internal_Shdr * shndx_hdr;
1967 Elf_Internal_Rela * internal_relocs;
1968 Elf_Internal_Rela * free_relocs = NULL;
1969 Elf_Internal_Rela * irel;
1970 Elf_Internal_Rela * srel;
1971 Elf_Internal_Rela * irelend;
1972 Elf_Internal_Rela * next_alignment;
1973 Elf_Internal_Rela * prev_alignment;
1974 bfd_byte * contents = NULL;
1975 bfd_byte * free_contents = NULL;
1976 Elf_Internal_Sym * intsyms = NULL;
1977 Elf_Internal_Sym * free_intsyms = NULL;
1978 Elf_External_Sym_Shndx * shndx_buf = NULL;
1979 bfd_vma pc;
1980 bfd_vma sec_start;
c7927a3c
NC		 1981 bfd_vma symval = 0;
1982 int pcrel = 0;
1983 int code = 0;
1984 int section_alignment_glue;
1985 /* how much to scale the relocation by - 1, 2, or 4. */
1986 int scale;
1987
1988 /* Assume nothing changes. */
1989 *again = FALSE;
1990
1991 /* We don't have to do anything for a relocatable link, if
1992 this section does not have relocs, or if this is not a
1993 code section. */
1994 if (link_info->relocatable
1995 || (sec->flags & SEC_RELOC) == 0
1996 || sec->reloc_count == 0
1997 || (sec->flags & SEC_CODE) == 0)
1998 return TRUE;
1999
2000 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2001 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2002
2003 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2004
2005 /* Get the section contents. */
2006 if (elf_section_data (sec)->this_hdr.contents != NULL)
2007 contents = elf_section_data (sec)->this_hdr.contents;
2008 /* Go get them off disk. */
2009 else
2010 {
2011 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2012 goto error_return;
2013 elf_section_data (sec)->this_hdr.contents = contents;
2014 }
2015
2016 /* Read this BFD's symbols. */
2017 /* Get cached copy if it exists. */
2018 if (symtab_hdr->contents != NULL)
2019 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2020 else
2021 {
2022 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2023 symtab_hdr->contents = (bfd_byte *) intsyms;
2024 }
2025
2026 if (shndx_hdr->sh_size != 0)
2027 {
2028 bfd_size_type amt;
2029
2030 amt = symtab_hdr->sh_info;
2031 amt *= sizeof (Elf_External_Sym_Shndx);
2032 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2033 if (shndx_buf == NULL)
2034 goto error_return;
2035 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2036 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2037 goto error_return;
2038 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2039 }
2040
2041 /* Get a copy of the native relocations. */
2042 internal_relocs = (_bfd_elf_link_read_relocs
2c3fc389 2043 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL,
c7927a3c
NC		 2044 link_info->keep_memory));
2045 if (internal_relocs == NULL)
2046 goto error_return;
2047 if (! link_info->keep_memory)
2048 free_relocs = internal_relocs;
2049
2050 /* The RL_ relocs must be just before the operand relocs they go
2051 with, so we must sort them to guarantee this. We use bubblesort
2052 instead of qsort so we can guarantee that relocs with the same
2053 address remain in the same relative order. */
2054 reloc_bubblesort (internal_relocs, sec->reloc_count);
2055
2056 /* Walk through them looking for relaxing opportunities. */
2057 irelend = internal_relocs + sec->reloc_count;
2058
2059 /* This will either be NULL or a pointer to the next alignment
2060 relocation. */
2061 next_alignment = internal_relocs;
2062 /* This will be the previous alignment, although at first it points
2063 to the first real relocation. */
2064 prev_alignment = internal_relocs;
2065
2066 /* We calculate worst case shrinkage caused by alignment directives.
2067 No fool-proof, but better than either ignoring the problem or
2068 doing heavy duty analysis of all the alignment markers in all
2069 input sections. */
2070 section_alignment_glue = 0;
2071 for (irel = internal_relocs; irel < irelend; irel++)
2072 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2073 && irel->r_addend & RX_RELAXA_ALIGN)
2074 {
2075 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2076
2077 if (section_alignment_glue < this_glue)
2078 section_alignment_glue = this_glue;
2079 }
2080 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2081 shrinkage. */
2082 section_alignment_glue *= 2;
2083
2084 for (irel = internal_relocs; irel < irelend; irel++)
2085 {
2086 unsigned char *insn;
2087 int nrelocs;
2088
2089 /* The insns we care about are all marked with one of these. */
2090 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2091 continue;
2092
2093 if (irel->r_addend & RX_RELAXA_ALIGN
2094 || next_alignment == internal_relocs)
2095 {
2096 /* When we delete bytes, we need to maintain all the alignments
2097 indicated. In addition, we need to be careful about relaxing
2098 jumps across alignment boundaries - these displacements
2099 *grow* when we delete bytes. For now, don't shrink
2100 displacements across an alignment boundary, just in case.
2101 Note that this only affects relocations to the same
2102 section. */
2103 prev_alignment = next_alignment;
2104 next_alignment += 2;
2105 while (next_alignment < irelend
2106 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2107 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2108 next_alignment ++;
2109 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2110 next_alignment = NULL;
2111 }
2112
2113 /* When we hit alignment markers, see if we've shrunk enough
2114 before them to reduce the gap without violating the alignment
2115 requirements. */
2116 if (irel->r_addend & RX_RELAXA_ALIGN)
2117 {
2118 /* At this point, the next relocation *should* be the ELIGN
2119 end marker. */
2120 Elf_Internal_Rela *erel = irel + 1;
2121 unsigned int alignment, nbytes;
2122
2123 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2124 continue;
2125 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2126 continue;
2127
2128 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2129
2130 if (erel->r_offset - irel->r_offset < alignment)
2131 continue;
2132
2133 nbytes = erel->r_offset - irel->r_offset;
2134 nbytes /= alignment;
2135 nbytes *= alignment;
2136
2137 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
2138 erel->r_offset == sec->size);
2139 *again = TRUE;
2140
2141 continue;
2142 }
2143
2144 if (irel->r_addend & RX_RELAXA_ELIGN)
2145 continue;
2146
2147 insn = contents + irel->r_offset;
2148
2149 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2150
2151 /* At this point, we have an insn that is a candidate for linker
2152 relaxation. There are NRELOCS relocs following that may be
2153 relaxed, although each reloc may be made of more than one
2154 reloc entry (such as gp-rel symbols). */
2155
2156 /* Get the value of the symbol referred to by the reloc. Just
2157 in case this is the last reloc in the list, use the RL's
2158 addend to choose between this reloc (no addend) or the next
2159 (yes addend, which means at least one following reloc). */
2160
2161 /* srel points to the "current" reloction for this insn -
2162 actually the last reloc for a given operand, which is the one
2163 we need to update. We check the relaxations in the same
2164 order that the relocations happen, so we'll just push it
2165 along as we go. */
2166 srel = irel;
2167
2168 pc = sec->output_section->vma + sec->output_offset
2169 + srel->r_offset;
2170
2171#define GET_RELOC \
2172 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2173 pcrel = symval - pc + srel->r_addend; \
2174 nrelocs --;
2175
2176#define SNIPNR(offset, nbytes) \
2177 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0);
2178#define SNIP(offset, nbytes, newtype) \
2179 SNIPNR (offset, nbytes); \
2180 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2181
2182 /* The order of these bit tests must match the order that the
2183 relocs appear in. Since we sorted those by offset, we can
2184 predict them. */
2185
2186 /* Note that the numbers in, say, DSP6 are the bit offsets of
2187 the code fields that describe the operand. Bits number 0 for
2188 the MSB of insn[0]. */
2189
2190 /* DSP* codes:
2191 0 00 [reg]
2192 1 01 dsp:8[reg]
2193 2 10 dsp:16[reg]
2194 3 11 reg */
2195 if (irel->r_addend & RX_RELAXA_DSP6)
2196 {
2197 GET_RELOC;
2198
2199 code = insn[0] & 3;
2200 if (code == 2 && symval/scale <= 255)
2201 {
2202 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2203 insn[0] &= 0xfc;
2204 insn[0] |= 0x01;
2205 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2206 if (newrel != ELF32_R_TYPE (srel->r_info))
2207 {
2208 SNIP (3, 1, newrel);
2209 *again = TRUE;
2210 }
2211 }
2212
2213 else if (code == 1 && symval == 0)
2214 {
2215 insn[0] &= 0xfc;
2216 SNIP (2, 1, R_RX_NONE);
2217 *again = TRUE;
2218 }
2219
2220 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2221 else if (code == 1 && symval/scale <= 31
2222 /* Decodable bits. */
2223 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2224 /* Width. */
eb8c5f3f 2225 && (insn[0] & 0x30) != 0x30
91d6fa6a 2226 /* Register MSBs. */
c7927a3c
NC		 2227 && (insn[1] & 0x88) == 0x00)
2228 {
2229 int newrel = 0;
2230
2231 insn[0] = 0x88 | (insn[0] & 0x30);
2232 /* The register fields are in the right place already. */
2233
2234 /* We can't relax this new opcode. */
2235 irel->r_addend = 0;
2236
2237 switch ((insn[0] & 0x30) >> 4)
2238 {
2239 case 0:
2240 newrel = R_RX_RH_ABS5p5B;
2241 break;
2242 case 1:
2243 newrel = R_RX_RH_ABS5p5W;
2244 break;
2245 case 2:
2246 newrel = R_RX_RH_ABS5p5L;
2247 break;
2248 }
2249
2250 move_reloc (irel, srel, -2);
2251 SNIP (2, 1, newrel);
2252 }
2253
2254 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2255 else if (code == 1 && symval/scale <= 31
2256 /* Decodable bits. */
2257 && (insn[0] & 0xf8) == 0x58
2258 /* Register MSBs. */
2259 && (insn[1] & 0x88) == 0x00)
2260 {
2261 int newrel = 0;
2262
2263 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2264 /* The register fields are in the right place already. */
2265
2266 /* We can't relax this new opcode. */
2267 irel->r_addend = 0;
2268
2269 switch ((insn[0] & 0x08) >> 3)
2270 {
2271 case 0:
2272 newrel = R_RX_RH_ABS5p5B;
2273 break;
2274 case 1:
2275 newrel = R_RX_RH_ABS5p5W;
2276 break;
2277 }
2278
2279 move_reloc (irel, srel, -2);
2280 SNIP (2, 1, newrel);
2281 }
2282 }
2283
2284 /* A DSP4 operand always follows a DSP6 operand, even if there's
2285 no relocation for it. We have to read the code out of the
2286 opcode to calculate the offset of the operand. */
2287 if (irel->r_addend & RX_RELAXA_DSP4)
2288 {
2289 int code6, offset = 0;
2290
2291 GET_RELOC;
2292
2293 code6 = insn[0] & 0x03;
2294 switch (code6)
2295 {
2296 case 0: offset = 2; break;
2297 case 1: offset = 3; break;
2298 case 2: offset = 4; break;
2299 case 3: offset = 2; break;
2300 }
2301
2302 code = (insn[0] & 0x0c) >> 2;
2303
2304 if (code == 2 && symval / scale <= 255)
2305 {
2306 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2307
2308 insn[0] &= 0xf3;
2309 insn[0] |= 0x04;
2310 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2311 if (newrel != ELF32_R_TYPE (srel->r_info))
2312 {
2313 SNIP (offset+1, 1, newrel);
2314 *again = TRUE;
2315 }
2316 }
2317
2318 else if (code == 1 && symval == 0)
2319 {
2320 insn[0] &= 0xf3;
2321 SNIP (offset, 1, R_RX_NONE);
2322 *again = TRUE;
2323 }
2324 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2325 else if (code == 1 && symval/scale <= 31
2326 /* Decodable bits. */
2327 && (insn[0] & 0xc3) == 0xc3
2328 /* Width. */
eb8c5f3f 2329 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2330 /* Register MSBs. */
2331 && (insn[1] & 0x88) == 0x00)
2332 {
2333 int newrel = 0;
2334
2335 insn[0] = 0x80 | (insn[0] & 0x30);
2336 /* The register fields are in the right place already. */
2337
2338 /* We can't relax this new opcode. */
2339 irel->r_addend = 0;
2340
2341 switch ((insn[0] & 0x30) >> 4)
2342 {
2343 case 0:
2344 newrel = R_RX_RH_ABS5p5B;
2345 break;
2346 case 1:
2347 newrel = R_RX_RH_ABS5p5W;
2348 break;
2349 case 2:
2350 newrel = R_RX_RH_ABS5p5L;
2351 break;
2352 }
2353
2354 move_reloc (irel, srel, -2);
2355 SNIP (2, 1, newrel);
2356 }
2357 }
2358
2359 /* These always occur alone, but the offset depends on whether
2360 it's a MEMEX opcode (0x06) or not. */
2361 if (irel->r_addend & RX_RELAXA_DSP14)
2362 {
2363 int offset;
2364 GET_RELOC;
2365
2366 if (insn[0] == 0x06)
2367 offset = 3;
2368 else
2369 offset = 4;
2370
2371 code = insn[1] & 3;
2372
2373 if (code == 2 && symval / scale <= 255)
2374 {
2375 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2376
2377 insn[1] &= 0xfc;
2378 insn[1] |= 0x01;
2379 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2380 if (newrel != ELF32_R_TYPE (srel->r_info))
2381 {
2382 SNIP (offset, 1, newrel);
2383 *again = TRUE;
2384 }
2385 }
2386 else if (code == 1 && symval == 0)
2387 {
2388 insn[1] &= 0xfc;
2389 SNIP (offset, 1, R_RX_NONE);
2390 *again = TRUE;
2391 }
2392 }
2393
2394 /* IMM* codes:
2395 0 00 imm:32
2396 1 01 simm:8
2397 2 10 simm:16
2398 3 11 simm:24. */
2399
2400 /* These always occur alone. */
2401 if (irel->r_addend & RX_RELAXA_IMM6)
2402 {
2403 long ssymval;
2404
2405 GET_RELOC;
2406
2407 /* These relocations sign-extend, so we must do signed compares. */
2408 ssymval = (long) symval;
2409
2410 code = insn[0] & 0x03;
2411
2412 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2413 {
2414 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2415
2416 insn[0] &= 0xfc;
2417 insn[0] |= 0x03;
2418 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2419 if (newrel != ELF32_R_TYPE (srel->r_info))
2420 {
2421 SNIP (2, 1, newrel);
2422 *again = TRUE;
2423 }
2424 }
2425
2426 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2427 {
2428 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2429
2430 insn[0] &= 0xfc;
2431 insn[0] |= 0x02;
2432 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2433 if (newrel != ELF32_R_TYPE (srel->r_info))
2434 {
2435 SNIP (2, 1, newrel);
2436 *again = TRUE;
2437 }
2438 }
2439
2440 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2441 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2442 /* Decodable bits. */
2443 && (insn[0] & 0xfc) == 0x74
2444 /* Decodable bits. */
2445 && ((insn[1] & 0xf0) == 0x00))
2446 {
2447 int newrel;
2448
2449 insn[0] = 0x75;
2450 insn[1] = 0x50 | (insn[1] & 0x0f);
2451
2452 /* We can't relax this new opcode. */
2453 irel->r_addend = 0;
2454
2455 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2456 newrel = R_RX_ABS8U;
2457 else
2458 newrel = R_RX_DIR8U;
2459
2460 SNIP (2, 1, newrel);
2461 *again = TRUE;
2462 }
2463
2464 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2465 {
2466 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2467
2468 insn[0] &= 0xfc;
2469 insn[0] |= 0x01;
2470 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2471 if (newrel != ELF32_R_TYPE (srel->r_info))
2472 {
2473 SNIP (2, 1, newrel);
2474 *again = TRUE;
2475 }
2476 }
2477
2478 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2479 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2480 /* Decodable bits and immediate type. */
2481 && insn[0] == 0x75
2482 /* Decodable bits. */
2483 && (insn[1] & 0xc0) == 0x00)
2484 {
2485 static const int newop[4] = { 1, 3, 4, 5 };
2486
2487 insn[0] = 0x60 | newop[insn[1] >> 4];
2488 /* The register number doesn't move. */
2489
2490 /* We can't relax this new opcode. */
2491 irel->r_addend = 0;
2492
2493 move_reloc (irel, srel, -1);
2494
2495 SNIP (2, 1, R_RX_RH_UIMM4p8);
2496 *again = TRUE;
2497 }
2498
2499 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2500 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2501 /* Decodable bits and immediate type. */
2502 && insn[0] == 0x71
2503 /* Same register for source and destination. */
2504 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2505 {
2506 int newrel;
2507
2508 /* Note that we can't turn "add $0,Rs" into a NOP
2509 because the flags need to be set right. */
2510
2511 if (ssymval < 0)
2512 {
2513 insn[0] = 0x60; /* Subtract. */
2514 newrel = R_RX_RH_UNEG4p8;
2515 }
2516 else
2517 {
2518 insn[0] = 0x62; /* Add. */
2519 newrel = R_RX_RH_UIMM4p8;
2520 }
2521
2522 /* The register number is in the right place. */
2523
2524 /* We can't relax this new opcode. */
2525 irel->r_addend = 0;
2526
2527 move_reloc (irel, srel, -1);
2528
2529 SNIP (2, 1, newrel);
2530 *again = TRUE;
2531 }
2532 }
2533
2534 /* These are either matched with a DSP6 (2-byte base) or an id24
2535 (3-byte base). */
2536 if (irel->r_addend & RX_RELAXA_IMM12)
2537 {
2538 int dspcode, offset = 0;
2539 long ssymval;
2540
2541 GET_RELOC;
2542
2543 if ((insn[0] & 0xfc) == 0xfc)
2544 dspcode = 1; /* Just something with one byte operand. */
2545 else
2546 dspcode = insn[0] & 3;
2547 switch (dspcode)
2548 {
2549 case 0: offset = 2; break;
2550 case 1: offset = 3; break;
2551 case 2: offset = 4; break;
2552 case 3: offset = 2; break;
2553 }
2554
2555 /* These relocations sign-extend, so we must do signed compares. */
2556 ssymval = (long) symval;
2557
2558 code = (insn[1] >> 2) & 3;
2559 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2560 {
2561 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2562
2563 insn[1] &= 0xf3;
2564 insn[1] |= 0x0c;
2565 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2566 if (newrel != ELF32_R_TYPE (srel->r_info))
2567 {
2568 SNIP (offset, 1, newrel);
2569 *again = TRUE;
2570 }
2571 }
2572
2573 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2574 {
2575 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2576
2577 insn[1] &= 0xf3;
2578 insn[1] |= 0x08;
2579 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2580 if (newrel != ELF32_R_TYPE (srel->r_info))
2581 {
2582 SNIP (offset, 1, newrel);
2583 *again = TRUE;
2584 }
2585 }
2586
2587 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2588 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2589 /* Decodable bits. */
2590 && insn[0] == 0xfb
2591 /* Decodable bits. */
2592 && ((insn[1] & 0x03) == 0x02))
2593 {
2594 int newrel;
2595
2596 insn[0] = 0x75;
2597 insn[1] = 0x40 | (insn[1] >> 4);
2598
2599 /* We can't relax this new opcode. */
2600 irel->r_addend = 0;
2601
2602 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2603 newrel = R_RX_ABS8U;
2604 else
2605 newrel = R_RX_DIR8U;
2606
2607 SNIP (2, 1, newrel);
2608 *again = TRUE;
2609 }
2610
2611 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2612 {
2613 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2614
2615 insn[1] &= 0xf3;
2616 insn[1] |= 0x04;
2617 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2618 if (newrel != ELF32_R_TYPE(srel->r_info))
2619 {
2620 SNIP (offset, 1, newrel);
2621 *again = TRUE;
2622 }
2623 }
2624
2625 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2626 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2627 /* Decodable bits. */
2628 && insn[0] == 0xfb
2629 /* Decodable bits. */
2630 && ((insn[1] & 0x03) == 0x02))
2631 {
2632 insn[0] = 0x66;
2633 insn[1] = insn[1] >> 4;
2634
2635 /* We can't relax this new opcode. */
2636 irel->r_addend = 0;
2637
2638 move_reloc (irel, srel, -1);
2639
2640 SNIP (2, 1, R_RX_RH_UIMM4p8);
2641 *again = TRUE;
2642 }
2643 }
2644
2645 if (irel->r_addend & RX_RELAXA_BRA)
2646 {
2647 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2648 int max_pcrel3 = 4;
2649 int alignment_glue = 0;
2650
2651 GET_RELOC;
2652
2653 /* Branches over alignment chunks are problematic, as
2654 deleting bytes here makes the branch *further* away. We
2655 can be agressive with branches within this alignment
2656 block, but not branches outside it. */
2657 if ((prev_alignment == NULL
2658 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2659 && (next_alignment == NULL
2660 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2661 alignment_glue = section_alignment_glue;
2662
2663 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2664 && srel[1].r_addend & RX_RELAXA_BRA
2665 && srel[1].r_offset < irel->r_offset + pcrel)
2666 max_pcrel3 ++;
2667
2668 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2669
2670 /* The values we compare PCREL with are not what you'd
2671 expect; they're off by a little to compensate for (1)
2672 where the reloc is relative to the insn, and (2) how much
2673 the insn is going to change when we relax it. */
2674
2675 /* These we have to decode. */
2676 switch (insn[0])
2677 {
2678 case 0x04: /* BRA pcdsp:24 */
2679 if (-32768 + alignment_glue <= pcrel
2680 && pcrel <= 32765 - alignment_glue)
2681 {
2682 insn[0] = 0x38;
2683 SNIP (3, 1, newrel);
2684 *again = TRUE;
2685 }
2686 break;
2687
2688 case 0x38: /* BRA pcdsp:16 */
2689 if (-128 + alignment_glue <= pcrel
2690 && pcrel <= 127 - alignment_glue)
2691 {
2692 insn[0] = 0x2e;
2693 SNIP (2, 1, newrel);
2694 *again = TRUE;
2695 }
2696 break;
2697
2698 case 0x2e: /* BRA pcdsp:8 */
2699 /* Note that there's a risk here of shortening things so
2700 much that we no longer fit this reloc; it *should*
2701 only happen when you branch across a branch, and that
2702 branch also devolves into BRA.S. "Real" code should
2703 be OK. */
2704 if (max_pcrel3 + alignment_glue <= pcrel
2705 && pcrel <= 10 - alignment_glue
2706 && allow_pcrel3)
2707 {
2708 insn[0] = 0x08;
2709 SNIP (1, 1, newrel);
2710 move_reloc (irel, srel, -1);
2711 *again = TRUE;
2712 }
2713 break;
2714
2715 case 0x05: /* BSR pcdsp:24 */
2716 if (-32768 + alignment_glue <= pcrel
2717 && pcrel <= 32765 - alignment_glue)
2718 {
2719 insn[0] = 0x39;
2720 SNIP (1, 1, newrel);
2721 *again = TRUE;
2722 }
2723 break;
2724
2725 case 0x3a: /* BEQ.W pcdsp:16 */
2726 case 0x3b: /* BNE.W pcdsp:16 */
2727 if (-128 + alignment_glue <= pcrel
2728 && pcrel <= 127 - alignment_glue)
2729 {
2730 insn[0] = 0x20 | (insn[0] & 1);
2731 SNIP (1, 1, newrel);
2732 *again = TRUE;
2733 }
2734 break;
2735
2736 case 0x20: /* BEQ.B pcdsp:8 */
2737 case 0x21: /* BNE.B pcdsp:8 */
2738 if (max_pcrel3 + alignment_glue <= pcrel
2739 && pcrel - alignment_glue <= 10
2740 && allow_pcrel3)
2741 {
2742 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2743 SNIP (1, 1, newrel);
2744 move_reloc (irel, srel, -1);
2745 *again = TRUE;
2746 }
2747 break;
2748
2749 case 0x16: /* synthetic BNE dsp24 */
2750 case 0x1e: /* synthetic BEQ dsp24 */
2751 if (-32767 + alignment_glue <= pcrel
2752 && pcrel <= 32766 - alignment_glue
2753 && insn[1] == 0x04)
2754 {
2755 if (insn[0] == 0x16)
2756 insn[0] = 0x3b;
2757 else
2758 insn[0] = 0x3a;
2759 /* We snip out the bytes at the end else the reloc
2760 will get moved too, and too much. */
2761 SNIP (3, 2, newrel);
2762 move_reloc (irel, srel, -1);
2763 *again = TRUE;
2764 }
2765 break;
2766 }
2767
2768 /* Special case - synthetic conditional branches, pcrel24.
2769 Note that EQ and NE have been handled above. */
2770 if ((insn[0] & 0xf0) == 0x20
2771 && insn[1] == 0x06
2772 && insn[2] == 0x04
2773 && srel->r_offset != irel->r_offset + 1
2774 && -32767 + alignment_glue <= pcrel
2775 && pcrel <= 32766 - alignment_glue)
2776 {
2777 insn[1] = 0x05;
2778 insn[2] = 0x38;
2779 SNIP (5, 1, newrel);
2780 *again = TRUE;
2781 }
2782
2783 /* Special case - synthetic conditional branches, pcrel16 */
2784 if ((insn[0] & 0xf0) == 0x20
2785 && insn[1] == 0x05
2786 && insn[2] == 0x38
2787 && srel->r_offset != irel->r_offset + 1
2788 && -127 + alignment_glue <= pcrel
2789 && pcrel <= 126 - alignment_glue)
2790 {
2791 int cond = (insn[0] & 0x0f) ^ 0x01;
2792
2793 insn[0] = 0x20 | cond;
2794 /* By moving the reloc first, we avoid having
2795 delete_bytes move it also. */
2796 move_reloc (irel, srel, -2);
2797 SNIP (2, 3, newrel);
2798 *again = TRUE;
2799 }
2800 }
2801
2802 BFD_ASSERT (nrelocs == 0);
2803
2804 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2805 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2806 because it may have one or two relocations. */
2807 if ((insn[0] & 0xfc) == 0xf8
2808 && (insn[1] & 0x80) == 0x00
2809 && (insn[0] & 0x03) != 0x03)
2810 {
2811 int dcode, icode, reg, ioff, dscale, ilen;
2812 bfd_vma disp_val = 0;
2813 long imm_val = 0;
2814 Elf_Internal_Rela * disp_rel = 0;
2815 Elf_Internal_Rela * imm_rel = 0;
2816
2817 /* Reset this. */
2818 srel = irel;
2819
2820 dcode = insn[0] & 0x03;
2821 icode = (insn[1] >> 2) & 0x03;
2822 reg = (insn[1] >> 4) & 0x0f;
2823
2824 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2825
2826 /* Figure out what the dispacement is. */
2827 if (dcode == 1 || dcode == 2)
2828 {
2829 /* There's a displacement. See if there's a reloc for it. */
2830 if (srel[1].r_offset == irel->r_offset + 2)
2831 {
2832 GET_RELOC;
2833 disp_val = symval;
2834 disp_rel = srel;
2835 }
2836 else
2837 {
2838 if (dcode == 1)
2839 disp_val = insn[2];
2840 else
2841 {
2842#if RX_OPCODE_BIG_ENDIAN
2843 disp_val = insn[2] * 256 + insn[3];
2844#else
2845 disp_val = insn[2] + insn[3] * 256;
2846#endif
2847 }
2848 switch (insn[1] & 3)
2849 {
2850 case 1:
2851 disp_val *= 2;
2852 scale = 2;
2853 break;
2854 case 2:
2855 disp_val *= 4;
2856 scale = 4;
2857 break;
2858 }
2859 }
2860 }
2861
2862 dscale = scale;
2863
2864 /* Figure out what the immediate is. */
2865 if (srel[1].r_offset == irel->r_offset + ioff)
2866 {
2867 GET_RELOC;
2868 imm_val = (long) symval;
2869 imm_rel = srel;
2870 }
2871 else
2872 {
2873 unsigned char * ip = insn + ioff;
2874
2875 switch (icode)
2876 {
2877 case 1:
2878 /* For byte writes, we don't sign extend. Makes the math easier later. */
2879 if (scale == 1)
2880 imm_val = ip[0];
2881 else
2882 imm_val = (char) ip[0];
2883 break;
2884 case 2:
2885#if RX_OPCODE_BIG_ENDIAN
2886 imm_val = ((char) ip[0] << 8) | ip[1];
2887#else
2888 imm_val = ((char) ip[1] << 8) | ip[0];
2889#endif
2890 break;
2891 case 3:
2892#if RX_OPCODE_BIG_ENDIAN
2893 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2894#else
2895 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2896#endif
2897 break;
2898 case 0:
2899#if RX_OPCODE_BIG_ENDIAN
2900 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2901#else
2902 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2903#endif
2904 break;
2905 }
2906 }
2907
2908 ilen = 2;
2909
2910 switch (dcode)
2911 {
2912 case 1:
2913 ilen += 1;
2914 break;
2915 case 2:
2916 ilen += 2;
2917 break;
2918 }
2919
2920 switch (icode)
2921 {
2922 case 1:
2923 ilen += 1;
2924 break;
2925 case 2:
2926 ilen += 2;
2927 break;
2928 case 3:
2929 ilen += 3;
2930 break;
2931 case 4:
2932 ilen += 4;
2933 break;
2934 }
2935
2936 /* The shortcut happens when the immediate is 0..255,
2937 register r0 to r7, and displacement (scaled) 0..31. */
2938
2939 if (0 <= imm_val && imm_val <= 255
2940 && 0 <= reg && reg <= 7
2941 && disp_val / dscale <= 31)
2942 {
2943 insn[0] = 0x3c | (insn[1] & 0x03);
2944 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2945 insn[2] = imm_val;
2946
2947 if (disp_rel)
2948 {
2949 int newrel = R_RX_NONE;
2950
2951 switch (dscale)
2952 {
2953 case 1:
2954 newrel = R_RX_RH_ABS5p8B;
2955 break;
2956 case 2:
2957 newrel = R_RX_RH_ABS5p8W;
2958 break;
2959 case 4:
2960 newrel = R_RX_RH_ABS5p8L;
2961 break;
2962 }
2963 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2964 move_reloc (irel, disp_rel, -1);
2965 }
2966 if (imm_rel)
2967 {
2968 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2969 move_reloc (disp_rel ? disp_rel : irel,
2970 imm_rel,
2971 irel->r_offset - imm_rel->r_offset + 2);
2972 }
2973
2974 SNIPNR (3, ilen - 3);
2975 *again = TRUE;
2976
2977 /* We can't relax this new opcode. */
2978 irel->r_addend = 0;
2979 }
2980 }
2981 }
2982
2983 /* We can't reliably relax branches to DIR3U_PCREL unless we know
2984 whatever they're branching over won't shrink any more. If we're
2985 basically done here, do one more pass just for branches - but
2986 don't request a pass after that one! */
2987 if (!*again && !allow_pcrel3)
2988 {
2989 bfd_boolean ignored;
2990
2991 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
2992 }
2993
2994 return TRUE;
2995
2996 error_return:
2997 if (free_relocs != NULL)
2998 free (free_relocs);
2999
3000 if (free_contents != NULL)
3001 free (free_contents);
3002
3003 if (shndx_buf != NULL)
3004 {
3005 shndx_hdr->contents = NULL;
3006 free (shndx_buf);
3007 }
3008
3009 if (free_intsyms != NULL)
3010 free (free_intsyms);
3011
3012 return FALSE;
3013}
3014
3015static bfd_boolean
3016elf32_rx_relax_section_wrapper (bfd * abfd,
3017 asection * sec,
3018 struct bfd_link_info * link_info,
3019 bfd_boolean * again)
3020{
3021 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3022}
3023\f
3024/* Function to set the ELF flag bits. */
3025
3026static bfd_boolean
3027rx_elf_set_private_flags (bfd * abfd, flagword flags)
3028{
3029 elf_elfheader (abfd)->e_flags = flags;
3030 elf_flags_init (abfd) = TRUE;
3031 return TRUE;
3032}
3033
3034static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3035static bfd_boolean ignore_lma = TRUE;
c7927a3c 3036
84bff83f 3037void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3038
3039void
84bff83f
NC		 3040bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3041 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3042{
3043 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3044 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3045}
3046
708e2187
NC		 3047/* Converts FLAGS into a descriptive string.
3048 Returns a static pointer. */
3049
3050static const char *
3051describe_flags (flagword flags)
3052{
3053 static char buf [128];
3054
3055 buf[0] = 0;
3056
3057 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3058 strcat (buf, "64-bit doubles");
3059 else
3060 strcat (buf, "32-bit doubles");
3061
3062 if (flags & E_FLAG_RX_DSP)
3063 strcat (buf, ", dsp");
3064 else
3065 strcat (buf, ", no dsp");
3066
3067 if (flags & E_FLAG_RX_PID)
3068 strcat (buf, ", pid");
3069 else
3070 strcat (buf, ", no pid");
3071
3072 if (flags & E_FLAG_RX_ABI)
3073 strcat (buf, ", RX ABI");
3074 else
3075 strcat (buf, ", GCC ABI");
3076
3077 return buf;
3078}
3079
c7927a3c
NC		 3080/* Merge backend specific data from an object file to the output
3081 object file when linking. */
3082
3083static bfd_boolean
3084rx_elf_merge_private_bfd_data (bfd * ibfd, bfd * obfd)
3085{
3086 flagword old_flags;
3087 flagword new_flags;
3088 bfd_boolean error = FALSE;
3089
3090 new_flags = elf_elfheader (ibfd)->e_flags;
3091 old_flags = elf_elfheader (obfd)->e_flags;
3092
3093 if (!elf_flags_init (obfd))
3094 {
3095 /* First call, no flags set. */
3096 elf_flags_init (obfd) = TRUE;
3097 elf_elfheader (obfd)->e_flags = new_flags;
3098 }
3099 else if (old_flags != new_flags)
3100 {
708e2187
NC		 3101 flagword known_flags;
3102
3103 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3104 | E_FLAG_RX_DSP | E_FLAG_RX_PID;
c7927a3c
NC		 3105
3106 if ((old_flags ^ new_flags) & known_flags)
3107 {
3108 /* Only complain if flag bits we care about do not match.
3109 Other bits may be set, since older binaries did use some
3110 deprecated flags. */
3111 if (no_warn_mismatch)
3112 {
3113 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3114 }
3115 else
3116 {
708e2187
NC		 3117 _bfd_error_handler ("There is a conflict merging the ELF header flags from %s",
3118 bfd_get_filename (ibfd));
3119 _bfd_error_handler (" the input file's flags: %s",
3120 describe_flags (new_flags));
3121 _bfd_error_handler (" the output file's flags: %s",
3122 describe_flags (old_flags));
c7927a3c
NC		 3123 error = TRUE;
3124 }
3125 }
3126 else
3127 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3128 }
3129
3130 if (error)
3131 bfd_set_error (bfd_error_bad_value);
3132
3133 return !error;
3134}
3135\f
3136static bfd_boolean
3137rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3138{
3139 FILE * file = (FILE *) ptr;
3140 flagword flags;
3141
3142 BFD_ASSERT (abfd != NULL && ptr != NULL);
3143
3144 /* Print normal ELF private data. */
3145 _bfd_elf_print_private_bfd_data (abfd, ptr);
3146
3147 flags = elf_elfheader (abfd)->e_flags;
3148 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3149
6d8a3ede 3150 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3151 return TRUE;
3152}
3153
3154/* Return the MACH for an e_flags value. */
3155
3156static int
708e2187 3157elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3158{
708e2187
NC		 3159#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3160 Need to sort out how these flag bits are used.
3161 For now we assume that the flags are OK. */
c7927a3c 3162 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3163#endif
c7927a3c
NC		 3164 return bfd_mach_rx;
3165
3166 return 0;
3167}
3168
3169static bfd_boolean
3170rx_elf_object_p (bfd * abfd)
3171{
1ce74905
DD		 3172 int i;
3173 unsigned int u;
3174 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
3175 int nphdrs = elf_elfheader (abfd)->e_phnum;
3176 sec_ptr bsec;
fc87b9e8 3177 static int saw_be = FALSE;
1ce74905 3178
4c422395
DD		 3179 /* We never want to automatically choose the non-swapping big-endian
3180 target. The user can only get that explicitly, such as with -I
3181 and objcopy. */
6d00b590 3182 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3183 && abfd->target_defaulted)
3184 return FALSE;
3185
fc87b9e8
DD		 3186 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3187 as a fallback, so we check for "scanning" to know when to stop
3188 using the non-swapping target. */
6d00b590 3189 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3190 && saw_be)
3191 return FALSE;
6d00b590 3192 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3193 saw_be = TRUE;
3194
c7927a3c
NC		 3195 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3196 elf32_rx_machine (abfd));
1ce74905
DD		 3197
3198 /* For each PHDR in the object, we must find some section that
3199 corresponds (based on matching file offsets) and use its VMA
3200 information to reconstruct the p_vaddr field we clobbered when we
3201 wrote it out. */
3202 for (i=0; i<nphdrs; i++)
3203 {
3204 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3205 {
3206 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3207
74b1e045
DD		 3208 if (phdr[i].p_filesz
3209 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
1ce74905
DD		 3210 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3211 {
3212 /* Found one! The difference between the two addresses,
3213 plus the difference between the two file offsets, is
3214 enough information to reconstruct the lma. */
3215
3216 /* Example where they aren't:
3217 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3218 SEC[6] = vma 00000050 offset 00002050 size 00000040
3219
3220 The correct LMA for the section is fffc0140 + (2050-2010).
3221 */
3222
92ff23a1 3223 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3224 break;
3225 }
3226 }
3227
3228 /* We must update the bfd sections as well, so we don't stop
3229 with one match. */
3230 bsec = abfd->sections;
3231 while (bsec)
3232 {
74b1e045
DD		 3233 if (phdr[i].p_filesz
3234 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3235 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3236 {
3237 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3238 }
3239 bsec = bsec->next;
3240 }
3241 }
3242
c7927a3c
NC		 3243 return TRUE;
3244}
3245 \f
3246
3247#ifdef DEBUG
3248void
9ccb8af9 3249rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3250{
3251 size_t locsymcount;
3252 Elf_Internal_Sym * isymbuf;
3253 Elf_Internal_Sym * isymend;
3254 Elf_Internal_Sym * isym;
3255 Elf_Internal_Shdr * symtab_hdr;
3256 bfd_boolean free_internal = FALSE, free_external = FALSE;
3257 char * st_info_str;
3258 char * st_info_stb_str;
3259 char * st_other_str;
3260 char * st_shndx_str;
3261
3262 if (! internal_syms)
3263 {
3264 internal_syms = bfd_malloc (1000);
3265 free_internal = 1;
3266 }
3267 if (! external_syms)
3268 {
3269 external_syms = bfd_malloc (1000);
3270 free_external = 1;
3271 }
3272
3273 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3274 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3275 if (free_internal)
3276 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3277 symtab_hdr->sh_info, 0,
3278 internal_syms, external_syms, NULL);
3279 else
3280 isymbuf = internal_syms;
3281 isymend = isymbuf + locsymcount;
3282
3283 for (isym = isymbuf ; isym < isymend ; isym++)
3284 {
3285 switch (ELF_ST_TYPE (isym->st_info))
3286 {
b707aa49
NC		 3287 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3288 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3289 case STT_FILE: st_info_str = "STT_FILE"; break;
3290 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3291 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3292 default: st_info_str = "";
3293 }
3294 switch (ELF_ST_BIND (isym->st_info))
3295 {
b707aa49
NC		 3296 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3297 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3298 default: st_info_stb_str = "";
3299 }
3300 switch (ELF_ST_VISIBILITY (isym->st_other))
3301 {
b707aa49
NC		 3302 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3303 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3304 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3305 default: st_other_str = "";
3306 }
3307 switch (isym->st_shndx)
3308 {
b707aa49
NC		 3309 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3310 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3311 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3312 default: st_shndx_str = "";
3313 }
3314
3315 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3316 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3317 isym,
3318 (unsigned long) isym->st_value,
3319 (unsigned long) isym->st_size,
3320 isym->st_name,
3321 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3322 isym->st_name),
3323 isym->st_info, st_info_str, st_info_stb_str,
3324 isym->st_other, st_other_str,
3325 isym->st_shndx, st_shndx_str);
3326 }
3327 if (free_internal)
3328 free (internal_syms);
3329 if (free_external)
3330 free (external_syms);
3331}
3332
3333char *
3334rx_get_reloc (long reloc)
3335{
3336 if (0 <= reloc && reloc < R_RX_max)
3337 return rx_elf_howto_table[reloc].name;
3338 return "";
3339}
3340#endif /* DEBUG */
3341
3342\f
3343/* We must take care to keep the on-disk copy of any code sections
3344 that are fully linked swapped if the target is big endian, to match
3345 the Renesas tools. */
3346
3347/* The rule is: big endian object that are final-link executables,
3348 have code sections stored with 32-bit words swapped relative to
3349 what you'd get by default. */
3350
3351static bfd_boolean
3352rx_get_section_contents (bfd * abfd,
3353 sec_ptr section,
3354 void * location,
3355 file_ptr offset,
3356 bfd_size_type count)
3357{
3358 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3359 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3360 bfd_boolean rv;
3361
3362#ifdef DJDEBUG
3363 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3364 (long) offset, (long) count, section->name,
3365 bfd_big_endian(abfd) ? "be" : "le",
3366 exec, s_code, (long unsigned) section->filepos,
3367 (long unsigned) offset);
3368#endif
3369
3370 if (exec && s_code && bfd_big_endian (abfd))
3371 {
3372 char * cloc = (char *) location;
3373 bfd_size_type cnt, end_cnt;
3374
3375 rv = TRUE;
3376
3377 /* Fetch and swap unaligned bytes at the beginning. */
3378 if (offset % 4)
3379 {
3380 char buf[4];
3381
3382 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3383 (offset & -4), 4);
3384 if (!rv)
3385 return FALSE;
3386
3387 bfd_putb32 (bfd_getl32 (buf), buf);
3388
3389 cnt = 4 - (offset % 4);
3390 if (cnt > count)
3391 cnt = count;
3392
3393 memcpy (location, buf + (offset % 4), cnt);
3394
3395 count -= cnt;
3396 offset += cnt;
3397 cloc += count;
3398 }
3399
3400 end_cnt = count % 4;
3401
3402 /* Fetch and swap the middle bytes. */
3403 if (count >= 4)
3404 {
3405 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3406 count - end_cnt);
3407 if (!rv)
3408 return FALSE;
3409
3410 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3411 bfd_putb32 (bfd_getl32 (cloc), cloc);
3412 }
3413
3414 /* Fetch and swap the end bytes. */
3415 if (end_cnt > 0)
3416 {
3417 char buf[4];
3418
3419 /* Fetch the end bytes. */
3420 rv = _bfd_generic_get_section_contents (abfd, section, buf,
3421 offset + count - end_cnt, 4);
3422 if (!rv)
3423 return FALSE;
3424
3425 bfd_putb32 (bfd_getl32 (buf), buf);
3426 memcpy (cloc, buf, end_cnt);
3427 }
3428 }
3429 else
3430 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3431
3432 return rv;
3433}
3434
3435#ifdef DJDEBUG
3436static bfd_boolean
3437rx2_set_section_contents (bfd * abfd,
3438 sec_ptr section,
3439 const void * location,
3440 file_ptr offset,
3441 bfd_size_type count)
3442{
3443 bfd_size_type i;
3444
3445 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3446 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3447 for (i = 0; i < count; i++)
3448 {
3449 if (i % 16 == 0 && i > 0)
3450 fprintf (stderr, "\n");
3451
3452 if (i % 16 && i % 4 == 0)
3453 fprintf (stderr, " ");
3454
3455 if (i % 16 == 0)
3456 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3457
3458 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3459 }
3460 fprintf (stderr, "\n");
3461
3462 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3463}
3464#define _bfd_elf_set_section_contents rx2_set_section_contents
3465#endif
3466
3467static bfd_boolean
3468rx_set_section_contents (bfd * abfd,
3469 sec_ptr section,
3470 const void * location,
3471 file_ptr offset,
3472 bfd_size_type count)
3473{
3474 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3475 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3476 bfd_boolean rv;
3477 char * swapped_data = NULL;
3478 bfd_size_type i;
3479 bfd_vma caddr = section->vma + offset;
3480 file_ptr faddr = 0;
3481 bfd_size_type scount;
3482
3483#ifdef DJDEBUG
3484 bfd_size_type i;
3485
3486 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3487 (long) offset, (long) count, section->name,
3488 bfd_big_endian (abfd) ? "be" : "le",
3489 exec, s_code);
3490
3491 for (i = 0; i < count; i++)
3492 {
3493 int a = section->vma + offset + i;
3494
3495 if (a % 16 == 0 && a > 0)
3496 fprintf (stderr, "\n");
3497
3498 if (a % 16 && a % 4 == 0)
3499 fprintf (stderr, " ");
3500
3501 if (a % 16 == 0 || i == 0)
3502 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3503
3504 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3505 }
3506
3507 fprintf (stderr, "\n");
3508#endif
3509
3510 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3511 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3512
3513 while (count > 0 && caddr > 0 && caddr % 4)
3514 {
3515 switch (caddr % 4)
3516 {
3517 case 0: faddr = offset + 3; break;
3518 case 1: faddr = offset + 1; break;
3519 case 2: faddr = offset - 1; break;
3520 case 3: faddr = offset - 3; break;
3521 }
3522
3523 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3524 if (! rv)
3525 return rv;
3526
3527 location ++;
3528 offset ++;
3529 count --;
3530 caddr ++;
3531 }
3532
3533 scount = (int)(count / 4) * 4;
3534 if (scount > 0)
3535 {
3536 char * cloc = (char *) location;
3537
3538 swapped_data = (char *) bfd_alloc (abfd, count);
3539
3540 for (i = 0; i < count; i += 4)
3541 {
3542 bfd_vma v = bfd_getl32 (cloc + i);
3543 bfd_putb32 (v, swapped_data + i);
3544 }
3545
3546 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3547
3548 if (!rv)
3549 return rv;
3550 }
3551
3552 count -= scount;
3553 location += scount;
3554 offset += scount;
3555
3556 if (count > 0)
3557 {
3558 caddr = section->vma + offset;
3559 while (count > 0)
3560 {
3561 switch (caddr % 4)
3562 {
3563 case 0: faddr = offset + 3; break;
3564 case 1: faddr = offset + 1; break;
3565 case 2: faddr = offset - 1; break;
3566 case 3: faddr = offset - 3; break;
3567 }
3568 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3569 if (! rv)
3570 return rv;
3571
3572 location ++;
3573 offset ++;
3574 count --;
3575 caddr ++;
3576 }
3577 }
3578
3579 return TRUE;
3580}
3581
3582static bfd_boolean
3583rx_final_link (bfd * abfd, struct bfd_link_info * info)
3584{
3585 asection * o;
3586
3587 for (o = abfd->sections; o != NULL; o = o->next)
3588 {
3589#ifdef DJDEBUG
3590 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3591 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3592#endif
3593 if (o->flags & SEC_CODE
3594 && bfd_big_endian (abfd)
e57278ef 3595 && o->size % 4)
c7927a3c
NC		 3596 {
3597#ifdef DJDEBUG
3598 fprintf (stderr, "adjusting...\n");
3599#endif
3600 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3601 }
3602 }
3603
3604 return bfd_elf_final_link (abfd, info);
3605}
3606
3607static bfd_boolean
3608elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3609 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3610{
3611 const struct elf_backend_data * bed;
3612 struct elf_obj_tdata * tdata;
3613 Elf_Internal_Phdr * phdr;
3614 unsigned int count;
3615 unsigned int i;
3616
3617 bed = get_elf_backend_data (abfd);
3618 tdata = elf_tdata (abfd);
3619 phdr = tdata->phdr;
12bd6957 3620 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3621
84bff83f
NC		 3622 if (ignore_lma)
3623 for (i = count; i-- != 0;)
3624 if (phdr[i].p_type == PT_LOAD)
3625 {
3626 /* The Renesas tools expect p_paddr to be zero. However,
3627 there is no other way to store the writable data in ROM for
3628 startup initialization. So, we let the linker *think*
3629 we're using paddr and vaddr the "usual" way, but at the
3630 last minute we move the paddr into the vaddr (which is what
3631 the simulator uses) and zero out paddr. Note that this
3632 does not affect the section headers, just the program
3633 headers. We hope. */
c7927a3c 3634 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3635#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3636 becomes wrong. */
84bff83f
NC		 3637 phdr[i].p_paddr = 0;
3638#endif
3639 }
c7927a3c
NC		 3640
3641 return TRUE;
3642}
708e2187
NC		 3643
3644/* The default literal sections should always be marked as "code" (i.e.,
3645 SHF_EXECINSTR). This is particularly important for big-endian mode
3646 when we do not want their contents byte reversed. */
3647static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3648{
3649 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3650 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3651 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3652 { NULL, 0, 0, 0, 0 }
3653};
7a2f2d82
DD		 3654\f
3655typedef struct {
3656 bfd *abfd;
3657 struct bfd_link_info *info;
3658 bfd_vma table_start;
3659 int table_size;
3660 bfd_vma *table_handlers;
3661 bfd_vma table_default_handler;
3662 struct bfd_link_hash_entry **table_entries;
3663 struct bfd_link_hash_entry *table_default_entry;
3664 FILE *mapfile;
3665} RX_Table_Info;
3666
3667static bfd_boolean
3668rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3669{
3670 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3671 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3672 const char *name; /* of the symbol we've found */
3673 asection *sec;
3674 struct bfd *abfd;
3675 int idx;
3676 const char *tname; /* name of the table */
3677 bfd_vma start_addr, end_addr;
3678 char *buf;
3679 struct bfd_link_hash_entry * h;
3680
3681 /* We're looking for globally defined symbols of the form
3682 $tablestart$<NAME>. */
3683 if (ent->type != bfd_link_hash_defined
3684 && ent->type != bfd_link_hash_defweak)
3685 return TRUE;
3686
3687 name = ent->root.string;
3688 sec = ent->u.def.section;
3689 abfd = sec->owner;
3690
3691 if (strncmp (name, "$tablestart$", 12))
3692 return TRUE;
3693
3694 sec->flags |= SEC_KEEP;
3695
3696 tname = name + 12;
3697
3698 start_addr = ent->u.def.value;
3699
3700 /* At this point, we can't build the table but we can (and must)
3701 find all the related symbols and mark their sections as SEC_KEEP
3702 so we don't garbage collect them. */
3703
3704 buf = (char *) malloc (12 + 10 + strlen (tname));
3705
3706 sprintf (buf, "$tableend$%s", tname);
3707 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3708 if (!h || (h->type != bfd_link_hash_defined
3709 && h->type != bfd_link_hash_defweak))
3710 {
3711 _bfd_error_handler (_("%B:%A: table %s missing corresponding %s"),
3712 abfd, sec, name, buf);
3713 return TRUE;
3714 }
3715
3716 if (h->u.def.section != ent->u.def.section)
3717 {
3718 _bfd_error_handler (_("%B:%A: %s and %s must be in the same input section"),
3719 h->u.def.section->owner, h->u.def.section,
3720 name, buf);
3721 return TRUE;
3722 }
3723
3724 end_addr = h->u.def.value;
3725
3726 sprintf (buf, "$tableentry$default$%s", tname);
3727 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3728 if (h && (h->type == bfd_link_hash_defined
3729 || h->type == bfd_link_hash_defweak))
3730 {
3731 h->u.def.section->flags |= SEC_KEEP;
3732 }
3733
3734 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3735 {
3736 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3737 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3738 if (h && (h->type == bfd_link_hash_defined
3739 || h->type == bfd_link_hash_defweak))
3740 {
3741 h->u.def.section->flags |= SEC_KEEP;
3742 }
3743 }
3744
3745 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3746 return TRUE;
3747}
3748
3749/* We need to check for table entry symbols and build the tables, and
3750 we need to do it before the linker does garbage collection. This function is
3751 called once per input object file. */
3752static bfd_boolean
3753rx_check_directives
3754 (bfd * abfd ATTRIBUTE_UNUSED,
3755 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3756{
3757 RX_Table_Info stuff;
3758
3759 stuff.abfd = abfd;
3760 stuff.info = info;
3761 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3762
3763 return TRUE;
3764}
3765
3766\f
3767static bfd_boolean
3768rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3769{
3770 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3771 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3772 int idx;
3773 const char *name;
3774 bfd_vma addr;
3775
3776 /* See if the symbol ENT has an address listed in the table, and
3777 isn't a debug/special symbol. If so, put it in the table. */
3778
3779 if (ent->type != bfd_link_hash_defined
3780 && ent->type != bfd_link_hash_defweak)
3781 return TRUE;
3782
3783 name = ent->root.string;
3784
3785 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3786 return TRUE;
3787
3788 addr = (ent->u.def.value
3789 + ent->u.def.section->output_section->vma
3790 + ent->u.def.section->output_offset);
3791
3792 for (idx = 0; idx < info->table_size; idx ++)
3793 if (addr == info->table_handlers[idx])
3794 info->table_entries[idx] = ent;
3795
3796 if (addr == info->table_default_handler)
3797 info->table_default_entry = ent;
3798
3799 return TRUE;
3800}
3801
3802static bfd_boolean
3803rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3804{
3805 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3806 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3807 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3808 int idx;
3809 const char *tname; /* name of the table */
3810 bfd_vma start_addr, end_addr;
3811 char *buf;
3812 struct bfd_link_hash_entry * h;
3813 int need_elipses;
3814
3815 /* We're looking for globally defined symbols of the form
3816 $tablestart$<NAME>. */
3817 if (ent->type != bfd_link_hash_defined
3818 && ent->type != bfd_link_hash_defweak)
3819 return TRUE;
3820
3821 name = ent->root.string;
7a2f2d82
DD		 3822
3823 if (strncmp (name, "$tablestart$", 12))
3824 return TRUE;
3825
3826 tname = name + 12;
3827 start_addr = (ent->u.def.value
3828 + ent->u.def.section->output_section->vma
3829 + ent->u.def.section->output_offset);
3830
3831 buf = (char *) malloc (12 + 10 + strlen (tname));
3832
3833 sprintf (buf, "$tableend$%s", tname);
3834 end_addr = get_symbol_value_maybe (buf, info->info);
3835
3836 sprintf (buf, "$tableentry$default$%s", tname);
3837 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3838 if (h)
3839 {
3840 info->table_default_handler = (h->u.def.value
3841 + h->u.def.section->output_section->vma
3842 + h->u.def.section->output_offset);
3843 }
3844 else
3845 /* Zero is a valid handler address! */
3846 info->table_default_handler = (bfd_vma) (-1);
3847 info->table_default_entry = NULL;
3848
3849 info->table_start = start_addr;
3850 info->table_size = (int) (end_addr - start_addr) / 4;
3851 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3852 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3853
3854 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3855 {
3856 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3857 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3858 if (h && (h->type == bfd_link_hash_defined
3859 || h->type == bfd_link_hash_defweak))
3860 {
3861 info->table_handlers[idx] = (h->u.def.value
3862 + h->u.def.section->output_section->vma
3863 + h->u.def.section->output_offset);
3864 }
3865 else
3866 info->table_handlers[idx] = info->table_default_handler;
3867 info->table_entries[idx] = NULL;
3868 }
3869
3870 free (buf);
3871
3872 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3873
33ac0ca1 3874 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3875 tname, info->table_size, start_addr);
3876
3877 if (info->table_default_entry)
33ac0ca1 3878 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3879 info->table_default_entry->root.string,
3880 info->table_default_handler);
3881 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3882 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3883 info->table_default_handler);
3884 else
3885 fprintf (info->mapfile, " no default handler\n");
3886
3887 need_elipses = 1;
3888 for (idx = 0; idx < info->table_size; idx ++)
3889 {
3890 if (info->table_handlers[idx] == info->table_default_handler)
3891 {
3892 if (need_elipses)
3893 fprintf (info->mapfile, " . . .\n");
3894 need_elipses = 0;
3895 continue;
3896 }
3897 need_elipses = 1;
3898
33ac0ca1 3899 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3900
3901 if (info->table_handlers[idx] == (bfd_vma) (-1))
3902 fprintf (info->mapfile, "(no handler found)\n");
3903
3904 else if (info->table_handlers[idx] == info->table_default_handler)
3905 {
3906 if (info->table_default_entry)
3907 fprintf (info->mapfile, "(default)\n");
3908 else
3909 fprintf (info->mapfile, "(default)\n");
3910 }
3911
3912 else if (info->table_entries[idx])
3913 {
33ac0ca1 3914 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3915 }
3916
3917 else
3918 {
33ac0ca1 3919 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3920 }
3921 }
3922 if (need_elipses)
3923 fprintf (info->mapfile, " . . .\n");
3924
3925 return TRUE;
3926}
3927
3928void
3929rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3930{
3931 /* We scan the symbol table looking for $tableentry$'s, and for
3932 each, try to deduce which handlers go with which entries. */
3933
3934 RX_Table_Info stuff;
3935
3936 stuff.abfd = obfd;
3937 stuff.info = info;
3938 stuff.mapfile = mapfile;
3939 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
3940}
3941
c7927a3c
NC		 3942\f
3943#define ELF_ARCH bfd_arch_rx
3944#define ELF_MACHINE_CODE EM_RX
3945#define ELF_MAXPAGESIZE 0x1000
3946
6d00b590 3947#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 3948#define TARGET_BIG_NAME "elf32-rx-be"
3949
6d00b590 3950#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 3951#define TARGET_LITTLE_NAME "elf32-rx-le"
3952
3953#define elf_info_to_howto_rel NULL
3954#define elf_info_to_howto rx_info_to_howto_rela
3955#define elf_backend_object_p rx_elf_object_p
3956#define elf_backend_relocate_section rx_elf_relocate_section
3957#define elf_symbol_leading_char ('_')
3958#define elf_backend_can_gc_sections 1
3959#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
3960
3961#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
3962#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
3963#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
3964#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
3965#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
3966#define bfd_elf32_get_section_contents rx_get_section_contents
3967#define bfd_elf32_set_section_contents rx_set_section_contents
3968#define bfd_elf32_bfd_final_link rx_final_link
3969#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
708e2187 3970#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 3971#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 3972
3973#include "elf32-target.h"
4c422395
DD		 3974
3975/* We define a second big-endian target that doesn't have the custom
3976 section get/set hooks, for times when we want to preserve the
3977 pre-swapped .text sections (like objcopy). */
3978
3979#undef TARGET_BIG_SYM
6d00b590 3980#define TARGET_BIG_SYM rx_elf32_be_ns_vec
4c422395
DD		 3981#undef TARGET_BIG_NAME
3982#define TARGET_BIG_NAME "elf32-rx-be-ns"
3983#undef TARGET_LITTLE_SYM
3984
3985#undef bfd_elf32_get_section_contents
3986#undef bfd_elf32_set_section_contents
3987
3988#undef elf32_bed
3989#define elf32_bed elf32_rx_be_ns_bed
3990
3991#include "elf32-target.h"
GDB Binutils - Deliverables
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