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[deliverable/binutils-gdb.git] / bfd / elf32-rx.c
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c7927a3c 1/* Renesas RX specific support for 32-bit ELF.
219d1afa 2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
c7927a3c
NC		 3
4 This file is part of BFD, the Binary File Descriptor library.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
863f7a5f
NC		 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
c7927a3c
NC		 20
21#include "sysdep.h"
22#include "bfd.h"
d68cd58c 23#include "bfd_stdint.h"
c7927a3c
NC		 24#include "libbfd.h"
25#include "elf-bfd.h"
26#include "elf/rx.h"
27#include "libiberty.h"
7a2f2d82 28#include "elf32-rx.h"
c7927a3c
NC		 29
30#define RX_OPCODE_BIG_ENDIAN 0
31
4c422395
DD		 32/* This is a meta-target that's used only with objcopy, to avoid the
33 endian-swap we would otherwise get. We check for this in
34 rx_elf_object_p(). */
6d00b590
AM		 35const bfd_target rx_elf32_be_ns_vec;
36const bfd_target rx_elf32_be_vec;
4c422395 37
c7927a3c
NC		 38#ifdef DEBUG
39char * rx_get_reloc (long);
9ccb8af9 40void rx_dump_symtab (bfd *, void *, void *);
c7927a3c
NC		 41#endif
42
43#define RXREL(n,sz,bit,shift,complain,pcrel) \
44 HOWTO (R_RX_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \
45 bfd_elf_generic_reloc, "R_RX_" #n, FALSE, 0, ~0, FALSE)
46
47/* Note that the relocations around 0x7f are internal to this file;
48 feel free to move them as needed to avoid conflicts with published
49 relocation numbers. */
50
51static reloc_howto_type rx_elf_howto_table [] =
52{
07d6d2b8
AM		 53 RXREL (NONE, 3, 0, 0, dont, FALSE),
54 RXREL (DIR32, 2, 32, 0, signed, FALSE),
c7927a3c 55 RXREL (DIR24S, 2, 24, 0, signed, FALSE),
07d6d2b8 56 RXREL (DIR16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 57 RXREL (DIR16U, 1, 16, 0, unsigned, FALSE),
58 RXREL (DIR16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 59 RXREL (DIR8, 0, 8, 0, dont, FALSE),
60 RXREL (DIR8U, 0, 8, 0, unsigned, FALSE),
61 RXREL (DIR8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 62 RXREL (DIR24S_PCREL, 2, 24, 0, signed, TRUE),
63 RXREL (DIR16S_PCREL, 1, 16, 0, signed, TRUE),
64 RXREL (DIR8S_PCREL, 0, 8, 0, signed, TRUE),
65 RXREL (DIR16UL, 1, 16, 2, unsigned, FALSE),
66 RXREL (DIR16UW, 1, 16, 1, unsigned, FALSE),
67 RXREL (DIR8UL, 0, 8, 2, unsigned, FALSE),
68 RXREL (DIR8UW, 0, 8, 1, unsigned, FALSE),
07d6d2b8
AM		 69 RXREL (DIR32_REV, 1, 16, 0, dont, FALSE),
70 RXREL (DIR16_REV, 1, 16, 0, dont, FALSE),
71 RXREL (DIR3U_PCREL, 0, 3, 0, dont, TRUE),
c7927a3c
NC		 72
73 EMPTY_HOWTO (0x13),
74 EMPTY_HOWTO (0x14),
75 EMPTY_HOWTO (0x15),
76 EMPTY_HOWTO (0x16),
77 EMPTY_HOWTO (0x17),
78 EMPTY_HOWTO (0x18),
79 EMPTY_HOWTO (0x19),
80 EMPTY_HOWTO (0x1a),
81 EMPTY_HOWTO (0x1b),
82 EMPTY_HOWTO (0x1c),
83 EMPTY_HOWTO (0x1d),
84 EMPTY_HOWTO (0x1e),
85 EMPTY_HOWTO (0x1f),
86
07d6d2b8
AM		 87 RXREL (RH_3_PCREL, 0, 3, 0, signed, TRUE),
88 RXREL (RH_16_OP, 1, 16, 0, signed, FALSE),
89 RXREL (RH_24_OP, 2, 24, 0, signed, FALSE),
90 RXREL (RH_32_OP, 2, 32, 0, signed, FALSE),
c7927a3c 91 RXREL (RH_24_UNS, 2, 24, 0, unsigned, FALSE),
07d6d2b8
AM		 92 RXREL (RH_8_NEG, 0, 8, 0, signed, FALSE),
93 RXREL (RH_16_NEG, 1, 16, 0, signed, FALSE),
94 RXREL (RH_24_NEG, 2, 24, 0, signed, FALSE),
95 RXREL (RH_32_NEG, 2, 32, 0, signed, FALSE),
96 RXREL (RH_DIFF, 2, 32, 0, signed, FALSE),
c7927a3c
NC		 97 RXREL (RH_GPRELB, 1, 16, 0, unsigned, FALSE),
98 RXREL (RH_GPRELW, 1, 16, 0, unsigned, FALSE),
99 RXREL (RH_GPRELL, 1, 16, 0, unsigned, FALSE),
07d6d2b8 100 RXREL (RH_RELAX, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 101
102 EMPTY_HOWTO (0x2e),
103 EMPTY_HOWTO (0x2f),
104 EMPTY_HOWTO (0x30),
105 EMPTY_HOWTO (0x31),
106 EMPTY_HOWTO (0x32),
107 EMPTY_HOWTO (0x33),
108 EMPTY_HOWTO (0x34),
109 EMPTY_HOWTO (0x35),
110 EMPTY_HOWTO (0x36),
111 EMPTY_HOWTO (0x37),
112 EMPTY_HOWTO (0x38),
113 EMPTY_HOWTO (0x39),
114 EMPTY_HOWTO (0x3a),
115 EMPTY_HOWTO (0x3b),
116 EMPTY_HOWTO (0x3c),
117 EMPTY_HOWTO (0x3d),
118 EMPTY_HOWTO (0x3e),
119 EMPTY_HOWTO (0x3f),
120 EMPTY_HOWTO (0x40),
121
07d6d2b8 122 RXREL (ABS32, 2, 32, 0, dont, FALSE),
c7927a3c 123 RXREL (ABS24S, 2, 24, 0, signed, FALSE),
07d6d2b8 124 RXREL (ABS16, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 125 RXREL (ABS16U, 1, 16, 0, unsigned, FALSE),
126 RXREL (ABS16S, 1, 16, 0, signed, FALSE),
07d6d2b8
AM		 127 RXREL (ABS8, 0, 8, 0, dont, FALSE),
128 RXREL (ABS8U, 0, 8, 0, unsigned, FALSE),
129 RXREL (ABS8S, 0, 8, 0, signed, FALSE),
c7927a3c
NC		 130 RXREL (ABS24S_PCREL, 2, 24, 0, signed, TRUE),
131 RXREL (ABS16S_PCREL, 1, 16, 0, signed, TRUE),
132 RXREL (ABS8S_PCREL, 0, 8, 0, signed, TRUE),
133 RXREL (ABS16UL, 1, 16, 0, unsigned, FALSE),
134 RXREL (ABS16UW, 1, 16, 0, unsigned, FALSE),
135 RXREL (ABS8UL, 0, 8, 0, unsigned, FALSE),
136 RXREL (ABS8UW, 0, 8, 0, unsigned, FALSE),
07d6d2b8
AM		 137 RXREL (ABS32_REV, 2, 32, 0, dont, FALSE),
138 RXREL (ABS16_REV, 1, 16, 0, dont, FALSE),
c7927a3c
NC		 139
140#define STACK_REL_P(x) ((x) <= R_RX_ABS16_REV && (x) >= R_RX_ABS32)
141
142 EMPTY_HOWTO (0x52),
143 EMPTY_HOWTO (0x53),
144 EMPTY_HOWTO (0x54),
145 EMPTY_HOWTO (0x55),
146 EMPTY_HOWTO (0x56),
147 EMPTY_HOWTO (0x57),
148 EMPTY_HOWTO (0x58),
149 EMPTY_HOWTO (0x59),
150 EMPTY_HOWTO (0x5a),
151 EMPTY_HOWTO (0x5b),
152 EMPTY_HOWTO (0x5c),
153 EMPTY_HOWTO (0x5d),
154 EMPTY_HOWTO (0x5e),
155 EMPTY_HOWTO (0x5f),
156 EMPTY_HOWTO (0x60),
157 EMPTY_HOWTO (0x61),
158 EMPTY_HOWTO (0x62),
159 EMPTY_HOWTO (0x63),
160 EMPTY_HOWTO (0x64),
161 EMPTY_HOWTO (0x65),
162 EMPTY_HOWTO (0x66),
163 EMPTY_HOWTO (0x67),
164 EMPTY_HOWTO (0x68),
165 EMPTY_HOWTO (0x69),
166 EMPTY_HOWTO (0x6a),
167 EMPTY_HOWTO (0x6b),
168 EMPTY_HOWTO (0x6c),
169 EMPTY_HOWTO (0x6d),
170 EMPTY_HOWTO (0x6e),
171 EMPTY_HOWTO (0x6f),
172 EMPTY_HOWTO (0x70),
173 EMPTY_HOWTO (0x71),
174 EMPTY_HOWTO (0x72),
175 EMPTY_HOWTO (0x73),
176 EMPTY_HOWTO (0x74),
177 EMPTY_HOWTO (0x75),
178 EMPTY_HOWTO (0x76),
179 EMPTY_HOWTO (0x77),
180
181 /* These are internal. */
182 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 8/12. */
183 /* ---- ---- 4--- 3210. */
184#define R_RX_RH_ABS5p8B 0x78
07d6d2b8 185 RXREL (RH_ABS5p8B, 0, 0, 0, dont, FALSE),
c7927a3c 186#define R_RX_RH_ABS5p8W 0x79
07d6d2b8 187 RXREL (RH_ABS5p8W, 0, 0, 0, dont, FALSE),
c7927a3c 188#define R_RX_RH_ABS5p8L 0x7a
07d6d2b8 189 RXREL (RH_ABS5p8L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 190 /* A 5-bit unsigned displacement to a B/W/L address, at bit position 5/12. */
191 /* ---- -432 1--- 0---. */
192#define R_RX_RH_ABS5p5B 0x7b
07d6d2b8 193 RXREL (RH_ABS5p5B, 0, 0, 0, dont, FALSE),
c7927a3c 194#define R_RX_RH_ABS5p5W 0x7c
07d6d2b8 195 RXREL (RH_ABS5p5W, 0, 0, 0, dont, FALSE),
c7927a3c 196#define R_RX_RH_ABS5p5L 0x7d
07d6d2b8 197 RXREL (RH_ABS5p5L, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 198 /* A 4-bit unsigned immediate at bit position 8. */
199#define R_RX_RH_UIMM4p8 0x7e
07d6d2b8 200 RXREL (RH_UIMM4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 201 /* A 4-bit negative unsigned immediate at bit position 8. */
202#define R_RX_RH_UNEG4p8 0x7f
07d6d2b8 203 RXREL (RH_UNEG4p8, 0, 0, 0, dont, FALSE),
c7927a3c
NC		 204 /* End of internal relocs. */
205
07d6d2b8
AM		 206 RXREL (SYM, 2, 32, 0, dont, FALSE),
207 RXREL (OPneg, 2, 32, 0, dont, FALSE),
208 RXREL (OPadd, 2, 32, 0, dont, FALSE),
209 RXREL (OPsub, 2, 32, 0, dont, FALSE),
210 RXREL (OPmul, 2, 32, 0, dont, FALSE),
211 RXREL (OPdiv, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 212 RXREL (OPshla, 2, 32, 0, dont, FALSE),
213 RXREL (OPshra, 2, 32, 0, dont, FALSE),
214 RXREL (OPsctsize, 2, 32, 0, dont, FALSE),
215 RXREL (OPscttop, 2, 32, 0, dont, FALSE),
07d6d2b8
AM		 216 RXREL (OPand, 2, 32, 0, dont, FALSE),
217 RXREL (OPor, 2, 32, 0, dont, FALSE),
218 RXREL (OPxor, 2, 32, 0, dont, FALSE),
219 RXREL (OPnot, 2, 32, 0, dont, FALSE),
220 RXREL (OPmod, 2, 32, 0, dont, FALSE),
c7927a3c
NC		 221 RXREL (OPromtop, 2, 32, 0, dont, FALSE),
222 RXREL (OPramtop, 2, 32, 0, dont, FALSE)
223};
224\f
225/* Map BFD reloc types to RX ELF reloc types. */
226
227struct rx_reloc_map
228{
229 bfd_reloc_code_real_type bfd_reloc_val;
07d6d2b8 230 unsigned int rx_reloc_val;
c7927a3c
NC		 231};
232
233static const struct rx_reloc_map rx_reloc_map [] =
234{
235 { BFD_RELOC_NONE, R_RX_NONE },
236 { BFD_RELOC_8, R_RX_DIR8S },
237 { BFD_RELOC_16, R_RX_DIR16S },
238 { BFD_RELOC_24, R_RX_DIR24S },
239 { BFD_RELOC_32, R_RX_DIR32 },
240 { BFD_RELOC_RX_16_OP, R_RX_DIR16 },
241 { BFD_RELOC_RX_DIR3U_PCREL, R_RX_DIR3U_PCREL },
242 { BFD_RELOC_8_PCREL, R_RX_DIR8S_PCREL },
243 { BFD_RELOC_16_PCREL, R_RX_DIR16S_PCREL },
244 { BFD_RELOC_24_PCREL, R_RX_DIR24S_PCREL },
245 { BFD_RELOC_RX_8U, R_RX_DIR8U },
246 { BFD_RELOC_RX_16U, R_RX_DIR16U },
247 { BFD_RELOC_RX_24U, R_RX_RH_24_UNS },
248 { BFD_RELOC_RX_NEG8, R_RX_RH_8_NEG },
249 { BFD_RELOC_RX_NEG16, R_RX_RH_16_NEG },
250 { BFD_RELOC_RX_NEG24, R_RX_RH_24_NEG },
251 { BFD_RELOC_RX_NEG32, R_RX_RH_32_NEG },
252 { BFD_RELOC_RX_DIFF, R_RX_RH_DIFF },
253 { BFD_RELOC_RX_GPRELB, R_RX_RH_GPRELB },
254 { BFD_RELOC_RX_GPRELW, R_RX_RH_GPRELW },
255 { BFD_RELOC_RX_GPRELL, R_RX_RH_GPRELL },
256 { BFD_RELOC_RX_RELAX, R_RX_RH_RELAX },
257 { BFD_RELOC_RX_SYM, R_RX_SYM },
258 { BFD_RELOC_RX_OP_SUBTRACT, R_RX_OPsub },
9689e3a3 259 { BFD_RELOC_RX_OP_NEG, R_RX_OPneg },
c7927a3c
NC		 260 { BFD_RELOC_RX_ABS8, R_RX_ABS8 },
261 { BFD_RELOC_RX_ABS16, R_RX_ABS16 },
e8ef21bf 262 { BFD_RELOC_RX_ABS16_REV, R_RX_ABS16_REV },
c7927a3c 263 { BFD_RELOC_RX_ABS32, R_RX_ABS32 },
e8ef21bf 264 { BFD_RELOC_RX_ABS32_REV, R_RX_ABS32_REV },
c7927a3c
NC		 265 { BFD_RELOC_RX_ABS16UL, R_RX_ABS16UL },
266 { BFD_RELOC_RX_ABS16UW, R_RX_ABS16UW },
267 { BFD_RELOC_RX_ABS16U, R_RX_ABS16U }
268};
269
270#define BIGE(abfd) ((abfd)->xvec->byteorder == BFD_ENDIAN_BIG)
271
272static reloc_howto_type *
07d6d2b8 273rx_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
c7927a3c
NC		 274 bfd_reloc_code_real_type code)
275{
276 unsigned int i;
277
278 if (code == BFD_RELOC_RX_32_OP)
279 return rx_elf_howto_table + R_RX_DIR32;
280
0ba38529 281 for (i = ARRAY_SIZE (rx_reloc_map); i--;)
c7927a3c
NC		 282 if (rx_reloc_map [i].bfd_reloc_val == code)
283 return rx_elf_howto_table + rx_reloc_map[i].rx_reloc_val;
284
285 return NULL;
286}
287
288static reloc_howto_type *
289rx_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name)
290{
291 unsigned int i;
292
293 for (i = 0; i < ARRAY_SIZE (rx_elf_howto_table); i++)
294 if (rx_elf_howto_table[i].name != NULL
295 && strcasecmp (rx_elf_howto_table[i].name, r_name) == 0)
296 return rx_elf_howto_table + i;
297
298 return NULL;
299}
300
301/* Set the howto pointer for an RX ELF reloc. */
302
303static void
07d6d2b8
AM		 304rx_info_to_howto_rela (bfd * abfd ATTRIBUTE_UNUSED,
305 arelent * cache_ptr,
c7927a3c
NC		 306 Elf_Internal_Rela * dst)
307{
308 unsigned int r_type;
309
310 r_type = ELF32_R_TYPE (dst->r_info);
5860e3f8
NC		 311 if (r_type >= (unsigned int) R_RX_max)
312 {
695344c0 313 /* xgettext:c-format */
871b3ab2 314 _bfd_error_handler (_("%pB: invalid RX reloc number: %d"), abfd, r_type);
5860e3f8
NC		 315 r_type = 0;
316 }
c7927a3c
NC		 317 cache_ptr->howto = rx_elf_howto_table + r_type;
318}
319\f
320static bfd_vma
07d6d2b8 321get_symbol_value (const char * name,
c7927a3c 322 struct bfd_link_info * info,
07d6d2b8
AM		 323 bfd * input_bfd,
324 asection * input_section,
c7927a3c
NC		 325 int offset)
326{
327 bfd_vma value = 0;
328 struct bfd_link_hash_entry * h;
329
330 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
331
332 if (h == NULL
333 || (h->type != bfd_link_hash_defined
334 && h->type != bfd_link_hash_defweak))
1a72702b 335 (*info->callbacks->undefined_symbol)
c7927a3c
NC		 336 (info, name, input_bfd, input_section, offset, TRUE);
337 else
338 value = (h->u.def.value
339 + h->u.def.section->output_section->vma
340 + h->u.def.section->output_offset);
341
342 return value;
343}
1a72702b 344
7a2f2d82 345static bfd_vma
07d6d2b8 346get_symbol_value_maybe (const char * name,
7a2f2d82
DD		 347 struct bfd_link_info * info)
348{
349 bfd_vma value = 0;
350 struct bfd_link_hash_entry * h;
351
352 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE);
353
354 if (h == NULL
355 || (h->type != bfd_link_hash_defined
356 && h->type != bfd_link_hash_defweak))
357 return 0;
358 else
359 value = (h->u.def.value
360 + h->u.def.section->output_section->vma
361 + h->u.def.section->output_offset);
362
363 return value;
364}
c7927a3c
NC		 365
366static bfd_vma
07d6d2b8
AM		 367get_gp (struct bfd_link_info * info,
368 bfd * abfd,
369 asection * sec,
c7927a3c
NC		 370 int offset)
371{
372 static bfd_boolean cached = FALSE;
373 static bfd_vma cached_value = 0;
374
375 if (!cached)
376 {
1a72702b 377 cached_value = get_symbol_value ("__gp", info, abfd, sec, offset);
c7927a3c
NC		 378 cached = TRUE;
379 }
380 return cached_value;
381}
382
383static bfd_vma
1a72702b 384get_romstart (struct bfd_link_info * info,
07d6d2b8
AM		 385 bfd * abfd,
386 asection * sec,
c7927a3c
NC		 387 int offset)
388{
389 static bfd_boolean cached = FALSE;
390 static bfd_vma cached_value = 0;
391
392 if (!cached)
393 {
1a72702b 394 cached_value = get_symbol_value ("_start", info, abfd, sec, offset);
c7927a3c
NC		 395 cached = TRUE;
396 }
397 return cached_value;
398}
399
400static bfd_vma
1a72702b 401get_ramstart (struct bfd_link_info * info,
07d6d2b8
AM		 402 bfd * abfd,
403 asection * sec,
c7927a3c
NC		 404 int offset)
405{
406 static bfd_boolean cached = FALSE;
407 static bfd_vma cached_value = 0;
408
409 if (!cached)
410 {
1a72702b 411 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset);
c7927a3c
NC		 412 cached = TRUE;
413 }
414 return cached_value;
415}
416
417#define NUM_STACK_ENTRIES 16
418static int32_t rx_stack [ NUM_STACK_ENTRIES ];
419static unsigned int rx_stack_top;
420
421#define RX_STACK_PUSH(val) \
422 do \
423 { \
424 if (rx_stack_top < NUM_STACK_ENTRIES) \
07d6d2b8 425 rx_stack [rx_stack_top ++] = (val); \
c7927a3c 426 else \
07d6d2b8 427 r = bfd_reloc_dangerous; \
c7927a3c
NC		 428 } \
429 while (0)
430
431#define RX_STACK_POP(dest) \
432 do \
433 { \
434 if (rx_stack_top > 0) \
07d6d2b8 435 (dest) = rx_stack [-- rx_stack_top]; \
c7927a3c 436 else \
07d6d2b8 437 (dest) = 0, r = bfd_reloc_dangerous; \
c7927a3c
NC		 438 } \
439 while (0)
440
441/* Relocate an RX ELF section.
442 There is some attempt to make this function usable for many architectures,
443 both USE_REL and USE_RELA ['twould be nice if such a critter existed],
444 if only to serve as a learning tool.
445
446 The RELOCATE_SECTION function is called by the new ELF backend linker
447 to handle the relocations for a section.
448
449 The relocs are always passed as Rela structures; if the section
450 actually uses Rel structures, the r_addend field will always be
451 zero.
452
453 This function is responsible for adjusting the section contents as
454 necessary, and (if using Rela relocs and generating a relocatable
455 output file) adjusting the reloc addend as necessary.
456
457 This function does not have to worry about setting the reloc
458 address or the reloc symbol index.
459
460 LOCAL_SYMS is a pointer to the swapped in local symbols.
461
462 LOCAL_SECTIONS is an array giving the section in the input file
463 corresponding to the st_shndx field of each local symbol.
464
465 The global hash table entry for the global symbols can be found
466 via elf_sym_hashes (input_bfd).
467
468 When generating relocatable output, this function must handle
469 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
470 going to be the section symbol corresponding to the output
471 section, which means that the addend must be adjusted
472 accordingly. */
473
474static bfd_boolean
475rx_elf_relocate_section
07d6d2b8 476 (bfd * output_bfd,
c7927a3c 477 struct bfd_link_info * info,
07d6d2b8
AM		 478 bfd * input_bfd,
479 asection * input_section,
480 bfd_byte * contents,
c7927a3c 481 Elf_Internal_Rela * relocs,
07d6d2b8
AM		 482 Elf_Internal_Sym * local_syms,
483 asection ** local_sections)
c7927a3c 484{
07d6d2b8 485 Elf_Internal_Shdr * symtab_hdr;
c7927a3c 486 struct elf_link_hash_entry ** sym_hashes;
07d6d2b8
AM		 487 Elf_Internal_Rela * rel;
488 Elf_Internal_Rela * relend;
d4cb0ea0
NC		 489 bfd_boolean pid_mode;
490 bfd_boolean saw_subtract = FALSE;
7a2f2d82
DD		 491 const char * table_default_cache = NULL;
492 bfd_vma table_start_cache = 0;
493 bfd_vma table_end_cache = 0;
d4cb0ea0
NC		 494
495 if (elf_elfheader (output_bfd)->e_flags & E_FLAG_RX_PID)
496 pid_mode = TRUE;
497 else
498 pid_mode = FALSE;
c7927a3c
NC		 499
500 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
501 sym_hashes = elf_sym_hashes (input_bfd);
502 relend = relocs + input_section->reloc_count;
c7927a3c
NC		 503 for (rel = relocs; rel < relend; rel ++)
504 {
07d6d2b8
AM		 505 reloc_howto_type * howto;
506 unsigned long r_symndx;
507 Elf_Internal_Sym * sym;
508 asection * sec;
c7927a3c 509 struct elf_link_hash_entry * h;
07d6d2b8
AM		 510 bfd_vma relocation;
511 bfd_reloc_status_type r;
512 const char * name = NULL;
513 bfd_boolean unresolved_reloc = TRUE;
514 int r_type;
c7927a3c
NC		 515
516 r_type = ELF32_R_TYPE (rel->r_info);
517 r_symndx = ELF32_R_SYM (rel->r_info);
518
519 howto = rx_elf_howto_table + ELF32_R_TYPE (rel->r_info);
07d6d2b8 520 h = NULL;
c7927a3c
NC		 521 sym = NULL;
522 sec = NULL;
523 relocation = 0;
524
d4cb0ea0
NC		 525 if (rx_stack_top == 0)
526 saw_subtract = FALSE;
527
c7927a3c
NC		 528 if (r_symndx < symtab_hdr->sh_info)
529 {
530 sym = local_syms + r_symndx;
531 sec = local_sections [r_symndx];
532 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel);
533
534 name = bfd_elf_string_from_elf_section
535 (input_bfd, symtab_hdr->sh_link, sym->st_name);
536 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name;
537 }
538 else
539 {
62d887d4 540 bfd_boolean warned, ignored;
c7927a3c
NC		 541
542 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
543 r_symndx, symtab_hdr, sym_hashes, h,
544 sec, relocation, unresolved_reloc,
62d887d4 545 warned, ignored);
c7927a3c
NC		 546
547 name = h->root.root.string;
548 }
549
7a2f2d82
DD		 550 if (strncmp (name, "$tableentry$default$", 20) == 0)
551 {
552 bfd_vma entry_vma;
553 int idx;
554 char *buf;
7a2f2d82
DD		 555
556 if (table_default_cache != name)
557 {
558
559 /* All relocs for a given table should be to the same
560 (weak) default symbol) so we can use it to detect a
561 cache miss. We use the offset into the table to find
562 the "real" symbol. Calculate and store the table's
563 offset here. */
564
565 table_default_cache = name;
566
567 /* We have already done error checking in rx_table_find(). */
568
569 buf = (char *) malloc (13 + strlen (name + 20));
570
571 sprintf (buf, "$tablestart$%s", name + 20);
7a2f2d82 572 table_start_cache = get_symbol_value (buf,
7a2f2d82
DD		 573 info,
574 input_bfd,
575 input_section,
576 rel->r_offset);
577
578 sprintf (buf, "$tableend$%s", name + 20);
7a2f2d82 579 table_end_cache = get_symbol_value (buf,
7a2f2d82
DD		 580 info,
581 input_bfd,
582 input_section,
583 rel->r_offset);
584
585 free (buf);
586 }
587
588 entry_vma = (input_section->output_section->vma
589 + input_section->output_offset
590 + rel->r_offset);
591
592 if (table_end_cache <= entry_vma || entry_vma < table_start_cache)
593 {
695344c0 594 /* xgettext:c-format */
871b3ab2 595 _bfd_error_handler (_("%pB:%pA: table entry %s outside table"),
7a2f2d82
DD		 596 input_bfd, input_section,
597 name);
598 }
599 else if ((int) (entry_vma - table_start_cache) % 4)
600 {
695344c0 601 /* xgettext:c-format */
871b3ab2 602 _bfd_error_handler (_("%pB:%pA: table entry %s not word-aligned within table"),
7a2f2d82
DD		 603 input_bfd, input_section,
604 name);
605 }
606 else
607 {
608 idx = (int) (entry_vma - table_start_cache) / 4;
609
610 /* This will look like $tableentry$<N>$<name> */
611 buf = (char *) malloc (12 + 20 + strlen (name + 20));
612 sprintf (buf, "$tableentry$%d$%s", idx, name + 20);
613
614 h = (struct elf_link_hash_entry *) bfd_link_hash_lookup (info->hash, buf, FALSE, FALSE, TRUE);
615
616 if (h)
617 {
618 relocation = (h->root.u.def.value
619 + h->root.u.def.section->output_section->vma
620 + h->root.u.def.section->output_offset);;
621 }
622
623 free (buf);
624 }
625 }
626
dbaa2011 627 if (sec != NULL && discarded_section (sec))
e4067dbb 628 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section,
545fd46b 629 rel, 1, relend, howto, 0, contents);
c7927a3c 630
0e1862bb 631 if (bfd_link_relocatable (info))
c7927a3c
NC		 632 {
633 /* This is a relocatable link. We don't have to change
07d6d2b8
AM		 634 anything, unless the reloc is against a section symbol,
635 in which case we have to adjust according to where the
636 section symbol winds up in the output section. */
c7927a3c
NC		 637 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION)
638 rel->r_addend += sec->output_offset;
639 continue;
640 }
641
642 if (h != NULL && h->root.type == bfd_link_hash_undefweak)
643 /* If the symbol is undefined and weak
644 then the relocation resolves to zero. */
645 relocation = 0;
646 else
647 {
648 if (howto->pc_relative)
649 {
650 relocation -= (input_section->output_section->vma
651 + input_section->output_offset
652 + rel->r_offset);
653 if (r_type != R_RX_RH_3_PCREL
654 && r_type != R_RX_DIR3U_PCREL)
655 relocation ++;
656 }
657
658 relocation += rel->r_addend;
659 }
660
661 r = bfd_reloc_ok;
662
663#define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow
664#define ALIGN(m) if (relocation & m) r = bfd_reloc_other;
665#define OP(i) (contents[rel->r_offset + (i)])
666#define WARN_REDHAT(type) \
695344c0 667 /* xgettext:c-format */ \
871b3ab2 668 _bfd_error_handler (_("%pB:%pA: Warning: deprecated Red Hat reloc " type " detected against: %s."), \
c7927a3c
NC		 669 input_bfd, input_section, name)
670
d4cb0ea0
NC		 671 /* Check for unsafe relocs in PID mode. These are any relocs where
672 an absolute address is being computed. There are special cases
673 for relocs against symbols that are known to be referenced in
674 crt0.o before the PID base address register has been initialised. */
675#define UNSAFE_FOR_PID \
676 do \
677 { \
678 if (pid_mode \
07d6d2b8 679 && sec != NULL \
d4cb0ea0
NC		 680 && sec->flags & SEC_READONLY \
681 && !(input_section->flags & SEC_DEBUGGING) \
682 && strcmp (name, "__pid_base") != 0 \
683 && strcmp (name, "__gp") != 0 \
684 && strcmp (name, "__romdatastart") != 0 \
685 && !saw_subtract) \
695344c0 686 /* xgettext:c-format */ \
2dcf00ce
AM		 687 _bfd_error_handler (_("%pB(%pA): unsafe PID relocation %s " \
688 "at %#" PRIx64 " (against %s in %s)"), \
d4cb0ea0 689 input_bfd, input_section, howto->name, \
2dcf00ce
AM		 690 (uint64_t) (input_section->output_section->vma \
691 + input_section->output_offset \
692 + rel->r_offset), \
d4cb0ea0
NC		 693 name, sec->name); \
694 } \
695 while (0)
696
c7927a3c
NC		 697 /* Opcode relocs are always big endian. Data relocs are bi-endian. */
698 switch (r_type)
699 {
700 case R_RX_NONE:
701 break;
702
703 case R_RX_RH_RELAX:
704 break;
705
706 case R_RX_RH_3_PCREL:
707 WARN_REDHAT ("RX_RH_3_PCREL");
708 RANGE (3, 10);
709 OP (0) &= 0xf8;
710 OP (0) |= relocation & 0x07;
711 break;
712
713 case R_RX_RH_8_NEG:
714 WARN_REDHAT ("RX_RH_8_NEG");
715 relocation = - relocation;
1a0670f3 716 /* Fall through. */
c7927a3c 717 case R_RX_DIR8S_PCREL:
d4cb0ea0 718 UNSAFE_FOR_PID;
c7927a3c
NC		 719 RANGE (-128, 127);
720 OP (0) = relocation;
721 break;
722
723 case R_RX_DIR8S:
d4cb0ea0 724 UNSAFE_FOR_PID;
c7927a3c
NC		 725 RANGE (-128, 255);
726 OP (0) = relocation;
727 break;
728
729 case R_RX_DIR8U:
d4cb0ea0 730 UNSAFE_FOR_PID;
c7927a3c
NC		 731 RANGE (0, 255);
732 OP (0) = relocation;
733 break;
734
735 case R_RX_RH_16_NEG:
736 WARN_REDHAT ("RX_RH_16_NEG");
737 relocation = - relocation;
1a0670f3 738 /* Fall through. */
c7927a3c 739 case R_RX_DIR16S_PCREL:
d4cb0ea0 740 UNSAFE_FOR_PID;
c7927a3c
NC		 741 RANGE (-32768, 32767);
742#if RX_OPCODE_BIG_ENDIAN
743#else
744 OP (0) = relocation;
745 OP (1) = relocation >> 8;
746#endif
747 break;
748
749 case R_RX_RH_16_OP:
750 WARN_REDHAT ("RX_RH_16_OP");
d4cb0ea0 751 UNSAFE_FOR_PID;
c7927a3c
NC		 752 RANGE (-32768, 32767);
753#if RX_OPCODE_BIG_ENDIAN
754 OP (1) = relocation;
755 OP (0) = relocation >> 8;
756#else
757 OP (0) = relocation;
758 OP (1) = relocation >> 8;
759#endif
760 break;
761
762 case R_RX_DIR16S:
d4cb0ea0 763 UNSAFE_FOR_PID;
c7927a3c
NC		 764 RANGE (-32768, 65535);
765 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
766 {
767 OP (1) = relocation;
768 OP (0) = relocation >> 8;
769 }
770 else
771 {
772 OP (0) = relocation;
773 OP (1) = relocation >> 8;
774 }
775 break;
776
777 case R_RX_DIR16U:
d4cb0ea0 778 UNSAFE_FOR_PID;
c7927a3c
NC		 779 RANGE (0, 65536);
780#if RX_OPCODE_BIG_ENDIAN
781 OP (1) = relocation;
782 OP (0) = relocation >> 8;
783#else
784 OP (0) = relocation;
785 OP (1) = relocation >> 8;
786#endif
787 break;
788
789 case R_RX_DIR16:
d4cb0ea0 790 UNSAFE_FOR_PID;
c7927a3c
NC		 791 RANGE (-32768, 65536);
792#if RX_OPCODE_BIG_ENDIAN
793 OP (1) = relocation;
794 OP (0) = relocation >> 8;
795#else
796 OP (0) = relocation;
797 OP (1) = relocation >> 8;
798#endif
799 break;
800
801 case R_RX_DIR16_REV:
d4cb0ea0 802 UNSAFE_FOR_PID;
c7927a3c
NC		 803 RANGE (-32768, 65536);
804#if RX_OPCODE_BIG_ENDIAN
805 OP (0) = relocation;
806 OP (1) = relocation >> 8;
807#else
808 OP (1) = relocation;
809 OP (0) = relocation >> 8;
810#endif
811 break;
812
813 case R_RX_DIR3U_PCREL:
814 RANGE (3, 10);
815 OP (0) &= 0xf8;
816 OP (0) |= relocation & 0x07;
817 break;
818
819 case R_RX_RH_24_NEG:
d4cb0ea0 820 UNSAFE_FOR_PID;
c7927a3c
NC		 821 WARN_REDHAT ("RX_RH_24_NEG");
822 relocation = - relocation;
1a0670f3 823 /* Fall through. */
c7927a3c
NC		 824 case R_RX_DIR24S_PCREL:
825 RANGE (-0x800000, 0x7fffff);
826#if RX_OPCODE_BIG_ENDIAN
827 OP (2) = relocation;
828 OP (1) = relocation >> 8;
829 OP (0) = relocation >> 16;
830#else
831 OP (0) = relocation;
832 OP (1) = relocation >> 8;
833 OP (2) = relocation >> 16;
834#endif
835 break;
836
837 case R_RX_RH_24_OP:
d4cb0ea0 838 UNSAFE_FOR_PID;
c7927a3c
NC		 839 WARN_REDHAT ("RX_RH_24_OP");
840 RANGE (-0x800000, 0x7fffff);
841#if RX_OPCODE_BIG_ENDIAN
842 OP (2) = relocation;
843 OP (1) = relocation >> 8;
844 OP (0) = relocation >> 16;
845#else
846 OP (0) = relocation;
847 OP (1) = relocation >> 8;
848 OP (2) = relocation >> 16;
849#endif
850 break;
851
852 case R_RX_DIR24S:
d4cb0ea0 853 UNSAFE_FOR_PID;
c7927a3c
NC		 854 RANGE (-0x800000, 0x7fffff);
855 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
856 {
857 OP (2) = relocation;
858 OP (1) = relocation >> 8;
859 OP (0) = relocation >> 16;
860 }
861 else
862 {
863 OP (0) = relocation;
864 OP (1) = relocation >> 8;
865 OP (2) = relocation >> 16;
866 }
867 break;
868
869 case R_RX_RH_24_UNS:
d4cb0ea0 870 UNSAFE_FOR_PID;
c7927a3c
NC		 871 WARN_REDHAT ("RX_RH_24_UNS");
872 RANGE (0, 0xffffff);
873#if RX_OPCODE_BIG_ENDIAN
874 OP (2) = relocation;
875 OP (1) = relocation >> 8;
876 OP (0) = relocation >> 16;
877#else
878 OP (0) = relocation;
879 OP (1) = relocation >> 8;
880 OP (2) = relocation >> 16;
881#endif
882 break;
883
884 case R_RX_RH_32_NEG:
d4cb0ea0 885 UNSAFE_FOR_PID;
c7927a3c
NC		 886 WARN_REDHAT ("RX_RH_32_NEG");
887 relocation = - relocation;
888#if RX_OPCODE_BIG_ENDIAN
889 OP (3) = relocation;
890 OP (2) = relocation >> 8;
891 OP (1) = relocation >> 16;
892 OP (0) = relocation >> 24;
893#else
894 OP (0) = relocation;
895 OP (1) = relocation >> 8;
896 OP (2) = relocation >> 16;
897 OP (3) = relocation >> 24;
898#endif
899 break;
900
901 case R_RX_RH_32_OP:
d4cb0ea0 902 UNSAFE_FOR_PID;
c7927a3c
NC		 903 WARN_REDHAT ("RX_RH_32_OP");
904#if RX_OPCODE_BIG_ENDIAN
905 OP (3) = relocation;
906 OP (2) = relocation >> 8;
907 OP (1) = relocation >> 16;
908 OP (0) = relocation >> 24;
909#else
910 OP (0) = relocation;
911 OP (1) = relocation >> 8;
912 OP (2) = relocation >> 16;
913 OP (3) = relocation >> 24;
914#endif
915 break;
916
917 case R_RX_DIR32:
918 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
919 {
920 OP (3) = relocation;
921 OP (2) = relocation >> 8;
922 OP (1) = relocation >> 16;
923 OP (0) = relocation >> 24;
924 }
925 else
926 {
927 OP (0) = relocation;
928 OP (1) = relocation >> 8;
929 OP (2) = relocation >> 16;
930 OP (3) = relocation >> 24;
931 }
932 break;
933
934 case R_RX_DIR32_REV:
935 if (BIGE (output_bfd))
936 {
937 OP (0) = relocation;
938 OP (1) = relocation >> 8;
939 OP (2) = relocation >> 16;
940 OP (3) = relocation >> 24;
941 }
942 else
943 {
944 OP (3) = relocation;
945 OP (2) = relocation >> 8;
946 OP (1) = relocation >> 16;
947 OP (0) = relocation >> 24;
948 }
949 break;
950
951 case R_RX_RH_DIFF:
952 {
953 bfd_vma val;
954 WARN_REDHAT ("RX_RH_DIFF");
955 val = bfd_get_32 (output_bfd, & OP (0));
956 val -= relocation;
957 bfd_put_32 (output_bfd, val, & OP (0));
958 }
959 break;
960
961 case R_RX_RH_GPRELB:
962 WARN_REDHAT ("RX_RH_GPRELB");
1a72702b 963 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 964 RANGE (0, 65535);
965#if RX_OPCODE_BIG_ENDIAN
966 OP (1) = relocation;
967 OP (0) = relocation >> 8;
968#else
969 OP (0) = relocation;
970 OP (1) = relocation >> 8;
971#endif
972 break;
973
974 case R_RX_RH_GPRELW:
975 WARN_REDHAT ("RX_RH_GPRELW");
1a72702b 976 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 977 ALIGN (1);
978 relocation >>= 1;
979 RANGE (0, 65535);
980#if RX_OPCODE_BIG_ENDIAN
981 OP (1) = relocation;
982 OP (0) = relocation >> 8;
983#else
984 OP (0) = relocation;
985 OP (1) = relocation >> 8;
986#endif
987 break;
988
989 case R_RX_RH_GPRELL:
990 WARN_REDHAT ("RX_RH_GPRELL");
1a72702b 991 relocation -= get_gp (info, input_bfd, input_section, rel->r_offset);
c7927a3c
NC		 992 ALIGN (3);
993 relocation >>= 2;
994 RANGE (0, 65535);
995#if RX_OPCODE_BIG_ENDIAN
996 OP (1) = relocation;
997 OP (0) = relocation >> 8;
998#else
999 OP (0) = relocation;
1000 OP (1) = relocation >> 8;
1001#endif
1002 break;
1003
1004 /* Internal relocations just for relaxation: */
1005 case R_RX_RH_ABS5p5B:
1006 RX_STACK_POP (relocation);
1007 RANGE (0, 31);
1008 OP (0) &= 0xf8;
1009 OP (0) |= relocation >> 2;
1010 OP (1) &= 0x77;
1011 OP (1) |= (relocation << 6) & 0x80;
1012 OP (1) |= (relocation << 3) & 0x08;
1013 break;
1014
1015 case R_RX_RH_ABS5p5W:
1016 RX_STACK_POP (relocation);
1017 RANGE (0, 62);
1018 ALIGN (1);
1019 relocation >>= 1;
1020 OP (0) &= 0xf8;
1021 OP (0) |= relocation >> 2;
1022 OP (1) &= 0x77;
1023 OP (1) |= (relocation << 6) & 0x80;
1024 OP (1) |= (relocation << 3) & 0x08;
1025 break;
1026
1027 case R_RX_RH_ABS5p5L:
1028 RX_STACK_POP (relocation);
1029 RANGE (0, 124);
1030 ALIGN (3);
1031 relocation >>= 2;
1032 OP (0) &= 0xf8;
1033 OP (0) |= relocation >> 2;
1034 OP (1) &= 0x77;
1035 OP (1) |= (relocation << 6) & 0x80;
1036 OP (1) |= (relocation << 3) & 0x08;
1037 break;
1038
1039 case R_RX_RH_ABS5p8B:
1040 RX_STACK_POP (relocation);
1041 RANGE (0, 31);
1042 OP (0) &= 0x70;
1043 OP (0) |= (relocation << 3) & 0x80;
1044 OP (0) |= relocation & 0x0f;
1045 break;
1046
1047 case R_RX_RH_ABS5p8W:
1048 RX_STACK_POP (relocation);
1049 RANGE (0, 62);
1050 ALIGN (1);
1051 relocation >>= 1;
1052 OP (0) &= 0x70;
1053 OP (0) |= (relocation << 3) & 0x80;
1054 OP (0) |= relocation & 0x0f;
1055 break;
1056
1057 case R_RX_RH_ABS5p8L:
1058 RX_STACK_POP (relocation);
1059 RANGE (0, 124);
1060 ALIGN (3);
1061 relocation >>= 2;
1062 OP (0) &= 0x70;
1063 OP (0) |= (relocation << 3) & 0x80;
1064 OP (0) |= relocation & 0x0f;
1065 break;
1066
1067 case R_RX_RH_UIMM4p8:
1068 RANGE (0, 15);
1069 OP (0) &= 0x0f;
1070 OP (0) |= relocation << 4;
1071 break;
1072
1073 case R_RX_RH_UNEG4p8:
1074 RANGE (-15, 0);
1075 OP (0) &= 0x0f;
1076 OP (0) |= (-relocation) << 4;
1077 break;
1078
1079 /* Complex reloc handling: */
1080
1081 case R_RX_ABS32:
d4cb0ea0 1082 UNSAFE_FOR_PID;
c7927a3c
NC		 1083 RX_STACK_POP (relocation);
1084#if RX_OPCODE_BIG_ENDIAN
1085 OP (3) = relocation;
1086 OP (2) = relocation >> 8;
1087 OP (1) = relocation >> 16;
1088 OP (0) = relocation >> 24;
1089#else
1090 OP (0) = relocation;
1091 OP (1) = relocation >> 8;
1092 OP (2) = relocation >> 16;
1093 OP (3) = relocation >> 24;
1094#endif
1095 break;
1096
1097 case R_RX_ABS32_REV:
d4cb0ea0 1098 UNSAFE_FOR_PID;
c7927a3c
NC		 1099 RX_STACK_POP (relocation);
1100#if RX_OPCODE_BIG_ENDIAN
1101 OP (0) = relocation;
1102 OP (1) = relocation >> 8;
1103 OP (2) = relocation >> 16;
1104 OP (3) = relocation >> 24;
1105#else
1106 OP (3) = relocation;
1107 OP (2) = relocation >> 8;
1108 OP (1) = relocation >> 16;
1109 OP (0) = relocation >> 24;
1110#endif
1111 break;
1112
1113 case R_RX_ABS24S_PCREL:
1114 case R_RX_ABS24S:
d4cb0ea0 1115 UNSAFE_FOR_PID;
c7927a3c
NC		 1116 RX_STACK_POP (relocation);
1117 RANGE (-0x800000, 0x7fffff);
1118 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1119 {
1120 OP (2) = relocation;
1121 OP (1) = relocation >> 8;
1122 OP (0) = relocation >> 16;
1123 }
1124 else
1125 {
1126 OP (0) = relocation;
1127 OP (1) = relocation >> 8;
1128 OP (2) = relocation >> 16;
1129 }
1130 break;
1131
1132 case R_RX_ABS16:
d4cb0ea0 1133 UNSAFE_FOR_PID;
c7927a3c
NC		 1134 RX_STACK_POP (relocation);
1135 RANGE (-32768, 65535);
1136#if RX_OPCODE_BIG_ENDIAN
1137 OP (1) = relocation;
1138 OP (0) = relocation >> 8;
1139#else
1140 OP (0) = relocation;
1141 OP (1) = relocation >> 8;
1142#endif
1143 break;
1144
1145 case R_RX_ABS16_REV:
d4cb0ea0 1146 UNSAFE_FOR_PID;
c7927a3c
NC		 1147 RX_STACK_POP (relocation);
1148 RANGE (-32768, 65535);
1149#if RX_OPCODE_BIG_ENDIAN
1150 OP (0) = relocation;
1151 OP (1) = relocation >> 8;
1152#else
1153 OP (1) = relocation;
1154 OP (0) = relocation >> 8;
1155#endif
1156 break;
1157
1158 case R_RX_ABS16S_PCREL:
1159 case R_RX_ABS16S:
1160 RX_STACK_POP (relocation);
1161 RANGE (-32768, 32767);
1162 if (BIGE (output_bfd) && !(input_section->flags & SEC_CODE))
1163 {
1164 OP (1) = relocation;
1165 OP (0) = relocation >> 8;
1166 }
1167 else
1168 {
1169 OP (0) = relocation;
1170 OP (1) = relocation >> 8;
1171 }
1172 break;
1173
1174 case R_RX_ABS16U:
d4cb0ea0 1175 UNSAFE_FOR_PID;
c7927a3c
NC		 1176 RX_STACK_POP (relocation);
1177 RANGE (0, 65536);
1178#if RX_OPCODE_BIG_ENDIAN
1179 OP (1) = relocation;
1180 OP (0) = relocation >> 8;
1181#else
1182 OP (0) = relocation;
1183 OP (1) = relocation >> 8;
1184#endif
1185 break;
1186
1187 case R_RX_ABS16UL:
d4cb0ea0 1188 UNSAFE_FOR_PID;
c7927a3c
NC		 1189 RX_STACK_POP (relocation);
1190 relocation >>= 2;
1191 RANGE (0, 65536);
1192#if RX_OPCODE_BIG_ENDIAN
1193 OP (1) = relocation;
1194 OP (0) = relocation >> 8;
1195#else
1196 OP (0) = relocation;
1197 OP (1) = relocation >> 8;
1198#endif
1199 break;
1200
1201 case R_RX_ABS16UW:
d4cb0ea0 1202 UNSAFE_FOR_PID;
c7927a3c
NC		 1203 RX_STACK_POP (relocation);
1204 relocation >>= 1;
1205 RANGE (0, 65536);
1206#if RX_OPCODE_BIG_ENDIAN
1207 OP (1) = relocation;
1208 OP (0) = relocation >> 8;
1209#else
1210 OP (0) = relocation;
1211 OP (1) = relocation >> 8;
1212#endif
1213 break;
1214
1215 case R_RX_ABS8:
d4cb0ea0 1216 UNSAFE_FOR_PID;
c7927a3c
NC		 1217 RX_STACK_POP (relocation);
1218 RANGE (-128, 255);
1219 OP (0) = relocation;
1220 break;
1221
1222 case R_RX_ABS8U:
d4cb0ea0 1223 UNSAFE_FOR_PID;
c7927a3c
NC		 1224 RX_STACK_POP (relocation);
1225 RANGE (0, 255);
1226 OP (0) = relocation;
1227 break;
1228
1229 case R_RX_ABS8UL:
d4cb0ea0 1230 UNSAFE_FOR_PID;
c7927a3c
NC		 1231 RX_STACK_POP (relocation);
1232 relocation >>= 2;
1233 RANGE (0, 255);
1234 OP (0) = relocation;
1235 break;
1236
1237 case R_RX_ABS8UW:
d4cb0ea0 1238 UNSAFE_FOR_PID;
c7927a3c
NC		 1239 RX_STACK_POP (relocation);
1240 relocation >>= 1;
1241 RANGE (0, 255);
1242 OP (0) = relocation;
1243 break;
1244
c7927a3c 1245 case R_RX_ABS8S:
d4cb0ea0 1246 UNSAFE_FOR_PID;
1a0670f3 1247 /* Fall through. */
d4cb0ea0 1248 case R_RX_ABS8S_PCREL:
c7927a3c
NC		 1249 RX_STACK_POP (relocation);
1250 RANGE (-128, 127);
1251 OP (0) = relocation;
1252 break;
1253
1254 case R_RX_SYM:
1255 if (r_symndx < symtab_hdr->sh_info)
1256 RX_STACK_PUSH (sec->output_section->vma
1257 + sec->output_offset
d4cb0ea0
NC		 1258 + sym->st_value
1259 + rel->r_addend);
c7927a3c
NC		 1260 else
1261 {
1262 if (h != NULL
1263 && (h->root.type == bfd_link_hash_defined
1264 || h->root.type == bfd_link_hash_defweak))
1265 RX_STACK_PUSH (h->root.u.def.value
1266 + sec->output_section->vma
d4cb0ea0
NC		 1267 + sec->output_offset
1268 + rel->r_addend);
c7927a3c
NC		 1269 else
1270 _bfd_error_handler (_("Warning: RX_SYM reloc with an unknown symbol"));
1271 }
1272 break;
1273
1274 case R_RX_OPneg:
1275 {
1276 int32_t tmp;
1277
ee181c72 1278 saw_subtract = TRUE;
c7927a3c
NC		 1279 RX_STACK_POP (tmp);
1280 tmp = - tmp;
1281 RX_STACK_PUSH (tmp);
1282 }
1283 break;
1284
1285 case R_RX_OPadd:
1286 {
1287 int32_t tmp1, tmp2;
1288
1289 RX_STACK_POP (tmp1);
1290 RX_STACK_POP (tmp2);
1291 tmp1 += tmp2;
1292 RX_STACK_PUSH (tmp1);
1293 }
1294 break;
1295
1296 case R_RX_OPsub:
1297 {
1298 int32_t tmp1, tmp2;
1299
d4cb0ea0 1300 saw_subtract = TRUE;
c7927a3c
NC		 1301 RX_STACK_POP (tmp1);
1302 RX_STACK_POP (tmp2);
1303 tmp2 -= tmp1;
1304 RX_STACK_PUSH (tmp2);
1305 }
1306 break;
1307
1308 case R_RX_OPmul:
1309 {
1310 int32_t tmp1, tmp2;
1311
1312 RX_STACK_POP (tmp1);
1313 RX_STACK_POP (tmp2);
1314 tmp1 *= tmp2;
1315 RX_STACK_PUSH (tmp1);
1316 }
1317 break;
1318
1319 case R_RX_OPdiv:
1320 {
1321 int32_t tmp1, tmp2;
1322
1323 RX_STACK_POP (tmp1);
1324 RX_STACK_POP (tmp2);
1325 tmp1 /= tmp2;
1326 RX_STACK_PUSH (tmp1);
1327 }
1328 break;
1329
1330 case R_RX_OPshla:
1331 {
1332 int32_t tmp1, tmp2;
1333
1334 RX_STACK_POP (tmp1);
1335 RX_STACK_POP (tmp2);
1336 tmp1 <<= tmp2;
1337 RX_STACK_PUSH (tmp1);
1338 }
1339 break;
1340
1341 case R_RX_OPshra:
1342 {
1343 int32_t tmp1, tmp2;
1344
1345 RX_STACK_POP (tmp1);
1346 RX_STACK_POP (tmp2);
1347 tmp1 >>= tmp2;
1348 RX_STACK_PUSH (tmp1);
1349 }
1350 break;
1351
1352 case R_RX_OPsctsize:
1353 RX_STACK_PUSH (input_section->size);
1354 break;
1355
1356 case R_RX_OPscttop:
1357 RX_STACK_PUSH (input_section->output_section->vma);
1358 break;
1359
1360 case R_RX_OPand:
1361 {
1362 int32_t tmp1, tmp2;
1363
1364 RX_STACK_POP (tmp1);
1365 RX_STACK_POP (tmp2);
1366 tmp1 &= tmp2;
1367 RX_STACK_PUSH (tmp1);
1368 }
1369 break;
1370
1371 case R_RX_OPor:
1372 {
1373 int32_t tmp1, tmp2;
1374
1375 RX_STACK_POP (tmp1);
1376 RX_STACK_POP (tmp2);
1377 tmp1 |= tmp2;
1378 RX_STACK_PUSH (tmp1);
1379 }
1380 break;
1381
1382 case R_RX_OPxor:
1383 {
1384 int32_t tmp1, tmp2;
1385
1386 RX_STACK_POP (tmp1);
1387 RX_STACK_POP (tmp2);
1388 tmp1 ^= tmp2;
1389 RX_STACK_PUSH (tmp1);
1390 }
1391 break;
1392
1393 case R_RX_OPnot:
1394 {
1395 int32_t tmp;
1396
1397 RX_STACK_POP (tmp);
1398 tmp = ~ tmp;
1399 RX_STACK_PUSH (tmp);
1400 }
1401 break;
1402
1403 case R_RX_OPmod:
1404 {
1405 int32_t tmp1, tmp2;
1406
1407 RX_STACK_POP (tmp1);
1408 RX_STACK_POP (tmp2);
1409 tmp1 %= tmp2;
1410 RX_STACK_PUSH (tmp1);
1411 }
1412 break;
1413
1414 case R_RX_OPromtop:
1a72702b 1415 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1416 break;
1417
1418 case R_RX_OPramtop:
1a72702b 1419 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1420 break;
1421
1422 default:
1423 r = bfd_reloc_notsupported;
1424 break;
1425 }
1426
1427 if (r != bfd_reloc_ok)
1428 {
1429 const char * msg = NULL;
1430
1431 switch (r)
1432 {
1433 case bfd_reloc_overflow:
1434 /* Catch the case of a missing function declaration
1435 and emit a more helpful error message. */
1436 if (r_type == R_RX_DIR24S_PCREL)
695344c0 1437 /* xgettext:c-format */
871b3ab2 1438 msg = _("%pB(%pA): error: call to undefined function '%s'");
c7927a3c 1439 else
1a72702b 1440 (*info->callbacks->reloc_overflow)
c7927a3c
NC		 1441 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0,
1442 input_bfd, input_section, rel->r_offset);
1443 break;
1444
1445 case bfd_reloc_undefined:
1a72702b
AM		 1446 (*info->callbacks->undefined_symbol)
1447 (info, name, input_bfd, input_section, rel->r_offset, TRUE);
c7927a3c
NC		 1448 break;
1449
1450 case bfd_reloc_other:
695344c0 1451 /* xgettext:c-format */
871b3ab2 1452 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area");
c7927a3c
NC		 1453 break;
1454
1455 case bfd_reloc_outofrange:
695344c0 1456 /* xgettext:c-format */
871b3ab2 1457 msg = _("%pB(%pA): internal error: out of range error");
c7927a3c
NC		 1458 break;
1459
1460 case bfd_reloc_notsupported:
695344c0 1461 /* xgettext:c-format */
871b3ab2 1462 msg = _("%pB(%pA): internal error: unsupported relocation error");
c7927a3c
NC		 1463 break;
1464
1465 case bfd_reloc_dangerous:
695344c0 1466 /* xgettext:c-format */
871b3ab2 1467 msg = _("%pB(%pA): internal error: dangerous relocation");
c7927a3c
NC		 1468 break;
1469
1470 default:
695344c0 1471 /* xgettext:c-format */
871b3ab2 1472 msg = _("%pB(%pA): internal error: unknown error");
c7927a3c
NC		 1473 break;
1474 }
1475
1476 if (msg)
1477 _bfd_error_handler (msg, input_bfd, input_section, name);
c7927a3c
NC		 1478 }
1479 }
1480
1481 return TRUE;
1482}
1483\f
1484/* Relaxation Support. */
1485
1486/* Progression of relocations from largest operand size to smallest
1487 operand size. */
1488
1489static int
1490next_smaller_reloc (int r)
1491{
1492 switch (r)
1493 {
1494 case R_RX_DIR32: return R_RX_DIR24S;
1495 case R_RX_DIR24S: return R_RX_DIR16S;
1496 case R_RX_DIR16S: return R_RX_DIR8S;
1497 case R_RX_DIR8S: return R_RX_NONE;
1498
1499 case R_RX_DIR16: return R_RX_DIR8;
1500 case R_RX_DIR8: return R_RX_NONE;
1501
1502 case R_RX_DIR16U: return R_RX_DIR8U;
1503 case R_RX_DIR8U: return R_RX_NONE;
1504
1505 case R_RX_DIR24S_PCREL: return R_RX_DIR16S_PCREL;
1506 case R_RX_DIR16S_PCREL: return R_RX_DIR8S_PCREL;
1507 case R_RX_DIR8S_PCREL: return R_RX_DIR3U_PCREL;
1508
1509 case R_RX_DIR16UL: return R_RX_DIR8UL;
1510 case R_RX_DIR8UL: return R_RX_NONE;
1511 case R_RX_DIR16UW: return R_RX_DIR8UW;
1512 case R_RX_DIR8UW: return R_RX_NONE;
1513
1514 case R_RX_RH_32_OP: return R_RX_RH_24_OP;
1515 case R_RX_RH_24_OP: return R_RX_RH_16_OP;
1516 case R_RX_RH_16_OP: return R_RX_DIR8;
1517
1518 case R_RX_ABS32: return R_RX_ABS24S;
1519 case R_RX_ABS24S: return R_RX_ABS16S;
1520 case R_RX_ABS16: return R_RX_ABS8;
1521 case R_RX_ABS16U: return R_RX_ABS8U;
1522 case R_RX_ABS16S: return R_RX_ABS8S;
1523 case R_RX_ABS8: return R_RX_NONE;
1524 case R_RX_ABS8U: return R_RX_NONE;
1525 case R_RX_ABS8S: return R_RX_NONE;
1526 case R_RX_ABS24S_PCREL: return R_RX_ABS16S_PCREL;
1527 case R_RX_ABS16S_PCREL: return R_RX_ABS8S_PCREL;
1528 case R_RX_ABS8S_PCREL: return R_RX_NONE;
1529 case R_RX_ABS16UL: return R_RX_ABS8UL;
1530 case R_RX_ABS16UW: return R_RX_ABS8UW;
1531 case R_RX_ABS8UL: return R_RX_NONE;
1532 case R_RX_ABS8UW: return R_RX_NONE;
1533 }
1534 return r;
1535};
1536
1537/* Delete some bytes from a section while relaxing. */
1538
1539static bfd_boolean
1540elf32_rx_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count,
5ee4a06a
NC		 1541 Elf_Internal_Rela *alignment_rel, int force_snip,
1542 Elf_Internal_Rela *irelstart)
c7927a3c
NC		 1543{
1544 Elf_Internal_Shdr * symtab_hdr;
07d6d2b8
AM		 1545 unsigned int sec_shndx;
1546 bfd_byte * contents;
c7927a3c
NC		 1547 Elf_Internal_Rela * irel;
1548 Elf_Internal_Rela * irelend;
c7927a3c
NC		 1549 Elf_Internal_Sym * isym;
1550 Elf_Internal_Sym * isymend;
07d6d2b8
AM		 1551 bfd_vma toaddr;
1552 unsigned int symcount;
c7927a3c
NC		 1553 struct elf_link_hash_entry ** sym_hashes;
1554 struct elf_link_hash_entry ** end_hashes;
1555
1556 if (!alignment_rel)
1557 force_snip = 1;
1558
1559 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
1560
1561 contents = elf_section_data (sec)->this_hdr.contents;
1562
1563 /* The deletion must stop at the next alignment boundary, if
1564 ALIGNMENT_REL is non-NULL. */
c7927a3c
NC		 1565 toaddr = sec->size;
1566 if (alignment_rel)
1567 toaddr = alignment_rel->r_offset;
1568
07d6d2b8 1569 BFD_ASSERT (toaddr > addr);
9c761a55 1570
c7927a3c
NC		 1571 /* Actually delete the bytes. */
1572 memmove (contents + addr, contents + addr + count,
1573 (size_t) (toaddr - addr - count));
1574
1575 /* If we don't have an alignment marker to worry about, we can just
1576 shrink the section. Otherwise, we have to fill in the newly
1577 created gap with NOP insns (0x03). */
1578 if (force_snip)
1579 sec->size -= count;
1580 else
1581 memset (contents + toaddr - count, 0x03, count);
1582
5ee4a06a
NC		 1583 irel = irelstart;
1584 BFD_ASSERT (irel != NULL || sec->reloc_count == 0);
1585 irelend = irel + sec->reloc_count;
1586
c7927a3c 1587 /* Adjust all the relocs. */
9c761a55 1588 for (; irel < irelend; irel++)
c7927a3c
NC		 1589 {
1590 /* Get the new reloc address. */
1591 if (irel->r_offset > addr
1592 && (irel->r_offset < toaddr
1593 || (force_snip && irel->r_offset == toaddr)))
1594 irel->r_offset -= count;
1595
1596 /* If we see an ALIGN marker at the end of the gap, we move it
1597 to the beginning of the gap, since marking these gaps is what
1598 they're for. */
1599 if (irel->r_offset == toaddr
1600 && ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
1601 && irel->r_addend & RX_RELAXA_ALIGN)
1602 irel->r_offset -= count;
1603 }
1604
1605 /* Adjust the local symbols defined in this section. */
1606 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
1607 isym = (Elf_Internal_Sym *) symtab_hdr->contents;
1608 isymend = isym + symtab_hdr->sh_info;
1609
1610 for (; isym < isymend; isym++)
1611 {
1612 /* If the symbol is in the range of memory we just moved, we
1613 have to adjust its value. */
1614 if (isym->st_shndx == sec_shndx
1615 && isym->st_value > addr
1616 && isym->st_value < toaddr)
1617 isym->st_value -= count;
1618
1619 /* If the symbol *spans* the bytes we just deleted (i.e. it's
1620 *end* is in the moved bytes but it's *start* isn't), then we
1621 must adjust its size. */
1622 if (isym->st_shndx == sec_shndx
1623 && isym->st_value < addr
1624 && isym->st_value + isym->st_size > addr
1625 && isym->st_value + isym->st_size < toaddr)
1626 isym->st_size -= count;
1627 }
1628
1629 /* Now adjust the global symbols defined in this section. */
1630 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
1631 - symtab_hdr->sh_info);
1632 sym_hashes = elf_sym_hashes (abfd);
1633 end_hashes = sym_hashes + symcount;
1634
1635 for (; sym_hashes < end_hashes; sym_hashes++)
1636 {
1637 struct elf_link_hash_entry *sym_hash = *sym_hashes;
1638
1639 if ((sym_hash->root.type == bfd_link_hash_defined
1640 || sym_hash->root.type == bfd_link_hash_defweak)
1641 && sym_hash->root.u.def.section == sec)
1642 {
1643 /* As above, adjust the value if needed. */
1644 if (sym_hash->root.u.def.value > addr
1645 && sym_hash->root.u.def.value < toaddr)
1646 sym_hash->root.u.def.value -= count;
1647
1648 /* As above, adjust the size if needed. */
1649 if (sym_hash->root.u.def.value < addr
1650 && sym_hash->root.u.def.value + sym_hash->size > addr
1651 && sym_hash->root.u.def.value + sym_hash->size < toaddr)
1652 sym_hash->size -= count;
1653 }
1654 }
1655
1656 return TRUE;
1657}
1658
1659/* Used to sort relocs by address. If relocs have the same address,
1660 we maintain their relative order, except that R_RX_RH_RELAX
1661 alignment relocs must be the first reloc for any given address. */
1662
1663static void
1664reloc_bubblesort (Elf_Internal_Rela * r, int count)
1665{
1666 int i;
1667 bfd_boolean again;
1668 bfd_boolean swappit;
1669
1670 /* This is almost a classic bubblesort. It's the slowest sort, but
1671 we're taking advantage of the fact that the relocations are
1672 mostly in order already (the assembler emits them that way) and
1673 we need relocs with the same address to remain in the same
1674 relative order. */
1675 again = TRUE;
1676 while (again)
1677 {
1678 again = FALSE;
1679 for (i = 0; i < count - 1; i ++)
1680 {
1681 if (r[i].r_offset > r[i + 1].r_offset)
1682 swappit = TRUE;
1683 else if (r[i].r_offset < r[i + 1].r_offset)
1684 swappit = FALSE;
1685 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1686 && (r[i + 1].r_addend & RX_RELAXA_ALIGN))
1687 swappit = TRUE;
1688 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RX_RH_RELAX
1689 && (r[i + 1].r_addend & RX_RELAXA_ELIGN)
1690 && !(ELF32_R_TYPE (r[i].r_info) == R_RX_RH_RELAX
1691 && (r[i].r_addend & RX_RELAXA_ALIGN)))
1692 swappit = TRUE;
1693 else
1694 swappit = FALSE;
1695
1696 if (swappit)
1697 {
1698 Elf_Internal_Rela tmp;
1699
1700 tmp = r[i];
1701 r[i] = r[i + 1];
1702 r[i + 1] = tmp;
1703 /* If we do move a reloc back, re-scan to see if it
1704 needs to be moved even further back. This avoids
1705 most of the O(n^2) behavior for our cases. */
1706 if (i > 0)
1707 i -= 2;
1708 again = TRUE;
1709 }
1710 }
1711 }
1712}
1713
1714
1715#define OFFSET_FOR_RELOC(rel, lrel, scale) \
1716 rx_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \
1717 lrel, abfd, sec, link_info, scale)
1718
1719static bfd_vma
07d6d2b8 1720rx_offset_for_reloc (bfd * abfd,
c7927a3c
NC		 1721 Elf_Internal_Rela * rel,
1722 Elf_Internal_Shdr * symtab_hdr,
c7e2358a 1723 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED,
07d6d2b8 1724 Elf_Internal_Sym * intsyms,
c7927a3c 1725 Elf_Internal_Rela ** lrel,
07d6d2b8
AM		 1726 bfd * input_bfd,
1727 asection * input_section,
c7927a3c 1728 struct bfd_link_info * info,
07d6d2b8 1729 int * scale)
c7927a3c
NC		 1730{
1731 bfd_vma symval;
1732 bfd_reloc_status_type r;
1733
1734 *scale = 1;
1735
1736 /* REL is the first of 1..N relocations. We compute the symbol
1737 value for each relocation, then combine them if needed. LREL
1738 gets a pointer to the last relocation used. */
1739 while (1)
1740 {
1741 int32_t tmp1, tmp2;
1742
1743 /* Get the value of the symbol referred to by the reloc. */
1744 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info)
1745 {
1746 /* A local symbol. */
1747 Elf_Internal_Sym *isym;
c7927a3c
NC		 1748 asection *ssec;
1749
1750 isym = intsyms + ELF32_R_SYM (rel->r_info);
1751
1752 if (isym->st_shndx == SHN_UNDEF)
1753 ssec = bfd_und_section_ptr;
1754 else if (isym->st_shndx == SHN_ABS)
1755 ssec = bfd_abs_section_ptr;
1756 else if (isym->st_shndx == SHN_COMMON)
1757 ssec = bfd_com_section_ptr;
1758 else
1759 ssec = bfd_section_from_elf_index (abfd,
1760 isym->st_shndx);
1761
c7927a3c
NC		 1762 /* Initial symbol value. */
1763 symval = isym->st_value;
1764
1765 /* GAS may have made this symbol relative to a section, in
1766 which case, we have to add the addend to find the
1767 symbol. */
1768 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION)
1769 symval += rel->r_addend;
1770
1771 if (ssec)
1772 {
1773 if ((ssec->flags & SEC_MERGE)
dbaa2011 1774 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE)
c7927a3c
NC		 1775 symval = _bfd_merged_section_offset (abfd, & ssec,
1776 elf_section_data (ssec)->sec_info,
1777 symval);
1778 }
1779
1780 /* Now make the offset relative to where the linker is putting it. */
1781 if (ssec)
1782 symval +=
1783 ssec->output_section->vma + ssec->output_offset;
1784
1785 symval += rel->r_addend;
1786 }
1787 else
1788 {
1789 unsigned long indx;
1790 struct elf_link_hash_entry * h;
1791
1792 /* An external symbol. */
1793 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info;
1794 h = elf_sym_hashes (abfd)[indx];
1795 BFD_ASSERT (h != NULL);
1796
1797 if (h->root.type != bfd_link_hash_defined
1798 && h->root.type != bfd_link_hash_defweak)
1799 {
1800 /* This appears to be a reference to an undefined
1801 symbol. Just ignore it--it will be caught by the
1802 regular reloc processing. */
1803 if (lrel)
1804 *lrel = rel;
1805 return 0;
1806 }
1807
1808 symval = (h->root.u.def.value
1809 + h->root.u.def.section->output_section->vma
1810 + h->root.u.def.section->output_offset);
1811
1812 symval += rel->r_addend;
1813 }
1814
1815 switch (ELF32_R_TYPE (rel->r_info))
1816 {
1817 case R_RX_SYM:
1818 RX_STACK_PUSH (symval);
1819 break;
1820
1821 case R_RX_OPneg:
1822 RX_STACK_POP (tmp1);
1823 tmp1 = - tmp1;
1824 RX_STACK_PUSH (tmp1);
1825 break;
1826
1827 case R_RX_OPadd:
1828 RX_STACK_POP (tmp1);
1829 RX_STACK_POP (tmp2);
1830 tmp1 += tmp2;
1831 RX_STACK_PUSH (tmp1);
1832 break;
1833
1834 case R_RX_OPsub:
1835 RX_STACK_POP (tmp1);
1836 RX_STACK_POP (tmp2);
1837 tmp2 -= tmp1;
1838 RX_STACK_PUSH (tmp2);
1839 break;
1840
1841 case R_RX_OPmul:
1842 RX_STACK_POP (tmp1);
1843 RX_STACK_POP (tmp2);
1844 tmp1 *= tmp2;
1845 RX_STACK_PUSH (tmp1);
1846 break;
1847
1848 case R_RX_OPdiv:
1849 RX_STACK_POP (tmp1);
1850 RX_STACK_POP (tmp2);
1851 tmp1 /= tmp2;
1852 RX_STACK_PUSH (tmp1);
1853 break;
1854
1855 case R_RX_OPshla:
1856 RX_STACK_POP (tmp1);
1857 RX_STACK_POP (tmp2);
1858 tmp1 <<= tmp2;
1859 RX_STACK_PUSH (tmp1);
1860 break;
1861
1862 case R_RX_OPshra:
1863 RX_STACK_POP (tmp1);
1864 RX_STACK_POP (tmp2);
1865 tmp1 >>= tmp2;
1866 RX_STACK_PUSH (tmp1);
1867 break;
1868
1869 case R_RX_OPsctsize:
1870 RX_STACK_PUSH (input_section->size);
1871 break;
1872
1873 case R_RX_OPscttop:
1874 RX_STACK_PUSH (input_section->output_section->vma);
1875 break;
1876
1877 case R_RX_OPand:
1878 RX_STACK_POP (tmp1);
1879 RX_STACK_POP (tmp2);
1880 tmp1 &= tmp2;
1881 RX_STACK_PUSH (tmp1);
1882 break;
1883
1884 case R_RX_OPor:
1885 RX_STACK_POP (tmp1);
1886 RX_STACK_POP (tmp2);
1887 tmp1 |= tmp2;
1888 RX_STACK_PUSH (tmp1);
1889 break;
1890
1891 case R_RX_OPxor:
1892 RX_STACK_POP (tmp1);
1893 RX_STACK_POP (tmp2);
1894 tmp1 ^= tmp2;
1895 RX_STACK_PUSH (tmp1);
1896 break;
1897
1898 case R_RX_OPnot:
1899 RX_STACK_POP (tmp1);
1900 tmp1 = ~ tmp1;
1901 RX_STACK_PUSH (tmp1);
1902 break;
1903
1904 case R_RX_OPmod:
1905 RX_STACK_POP (tmp1);
1906 RX_STACK_POP (tmp2);
1907 tmp1 %= tmp2;
1908 RX_STACK_PUSH (tmp1);
1909 break;
1910
1911 case R_RX_OPromtop:
1a72702b 1912 RX_STACK_PUSH (get_romstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1913 break;
1914
1915 case R_RX_OPramtop:
1a72702b 1916 RX_STACK_PUSH (get_ramstart (info, input_bfd, input_section, rel->r_offset));
c7927a3c
NC		 1917 break;
1918
1919 case R_RX_DIR16UL:
1920 case R_RX_DIR8UL:
1921 case R_RX_ABS16UL:
1922 case R_RX_ABS8UL:
1923 if (rx_stack_top)
1924 RX_STACK_POP (symval);
1925 if (lrel)
1926 *lrel = rel;
1927 *scale = 4;
1928 return symval;
1929
1930 case R_RX_DIR16UW:
1931 case R_RX_DIR8UW:
1932 case R_RX_ABS16UW:
1933 case R_RX_ABS8UW:
1934 if (rx_stack_top)
1935 RX_STACK_POP (symval);
1936 if (lrel)
1937 *lrel = rel;
1938 *scale = 2;
1939 return symval;
1940
1941 default:
1942 if (rx_stack_top)
1943 RX_STACK_POP (symval);
1944 if (lrel)
1945 *lrel = rel;
1946 return symval;
1947 }
1948
1949 rel ++;
1950 }
1a72702b
AM		 1951 /* FIXME. */
1952 (void) r;
c7927a3c
NC		 1953}
1954
1955static void
1956move_reloc (Elf_Internal_Rela * irel, Elf_Internal_Rela * srel, int delta)
1957{
1958 bfd_vma old_offset = srel->r_offset;
1959
1960 irel ++;
1961 while (irel <= srel)
1962 {
1963 if (irel->r_offset == old_offset)
1964 irel->r_offset += delta;
1965 irel ++;
1966 }
1967}
1968
1969/* Relax one section. */
1970
1971static bfd_boolean
07d6d2b8
AM		 1972elf32_rx_relax_section (bfd * abfd,
1973 asection * sec,
c7927a3c 1974 struct bfd_link_info * link_info,
07d6d2b8
AM		 1975 bfd_boolean * again,
1976 bfd_boolean allow_pcrel3)
c7927a3c
NC		 1977{
1978 Elf_Internal_Shdr * symtab_hdr;
1979 Elf_Internal_Shdr * shndx_hdr;
1980 Elf_Internal_Rela * internal_relocs;
c7927a3c
NC		 1981 Elf_Internal_Rela * irel;
1982 Elf_Internal_Rela * srel;
1983 Elf_Internal_Rela * irelend;
1984 Elf_Internal_Rela * next_alignment;
1985 Elf_Internal_Rela * prev_alignment;
07d6d2b8
AM		 1986 bfd_byte * contents = NULL;
1987 bfd_byte * free_contents = NULL;
c7927a3c
NC		 1988 Elf_Internal_Sym * intsyms = NULL;
1989 Elf_Internal_Sym * free_intsyms = NULL;
1990 Elf_External_Sym_Shndx * shndx_buf = NULL;
1991 bfd_vma pc;
1992 bfd_vma sec_start;
c7927a3c
NC		 1993 bfd_vma symval = 0;
1994 int pcrel = 0;
1995 int code = 0;
1996 int section_alignment_glue;
1997 /* how much to scale the relocation by - 1, 2, or 4. */
1998 int scale;
1999
2000 /* Assume nothing changes. */
2001 *again = FALSE;
2002
2003 /* We don't have to do anything for a relocatable link, if
2004 this section does not have relocs, or if this is not a
2005 code section. */
0e1862bb 2006 if (bfd_link_relocatable (link_info)
c7927a3c
NC		 2007 || (sec->flags & SEC_RELOC) == 0
2008 || sec->reloc_count == 0
2009 || (sec->flags & SEC_CODE) == 0)
2010 return TRUE;
2011
6a40cf0c
NC		 2012 symtab_hdr = & elf_symtab_hdr (abfd);
2013 if (elf_symtab_shndx_list (abfd))
2014 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr;
2015 else
2016 shndx_hdr = NULL;
c7927a3c
NC		 2017
2018 sec_start = sec->output_section->vma + sec->output_offset;
c7927a3c
NC		 2019
2020 /* Get the section contents. */
2021 if (elf_section_data (sec)->this_hdr.contents != NULL)
2022 contents = elf_section_data (sec)->this_hdr.contents;
2023 /* Go get them off disk. */
2024 else
2025 {
2026 if (! bfd_malloc_and_get_section (abfd, sec, &contents))
2027 goto error_return;
2028 elf_section_data (sec)->this_hdr.contents = contents;
2029 }
2030
2031 /* Read this BFD's symbols. */
2032 /* Get cached copy if it exists. */
2033 if (symtab_hdr->contents != NULL)
2034 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents;
2035 else
2036 {
2037 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL);
2038 symtab_hdr->contents = (bfd_byte *) intsyms;
2039 }
2040
6a40cf0c 2041 if (shndx_hdr && shndx_hdr->sh_size != 0)
c7927a3c
NC		 2042 {
2043 bfd_size_type amt;
2044
2045 amt = symtab_hdr->sh_info;
2046 amt *= sizeof (Elf_External_Sym_Shndx);
2047 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt);
2048 if (shndx_buf == NULL)
2049 goto error_return;
2050 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0
2c3fc389 2051 || bfd_bread (shndx_buf, amt, abfd) != amt)
c7927a3c
NC		 2052 goto error_return;
2053 shndx_hdr->contents = (bfd_byte *) shndx_buf;
2054 }
2055
2056 /* Get a copy of the native relocations. */
5ee4a06a
NC		 2057 /* Note - we ignore the setting of link_info->keep_memory when reading
2058 in these relocs. We have to maintain a permanent copy of the relocs
2059 because we are going to walk over them multiple times, adjusting them
2060 as bytes are deleted from the section, and with this relaxation
2061 function itself being called multiple times on the same section... */
2062 internal_relocs = _bfd_elf_link_read_relocs
2063 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, TRUE);
c7927a3c
NC		 2064 if (internal_relocs == NULL)
2065 goto error_return;
c7927a3c
NC		 2066
2067 /* The RL_ relocs must be just before the operand relocs they go
2068 with, so we must sort them to guarantee this. We use bubblesort
2069 instead of qsort so we can guarantee that relocs with the same
2070 address remain in the same relative order. */
2071 reloc_bubblesort (internal_relocs, sec->reloc_count);
2072
2073 /* Walk through them looking for relaxing opportunities. */
2074 irelend = internal_relocs + sec->reloc_count;
2075
2076 /* This will either be NULL or a pointer to the next alignment
2077 relocation. */
2078 next_alignment = internal_relocs;
2079 /* This will be the previous alignment, although at first it points
2080 to the first real relocation. */
2081 prev_alignment = internal_relocs;
2082
2083 /* We calculate worst case shrinkage caused by alignment directives.
2084 No fool-proof, but better than either ignoring the problem or
2085 doing heavy duty analysis of all the alignment markers in all
2086 input sections. */
2087 section_alignment_glue = 0;
2088 for (irel = internal_relocs; irel < irelend; irel++)
2089 if (ELF32_R_TYPE (irel->r_info) == R_RX_RH_RELAX
2090 && irel->r_addend & RX_RELAXA_ALIGN)
2091 {
2092 int this_glue = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2093
2094 if (section_alignment_glue < this_glue)
2095 section_alignment_glue = this_glue;
2096 }
2097 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte
2098 shrinkage. */
2099 section_alignment_glue *= 2;
2100
2101 for (irel = internal_relocs; irel < irelend; irel++)
2102 {
2103 unsigned char *insn;
2104 int nrelocs;
2105
2106 /* The insns we care about are all marked with one of these. */
2107 if (ELF32_R_TYPE (irel->r_info) != R_RX_RH_RELAX)
2108 continue;
2109
2110 if (irel->r_addend & RX_RELAXA_ALIGN
2111 || next_alignment == internal_relocs)
2112 {
2113 /* When we delete bytes, we need to maintain all the alignments
2114 indicated. In addition, we need to be careful about relaxing
2115 jumps across alignment boundaries - these displacements
2116 *grow* when we delete bytes. For now, don't shrink
2117 displacements across an alignment boundary, just in case.
2118 Note that this only affects relocations to the same
2119 section. */
2120 prev_alignment = next_alignment;
2121 next_alignment += 2;
2122 while (next_alignment < irelend
2123 && (ELF32_R_TYPE (next_alignment->r_info) != R_RX_RH_RELAX
2124 || !(next_alignment->r_addend & RX_RELAXA_ELIGN)))
2125 next_alignment ++;
2126 if (next_alignment >= irelend || next_alignment->r_offset == 0)
2127 next_alignment = NULL;
2128 }
2129
2130 /* When we hit alignment markers, see if we've shrunk enough
2131 before them to reduce the gap without violating the alignment
2132 requirements. */
2133 if (irel->r_addend & RX_RELAXA_ALIGN)
2134 {
2135 /* At this point, the next relocation *should* be the ELIGN
2136 end marker. */
2137 Elf_Internal_Rela *erel = irel + 1;
2138 unsigned int alignment, nbytes;
2139
2140 if (ELF32_R_TYPE (erel->r_info) != R_RX_RH_RELAX)
2141 continue;
2142 if (!(erel->r_addend & RX_RELAXA_ELIGN))
2143 continue;
2144
2145 alignment = 1 << (irel->r_addend & RX_RELAXA_ANUM);
2146
2147 if (erel->r_offset - irel->r_offset < alignment)
2148 continue;
2149
2150 nbytes = erel->r_offset - irel->r_offset;
2151 nbytes /= alignment;
2152 nbytes *= alignment;
2153
2154 elf32_rx_relax_delete_bytes (abfd, sec, erel->r_offset-nbytes, nbytes, next_alignment,
5ee4a06a 2155 erel->r_offset == sec->size, internal_relocs);
c7927a3c
NC		 2156 *again = TRUE;
2157
2158 continue;
2159 }
2160
2161 if (irel->r_addend & RX_RELAXA_ELIGN)
2162 continue;
2163
2164 insn = contents + irel->r_offset;
2165
2166 nrelocs = irel->r_addend & RX_RELAXA_RNUM;
2167
2168 /* At this point, we have an insn that is a candidate for linker
2169 relaxation. There are NRELOCS relocs following that may be
2170 relaxed, although each reloc may be made of more than one
2171 reloc entry (such as gp-rel symbols). */
2172
2173 /* Get the value of the symbol referred to by the reloc. Just
07d6d2b8
AM		 2174 in case this is the last reloc in the list, use the RL's
2175 addend to choose between this reloc (no addend) or the next
2176 (yes addend, which means at least one following reloc). */
c7927a3c
NC		 2177
2178 /* srel points to the "current" reloction for this insn -
2179 actually the last reloc for a given operand, which is the one
2180 we need to update. We check the relaxations in the same
2181 order that the relocations happen, so we'll just push it
2182 along as we go. */
2183 srel = irel;
2184
2185 pc = sec->output_section->vma + sec->output_offset
2186 + srel->r_offset;
2187
2188#define GET_RELOC \
2189 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \
2190 pcrel = symval - pc + srel->r_addend; \
2191 nrelocs --;
2192
2193#define SNIPNR(offset, nbytes) \
5ee4a06a 2194 elf32_rx_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0, internal_relocs);
c7927a3c 2195#define SNIP(offset, nbytes, newtype) \
07d6d2b8 2196 SNIPNR (offset, nbytes); \
c7927a3c
NC		 2197 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype)
2198
2199 /* The order of these bit tests must match the order that the
2200 relocs appear in. Since we sorted those by offset, we can
2201 predict them. */
2202
2203 /* Note that the numbers in, say, DSP6 are the bit offsets of
2204 the code fields that describe the operand. Bits number 0 for
2205 the MSB of insn[0]. */
2206
2207 /* DSP* codes:
2208 0 00 [reg]
2209 1 01 dsp:8[reg]
2210 2 10 dsp:16[reg]
2211 3 11 reg */
2212 if (irel->r_addend & RX_RELAXA_DSP6)
2213 {
2214 GET_RELOC;
2215
2216 code = insn[0] & 3;
2217 if (code == 2 && symval/scale <= 255)
2218 {
2219 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2220 insn[0] &= 0xfc;
2221 insn[0] |= 0x01;
2222 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2223 if (newrel != ELF32_R_TYPE (srel->r_info))
2224 {
2225 SNIP (3, 1, newrel);
2226 *again = TRUE;
2227 }
2228 }
2229
2230 else if (code == 1 && symval == 0)
2231 {
2232 insn[0] &= 0xfc;
2233 SNIP (2, 1, R_RX_NONE);
2234 *again = TRUE;
2235 }
2236
2237 /* Special case DSP:5 format: MOV.bwl dsp:5[Rsrc],Rdst. */
2238 else if (code == 1 && symval/scale <= 31
2239 /* Decodable bits. */
2240 && (insn[0] & 0xcc) == 0xcc
91d6fa6a 2241 /* Width. */
eb8c5f3f 2242 && (insn[0] & 0x30) != 0x30
91d6fa6a 2243 /* Register MSBs. */
c7927a3c
NC		 2244 && (insn[1] & 0x88) == 0x00)
2245 {
2246 int newrel = 0;
2247
2248 insn[0] = 0x88 | (insn[0] & 0x30);
2249 /* The register fields are in the right place already. */
2250
2251 /* We can't relax this new opcode. */
2252 irel->r_addend = 0;
2253
2254 switch ((insn[0] & 0x30) >> 4)
2255 {
2256 case 0:
2257 newrel = R_RX_RH_ABS5p5B;
2258 break;
2259 case 1:
2260 newrel = R_RX_RH_ABS5p5W;
2261 break;
2262 case 2:
2263 newrel = R_RX_RH_ABS5p5L;
2264 break;
2265 }
2266
2267 move_reloc (irel, srel, -2);
2268 SNIP (2, 1, newrel);
2269 }
2270
2271 /* Special case DSP:5 format: MOVU.bw dsp:5[Rsrc],Rdst. */
2272 else if (code == 1 && symval/scale <= 31
2273 /* Decodable bits. */
2274 && (insn[0] & 0xf8) == 0x58
2275 /* Register MSBs. */
2276 && (insn[1] & 0x88) == 0x00)
2277 {
2278 int newrel = 0;
2279
2280 insn[0] = 0xb0 | ((insn[0] & 0x04) << 1);
2281 /* The register fields are in the right place already. */
2282
2283 /* We can't relax this new opcode. */
2284 irel->r_addend = 0;
2285
2286 switch ((insn[0] & 0x08) >> 3)
2287 {
2288 case 0:
2289 newrel = R_RX_RH_ABS5p5B;
2290 break;
2291 case 1:
2292 newrel = R_RX_RH_ABS5p5W;
2293 break;
2294 }
2295
2296 move_reloc (irel, srel, -2);
2297 SNIP (2, 1, newrel);
2298 }
2299 }
2300
2301 /* A DSP4 operand always follows a DSP6 operand, even if there's
2302 no relocation for it. We have to read the code out of the
2303 opcode to calculate the offset of the operand. */
2304 if (irel->r_addend & RX_RELAXA_DSP4)
2305 {
2306 int code6, offset = 0;
2307
2308 GET_RELOC;
2309
2310 code6 = insn[0] & 0x03;
2311 switch (code6)
2312 {
2313 case 0: offset = 2; break;
2314 case 1: offset = 3; break;
2315 case 2: offset = 4; break;
2316 case 3: offset = 2; break;
2317 }
2318
2319 code = (insn[0] & 0x0c) >> 2;
2320
2321 if (code == 2 && symval / scale <= 255)
2322 {
2323 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2324
2325 insn[0] &= 0xf3;
2326 insn[0] |= 0x04;
2327 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2328 if (newrel != ELF32_R_TYPE (srel->r_info))
2329 {
2330 SNIP (offset+1, 1, newrel);
2331 *again = TRUE;
2332 }
2333 }
2334
2335 else if (code == 1 && symval == 0)
2336 {
2337 insn[0] &= 0xf3;
2338 SNIP (offset, 1, R_RX_NONE);
2339 *again = TRUE;
2340 }
2341 /* Special case DSP:5 format: MOV.bwl Rsrc,dsp:5[Rdst] */
2342 else if (code == 1 && symval/scale <= 31
2343 /* Decodable bits. */
2344 && (insn[0] & 0xc3) == 0xc3
2345 /* Width. */
eb8c5f3f 2346 && (insn[0] & 0x30) != 0x30
c7927a3c
NC		 2347 /* Register MSBs. */
2348 && (insn[1] & 0x88) == 0x00)
2349 {
2350 int newrel = 0;
2351
2352 insn[0] = 0x80 | (insn[0] & 0x30);
2353 /* The register fields are in the right place already. */
2354
2355 /* We can't relax this new opcode. */
2356 irel->r_addend = 0;
2357
2358 switch ((insn[0] & 0x30) >> 4)
2359 {
2360 case 0:
2361 newrel = R_RX_RH_ABS5p5B;
2362 break;
2363 case 1:
2364 newrel = R_RX_RH_ABS5p5W;
2365 break;
2366 case 2:
2367 newrel = R_RX_RH_ABS5p5L;
2368 break;
2369 }
2370
2371 move_reloc (irel, srel, -2);
2372 SNIP (2, 1, newrel);
2373 }
2374 }
2375
2376 /* These always occur alone, but the offset depends on whether
2377 it's a MEMEX opcode (0x06) or not. */
2378 if (irel->r_addend & RX_RELAXA_DSP14)
2379 {
2380 int offset;
2381 GET_RELOC;
2382
2383 if (insn[0] == 0x06)
2384 offset = 3;
2385 else
2386 offset = 4;
2387
2388 code = insn[1] & 3;
2389
2390 if (code == 2 && symval / scale <= 255)
2391 {
2392 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2393
2394 insn[1] &= 0xfc;
2395 insn[1] |= 0x01;
2396 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2397 if (newrel != ELF32_R_TYPE (srel->r_info))
2398 {
2399 SNIP (offset, 1, newrel);
2400 *again = TRUE;
2401 }
2402 }
2403 else if (code == 1 && symval == 0)
2404 {
2405 insn[1] &= 0xfc;
2406 SNIP (offset, 1, R_RX_NONE);
2407 *again = TRUE;
2408 }
2409 }
2410
2411 /* IMM* codes:
2412 0 00 imm:32
2413 1 01 simm:8
2414 2 10 simm:16
2415 3 11 simm:24. */
2416
2417 /* These always occur alone. */
2418 if (irel->r_addend & RX_RELAXA_IMM6)
2419 {
2420 long ssymval;
2421
2422 GET_RELOC;
2423
2424 /* These relocations sign-extend, so we must do signed compares. */
2425 ssymval = (long) symval;
2426
2427 code = insn[0] & 0x03;
2428
2429 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2430 {
2431 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2432
2433 insn[0] &= 0xfc;
2434 insn[0] |= 0x03;
2435 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2436 if (newrel != ELF32_R_TYPE (srel->r_info))
2437 {
2438 SNIP (2, 1, newrel);
2439 *again = TRUE;
2440 }
2441 }
2442
2443 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2444 {
2445 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2446
2447 insn[0] &= 0xfc;
2448 insn[0] |= 0x02;
2449 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2450 if (newrel != ELF32_R_TYPE (srel->r_info))
2451 {
2452 SNIP (2, 1, newrel);
2453 *again = TRUE;
2454 }
2455 }
2456
2457 /* Special case UIMM8 format: CMP #uimm8,Rdst. */
2458 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2459 /* Decodable bits. */
2460 && (insn[0] & 0xfc) == 0x74
2461 /* Decodable bits. */
2462 && ((insn[1] & 0xf0) == 0x00))
2463 {
2464 int newrel;
2465
2466 insn[0] = 0x75;
2467 insn[1] = 0x50 | (insn[1] & 0x0f);
2468
2469 /* We can't relax this new opcode. */
2470 irel->r_addend = 0;
2471
2472 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2473 newrel = R_RX_ABS8U;
2474 else
2475 newrel = R_RX_DIR8U;
2476
2477 SNIP (2, 1, newrel);
2478 *again = TRUE;
2479 }
2480
2481 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2482 {
2483 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2484
2485 insn[0] &= 0xfc;
2486 insn[0] |= 0x01;
2487 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2488 if (newrel != ELF32_R_TYPE (srel->r_info))
2489 {
2490 SNIP (2, 1, newrel);
2491 *again = TRUE;
2492 }
2493 }
2494
2495 /* Special case UIMM4 format: CMP, MUL, AND, OR. */
2496 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2497 /* Decodable bits and immediate type. */
2498 && insn[0] == 0x75
2499 /* Decodable bits. */
2500 && (insn[1] & 0xc0) == 0x00)
2501 {
2502 static const int newop[4] = { 1, 3, 4, 5 };
2503
2504 insn[0] = 0x60 | newop[insn[1] >> 4];
2505 /* The register number doesn't move. */
2506
2507 /* We can't relax this new opcode. */
2508 irel->r_addend = 0;
2509
2510 move_reloc (irel, srel, -1);
2511
2512 SNIP (2, 1, R_RX_RH_UIMM4p8);
2513 *again = TRUE;
2514 }
2515
2516 /* Special case UIMM4 format: ADD -> ADD/SUB. */
2517 else if (code == 1 && ssymval <= 15 && ssymval >= -15
2518 /* Decodable bits and immediate type. */
2519 && insn[0] == 0x71
2520 /* Same register for source and destination. */
2521 && ((insn[1] >> 4) == (insn[1] & 0x0f)))
2522 {
2523 int newrel;
2524
2525 /* Note that we can't turn "add $0,Rs" into a NOP
2526 because the flags need to be set right. */
2527
2528 if (ssymval < 0)
2529 {
2530 insn[0] = 0x60; /* Subtract. */
2531 newrel = R_RX_RH_UNEG4p8;
2532 }
2533 else
2534 {
2535 insn[0] = 0x62; /* Add. */
2536 newrel = R_RX_RH_UIMM4p8;
2537 }
2538
2539 /* The register number is in the right place. */
2540
2541 /* We can't relax this new opcode. */
2542 irel->r_addend = 0;
2543
2544 move_reloc (irel, srel, -1);
2545
2546 SNIP (2, 1, newrel);
2547 *again = TRUE;
2548 }
2549 }
2550
2551 /* These are either matched with a DSP6 (2-byte base) or an id24
2552 (3-byte base). */
2553 if (irel->r_addend & RX_RELAXA_IMM12)
2554 {
2555 int dspcode, offset = 0;
2556 long ssymval;
2557
2558 GET_RELOC;
2559
2560 if ((insn[0] & 0xfc) == 0xfc)
2561 dspcode = 1; /* Just something with one byte operand. */
2562 else
2563 dspcode = insn[0] & 3;
2564 switch (dspcode)
2565 {
2566 case 0: offset = 2; break;
2567 case 1: offset = 3; break;
2568 case 2: offset = 4; break;
2569 case 3: offset = 2; break;
2570 }
2571
2572 /* These relocations sign-extend, so we must do signed compares. */
2573 ssymval = (long) symval;
2574
2575 code = (insn[1] >> 2) & 3;
2576 if (code == 0 && ssymval <= 8388607 && ssymval >= -8388608)
2577 {
2578 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2579
2580 insn[1] &= 0xf3;
2581 insn[1] |= 0x0c;
2582 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2583 if (newrel != ELF32_R_TYPE (srel->r_info))
2584 {
2585 SNIP (offset, 1, newrel);
2586 *again = TRUE;
2587 }
2588 }
2589
2590 else if (code == 3 && ssymval <= 32767 && ssymval >= -32768)
2591 {
2592 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2593
2594 insn[1] &= 0xf3;
2595 insn[1] |= 0x08;
2596 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2597 if (newrel != ELF32_R_TYPE (srel->r_info))
2598 {
2599 SNIP (offset, 1, newrel);
2600 *again = TRUE;
2601 }
2602 }
2603
2604 /* Special case UIMM8 format: MOV #uimm8,Rdst. */
2605 else if (code == 2 && ssymval <= 255 && ssymval >= 16
2606 /* Decodable bits. */
2607 && insn[0] == 0xfb
2608 /* Decodable bits. */
2609 && ((insn[1] & 0x03) == 0x02))
2610 {
2611 int newrel;
2612
2613 insn[0] = 0x75;
2614 insn[1] = 0x40 | (insn[1] >> 4);
2615
2616 /* We can't relax this new opcode. */
2617 irel->r_addend = 0;
2618
2619 if (STACK_REL_P (ELF32_R_TYPE (srel->r_info)))
2620 newrel = R_RX_ABS8U;
2621 else
2622 newrel = R_RX_DIR8U;
2623
2624 SNIP (2, 1, newrel);
2625 *again = TRUE;
2626 }
2627
2628 else if (code == 2 && ssymval <= 127 && ssymval >= -128)
2629 {
2630 unsigned int newrel = ELF32_R_TYPE(srel->r_info);
2631
2632 insn[1] &= 0xf3;
2633 insn[1] |= 0x04;
2634 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2635 if (newrel != ELF32_R_TYPE(srel->r_info))
2636 {
2637 SNIP (offset, 1, newrel);
2638 *again = TRUE;
2639 }
2640 }
2641
2642 /* Special case UIMM4 format: MOV #uimm4,Rdst. */
2643 else if (code == 1 && ssymval <= 15 && ssymval >= 0
2644 /* Decodable bits. */
2645 && insn[0] == 0xfb
2646 /* Decodable bits. */
2647 && ((insn[1] & 0x03) == 0x02))
2648 {
2649 insn[0] = 0x66;
2650 insn[1] = insn[1] >> 4;
2651
2652 /* We can't relax this new opcode. */
2653 irel->r_addend = 0;
2654
2655 move_reloc (irel, srel, -1);
2656
2657 SNIP (2, 1, R_RX_RH_UIMM4p8);
2658 *again = TRUE;
2659 }
2660 }
2661
2662 if (irel->r_addend & RX_RELAXA_BRA)
2663 {
2664 unsigned int newrel = ELF32_R_TYPE (srel->r_info);
2665 int max_pcrel3 = 4;
2666 int alignment_glue = 0;
2667
2668 GET_RELOC;
2669
2670 /* Branches over alignment chunks are problematic, as
2671 deleting bytes here makes the branch *further* away. We
2672 can be agressive with branches within this alignment
2673 block, but not branches outside it. */
2674 if ((prev_alignment == NULL
2675 || symval < (bfd_vma)(sec_start + prev_alignment->r_offset))
2676 && (next_alignment == NULL
2677 || symval > (bfd_vma)(sec_start + next_alignment->r_offset)))
2678 alignment_glue = section_alignment_glue;
2679
2680 if (ELF32_R_TYPE(srel[1].r_info) == R_RX_RH_RELAX
2681 && srel[1].r_addend & RX_RELAXA_BRA
2682 && srel[1].r_offset < irel->r_offset + pcrel)
2683 max_pcrel3 ++;
2684
2685 newrel = next_smaller_reloc (ELF32_R_TYPE (srel->r_info));
2686
2687 /* The values we compare PCREL with are not what you'd
2688 expect; they're off by a little to compensate for (1)
2689 where the reloc is relative to the insn, and (2) how much
2690 the insn is going to change when we relax it. */
2691
2692 /* These we have to decode. */
2693 switch (insn[0])
2694 {
2695 case 0x04: /* BRA pcdsp:24 */
2696 if (-32768 + alignment_glue <= pcrel
2697 && pcrel <= 32765 - alignment_glue)
2698 {
2699 insn[0] = 0x38;
2700 SNIP (3, 1, newrel);
2701 *again = TRUE;
2702 }
2703 break;
2704
2705 case 0x38: /* BRA pcdsp:16 */
2706 if (-128 + alignment_glue <= pcrel
2707 && pcrel <= 127 - alignment_glue)
2708 {
2709 insn[0] = 0x2e;
2710 SNIP (2, 1, newrel);
2711 *again = TRUE;
2712 }
2713 break;
2714
2715 case 0x2e: /* BRA pcdsp:8 */
2716 /* Note that there's a risk here of shortening things so
2717 much that we no longer fit this reloc; it *should*
2718 only happen when you branch across a branch, and that
2719 branch also devolves into BRA.S. "Real" code should
2720 be OK. */
2721 if (max_pcrel3 + alignment_glue <= pcrel
2722 && pcrel <= 10 - alignment_glue
2723 && allow_pcrel3)
2724 {
2725 insn[0] = 0x08;
2726 SNIP (1, 1, newrel);
2727 move_reloc (irel, srel, -1);
2728 *again = TRUE;
2729 }
2730 break;
2731
2732 case 0x05: /* BSR pcdsp:24 */
2733 if (-32768 + alignment_glue <= pcrel
2734 && pcrel <= 32765 - alignment_glue)
2735 {
2736 insn[0] = 0x39;
2737 SNIP (1, 1, newrel);
2738 *again = TRUE;
2739 }
2740 break;
2741
2742 case 0x3a: /* BEQ.W pcdsp:16 */
2743 case 0x3b: /* BNE.W pcdsp:16 */
2744 if (-128 + alignment_glue <= pcrel
2745 && pcrel <= 127 - alignment_glue)
2746 {
2747 insn[0] = 0x20 | (insn[0] & 1);
2748 SNIP (1, 1, newrel);
2749 *again = TRUE;
2750 }
2751 break;
2752
2753 case 0x20: /* BEQ.B pcdsp:8 */
2754 case 0x21: /* BNE.B pcdsp:8 */
2755 if (max_pcrel3 + alignment_glue <= pcrel
2756 && pcrel - alignment_glue <= 10
2757 && allow_pcrel3)
2758 {
2759 insn[0] = 0x10 | ((insn[0] & 1) << 3);
2760 SNIP (1, 1, newrel);
2761 move_reloc (irel, srel, -1);
2762 *again = TRUE;
2763 }
2764 break;
2765
2766 case 0x16: /* synthetic BNE dsp24 */
2767 case 0x1e: /* synthetic BEQ dsp24 */
2768 if (-32767 + alignment_glue <= pcrel
2769 && pcrel <= 32766 - alignment_glue
2770 && insn[1] == 0x04)
2771 {
2772 if (insn[0] == 0x16)
2773 insn[0] = 0x3b;
2774 else
2775 insn[0] = 0x3a;
2776 /* We snip out the bytes at the end else the reloc
2777 will get moved too, and too much. */
2778 SNIP (3, 2, newrel);
2779 move_reloc (irel, srel, -1);
2780 *again = TRUE;
2781 }
2782 break;
2783 }
2784
2785 /* Special case - synthetic conditional branches, pcrel24.
2786 Note that EQ and NE have been handled above. */
2787 if ((insn[0] & 0xf0) == 0x20
2788 && insn[1] == 0x06
2789 && insn[2] == 0x04
2790 && srel->r_offset != irel->r_offset + 1
2791 && -32767 + alignment_glue <= pcrel
2792 && pcrel <= 32766 - alignment_glue)
2793 {
2794 insn[1] = 0x05;
2795 insn[2] = 0x38;
2796 SNIP (5, 1, newrel);
2797 *again = TRUE;
2798 }
2799
2800 /* Special case - synthetic conditional branches, pcrel16 */
2801 if ((insn[0] & 0xf0) == 0x20
2802 && insn[1] == 0x05
2803 && insn[2] == 0x38
2804 && srel->r_offset != irel->r_offset + 1
2805 && -127 + alignment_glue <= pcrel
2806 && pcrel <= 126 - alignment_glue)
2807 {
2808 int cond = (insn[0] & 0x0f) ^ 0x01;
2809
2810 insn[0] = 0x20 | cond;
2811 /* By moving the reloc first, we avoid having
2812 delete_bytes move it also. */
2813 move_reloc (irel, srel, -2);
2814 SNIP (2, 3, newrel);
2815 *again = TRUE;
2816 }
2817 }
2818
2819 BFD_ASSERT (nrelocs == 0);
2820
2821 /* Special case - check MOV.bwl #IMM, dsp[reg] and see if we can
2822 use MOV.bwl #uimm:8, dsp:5[r7] format. This is tricky
2823 because it may have one or two relocations. */
2824 if ((insn[0] & 0xfc) == 0xf8
2825 && (insn[1] & 0x80) == 0x00
2826 && (insn[0] & 0x03) != 0x03)
2827 {
2828 int dcode, icode, reg, ioff, dscale, ilen;
2829 bfd_vma disp_val = 0;
2830 long imm_val = 0;
2831 Elf_Internal_Rela * disp_rel = 0;
2832 Elf_Internal_Rela * imm_rel = 0;
2833
2834 /* Reset this. */
2835 srel = irel;
2836
2837 dcode = insn[0] & 0x03;
2838 icode = (insn[1] >> 2) & 0x03;
2839 reg = (insn[1] >> 4) & 0x0f;
2840
2841 ioff = dcode == 1 ? 3 : dcode == 2 ? 4 : 2;
2842
2843 /* Figure out what the dispacement is. */
2844 if (dcode == 1 || dcode == 2)
2845 {
2846 /* There's a displacement. See if there's a reloc for it. */
2847 if (srel[1].r_offset == irel->r_offset + 2)
2848 {
2849 GET_RELOC;
2850 disp_val = symval;
2851 disp_rel = srel;
2852 }
2853 else
2854 {
2855 if (dcode == 1)
2856 disp_val = insn[2];
2857 else
2858 {
2859#if RX_OPCODE_BIG_ENDIAN
2860 disp_val = insn[2] * 256 + insn[3];
2861#else
2862 disp_val = insn[2] + insn[3] * 256;
2863#endif
2864 }
2865 switch (insn[1] & 3)
2866 {
2867 case 1:
2868 disp_val *= 2;
2869 scale = 2;
2870 break;
2871 case 2:
2872 disp_val *= 4;
2873 scale = 4;
2874 break;
2875 }
2876 }
2877 }
2878
2879 dscale = scale;
2880
2881 /* Figure out what the immediate is. */
2882 if (srel[1].r_offset == irel->r_offset + ioff)
2883 {
2884 GET_RELOC;
2885 imm_val = (long) symval;
2886 imm_rel = srel;
2887 }
2888 else
2889 {
2890 unsigned char * ip = insn + ioff;
2891
2892 switch (icode)
2893 {
2894 case 1:
2895 /* For byte writes, we don't sign extend. Makes the math easier later. */
2896 if (scale == 1)
2897 imm_val = ip[0];
2898 else
2899 imm_val = (char) ip[0];
2900 break;
2901 case 2:
2902#if RX_OPCODE_BIG_ENDIAN
2903 imm_val = ((char) ip[0] << 8) | ip[1];
2904#else
2905 imm_val = ((char) ip[1] << 8) | ip[0];
2906#endif
2907 break;
2908 case 3:
2909#if RX_OPCODE_BIG_ENDIAN
2910 imm_val = ((char) ip[0] << 16) | (ip[1] << 8) | ip[2];
2911#else
2912 imm_val = ((char) ip[2] << 16) | (ip[1] << 8) | ip[0];
2913#endif
2914 break;
2915 case 0:
2916#if RX_OPCODE_BIG_ENDIAN
2917 imm_val = (ip[0] << 24) | (ip[1] << 16) | (ip[2] << 8) | ip[3];
2918#else
2919 imm_val = (ip[3] << 24) | (ip[2] << 16) | (ip[1] << 8) | ip[0];
2920#endif
2921 break;
2922 }
2923 }
2924
2925 ilen = 2;
2926
2927 switch (dcode)
2928 {
2929 case 1:
2930 ilen += 1;
2931 break;
2932 case 2:
2933 ilen += 2;
2934 break;
2935 }
2936
2937 switch (icode)
2938 {
2939 case 1:
2940 ilen += 1;
2941 break;
2942 case 2:
2943 ilen += 2;
2944 break;
2945 case 3:
2946 ilen += 3;
2947 break;
2948 case 4:
2949 ilen += 4;
2950 break;
2951 }
2952
2953 /* The shortcut happens when the immediate is 0..255,
2954 register r0 to r7, and displacement (scaled) 0..31. */
2955
2956 if (0 <= imm_val && imm_val <= 255
2957 && 0 <= reg && reg <= 7
2958 && disp_val / dscale <= 31)
2959 {
2960 insn[0] = 0x3c | (insn[1] & 0x03);
2961 insn[1] = (((disp_val / dscale) << 3) & 0x80) | (reg << 4) | ((disp_val/dscale) & 0x0f);
2962 insn[2] = imm_val;
2963
2964 if (disp_rel)
2965 {
2966 int newrel = R_RX_NONE;
2967
2968 switch (dscale)
2969 {
2970 case 1:
2971 newrel = R_RX_RH_ABS5p8B;
2972 break;
2973 case 2:
2974 newrel = R_RX_RH_ABS5p8W;
2975 break;
2976 case 4:
2977 newrel = R_RX_RH_ABS5p8L;
2978 break;
2979 }
2980 disp_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (disp_rel->r_info), newrel);
2981 move_reloc (irel, disp_rel, -1);
2982 }
2983 if (imm_rel)
2984 {
2985 imm_rel->r_info = ELF32_R_INFO (ELF32_R_SYM (imm_rel->r_info), R_RX_DIR8U);
2986 move_reloc (disp_rel ? disp_rel : irel,
2987 imm_rel,
2988 irel->r_offset - imm_rel->r_offset + 2);
2989 }
2990
2991 SNIPNR (3, ilen - 3);
2992 *again = TRUE;
2993
2994 /* We can't relax this new opcode. */
2995 irel->r_addend = 0;
2996 }
2997 }
2998 }
2999
3000 /* We can't reliably relax branches to DIR3U_PCREL unless we know
3001 whatever they're branching over won't shrink any more. If we're
3002 basically done here, do one more pass just for branches - but
3003 don't request a pass after that one! */
3004 if (!*again && !allow_pcrel3)
3005 {
3006 bfd_boolean ignored;
3007
3008 elf32_rx_relax_section (abfd, sec, link_info, &ignored, TRUE);
3009 }
3010
3011 return TRUE;
3012
3013 error_return:
c7927a3c
NC		 3014 if (free_contents != NULL)
3015 free (free_contents);
3016
3017 if (shndx_buf != NULL)
3018 {
3019 shndx_hdr->contents = NULL;
3020 free (shndx_buf);
3021 }
3022
3023 if (free_intsyms != NULL)
3024 free (free_intsyms);
3025
3026 return FALSE;
3027}
3028
3029static bfd_boolean
07d6d2b8
AM		 3030elf32_rx_relax_section_wrapper (bfd * abfd,
3031 asection * sec,
c7927a3c 3032 struct bfd_link_info * link_info,
07d6d2b8 3033 bfd_boolean * again)
c7927a3c
NC		 3034{
3035 return elf32_rx_relax_section (abfd, sec, link_info, again, FALSE);
3036}
3037\f
3038/* Function to set the ELF flag bits. */
3039
3040static bfd_boolean
3041rx_elf_set_private_flags (bfd * abfd, flagword flags)
3042{
3043 elf_elfheader (abfd)->e_flags = flags;
3044 elf_flags_init (abfd) = TRUE;
3045 return TRUE;
3046}
3047
3048static bfd_boolean no_warn_mismatch = FALSE;
84bff83f 3049static bfd_boolean ignore_lma = TRUE;
c7927a3c 3050
84bff83f 3051void bfd_elf32_rx_set_target_flags (bfd_boolean, bfd_boolean);
c7927a3c
NC		 3052
3053void
84bff83f
NC		 3054bfd_elf32_rx_set_target_flags (bfd_boolean user_no_warn_mismatch,
3055 bfd_boolean user_ignore_lma)
c7927a3c
NC		 3056{
3057 no_warn_mismatch = user_no_warn_mismatch;
84bff83f 3058 ignore_lma = user_ignore_lma;
c7927a3c
NC		 3059}
3060
708e2187
NC		 3061/* Converts FLAGS into a descriptive string.
3062 Returns a static pointer. */
3063
3064static const char *
3065describe_flags (flagword flags)
3066{
3067 static char buf [128];
3068
3069 buf[0] = 0;
3070
3071 if (flags & E_FLAG_RX_64BIT_DOUBLES)
3072 strcat (buf, "64-bit doubles");
3073 else
3074 strcat (buf, "32-bit doubles");
3075
3076 if (flags & E_FLAG_RX_DSP)
3077 strcat (buf, ", dsp");
3078 else
3079 strcat (buf, ", no dsp");
3080
3081 if (flags & E_FLAG_RX_PID)
3082 strcat (buf, ", pid");
3083 else
3084 strcat (buf, ", no pid");
3085
3086 if (flags & E_FLAG_RX_ABI)
3087 strcat (buf, ", RX ABI");
3088 else
3089 strcat (buf, ", GCC ABI");
3090
3525236c
NC		 3091 if (flags & E_FLAG_RX_SINSNS_SET)
3092 strcat (buf, flags & E_FLAG_RX_SINSNS_YES ? ", uses String instructions" : ", bans String instructions");
3093
708e2187
NC		 3094 return buf;
3095}
3096
c7927a3c
NC		 3097/* Merge backend specific data from an object file to the output
3098 object file when linking. */
3099
3100static bfd_boolean
50e03d47 3101rx_elf_merge_private_bfd_data (bfd * ibfd, struct bfd_link_info *info)
c7927a3c 3102{
50e03d47 3103 bfd *obfd = info->output_bfd;
c7927a3c
NC		 3104 flagword old_flags;
3105 flagword new_flags;
3106 bfd_boolean error = FALSE;
3107
3108 new_flags = elf_elfheader (ibfd)->e_flags;
3109 old_flags = elf_elfheader (obfd)->e_flags;
3110
3111 if (!elf_flags_init (obfd))
3112 {
3113 /* First call, no flags set. */
3114 elf_flags_init (obfd) = TRUE;
3115 elf_elfheader (obfd)->e_flags = new_flags;
3116 }
3117 else if (old_flags != new_flags)
3118 {
708e2187
NC		 3119 flagword known_flags;
3120
3525236c
NC		 3121 if (old_flags & E_FLAG_RX_SINSNS_SET)
3122 {
3123 if ((new_flags & E_FLAG_RX_SINSNS_SET) == 0)
3124 {
3125 new_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3126 new_flags |= (old_flags & E_FLAG_RX_SINSNS_MASK);
3127 }
3128 }
3129 else if (new_flags & E_FLAG_RX_SINSNS_SET)
3130 {
3131 old_flags &= ~ E_FLAG_RX_SINSNS_MASK;
3132 old_flags |= (new_flags & E_FLAG_RX_SINSNS_MASK);
3133 }
3134
708e2187 3135 known_flags = E_FLAG_RX_ABI | E_FLAG_RX_64BIT_DOUBLES
3525236c 3136 | E_FLAG_RX_DSP | E_FLAG_RX_PID | E_FLAG_RX_SINSNS_MASK;
c7927a3c
NC		 3137
3138 if ((old_flags ^ new_flags) & known_flags)
3139 {
3140 /* Only complain if flag bits we care about do not match.
3141 Other bits may be set, since older binaries did use some
3142 deprecated flags. */
3143 if (no_warn_mismatch)
3144 {
3145 elf_elfheader (obfd)->e_flags = (new_flags | old_flags) & known_flags;
3146 }
3147 else
3148 {
dae82561 3149 _bfd_error_handler (_("There is a conflict merging the"
871b3ab2 3150 " ELF header flags from %pB"),
dae82561 3151 ibfd);
695344c0 3152 _bfd_error_handler (_(" the input file's flags: %s"),
708e2187 3153 describe_flags (new_flags));
695344c0 3154 _bfd_error_handler (_(" the output file's flags: %s"),
708e2187 3155 describe_flags (old_flags));
c7927a3c
NC		 3156 error = TRUE;
3157 }
3158 }
3159 else
3160 elf_elfheader (obfd)->e_flags = new_flags & known_flags;
3161 }
3162
3163 if (error)
3164 bfd_set_error (bfd_error_bad_value);
3165
3166 return !error;
3167}
3168\f
3169static bfd_boolean
3170rx_elf_print_private_bfd_data (bfd * abfd, void * ptr)
3171{
3172 FILE * file = (FILE *) ptr;
3173 flagword flags;
3174
3175 BFD_ASSERT (abfd != NULL && ptr != NULL);
3176
3177 /* Print normal ELF private data. */
3178 _bfd_elf_print_private_bfd_data (abfd, ptr);
3179
3180 flags = elf_elfheader (abfd)->e_flags;
3181 fprintf (file, _("private flags = 0x%lx:"), (long) flags);
3182
6d8a3ede 3183 fprintf (file, "%s", describe_flags (flags));
c7927a3c
NC		 3184 return TRUE;
3185}
3186
3187/* Return the MACH for an e_flags value. */
3188
3189static int
708e2187 3190elf32_rx_machine (bfd * abfd ATTRIBUTE_UNUSED)
c7927a3c 3191{
708e2187
NC		 3192#if 0 /* FIXME: EF_RX_CPU_MASK collides with E_FLAG_RX_...
3193 Need to sort out how these flag bits are used.
07d6d2b8 3194 For now we assume that the flags are OK. */
c7927a3c 3195 if ((elf_elfheader (abfd)->e_flags & EF_RX_CPU_MASK) == EF_RX_CPU_RX)
708e2187 3196#endif
c7927a3c
NC		 3197 return bfd_mach_rx;
3198
3199 return 0;
3200}
3201
3202static bfd_boolean
3203rx_elf_object_p (bfd * abfd)
3204{
1ce74905
DD		 3205 int i;
3206 unsigned int u;
3207 Elf_Internal_Phdr *phdr = elf_tdata (abfd)->phdr;
63920300
AM		 3208 Elf_Internal_Ehdr *ehdr = elf_elfheader (abfd);
3209 int nphdrs = ehdr->e_phnum;
1ce74905 3210 sec_ptr bsec;
fc87b9e8 3211 static int saw_be = FALSE;
63920300 3212 bfd_vma end_phdroff;
1ce74905 3213
4c422395
DD		 3214 /* We never want to automatically choose the non-swapping big-endian
3215 target. The user can only get that explicitly, such as with -I
3216 and objcopy. */
6d00b590 3217 if (abfd->xvec == &rx_elf32_be_ns_vec
4c422395
DD		 3218 && abfd->target_defaulted)
3219 return FALSE;
3220
fc87b9e8
DD		 3221 /* BFD->target_defaulted is not set to TRUE when a target is chosen
3222 as a fallback, so we check for "scanning" to know when to stop
3223 using the non-swapping target. */
6d00b590 3224 if (abfd->xvec == &rx_elf32_be_ns_vec
fc87b9e8
DD		 3225 && saw_be)
3226 return FALSE;
6d00b590 3227 if (abfd->xvec == &rx_elf32_be_vec)
fc87b9e8
DD		 3228 saw_be = TRUE;
3229
c7927a3c
NC		 3230 bfd_default_set_arch_mach (abfd, bfd_arch_rx,
3231 elf32_rx_machine (abfd));
1ce74905
DD		 3232
3233 /* For each PHDR in the object, we must find some section that
3234 corresponds (based on matching file offsets) and use its VMA
3235 information to reconstruct the p_vaddr field we clobbered when we
3236 wrote it out. */
63920300
AM		 3237 /* If PT_LOAD headers include the ELF file header or program headers
3238 then the PT_LOAD header does not start with some section contents.
3239 Making adjustments based on the difference between sh_offset and
3240 p_offset is nonsense in such cases. Exclude them. Note that
3241 since standard linker scripts for RX do not use SIZEOF_HEADERS,
3242 the linker won't normally create PT_LOAD segments covering the
3243 headers so this is mainly for passing the ld testsuite.
3244 FIXME. Why are we looking at non-PT_LOAD headers here? */
3245 end_phdroff = ehdr->e_ehsize;
3246 if (ehdr->e_phoff != 0)
3247 end_phdroff = ehdr->e_phoff + nphdrs * ehdr->e_phentsize;
1ce74905
DD		 3248 for (i=0; i<nphdrs; i++)
3249 {
3250 for (u=0; u<elf_tdata(abfd)->num_elf_sections; u++)
3251 {
3252 Elf_Internal_Shdr *sec = elf_tdata(abfd)->elf_sect_ptr[u];
3253
74b1e045 3254 if (phdr[i].p_filesz
63920300 3255 && phdr[i].p_offset >= end_phdroff
74b1e045 3256 && phdr[i].p_offset <= (bfd_vma) sec->sh_offset
7859afc4
DD		 3257 && sec->sh_size > 0
3258 && sec->sh_type != SHT_NOBITS
1ce74905
DD		 3259 && (bfd_vma)sec->sh_offset <= phdr[i].p_offset + (phdr[i].p_filesz - 1))
3260 {
3261 /* Found one! The difference between the two addresses,
3262 plus the difference between the two file offsets, is
3263 enough information to reconstruct the lma. */
3264
3265 /* Example where they aren't:
3266 PHDR[1] = lma fffc0100 offset 00002010 size 00000100
3267 SEC[6] = vma 00000050 offset 00002050 size 00000040
3268
3269 The correct LMA for the section is fffc0140 + (2050-2010).
3270 */
3271
92ff23a1 3272 phdr[i].p_vaddr = sec->sh_addr + (sec->sh_offset - phdr[i].p_offset);
1ce74905
DD		 3273 break;
3274 }
3275 }
3276
3277 /* We must update the bfd sections as well, so we don't stop
3278 with one match. */
3279 bsec = abfd->sections;
3280 while (bsec)
3281 {
74b1e045
DD		 3282 if (phdr[i].p_filesz
3283 && phdr[i].p_vaddr <= bsec->vma
1ce74905
DD		 3284 && bsec->vma <= phdr[i].p_vaddr + (phdr[i].p_filesz - 1))
3285 {
3286 bsec->lma = phdr[i].p_paddr + (bsec->vma - phdr[i].p_vaddr);
3287 }
3288 bsec = bsec->next;
3289 }
3290 }
3291
c7927a3c
NC		 3292 return TRUE;
3293}
3294 \f
3295
3296#ifdef DEBUG
3297void
9ccb8af9 3298rx_dump_symtab (bfd * abfd, void * internal_syms, void * external_syms)
c7927a3c
NC		 3299{
3300 size_t locsymcount;
3301 Elf_Internal_Sym * isymbuf;
3302 Elf_Internal_Sym * isymend;
3303 Elf_Internal_Sym * isym;
3304 Elf_Internal_Shdr * symtab_hdr;
3305 bfd_boolean free_internal = FALSE, free_external = FALSE;
3306 char * st_info_str;
3307 char * st_info_stb_str;
3308 char * st_other_str;
3309 char * st_shndx_str;
3310
3311 if (! internal_syms)
3312 {
3313 internal_syms = bfd_malloc (1000);
3314 free_internal = 1;
3315 }
3316 if (! external_syms)
3317 {
3318 external_syms = bfd_malloc (1000);
3319 free_external = 1;
3320 }
3321
3322 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
3323 locsymcount = symtab_hdr->sh_size / get_elf_backend_data (abfd)->s->sizeof_sym;
3324 if (free_internal)
3325 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
3326 symtab_hdr->sh_info, 0,
3327 internal_syms, external_syms, NULL);
3328 else
3329 isymbuf = internal_syms;
3330 isymend = isymbuf + locsymcount;
3331
3332 for (isym = isymbuf ; isym < isymend ; isym++)
3333 {
3334 switch (ELF_ST_TYPE (isym->st_info))
3335 {
b707aa49
NC		 3336 case STT_FUNC: st_info_str = "STT_FUNC"; break;
3337 case STT_SECTION: st_info_str = "STT_SECTION"; break;
3338 case STT_FILE: st_info_str = "STT_FILE"; break;
3339 case STT_OBJECT: st_info_str = "STT_OBJECT"; break;
3340 case STT_TLS: st_info_str = "STT_TLS"; break;
c7927a3c
NC		 3341 default: st_info_str = "";
3342 }
3343 switch (ELF_ST_BIND (isym->st_info))
3344 {
b707aa49
NC		 3345 case STB_LOCAL: st_info_stb_str = "STB_LOCAL"; break;
3346 case STB_GLOBAL: st_info_stb_str = "STB_GLOBAL"; break;
c7927a3c
NC		 3347 default: st_info_stb_str = "";
3348 }
3349 switch (ELF_ST_VISIBILITY (isym->st_other))
3350 {
b707aa49
NC		 3351 case STV_DEFAULT: st_other_str = "STV_DEFAULT"; break;
3352 case STV_INTERNAL: st_other_str = "STV_INTERNAL"; break;
3353 case STV_PROTECTED: st_other_str = "STV_PROTECTED"; break;
c7927a3c
NC		 3354 default: st_other_str = "";
3355 }
3356 switch (isym->st_shndx)
3357 {
b707aa49
NC		 3358 case SHN_ABS: st_shndx_str = "SHN_ABS"; break;
3359 case SHN_COMMON: st_shndx_str = "SHN_COMMON"; break;
3360 case SHN_UNDEF: st_shndx_str = "SHN_UNDEF"; break;
c7927a3c
NC		 3361 default: st_shndx_str = "";
3362 }
3363
3364 printf ("isym = %p st_value = %lx st_size = %lx st_name = (%lu) %s "
3365 "st_info = (%d) %s %s st_other = (%d) %s st_shndx = (%d) %s\n",
3366 isym,
3367 (unsigned long) isym->st_value,
3368 (unsigned long) isym->st_size,
3369 isym->st_name,
3370 bfd_elf_string_from_elf_section (abfd, symtab_hdr->sh_link,
3371 isym->st_name),
3372 isym->st_info, st_info_str, st_info_stb_str,
3373 isym->st_other, st_other_str,
3374 isym->st_shndx, st_shndx_str);
3375 }
3376 if (free_internal)
3377 free (internal_syms);
3378 if (free_external)
3379 free (external_syms);
3380}
3381
3382char *
3383rx_get_reloc (long reloc)
3384{
3385 if (0 <= reloc && reloc < R_RX_max)
3386 return rx_elf_howto_table[reloc].name;
3387 return "";
3388}
3389#endif /* DEBUG */
3390
3391\f
3392/* We must take care to keep the on-disk copy of any code sections
3393 that are fully linked swapped if the target is big endian, to match
3394 the Renesas tools. */
3395
3396/* The rule is: big endian object that are final-link executables,
3397 have code sections stored with 32-bit words swapped relative to
3398 what you'd get by default. */
3399
3400static bfd_boolean
07d6d2b8 3401rx_get_section_contents (bfd * abfd,
c7927a3c 3402 sec_ptr section,
07d6d2b8 3403 void * location,
c7927a3c
NC		 3404 file_ptr offset,
3405 bfd_size_type count)
3406{
3407 int exec = (abfd->flags & EXEC_P) ? 1 : 0;
3408 int s_code = (section->flags & SEC_CODE) ? 1 : 0;
3409 bfd_boolean rv;
3410
3411#ifdef DJDEBUG
3412 fprintf (stderr, "dj: get %ld %ld from %s %s e%d sc%d %08lx:%08lx\n",
3413 (long) offset, (long) count, section->name,
3414 bfd_big_endian(abfd) ? "be" : "le",
3415 exec, s_code, (long unsigned) section->filepos,
3416 (long unsigned) offset);
3417#endif
3418
3419 if (exec && s_code && bfd_big_endian (abfd))
3420 {
3421 char * cloc = (char *) location;
3422 bfd_size_type cnt, end_cnt;
3423
3424 rv = TRUE;
3425
3426 /* Fetch and swap unaligned bytes at the beginning. */
3427 if (offset % 4)
07d6d2b8 3428 {
c7927a3c
NC		 3429 char buf[4];
3430
3431 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3432 (offset & -4), 4);
c7927a3c
NC		 3433 if (!rv)
3434 return FALSE;
3435
3436 bfd_putb32 (bfd_getl32 (buf), buf);
3437
3438 cnt = 4 - (offset % 4);
3439 if (cnt > count)
3440 cnt = count;
3441
3442 memcpy (location, buf + (offset % 4), cnt);
3443
3444 count -= cnt;
3445 offset += cnt;
3446 cloc += count;
3447 }
3448
3449 end_cnt = count % 4;
3450
3451 /* Fetch and swap the middle bytes. */
3452 if (count >= 4)
3453 {
3454 rv = _bfd_generic_get_section_contents (abfd, section, cloc, offset,
3455 count - end_cnt);
3456 if (!rv)
3457 return FALSE;
3458
3459 for (cnt = count; cnt >= 4; cnt -= 4, cloc += 4)
3460 bfd_putb32 (bfd_getl32 (cloc), cloc);
3461 }
3462
3463 /* Fetch and swap the end bytes. */
3464 if (end_cnt > 0)
3465 {
3466 char buf[4];
3467
3468 /* Fetch the end bytes. */
3469 rv = _bfd_generic_get_section_contents (abfd, section, buf,
07d6d2b8 3470 offset + count - end_cnt, 4);
c7927a3c
NC		 3471 if (!rv)
3472 return FALSE;
3473
3474 bfd_putb32 (bfd_getl32 (buf), buf);
3475 memcpy (cloc, buf, end_cnt);
3476 }
3477 }
3478 else
3479 rv = _bfd_generic_get_section_contents (abfd, section, location, offset, count);
3480
3481 return rv;
3482}
3483
3484#ifdef DJDEBUG
3485static bfd_boolean
07d6d2b8 3486rx2_set_section_contents (bfd * abfd,
c7927a3c
NC		 3487 sec_ptr section,
3488 const void * location,
3489 file_ptr offset,
3490 bfd_size_type count)
3491{
3492 bfd_size_type i;
3493
3494 fprintf (stderr, " set sec %s %08x loc %p offset %#x count %#x\n",
3495 section->name, (unsigned) section->vma, location, (int) offset, (int) count);
3496 for (i = 0; i < count; i++)
3497 {
3498 if (i % 16 == 0 && i > 0)
3499 fprintf (stderr, "\n");
3500
3501 if (i % 16 && i % 4 == 0)
3502 fprintf (stderr, " ");
3503
3504 if (i % 16 == 0)
3505 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3506
3507 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3508 }
3509 fprintf (stderr, "\n");
3510
3511 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3512}
3513#define _bfd_elf_set_section_contents rx2_set_section_contents
3514#endif
3515
3516static bfd_boolean
07d6d2b8 3517rx_set_section_contents (bfd * abfd,
c7927a3c
NC		 3518 sec_ptr section,
3519 const void * location,
3520 file_ptr offset,
3521 bfd_size_type count)
3522{
3523 bfd_boolean exec = (abfd->flags & EXEC_P) ? TRUE : FALSE;
3524 bfd_boolean s_code = (section->flags & SEC_CODE) ? TRUE : FALSE;
3525 bfd_boolean rv;
3526 char * swapped_data = NULL;
3527 bfd_size_type i;
3528 bfd_vma caddr = section->vma + offset;
3529 file_ptr faddr = 0;
3530 bfd_size_type scount;
3531
3532#ifdef DJDEBUG
3533 bfd_size_type i;
3534
3535 fprintf (stderr, "\ndj: set %ld %ld to %s %s e%d sc%d\n",
3536 (long) offset, (long) count, section->name,
3537 bfd_big_endian (abfd) ? "be" : "le",
3538 exec, s_code);
3539
3540 for (i = 0; i < count; i++)
3541 {
3542 int a = section->vma + offset + i;
3543
3544 if (a % 16 == 0 && a > 0)
3545 fprintf (stderr, "\n");
3546
3547 if (a % 16 && a % 4 == 0)
3548 fprintf (stderr, " ");
3549
3550 if (a % 16 == 0 || i == 0)
3551 fprintf (stderr, " %08x:", (int) (section->vma + offset + i));
3552
3553 fprintf (stderr, " %02x", ((unsigned char *) location)[i]);
3554 }
3555
3556 fprintf (stderr, "\n");
3557#endif
3558
3559 if (! exec || ! s_code || ! bfd_big_endian (abfd))
3560 return _bfd_elf_set_section_contents (abfd, section, location, offset, count);
3561
3562 while (count > 0 && caddr > 0 && caddr % 4)
3563 {
3564 switch (caddr % 4)
3565 {
3566 case 0: faddr = offset + 3; break;
3567 case 1: faddr = offset + 1; break;
3568 case 2: faddr = offset - 1; break;
3569 case 3: faddr = offset - 3; break;
3570 }
3571
3572 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3573 if (! rv)
3574 return rv;
3575
28cc9170 3576 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3577 offset ++;
3578 count --;
3579 caddr ++;
3580 }
3581
3582 scount = (int)(count / 4) * 4;
3583 if (scount > 0)
3584 {
3585 char * cloc = (char *) location;
3586
3587 swapped_data = (char *) bfd_alloc (abfd, count);
3588
3589 for (i = 0; i < count; i += 4)
3590 {
3591 bfd_vma v = bfd_getl32 (cloc + i);
3592 bfd_putb32 (v, swapped_data + i);
3593 }
3594
3595 rv = _bfd_elf_set_section_contents (abfd, section, swapped_data, offset, scount);
3596
3597 if (!rv)
3598 return rv;
3599 }
3600
3601 count -= scount;
28cc9170 3602 location = (bfd_byte *) location + scount;
c7927a3c
NC		 3603 offset += scount;
3604
3605 if (count > 0)
3606 {
3607 caddr = section->vma + offset;
3608 while (count > 0)
3609 {
3610 switch (caddr % 4)
3611 {
3612 case 0: faddr = offset + 3; break;
3613 case 1: faddr = offset + 1; break;
3614 case 2: faddr = offset - 1; break;
3615 case 3: faddr = offset - 3; break;
3616 }
3617 rv = _bfd_elf_set_section_contents (abfd, section, location, faddr, 1);
3618 if (! rv)
3619 return rv;
3620
28cc9170 3621 location = (bfd_byte *) location + 1;
c7927a3c
NC		 3622 offset ++;
3623 count --;
3624 caddr ++;
3625 }
3626 }
3627
3628 return TRUE;
3629}
3630
3631static bfd_boolean
3632rx_final_link (bfd * abfd, struct bfd_link_info * info)
3633{
3634 asection * o;
3635
3636 for (o = abfd->sections; o != NULL; o = o->next)
3637 {
3638#ifdef DJDEBUG
3639 fprintf (stderr, "sec %s fl %x vma %lx lma %lx size %lx raw %lx\n",
3640 o->name, o->flags, o->vma, o->lma, o->size, o->rawsize);
3641#endif
3642 if (o->flags & SEC_CODE
3643 && bfd_big_endian (abfd)
e57278ef 3644 && o->size % 4)
c7927a3c
NC		 3645 {
3646#ifdef DJDEBUG
3647 fprintf (stderr, "adjusting...\n");
3648#endif
3649 o->size += 4 - (o->size % 4);
c7927a3c
NC		 3650 }
3651 }
3652
3653 return bfd_elf_final_link (abfd, info);
3654}
3655
3656static bfd_boolean
3657elf32_rx_modify_program_headers (bfd * abfd ATTRIBUTE_UNUSED,
3658 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3659{
3660 const struct elf_backend_data * bed;
3661 struct elf_obj_tdata * tdata;
3662 Elf_Internal_Phdr * phdr;
3663 unsigned int count;
3664 unsigned int i;
3665
3666 bed = get_elf_backend_data (abfd);
3667 tdata = elf_tdata (abfd);
3668 phdr = tdata->phdr;
12bd6957 3669 count = elf_program_header_size (abfd) / bed->s->sizeof_phdr;
c7927a3c 3670
84bff83f
NC		 3671 if (ignore_lma)
3672 for (i = count; i-- != 0;)
3673 if (phdr[i].p_type == PT_LOAD)
3674 {
3675 /* The Renesas tools expect p_paddr to be zero. However,
3676 there is no other way to store the writable data in ROM for
3677 startup initialization. So, we let the linker *think*
3678 we're using paddr and vaddr the "usual" way, but at the
3679 last minute we move the paddr into the vaddr (which is what
3680 the simulator uses) and zero out paddr. Note that this
3681 does not affect the section headers, just the program
3682 headers. We hope. */
c7927a3c 3683 phdr[i].p_vaddr = phdr[i].p_paddr;
84bff83f 3684#if 0 /* If we zero out p_paddr, then the LMA in the section table
c7927a3c 3685 becomes wrong. */
84bff83f
NC		 3686 phdr[i].p_paddr = 0;
3687#endif
3688 }
c7927a3c
NC		 3689
3690 return TRUE;
3691}
708e2187
NC		 3692
3693/* The default literal sections should always be marked as "code" (i.e.,
3694 SHF_EXECINSTR). This is particularly important for big-endian mode
3695 when we do not want their contents byte reversed. */
3696static const struct bfd_elf_special_section elf32_rx_special_sections[] =
3697{
07d6d2b8
AM		 3698 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
3699 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
708e2187 3700 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC + SHF_EXECINSTR },
07d6d2b8 3701 { NULL, 0, 0, 0, 0 }
708e2187 3702};
7a2f2d82
DD		 3703\f
3704typedef struct {
3705 bfd *abfd;
3706 struct bfd_link_info *info;
3707 bfd_vma table_start;
3708 int table_size;
3709 bfd_vma *table_handlers;
3710 bfd_vma table_default_handler;
3711 struct bfd_link_hash_entry **table_entries;
3712 struct bfd_link_hash_entry *table_default_entry;
3713 FILE *mapfile;
3714} RX_Table_Info;
3715
3716static bfd_boolean
3717rx_table_find (struct bfd_hash_entry *vent, void *vinfo)
3718{
3719 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3720 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3721 const char *name; /* of the symbol we've found */
3722 asection *sec;
3723 struct bfd *abfd;
3724 int idx;
3725 const char *tname; /* name of the table */
3726 bfd_vma start_addr, end_addr;
3727 char *buf;
3728 struct bfd_link_hash_entry * h;
3729
3730 /* We're looking for globally defined symbols of the form
3731 $tablestart$<NAME>. */
3732 if (ent->type != bfd_link_hash_defined
3733 && ent->type != bfd_link_hash_defweak)
3734 return TRUE;
3735
3736 name = ent->root.string;
3737 sec = ent->u.def.section;
3738 abfd = sec->owner;
3739
3740 if (strncmp (name, "$tablestart$", 12))
3741 return TRUE;
3742
3743 sec->flags |= SEC_KEEP;
3744
3745 tname = name + 12;
3746
3747 start_addr = ent->u.def.value;
3748
3749 /* At this point, we can't build the table but we can (and must)
3750 find all the related symbols and mark their sections as SEC_KEEP
3751 so we don't garbage collect them. */
3752
3753 buf = (char *) malloc (12 + 10 + strlen (tname));
3754
3755 sprintf (buf, "$tableend$%s", tname);
3756 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3757 if (!h || (h->type != bfd_link_hash_defined
3758 && h->type != bfd_link_hash_defweak))
3759 {
695344c0 3760 /* xgettext:c-format */
871b3ab2 3761 _bfd_error_handler (_("%pB:%pA: table %s missing corresponding %s"),
7a2f2d82
DD		 3762 abfd, sec, name, buf);
3763 return TRUE;
3764 }
3765
3766 if (h->u.def.section != ent->u.def.section)
3767 {
695344c0 3768 /* xgettext:c-format */
871b3ab2 3769 _bfd_error_handler (_("%pB:%pA: %s and %s must be in the same input section"),
7a2f2d82
DD		 3770 h->u.def.section->owner, h->u.def.section,
3771 name, buf);
3772 return TRUE;
3773 }
3774
3775 end_addr = h->u.def.value;
3776
3777 sprintf (buf, "$tableentry$default$%s", tname);
3778 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3779 if (h && (h->type == bfd_link_hash_defined
3780 || h->type == bfd_link_hash_defweak))
3781 {
3782 h->u.def.section->flags |= SEC_KEEP;
3783 }
3784
3785 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3786 {
3787 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3788 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3789 if (h && (h->type == bfd_link_hash_defined
3790 || h->type == bfd_link_hash_defweak))
3791 {
3792 h->u.def.section->flags |= SEC_KEEP;
3793 }
3794 }
3795
3796 /* Return TRUE to keep scanning, FALSE to end the traversal. */
3797 return TRUE;
3798}
3799
3800/* We need to check for table entry symbols and build the tables, and
3801 we need to do it before the linker does garbage collection. This function is
3802 called once per input object file. */
3803static bfd_boolean
3804rx_check_directives
07d6d2b8 3805 (bfd * abfd ATTRIBUTE_UNUSED,
7a2f2d82
DD		 3806 struct bfd_link_info * info ATTRIBUTE_UNUSED)
3807{
3808 RX_Table_Info stuff;
3809
3810 stuff.abfd = abfd;
3811 stuff.info = info;
3812 bfd_hash_traverse (&(info->hash->table), rx_table_find, &stuff);
3813
3814 return TRUE;
3815}
3816
3817\f
3818static bfd_boolean
3819rx_table_map_2 (struct bfd_hash_entry *vent, void *vinfo)
3820{
3821 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3822 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3823 int idx;
3824 const char *name;
3825 bfd_vma addr;
3826
3827 /* See if the symbol ENT has an address listed in the table, and
3828 isn't a debug/special symbol. If so, put it in the table. */
3829
3830 if (ent->type != bfd_link_hash_defined
3831 && ent->type != bfd_link_hash_defweak)
3832 return TRUE;
3833
3834 name = ent->root.string;
3835
3836 if (name[0] == '$' || name[0] == '.' || name[0] < ' ')
3837 return TRUE;
3838
3839 addr = (ent->u.def.value
3840 + ent->u.def.section->output_section->vma
3841 + ent->u.def.section->output_offset);
3842
3843 for (idx = 0; idx < info->table_size; idx ++)
3844 if (addr == info->table_handlers[idx])
3845 info->table_entries[idx] = ent;
3846
3847 if (addr == info->table_default_handler)
3848 info->table_default_entry = ent;
3849
3850 return TRUE;
3851}
3852
3853static bfd_boolean
3854rx_table_map (struct bfd_hash_entry *vent, void *vinfo)
3855{
3856 RX_Table_Info *info = (RX_Table_Info *)vinfo;
3857 struct bfd_link_hash_entry *ent = (struct bfd_link_hash_entry *)vent;
3858 const char *name; /* of the symbol we've found */
7a2f2d82
DD		 3859 int idx;
3860 const char *tname; /* name of the table */
3861 bfd_vma start_addr, end_addr;
3862 char *buf;
3863 struct bfd_link_hash_entry * h;
3864 int need_elipses;
3865
3866 /* We're looking for globally defined symbols of the form
3867 $tablestart$<NAME>. */
3868 if (ent->type != bfd_link_hash_defined
3869 && ent->type != bfd_link_hash_defweak)
3870 return TRUE;
3871
3872 name = ent->root.string;
7a2f2d82
DD		 3873
3874 if (strncmp (name, "$tablestart$", 12))
3875 return TRUE;
3876
3877 tname = name + 12;
3878 start_addr = (ent->u.def.value
3879 + ent->u.def.section->output_section->vma
3880 + ent->u.def.section->output_offset);
3881
3882 buf = (char *) malloc (12 + 10 + strlen (tname));
3883
3884 sprintf (buf, "$tableend$%s", tname);
3885 end_addr = get_symbol_value_maybe (buf, info->info);
3886
3887 sprintf (buf, "$tableentry$default$%s", tname);
3888 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3889 if (h)
3890 {
3891 info->table_default_handler = (h->u.def.value
3892 + h->u.def.section->output_section->vma
3893 + h->u.def.section->output_offset);
3894 }
3895 else
3896 /* Zero is a valid handler address! */
3897 info->table_default_handler = (bfd_vma) (-1);
3898 info->table_default_entry = NULL;
3899
3900 info->table_start = start_addr;
3901 info->table_size = (int) (end_addr - start_addr) / 4;
3902 info->table_handlers = (bfd_vma *) malloc (info->table_size * sizeof (bfd_vma));
3903 info->table_entries = (struct bfd_link_hash_entry **) malloc (info->table_size * sizeof (struct bfd_link_hash_entry));
3904
3905 for (idx = 0; idx < (int) (end_addr - start_addr) / 4; idx ++)
3906 {
3907 sprintf (buf, "$tableentry$%d$%s", idx, tname);
3908 h = bfd_link_hash_lookup (info->info->hash, buf, FALSE, FALSE, TRUE);
3909 if (h && (h->type == bfd_link_hash_defined
3910 || h->type == bfd_link_hash_defweak))
3911 {
3912 info->table_handlers[idx] = (h->u.def.value
3913 + h->u.def.section->output_section->vma
3914 + h->u.def.section->output_offset);
3915 }
3916 else
3917 info->table_handlers[idx] = info->table_default_handler;
3918 info->table_entries[idx] = NULL;
3919 }
3920
3921 free (buf);
3922
3923 bfd_hash_traverse (&(info->info->hash->table), rx_table_map_2, info);
3924
33ac0ca1 3925 fprintf (info->mapfile, "\nRX Vector Table: %s has %d entries at 0x%08" BFD_VMA_FMT "x\n\n",
7a2f2d82
DD		 3926 tname, info->table_size, start_addr);
3927
3928 if (info->table_default_entry)
33ac0ca1 3929 fprintf (info->mapfile, " default handler is: %s at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3930 info->table_default_entry->root.string,
3931 info->table_default_handler);
3932 else if (info->table_default_handler != (bfd_vma)(-1))
33ac0ca1 3933 fprintf (info->mapfile, " default handler is at 0x%08" BFD_VMA_FMT "x\n",
7a2f2d82
DD		 3934 info->table_default_handler);
3935 else
3936 fprintf (info->mapfile, " no default handler\n");
3937
3938 need_elipses = 1;
3939 for (idx = 0; idx < info->table_size; idx ++)
3940 {
3941 if (info->table_handlers[idx] == info->table_default_handler)
3942 {
3943 if (need_elipses)
3944 fprintf (info->mapfile, " . . .\n");
3945 need_elipses = 0;
3946 continue;
3947 }
3948 need_elipses = 1;
3949
33ac0ca1 3950 fprintf (info->mapfile, " 0x%08" BFD_VMA_FMT "x [%3d] ", start_addr + 4 * idx, idx);
7a2f2d82
DD		 3951
3952 if (info->table_handlers[idx] == (bfd_vma) (-1))
3953 fprintf (info->mapfile, "(no handler found)\n");
3954
3955 else if (info->table_handlers[idx] == info->table_default_handler)
3956 {
3957 if (info->table_default_entry)
3958 fprintf (info->mapfile, "(default)\n");
3959 else
3960 fprintf (info->mapfile, "(default)\n");
3961 }
3962
3963 else if (info->table_entries[idx])
3964 {
33ac0ca1 3965 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x %s\n", info->table_handlers[idx], info->table_entries[idx]->root.string);
7a2f2d82
DD		 3966 }
3967
3968 else
3969 {
33ac0ca1 3970 fprintf (info->mapfile, "0x%08" BFD_VMA_FMT "x ???\n", info->table_handlers[idx]);
7a2f2d82
DD		 3971 }
3972 }
3973 if (need_elipses)
3974 fprintf (info->mapfile, " . . .\n");
3975
3976 return TRUE;
3977}
3978
3979void
3980rx_additional_link_map_text (bfd *obfd, struct bfd_link_info *info, FILE *mapfile)
3981{
3982 /* We scan the symbol table looking for $tableentry$'s, and for
3983 each, try to deduce which handlers go with which entries. */
3984
3985 RX_Table_Info stuff;
3986
3987 stuff.abfd = obfd;
3988 stuff.info = info;
3989 stuff.mapfile = mapfile;
3990 bfd_hash_traverse (&(info->hash->table), rx_table_map, &stuff);
3991}
3992
c7927a3c
NC		 3993\f
3994#define ELF_ARCH bfd_arch_rx
3995#define ELF_MACHINE_CODE EM_RX
3996#define ELF_MAXPAGESIZE 0x1000
3997
6d00b590 3998#define TARGET_BIG_SYM rx_elf32_be_vec
c7927a3c
NC		 3999#define TARGET_BIG_NAME "elf32-rx-be"
4000
6d00b590 4001#define TARGET_LITTLE_SYM rx_elf32_le_vec
c7927a3c
NC		 4002#define TARGET_LITTLE_NAME "elf32-rx-le"
4003
4004#define elf_info_to_howto_rel NULL
4005#define elf_info_to_howto rx_info_to_howto_rela
4006#define elf_backend_object_p rx_elf_object_p
4007#define elf_backend_relocate_section rx_elf_relocate_section
07d6d2b8 4008#define elf_symbol_leading_char ('_')
c7927a3c
NC		 4009#define elf_backend_can_gc_sections 1
4010#define elf_backend_modify_program_headers elf32_rx_modify_program_headers
4011
4012#define bfd_elf32_bfd_reloc_type_lookup rx_reloc_type_lookup
4013#define bfd_elf32_bfd_reloc_name_lookup rx_reloc_name_lookup
4014#define bfd_elf32_bfd_set_private_flags rx_elf_set_private_flags
4015#define bfd_elf32_bfd_merge_private_bfd_data rx_elf_merge_private_bfd_data
4016#define bfd_elf32_bfd_print_private_bfd_data rx_elf_print_private_bfd_data
4017#define bfd_elf32_get_section_contents rx_get_section_contents
4018#define bfd_elf32_set_section_contents rx_set_section_contents
4019#define bfd_elf32_bfd_final_link rx_final_link
4020#define bfd_elf32_bfd_relax_section elf32_rx_relax_section_wrapper
07d6d2b8 4021#define elf_backend_special_sections elf32_rx_special_sections
7a2f2d82 4022#define elf_backend_check_directives rx_check_directives
c7927a3c
NC		 4023
4024#include "elf32-target.h"
4c422395
DD		 4025
4026/* We define a second big-endian target that doesn't have the custom
4027 section get/set hooks, for times when we want to preserve the
4028 pre-swapped .text sections (like objcopy). */
4029
07d6d2b8 4030#undef TARGET_BIG_SYM
6d00b590 4031#define TARGET_BIG_SYM rx_elf32_be_ns_vec
07d6d2b8 4032#undef TARGET_BIG_NAME
4c422395 4033#define TARGET_BIG_NAME "elf32-rx-be-ns"
07d6d2b8 4034#undef TARGET_LITTLE_SYM
4c422395
DD		 4035
4036#undef bfd_elf32_get_section_contents
4037#undef bfd_elf32_set_section_contents
4038
4039#undef elf32_bed
4040#define elf32_bed elf32_rx_be_ns_bed
4041
4042#include "elf32-target.h"
GDB Binutils - Deliverables
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