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[deliverable/binutils-gdb.git] / bfd / elf32-v850.c
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252b5132 1/* V850-specific support for 32-bit ELF
9553c638 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
7898deda 3 Free Software Foundation, Inc.
252b5132 4
86aba9db 5 This file is part of BFD, the Binary File Descriptor library.
252b5132 6
86aba9db
NC
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
252b5132 11
86aba9db
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
86aba9db
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
252b5132 20
252b5132 21/* XXX FIXME: This code is littered with 32bit int, 16bit short, 8bit char
86aba9db 22 dependencies. As is the gas & simulator code for the v850. */
252b5132 23
252b5132
RH
24#include "bfd.h"
25#include "sysdep.h"
26#include "bfdlink.h"
27#include "libbfd.h"
28#include "elf-bfd.h"
29#include "elf/v850.h"
e12dd2ea 30#include "libiberty.h"
252b5132 31
e12dd2ea 32/* Sign-extend a 24-bit number. */
dc810e39 33#define SEXT24(x) ((((x) & 0xffffff) ^ 0x800000) - 0x800000)
435b1e90 34
252b5132
RH
35static reloc_howto_type *v850_elf_reloc_type_lookup
36 PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
37static void v850_elf_info_to_howto_rel
947216bf 38 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
252b5132 39static void v850_elf_info_to_howto_rela
947216bf 40 PARAMS ((bfd *, arelent *, Elf_Internal_Rela *));
252b5132
RH
41static bfd_reloc_status_type v850_elf_reloc
42 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
b34976b6 43static bfd_boolean v850_elf_is_local_label_name
252b5132 44 PARAMS ((bfd *, const char *));
b34976b6 45static bfd_boolean v850_elf_relocate_section
252b5132
RH
46 PARAMS((bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
47 Elf_Internal_Rela *, Elf_Internal_Sym *, asection **));
48static bfd_reloc_status_type v850_elf_perform_relocation
dc810e39 49 PARAMS ((bfd *, unsigned int, bfd_vma, bfd_byte *));
b34976b6 50static bfd_boolean v850_elf_check_relocs
252b5132
RH
51 PARAMS ((bfd *, struct bfd_link_info *, asection *, const Elf_Internal_Rela *));
52static void remember_hi16s_reloc
53 PARAMS ((bfd *, bfd_vma, bfd_byte *));
54static bfd_byte * find_remembered_hi16s_reloc
b34976b6 55 PARAMS ((bfd_vma, bfd_boolean *));
252b5132
RH
56static bfd_reloc_status_type v850_elf_final_link_relocate
57 PARAMS ((reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, bfd_vma,
58 bfd_vma, bfd_vma, struct bfd_link_info *, asection *, int));
b34976b6 59static bfd_boolean v850_elf_object_p
252b5132 60 PARAMS ((bfd *));
b34976b6 61static bfd_boolean v850_elf_fake_sections
947216bf 62 PARAMS ((bfd *, Elf_Internal_Shdr *, asection *));
252b5132 63static void v850_elf_final_write_processing
b34976b6
AM
64 PARAMS ((bfd *, bfd_boolean));
65static bfd_boolean v850_elf_set_private_flags
252b5132 66 PARAMS ((bfd *, flagword));
b34976b6 67static bfd_boolean v850_elf_merge_private_bfd_data
252b5132 68 PARAMS ((bfd *, bfd *));
b34976b6 69static bfd_boolean v850_elf_print_private_bfd_data
252b5132 70 PARAMS ((bfd *, PTR));
b34976b6 71static bfd_boolean v850_elf_section_from_bfd_section
af746e92 72 PARAMS ((bfd *, asection *, int *));
252b5132
RH
73static void v850_elf_symbol_processing
74 PARAMS ((bfd *, asymbol *));
b34976b6 75static bfd_boolean v850_elf_add_symbol_hook
555cd476 76 PARAMS ((bfd *, struct bfd_link_info *, Elf_Internal_Sym *,
252b5132 77 const char **, flagword *, asection **, bfd_vma *));
b34976b6 78static bfd_boolean v850_elf_link_output_symbol_hook
754021d0
AM
79 PARAMS ((struct bfd_link_info *, const char *, Elf_Internal_Sym *,
80 asection *, struct elf_link_hash_entry *));
b34976b6 81static bfd_boolean v850_elf_section_from_shdr
90937f86 82 PARAMS ((bfd *, Elf_Internal_Shdr *, const char *));
b34976b6 83static bfd_boolean v850_elf_gc_sweep_hook
e12dd2ea
NC
84 PARAMS ((bfd *, struct bfd_link_info *, asection *,
85 const Elf_Internal_Rela *));
86static asection * v850_elf_gc_mark_hook
1e2f5b6e 87 PARAMS ((asection *, struct bfd_link_info *,
e12dd2ea
NC
88 Elf_Internal_Rela *, struct elf_link_hash_entry *,
89 Elf_Internal_Sym *));
86aba9db
NC
90static bfd_reloc_status_type v850_elf_ignore_reloc
91 PARAMS ((bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **));
b34976b6 92static bfd_boolean v850_elf_relax_delete_bytes
86aba9db 93 PARAMS ((bfd *, asection *, bfd_vma, bfd_vma, int));
b34976b6
AM
94static bfd_boolean v850_elf_relax_section
95 PARAMS ((bfd *, asection *, struct bfd_link_info *, bfd_boolean *));
e12dd2ea
NC
96
97/* Note: It is REQUIRED that the 'type' value of each entry
98 in this array match the index of the entry in the array. */
252b5132
RH
99static reloc_howto_type v850_elf_howto_table[] =
100{
101 /* This reloc does nothing. */
102 HOWTO (R_V850_NONE, /* type */
103 0, /* rightshift */
104 2, /* size (0 = byte, 1 = short, 2 = long) */
105 32, /* bitsize */
b34976b6 106 FALSE, /* pc_relative */
252b5132
RH
107 0, /* bitpos */
108 complain_overflow_bitfield, /* complain_on_overflow */
109 bfd_elf_generic_reloc, /* special_function */
110 "R_V850_NONE", /* name */
b34976b6 111 FALSE, /* partial_inplace */
252b5132
RH
112 0, /* src_mask */
113 0, /* dst_mask */
b34976b6 114 FALSE), /* pcrel_offset */
252b5132 115
435b1e90 116 /* A PC relative 9 bit branch. */
252b5132
RH
117 HOWTO (R_V850_9_PCREL, /* type */
118 2, /* rightshift */
119 2, /* size (0 = byte, 1 = short, 2 = long) */
120 26, /* bitsize */
b34976b6 121 TRUE, /* pc_relative */
252b5132
RH
122 0, /* bitpos */
123 complain_overflow_bitfield, /* complain_on_overflow */
124 v850_elf_reloc, /* special_function */
125 "R_V850_9_PCREL", /* name */
b34976b6 126 FALSE, /* partial_inplace */
252b5132
RH
127 0x00ffffff, /* src_mask */
128 0x00ffffff, /* dst_mask */
b34976b6 129 TRUE), /* pcrel_offset */
252b5132 130
435b1e90 131 /* A PC relative 22 bit branch. */
252b5132
RH
132 HOWTO (R_V850_22_PCREL, /* type */
133 2, /* rightshift */
134 2, /* size (0 = byte, 1 = short, 2 = long) */
135 22, /* bitsize */
b34976b6 136 TRUE, /* pc_relative */
252b5132
RH
137 7, /* bitpos */
138 complain_overflow_signed, /* complain_on_overflow */
139 v850_elf_reloc, /* special_function */
140 "R_V850_22_PCREL", /* name */
b34976b6 141 FALSE, /* partial_inplace */
252b5132
RH
142 0x07ffff80, /* src_mask */
143 0x07ffff80, /* dst_mask */
b34976b6 144 TRUE), /* pcrel_offset */
252b5132
RH
145
146 /* High 16 bits of symbol value. */
147 HOWTO (R_V850_HI16_S, /* type */
148 0, /* rightshift */
149 1, /* size (0 = byte, 1 = short, 2 = long) */
150 16, /* bitsize */
b34976b6 151 FALSE, /* pc_relative */
252b5132
RH
152 0, /* bitpos */
153 complain_overflow_dont, /* complain_on_overflow */
154 v850_elf_reloc, /* special_function */
155 "R_V850_HI16_S", /* name */
b34976b6 156 FALSE, /* partial_inplace */
252b5132
RH
157 0xffff, /* src_mask */
158 0xffff, /* dst_mask */
b34976b6 159 FALSE), /* pcrel_offset */
252b5132
RH
160
161 /* High 16 bits of symbol value. */
162 HOWTO (R_V850_HI16, /* type */
163 0, /* rightshift */
164 1, /* size (0 = byte, 1 = short, 2 = long) */
165 16, /* bitsize */
b34976b6 166 FALSE, /* pc_relative */
252b5132
RH
167 0, /* bitpos */
168 complain_overflow_dont, /* complain_on_overflow */
169 v850_elf_reloc, /* special_function */
170 "R_V850_HI16", /* name */
b34976b6 171 FALSE, /* partial_inplace */
252b5132
RH
172 0xffff, /* src_mask */
173 0xffff, /* dst_mask */
b34976b6 174 FALSE), /* pcrel_offset */
252b5132
RH
175
176 /* Low 16 bits of symbol value. */
177 HOWTO (R_V850_LO16, /* type */
178 0, /* rightshift */
179 1, /* size (0 = byte, 1 = short, 2 = long) */
180 16, /* bitsize */
b34976b6 181 FALSE, /* pc_relative */
252b5132
RH
182 0, /* bitpos */
183 complain_overflow_dont, /* complain_on_overflow */
184 v850_elf_reloc, /* special_function */
185 "R_V850_LO16", /* name */
b34976b6 186 FALSE, /* partial_inplace */
252b5132
RH
187 0xffff, /* src_mask */
188 0xffff, /* dst_mask */
b34976b6 189 FALSE), /* pcrel_offset */
252b5132
RH
190
191 /* Simple 32bit reloc. */
e30ddb24 192 HOWTO (R_V850_ABS32, /* type */
252b5132
RH
193 0, /* rightshift */
194 2, /* size (0 = byte, 1 = short, 2 = long) */
195 32, /* bitsize */
b34976b6 196 FALSE, /* pc_relative */
252b5132
RH
197 0, /* bitpos */
198 complain_overflow_dont, /* complain_on_overflow */
199 v850_elf_reloc, /* special_function */
e30ddb24 200 "R_V850_ABS32", /* name */
b34976b6 201 FALSE, /* partial_inplace */
252b5132
RH
202 0xffffffff, /* src_mask */
203 0xffffffff, /* dst_mask */
b34976b6 204 FALSE), /* pcrel_offset */
252b5132
RH
205
206 /* Simple 16bit reloc. */
207 HOWTO (R_V850_16, /* type */
208 0, /* rightshift */
209 1, /* size (0 = byte, 1 = short, 2 = long) */
210 16, /* bitsize */
b34976b6 211 FALSE, /* pc_relative */
252b5132
RH
212 0, /* bitpos */
213 complain_overflow_dont, /* complain_on_overflow */
214 bfd_elf_generic_reloc, /* special_function */
215 "R_V850_16", /* name */
b34976b6 216 FALSE, /* partial_inplace */
252b5132
RH
217 0xffff, /* src_mask */
218 0xffff, /* dst_mask */
b34976b6 219 FALSE), /* pcrel_offset */
252b5132
RH
220
221 /* Simple 8bit reloc. */
222 HOWTO (R_V850_8, /* type */
223 0, /* rightshift */
224 0, /* size (0 = byte, 1 = short, 2 = long) */
225 8, /* bitsize */
b34976b6 226 FALSE, /* pc_relative */
252b5132
RH
227 0, /* bitpos */
228 complain_overflow_dont, /* complain_on_overflow */
229 bfd_elf_generic_reloc, /* special_function */
230 "R_V850_8", /* name */
b34976b6 231 FALSE, /* partial_inplace */
252b5132
RH
232 0xff, /* src_mask */
233 0xff, /* dst_mask */
b34976b6 234 FALSE), /* pcrel_offset */
252b5132
RH
235
236 /* 16 bit offset from the short data area pointer. */
237 HOWTO (R_V850_SDA_16_16_OFFSET, /* type */
238 0, /* rightshift */
239 1, /* size (0 = byte, 1 = short, 2 = long) */
240 16, /* bitsize */
b34976b6 241 FALSE, /* pc_relative */
252b5132
RH
242 0, /* bitpos */
243 complain_overflow_dont, /* complain_on_overflow */
244 v850_elf_reloc, /* special_function */
245 "R_V850_SDA_16_16_OFFSET", /* name */
b34976b6 246 FALSE, /* partial_inplace */
252b5132
RH
247 0xffff, /* src_mask */
248 0xffff, /* dst_mask */
b34976b6 249 FALSE), /* pcrel_offset */
252b5132
RH
250
251 /* 15 bit offset from the short data area pointer. */
252 HOWTO (R_V850_SDA_15_16_OFFSET, /* type */
253 1, /* rightshift */
254 1, /* size (0 = byte, 1 = short, 2 = long) */
255 16, /* bitsize */
b34976b6 256 FALSE, /* pc_relative */
252b5132
RH
257 1, /* bitpos */
258 complain_overflow_dont, /* complain_on_overflow */
259 v850_elf_reloc, /* special_function */
260 "R_V850_SDA_15_16_OFFSET", /* name */
b34976b6 261 FALSE, /* partial_inplace */
252b5132
RH
262 0xfffe, /* src_mask */
263 0xfffe, /* dst_mask */
b34976b6 264 FALSE), /* pcrel_offset */
252b5132
RH
265
266 /* 16 bit offset from the zero data area pointer. */
267 HOWTO (R_V850_ZDA_16_16_OFFSET, /* type */
268 0, /* rightshift */
269 1, /* size (0 = byte, 1 = short, 2 = long) */
270 16, /* bitsize */
b34976b6 271 FALSE, /* pc_relative */
252b5132
RH
272 0, /* bitpos */
273 complain_overflow_dont, /* complain_on_overflow */
274 v850_elf_reloc, /* special_function */
275 "R_V850_ZDA_16_16_OFFSET", /* name */
b34976b6 276 FALSE, /* partial_inplace */
252b5132
RH
277 0xffff, /* src_mask */
278 0xffff, /* dst_mask */
b34976b6 279 FALSE), /* pcrel_offset */
252b5132
RH
280
281 /* 15 bit offset from the zero data area pointer. */
282 HOWTO (R_V850_ZDA_15_16_OFFSET, /* type */
283 1, /* rightshift */
284 1, /* size (0 = byte, 1 = short, 2 = long) */
285 16, /* bitsize */
b34976b6 286 FALSE, /* pc_relative */
252b5132
RH
287 1, /* bitpos */
288 complain_overflow_dont, /* complain_on_overflow */
289 v850_elf_reloc, /* special_function */
290 "R_V850_ZDA_15_16_OFFSET", /* name */
b34976b6 291 FALSE, /* partial_inplace */
252b5132
RH
292 0xfffe, /* src_mask */
293 0xfffe, /* dst_mask */
b34976b6 294 FALSE), /* pcrel_offset */
252b5132
RH
295
296 /* 6 bit offset from the tiny data area pointer. */
297 HOWTO (R_V850_TDA_6_8_OFFSET, /* type */
298 2, /* rightshift */
299 1, /* size (0 = byte, 1 = short, 2 = long) */
300 8, /* bitsize */
b34976b6 301 FALSE, /* pc_relative */
252b5132
RH
302 1, /* bitpos */
303 complain_overflow_dont, /* complain_on_overflow */
304 v850_elf_reloc, /* special_function */
305 "R_V850_TDA_6_8_OFFSET", /* name */
b34976b6 306 FALSE, /* partial_inplace */
252b5132
RH
307 0x7e, /* src_mask */
308 0x7e, /* dst_mask */
b34976b6 309 FALSE), /* pcrel_offset */
252b5132
RH
310
311 /* 8 bit offset from the tiny data area pointer. */
312 HOWTO (R_V850_TDA_7_8_OFFSET, /* type */
313 1, /* rightshift */
314 1, /* size (0 = byte, 1 = short, 2 = long) */
315 8, /* bitsize */
b34976b6 316 FALSE, /* pc_relative */
252b5132
RH
317 0, /* bitpos */
318 complain_overflow_dont, /* complain_on_overflow */
319 v850_elf_reloc, /* special_function */
320 "R_V850_TDA_7_8_OFFSET", /* name */
b34976b6 321 FALSE, /* partial_inplace */
252b5132
RH
322 0x7f, /* src_mask */
323 0x7f, /* dst_mask */
b34976b6 324 FALSE), /* pcrel_offset */
435b1e90 325
252b5132
RH
326 /* 7 bit offset from the tiny data area pointer. */
327 HOWTO (R_V850_TDA_7_7_OFFSET, /* type */
328 0, /* rightshift */
329 1, /* size (0 = byte, 1 = short, 2 = long) */
330 7, /* bitsize */
b34976b6 331 FALSE, /* pc_relative */
252b5132
RH
332 0, /* bitpos */
333 complain_overflow_dont, /* complain_on_overflow */
334 v850_elf_reloc, /* special_function */
335 "R_V850_TDA_7_7_OFFSET", /* name */
b34976b6 336 FALSE, /* partial_inplace */
252b5132
RH
337 0x7f, /* src_mask */
338 0x7f, /* dst_mask */
b34976b6 339 FALSE), /* pcrel_offset */
252b5132
RH
340
341 /* 16 bit offset from the tiny data area pointer! */
342 HOWTO (R_V850_TDA_16_16_OFFSET, /* type */
343 0, /* rightshift */
344 1, /* size (0 = byte, 1 = short, 2 = long) */
345 16, /* bitsize */
b34976b6 346 FALSE, /* pc_relative */
252b5132
RH
347 0, /* bitpos */
348 complain_overflow_dont, /* complain_on_overflow */
349 v850_elf_reloc, /* special_function */
350 "R_V850_TDA_16_16_OFFSET", /* name */
b34976b6 351 FALSE, /* partial_inplace */
252b5132
RH
352 0xffff, /* src_mask */
353 0xfff, /* dst_mask */
b34976b6 354 FALSE), /* pcrel_offset */
252b5132
RH
355
356 /* 5 bit offset from the tiny data area pointer. */
357 HOWTO (R_V850_TDA_4_5_OFFSET, /* type */
358 1, /* rightshift */
359 1, /* size (0 = byte, 1 = short, 2 = long) */
360 5, /* bitsize */
b34976b6 361 FALSE, /* pc_relative */
252b5132
RH
362 0, /* bitpos */
363 complain_overflow_dont, /* complain_on_overflow */
364 v850_elf_reloc, /* special_function */
365 "R_V850_TDA_4_5_OFFSET", /* name */
b34976b6 366 FALSE, /* partial_inplace */
252b5132
RH
367 0x0f, /* src_mask */
368 0x0f, /* dst_mask */
b34976b6 369 FALSE), /* pcrel_offset */
252b5132
RH
370
371 /* 4 bit offset from the tiny data area pointer. */
372 HOWTO (R_V850_TDA_4_4_OFFSET, /* type */
373 0, /* rightshift */
374 1, /* size (0 = byte, 1 = short, 2 = long) */
375 4, /* bitsize */
b34976b6 376 FALSE, /* pc_relative */
252b5132
RH
377 0, /* bitpos */
378 complain_overflow_dont, /* complain_on_overflow */
379 v850_elf_reloc, /* special_function */
380 "R_V850_TDA_4_4_OFFSET", /* name */
b34976b6 381 FALSE, /* partial_inplace */
252b5132
RH
382 0x0f, /* src_mask */
383 0x0f, /* dst_mask */
b34976b6 384 FALSE), /* pcrel_offset */
252b5132
RH
385
386 /* 16 bit offset from the short data area pointer. */
387 HOWTO (R_V850_SDA_16_16_SPLIT_OFFSET, /* type */
388 0, /* rightshift */
389 2, /* size (0 = byte, 1 = short, 2 = long) */
390 16, /* bitsize */
b34976b6 391 FALSE, /* pc_relative */
252b5132
RH
392 0, /* bitpos */
393 complain_overflow_dont, /* complain_on_overflow */
394 v850_elf_reloc, /* special_function */
395 "R_V850_SDA_16_16_SPLIT_OFFSET",/* name */
b34976b6 396 FALSE, /* partial_inplace */
252b5132
RH
397 0xfffe0020, /* src_mask */
398 0xfffe0020, /* dst_mask */
b34976b6 399 FALSE), /* pcrel_offset */
252b5132
RH
400
401 /* 16 bit offset from the zero data area pointer. */
402 HOWTO (R_V850_ZDA_16_16_SPLIT_OFFSET, /* type */
403 0, /* rightshift */
404 2, /* size (0 = byte, 1 = short, 2 = long) */
405 16, /* bitsize */
b34976b6 406 FALSE, /* pc_relative */
252b5132
RH
407 0, /* bitpos */
408 complain_overflow_dont, /* complain_on_overflow */
409 v850_elf_reloc, /* special_function */
410 "R_V850_ZDA_16_16_SPLIT_OFFSET",/* name */
b34976b6 411 FALSE, /* partial_inplace */
252b5132
RH
412 0xfffe0020, /* src_mask */
413 0xfffe0020, /* dst_mask */
b34976b6 414 FALSE), /* pcrel_offset */
252b5132
RH
415
416 /* 6 bit offset from the call table base pointer. */
417 HOWTO (R_V850_CALLT_6_7_OFFSET, /* type */
418 0, /* rightshift */
419 1, /* size (0 = byte, 1 = short, 2 = long) */
420 7, /* bitsize */
b34976b6 421 FALSE, /* pc_relative */
252b5132
RH
422 0, /* bitpos */
423 complain_overflow_dont, /* complain_on_overflow */
424 v850_elf_reloc, /* special_function */
425 "R_V850_CALLT_6_7_OFFSET", /* name */
b34976b6 426 FALSE, /* partial_inplace */
252b5132
RH
427 0x3f, /* src_mask */
428 0x3f, /* dst_mask */
b34976b6 429 FALSE), /* pcrel_offset */
252b5132
RH
430
431 /* 16 bit offset from the call table base pointer. */
432 HOWTO (R_V850_CALLT_16_16_OFFSET, /* type */
433 0, /* rightshift */
434 1, /* size (0 = byte, 1 = short, 2 = long) */
435 16, /* bitsize */
b34976b6 436 FALSE, /* pc_relative */
252b5132
RH
437 0, /* bitpos */
438 complain_overflow_dont, /* complain_on_overflow */
439 v850_elf_reloc, /* special_function */
440 "R_V850_CALLT_16_16_OFFSET", /* name */
b34976b6 441 FALSE, /* partial_inplace */
252b5132
RH
442 0xffff, /* src_mask */
443 0xffff, /* dst_mask */
b34976b6 444 FALSE), /* pcrel_offset */
252b5132
RH
445
446 /* GNU extension to record C++ vtable hierarchy */
447 HOWTO (R_V850_GNU_VTINHERIT, /* type */
448 0, /* rightshift */
449 2, /* size (0 = byte, 1 = short, 2 = long) */
450 0, /* bitsize */
b34976b6 451 FALSE, /* pc_relative */
252b5132
RH
452 0, /* bitpos */
453 complain_overflow_dont, /* complain_on_overflow */
454 NULL, /* special_function */
455 "R_V850_GNU_VTINHERIT", /* name */
b34976b6 456 FALSE, /* partial_inplace */
252b5132
RH
457 0, /* src_mask */
458 0, /* dst_mask */
b34976b6 459 FALSE), /* pcrel_offset */
252b5132
RH
460
461 /* GNU extension to record C++ vtable member usage */
462 HOWTO (R_V850_GNU_VTENTRY, /* type */
463 0, /* rightshift */
464 2, /* size (0 = byte, 1 = short, 2 = long) */
465 0, /* bitsize */
b34976b6 466 FALSE, /* pc_relative */
252b5132
RH
467 0, /* bitpos */
468 complain_overflow_dont, /* complain_on_overflow */
469 _bfd_elf_rel_vtable_reloc_fn, /* special_function */
470 "R_V850_GNU_VTENTRY", /* name */
b34976b6 471 FALSE, /* partial_inplace */
252b5132
RH
472 0, /* src_mask */
473 0, /* dst_mask */
b34976b6 474 FALSE), /* pcrel_offset */
435b1e90 475
86aba9db
NC
476 /* Indicates a .longcall pseudo-op. The compiler will generate a .longcall
477 pseudo-op when it finds a function call which can be relaxed. */
478 HOWTO (R_V850_LONGCALL, /* type */
479 0, /* rightshift */
480 2, /* size (0 = byte, 1 = short, 2 = long) */
481 32, /* bitsize */
b34976b6 482 TRUE, /* pc_relative */
86aba9db
NC
483 0, /* bitpos */
484 complain_overflow_signed, /* complain_on_overflow */
485 v850_elf_ignore_reloc, /* special_function */
486 "R_V850_LONGCALL", /* name */
b34976b6 487 FALSE, /* partial_inplace */
86aba9db
NC
488 0, /* src_mask */
489 0, /* dst_mask */
b34976b6 490 TRUE), /* pcrel_offset */
86aba9db
NC
491
492 /* Indicates a .longjump pseudo-op. The compiler will generate a
493 .longjump pseudo-op when it finds a branch which can be relaxed. */
494 HOWTO (R_V850_LONGJUMP, /* type */
495 0, /* rightshift */
496 2, /* size (0 = byte, 1 = short, 2 = long) */
497 32, /* bitsize */
b34976b6 498 TRUE, /* pc_relative */
86aba9db
NC
499 0, /* bitpos */
500 complain_overflow_signed, /* complain_on_overflow */
501 v850_elf_ignore_reloc, /* special_function */
502 "R_V850_LONGJUMP", /* name */
b34976b6 503 FALSE, /* partial_inplace */
86aba9db
NC
504 0, /* src_mask */
505 0, /* dst_mask */
b34976b6 506 TRUE), /* pcrel_offset */
86aba9db
NC
507
508 HOWTO (R_V850_ALIGN, /* type */
509 0, /* rightshift */
510 1, /* size (0 = byte, 1 = short, 2 = long) */
511 0, /* bitsize */
b34976b6 512 FALSE, /* pc_relative */
86aba9db
NC
513 0, /* bitpos */
514 complain_overflow_unsigned, /* complain_on_overflow */
515 v850_elf_ignore_reloc, /* special_function */
516 "R_V850_ALIGN", /* name */
b34976b6 517 FALSE, /* partial_inplace */
86aba9db
NC
518 0, /* src_mask */
519 0, /* dst_mask */
b34976b6 520 TRUE), /* pcrel_offset */
e30ddb24
NC
521
522 /* Simple pc-relative 32bit reloc. */
523 HOWTO (R_V850_REL32, /* type */
524 0, /* rightshift */
525 2, /* size (0 = byte, 1 = short, 2 = long) */
526 32, /* bitsize */
527 TRUE, /* pc_relative */
528 0, /* bitpos */
529 complain_overflow_dont, /* complain_on_overflow */
530 v850_elf_reloc, /* special_function */
531 "R_V850_REL32", /* name */
532 FALSE, /* partial_inplace */
533 0xffffffff, /* src_mask */
534 0xffffffff, /* dst_mask */
535 FALSE), /* pcrel_offset */
1e50d24d
RS
536
537 /* An ld.bu version of R_V850_LO16. */
538 HOWTO (R_V850_LO16_SPLIT_OFFSET, /* type */
539 0, /* rightshift */
540 2, /* size (0 = byte, 1 = short, 2 = long) */
541 16, /* bitsize */
542 FALSE, /* pc_relative */
543 0, /* bitpos */
544 complain_overflow_dont, /* complain_on_overflow */
545 v850_elf_reloc, /* special_function */
546 "R_V850_LO16_SPLIT_OFFSET", /* name */
547 FALSE, /* partial_inplace */
548 0xfffe0020, /* src_mask */
549 0xfffe0020, /* dst_mask */
550 FALSE), /* pcrel_offset */
252b5132
RH
551};
552
553/* Map BFD reloc types to V850 ELF reloc types. */
554
555struct v850_elf_reloc_map
556{
557 /* BFD_RELOC_V850_CALLT_16_16_OFFSET is 258, which will not fix in an
558 unsigned char. */
559 bfd_reloc_code_real_type bfd_reloc_val;
917583ad 560 unsigned int elf_reloc_val;
252b5132
RH
561};
562
563static const struct v850_elf_reloc_map v850_elf_reloc_map[] =
564{
86aba9db
NC
565 { BFD_RELOC_NONE, R_V850_NONE },
566 { BFD_RELOC_V850_9_PCREL, R_V850_9_PCREL },
567 { BFD_RELOC_V850_22_PCREL, R_V850_22_PCREL },
568 { BFD_RELOC_HI16_S, R_V850_HI16_S },
569 { BFD_RELOC_HI16, R_V850_HI16 },
570 { BFD_RELOC_LO16, R_V850_LO16 },
e30ddb24
NC
571 { BFD_RELOC_32, R_V850_ABS32 },
572 { BFD_RELOC_32_PCREL, R_V850_REL32 },
86aba9db
NC
573 { BFD_RELOC_16, R_V850_16 },
574 { BFD_RELOC_8, R_V850_8 },
575 { BFD_RELOC_V850_SDA_16_16_OFFSET, R_V850_SDA_16_16_OFFSET },
576 { BFD_RELOC_V850_SDA_15_16_OFFSET, R_V850_SDA_15_16_OFFSET },
577 { BFD_RELOC_V850_ZDA_16_16_OFFSET, R_V850_ZDA_16_16_OFFSET },
578 { BFD_RELOC_V850_ZDA_15_16_OFFSET, R_V850_ZDA_15_16_OFFSET },
579 { BFD_RELOC_V850_TDA_6_8_OFFSET, R_V850_TDA_6_8_OFFSET },
580 { BFD_RELOC_V850_TDA_7_8_OFFSET, R_V850_TDA_7_8_OFFSET },
581 { BFD_RELOC_V850_TDA_7_7_OFFSET, R_V850_TDA_7_7_OFFSET },
582 { BFD_RELOC_V850_TDA_16_16_OFFSET, R_V850_TDA_16_16_OFFSET },
252b5132
RH
583 { BFD_RELOC_V850_TDA_4_5_OFFSET, R_V850_TDA_4_5_OFFSET },
584 { BFD_RELOC_V850_TDA_4_4_OFFSET, R_V850_TDA_4_4_OFFSET },
1e50d24d 585 { BFD_RELOC_V850_LO16_SPLIT_OFFSET, R_V850_LO16_SPLIT_OFFSET },
252b5132
RH
586 { BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, R_V850_SDA_16_16_SPLIT_OFFSET },
587 { BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, R_V850_ZDA_16_16_SPLIT_OFFSET },
588 { BFD_RELOC_V850_CALLT_6_7_OFFSET, R_V850_CALLT_6_7_OFFSET },
589 { BFD_RELOC_V850_CALLT_16_16_OFFSET, R_V850_CALLT_16_16_OFFSET },
86aba9db
NC
590 { BFD_RELOC_VTABLE_INHERIT, R_V850_GNU_VTINHERIT },
591 { BFD_RELOC_VTABLE_ENTRY, R_V850_GNU_VTENTRY },
592 { BFD_RELOC_V850_LONGCALL, R_V850_LONGCALL },
593 { BFD_RELOC_V850_LONGJUMP, R_V850_LONGJUMP },
594 { BFD_RELOC_V850_ALIGN, R_V850_ALIGN },
252b5132
RH
595
596};
252b5132 597\f
e12dd2ea
NC
598/* Map a bfd relocation into the appropriate howto structure. */
599
252b5132
RH
600static reloc_howto_type *
601v850_elf_reloc_type_lookup (abfd, code)
b34976b6
AM
602 bfd *abfd ATTRIBUTE_UNUSED;
603 bfd_reloc_code_real_type code;
252b5132
RH
604{
605 unsigned int i;
606
e12dd2ea
NC
607 for (i = ARRAY_SIZE (v850_elf_reloc_map); i --;)
608 if (v850_elf_reloc_map[i].bfd_reloc_val == code)
609 {
917583ad 610 unsigned int elf_reloc_val = v850_elf_reloc_map[i].elf_reloc_val;
dc810e39 611
fbad9a25 612 BFD_ASSERT (v850_elf_howto_table[elf_reloc_val].type == elf_reloc_val);
435b1e90 613
fbad9a25 614 return v850_elf_howto_table + elf_reloc_val;
e12dd2ea 615 }
252b5132
RH
616
617 return NULL;
618}
252b5132
RH
619\f
620/* Set the howto pointer for an V850 ELF reloc. */
e12dd2ea 621
252b5132
RH
622static void
623v850_elf_info_to_howto_rel (abfd, cache_ptr, dst)
b34976b6
AM
624 bfd *abfd ATTRIBUTE_UNUSED;
625 arelent *cache_ptr;
626 Elf_Internal_Rela *dst;
252b5132
RH
627{
628 unsigned int r_type;
629
630 r_type = ELF32_R_TYPE (dst->r_info);
631 BFD_ASSERT (r_type < (unsigned int) R_V850_max);
632 cache_ptr->howto = &v850_elf_howto_table[r_type];
633}
634
435b1e90 635/* Set the howto pointer for a V850 ELF reloc (type RELA). */
252b5132
RH
636static void
637v850_elf_info_to_howto_rela (abfd, cache_ptr, dst)
b34976b6
AM
638 bfd *abfd ATTRIBUTE_UNUSED;
639 arelent * cache_ptr;
640 Elf_Internal_Rela *dst;
252b5132
RH
641{
642 unsigned int r_type;
643
644 r_type = ELF32_R_TYPE (dst->r_info);
645 BFD_ASSERT (r_type < (unsigned int) R_V850_max);
646 cache_ptr->howto = &v850_elf_howto_table[r_type];
647}
252b5132
RH
648\f
649/* Look through the relocs for a section during the first phase, and
650 allocate space in the global offset table or procedure linkage
651 table. */
652
b34976b6 653static bfd_boolean
252b5132 654v850_elf_check_relocs (abfd, info, sec, relocs)
b34976b6
AM
655 bfd *abfd;
656 struct bfd_link_info *info;
657 asection *sec;
658 const Elf_Internal_Rela *relocs;
252b5132 659{
b34976b6 660 bfd_boolean ret = TRUE;
252b5132
RH
661 bfd *dynobj;
662 Elf_Internal_Shdr *symtab_hdr;
663 struct elf_link_hash_entry **sym_hashes;
664 const Elf_Internal_Rela *rel;
665 const Elf_Internal_Rela *rel_end;
666 asection *sreloc;
667 enum v850_reloc_type r_type;
668 int other = 0;
669 const char *common = (const char *)0;
670
1049f94e 671 if (info->relocatable)
b34976b6 672 return TRUE;
252b5132
RH
673
674#ifdef DEBUG
d003868e
AM
675 _bfd_error_handler ("v850_elf_check_relocs called for section %A in %B",
676 sec, abfd);
252b5132
RH
677#endif
678
679 dynobj = elf_hash_table (info)->dynobj;
680 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
681 sym_hashes = elf_sym_hashes (abfd);
682 sreloc = NULL;
683
684 rel_end = relocs + sec->reloc_count;
685 for (rel = relocs; rel < rel_end; rel++)
686 {
687 unsigned long r_symndx;
688 struct elf_link_hash_entry *h;
689
690 r_symndx = ELF32_R_SYM (rel->r_info);
691 if (r_symndx < symtab_hdr->sh_info)
692 h = NULL;
693 else
694 h = sym_hashes[r_symndx - symtab_hdr->sh_info];
695
696 r_type = (enum v850_reloc_type) ELF32_R_TYPE (rel->r_info);
697 switch (r_type)
698 {
699 default:
700 case R_V850_NONE:
701 case R_V850_9_PCREL:
702 case R_V850_22_PCREL:
703 case R_V850_HI16_S:
704 case R_V850_HI16:
705 case R_V850_LO16:
1e50d24d 706 case R_V850_LO16_SPLIT_OFFSET:
e30ddb24
NC
707 case R_V850_ABS32:
708 case R_V850_REL32:
252b5132
RH
709 case R_V850_16:
710 case R_V850_8:
711 case R_V850_CALLT_6_7_OFFSET:
712 case R_V850_CALLT_16_16_OFFSET:
713 break;
714
715 /* This relocation describes the C++ object vtable hierarchy.
716 Reconstruct it for later use during GC. */
717 case R_V850_GNU_VTINHERIT:
c152c796 718 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset))
b34976b6 719 return FALSE;
252b5132
RH
720 break;
721
e12dd2ea
NC
722 /* This relocation describes which C++ vtable entries
723 are actually used. Record for later use during GC. */
252b5132 724 case R_V850_GNU_VTENTRY:
c152c796 725 if (!bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_addend))
b34976b6 726 return FALSE;
252b5132
RH
727 break;
728
729 case R_V850_SDA_16_16_SPLIT_OFFSET:
730 case R_V850_SDA_16_16_OFFSET:
731 case R_V850_SDA_15_16_OFFSET:
732 other = V850_OTHER_SDA;
733 common = ".scommon";
734 goto small_data_common;
435b1e90 735
252b5132
RH
736 case R_V850_ZDA_16_16_SPLIT_OFFSET:
737 case R_V850_ZDA_16_16_OFFSET:
738 case R_V850_ZDA_15_16_OFFSET:
739 other = V850_OTHER_ZDA;
740 common = ".zcommon";
741 goto small_data_common;
435b1e90 742
252b5132
RH
743 case R_V850_TDA_4_5_OFFSET:
744 case R_V850_TDA_4_4_OFFSET:
745 case R_V850_TDA_6_8_OFFSET:
746 case R_V850_TDA_7_8_OFFSET:
747 case R_V850_TDA_7_7_OFFSET:
748 case R_V850_TDA_16_16_OFFSET:
749 other = V850_OTHER_TDA;
750 common = ".tcommon";
751 /* fall through */
752
753#define V850_OTHER_MASK (V850_OTHER_TDA | V850_OTHER_SDA | V850_OTHER_ZDA)
754
755 small_data_common:
756 if (h)
757 {
e12dd2ea
NC
758 /* Flag which type of relocation was used. */
759 h->other |= other;
252b5132
RH
760 if ((h->other & V850_OTHER_MASK) != (other & V850_OTHER_MASK)
761 && (h->other & V850_OTHER_ERROR) == 0)
762 {
763 const char * msg;
764 static char buff[200]; /* XXX */
765
766 switch (h->other & V850_OTHER_MASK)
767 {
768 default:
769 msg = _("Variable `%s' cannot occupy in multiple small data regions");
770 break;
771 case V850_OTHER_SDA | V850_OTHER_ZDA | V850_OTHER_TDA:
772 msg = _("Variable `%s' can only be in one of the small, zero, and tiny data regions");
773 break;
774 case V850_OTHER_SDA | V850_OTHER_ZDA:
775 msg = _("Variable `%s' cannot be in both small and zero data regions simultaneously");
776 break;
777 case V850_OTHER_SDA | V850_OTHER_TDA:
778 msg = _("Variable `%s' cannot be in both small and tiny data regions simultaneously");
779 break;
780 case V850_OTHER_ZDA | V850_OTHER_TDA:
781 msg = _("Variable `%s' cannot be in both zero and tiny data regions simultaneously");
782 break;
783 }
784
785 sprintf (buff, msg, h->root.root.string);
786 info->callbacks->warning (info, buff, h->root.root.string,
dc810e39
AM
787 abfd, h->root.u.def.section,
788 (bfd_vma) 0);
252b5132
RH
789
790 bfd_set_error (bfd_error_bad_value);
791 h->other |= V850_OTHER_ERROR;
b34976b6 792 ret = FALSE;
252b5132
RH
793 }
794 }
795
796 if (h && h->root.type == bfd_link_hash_common
797 && h->root.u.c.p
798 && !strcmp (bfd_get_section_name (abfd, h->root.u.c.p->section), "COMMON"))
799 {
e12dd2ea
NC
800 asection * section;
801
802 section = h->root.u.c.p->section = bfd_make_section_old_way (abfd, common);
252b5132
RH
803 section->flags |= SEC_IS_COMMON;
804 }
805
806#ifdef DEBUG
807 fprintf (stderr, "v850_elf_check_relocs, found %s relocation for %s%s\n",
808 v850_elf_howto_table[ (int)r_type ].name,
809 (h && h->root.root.string) ? h->root.root.string : "<unknown>",
810 (h->root.type == bfd_link_hash_common) ? ", symbol is common" : "");
811#endif
812 break;
813 }
814 }
815
816 return ret;
817}
818
e12dd2ea
NC
819/* In the old version, when an entry was checked out from the table,
820 it was deleted. This produced an error if the entry was needed
821 more than once, as the second attempted retry failed.
822
823 In the current version, the entry is not deleted, instead we set
b34976b6 824 the field 'found' to TRUE. If a second lookup matches the same
e12dd2ea
NC
825 entry, then we know that the hi16s reloc has already been updated
826 and does not need to be updated a second time.
827
828 TODO - TOFIX: If it is possible that we need to restore 2 different
829 addresses from the same table entry, where the first generates an
830 overflow, whilst the second do not, then this code will fail. */
252b5132
RH
831
832typedef struct hi16s_location
833{
b34976b6
AM
834 bfd_vma addend;
835 bfd_byte *address;
252b5132 836 unsigned long counter;
b34976b6
AM
837 bfd_boolean found;
838 struct hi16s_location *next;
252b5132
RH
839}
840hi16s_location;
841
b34976b6
AM
842static hi16s_location *previous_hi16s;
843static hi16s_location *free_hi16s;
844static unsigned long hi16s_counter;
252b5132
RH
845
846static void
847remember_hi16s_reloc (abfd, addend, address)
b34976b6
AM
848 bfd *abfd;
849 bfd_vma addend;
850 bfd_byte *address;
252b5132
RH
851{
852 hi16s_location * entry = NULL;
dc810e39 853 bfd_size_type amt = sizeof (* free_hi16s);
435b1e90 854
252b5132
RH
855 /* Find a free structure. */
856 if (free_hi16s == NULL)
dc810e39 857 free_hi16s = (hi16s_location *) bfd_zalloc (abfd, amt);
252b5132
RH
858
859 entry = free_hi16s;
860 free_hi16s = free_hi16s->next;
435b1e90 861
252b5132
RH
862 entry->addend = addend;
863 entry->address = address;
864 entry->counter = hi16s_counter ++;
b34976b6 865 entry->found = FALSE;
252b5132
RH
866 entry->next = previous_hi16s;
867 previous_hi16s = entry;
435b1e90 868
252b5132
RH
869 /* Cope with wrap around of our counter. */
870 if (hi16s_counter == 0)
871 {
872 /* XXX - Assume that all counter entries differ only in their low 16 bits. */
873 for (entry = previous_hi16s; entry != NULL; entry = entry->next)
874 entry->counter &= 0xffff;
875
876 hi16s_counter = 0x10000;
877 }
435b1e90 878
252b5132
RH
879 return;
880}
881
882static bfd_byte *
883find_remembered_hi16s_reloc (addend, already_found)
b34976b6
AM
884 bfd_vma addend;
885 bfd_boolean *already_found;
252b5132 886{
b34976b6
AM
887 hi16s_location *match = NULL;
888 hi16s_location *entry;
889 hi16s_location *previous = NULL;
890 hi16s_location *prev;
891 bfd_byte *addr;
435b1e90 892
252b5132
RH
893 /* Search the table. Record the most recent entry that matches. */
894 for (entry = previous_hi16s; entry; entry = entry->next)
895 {
896 if (entry->addend == addend
897 && (match == NULL || match->counter < entry->counter))
898 {
899 previous = prev;
900 match = entry;
901 }
435b1e90 902
252b5132
RH
903 prev = entry;
904 }
905
906 if (match == NULL)
907 return NULL;
908
909 /* Extract the address. */
910 addr = match->address;
911
4cc11e76 912 /* Remember if this entry has already been used before. */
252b5132
RH
913 if (already_found)
914 * already_found = match->found;
915
916 /* Note that this entry has now been used. */
b34976b6 917 match->found = TRUE;
435b1e90 918
252b5132 919 return addr;
435b1e90 920}
252b5132 921
1e50d24d
RS
922/* Calculate the final operand value for a R_V850_LO16 or
923 R_V850_LO16_SPLIT_OFFSET. *INSN is the current operand value and
924 ADDEND is the sum of the relocation symbol and offset. Store the
925 operand value in *INSN and return true on success.
926
927 The assembler has already done some of this: If the value stored in
928 the instruction has its 15th bit set, (counting from zero) then the
929 assembler will have added 1 to the value stored in the associated
930 HI16S reloc. So for example, these relocations:
931
932 movhi hi( fred ), r0, r1
933 movea lo( fred ), r1, r1
934
935 will store 0 in the value fields for the MOVHI and MOVEA instructions
936 and addend will be the address of fred, but for these instructions:
937
938 movhi hi( fred + 0x123456), r0, r1
939 movea lo( fred + 0x123456), r1, r1
940
941 the value stored in the MOVHI instruction will be 0x12 and the value
942 stored in the MOVEA instruction will be 0x3456. If however the
943 instructions were:
944
945 movhi hi( fred + 0x10ffff), r0, r1
946 movea lo( fred + 0x10ffff), r1, r1
947
948 then the value stored in the MOVHI instruction would be 0x11 (not
949 0x10) and the value stored in the MOVEA instruction would be 0xffff.
950 Thus (assuming for the moment that the addend is 0), at run time the
951 MOVHI instruction loads 0x110000 into r1, then the MOVEA instruction
952 adds 0xffffffff (sign extension!) producing 0x10ffff. Similarly if
953 the instructions were:
954
955 movhi hi( fred - 1), r0, r1
956 movea lo( fred - 1), r1, r1
957
958 then 0 is stored in the MOVHI instruction and -1 is stored in the
959 MOVEA instruction.
960
961 Overflow can occur if the addition of the value stored in the
962 instruction plus the addend sets the 15th bit when before it was clear.
963 This is because the 15th bit will be sign extended into the high part,
964 thus reducing its value by one, but since the 15th bit was originally
965 clear, the assembler will not have added 1 to the previous HI16S reloc
966 to compensate for this effect. For example:
967
968 movhi hi( fred + 0x123456), r0, r1
969 movea lo( fred + 0x123456), r1, r1
970
971 The value stored in HI16S reloc is 0x12, the value stored in the LO16
972 reloc is 0x3456. If we assume that the address of fred is 0x00007000
973 then the relocations become:
974
975 HI16S: 0x0012 + (0x00007000 >> 16) = 0x12
976 LO16: 0x3456 + (0x00007000 & 0xffff) = 0xa456
977
978 but when the instructions are executed, the MOVEA instruction's value
979 is signed extended, so the sum becomes:
980
981 0x00120000
982 + 0xffffa456
983 ------------
984 0x0011a456 but 'fred + 0x123456' = 0x0012a456
985
986 Note that if the 15th bit was set in the value stored in the LO16
987 reloc, then we do not have to do anything:
988
989 movhi hi( fred + 0x10ffff), r0, r1
990 movea lo( fred + 0x10ffff), r1, r1
991
992 HI16S: 0x0011 + (0x00007000 >> 16) = 0x11
993 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff
994
995 0x00110000
996 + 0x00006fff
997 ------------
998 0x00116fff = fred + 0x10ffff = 0x7000 + 0x10ffff
999
1000 Overflow can also occur if the computation carries into the 16th bit
1001 and it also results in the 15th bit having the same value as the 15th
1002 bit of the original value. What happens is that the HI16S reloc
1003 will have already examined the 15th bit of the original value and
1004 added 1 to the high part if the bit is set. This compensates for the
1005 sign extension of 15th bit of the result of the computation. But now
1006 there is a carry into the 16th bit, and this has not been allowed for.
1007
1008 So, for example if fred is at address 0xf000:
1009
1010 movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is set]
1011 movea lo( fred + 0xffff), r1, r1
1012
1013 HI16S: 0x0001 + (0x0000f000 >> 16) = 0x0001
1014 LO16: 0xffff + (0x0000f000 & 0xffff) = 0xefff (carry into bit 16 is lost)
1015
1016 0x00010000
1017 + 0xffffefff
1018 ------------
1019 0x0000efff but 'fred + 0xffff' = 0x0001efff
1020
1021 Similarly, if the 15th bit remains clear, but overflow occurs into
1022 the 16th bit then (assuming the address of fred is 0xf000):
1023
1024 movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is clear]
1025 movea lo( fred + 0x7000), r1, r1
1026
1027 HI16S: 0x0000 + (0x0000f000 >> 16) = 0x0000
1028 LO16: 0x7000 + (0x0000f000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
1029
1030 0x00000000
1031 + 0x00006fff
1032 ------------
1033 0x00006fff but 'fred + 0x7000' = 0x00016fff
1034
1035 Note - there is no need to change anything if a carry occurs, and the
1036 15th bit changes its value from being set to being clear, as the HI16S
1037 reloc will have already added in 1 to the high part for us:
1038
1039 movhi hi( fred + 0xffff), r0, r1 [bit 15 of the offset is set]
1040 movea lo( fred + 0xffff), r1, r1
1041
1042 HI16S: 0x0001 + (0x00007000 >> 16)
1043 LO16: 0xffff + (0x00007000 & 0xffff) = 0x6fff (carry into bit 16 is lost)
1044
1045 0x00010000
1046 + 0x00006fff (bit 15 not set, so the top half is zero)
1047 ------------
1048 0x00016fff which is right (assuming that fred is at 0x7000)
1049
1050 but if the 15th bit goes from being clear to being set, then we must
1051 once again handle overflow:
1052
1053 movhi hi( fred + 0x7000), r0, r1 [bit 15 of the offset is clear]
1054 movea lo( fred + 0x7000), r1, r1
1055
1056 HI16S: 0x0000 + (0x0000ffff >> 16)
1057 LO16: 0x7000 + (0x0000ffff & 0xffff) = 0x6fff (carry into bit 16)
1058
1059 0x00000000
1060 + 0x00006fff (bit 15 not set, so the top half is zero)
1061 ------------
1062 0x00006fff which is wrong (assuming that fred is at 0xffff). */
1063
1064static bfd_boolean
1065v850_elf_perform_lo16_relocation (bfd *abfd, unsigned long *insn,
1066 unsigned long addend)
1067{
1068#define BIT15_SET(x) ((x) & 0x8000)
1069#define OVERFLOWS(a,i) ((((a) & 0xffff) + (i)) > 0xffff)
1070 if ((BIT15_SET (*insn + addend) && ! BIT15_SET (addend))
1071 || (OVERFLOWS (addend, *insn)
1072 && ((! BIT15_SET (*insn)) || (BIT15_SET (addend)))))
1073 {
1074 bfd_boolean already_updated;
1075 bfd_byte *hi16s_address = find_remembered_hi16s_reloc
1076 (addend, & already_updated);
1077
1078 /* Amend the matching HI16_S relocation. */
1079 if (hi16s_address != NULL)
1080 {
1081 if (! already_updated)
1082 {
1083 unsigned long hi_insn = bfd_get_16 (abfd, hi16s_address);
1084 hi_insn += 1;
1085 bfd_put_16 (abfd, hi_insn, hi16s_address);
1086 }
1087 }
1088 else
1089 {
1090 fprintf (stderr, _("FAILED to find previous HI16 reloc\n"));
1091 return FALSE;
1092 }
1093 }
1094#undef OVERFLOWS
1095#undef BIT15_SET
1096
1097 /* Do not complain if value has top bit set, as this has been
1098 anticipated. */
1099 *insn = (*insn + addend) & 0xffff;
1100 return TRUE;
1101}
1102
252b5132 1103/* FIXME: The code here probably ought to be removed and the code in reloc.c
4cc11e76 1104 allowed to do its stuff instead. At least for most of the relocs, anyway. */
e12dd2ea 1105
252b5132
RH
1106static bfd_reloc_status_type
1107v850_elf_perform_relocation (abfd, r_type, addend, address)
dc810e39
AM
1108 bfd *abfd;
1109 unsigned int r_type;
1110 bfd_vma addend;
1111 bfd_byte *address;
252b5132
RH
1112{
1113 unsigned long insn;
1e50d24d 1114 unsigned long result;
252b5132 1115 bfd_signed_vma saddend = (bfd_signed_vma) addend;
435b1e90 1116
252b5132
RH
1117 switch (r_type)
1118 {
1119 default:
1120 /* fprintf (stderr, "reloc type %d not SUPPORTED\n", r_type ); */
1121 return bfd_reloc_notsupported;
435b1e90 1122
e30ddb24
NC
1123 case R_V850_REL32:
1124 case R_V850_ABS32:
252b5132
RH
1125 bfd_put_32 (abfd, addend, address);
1126 return bfd_reloc_ok;
435b1e90 1127
252b5132
RH
1128 case R_V850_22_PCREL:
1129 if (saddend > 0x1fffff || saddend < -0x200000)
1130 return bfd_reloc_overflow;
435b1e90 1131
252b5132
RH
1132 if ((addend % 2) != 0)
1133 return bfd_reloc_dangerous;
435b1e90 1134
252b5132
RH
1135 insn = bfd_get_32 (abfd, address);
1136 insn &= ~0xfffe003f;
1137 insn |= (((addend & 0xfffe) << 16) | ((addend & 0x3f0000) >> 16));
dc810e39 1138 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 1139 return bfd_reloc_ok;
435b1e90 1140
252b5132
RH
1141 case R_V850_9_PCREL:
1142 if (saddend > 0xff || saddend < -0x100)
1143 return bfd_reloc_overflow;
435b1e90 1144
252b5132
RH
1145 if ((addend % 2) != 0)
1146 return bfd_reloc_dangerous;
435b1e90 1147
252b5132
RH
1148 insn = bfd_get_16 (abfd, address);
1149 insn &= ~ 0xf870;
1150 insn |= ((addend & 0x1f0) << 7) | ((addend & 0x0e) << 3);
1151 break;
435b1e90 1152
252b5132
RH
1153 case R_V850_HI16:
1154 addend += (bfd_get_16 (abfd, address) << 16);
1155 addend = (addend >> 16);
1156 insn = addend;
1157 break;
435b1e90 1158
252b5132
RH
1159 case R_V850_HI16_S:
1160 /* Remember where this relocation took place. */
1161 remember_hi16s_reloc (abfd, addend, address);
1162
1163 addend += (bfd_get_16 (abfd, address) << 16);
1164 addend = (addend >> 16) + ((addend & 0x8000) != 0);
435b1e90
KH
1165
1166 /* This relocation cannot overflow. */
252b5132
RH
1167 if (addend > 0x7fff)
1168 addend = 0;
435b1e90 1169
252b5132
RH
1170 insn = addend;
1171 break;
435b1e90 1172
252b5132 1173 case R_V850_LO16:
1e50d24d
RS
1174 insn = bfd_get_16 (abfd, address);
1175 if (! v850_elf_perform_lo16_relocation (abfd, &insn, addend))
1176 return bfd_reloc_overflow;
1177 break;
252b5132
RH
1178
1179 case R_V850_8:
1180 addend += (char) bfd_get_8 (abfd, address);
1181
1182 saddend = (bfd_signed_vma) addend;
435b1e90 1183
252b5132
RH
1184 if (saddend > 0x7f || saddend < -0x80)
1185 return bfd_reloc_overflow;
1186
1187 bfd_put_8 (abfd, addend, address);
1188 return bfd_reloc_ok;
1189
1190 case R_V850_CALLT_16_16_OFFSET:
1191 addend += bfd_get_16 (abfd, address);
435b1e90 1192
252b5132 1193 saddend = (bfd_signed_vma) addend;
435b1e90 1194
252b5132
RH
1195 if (saddend > 0xffff || saddend < 0)
1196 return bfd_reloc_overflow;
1197
1198 insn = addend;
1199 break;
435b1e90 1200
252b5132
RH
1201 case R_V850_16:
1202
435b1e90 1203 /* drop through */
252b5132
RH
1204 case R_V850_SDA_16_16_OFFSET:
1205 case R_V850_ZDA_16_16_OFFSET:
1206 case R_V850_TDA_16_16_OFFSET:
1207 addend += bfd_get_16 (abfd, address);
435b1e90 1208
252b5132 1209 saddend = (bfd_signed_vma) addend;
435b1e90 1210
252b5132
RH
1211 if (saddend > 0x7fff || saddend < -0x8000)
1212 return bfd_reloc_overflow;
1213
1214 insn = addend;
1215 break;
435b1e90 1216
252b5132
RH
1217 case R_V850_SDA_15_16_OFFSET:
1218 case R_V850_ZDA_15_16_OFFSET:
1219 insn = bfd_get_16 (abfd, address);
1220 addend += (insn & 0xfffe);
435b1e90 1221
252b5132 1222 saddend = (bfd_signed_vma) addend;
435b1e90 1223
252b5132
RH
1224 if (saddend > 0x7ffe || saddend < -0x8000)
1225 return bfd_reloc_overflow;
435b1e90 1226
252b5132
RH
1227 if (addend & 1)
1228 return bfd_reloc_dangerous;
435b1e90 1229
dc810e39 1230 insn = (addend &~ (bfd_vma) 1) | (insn & 1);
252b5132 1231 break;
435b1e90 1232
252b5132
RH
1233 case R_V850_TDA_6_8_OFFSET:
1234 insn = bfd_get_16 (abfd, address);
1235 addend += ((insn & 0x7e) << 1);
435b1e90 1236
252b5132 1237 saddend = (bfd_signed_vma) addend;
435b1e90 1238
252b5132
RH
1239 if (saddend > 0xfc || saddend < 0)
1240 return bfd_reloc_overflow;
435b1e90 1241
252b5132
RH
1242 if (addend & 3)
1243 return bfd_reloc_dangerous;
435b1e90 1244
252b5132
RH
1245 insn &= 0xff81;
1246 insn |= (addend >> 1);
1247 break;
435b1e90 1248
252b5132
RH
1249 case R_V850_TDA_7_8_OFFSET:
1250 insn = bfd_get_16 (abfd, address);
1251 addend += ((insn & 0x7f) << 1);
435b1e90 1252
252b5132 1253 saddend = (bfd_signed_vma) addend;
435b1e90 1254
252b5132
RH
1255 if (saddend > 0xfe || saddend < 0)
1256 return bfd_reloc_overflow;
435b1e90 1257
252b5132
RH
1258 if (addend & 1)
1259 return bfd_reloc_dangerous;
435b1e90 1260
252b5132
RH
1261 insn &= 0xff80;
1262 insn |= (addend >> 1);
1263 break;
435b1e90 1264
252b5132
RH
1265 case R_V850_TDA_7_7_OFFSET:
1266 insn = bfd_get_16 (abfd, address);
1267 addend += insn & 0x7f;
435b1e90 1268
252b5132 1269 saddend = (bfd_signed_vma) addend;
435b1e90 1270
252b5132
RH
1271 if (saddend > 0x7f || saddend < 0)
1272 return bfd_reloc_overflow;
435b1e90 1273
252b5132
RH
1274 insn &= 0xff80;
1275 insn |= addend;
1276 break;
435b1e90 1277
252b5132
RH
1278 case R_V850_TDA_4_5_OFFSET:
1279 insn = bfd_get_16 (abfd, address);
1280 addend += ((insn & 0xf) << 1);
435b1e90 1281
252b5132 1282 saddend = (bfd_signed_vma) addend;
435b1e90 1283
252b5132
RH
1284 if (saddend > 0x1e || saddend < 0)
1285 return bfd_reloc_overflow;
435b1e90 1286
252b5132
RH
1287 if (addend & 1)
1288 return bfd_reloc_dangerous;
435b1e90 1289
252b5132
RH
1290 insn &= 0xfff0;
1291 insn |= (addend >> 1);
1292 break;
435b1e90 1293
252b5132
RH
1294 case R_V850_TDA_4_4_OFFSET:
1295 insn = bfd_get_16 (abfd, address);
1296 addend += insn & 0xf;
435b1e90 1297
252b5132 1298 saddend = (bfd_signed_vma) addend;
435b1e90 1299
252b5132
RH
1300 if (saddend > 0xf || saddend < 0)
1301 return bfd_reloc_overflow;
435b1e90 1302
252b5132
RH
1303 insn &= 0xfff0;
1304 insn |= addend;
1305 break;
435b1e90 1306
1e50d24d
RS
1307 case R_V850_LO16_SPLIT_OFFSET:
1308 insn = bfd_get_32 (abfd, address);
1309 result = ((insn & 0xfffe0000) >> 16) | ((insn & 0x20) >> 5);
1310 if (! v850_elf_perform_lo16_relocation (abfd, &result, addend))
1311 return bfd_reloc_overflow;
1312 insn = (((result << 16) & 0xfffe0000)
1313 | ((result << 5) & 0x20)
1314 | (insn & ~0xfffe0020));
1315 bfd_put_32 (abfd, insn, address);
1316 return bfd_reloc_ok;
1317
252b5132
RH
1318 case R_V850_ZDA_16_16_SPLIT_OFFSET:
1319 case R_V850_SDA_16_16_SPLIT_OFFSET:
1320 insn = bfd_get_32 (abfd, address);
1321 addend += ((insn & 0xfffe0000) >> 16) + ((insn & 0x20) >> 5);
435b1e90 1322
252b5132 1323 saddend = (bfd_signed_vma) addend;
435b1e90 1324
252b5132
RH
1325 if (saddend > 0x7fff || saddend < -0x8000)
1326 return bfd_reloc_overflow;
435b1e90 1327
252b5132
RH
1328 insn &= 0x0001ffdf;
1329 insn |= (addend & 1) << 5;
dc810e39 1330 insn |= (addend &~ (bfd_vma) 1) << 16;
435b1e90 1331
dc810e39 1332 bfd_put_32 (abfd, (bfd_vma) insn, address);
252b5132 1333 return bfd_reloc_ok;
435b1e90 1334
252b5132
RH
1335 case R_V850_CALLT_6_7_OFFSET:
1336 insn = bfd_get_16 (abfd, address);
1337 addend += ((insn & 0x3f) << 1);
435b1e90 1338
252b5132 1339 saddend = (bfd_signed_vma) addend;
435b1e90 1340
252b5132
RH
1341 if (saddend > 0x7e || saddend < 0)
1342 return bfd_reloc_overflow;
435b1e90 1343
252b5132
RH
1344 if (addend & 1)
1345 return bfd_reloc_dangerous;
435b1e90 1346
252b5132
RH
1347 insn &= 0xff80;
1348 insn |= (addend >> 1);
1349 break;
1350
1351 case R_V850_GNU_VTINHERIT:
1352 case R_V850_GNU_VTENTRY:
1353 return bfd_reloc_ok;
1354
1355 }
1356
dc810e39 1357 bfd_put_16 (abfd, (bfd_vma) insn, address);
252b5132
RH
1358 return bfd_reloc_ok;
1359}
252b5132
RH
1360\f
1361/* Insert the addend into the instruction. */
e12dd2ea 1362
252b5132
RH
1363static bfd_reloc_status_type
1364v850_elf_reloc (abfd, reloc, symbol, data, isection, obfd, err)
b34976b6
AM
1365 bfd *abfd ATTRIBUTE_UNUSED;
1366 arelent *reloc;
1367 asymbol *symbol;
1368 PTR data ATTRIBUTE_UNUSED;
1369 asection *isection;
1370 bfd *obfd;
1371 char **err ATTRIBUTE_UNUSED;
252b5132
RH
1372{
1373 long relocation;
435b1e90 1374
252b5132
RH
1375 /* If there is an output BFD,
1376 and the symbol is not a section name (which is only defined at final link time),
1377 and either we are not putting the addend into the instruction
e12dd2ea 1378 or the addend is zero, so there is nothing to add into the instruction
252b5132
RH
1379 then just fixup the address and return. */
1380 if (obfd != (bfd *) NULL
1381 && (symbol->flags & BSF_SECTION_SYM) == 0
1382 && (! reloc->howto->partial_inplace
1383 || reloc->addend == 0))
1384 {
1385 reloc->address += isection->output_offset;
1386 return bfd_reloc_ok;
1387 }
435b1e90 1388
252b5132
RH
1389 /* Catch relocs involving undefined symbols. */
1390 if (bfd_is_und_section (symbol->section)
1391 && (symbol->flags & BSF_WEAK) == 0
1392 && obfd == NULL)
1393 return bfd_reloc_undefined;
1394
1395 /* We handle final linking of some relocs ourselves. */
1396
1397 /* Is the address of the relocation really within the section? */
07515404 1398 if (reloc->address > bfd_get_section_limit (abfd, isection))
252b5132 1399 return bfd_reloc_outofrange;
435b1e90 1400
4cc11e76 1401 /* Work out which section the relocation is targeted at and the
252b5132 1402 initial relocation command value. */
435b1e90 1403
b34976b6 1404 if (reloc->howto->pc_relative)
86aba9db
NC
1405 return bfd_reloc_ok;
1406
252b5132
RH
1407 /* Get symbol value. (Common symbols are special.) */
1408 if (bfd_is_com_section (symbol->section))
1409 relocation = 0;
1410 else
1411 relocation = symbol->value;
435b1e90 1412
252b5132
RH
1413 /* Convert input-section-relative symbol value to absolute + addend. */
1414 relocation += symbol->section->output_section->vma;
1415 relocation += symbol->section->output_offset;
1416 relocation += reloc->addend;
435b1e90 1417
435b1e90 1418 reloc->addend = relocation;
252b5132
RH
1419 return bfd_reloc_ok;
1420}
86aba9db
NC
1421
1422/* This function is used for relocs which are only used
1423 for relaxing, which the linker should otherwise ignore. */
1424
1425static bfd_reloc_status_type
1426v850_elf_ignore_reloc (abfd, reloc_entry, symbol, data, input_section,
1427 output_bfd, error_message)
b34976b6
AM
1428 bfd *abfd ATTRIBUTE_UNUSED;
1429 arelent *reloc_entry;
1430 asymbol *symbol ATTRIBUTE_UNUSED;
1431 PTR data ATTRIBUTE_UNUSED;
1432 asection *input_section;
1433 bfd *output_bfd;
1434 char **error_message ATTRIBUTE_UNUSED;
86aba9db
NC
1435{
1436 if (output_bfd != NULL)
1437 reloc_entry->address += input_section->output_offset;
1438
1439 return bfd_reloc_ok;
1440}
252b5132 1441\f
b34976b6 1442static bfd_boolean
252b5132 1443v850_elf_is_local_label_name (abfd, name)
b34976b6
AM
1444 bfd *abfd ATTRIBUTE_UNUSED;
1445 const char *name;
252b5132
RH
1446{
1447 return ( (name[0] == '.' && (name[1] == 'L' || name[1] == '.'))
1448 || (name[0] == '_' && name[1] == '.' && name[2] == 'L' && name[3] == '_'));
1449}
252b5132 1450\f
5cec6941
NC
1451/* We overload some of the bfd_reloc error codes for own purposes. */
1452#define bfd_reloc_gp_not_found bfd_reloc_other
1453#define bfd_reloc_ep_not_found bfd_reloc_continue
1454#define bfd_reloc_ctbp_not_found (bfd_reloc_dangerous + 1)
1455
252b5132 1456/* Perform a relocation as part of a final link. */
e12dd2ea 1457
252b5132
RH
1458static bfd_reloc_status_type
1459v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
86aba9db
NC
1460 input_section, contents, offset, value,
1461 addend, info, sym_sec, is_local)
b34976b6
AM
1462 reloc_howto_type *howto;
1463 bfd *input_bfd;
1464 bfd *output_bfd ATTRIBUTE_UNUSED;
1465 asection *input_section;
1466 bfd_byte *contents;
1467 bfd_vma offset;
1468 bfd_vma value;
1469 bfd_vma addend;
1470 struct bfd_link_info *info;
1471 asection *sym_sec;
1472 int is_local ATTRIBUTE_UNUSED;
252b5132 1473{
b34976b6
AM
1474 unsigned int r_type = howto->type;
1475 bfd_byte *hit_data = contents + offset;
252b5132
RH
1476
1477 /* Adjust the value according to the relocation. */
1478 switch (r_type)
1479 {
1480 case R_V850_9_PCREL:
1481 value -= (input_section->output_section->vma
1482 + input_section->output_offset);
1483 value -= offset;
1484 break;
435b1e90 1485
252b5132
RH
1486 case R_V850_22_PCREL:
1487 value -= (input_section->output_section->vma
1488 + input_section->output_offset
1489 + offset);
1490
232fb1a3
NC
1491 /* If the sign extension will corrupt the value then we have overflowed. */
1492 if (((value & 0xff000000) != 0x0) && ((value & 0xff000000) != 0xff000000))
1493 return bfd_reloc_overflow;
435b1e90 1494
e12dd2ea
NC
1495 /* Only the bottom 24 bits of the PC are valid */
1496 value = SEXT24 (value);
252b5132 1497 break;
435b1e90 1498
e30ddb24
NC
1499 case R_V850_REL32:
1500 value -= (input_section->output_section->vma
1501 + input_section->output_offset
1502 + offset);
1503 break;
1504
252b5132
RH
1505 case R_V850_HI16_S:
1506 case R_V850_HI16:
1507 case R_V850_LO16:
1e50d24d 1508 case R_V850_LO16_SPLIT_OFFSET:
252b5132 1509 case R_V850_16:
e30ddb24 1510 case R_V850_ABS32:
252b5132
RH
1511 case R_V850_8:
1512 break;
1513
435b1e90 1514 case R_V850_ZDA_15_16_OFFSET:
252b5132
RH
1515 case R_V850_ZDA_16_16_OFFSET:
1516 case R_V850_ZDA_16_16_SPLIT_OFFSET:
1517 if (sym_sec == NULL)
1518 return bfd_reloc_undefined;
435b1e90 1519
252b5132
RH
1520 value -= sym_sec->output_section->vma;
1521 break;
1522
1523 case R_V850_SDA_15_16_OFFSET:
1524 case R_V850_SDA_16_16_OFFSET:
1525 case R_V850_SDA_16_16_SPLIT_OFFSET:
1526 {
1527 unsigned long gp;
1528 struct bfd_link_hash_entry * h;
1529
1530 if (sym_sec == NULL)
1531 return bfd_reloc_undefined;
435b1e90 1532
252b5132 1533 /* Get the value of __gp. */
b34976b6 1534 h = bfd_link_hash_lookup (info->hash, "__gp", FALSE, FALSE, TRUE);
252b5132
RH
1535 if (h == (struct bfd_link_hash_entry *) NULL
1536 || h->type != bfd_link_hash_defined)
5cec6941 1537 return bfd_reloc_gp_not_found;
252b5132
RH
1538
1539 gp = (h->u.def.value
1540 + h->u.def.section->output_section->vma
1541 + h->u.def.section->output_offset);
1542
1543 value -= sym_sec->output_section->vma;
1544 value -= (gp - sym_sec->output_section->vma);
1545 }
1546 break;
1547
1548 case R_V850_TDA_4_4_OFFSET:
1549 case R_V850_TDA_4_5_OFFSET:
1550 case R_V850_TDA_16_16_OFFSET:
1551 case R_V850_TDA_7_7_OFFSET:
1552 case R_V850_TDA_7_8_OFFSET:
1553 case R_V850_TDA_6_8_OFFSET:
1554 {
1555 unsigned long ep;
1556 struct bfd_link_hash_entry * h;
435b1e90 1557
252b5132 1558 /* Get the value of __ep. */
b34976b6 1559 h = bfd_link_hash_lookup (info->hash, "__ep", FALSE, FALSE, TRUE);
252b5132
RH
1560 if (h == (struct bfd_link_hash_entry *) NULL
1561 || h->type != bfd_link_hash_defined)
5cec6941 1562 return bfd_reloc_ep_not_found;
252b5132
RH
1563
1564 ep = (h->u.def.value
1565 + h->u.def.section->output_section->vma
1566 + h->u.def.section->output_offset);
1567
1568 value -= ep;
1569 }
1570 break;
435b1e90 1571
252b5132
RH
1572 case R_V850_CALLT_6_7_OFFSET:
1573 {
1574 unsigned long ctbp;
1575 struct bfd_link_hash_entry * h;
435b1e90 1576
252b5132 1577 /* Get the value of __ctbp. */
b34976b6 1578 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
252b5132
RH
1579 if (h == (struct bfd_link_hash_entry *) NULL
1580 || h->type != bfd_link_hash_defined)
5cec6941 1581 return bfd_reloc_ctbp_not_found;
252b5132
RH
1582
1583 ctbp = (h->u.def.value
1584 + h->u.def.section->output_section->vma
1585 + h->u.def.section->output_offset);
1586 value -= ctbp;
1587 }
1588 break;
435b1e90 1589
252b5132
RH
1590 case R_V850_CALLT_16_16_OFFSET:
1591 {
1592 unsigned long ctbp;
1593 struct bfd_link_hash_entry * h;
1594
1595 if (sym_sec == NULL)
1596 return bfd_reloc_undefined;
435b1e90 1597
252b5132 1598 /* Get the value of __ctbp. */
b34976b6 1599 h = bfd_link_hash_lookup (info->hash, "__ctbp", FALSE, FALSE, TRUE);
252b5132
RH
1600 if (h == (struct bfd_link_hash_entry *) NULL
1601 || h->type != bfd_link_hash_defined)
5cec6941 1602 return bfd_reloc_ctbp_not_found;
252b5132
RH
1603
1604 ctbp = (h->u.def.value
1605 + h->u.def.section->output_section->vma
1606 + h->u.def.section->output_offset);
1607
1608 value -= sym_sec->output_section->vma;
1609 value -= (ctbp - sym_sec->output_section->vma);
1610 }
1611 break;
435b1e90 1612
252b5132
RH
1613 case R_V850_NONE:
1614 case R_V850_GNU_VTINHERIT:
1615 case R_V850_GNU_VTENTRY:
86aba9db
NC
1616 case R_V850_LONGCALL:
1617 case R_V850_LONGJUMP:
1618 case R_V850_ALIGN:
252b5132
RH
1619 return bfd_reloc_ok;
1620
1621 default:
1622 return bfd_reloc_notsupported;
1623 }
1624
1625 /* Perform the relocation. */
435b1e90 1626 return v850_elf_perform_relocation (input_bfd, r_type, value + addend, hit_data);
252b5132 1627}
252b5132
RH
1628\f
1629/* Relocate an V850 ELF section. */
e12dd2ea 1630
b34976b6 1631static bfd_boolean
252b5132
RH
1632v850_elf_relocate_section (output_bfd, info, input_bfd, input_section,
1633 contents, relocs, local_syms, local_sections)
b34976b6
AM
1634 bfd *output_bfd;
1635 struct bfd_link_info *info;
1636 bfd *input_bfd;
1637 asection *input_section;
1638 bfd_byte *contents;
1639 Elf_Internal_Rela *relocs;
1640 Elf_Internal_Sym *local_syms;
1641 asection **local_sections;
252b5132 1642{
b34976b6
AM
1643 Elf_Internal_Shdr *symtab_hdr;
1644 struct elf_link_hash_entry **sym_hashes;
1645 Elf_Internal_Rela *rel;
1646 Elf_Internal_Rela *relend;
252b5132 1647
1049f94e 1648 if (info->relocatable)
b34976b6 1649 return TRUE;
f0fe0e16 1650
252b5132
RH
1651 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr;
1652 sym_hashes = elf_sym_hashes (input_bfd);
1653
1654 if (sym_hashes == NULL)
1655 {
1656 info->callbacks->warning
dc810e39
AM
1657 (info, "no hash table available",
1658 NULL, input_bfd, input_section, (bfd_vma) 0);
252b5132 1659
b34976b6 1660 return FALSE;
252b5132 1661 }
435b1e90 1662
252b5132
RH
1663 /* Reset the list of remembered HI16S relocs to empty. */
1664 free_hi16s = previous_hi16s;
1665 previous_hi16s = NULL;
1666 hi16s_counter = 0;
435b1e90 1667
252b5132
RH
1668 rel = relocs;
1669 relend = relocs + input_section->reloc_count;
1670 for (; rel < relend; rel++)
1671 {
b34976b6
AM
1672 int r_type;
1673 reloc_howto_type *howto;
1674 unsigned long r_symndx;
1675 Elf_Internal_Sym *sym;
1676 asection *sec;
1677 struct elf_link_hash_entry *h;
1678 bfd_vma relocation;
1679 bfd_reloc_status_type r;
252b5132
RH
1680
1681 r_symndx = ELF32_R_SYM (rel->r_info);
1682 r_type = ELF32_R_TYPE (rel->r_info);
1683
1684 if (r_type == R_V850_GNU_VTENTRY
1685 || r_type == R_V850_GNU_VTINHERIT)
1686 continue;
1687
252b5132 1688 /* This is a final link. */
f0fe0e16 1689 howto = v850_elf_howto_table + r_type;
252b5132
RH
1690 h = NULL;
1691 sym = NULL;
1692 sec = NULL;
1693 if (r_symndx < symtab_hdr->sh_info)
1694 {
1695 sym = local_syms + r_symndx;
1696 sec = local_sections[r_symndx];
8517fae7 1697 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
252b5132
RH
1698 }
1699 else
1700 {
59c2e50f 1701 bfd_boolean unresolved_reloc, warned;
435b1e90 1702
b2a8e766
AM
1703 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
1704 r_symndx, symtab_hdr, sym_hashes,
1705 h, sec, relocation,
1706 unresolved_reloc, warned);
252b5132
RH
1707 }
1708
e12dd2ea 1709 /* FIXME: We should use the addend, but the COFF relocations don't. */
252b5132
RH
1710 r = v850_elf_final_link_relocate (howto, input_bfd, output_bfd,
1711 input_section,
1712 contents, rel->r_offset,
1713 relocation, rel->r_addend,
1714 info, sec, h == NULL);
1715
1716 if (r != bfd_reloc_ok)
1717 {
1718 const char * name;
1719 const char * msg = (const char *)0;
1720
1721 if (h != NULL)
1722 name = h->root.root.string;
1723 else
1724 {
1725 name = (bfd_elf_string_from_elf_section
1726 (input_bfd, symtab_hdr->sh_link, sym->st_name));
1727 if (name == NULL || *name == '\0')
1728 name = bfd_section_name (input_bfd, sec);
1729 }
1730
1731 switch (r)
1732 {
1733 case bfd_reloc_overflow:
1734 if (! ((*info->callbacks->reloc_overflow)
dfeffb9f
L
1735 (info, (h ? &h->root : NULL), name, howto->name,
1736 (bfd_vma) 0, input_bfd, input_section,
1737 rel->r_offset)))
b34976b6 1738 return FALSE;
252b5132
RH
1739 break;
1740
1741 case bfd_reloc_undefined:
1742 if (! ((*info->callbacks->undefined_symbol)
1743 (info, name, input_bfd, input_section,
b34976b6
AM
1744 rel->r_offset, TRUE)))
1745 return FALSE;
252b5132
RH
1746 break;
1747
1748 case bfd_reloc_outofrange:
1749 msg = _("internal error: out of range error");
1750 goto common_error;
1751
1752 case bfd_reloc_notsupported:
1753 msg = _("internal error: unsupported relocation error");
1754 goto common_error;
1755
1756 case bfd_reloc_dangerous:
1757 msg = _("internal error: dangerous relocation");
1758 goto common_error;
1759
5cec6941 1760 case bfd_reloc_gp_not_found:
252b5132
RH
1761 msg = _("could not locate special linker symbol __gp");
1762 goto common_error;
1763
5cec6941 1764 case bfd_reloc_ep_not_found:
252b5132
RH
1765 msg = _("could not locate special linker symbol __ep");
1766 goto common_error;
1767
5cec6941 1768 case bfd_reloc_ctbp_not_found:
252b5132
RH
1769 msg = _("could not locate special linker symbol __ctbp");
1770 goto common_error;
435b1e90 1771
252b5132
RH
1772 default:
1773 msg = _("internal error: unknown error");
1774 /* fall through */
1775
1776 common_error:
1777 if (!((*info->callbacks->warning)
1778 (info, msg, name, input_bfd, input_section,
1779 rel->r_offset)))
b34976b6 1780 return FALSE;
252b5132
RH
1781 break;
1782 }
1783 }
1784 }
1785
b34976b6 1786 return TRUE;
252b5132
RH
1787}
1788
b34976b6 1789static bfd_boolean
252b5132 1790v850_elf_gc_sweep_hook (abfd, info, sec, relocs)
5f771d47
ILT
1791 bfd *abfd ATTRIBUTE_UNUSED;
1792 struct bfd_link_info *info ATTRIBUTE_UNUSED;
1793 asection *sec ATTRIBUTE_UNUSED;
1794 const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED;
252b5132 1795{
e12dd2ea 1796 /* No got and plt entries for v850-elf. */
b34976b6 1797 return TRUE;
252b5132
RH
1798}
1799
1800static asection *
1e2f5b6e
AM
1801v850_elf_gc_mark_hook (sec, info, rel, h, sym)
1802 asection *sec;
5f771d47 1803 struct bfd_link_info *info ATTRIBUTE_UNUSED;
252b5132
RH
1804 Elf_Internal_Rela *rel;
1805 struct elf_link_hash_entry *h;
1806 Elf_Internal_Sym *sym;
1807{
1808 if (h != NULL)
1809 {
1810 switch (ELF32_R_TYPE (rel->r_info))
1811 {
1812 case R_V850_GNU_VTINHERIT:
1813 case R_V850_GNU_VTENTRY:
1814 break;
1815
1816 default:
1817 switch (h->root.type)
1818 {
1819 case bfd_link_hash_defined:
1820 case bfd_link_hash_defweak:
1821 return h->root.u.def.section;
1822
1823 case bfd_link_hash_common:
1824 return h->root.u.c.p->section;
e049a0de
ILT
1825
1826 default:
1827 break;
252b5132
RH
1828 }
1829 }
1830 }
1831 else
1e2f5b6e 1832 return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
9ad5cbcf 1833
252b5132
RH
1834 return NULL;
1835}
e12dd2ea 1836
252b5132 1837/* Set the right machine number. */
e12dd2ea 1838
b34976b6 1839static bfd_boolean
252b5132
RH
1840v850_elf_object_p (abfd)
1841 bfd *abfd;
1842{
1843 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
1844 {
1845 default:
250d94fd
AM
1846 case E_V850_ARCH:
1847 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850);
1848 break;
1849 case E_V850E_ARCH:
1850 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e);
1851 break;
8ad30312
NC
1852 case E_V850E1_ARCH:
1853 bfd_default_set_arch_mach (abfd, bfd_arch_v850, bfd_mach_v850e1);
1854 break;
252b5132 1855 }
b34976b6 1856 return TRUE;
252b5132
RH
1857}
1858
1859/* Store the machine number in the flags field. */
e12dd2ea 1860
252b5132
RH
1861static void
1862v850_elf_final_write_processing (abfd, linker)
b34976b6
AM
1863 bfd *abfd;
1864 bfd_boolean linker ATTRIBUTE_UNUSED;
252b5132
RH
1865{
1866 unsigned long val;
1867
1868 switch (bfd_get_mach (abfd))
1869 {
b34976b6 1870 default:
250d94fd
AM
1871 case bfd_mach_v850: val = E_V850_ARCH; break;
1872 case bfd_mach_v850e: val = E_V850E_ARCH; break;
8ad30312 1873 case bfd_mach_v850e1: val = E_V850E1_ARCH; break;
252b5132
RH
1874 }
1875
1876 elf_elfheader (abfd)->e_flags &=~ EF_V850_ARCH;
1877 elf_elfheader (abfd)->e_flags |= val;
1878}
1879
435b1e90 1880/* Function to keep V850 specific file flags. */
e12dd2ea 1881
b34976b6 1882static bfd_boolean
252b5132 1883v850_elf_set_private_flags (abfd, flags)
b34976b6 1884 bfd *abfd;
252b5132
RH
1885 flagword flags;
1886{
1887 BFD_ASSERT (!elf_flags_init (abfd)
1888 || elf_elfheader (abfd)->e_flags == flags);
1889
1890 elf_elfheader (abfd)->e_flags = flags;
b34976b6
AM
1891 elf_flags_init (abfd) = TRUE;
1892 return TRUE;
252b5132
RH
1893}
1894
e12dd2ea
NC
1895/* Merge backend specific data from an object file
1896 to the output object file when linking. */
b34976b6 1897static bfd_boolean
252b5132 1898v850_elf_merge_private_bfd_data (ibfd, obfd)
b34976b6
AM
1899 bfd *ibfd;
1900 bfd *obfd;
252b5132
RH
1901{
1902 flagword out_flags;
1903 flagword in_flags;
1904
1905 if ( bfd_get_flavour (ibfd) != bfd_target_elf_flavour
1906 || bfd_get_flavour (obfd) != bfd_target_elf_flavour)
b34976b6 1907 return TRUE;
252b5132
RH
1908
1909 in_flags = elf_elfheader (ibfd)->e_flags;
1910 out_flags = elf_elfheader (obfd)->e_flags;
1911
1912 if (! elf_flags_init (obfd))
1913 {
1914 /* If the input is the default architecture then do not
1915 bother setting the flags for the output architecture,
1916 instead allow future merges to do this. If no future
1917 merges ever set these flags then they will retain their
1918 unitialised values, which surprise surprise, correspond
1919 to the default values. */
1920 if (bfd_get_arch_info (ibfd)->the_default)
b34976b6 1921 return TRUE;
435b1e90 1922
b34976b6 1923 elf_flags_init (obfd) = TRUE;
252b5132
RH
1924 elf_elfheader (obfd)->e_flags = in_flags;
1925
1926 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd)
1927 && bfd_get_arch_info (obfd)->the_default)
e12dd2ea 1928 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd));
252b5132 1929
b34976b6 1930 return TRUE;
252b5132
RH
1931 }
1932
1933 /* Check flag compatibility. */
1934 if (in_flags == out_flags)
b34976b6 1935 return TRUE;
252b5132
RH
1936
1937 if ((in_flags & EF_V850_ARCH) != (out_flags & EF_V850_ARCH)
1938 && (in_flags & EF_V850_ARCH) != E_V850_ARCH)
8ad30312
NC
1939 {
1940 /* Allow v850e1 binaries to be linked with v850e binaries.
1941 Set the output binary to v850e. */
1942 if ((in_flags & EF_V850_ARCH) == E_V850E1_ARCH
1943 && (out_flags & EF_V850_ARCH) == E_V850E_ARCH)
1944 return TRUE;
1945
1946 if ((in_flags & EF_V850_ARCH) == E_V850E_ARCH
1947 && (out_flags & EF_V850_ARCH) == E_V850E1_ARCH)
1948 {
1949 elf_elfheader (obfd)->e_flags =
1950 ((out_flags & ~ EF_V850_ARCH) | E_V850E_ARCH);
1951 return TRUE;
1952 }
1953
d003868e
AM
1954 _bfd_error_handler (_("%B: Architecture mismatch with previous modules"),
1955 ibfd);
8ad30312 1956 }
252b5132 1957
b34976b6 1958 return TRUE;
252b5132 1959}
e12dd2ea
NC
1960
1961/* Display the flags field. */
252b5132 1962
b34976b6 1963static bfd_boolean
252b5132 1964v850_elf_print_private_bfd_data (abfd, ptr)
b34976b6
AM
1965 bfd *abfd;
1966 PTR ptr;
252b5132
RH
1967{
1968 FILE * file = (FILE *) ptr;
435b1e90 1969
252b5132 1970 BFD_ASSERT (abfd != NULL && ptr != NULL);
435b1e90 1971
252b5132 1972 _bfd_elf_print_private_bfd_data (abfd, ptr);
435b1e90 1973
252b5132
RH
1974 /* xgettext:c-format */
1975 fprintf (file, _("private flags = %lx: "), elf_elfheader (abfd)->e_flags);
435b1e90 1976
252b5132
RH
1977 switch (elf_elfheader (abfd)->e_flags & EF_V850_ARCH)
1978 {
1979 default:
1980 case E_V850_ARCH: fprintf (file, _("v850 architecture")); break;
1981 case E_V850E_ARCH: fprintf (file, _("v850e architecture")); break;
8ad30312 1982 case E_V850E1_ARCH: fprintf (file, _("v850e1 architecture")); break;
252b5132 1983 }
435b1e90 1984
252b5132 1985 fputc ('\n', file);
435b1e90 1986
b34976b6 1987 return TRUE;
252b5132
RH
1988}
1989
1990/* V850 ELF uses four common sections. One is the usual one, and the
1991 others are for (small) objects in one of the special data areas:
1992 small, tiny and zero. All the objects are kept together, and then
1993 referenced via the gp register, the ep register or the r0 register
1994 respectively, which yields smaller, faster assembler code. This
1995 approach is copied from elf32-mips.c. */
1996
1997static asection v850_elf_scom_section;
1998static asymbol v850_elf_scom_symbol;
1999static asymbol * v850_elf_scom_symbol_ptr;
2000static asection v850_elf_tcom_section;
2001static asymbol v850_elf_tcom_symbol;
2002static asymbol * v850_elf_tcom_symbol_ptr;
2003static asection v850_elf_zcom_section;
2004static asymbol v850_elf_zcom_symbol;
2005static asymbol * v850_elf_zcom_symbol_ptr;
2006
e12dd2ea
NC
2007/* Given a BFD section, try to locate the
2008 corresponding ELF section index. */
252b5132 2009
b34976b6 2010static bfd_boolean
af746e92 2011v850_elf_section_from_bfd_section (abfd, sec, retval)
b34976b6
AM
2012 bfd *abfd ATTRIBUTE_UNUSED;
2013 asection *sec;
2014 int *retval;
252b5132
RH
2015{
2016 if (strcmp (bfd_get_section_name (abfd, sec), ".scommon") == 0)
2017 *retval = SHN_V850_SCOMMON;
2018 else if (strcmp (bfd_get_section_name (abfd, sec), ".tcommon") == 0)
2019 *retval = SHN_V850_TCOMMON;
2020 else if (strcmp (bfd_get_section_name (abfd, sec), ".zcommon") == 0)
2021 *retval = SHN_V850_ZCOMMON;
2022 else
b34976b6 2023 return FALSE;
435b1e90 2024
b34976b6 2025 return TRUE;
252b5132
RH
2026}
2027
2028/* Handle the special V850 section numbers that a symbol may use. */
2029
2030static void
2031v850_elf_symbol_processing (abfd, asym)
b34976b6
AM
2032 bfd *abfd;
2033 asymbol *asym;
252b5132
RH
2034{
2035 elf_symbol_type * elfsym = (elf_symbol_type *) asym;
9ad5cbcf 2036 unsigned int indx;
435b1e90 2037
9ad5cbcf 2038 indx = elfsym->internal_elf_sym.st_shndx;
252b5132
RH
2039
2040 /* If the section index is an "ordinary" index, then it may
2041 refer to a v850 specific section created by the assembler.
2042 Check the section's type and change the index it matches.
435b1e90 2043
252b5132 2044 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2045
9ad5cbcf
AM
2046 if (indx < elf_numsections (abfd))
2047 switch (elf_elfsections(abfd)[indx]->sh_type)
252b5132
RH
2048 {
2049 case SHT_V850_SCOMMON:
9ad5cbcf 2050 indx = SHN_V850_SCOMMON;
252b5132 2051 break;
435b1e90 2052
252b5132 2053 case SHT_V850_TCOMMON:
9ad5cbcf 2054 indx = SHN_V850_TCOMMON;
252b5132 2055 break;
435b1e90 2056
252b5132 2057 case SHT_V850_ZCOMMON:
9ad5cbcf 2058 indx = SHN_V850_ZCOMMON;
252b5132 2059 break;
435b1e90 2060
252b5132
RH
2061 default:
2062 break;
2063 }
435b1e90 2064
9ad5cbcf 2065 switch (indx)
252b5132
RH
2066 {
2067 case SHN_V850_SCOMMON:
2068 if (v850_elf_scom_section.name == NULL)
2069 {
2070 /* Initialize the small common section. */
2071 v850_elf_scom_section.name = ".scommon";
2072 v850_elf_scom_section.flags = SEC_IS_COMMON | SEC_ALLOC | SEC_DATA;
2073 v850_elf_scom_section.output_section = & v850_elf_scom_section;
2074 v850_elf_scom_section.symbol = & v850_elf_scom_symbol;
2075 v850_elf_scom_section.symbol_ptr_ptr = & v850_elf_scom_symbol_ptr;
2076 v850_elf_scom_symbol.name = ".scommon";
2077 v850_elf_scom_symbol.flags = BSF_SECTION_SYM;
2078 v850_elf_scom_symbol.section = & v850_elf_scom_section;
2079 v850_elf_scom_symbol_ptr = & v850_elf_scom_symbol;
2080 }
2081 asym->section = & v850_elf_scom_section;
2082 asym->value = elfsym->internal_elf_sym.st_size;
2083 break;
435b1e90 2084
252b5132
RH
2085 case SHN_V850_TCOMMON:
2086 if (v850_elf_tcom_section.name == NULL)
2087 {
2088 /* Initialize the tcommon section. */
2089 v850_elf_tcom_section.name = ".tcommon";
2090 v850_elf_tcom_section.flags = SEC_IS_COMMON;
2091 v850_elf_tcom_section.output_section = & v850_elf_tcom_section;
2092 v850_elf_tcom_section.symbol = & v850_elf_tcom_symbol;
2093 v850_elf_tcom_section.symbol_ptr_ptr = & v850_elf_tcom_symbol_ptr;
2094 v850_elf_tcom_symbol.name = ".tcommon";
2095 v850_elf_tcom_symbol.flags = BSF_SECTION_SYM;
2096 v850_elf_tcom_symbol.section = & v850_elf_tcom_section;
2097 v850_elf_tcom_symbol_ptr = & v850_elf_tcom_symbol;
2098 }
2099 asym->section = & v850_elf_tcom_section;
2100 asym->value = elfsym->internal_elf_sym.st_size;
2101 break;
2102
2103 case SHN_V850_ZCOMMON:
2104 if (v850_elf_zcom_section.name == NULL)
2105 {
2106 /* Initialize the zcommon section. */
2107 v850_elf_zcom_section.name = ".zcommon";
2108 v850_elf_zcom_section.flags = SEC_IS_COMMON;
2109 v850_elf_zcom_section.output_section = & v850_elf_zcom_section;
2110 v850_elf_zcom_section.symbol = & v850_elf_zcom_symbol;
2111 v850_elf_zcom_section.symbol_ptr_ptr = & v850_elf_zcom_symbol_ptr;
2112 v850_elf_zcom_symbol.name = ".zcommon";
2113 v850_elf_zcom_symbol.flags = BSF_SECTION_SYM;
2114 v850_elf_zcom_symbol.section = & v850_elf_zcom_section;
2115 v850_elf_zcom_symbol_ptr = & v850_elf_zcom_symbol;
2116 }
2117 asym->section = & v850_elf_zcom_section;
2118 asym->value = elfsym->internal_elf_sym.st_size;
2119 break;
2120 }
2121}
2122
2123/* Hook called by the linker routine which adds symbols from an object
2124 file. We must handle the special v850 section numbers here. */
2125
b34976b6 2126static bfd_boolean
252b5132 2127v850_elf_add_symbol_hook (abfd, info, sym, namep, flagsp, secp, valp)
b34976b6
AM
2128 bfd *abfd;
2129 struct bfd_link_info *info ATTRIBUTE_UNUSED;
555cd476 2130 Elf_Internal_Sym *sym;
b34976b6
AM
2131 const char **namep ATTRIBUTE_UNUSED;
2132 flagword *flagsp ATTRIBUTE_UNUSED;
2133 asection **secp;
2134 bfd_vma *valp;
252b5132 2135{
9ad5cbcf 2136 unsigned int indx = sym->st_shndx;
435b1e90 2137
252b5132
RH
2138 /* If the section index is an "ordinary" index, then it may
2139 refer to a v850 specific section created by the assembler.
2140 Check the section's type and change the index it matches.
435b1e90 2141
252b5132 2142 FIXME: Should we alter the st_shndx field as well ? */
435b1e90 2143
9ad5cbcf
AM
2144 if (indx < elf_numsections (abfd))
2145 switch (elf_elfsections(abfd)[indx]->sh_type)
252b5132
RH
2146 {
2147 case SHT_V850_SCOMMON:
9ad5cbcf 2148 indx = SHN_V850_SCOMMON;
252b5132 2149 break;
435b1e90 2150
252b5132 2151 case SHT_V850_TCOMMON:
9ad5cbcf 2152 indx = SHN_V850_TCOMMON;
252b5132 2153 break;
435b1e90 2154
252b5132 2155 case SHT_V850_ZCOMMON:
9ad5cbcf 2156 indx = SHN_V850_ZCOMMON;
252b5132 2157 break;
435b1e90 2158
252b5132
RH
2159 default:
2160 break;
2161 }
435b1e90 2162
9ad5cbcf 2163 switch (indx)
252b5132
RH
2164 {
2165 case SHN_V850_SCOMMON:
2166 *secp = bfd_make_section_old_way (abfd, ".scommon");
2167 (*secp)->flags |= SEC_IS_COMMON;
2168 *valp = sym->st_size;
2169 break;
435b1e90 2170
252b5132
RH
2171 case SHN_V850_TCOMMON:
2172 *secp = bfd_make_section_old_way (abfd, ".tcommon");
2173 (*secp)->flags |= SEC_IS_COMMON;
2174 *valp = sym->st_size;
2175 break;
435b1e90 2176
252b5132
RH
2177 case SHN_V850_ZCOMMON:
2178 *secp = bfd_make_section_old_way (abfd, ".zcommon");
2179 (*secp)->flags |= SEC_IS_COMMON;
2180 *valp = sym->st_size;
2181 break;
2182 }
2183
b34976b6 2184 return TRUE;
252b5132
RH
2185}
2186
b34976b6 2187static bfd_boolean
754021d0 2188v850_elf_link_output_symbol_hook (info, name, sym, input_sec, h)
b34976b6
AM
2189 struct bfd_link_info *info ATTRIBUTE_UNUSED;
2190 const char *name ATTRIBUTE_UNUSED;
2191 Elf_Internal_Sym *sym;
2192 asection *input_sec;
754021d0 2193 struct elf_link_hash_entry *h ATTRIBUTE_UNUSED;
252b5132
RH
2194{
2195 /* If we see a common symbol, which implies a relocatable link, then
2196 if a symbol was in a special common section in an input file, mark
2197 it as a special common in the output file. */
435b1e90 2198
252b5132
RH
2199 if (sym->st_shndx == SHN_COMMON)
2200 {
2201 if (strcmp (input_sec->name, ".scommon") == 0)
2202 sym->st_shndx = SHN_V850_SCOMMON;
2203 else if (strcmp (input_sec->name, ".tcommon") == 0)
2204 sym->st_shndx = SHN_V850_TCOMMON;
2205 else if (strcmp (input_sec->name, ".zcommon") == 0)
2206 sym->st_shndx = SHN_V850_ZCOMMON;
2207 }
2208
b34976b6 2209 return TRUE;
252b5132
RH
2210}
2211
b34976b6 2212static bfd_boolean
252b5132 2213v850_elf_section_from_shdr (abfd, hdr, name)
b34976b6
AM
2214 bfd *abfd;
2215 Elf_Internal_Shdr *hdr;
2216 const char *name;
252b5132
RH
2217{
2218 /* There ought to be a place to keep ELF backend specific flags, but
2219 at the moment there isn't one. We just keep track of the
2220 sections by their name, instead. */
2221
2222 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name))
b34976b6 2223 return FALSE;
252b5132
RH
2224
2225 switch (hdr->sh_type)
2226 {
2227 case SHT_V850_SCOMMON:
2228 case SHT_V850_TCOMMON:
2229 case SHT_V850_ZCOMMON:
2230 if (! bfd_set_section_flags (abfd, hdr->bfd_section,
2231 (bfd_get_section_flags (abfd,
2232 hdr->bfd_section)
2233 | SEC_IS_COMMON)))
b34976b6 2234 return FALSE;
252b5132
RH
2235 }
2236
b34976b6 2237 return TRUE;
252b5132
RH
2238}
2239
e12dd2ea
NC
2240/* Set the correct type for a V850 ELF section. We do this
2241 by the section name, which is a hack, but ought to work. */
2242
b34976b6 2243static bfd_boolean
252b5132 2244v850_elf_fake_sections (abfd, hdr, sec)
b34976b6
AM
2245 bfd *abfd ATTRIBUTE_UNUSED;
2246 Elf_Internal_Shdr *hdr;
2247 asection *sec;
252b5132
RH
2248{
2249 register const char * name;
2250
2251 name = bfd_get_section_name (abfd, sec);
2252
2253 if (strcmp (name, ".scommon") == 0)
2254 {
2255 hdr->sh_type = SHT_V850_SCOMMON;
2256 }
2257 else if (strcmp (name, ".tcommon") == 0)
2258 {
2259 hdr->sh_type = SHT_V850_TCOMMON;
2260 }
2261 else if (strcmp (name, ".zcommon") == 0)
2262 hdr->sh_type = SHT_V850_ZCOMMON;
435b1e90 2263
b34976b6 2264 return TRUE;
252b5132 2265}
86aba9db
NC
2266
2267/* Delete some bytes from a section while relaxing. */
2268
b34976b6 2269static bfd_boolean
86aba9db 2270v850_elf_relax_delete_bytes (abfd, sec, addr, toaddr, count)
b34976b6
AM
2271 bfd *abfd;
2272 asection *sec;
2273 bfd_vma addr;
2274 bfd_vma toaddr;
2275 int count;
86aba9db 2276{
b34976b6
AM
2277 Elf_Internal_Shdr *symtab_hdr;
2278 Elf32_External_Sym *extsyms;
2279 Elf32_External_Sym *esym;
2280 Elf32_External_Sym *esymend;
2281 int index;
2282 unsigned int sec_shndx;
2283 bfd_byte *contents;
2284 Elf_Internal_Rela *irel;
2285 Elf_Internal_Rela *irelend;
2286 struct elf_link_hash_entry *sym_hash;
2287 Elf_Internal_Shdr *shndx_hdr;
2288 Elf_External_Sym_Shndx *shndx;
86aba9db
NC
2289
2290 symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
2291 extsyms = (Elf32_External_Sym *) symtab_hdr->contents;
2292
2293 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
2294
2295 contents = elf_section_data (sec)->this_hdr.contents;
2296
2297 /* The deletion must stop at the next ALIGN reloc for an alignment
2298 power larger than the number of bytes we are deleting. */
2299
2300 /* Actually delete the bytes. */
2301#if (DEBUG_RELAX & 2)
2302 fprintf (stderr, "relax_delete: contents: sec: %s %p .. %p %x\n",
2303 sec->name, addr, toaddr, count );
2304#endif
2305 memmove (contents + addr, contents + addr + count,
2306 toaddr - addr - count);
2307 memset (contents + toaddr-count, 0, count);
2308
2309 /* Adjust all the relocs. */
2310 irel = elf_section_data (sec)->relocs;
2311 irelend = irel + sec->reloc_count;
2312 shndx_hdr = &elf_tdata (abfd)->symtab_shndx_hdr;
2313 shndx = (Elf_External_Sym_Shndx *) shndx_hdr->contents;
2314
2315 for (; irel < irelend; irel++)
2316 {
2317 bfd_vma raddr, paddr, symval;
2318 Elf_Internal_Sym isym;
2319
2320 /* Get the new reloc address. */
2321 raddr = irel->r_offset;
2322 if ((raddr >= (addr + count) && raddr < toaddr))
b34976b6 2323 irel->r_offset -= count;
86aba9db
NC
2324
2325 if (raddr >= addr && raddr < addr + count)
2326 {
2327 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
2328 (int) R_V850_NONE);
2329 continue;
2330 }
b34976b6 2331
86aba9db
NC
2332 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN)
2333 continue;
2334
2335 bfd_elf32_swap_symbol_in (abfd,
2336 extsyms + ELF32_R_SYM (irel->r_info),
2337 shndx ? shndx + ELF32_R_SYM (irel->r_info) : NULL,
2338 & isym);
b34976b6 2339
86aba9db
NC
2340 if (isym.st_shndx != sec_shndx)
2341 continue;
2342
2343 /* Get the value of the symbol referred to by the reloc. */
2344 if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
2345 {
2346 symval = isym.st_value;
2347#if (DEBUG_RELAX & 2)
2348 {
2349 char * name = bfd_elf_string_from_elf_section
2350 (abfd, symtab_hdr->sh_link, isym.st_name);
2351 fprintf (stderr,
2352 "relax_delete: local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
2353 sec->name, name, isym.st_name,
2354 sec->output_section->vma, sec->output_offset,
2355 isym.st_value, irel->r_addend);
2356 }
2357#endif
2358 }
2359 else
2360 {
2361 unsigned long indx;
2362 struct elf_link_hash_entry * h;
2363
2364 /* An external symbol. */
2365 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2366
2367 h = elf_sym_hashes (abfd) [indx];
2368 BFD_ASSERT (h != NULL);
2369
2370 symval = h->root.u.def.value;
2371#if (DEBUG_RELAX & 2)
2372 fprintf (stderr,
2373 "relax_delete: defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
2374 sec->name, h->root.root.string, h->root.u.def.value,
2375 sec->output_section->vma, sec->output_offset, irel->r_addend);
2376#endif
2377 }
b34976b6 2378
86aba9db 2379 paddr = symval + irel->r_addend;
b34976b6 2380
86aba9db
NC
2381 if ( (symval >= addr + count && symval < toaddr)
2382 && (paddr < addr + count || paddr >= toaddr))
2383 irel->r_addend += count;
2384 else if ( (symval < addr + count || symval >= toaddr)
2385 && (paddr >= addr + count && paddr < toaddr))
2386 irel->r_addend -= count;
2387 }
2388
2389 /* Adjust the local symbols defined in this section. */
2390 esym = extsyms;
2391 esymend = esym + symtab_hdr->sh_info;
2392
2393 for (; esym < esymend; esym++, shndx = (shndx ? shndx + 1 : NULL))
2394 {
2395 Elf_Internal_Sym isym;
2396
2397 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
2398
2399 if (isym.st_shndx == sec_shndx
2400 && isym.st_value >= addr + count
2401 && isym.st_value < toaddr)
2402 {
2403 isym.st_value -= count;
2404
2405 if (isym.st_value + isym.st_size >= toaddr)
b34976b6
AM
2406 isym.st_size += count;
2407
63a23799 2408 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2409 }
2410 else if (isym.st_shndx == sec_shndx
2411 && isym.st_value < addr + count)
2412 {
2413 if (isym.st_value+isym.st_size >= addr + count
2414 && isym.st_value+isym.st_size < toaddr)
2415 isym.st_size -= count;
2416
2417 if (isym.st_value >= addr
2418 && isym.st_value < addr + count)
2419 isym.st_value = addr;
2420
63a23799 2421 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2422 }
2423 }
2424
2425 /* Now adjust the global symbols defined in this section. */
2426 esym = extsyms + symtab_hdr->sh_info;
2427 esymend = extsyms + (symtab_hdr->sh_size / sizeof (Elf32_External_Sym));
2428
2429 for (index = 0; esym < esymend; esym ++, index ++)
2430 {
2431 Elf_Internal_Sym isym;
2432
2433 bfd_elf32_swap_symbol_in (abfd, esym, shndx, & isym);
2434 sym_hash = elf_sym_hashes (abfd) [index];
2435
2436 if (isym.st_shndx == sec_shndx
2437 && ((sym_hash)->root.type == bfd_link_hash_defined
2438 || (sym_hash)->root.type == bfd_link_hash_defweak)
2439 && (sym_hash)->root.u.def.section == sec
2440 && (sym_hash)->root.u.def.value >= addr + count
2441 && (sym_hash)->root.u.def.value < toaddr)
2442 {
2443 if ((sym_hash)->root.u.def.value + isym.st_size >= toaddr)
2444 {
2445 isym.st_size += count;
63a23799 2446 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2447 }
2448
2449 (sym_hash)->root.u.def.value -= count;
2450 }
2451 else if (isym.st_shndx == sec_shndx
2452 && ((sym_hash)->root.type == bfd_link_hash_defined
2453 || (sym_hash)->root.type == bfd_link_hash_defweak)
2454 && (sym_hash)->root.u.def.section == sec
2455 && (sym_hash)->root.u.def.value < addr + count)
2456 {
2457 if ((sym_hash)->root.u.def.value+isym.st_size >= addr + count
2458 && (sym_hash)->root.u.def.value+isym.st_size < toaddr)
2459 isym.st_size -= count;
2460
2461 if ((sym_hash)->root.u.def.value >= addr
2462 && (sym_hash)->root.u.def.value < addr + count)
2463 (sym_hash)->root.u.def.value = addr;
2464
63a23799 2465 bfd_elf32_swap_symbol_out (abfd, & isym, esym, shndx);
86aba9db
NC
2466 }
2467
2468 if (shndx)
2469 ++ shndx;
2470 }
2471
b34976b6 2472 return TRUE;
86aba9db
NC
2473}
2474
2475#define NOP_OPCODE (0x0000)
b34976b6 2476#define MOVHI 0x0640 /* 4byte */
86aba9db 2477#define MOVHI_MASK 0x07e0
b34976b6 2478#define MOVHI_R1(insn) ((insn) & 0x1f) /* 4byte */
86aba9db
NC
2479#define MOVHI_R2(insn) ((insn) >> 11)
2480#define MOVEA 0x0620 /* 2byte */
2481#define MOVEA_MASK 0x07e0
2482#define MOVEA_R1(insn) ((insn) & 0x1f)
2483#define MOVEA_R2(insn) ((insn) >> 11)
2484#define JARL_4 0x00040780 /* 4byte */
2485#define JARL_4_MASK 0xFFFF07FF
2486#define JARL_R2(insn) (int)(((insn) & (~JARL_4_MASK)) >> 11)
2487#define ADD_I 0x0240 /* 2byte */
2488#define ADD_I_MASK 0x07e0
2489#define ADD_I5(insn) ((((insn) & 0x001f) << 11) >> 11) /* 2byte */
2490#define ADD_R2(insn) ((insn) >> 11)
2491#define JMP_R 0x0060 /* 2byte */
2492#define JMP_R_MASK 0xFFE0
2493#define JMP_R1(insn) ((insn) & 0x1f)
2494
b34976b6 2495static bfd_boolean
86aba9db 2496v850_elf_relax_section (abfd, sec, link_info, again)
b34976b6
AM
2497 bfd *abfd;
2498 asection *sec;
2499 struct bfd_link_info *link_info;
2500 bfd_boolean *again;
86aba9db 2501{
b34976b6
AM
2502 Elf_Internal_Shdr *symtab_hdr;
2503 Elf_Internal_Rela *internal_relocs;
2504 Elf_Internal_Rela *irel;
2505 Elf_Internal_Rela *irelend;
2506 Elf_Internal_Rela *irelalign = NULL;
2507 Elf_Internal_Sym *isymbuf = NULL;
2508 bfd_byte *contents = NULL;
2509 bfd_vma addr = 0;
2510 bfd_vma toaddr;
2511 int align_pad_size = 0;
2512 bfd_boolean result = TRUE;
2513
2514 *again = FALSE;
86aba9db 2515
1049f94e 2516 if (link_info->relocatable
86aba9db
NC
2517 || (sec->flags & SEC_RELOC) == 0
2518 || sec->reloc_count == 0)
b34976b6 2519 return TRUE;
86aba9db 2520
86aba9db
NC
2521 symtab_hdr = & elf_tdata (abfd)->symtab_hdr;
2522
45d6a902 2523 internal_relocs = (_bfd_elf_link_read_relocs
86aba9db
NC
2524 (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
2525 link_info->keep_memory));
2526 if (internal_relocs == NULL)
2527 goto error_return;
86aba9db
NC
2528
2529 irelend = internal_relocs + sec->reloc_count;
b34976b6 2530
eea6121a 2531 while (addr < sec->size)
86aba9db 2532 {
eea6121a 2533 toaddr = sec->size;
86aba9db
NC
2534
2535 for (irel = internal_relocs; irel < irelend; irel ++)
2536 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
2537 && irel->r_offset > addr
2538 && irel->r_offset < toaddr)
2539 toaddr = irel->r_offset;
b34976b6 2540
86aba9db
NC
2541#ifdef DEBUG_RELAX
2542 fprintf (stderr, "relax region 0x%x to 0x%x align pad %d\n",
2543 addr, toaddr, align_pad_size);
2544#endif
2545 if (irelalign)
2546 {
2547 bfd_vma alignto;
2548 bfd_vma alignmoveto;
2549
2550 alignmoveto = BFD_ALIGN (addr - align_pad_size, 1 << irelalign->r_addend);
2551 alignto = BFD_ALIGN (addr, 1 << irelalign->r_addend);
2552
2553 if (alignmoveto < alignto)
2554 {
2555 unsigned int i;
2556
2557 align_pad_size = alignto - alignmoveto;
2558#ifdef DEBUG_RELAX
2559 fprintf (stderr, "relax move region 0x%x to 0x%x delete size 0x%x\n",
2560 alignmoveto, toaddr, align_pad_size);
2561#endif
2562 if (!v850_elf_relax_delete_bytes (abfd, sec, alignmoveto,
2563 toaddr, align_pad_size))
b34976b6 2564 goto error_return;
86aba9db
NC
2565
2566 for (i = BFD_ALIGN (toaddr - align_pad_size, 1);
2567 (i + 1) < toaddr; i += 2)
2568 bfd_put_16 (abfd, NOP_OPCODE, contents + i);
2569
2570 addr = alignmoveto;
2571 }
2572 else
2573 align_pad_size = 0;
2574 }
2575
2576 for (irel = internal_relocs; irel < irelend; irel++)
2577 {
b34976b6
AM
2578 bfd_vma laddr;
2579 bfd_vma addend;
2580 bfd_vma symval;
2581 int insn[5];
2582 int no_match = -1;
2583 Elf_Internal_Rela *hi_irelfn;
2584 Elf_Internal_Rela *lo_irelfn;
2585 Elf_Internal_Rela *irelcall;
2586 bfd_signed_vma foff;
86aba9db
NC
2587
2588 if (! (irel->r_offset >= addr && irel->r_offset < toaddr
2589 && (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL
2590 || ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)))
2591 continue;
2592
2593#ifdef DEBUG_RELAX
2594 fprintf (stderr, "relax check r_info 0x%x r_offset 0x%x r_addend 0x%x\n",
2595 irel->r_info,
2596 irel->r_offset,
2597 irel->r_addend );
2598#endif
2599
2600 /* Get the section contents. */
2601 if (contents == NULL)
2602 {
2603 if (elf_section_data (sec)->this_hdr.contents != NULL)
2604 contents = elf_section_data (sec)->this_hdr.contents;
2605 else
2606 {
eea6121a 2607 if (!bfd_malloc_and_get_section (abfd, sec, &contents))
86aba9db
NC
2608 goto error_return;
2609 }
2610 }
2611
5cec6941
NC
2612 /* Read this BFD's local symbols if we haven't done so already. */
2613 if (isymbuf == NULL && symtab_hdr->sh_info != 0)
86aba9db 2614 {
5cec6941
NC
2615 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
2616 if (isymbuf == NULL)
2617 isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
2618 symtab_hdr->sh_info, 0,
2619 NULL, NULL, NULL);
2620 if (isymbuf == NULL)
2621 goto error_return;
86aba9db
NC
2622 }
2623
2624 laddr = irel->r_offset;
2625
2626 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGCALL)
2627 {
2628 /* Check code for -mlong-calls output. */
eea6121a 2629 if (laddr + 16 <= (bfd_vma) sec->size)
86aba9db
NC
2630 {
2631 insn[0] = bfd_get_16 (abfd, contents + laddr);
2632 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
2633 insn[2] = bfd_get_32 (abfd, contents + laddr + 8);
2634 insn[3] = bfd_get_16 (abfd, contents + laddr + 12);
2635 insn[4] = bfd_get_16 (abfd, contents + laddr + 14);
b34976b6 2636
86aba9db
NC
2637 if ((insn[0] & MOVHI_MASK) != MOVHI
2638 || MOVHI_R1 (insn[0]) != 0)
2639 no_match = 0;
2640
2641 if (no_match < 0
2642 && ((insn[1] & MOVEA_MASK) != MOVEA
2643 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
2644 no_match = 1;
2645
2646 if (no_match < 0
2647 && (insn[2] & JARL_4_MASK) != JARL_4)
2648 no_match = 2;
2649
2650 if (no_match < 0
2651 && ((insn[3] & ADD_I_MASK) != ADD_I
2652 || ADD_I5 (insn[3]) != 4
2653 || JARL_R2 (insn[2]) != ADD_R2 (insn[3])))
2654 no_match = 3;
2655
2656 if (no_match < 0
2657 && ((insn[4] & JMP_R_MASK) != JMP_R
2658 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[4])))
2659 no_match = 4;
2660 }
2661 else
2662 {
2663 ((*_bfd_error_handler)
2664 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insns",
2665 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
2666
2667 continue;
2668 }
2669
2670 if (no_match >= 0)
2671 {
2672 ((*_bfd_error_handler)
2673 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized insn 0x%x",
2674 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
2675
2676 continue;
b34976b6 2677 }
86aba9db
NC
2678
2679 /* Get the reloc for the address from which the register is
2680 being loaded. This reloc will tell us which function is
2681 actually being called. */
2682 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
2683 if (hi_irelfn->r_offset == laddr + 2
b34976b6 2684 && ELF32_R_TYPE (hi_irelfn->r_info)
86aba9db
NC
2685 == (int) R_V850_HI16_S)
2686 break;
2687
2688 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
2689 if (lo_irelfn->r_offset == laddr + 6
2690 && ELF32_R_TYPE (lo_irelfn->r_info)
2691 == (int) R_V850_LO16)
2692 break;
2693
2694 for (irelcall = internal_relocs; irelcall < irelend; irelcall ++)
2695 if (irelcall->r_offset == laddr + 8
2696 && ELF32_R_TYPE (irelcall->r_info)
2697 == (int) R_V850_22_PCREL)
2698 break;
2699
2700 if ( hi_irelfn == irelend
2701 || lo_irelfn == irelend
2702 || irelcall == irelend)
2703 {
2704 ((*_bfd_error_handler)
2705 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc",
2706 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
2707
2708 continue;
2709 }
b34976b6 2710
86aba9db
NC
2711 if (ELF32_R_SYM (irelcall->r_info) < symtab_hdr->sh_info)
2712 {
5cec6941 2713 Elf_Internal_Sym * isym;
86aba9db
NC
2714
2715 /* A local symbol. */
5cec6941 2716 isym = isymbuf + ELF32_R_SYM (irelcall->r_info);
86aba9db 2717
5cec6941 2718 symval = isym->st_value;
86aba9db
NC
2719 }
2720 else
2721 {
2722 unsigned long indx;
2723 struct elf_link_hash_entry * h;
2724
2725 /* An external symbol. */
2726 indx = ELF32_R_SYM (irelcall->r_info) - symtab_hdr->sh_info;
2727 h = elf_sym_hashes (abfd)[indx];
2728 BFD_ASSERT (h != NULL);
2729
2730 if ( h->root.type != bfd_link_hash_defined
2731 && h->root.type != bfd_link_hash_defweak)
2732 /* This appears to be a reference to an undefined
2733 symbol. Just ignore it--it will be caught by the
2734 regular reloc processing. */
2735 continue;
2736
2737 symval = h->root.u.def.value;
2738 }
2739
2740 if (symval + irelcall->r_addend != irelcall->r_offset + 4)
2741 {
2742 ((*_bfd_error_handler)
2743 ("%s: 0x%lx: warning: R_V850_LONGCALL points to unrecognized reloc 0x%lx",
2744 bfd_get_filename (abfd), (unsigned long) irel->r_offset, irelcall->r_offset ));
2745
2746 continue;
2747 }
2748
2749 /* Get the value of the symbol referred to by the reloc. */
2750 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
2751 {
b34976b6
AM
2752 Elf_Internal_Sym *isym;
2753 asection *sym_sec;
86aba9db
NC
2754
2755 /* A local symbol. */
5cec6941 2756 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
b34976b6 2757
5cec6941 2758 if (isym->st_shndx == SHN_UNDEF)
86aba9db 2759 sym_sec = bfd_und_section_ptr;
5cec6941 2760 else if (isym->st_shndx == SHN_ABS)
86aba9db 2761 sym_sec = bfd_abs_section_ptr;
5cec6941 2762 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
2763 sym_sec = bfd_com_section_ptr;
2764 else
5cec6941
NC
2765 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2766 symval = (isym->st_value
86aba9db
NC
2767 + sym_sec->output_section->vma
2768 + sym_sec->output_offset);
2769 }
2770 else
2771 {
2772 unsigned long indx;
b34976b6 2773 struct elf_link_hash_entry *h;
86aba9db
NC
2774
2775 /* An external symbol. */
5cec6941 2776 indx = ELF32_R_SYM (hi_irelfn->r_info) - symtab_hdr->sh_info;
86aba9db
NC
2777 h = elf_sym_hashes (abfd)[indx];
2778 BFD_ASSERT (h != NULL);
2779
2780 if ( h->root.type != bfd_link_hash_defined
2781 && h->root.type != bfd_link_hash_defweak)
2782 /* This appears to be a reference to an undefined
2783 symbol. Just ignore it--it will be caught by the
2784 regular reloc processing. */
2785 continue;
2786
2787 symval = (h->root.u.def.value
2788 + h->root.u.def.section->output_section->vma
2789 + h->root.u.def.section->output_offset);
2790 }
2791
2792 addend = irel->r_addend;
2793
2794 foff = (symval + addend
2795 - (irel->r_offset
2796 + sec->output_section->vma
2797 + sec->output_offset
2798 + 4));
2799#ifdef DEBUG_RELAX
2800 fprintf (stderr, "relax longcall r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
2801 irel->r_offset,
2802 (irel->r_offset
2803 + sec->output_section->vma
2804 + sec->output_offset),
2805 symval, addend, foff);
2806#endif
2807
2808 if (foff < -0x100000 || foff >= 0x100000)
2809 /* After all that work, we can't shorten this function call. */
2810 continue;
2811
2812 /* For simplicity of coding, we are going to modify the section
2813 contents, the section relocs, and the BFD symbol table. We
2814 must tell the rest of the code not to free up this
2815 information. It would be possible to instead create a table
2816 of changes which have to be made, as is done in coff-mips.c;
2817 that would be more work, but would require less memory when
2818 the linker is run. */
2819 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 2820 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 2821 symtab_hdr->contents = (bfd_byte *) isymbuf;
b34976b6 2822
86aba9db
NC
2823 /* Replace the long call with a jarl. */
2824 irel->r_info = ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_22_PCREL);
2825
2826 addend = 0;
2827
2828 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
2829 /* If this needs to be changed because of future relaxing,
2830 it will be handled here like other internal IND12W
2831 relocs. */
2832 bfd_put_32 (abfd,
2833 0x00000780 | (JARL_R2 (insn[2])<<11) | ((addend << 16) & 0xffff) | ((addend >> 16) & 0xf),
2834 contents + irel->r_offset);
2835 else
2836 /* We can't fully resolve this yet, because the external
2837 symbol value may be changed by future relaxing.
2838 We let the final link phase handle it. */
2839 bfd_put_32 (abfd, 0x00000780 | (JARL_R2 (insn[2])<<11),
2840 contents + irel->r_offset);
2841
b34976b6 2842 hi_irelfn->r_info =
86aba9db
NC
2843 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
2844 lo_irelfn->r_info =
2845 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
2846 irelcall->r_info =
2847 ELF32_R_INFO (ELF32_R_SYM (irelcall->r_info), R_V850_NONE);
2848
2849 if (! v850_elf_relax_delete_bytes (abfd, sec,
2850 irel->r_offset + 4, toaddr, 12))
2851 goto error_return;
2852
2853 align_pad_size += 12;
2854 }
2855 else if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_LONGJUMP)
2856 {
2857 /* Check code for -mlong-jumps output. */
eea6121a 2858 if (laddr + 10 <= (bfd_vma) sec->size)
86aba9db
NC
2859 {
2860 insn[0] = bfd_get_16 (abfd, contents + laddr);
2861 insn[1] = bfd_get_16 (abfd, contents + laddr + 4);
2862 insn[2] = bfd_get_16 (abfd, contents + laddr + 8);
2863
2864 if ((insn[0] & MOVHI_MASK) != MOVHI
2865 || MOVHI_R1 (insn[0]) != 0)
2866 no_match = 0;
2867
2868 if (no_match < 0
2869 && ((insn[1] & MOVEA_MASK) != MOVEA
2870 || MOVHI_R2 (insn[0]) != MOVEA_R1 (insn[1])))
2871 no_match = 1;
2872
2873 if (no_match < 0
2874 && ((insn[2] & JMP_R_MASK) != JMP_R
2875 || MOVEA_R2 (insn[1]) != JMP_R1 (insn[2])))
2876 no_match = 4;
2877 }
2878 else
2879 {
2880 ((*_bfd_error_handler)
2881 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insns",
2882 bfd_get_filename (abfd), (unsigned long) irel->r_offset));
2883
2884 continue;
2885 }
2886
2887 if (no_match >= 0)
2888 {
2889 ((*_bfd_error_handler)
2890 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized insn 0x%x",
2891 bfd_get_filename (abfd), (unsigned long) irel->r_offset+no_match, insn[no_match]));
2892
2893 continue;
2894 }
2895
2896 /* Get the reloc for the address from which the register is
2897 being loaded. This reloc will tell us which function is
2898 actually being called. */
2899 for (hi_irelfn = internal_relocs; hi_irelfn < irelend; hi_irelfn ++)
2900 if (hi_irelfn->r_offset == laddr + 2
b34976b6 2901 && ELF32_R_TYPE (hi_irelfn->r_info) == (int) R_V850_HI16_S)
86aba9db
NC
2902 break;
2903
2904 for (lo_irelfn = internal_relocs; lo_irelfn < irelend; lo_irelfn ++)
2905 if (lo_irelfn->r_offset == laddr + 6
2906 && ELF32_R_TYPE (lo_irelfn->r_info) == (int) R_V850_LO16)
2907 break;
2908
2909 if ( hi_irelfn == irelend
2910 || lo_irelfn == irelend)
2911 {
2912 ((*_bfd_error_handler)
2913 ("%s: 0x%lx: warning: R_V850_LONGJUMP points to unrecognized reloc",
2914 bfd_get_filename (abfd), (unsigned long) irel->r_offset ));
2915
2916 continue;
2917 }
b34976b6 2918
86aba9db
NC
2919 /* Get the value of the symbol referred to by the reloc. */
2920 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
2921 {
5cec6941
NC
2922 Elf_Internal_Sym * isym;
2923 asection * sym_sec;
86aba9db
NC
2924
2925 /* A local symbol. */
5cec6941
NC
2926 isym = isymbuf + ELF32_R_SYM (hi_irelfn->r_info);
2927
2928 if (isym->st_shndx == SHN_UNDEF)
86aba9db 2929 sym_sec = bfd_und_section_ptr;
5cec6941 2930 else if (isym->st_shndx == SHN_ABS)
86aba9db 2931 sym_sec = bfd_abs_section_ptr;
5cec6941 2932 else if (isym->st_shndx == SHN_COMMON)
86aba9db
NC
2933 sym_sec = bfd_com_section_ptr;
2934 else
5cec6941
NC
2935 sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
2936 symval = (isym->st_value
86aba9db
NC
2937 + sym_sec->output_section->vma
2938 + sym_sec->output_offset);
2939#ifdef DEBUG_RELAX
2940 {
2941 char * name = bfd_elf_string_from_elf_section
5cec6941 2942 (abfd, symtab_hdr->sh_link, isym->st_name);
86aba9db
NC
2943
2944 fprintf (stderr, "relax long jump local: sec: %s, sym: %s (%d), value: %x + %x + %x addend %x\n",
5cec6941
NC
2945 sym_sec->name, name, isym->st_name,
2946 sym_sec->output_section->vma,
2947 sym_sec->output_offset,
2948 isym->st_value, irel->r_addend);
86aba9db
NC
2949 }
2950#endif
2951 }
2952 else
2953 {
2954 unsigned long indx;
2955 struct elf_link_hash_entry * h;
2956
2957 /* An external symbol. */
2958 indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
2959 h = elf_sym_hashes (abfd)[indx];
2960 BFD_ASSERT (h != NULL);
2961
2962 if ( h->root.type != bfd_link_hash_defined
2963 && h->root.type != bfd_link_hash_defweak)
2964 /* This appears to be a reference to an undefined
2965 symbol. Just ignore it--it will be caught by the
2966 regular reloc processing. */
2967 continue;
2968
2969 symval = (h->root.u.def.value
2970 + h->root.u.def.section->output_section->vma
2971 + h->root.u.def.section->output_offset);
2972#ifdef DEBUG_RELAX
2973 fprintf (stderr,
2974 "relax longjump defined: sec: %s, name: %s, value: %x + %x + %x addend %x\n",
2975 sec->name, h->root.root.string, h->root.u.def.value,
2976 sec->output_section->vma, sec->output_offset, irel->r_addend);
2977#endif
2978 }
2979
2980 addend = irel->r_addend;
2981
2982 foff = (symval + addend
2983 - (irel->r_offset
2984 + sec->output_section->vma
2985 + sec->output_offset
2986 + 4));
2987#ifdef DEBUG_RELAX
2988 fprintf (stderr, "relax longjump r_offset 0x%x ptr 0x%x symbol 0x%x addend 0x%x distance 0x%x\n",
2989 irel->r_offset,
2990 (irel->r_offset
2991 + sec->output_section->vma
2992 + sec->output_offset),
2993 symval, addend, foff);
2994#endif
2995 if (foff < -0x100000 || foff >= 0x100000)
2996 /* After all that work, we can't shorten this function call. */
2997 continue;
2998
2999 /* For simplicity of coding, we are going to modify the section
3000 contents, the section relocs, and the BFD symbol table. We
3001 must tell the rest of the code not to free up this
3002 information. It would be possible to instead create a table
3003 of changes which have to be made, as is done in coff-mips.c;
3004 that would be more work, but would require less memory when
3005 the linker is run. */
3006 elf_section_data (sec)->relocs = internal_relocs;
86aba9db 3007 elf_section_data (sec)->this_hdr.contents = contents;
5cec6941 3008 symtab_hdr->contents = (bfd_byte *) isymbuf;
86aba9db
NC
3009
3010 if (foff < -0x100 || foff >= 0x100)
3011 {
3012 /* Replace the long jump with a jr. */
3013
3014 irel->r_info =
b34976b6
AM
3015 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_22_PCREL);
3016
86aba9db
NC
3017 irel->r_addend = addend;
3018 addend = 0;
3019
3020 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3021 /* If this needs to be changed because of future relaxing,
3022 it will be handled here like other internal IND12W
3023 relocs. */
3024 bfd_put_32 (abfd,
3025 0x00000780 | ((addend << 15) & 0xffff0000) | ((addend >> 17) & 0xf),
3026 contents + irel->r_offset);
3027 else
3028 /* We can't fully resolve this yet, because the external
3029 symbol value may be changed by future relaxing.
3030 We let the final link phase handle it. */
3031 bfd_put_32 (abfd, 0x00000780, contents + irel->r_offset);
3032
3033 hi_irelfn->r_info =
3034 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3035 lo_irelfn->r_info =
3036 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3037 if (!v850_elf_relax_delete_bytes (abfd, sec,
3038 irel->r_offset + 4, toaddr, 6))
3039 goto error_return;
3040
3041 align_pad_size += 6;
3042 }
3043 else
3044 {
3045 /* Replace the long jump with a br. */
3046
3047 irel->r_info =
3048 ELF32_R_INFO (ELF32_R_SYM (irel->r_info), R_V850_9_PCREL);
3049
3050 irel->r_addend = addend;
3051 addend = 0;
3052
3053 if (ELF32_R_SYM (hi_irelfn->r_info) < symtab_hdr->sh_info)
3054 /* If this needs to be changed because of future relaxing,
3055 it will be handled here like other internal IND12W
3056 relocs. */
3057 bfd_put_16 (abfd,
3058 0x0585 | ((addend << 10) & 0xf800) | ((addend << 3) & 0x0070),
3059 contents + irel->r_offset);
3060 else
3061 /* We can't fully resolve this yet, because the external
3062 symbol value may be changed by future relaxing.
3063 We let the final link phase handle it. */
3064 bfd_put_16 (abfd, 0x0585, contents + irel->r_offset);
3065
3066 hi_irelfn->r_info =
3067 ELF32_R_INFO (ELF32_R_SYM (hi_irelfn->r_info), R_V850_NONE);
3068 lo_irelfn->r_info =
3069 ELF32_R_INFO (ELF32_R_SYM (lo_irelfn->r_info), R_V850_NONE);
3070 if (!v850_elf_relax_delete_bytes (abfd, sec,
3071 irel->r_offset + 2, toaddr, 8))
3072 goto error_return;
3073
3074 align_pad_size += 8;
3075 }
3076 }
3077 }
3078
3079 irelalign = NULL;
3080 for (irel = internal_relocs; irel < irelend; irel++)
3081 {
3082 if (ELF32_R_TYPE (irel->r_info) == (int) R_V850_ALIGN
3083 && irel->r_offset == toaddr)
3084 {
3085 irel->r_offset -= align_pad_size;
3086
3087 if (irelalign == NULL || irelalign->r_addend > irel->r_addend)
3088 irelalign = irel;
3089 }
3090 }
3091
3092 addr = toaddr;
3093 }
3094
3095 if (!irelalign)
3096 {
3097#ifdef DEBUG_RELAX
3098 fprintf (stderr, "relax pad %d shorten %d -> %d\n",
3099 align_pad_size,
eea6121a
AM
3100 sec->size,
3101 sec->size - align_pad_size);
86aba9db 3102#endif
eea6121a 3103 sec->size -= align_pad_size;
86aba9db
NC
3104 }
3105
5cec6941
NC
3106 finish:
3107 if (internal_relocs != NULL
3108 && elf_section_data (sec)->relocs != internal_relocs)
3109 free (internal_relocs);
86aba9db 3110
5cec6941
NC
3111 if (contents != NULL
3112 && elf_section_data (sec)->this_hdr.contents != (unsigned char *) contents)
3113 free (contents);
86aba9db 3114
5cec6941
NC
3115 if (isymbuf != NULL
3116 && symtab_hdr->contents != (bfd_byte *) isymbuf)
3117 free (isymbuf);
86aba9db 3118
5cec6941 3119 return result;
86aba9db 3120
5cec6941 3121 error_return:
b34976b6 3122 result = FALSE;
5cec6941 3123 goto finish;
86aba9db 3124}
2f89ff8d
L
3125
3126static struct bfd_elf_special_section const v850_elf_special_sections[]=
3127{
7dcb9820
AM
3128 { ".sdata", 6, -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3129 + SHF_V850_GPREL) },
3130 { ".rosdata", 8, -2, SHT_PROGBITS, (SHF_ALLOC
3131 + SHF_V850_GPREL) },
3132 { ".sbss", 5, -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3133 + SHF_V850_GPREL) },
3134 { ".scommon", 8, -2, SHT_V850_SCOMMON, (SHF_ALLOC + SHF_WRITE
3135 + SHF_V850_GPREL) },
3136 { ".tdata", 6, -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3137 + SHF_V850_EPREL) },
3138 { ".tbss", 5, -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3139 + SHF_V850_EPREL) },
3140 { ".tcommon", 8, -2, SHT_V850_TCOMMON, (SHF_ALLOC + SHF_WRITE
3141 + SHF_V850_R0REL) },
3142 { ".zdata", 6, -2, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3143 + SHF_V850_R0REL) },
3144 { ".rozdata", 8, -2, SHT_PROGBITS, (SHF_ALLOC
3145 + SHF_V850_R0REL) },
3146 { ".zbss", 5, -2, SHT_NOBITS, (SHF_ALLOC + SHF_WRITE
3147 + SHF_V850_R0REL) },
3148 { ".zcommon", 8, -2, SHT_V850_ZCOMMON, (SHF_ALLOC + SHF_WRITE
3149 + SHF_V850_R0REL) },
3150 { ".call_table_data", 16, 0, SHT_PROGBITS, (SHF_ALLOC
3151 + SHF_WRITE) },
3152 { ".call_table_text", 16, 0, SHT_PROGBITS, (SHF_ALLOC + SHF_WRITE
3153 + SHF_EXECINSTR) },
3154 { NULL, 0, 0, 0, 0 }
2f89ff8d 3155};
252b5132
RH
3156\f
3157#define TARGET_LITTLE_SYM bfd_elf32_v850_vec
3158#define TARGET_LITTLE_NAME "elf32-v850"
3159#define ELF_ARCH bfd_arch_v850
aa4f99bb
AO
3160#define ELF_MACHINE_CODE EM_V850
3161#define ELF_MACHINE_ALT1 EM_CYGNUS_V850
252b5132 3162#define ELF_MAXPAGESIZE 0x1000
435b1e90 3163
252b5132
RH
3164#define elf_info_to_howto v850_elf_info_to_howto_rela
3165#define elf_info_to_howto_rel v850_elf_info_to_howto_rel
3166
3167#define elf_backend_check_relocs v850_elf_check_relocs
3168#define elf_backend_relocate_section v850_elf_relocate_section
3169#define elf_backend_object_p v850_elf_object_p
3170#define elf_backend_final_write_processing v850_elf_final_write_processing
3171#define elf_backend_section_from_bfd_section v850_elf_section_from_bfd_section
3172#define elf_backend_symbol_processing v850_elf_symbol_processing
3173#define elf_backend_add_symbol_hook v850_elf_add_symbol_hook
3174#define elf_backend_link_output_symbol_hook v850_elf_link_output_symbol_hook
3175#define elf_backend_section_from_shdr v850_elf_section_from_shdr
3176#define elf_backend_fake_sections v850_elf_fake_sections
3177#define elf_backend_gc_mark_hook v850_elf_gc_mark_hook
3178#define elf_backend_gc_sweep_hook v850_elf_gc_sweep_hook
2f89ff8d 3179#define elf_backend_special_sections v850_elf_special_sections
252b5132
RH
3180
3181#define elf_backend_can_gc_sections 1
f0fe0e16 3182#define elf_backend_rela_normal 1
252b5132 3183
252b5132
RH
3184#define bfd_elf32_bfd_is_local_label_name v850_elf_is_local_label_name
3185#define bfd_elf32_bfd_reloc_type_lookup v850_elf_reloc_type_lookup
252b5132
RH
3186#define bfd_elf32_bfd_merge_private_bfd_data v850_elf_merge_private_bfd_data
3187#define bfd_elf32_bfd_set_private_flags v850_elf_set_private_flags
3188#define bfd_elf32_bfd_print_private_bfd_data v850_elf_print_private_bfd_data
86aba9db 3189#define bfd_elf32_bfd_relax_section v850_elf_relax_section
252b5132
RH
3190
3191#define elf_symbol_leading_char '_'
3192
3193#include "elf32-target.h"
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