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[deliverable/binutils-gdb.git] / cpu / ChangeLog
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51419248
NC
12021-07-03 Nick Clifton <nickc@redhat.com>
2
3 * 2.37 release branch created.
4
0b3e14c9
SH
52021-05-06 Stafford Horne <shorne@gmail.com>
6
7 PR 21464
8 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
9 for gotha() relocation.
10
78933a4a
AM
112021-03-31 Alan Modra <amodra@gmail.com>
12
13 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
14 TRUE with true throughout.
15
3d7d6c1b
AM
162021-03-29 Alan Modra <amodra@gmail.com>
17
18 * frv.opc (frv_is_branch_major, frv_is_float_major),
19 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
20 (frv_is_media_insn, spr_valid): Correct prototypes.
21
055bc77a
NC
222021-01-09 Nick Clifton <nickc@redhat.com>
23
24 * 2.36 release branch crated.
25
0cc79db2
SN
262020-10-05 Samanta Navarro <ferivoz@riseup.net>
27
28 * m32r.cpu: Fix spelling mistakes.
29
6e25f888
DF
302020-09-18 David Faust <david.faust@oracle.com>
31
32 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
33 (define-alu-insn-bin, daib): Take ISAs as an argument.
34 (define-alu-instructions): Update calls to daib pmacro with
35 ISAs; add sdiv and smod.
36
3ad6c194
DF
372020-09-08 David Faust <david.faust@oracle.com>
38
39 * bpf.cpu (define-alu-instructions): Correct semantic operators
40 for div, mod to unsigned versions.
41
8dbe96f0
AM
422020-09-01 Alan Modra <amodra@gmail.com>
43
44 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
45 value by two rather than shifting left.
46 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
47
4449c81a
DF
482020-08-26 David Faust <david.faust@oracle.com>
49
50 * bpf.cpu (arch bpf): Add xbpf mach and isas.
51 (define-xbpf-isa) New pmacro.
52 (all-isas) Add xbpfle,xbpfbe.
53 (endian-isas): New pmacro.
54 (mach xbpf): New.
55 (model xbpf-def): Likewise.
56 (h-gpr): Add xbpf mach.
57 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
58 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
59 (define-alu-insn-un): Use new endian-isas pmacro.
60 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
61 (define-endian-insn, define-lddw): Likewise.
62 (dlind, dxli, dxsi, dsti): Likewise.
63 (define-cond-jump-insn, define-call-insn): Likewise.
64 (define-atomic-insns): Likewise.
65
b115b9fd
NC
662020-07-04 Nick Clifton <nickc@redhat.com>
67
68 Binutils 2.35 branch created.
69
d73be611
DF
702020-06-25 David Faust <david.faust@oracle.com>
71
72 * bpf.cpu (f-offset16): Change type from INT to HI.
73 (dxli): Simplify memory access.
74 (dxsi): Likewise.
75 (define-endian-insn): Update c-call in semantics.
76 (dlabs) Likewise.
77 (dlind) Likewise.
78
d8740be1
JM
792020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
80
81 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
82 * bpf.opc (bpf_print_insn): Do not set endian_code here.
83
e9bffec9
JM
842020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
85
86 * mep.opc (print_slot_insn): Pass the insn endianness to
87 cgen_get_insn_value.
88
78c1c354
JM
892020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
90 David Faust <david.faust@oracle.com>
91
92 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
93 (define-alu-insn-mov): Likewise.
94 (daib): Likewise.
95 (define-alu-instructions): Likewise.
96 (define-endian-insn): Likewise.
97 (define-lddw): Likewise.
98 (dlabs): Likewise.
99 (dlind): Likewise.
100 (dxli): Likewise.
101 (dxsi): Likewise.
102 (dsti): Likewise.
103 (define-ldstx-insns): Likewise.
104 (define-st-insns): Likewise.
105 (define-cond-jump-insn): Likewise.
106 (dcji): Likewise.
107 (define-condjump-insns): Likewise.
108 (define-call-insn): Likewise.
109 (ja): Likewise.
110 ("exit"): Likewise.
111 (define-atomic-insns): Likewise.
112 (sem-exchange-and-add): New macro.
113 * bpf.cpu ("brkpt"): New instruction.
114 (bpfbf): Set word-bitsize to 32 and insn-endian big.
115 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
116 (h-pc): Expand definition.
117 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
118
d96bf37b
AM
1192020-05-21 Alan Modra <amodra@gmail.com>
120
121 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
122 "if (x) free (x)" with "free (x)".
123
ae440402
SH
1242020-05-19 Stafford Horne <shorne@gmail.com>
125
126 PR 25184
127 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
128 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
129 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
130 * or1kcommon.cpu (h-fdr): Remove hardware.
131 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
132 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
133 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
134 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
135 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
136
c54a9b56
DF
1372020-02-16 David Faust <david.faust@oracle.com>
138
139 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
140 (dcji) New version with support for JMP32
141
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AM
1422020-02-03 Alan Modra <amodra@gmail.com>
143
144 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
145
b2b1453a
AM
1462020-02-01 Alan Modra <amodra@gmail.com>
147
148 * frv.cpu (f-u12): Multiply rather than left shift signed values.
149 (f-label16, f-label24): Likewise.
150
0c115f84
AM
1512020-01-30 Alan Modra <amodra@gmail.com>
152
153 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
154 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
155 (f-dst32-rn-prefixed-QI): Likewise.
156 (f-dsp-32-s32): Mask before shifting left.
157 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
158 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
159 shifting left.
160 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
161 (h-gr-SI): Mask before shifting.
162
bd434cc4
JM
1632020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
164
165 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
166 (neg and neg32) use OP_SRC_K even if they operate only in
167 registers.
168
ae774686
NC
1692020-01-18 Nick Clifton <nickc@redhat.com>
170
171 Binutils 2.34 branch created.
172
202e762b
AM
1732020-01-13 Alan Modra <amodra@gmail.com>
174
175 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
176 left shift signed values.
177
cc6aa1a6
AM
1782020-01-06 Alan Modra <amodra@gmail.com>
179
180 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
181 bits before shifting rather than masking after shifting.
182 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
183 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
184 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
185 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
186
1872020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM
188
189 * m32r.cpu (f-disp8): Avoid left shift of negative values.
190 (f-disp16, f-disp24): Likewise.
191
3e1056a1
AM
1922019-12-23 Alan Modra <amodra@gmail.com>
193
194 * iq2000.cpu (f-offset): Avoid left shift of negative values.
195
bcd9f578
AM
1962019-12-20 Alan Modra <amodra@gmail.com>
197
198 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
199
62e65990
AM
2002019-12-17 Alan Modra <amodra@gmail.com>
201
202 * bpf.cpu (f-imm64): Avoid signed overflow.
203
e6ced26a
AM
2042019-12-16 Alan Modra <amodra@gmail.com>
205
206 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
207
1d61b032
AM
2082019-12-11 Alan Modra <amodra@gmail.com>
209
210 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
211 * lm32.cpu (f-branch, f-vall): Likewise.
212 * m32.cpu (f-lab-8-16): Likewise.
213
b8e61daa
AM
2142019-12-11 Alan Modra <amodra@gmail.com>
215
216 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
217 shift left to avoid UB on left shift of negative values.
218
e042e6c3
JM
2192019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
220
221 * bpf.cpu: Fix comment describing the 128-bit instruction format.
222
60391a25
PB
2232019-09-09 Phil Blundell <pb@pbcl.net>
224
225 binutils 2.33 branch created.
226
231097b0
JM
2272019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
228
229 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
230 %a and %ctx.
231
3719fd55
JM
2322019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
233
234 * bpf.cpu (dlabs): New pmacro.
235 (dlind): Likewise.
236
92434a14
JM
2372019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
238
239 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
240 explicit 'dst' argument.
241
a2e4218f
SH
2422019-06-13 Stafford Horne <shorne@gmail.com>
243
244 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
245
eb212c84
SH
2462019-06-13 Stafford Horne <shorne@gmail.com>
247
248 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
249 (l-adrp): Improve comment.
250
d3ad6278
SH
2512019-06-13 Stafford Horne <shorne@gmail.com>
252
253 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
254 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
255 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
256 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
257 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
258 float-setflag-unordered-symantics): New pmacro for instruction
259 symantics.
260 (float-setflag-insn): Update to use float-setflag-insn-base.
261 (float-setflag-unordered-insn): New pmacro for generating instructions.
262
6ce26ac7
SH
2632019-06-13 Andrey Bacherov <avbacherov@opencores.org>
264 Stafford Horne <shorne@gmail.com>
265
266 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
267 (ORFPX-MACHS): Removed pmacro.
268 * or1k.opc (or1k_cgen_insn_supported): New function.
269 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
270 (parse_regpair, print_regpair): New functions.
271 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
272 and add comments.
273 (h-fdr): Update comment to indicate or64.
274 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
275 (h-fd32r): New hardware for 64-bit fpu registers.
276 (h-i64r): New hardware for 64-bit int registers.
277 * or1korbis.cpu (f-resv-8-1): New field.
278 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
279 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
280 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
281 (h-roff1): New hardware.
282 (double-field-and-ops mnemonic): New pmacro to generate operations
283 rDD32F, rAD32F, rBD32F, rDDI and rADI.
284 (float-regreg-insn): Update single precision generator to MACH
285 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
286 (float-setflag-insn): Update single precision generator to MACH
287 ORFPX32-MACHS. Fix double instructions from single to double
288 precision. Add generator for or32 64-bit instructions.
289 (float-cust-insn cust-num): Update single precision generator to MACH
290 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
291 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
292 ORFPX32-MACHS.
293 (lf-rem-d): Fix operation from mod to rem.
294 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
295 (lf-itof-d): Fix operands from single to double.
296 (lf-ftoi-d): Update operand mode from DI to WI.
297
ea195bb0
JM
2982019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
299
300 * bpf.cpu: New file.
301 * bpf.opc: Likewise.
302
f974f26c
NC
3032018-06-24 Nick Clifton <nickc@redhat.com>
304
305 2.32 branch created.
306
07f5f4c6
RH
3072018-10-05 Richard Henderson <rth@twiddle.net>
308 Stafford Horne <shorne@gmail.com>
309
310 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
311 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
312 (l-mul): Fix overflow support and indentation.
313 (l-mulu): Fix overflow support and indentation.
314 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
315 (l-div); Remove incorrect carry behavior.
316 (l-divu): Fix carry and overflow behavior.
317 (l-mac): Add overflow support.
318 (l-msb, l-msbu): Add carry and overflow support.
319
c8e98e36
SH
3202018-10-05 Richard Henderson <rth@twiddle.net>
321
322 * or1k.opc (parse_disp26): Add support for plta() relocations.
323 (parse_disp21): New function.
324 (or1k_rclass): New enum.
325 (or1k_rtype): New enum.
326 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
327 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
328 (parse_imm16): Add support for the new 21bit and 13bit relocations.
329 * or1korbis.cpu (f-disp26): Don't assume SI.
330 (f-disp21): New pc-relative 21-bit 13 shifted to right.
331 (insn-opcode): Add ADRP.
332 (l-adrp): New instruction.
333
1c4f3780
RH
3342018-10-05 Richard Henderson <rth@twiddle.net>
335
336 * or1k.opc: Add RTYPE_ enum.
337 (INVALID_STORE_RELOC): New string.
338 (or1k_imm16_relocs): New array array.
339 (parse_reloc): New static function that just does the parsing.
340 (parse_imm16): New static function for generic parsing.
341 (parse_simm16): Change to just call parse_imm16.
342 (parse_simm16_split): New function.
343 (parse_uimm16): Change to call parse_imm16.
344 (parse_uimm16_split): New function.
345 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
346 (uimm16-split): Change to use new uimm16_split.
347
67ce483b
AM
3482018-07-24 Alan Modra <amodra@gmail.com>
349
350 PR 23430
351 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
352
84f9f8c3
AM
3532018-05-09 Sebastian Rasmussen <sebras@gmail.com>
354
355 * or1kcommon.cpu (spr-reg-info): Typo fix.
356
a6743a54
AM
3572018-03-03 Alan Modra <amodra@gmail.com>
358
359 * frv.opc: Include opintl.h.
360 (add_next_to_vliw): Use opcodes_error_handler to print error.
361 Standardize error message.
362 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
363
faf766e3
NC
3642018-01-13 Nick Clifton <nickc@redhat.com>
365
366 2.30 branch created.
367
4ea0266c
SH
3682017-03-15 Stafford Horne <shorne@gmail.com>
369
370 * or1kcommon.cpu: Add pc set semantics to also update ppc.
371
b781683b
AM
3722016-10-06 Alan Modra <amodra@gmail.com>
373
374 * mep.opc (expand_string): Add fall through comment.
375
439baf71
AM
3762016-03-03 Alan Modra <amodra@gmail.com>
377
378 * fr30.cpu (f-m4): Replace bogus comment with a better guess
379 at what is really going on.
380
62de1c63
AM
3812016-03-02 Alan Modra <amodra@gmail.com>
382
383 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
384
b89807c6
AB
3852016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
386
387 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
388 a constant to better align disassembler output.
389
018dc9be
SK
3902014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
391
392 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
393
c151b1c6
AM
3942014-06-12 Alan Modra <amodra@gmail.com>
395
396 * or1k.opc: Whitespace fixes.
397
999b995d
SK
3982014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
399
400 * or1korbis.cpu (h-atomic-reserve): New hardware.
401 (h-atomic-address): Likewise.
402 (insn-opcode): Add opcodes for LWA and SWA.
403 (atomic-reserve): New operand.
404 (atomic-address): Likewise.
405 (l-lwa, l-swa): New instructions.
406 (l-lbs): Fix typo in comment.
407 (store-insn): Clear atomic reserve on store to atomic-address.
408 Fix register names in fmt field.
409
73589c9d
CS
4102014-04-22 Christian Svensson <blue@cmd.nu>
411
412 * openrisc.cpu: Delete.
413 * openrisc.opc: Delete.
414 * or1k.cpu: New file.
415 * or1k.opc: New file.
416 * or1kcommon.cpu: New file.
417 * or1korbis.cpu: New file.
418 * or1korfpx.cpu: New file.
419
594d8fa8
MF
4202013-12-07 Mike Frysinger <vapier@gentoo.org>
421
422 * epiphany.opc: Remove +x file mode.
423
87a8d6cb
NC
4242013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
425
426 PR binutils/15241
427 * lm32.cpu (Control and status registers): Add CFG2, PSW,
428 TLBVADDR, TLBPADDR and TLBBADVADDR.
429
02a79b89
JR
4302012-11-30 Oleg Raikhman <oleg@adapteva.com>
431 Joern Rennecke <joern.rennecke@embecosm.com>
432
433 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
434 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
435 (testset-insn): Add NO_DIS attribute to t.l.
436 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
437 (move-insns): Add NO-DIS attribute to cmov.l.
438 (op-mmr-movts): Add NO-DIS attribute to movts.l.
439 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
440 (op-rrr): Add NO-DIS attribute to .l.
441 (shift-rrr): Add NO-DIS attribute to .l.
442 (op-shift-rri): Add NO-DIS attribute to i32.l.
443 (bitrl, movtl): Add NO-DIS attribute.
444 (op-iextrrr): Add NO-DIS attribute to .l
445 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
446 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
447
a597d2d3
AM
4482012-02-27 Alan Modra <amodra@gmail.com>
449
450 * mt.opc (print_dollarhex): Trim values to 32 bits.
451
5011093d
NC
4522011-12-15 Nick Clifton <nickc@redhat.com>
453
454 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
455 hosts.
456
fd936b4c
JR
4572011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
458
459 * epiphany.opc (parse_branch_addr): Fix type of valuep.
460 Cast value before printing it as a long.
461 (parse_postindex): Fix type of valuep.
462
cfb8c092
NC
4632011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
464
465 * cpu/epiphany.cpu: New file.
466 * cpu/epiphany.opc: New file.
467
dc15e575
NC
4682011-08-22 Nick Clifton <nickc@redhat.com>
469
470 * fr30.cpu: Newly contributed file.
471 * fr30.opc: Likewise.
472 * ip2k.cpu: Likewise.
473 * ip2k.opc: Likewise.
474 * mep-avc.cpu: Likewise.
475 * mep-avc2.cpu: Likewise.
476 * mep-c5.cpu: Likewise.
477 * mep-core.cpu: Likewise.
478 * mep-default.cpu: Likewise.
479 * mep-ext-cop.cpu: Likewise.
480 * mep-fmax.cpu: Likewise.
481 * mep-h1.cpu: Likewise.
482 * mep-ivc2.cpu: Likewise.
483 * mep-rhcop.cpu: Likewise.
484 * mep-sample-ucidsp.cpu: Likewise.
485 * mep.cpu: Likewise.
486 * mep.opc: Likewise.
487 * openrisc.cpu: Likewise.
488 * openrisc.opc: Likewise.
489 * xstormy16.cpu: Likewise.
490 * xstormy16.opc: Likewise.
491
9ccb8af9
AM
4922010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
493
494 * frv.opc: #undef DEBUG.
495
21375995
DD
4962010-07-03 DJ Delorie <dj@delorie.com>
497
498 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
499
5ff58fb0
DE
5002010-02-11 Doug Evans <dje@sebabeach.org>
501
502 * m32r.cpu (HASH-PREFIX): Delete.
503 (duhpo, dshpo): New pmacros.
504 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
505 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
506 attribute, define with dshpo.
507 (uimm24): Delete HASH-PREFIX attribute.
508 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
509 (print_signed_with_hash_prefix): New function.
510 (print_unsigned_with_hash_prefix): New function.
511 * xc16x.cpu (dowh): New pmacro.
512 (upof16): Define with dowh, specify print handler.
513 (qbit, qlobit, qhibit): Ditto.
514 (upag16): Ditto.
515 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
516 (print_with_dot_prefix): New functions.
517 (print_with_pof_prefix, print_with_pag_prefix): New functions.
518
3fa5b97b
DE
5192010-01-24 Doug Evans <dje@sebabeach.org>
520
521 * frv.cpu (floating-point-conversion): Update call to fp conv op.
522 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
523 conditional-floating-point-conversion, ne-floating-point-conversion,
524 float-parallel-mul-add-double-semantics): Ditto.
525
fe8afbc4
DE
5262010-01-05 Doug Evans <dje@sebabeach.org>
527
528 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
529 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
530
caaf56fb
DE
5312010-01-02 Doug Evans <dje@sebabeach.org>
532
533 * m32c.opc (parse_signed16): Fix typo.
534
91d6fa6a
NC
5352009-12-11 Nick Clifton <nickc@redhat.com>
536
537 * frv.opc: Fix shadowed variable warnings.
538 * m32c.opc: Fix shadowed variable warnings.
539
ec84cc2b
DE
5402009-11-14 Doug Evans <dje@sebabeach.org>
541
542 Must use VOID expression in VOID context.
543 * xc16x.cpu (mov4): Fix mode of `sequence'.
544 (mov9, mov10): Ditto.
545 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
546 (callr, callseg, calls, trap, rets, reti): Ditto.
547 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
548 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
549 (exts, exts1, extsr, extsr1, prior): Ditto.
550
ac1e9eca
DE
5512009-10-23 Doug Evans <dje@sebabeach.org>
552
553 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
554 cgen-ops.h -> cgen/basic-ops.h.
555
b4744b17
AM
5562009-09-25 Alan Modra <amodra@bigpond.net.au>
557
558 * m32r.cpu (stb-plus): Typo fix.
559
ab5f875d
DE
5602009-09-23 Doug Evans <dje@sebabeach.org>
561
562 * m32r.cpu (sth-plus): Fix address mode and calculation.
563 (stb-plus): Ditto.
564 (clrpsw): Fix mask calculation.
565 (bset, bclr, btst): Make mode in bit calculation match expression.
566
567 * xc16x.cpu (rtl-version): Set to 0.8.
568 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
569 make uppercase. Remove unnecessary name-prefix spec.
570 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
571 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
572 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
573 (h-cr): New hardware.
574 (muls): Comment out parts that won't compile, add fixme.
575 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
576 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
577 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
578
0aaaf7c3
DE
5792009-07-16 Doug Evans <dje@sebabeach.org>
580
581 * cpu/simplify.inc (*): One line doc strings don't need \n.
582 (df): Invoke define-full-ifield instead of claiming it's an alias.
583 (dno): Define.
584 (dnop): Mark as deprecated.
585
1998a8e0
AM
5862009-06-22 Alan Modra <amodra@bigpond.net.au>
587
588 * m32c.opc (parse_lab_5_3): Use correct enum.
589
6347aad8
HPN
5902009-01-07 Hans-Peter Nilsson <hp@axis.com>
591
592 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
593 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
594 (media-arith-sat-semantics): Explicitly sign- or zero-extend
595 arguments of "operation" to DI using "mode" and the new pmacros.
596
2c06b7a6
HPN
5972009-01-03 Hans-Peter Nilsson <hp@axis.com>
598
599 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
600 of number 2, PID.
601
84e94c90
NC
6022008-12-23 Jon Beniston <jon@beniston.com>
603
604 * lm32.cpu: New file.
605 * lm32.opc: New file.
606
90518ff4
AM
6072008-01-29 Alan Modra <amodra@bigpond.net.au>
608
609 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
610 to source.
611
a69f60de
HPN
6122007-10-22 Hans-Peter Nilsson <hp@axis.com>
613
614 * cris.cpu (movs, movu): Use result of extension operation when
615 updating flags.
616
9b201bb5
NC
6172007-07-04 Nick Clifton <nickc@redhat.com>
618
619 * cris.cpu: Update copyright notice to refer to GPLv3.
620 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
621 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
622 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
623 xc16x.opc: Likewise.
624 * iq2000.cpu: Fix copyright notice to refer to FSF.
625
53289dcd
MS
6262007-04-30 Mark Salter <msalter@sadr.localdomain>
627
628 * frv.cpu (spr-names): Support new coprocessor SPR registers.
629
f6da2ec2
NC
6302007-04-20 Nick Clifton <nickc@redhat.com>
631
632 * xc16x.cpu: Restore after accidentally overwriting this file with
633 xc16x.opc.
634
144f4bc6
DD
6352007-03-29 DJ Delorie <dj@redhat.com>
636
637 * m32c.cpu (Imm-8-s4n): Fix print hook.
638 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
639 (arith-jnz-imm4-dst-defn): Make relaxable.
640 (arith-jnz16-imm4-dst-defn): Fix encodings.
641
75b06e7b
DD
6422007-03-20 DJ Delorie <dj@redhat.com>
643
644 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
645 mem20): New.
646 (src16-16-20-An-relative-*): New.
647 (dst16-*-20-An-relative-*): New.
648 (dst16-16-16sa-*): New
649 (dst16-16-16ar-*): New
650 (dst32-16-16sa-Unprefixed-*): New
651 (jsri): Fix operands.
652 (setzx): Fix encoding.
72f4393d 653
a5da764d
AM
6542007-03-08 Alan Modra <amodra@bigpond.net.au>
655
656 * m32r.opc: Formatting.
657
b497d0b0
NC
6582006-05-22 Nick Clifton <nickc@redhat.com>
659
660 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
661
e78efa90
DD
6622006-04-10 DJ Delorie <dj@redhat.com>
663
664 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
665 decides if this function accepts symbolic constants or not.
666 (parse_signed_bitbase): Likewise.
667 (parse_unsigned_bitbase8): Pass the new parameter.
668 (parse_unsigned_bitbase11): Likewise.
669 (parse_unsigned_bitbase16): Likewise.
670 (parse_unsigned_bitbase19): Likewise.
671 (parse_unsigned_bitbase27): Likewise.
672 (parse_signed_bitbase8): Likewise.
673 (parse_signed_bitbase11): Likewise.
674 (parse_signed_bitbase19): Likewise.
72f4393d 675
8d0e2679
DD
6762006-03-13 DJ Delorie <dj@redhat.com>
677
43aa3bb1
DD
678 * m32c.cpu (Bit3-S): New.
679 (btst:s): New.
680 * m32c.opc (parse_bit3_S): New.
681
8d0e2679
DD
682 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
683 (btst): Add optional :G suffix for MACH32.
684 (or.b:S): New.
685 (pop.w:G): Add optional :G suffix for MACH16.
686 (push.b.imm): Fix syntax.
687
253d272c
DD
6882006-03-10 DJ Delorie <dj@redhat.com>
689
690 * m32c.cpu (mul.l): New.
691 (mulu.l): New.
692
c7d41dc5
NC
6932006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
694
695 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
696 an error message otherwise.
697 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
698 Fix up comments to correctly describe the functions.
699
6772dd07
DD
7002006-02-24 DJ Delorie <dj@redhat.com>
701
702 * m32c.cpu (RL_TYPE): New attribute, with macros.
703 (Lab-8-24): Add RELAX.
704 (unary-insn-defn-g, binary-arith-imm-dst-defn,
705 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
706 (binary-arith-src-dst-defn): Add 2ADDR attribute.
707 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
708 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
709 attribute.
710 (jsri16, jsri32): Add 1ADDR attribute.
711 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 712
d70c5fc7 7132006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L
714 Anil Paranjape <anilp1@kpitcummins.com>
715 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC
716
717 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
718 description.
719 * xc16x.opc: New file containing supporting XC16C routines.
720
8536c657
NC
7212006-02-10 Nick Clifton <nickc@redhat.com>
722
723 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
724
458f7770
DD
7252006-01-06 DJ Delorie <dj@redhat.com>
726
727 * m32c.cpu (mov.w:q): Fix mode.
728 (push32.b.imm): Likewise, for the comment.
729
d031aafb
NS
7302005-12-16 Nathan Sidwell <nathan@codesourcery.com>
731
732 Second part of ms1 to mt renaming.
733 * mt.cpu (define-arch, define-isa): Set name to mt.
734 (define-mach): Adjust.
735 * mt.opc (CGEN_ASM_HASH): Update.
736 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
737 (parse_loopsize, parse_imm16): Adjust.
738
eda87aba
DD
7392005-12-13 DJ Delorie <dj@redhat.com>
740
741 * m32c.cpu (jsri): Fix order so register names aren't treated as
742 symbols.
743 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
744 indexwd, indexws): Fix encodings.
745
4970f871
NS
7462005-12-12 Nathan Sidwell <nathan@codesourcery.com>
747
748 * mt.cpu: Rename from ms1.cpu.
749 * mt.opc: Rename from ms1.opc.
750
48ad8298
HPN
7512005-12-06 Hans-Peter Nilsson <hp@axis.com>
752
753 * cris.cpu (simplecris-common-writable-specregs)
754 (simplecris-common-readable-specregs): Split from
755 simplecris-common-specregs. All users changed.
756 (cris-implemented-writable-specregs-v0)
757 (cris-implemented-readable-specregs-v0): Similar from
758 cris-implemented-specregs-v0.
759 (cris-implemented-writable-specregs-v3)
760 (cris-implemented-readable-specregs-v3)
761 (cris-implemented-writable-specregs-v8)
762 (cris-implemented-readable-specregs-v8)
763 (cris-implemented-writable-specregs-v10)
764 (cris-implemented-readable-specregs-v10)
765 (cris-implemented-writable-specregs-v32)
766 (cris-implemented-readable-specregs-v32): Similar.
767 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
768 insns and specializations.
769
6f84a2a6
NS
7702005-11-08 Nathan Sidwell <nathan@codesourcery.com>
771
772 Add ms2
773 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
774 model.
775 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
776 f-cb2incr, f-rc3): New fields.
777 (LOOP): New instruction.
778 (JAL-HAZARD): New hazard.
779 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
780 New operands.
781 (mul, muli, dbnz, iflush): Enable for ms2
782 (jal, reti): Has JAL-HAZARD.
783 (ldctxt, ldfb, stfb): Only ms1.
784 (fbcb): Only ms1,ms1-003.
785 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
786 fbcbincrs, mfbcbincrs): Enable for ms2.
787 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
788 * ms1.opc (parse_loopsize): New.
789 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
790 (print_pcrel): New.
791
95b96521
DB
7922005-10-28 Dave Brolley <brolley@redhat.com>
793
794 Contribute the following change:
795 2003-09-24 Dave Brolley <brolley@redhat.com>
796
797 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
798 CGEN_ATTR_VALUE_TYPE.
799 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
800 Use cgen_bitset_intersect_p.
801
c6552317
DD
8022005-10-27 DJ Delorie <dj@redhat.com>
803
804 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
805 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
806 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
807 imm operand is needed.
808 (adjnz, sbjnz): Pass the right operands.
809 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
810 unary-insn): Add -g variants for opcodes that need to support :G.
811 (not.BW:G, push.BW:G): Call it.
812 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
813 stzx16-imm8-imm8-abs16): Fix operand typos.
814 * m32c.opc (m32c_asm_hash): Support bnCND.
815 (parse_signed4n, print_signed4n): New.
72f4393d 816
f75eb1c0
DD
8172005-10-26 DJ Delorie <dj@redhat.com>
818
819 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
820 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
821 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
822 dsp8[sp] is signed.
823 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
824 (mov.BW:S r0,r1): Fix typo r1l->r1.
825 (tst): Allow :G suffix.
826 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
827
e277c00b
AM
8282005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
829
830 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
831
92e0a941
DD
8322005-10-25 DJ Delorie <dj@redhat.com>
833
834 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
835 making one a macro of the other.
836
a1a280bb
DD
8372005-10-21 DJ Delorie <dj@redhat.com>
838
839 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
840 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
841 indexld, indexls): .w variants have `1' bit.
842 (rot32.b): QI, not SI.
843 (rot32.w): HI, not SI.
844 (xchg16): HI for .w variant.
845
e74eb924
NC
8462005-10-19 Nick Clifton <nickc@redhat.com>
847
848 * m32r.opc (parse_slo16): Fix bad application of previous patch.
849
5e03663f
NC
8502005-10-18 Andreas Schwab <schwab@suse.de>
851
852 * m32r.opc (parse_slo16): Better version of previous patch.
853
ab7c9a26
NC
8542005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
855
856 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
857 size.
858
fd54057a
DD
8592005-07-25 DJ Delorie <dj@redhat.com>
860
861 * m32c.opc (parse_unsigned8): Add %dsp8().
862 (parse_signed8): Add %hi8().
863 (parse_unsigned16): Add %dsp16().
864 (parse_signed16): Add %lo16() and %hi16().
865 (parse_lab_5_3): Make valuep a bfd_vma *.
866
85da3a56
NC
8672005-07-18 Nick Clifton <nickc@redhat.com>
868
869 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
870 components.
871 (f-lab32-jmp-s): Fix insertion sequence.
872 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
873 (Dsp-40-s8): Make parameter be signed.
874 (Dsp-40-s16): Likewise.
875 (Dsp-48-s8): Likewise.
876 (Dsp-48-s16): Likewise.
877 (Imm-13-u3): Likewise. (Despite its name!)
878 (BitBase16-16-s8): Make the parameter be unsigned.
879 (BitBase16-8-u11-S): Likewise.
880 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
881 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
882 relaxation.
883
884 * m32c.opc: Fix formatting.
885 Use safe-ctype.h instead of ctype.h
886 Move duplicated code sequences into a macro.
887 Fix compile time warnings about signedness mismatches.
888 Remove dead code.
889 (parse_lab_5_3): New parser function.
72f4393d 890
aa260854
JB
8912005-07-16 Jim Blandy <jimb@redhat.com>
892
893 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
894 to represent isa sets.
895
0a665bfd
JB
8962005-07-15 Jim Blandy <jimb@redhat.com>
897
898 * m32c.cpu, m32c.opc: Fix copyright.
899
49f58d10
JB
9002005-07-14 Jim Blandy <jimb@redhat.com>
901
902 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
903
0e6b69be
AM
9042005-07-14 Alan Modra <amodra@bigpond.net.au>
905
906 * ms1.opc (print_dollarhex): Correct format string.
907
f9210e37
AM
9082005-07-06 Alan Modra <amodra@bigpond.net.au>
909
910 * iq2000.cpu: Include from binutils cpu dir.
911
3ec2b351
NC
9122005-07-05 Nick Clifton <nickc@redhat.com>
913
914 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
915 unsigned in order to avoid compile time warnings about sign
916 conflicts.
917
918 * ms1.opc (parse_*): Likewise.
919 (parse_imm16): Use a "void *" as it is passed both signed and
920 unsigned arguments.
921
47b0e7ad
NC
9222005-07-01 Nick Clifton <nickc@redhat.com>
923
924 * frv.opc: Update to ISO C90 function declaration style.
925 * iq2000.opc: Likewise.
926 * m32r.opc: Likewise.
927 * sh.opc: Likewise.
928
b081650b
DB
9292005-06-15 Dave Brolley <brolley@redhat.com>
930
931 Contributed by Red Hat.
932 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
933 * ms1.opc: New file. Written by Stan Cox.
934
e172dbf8
NC
9352005-05-10 Nick Clifton <nickc@redhat.com>
936
937 * Update the address and phone number of the FSF organization in
938 the GPL notices in the following files:
939 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
940 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
941 sh64-media.cpu, simplify.inc
942
b2d52a48
AM
9432005-02-24 Alan Modra <amodra@bigpond.net.au>
944
945 * frv.opc (parse_A): Warning fix.
946
33b71eeb
NC
9472005-02-23 Nick Clifton <nickc@redhat.com>
948
949 * frv.opc: Fixed compile time warnings about differing signed'ness
950 of pointers passed to functions.
951 * m32r.opc: Likewise.
952
bc18c937
NC
9532005-02-11 Nick Clifton <nickc@redhat.com>
954
955 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
956 'bfd_vma *' in order avoid compile time warning message.
957
46da9a19
HPN
9582005-01-28 Hans-Peter Nilsson <hp@axis.com>
959
960 * cris.cpu (mstep): Add missing insn.
961
90219bd0
AO
9622005-01-25 Alexandre Oliva <aoliva@redhat.com>
963
964 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
965 * frv.cpu: Add support for TLS annotations in loads and calll.
966 * frv.opc (parse_symbolic_address): New.
967 (parse_ldd_annotation): New.
968 (parse_call_annotation): New.
969 (parse_ld_annotation): New.
970 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
971 Introduce TLS relocations.
972 (parse_d12, parse_s12, parse_u12): Likewise.
973 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
974 (parse_call_label, print_at): New.
975
c3d75c30
HPN
9762004-12-21 Mikael Starvik <starvik@axis.com>
977
978 * cris.cpu (cris-set-mem): Correct integral write semantics.
979
68800d83
HPN
9802004-11-29 Hans-Peter Nilsson <hp@axis.com>
981
982 * cris.cpu: New file.
983
4bd1d37b
NC
9842004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
985
986 * iq2000.cpu: Added quotes around macro arguments so that they
987 will work with newer versions of guile.
988
4030fa5a
NC
9892004-10-27 Nick Clifton <nickc@redhat.com>
990
991 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
992 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
993 operand.
994 * iq2000.cpu (dnop index): Rename to _index to avoid complications
995 with guile.
996
ac28a1cb
RS
9972004-08-27 Richard Sandiford <rsandifo@redhat.com>
998
999 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
1000
dc4c54bb
NC
10012004-05-15 Nick Clifton <nickc@redhat.com>
1002
1003 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1004
f4453dfa
NC
10052004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1006
1007 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1008
676a64f4
RS
10092004-03-01 Richard Sandiford <rsandifo@redhat.com>
1010
1011 * frv.cpu (define-arch frv): Add fr450 mach.
1012 (define-mach fr450): New.
1013 (define-model fr450): New. Add profile units to every fr450 insn.
1014 (define-attr UNIT): Add MDCUTSSI.
1015 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
1016 (define-attr AUDIO): New boolean.
1017 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1018 (f-LRA-null, f-TLBPR-null): New fields.
1019 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1020 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1021 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1022 (LRA-null, TLBPR-null): New macros.
1023 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1024 (load-real-address): New macro.
1025 (lrai, lrad, tlbpr): New instructions.
1026 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1027 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1028 (mdcutssi): Change UNIT attribute to MDCUTSSI.
1029 (media-low-clear-semantics, media-scope-limit-semantics)
1030 (media-quad-limit, media-quad-shift): New macros.
1031 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1032 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1033 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1034 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1035 (fr450_unit_mapping): New array.
1036 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1037 for new MDCUTSSI unit.
1038 (fr450_check_insn_major_constraints): New function.
1039 (check_insn_major_constraints): Use it.
1040
c7a48b9a
RS
10412004-03-01 Richard Sandiford <rsandifo@redhat.com>
1042
1043 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1044 (scutss): Change unit to I0.
1045 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1046 (mqsaths): Fix FR400-MAJOR categorization.
1047 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1048 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1049 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1050 combinations.
1051
8ae0baa2
RS
10522004-03-01 Richard Sandiford <rsandifo@redhat.com>
1053
1054 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1055 (rstb, rsth, rst, rstd, rstq): Delete.
1056 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1057
8ee9a8b2
NC
10582004-02-23 Nick Clifton <nickc@redhat.com>
1059
1060 * Apply these patches from Renesas:
1061
1062 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1063
1064 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1065 disassembling codes for 0x*2 addresses.
1066
1067 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1068
1069 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1070
1071 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1072
1073 * cpu/m32r.cpu : Add new model m32r2.
1074 Add new instructions.
1075 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1076 Changed PIPE attr of push from O to OS.
1077 Care for Little-endian of M32R.
1078 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1079 Care for Little-endian of M32R.
1080 (parse_slo16): signed extension for value.
1081
299d901c
AC
10822004-02-20 Andrew Cagney <cagney@redhat.com>
1083
e866a257
AC
1084 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1085 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1086
299d901c
AC
1087 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1088 written by Ben Elliston.
1089
cb10e79a
RS
10902004-01-14 Richard Sandiford <rsandifo@redhat.com>
1091
1092 * frv.cpu (UNIT): Add IACC.
1093 (iacc-multiply-r-r): Use it.
1094 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1095 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1096
d4e4dc14
AO
10972004-01-06 Alexandre Oliva <aoliva@redhat.com>
1098
1099 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1100 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1101 cut&paste errors in shifting/truncating numerical operands.
1102 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1103 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1104 (parse_uslo16): Likewise.
1105 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1106 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1107 (parse_s12): Likewise.
1108 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1109 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1110 (parse_uslo16): Likewise.
1111 (parse_uhi16): Parse gothi and gotfuncdeschi.
1112 (parse_d12): Parse got12 and gotfuncdesc12.
1113 (parse_s12): Likewise.
1114
1340b9a9
DB
11152003-10-10 Dave Brolley <brolley@redhat.com>
1116
1117 * frv.cpu (dnpmop): New p-macro.
1118 (GRdoublek): Use dnpmop.
1119 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1120 (store-double-r-r): Use (.sym regtype doublek).
1121 (r-store-double): Ditto.
1122 (store-double-r-r-u): Ditto.
1123 (conditional-store-double): Ditto.
1124 (conditional-store-double-u): Ditto.
1125 (store-double-r-simm): Ditto.
1126 (fmovs): Assign to UNIT FMALL.
1127
ac7c07ac
DB
11282003-10-06 Dave Brolley <brolley@redhat.com>
1129
1130 * frv.cpu, frv.opc: Add support for fr550.
1131
d0312406
DB
11322003-09-24 Dave Brolley <brolley@redhat.com>
1133
1134 * frv.cpu (u-commit): New modelling unit for fr500.
1135 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1136 (commit-r): Use u-commit model for fr500.
1137 (commit): Ditto.
1138 (conditional-float-binary-op): Take profiling data as an argument.
1139 Update callers.
1140 (ne-float-binary-op): Ditto.
1141
c6945302
MS
11422003-09-19 Michael Snyder <msnyder@redhat.com>
1143
1144 * frv.cpu (nldqi): Delete unimplemented instruction.
1145
23600bb3
DB
11462003-09-12 Dave Brolley <brolley@redhat.com>
1147
1148 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1149 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1150 frv_ref_SI to get input register referenced for profiling.
1151 (clear-ne-flag-all): Pass insn profiling in as an argument.
1152 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1153
6f18ad70
MS
11542003-09-11 Michael Snyder <msnyder@redhat.com>
1155
1156 * frv.cpu: Typographical corrections.
1157
96486995
DB
11582003-09-09 Dave Brolley <brolley@redhat.com>
1159
1160 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1161 (conditional-media-dual-complex, media-quad-complex): Likewise.
1162
0457efce
DB
11632003-09-04 Dave Brolley <brolley@redhat.com>
1164
1165 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1166 Update all callers.
1167 (conditional-register-transfer): Ditto.
1168 (cache-preload): Ditto.
1169 (floating-point-conversion): Ditto.
1170 (floating-point-neg): Ditto.
1171 (float-abs): Ditto.
1172 (float-binary-op-s): Ditto.
1173 (conditional-float-binary-op): Ditto.
1174 (ne-float-binary-op): Ditto.
1175 (float-dual-arith): Ditto.
1176 (ne-float-dual-arith): Ditto.
1177
8caa9169
DB
11782003-09-03 Dave Brolley <brolley@redhat.com>
1179
1180 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1181 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1182 MCLRACC-1.
1183 (A): Removed operand.
1184 (A0,A1): New operands replace operand A.
1185 (mnop): Now a real insn
1186 (mclracc): Removed insn.
1187 (mclracc-0, mclracc-1): New insns replace mclracc.
1188 (all insns): Use new UNIT attributes.
1189
6d9ab561
NC
11902003-08-21 Nick Clifton <nickc@redhat.com>
1191
1192 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1193 and u-media-dual-btoh with output parameter.
1194 (cmbtoh): Add profiling hack.
1195
741a7751
NC
11962003-08-19 Michael Snyder <msnyder@redhat.com>
1197
1198 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1199
5b5b78da
DE
12002003-06-10 Doug Evans <dje@sebabeach.org>
1201
1202 * frv.cpu: Add IDOC attribute.
1203
539ee71a
AC
12042003-06-06 Andrew Cagney <cagney@redhat.com>
1205
1206 Contributed by Red Hat.
1207 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1208 Stan Cox, and Frank Ch. Eigler.
1209 * iq2000.opc: New file. Written by Ben Elliston, Frank
1210 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1211 * iq2000m.cpu: New file. Written by Jeff Johnston.
1212 * iq10.cpu: New file. Written by Jeff Johnston.
1213
36c3ae24
NC
12142003-06-05 Nick Clifton <nickc@redhat.com>
1215
1216 * frv.cpu (FRintieven): New operand. An even-numbered only
1217 version of the FRinti operand.
1218 (FRintjeven): Likewise for FRintj.
1219 (FRintkeven): Likewise for FRintk.
1220 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1221 media-quad-arith-sat-semantics, media-quad-arith-sat,
1222 conditional-media-quad-arith-sat, mdunpackh,
1223 media-quad-multiply-semantics, media-quad-multiply,
1224 conditional-media-quad-multiply, media-quad-complex-i,
1225 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1226 conditional-media-quad-multiply-acc, munpackh,
1227 media-quad-multiply-cross-acc-semantics, mdpackh,
1228 media-quad-multiply-cross-acc, mbtoh-semantics,
1229 media-quad-cross-multiply-cross-acc-semantics,
1230 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1231 media-quad-cross-multiply-acc-semantics, cmbtoh,
1232 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1233 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1234 cmhtob): Use new operands.
1235 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1236 (parse_even_register): New function.
36c3ae24 1237
75798298
NC
12382003-06-03 Nick Clifton <nickc@redhat.com>
1239
1240 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1241 immediate value not unsigned.
1242
9aab5aa3
AC
12432003-06-03 Andrew Cagney <cagney@redhat.com>
1244
1245 Contributed by Red Hat.
1246 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1247 and Eric Christopher.
1248 * frv.opc: New file. Written by Catherine Moore, and Dave
1249 Brolley.
1250 * simplify.inc: New file. Written by Doug Evans.
1251
2739f79a
AC
12522003-05-02 Andrew Cagney <cagney@redhat.com>
1253
1254 * New file.
1255
1256\f
752937aa
NC
1257Copyright (C) 2003-2012 Free Software Foundation, Inc.
1258
1259Copying and distribution of this file, with or without modification,
1260are permitted in any medium without royalty provided the copyright
1261notice and this notice are preserved.
1262
2739f79a
AC
1263Local Variables:
1264mode: change-log
1265left-margin: 8
1266fill-column: 74
1267version-control: never
1268End:
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