strip off +x bits on non-executable/script files
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
594d8fa8
MF
12013-12-07 Mike Frysinger <vapier@gentoo.org>
2
3 * epiphany.opc: Remove +x file mode.
4
87a8d6cb
NC
52013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
6
7 PR binutils/15241
8 * lm32.cpu (Control and status registers): Add CFG2, PSW,
9 TLBVADDR, TLBPADDR and TLBBADVADDR.
10
02a79b89
JR
112012-11-30 Oleg Raikhman <oleg@adapteva.com>
12 Joern Rennecke <joern.rennecke@embecosm.com>
13
14 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
15 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
16 (testset-insn): Add NO_DIS attribute to t.l.
17 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
18 (move-insns): Add NO-DIS attribute to cmov.l.
19 (op-mmr-movts): Add NO-DIS attribute to movts.l.
20 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
21 (op-rrr): Add NO-DIS attribute to .l.
22 (shift-rrr): Add NO-DIS attribute to .l.
23 (op-shift-rri): Add NO-DIS attribute to i32.l.
24 (bitrl, movtl): Add NO-DIS attribute.
25 (op-iextrrr): Add NO-DIS attribute to .l
26 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
27 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
28
a597d2d3
AM
292012-02-27 Alan Modra <amodra@gmail.com>
30
31 * mt.opc (print_dollarhex): Trim values to 32 bits.
32
5011093d
NC
332011-12-15 Nick Clifton <nickc@redhat.com>
34
35 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
36 hosts.
37
fd936b4c
JR
382011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
39
40 * epiphany.opc (parse_branch_addr): Fix type of valuep.
41 Cast value before printing it as a long.
42 (parse_postindex): Fix type of valuep.
43
cfb8c092
NC
442011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
45
46 * cpu/epiphany.cpu: New file.
47 * cpu/epiphany.opc: New file.
48
dc15e575
NC
492011-08-22 Nick Clifton <nickc@redhat.com>
50
51 * fr30.cpu: Newly contributed file.
52 * fr30.opc: Likewise.
53 * ip2k.cpu: Likewise.
54 * ip2k.opc: Likewise.
55 * mep-avc.cpu: Likewise.
56 * mep-avc2.cpu: Likewise.
57 * mep-c5.cpu: Likewise.
58 * mep-core.cpu: Likewise.
59 * mep-default.cpu: Likewise.
60 * mep-ext-cop.cpu: Likewise.
61 * mep-fmax.cpu: Likewise.
62 * mep-h1.cpu: Likewise.
63 * mep-ivc2.cpu: Likewise.
64 * mep-rhcop.cpu: Likewise.
65 * mep-sample-ucidsp.cpu: Likewise.
66 * mep.cpu: Likewise.
67 * mep.opc: Likewise.
68 * openrisc.cpu: Likewise.
69 * openrisc.opc: Likewise.
70 * xstormy16.cpu: Likewise.
71 * xstormy16.opc: Likewise.
72
9ccb8af9
AM
732010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
74
75 * frv.opc: #undef DEBUG.
76
21375995
DD
772010-07-03 DJ Delorie <dj@delorie.com>
78
79 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
80
5ff58fb0
DE
812010-02-11 Doug Evans <dje@sebabeach.org>
82
83 * m32r.cpu (HASH-PREFIX): Delete.
84 (duhpo, dshpo): New pmacros.
85 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
86 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
87 attribute, define with dshpo.
88 (uimm24): Delete HASH-PREFIX attribute.
89 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
90 (print_signed_with_hash_prefix): New function.
91 (print_unsigned_with_hash_prefix): New function.
92 * xc16x.cpu (dowh): New pmacro.
93 (upof16): Define with dowh, specify print handler.
94 (qbit, qlobit, qhibit): Ditto.
95 (upag16): Ditto.
96 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
97 (print_with_dot_prefix): New functions.
98 (print_with_pof_prefix, print_with_pag_prefix): New functions.
99
3fa5b97b
DE
1002010-01-24 Doug Evans <dje@sebabeach.org>
101
102 * frv.cpu (floating-point-conversion): Update call to fp conv op.
103 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
104 conditional-floating-point-conversion, ne-floating-point-conversion,
105 float-parallel-mul-add-double-semantics): Ditto.
106
fe8afbc4
DE
1072010-01-05 Doug Evans <dje@sebabeach.org>
108
109 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
110 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
111
caaf56fb
DE
1122010-01-02 Doug Evans <dje@sebabeach.org>
113
114 * m32c.opc (parse_signed16): Fix typo.
115
91d6fa6a
NC
1162009-12-11 Nick Clifton <nickc@redhat.com>
117
118 * frv.opc: Fix shadowed variable warnings.
119 * m32c.opc: Fix shadowed variable warnings.
120
ec84cc2b
DE
1212009-11-14 Doug Evans <dje@sebabeach.org>
122
123 Must use VOID expression in VOID context.
124 * xc16x.cpu (mov4): Fix mode of `sequence'.
125 (mov9, mov10): Ditto.
126 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
127 (callr, callseg, calls, trap, rets, reti): Ditto.
128 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
129 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
130 (exts, exts1, extsr, extsr1, prior): Ditto.
131
ac1e9eca
DE
1322009-10-23 Doug Evans <dje@sebabeach.org>
133
134 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
135 cgen-ops.h -> cgen/basic-ops.h.
136
b4744b17
AM
1372009-09-25 Alan Modra <amodra@bigpond.net.au>
138
139 * m32r.cpu (stb-plus): Typo fix.
140
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DE
1412009-09-23 Doug Evans <dje@sebabeach.org>
142
143 * m32r.cpu (sth-plus): Fix address mode and calculation.
144 (stb-plus): Ditto.
145 (clrpsw): Fix mask calculation.
146 (bset, bclr, btst): Make mode in bit calculation match expression.
147
148 * xc16x.cpu (rtl-version): Set to 0.8.
149 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
150 make uppercase. Remove unnecessary name-prefix spec.
151 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
152 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
153 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
154 (h-cr): New hardware.
155 (muls): Comment out parts that won't compile, add fixme.
156 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
157 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
158 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
159
0aaaf7c3
DE
1602009-07-16 Doug Evans <dje@sebabeach.org>
161
162 * cpu/simplify.inc (*): One line doc strings don't need \n.
163 (df): Invoke define-full-ifield instead of claiming it's an alias.
164 (dno): Define.
165 (dnop): Mark as deprecated.
166
1998a8e0
AM
1672009-06-22 Alan Modra <amodra@bigpond.net.au>
168
169 * m32c.opc (parse_lab_5_3): Use correct enum.
170
6347aad8
HPN
1712009-01-07 Hans-Peter Nilsson <hp@axis.com>
172
173 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
174 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
175 (media-arith-sat-semantics): Explicitly sign- or zero-extend
176 arguments of "operation" to DI using "mode" and the new pmacros.
177
2c06b7a6
HPN
1782009-01-03 Hans-Peter Nilsson <hp@axis.com>
179
180 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
181 of number 2, PID.
182
84e94c90
NC
1832008-12-23 Jon Beniston <jon@beniston.com>
184
185 * lm32.cpu: New file.
186 * lm32.opc: New file.
187
90518ff4
AM
1882008-01-29 Alan Modra <amodra@bigpond.net.au>
189
190 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
191 to source.
192
a69f60de
HPN
1932007-10-22 Hans-Peter Nilsson <hp@axis.com>
194
195 * cris.cpu (movs, movu): Use result of extension operation when
196 updating flags.
197
9b201bb5
NC
1982007-07-04 Nick Clifton <nickc@redhat.com>
199
200 * cris.cpu: Update copyright notice to refer to GPLv3.
201 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
202 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
203 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
204 xc16x.opc: Likewise.
205 * iq2000.cpu: Fix copyright notice to refer to FSF.
206
53289dcd
MS
2072007-04-30 Mark Salter <msalter@sadr.localdomain>
208
209 * frv.cpu (spr-names): Support new coprocessor SPR registers.
210
f6da2ec2
NC
2112007-04-20 Nick Clifton <nickc@redhat.com>
212
213 * xc16x.cpu: Restore after accidentally overwriting this file with
214 xc16x.opc.
215
144f4bc6
DD
2162007-03-29 DJ Delorie <dj@redhat.com>
217
218 * m32c.cpu (Imm-8-s4n): Fix print hook.
219 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
220 (arith-jnz-imm4-dst-defn): Make relaxable.
221 (arith-jnz16-imm4-dst-defn): Fix encodings.
222
75b06e7b
DD
2232007-03-20 DJ Delorie <dj@redhat.com>
224
225 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
226 mem20): New.
227 (src16-16-20-An-relative-*): New.
228 (dst16-*-20-An-relative-*): New.
229 (dst16-16-16sa-*): New
230 (dst16-16-16ar-*): New
231 (dst32-16-16sa-Unprefixed-*): New
232 (jsri): Fix operands.
233 (setzx): Fix encoding.
234
a5da764d
AM
2352007-03-08 Alan Modra <amodra@bigpond.net.au>
236
237 * m32r.opc: Formatting.
238
b497d0b0
NC
2392006-05-22 Nick Clifton <nickc@redhat.com>
240
241 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
242
e78efa90
DD
2432006-04-10 DJ Delorie <dj@redhat.com>
244
245 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
246 decides if this function accepts symbolic constants or not.
247 (parse_signed_bitbase): Likewise.
248 (parse_unsigned_bitbase8): Pass the new parameter.
249 (parse_unsigned_bitbase11): Likewise.
250 (parse_unsigned_bitbase16): Likewise.
251 (parse_unsigned_bitbase19): Likewise.
252 (parse_unsigned_bitbase27): Likewise.
253 (parse_signed_bitbase8): Likewise.
254 (parse_signed_bitbase11): Likewise.
255 (parse_signed_bitbase19): Likewise.
256
8d0e2679
DD
2572006-03-13 DJ Delorie <dj@redhat.com>
258
43aa3bb1
DD
259 * m32c.cpu (Bit3-S): New.
260 (btst:s): New.
261 * m32c.opc (parse_bit3_S): New.
262
8d0e2679
DD
263 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
264 (btst): Add optional :G suffix for MACH32.
265 (or.b:S): New.
266 (pop.w:G): Add optional :G suffix for MACH16.
267 (push.b.imm): Fix syntax.
268
253d272c
DD
2692006-03-10 DJ Delorie <dj@redhat.com>
270
271 * m32c.cpu (mul.l): New.
272 (mulu.l): New.
273
c7d41dc5
NC
2742006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
275
276 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
277 an error message otherwise.
278 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
279 Fix up comments to correctly describe the functions.
280
6772dd07
DD
2812006-02-24 DJ Delorie <dj@redhat.com>
282
283 * m32c.cpu (RL_TYPE): New attribute, with macros.
284 (Lab-8-24): Add RELAX.
285 (unary-insn-defn-g, binary-arith-imm-dst-defn,
286 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
287 (binary-arith-src-dst-defn): Add 2ADDR attribute.
288 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
289 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
290 attribute.
291 (jsri16, jsri32): Add 1ADDR attribute.
292 (jsr32.w, jsr32.a): Add JUMP attribute.
293
d70c5fc7
NC
2942006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
295 Anil Paranjape <anilp1@kpitcummins.com>
296 Shilin Shakti <shilins@kpitcummins.com>
297
298 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
299 description.
300 * xc16x.opc: New file containing supporting XC16C routines.
301
8536c657
NC
3022006-02-10 Nick Clifton <nickc@redhat.com>
303
304 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
305
458f7770
DD
3062006-01-06 DJ Delorie <dj@redhat.com>
307
308 * m32c.cpu (mov.w:q): Fix mode.
309 (push32.b.imm): Likewise, for the comment.
310
d031aafb
NS
3112005-12-16 Nathan Sidwell <nathan@codesourcery.com>
312
313 Second part of ms1 to mt renaming.
314 * mt.cpu (define-arch, define-isa): Set name to mt.
315 (define-mach): Adjust.
316 * mt.opc (CGEN_ASM_HASH): Update.
317 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
318 (parse_loopsize, parse_imm16): Adjust.
319
eda87aba
DD
3202005-12-13 DJ Delorie <dj@redhat.com>
321
322 * m32c.cpu (jsri): Fix order so register names aren't treated as
323 symbols.
324 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
325 indexwd, indexws): Fix encodings.
326
4970f871
NS
3272005-12-12 Nathan Sidwell <nathan@codesourcery.com>
328
329 * mt.cpu: Rename from ms1.cpu.
330 * mt.opc: Rename from ms1.opc.
331
48ad8298
HPN
3322005-12-06 Hans-Peter Nilsson <hp@axis.com>
333
334 * cris.cpu (simplecris-common-writable-specregs)
335 (simplecris-common-readable-specregs): Split from
336 simplecris-common-specregs. All users changed.
337 (cris-implemented-writable-specregs-v0)
338 (cris-implemented-readable-specregs-v0): Similar from
339 cris-implemented-specregs-v0.
340 (cris-implemented-writable-specregs-v3)
341 (cris-implemented-readable-specregs-v3)
342 (cris-implemented-writable-specregs-v8)
343 (cris-implemented-readable-specregs-v8)
344 (cris-implemented-writable-specregs-v10)
345 (cris-implemented-readable-specregs-v10)
346 (cris-implemented-writable-specregs-v32)
347 (cris-implemented-readable-specregs-v32): Similar.
348 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
349 insns and specializations.
350
6f84a2a6
NS
3512005-11-08 Nathan Sidwell <nathan@codesourcery.com>
352
353 Add ms2
354 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
355 model.
356 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
357 f-cb2incr, f-rc3): New fields.
358 (LOOP): New instruction.
359 (JAL-HAZARD): New hazard.
360 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
361 New operands.
362 (mul, muli, dbnz, iflush): Enable for ms2
363 (jal, reti): Has JAL-HAZARD.
364 (ldctxt, ldfb, stfb): Only ms1.
365 (fbcb): Only ms1,ms1-003.
366 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
367 fbcbincrs, mfbcbincrs): Enable for ms2.
368 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
369 * ms1.opc (parse_loopsize): New.
370 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
371 (print_pcrel): New.
372
95b96521
DB
3732005-10-28 Dave Brolley <brolley@redhat.com>
374
375 Contribute the following change:
376 2003-09-24 Dave Brolley <brolley@redhat.com>
377
378 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
379 CGEN_ATTR_VALUE_TYPE.
380 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
381 Use cgen_bitset_intersect_p.
382
c6552317
DD
3832005-10-27 DJ Delorie <dj@redhat.com>
384
385 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
386 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
387 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
388 imm operand is needed.
389 (adjnz, sbjnz): Pass the right operands.
390 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
391 unary-insn): Add -g variants for opcodes that need to support :G.
392 (not.BW:G, push.BW:G): Call it.
393 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
394 stzx16-imm8-imm8-abs16): Fix operand typos.
395 * m32c.opc (m32c_asm_hash): Support bnCND.
396 (parse_signed4n, print_signed4n): New.
397
f75eb1c0
DD
3982005-10-26 DJ Delorie <dj@redhat.com>
399
400 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
401 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
402 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
403 dsp8[sp] is signed.
404 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
405 (mov.BW:S r0,r1): Fix typo r1l->r1.
406 (tst): Allow :G suffix.
407 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
408
e277c00b
AM
4092005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
410
411 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
412
92e0a941
DD
4132005-10-25 DJ Delorie <dj@redhat.com>
414
415 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
416 making one a macro of the other.
417
a1a280bb
DD
4182005-10-21 DJ Delorie <dj@redhat.com>
419
420 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
421 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
422 indexld, indexls): .w variants have `1' bit.
423 (rot32.b): QI, not SI.
424 (rot32.w): HI, not SI.
425 (xchg16): HI for .w variant.
426
e74eb924
NC
4272005-10-19 Nick Clifton <nickc@redhat.com>
428
429 * m32r.opc (parse_slo16): Fix bad application of previous patch.
430
5e03663f
NC
4312005-10-18 Andreas Schwab <schwab@suse.de>
432
433 * m32r.opc (parse_slo16): Better version of previous patch.
434
ab7c9a26
NC
4352005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
436
437 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
438 size.
439
fd54057a
DD
4402005-07-25 DJ Delorie <dj@redhat.com>
441
442 * m32c.opc (parse_unsigned8): Add %dsp8().
443 (parse_signed8): Add %hi8().
444 (parse_unsigned16): Add %dsp16().
445 (parse_signed16): Add %lo16() and %hi16().
446 (parse_lab_5_3): Make valuep a bfd_vma *.
447
85da3a56
NC
4482005-07-18 Nick Clifton <nickc@redhat.com>
449
450 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
451 components.
452 (f-lab32-jmp-s): Fix insertion sequence.
453 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
454 (Dsp-40-s8): Make parameter be signed.
455 (Dsp-40-s16): Likewise.
456 (Dsp-48-s8): Likewise.
457 (Dsp-48-s16): Likewise.
458 (Imm-13-u3): Likewise. (Despite its name!)
459 (BitBase16-16-s8): Make the parameter be unsigned.
460 (BitBase16-8-u11-S): Likewise.
461 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
462 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
463 relaxation.
464
465 * m32c.opc: Fix formatting.
466 Use safe-ctype.h instead of ctype.h
467 Move duplicated code sequences into a macro.
468 Fix compile time warnings about signedness mismatches.
469 Remove dead code.
470 (parse_lab_5_3): New parser function.
471
aa260854
JB
4722005-07-16 Jim Blandy <jimb@redhat.com>
473
474 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
475 to represent isa sets.
476
0a665bfd
JB
4772005-07-15 Jim Blandy <jimb@redhat.com>
478
479 * m32c.cpu, m32c.opc: Fix copyright.
480
49f58d10
JB
4812005-07-14 Jim Blandy <jimb@redhat.com>
482
483 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
484
0e6b69be
AM
4852005-07-14 Alan Modra <amodra@bigpond.net.au>
486
487 * ms1.opc (print_dollarhex): Correct format string.
488
f9210e37
AM
4892005-07-06 Alan Modra <amodra@bigpond.net.au>
490
491 * iq2000.cpu: Include from binutils cpu dir.
492
3ec2b351
NC
4932005-07-05 Nick Clifton <nickc@redhat.com>
494
495 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
496 unsigned in order to avoid compile time warnings about sign
497 conflicts.
498
499 * ms1.opc (parse_*): Likewise.
500 (parse_imm16): Use a "void *" as it is passed both signed and
501 unsigned arguments.
502
47b0e7ad
NC
5032005-07-01 Nick Clifton <nickc@redhat.com>
504
505 * frv.opc: Update to ISO C90 function declaration style.
506 * iq2000.opc: Likewise.
507 * m32r.opc: Likewise.
508 * sh.opc: Likewise.
509
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DB
5102005-06-15 Dave Brolley <brolley@redhat.com>
511
512 Contributed by Red Hat.
513 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
514 * ms1.opc: New file. Written by Stan Cox.
515
e172dbf8
NC
5162005-05-10 Nick Clifton <nickc@redhat.com>
517
518 * Update the address and phone number of the FSF organization in
519 the GPL notices in the following files:
520 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
521 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
522 sh64-media.cpu, simplify.inc
523
b2d52a48
AM
5242005-02-24 Alan Modra <amodra@bigpond.net.au>
525
526 * frv.opc (parse_A): Warning fix.
527
33b71eeb
NC
5282005-02-23 Nick Clifton <nickc@redhat.com>
529
530 * frv.opc: Fixed compile time warnings about differing signed'ness
531 of pointers passed to functions.
532 * m32r.opc: Likewise.
533
bc18c937
NC
5342005-02-11 Nick Clifton <nickc@redhat.com>
535
536 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
537 'bfd_vma *' in order avoid compile time warning message.
538
46da9a19
HPN
5392005-01-28 Hans-Peter Nilsson <hp@axis.com>
540
541 * cris.cpu (mstep): Add missing insn.
542
90219bd0
AO
5432005-01-25 Alexandre Oliva <aoliva@redhat.com>
544
545 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
546 * frv.cpu: Add support for TLS annotations in loads and calll.
547 * frv.opc (parse_symbolic_address): New.
548 (parse_ldd_annotation): New.
549 (parse_call_annotation): New.
550 (parse_ld_annotation): New.
551 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
552 Introduce TLS relocations.
553 (parse_d12, parse_s12, parse_u12): Likewise.
554 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
555 (parse_call_label, print_at): New.
556
c3d75c30
HPN
5572004-12-21 Mikael Starvik <starvik@axis.com>
558
559 * cris.cpu (cris-set-mem): Correct integral write semantics.
560
68800d83
HPN
5612004-11-29 Hans-Peter Nilsson <hp@axis.com>
562
563 * cris.cpu: New file.
564
4bd1d37b
NC
5652004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
566
567 * iq2000.cpu: Added quotes around macro arguments so that they
568 will work with newer versions of guile.
569
4030fa5a
NC
5702004-10-27 Nick Clifton <nickc@redhat.com>
571
572 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
573 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
574 operand.
575 * iq2000.cpu (dnop index): Rename to _index to avoid complications
576 with guile.
577
ac28a1cb
RS
5782004-08-27 Richard Sandiford <rsandifo@redhat.com>
579
580 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
581
dc4c54bb
NC
5822004-05-15 Nick Clifton <nickc@redhat.com>
583
584 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
585
f4453dfa
NC
5862004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
587
588 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
589
676a64f4
RS
5902004-03-01 Richard Sandiford <rsandifo@redhat.com>
591
592 * frv.cpu (define-arch frv): Add fr450 mach.
593 (define-mach fr450): New.
594 (define-model fr450): New. Add profile units to every fr450 insn.
595 (define-attr UNIT): Add MDCUTSSI.
596 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
597 (define-attr AUDIO): New boolean.
598 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
599 (f-LRA-null, f-TLBPR-null): New fields.
600 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
601 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
602 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
603 (LRA-null, TLBPR-null): New macros.
604 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
605 (load-real-address): New macro.
606 (lrai, lrad, tlbpr): New instructions.
607 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
608 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
609 (mdcutssi): Change UNIT attribute to MDCUTSSI.
610 (media-low-clear-semantics, media-scope-limit-semantics)
611 (media-quad-limit, media-quad-shift): New macros.
612 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
613 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
614 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
615 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
616 (fr450_unit_mapping): New array.
617 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
618 for new MDCUTSSI unit.
619 (fr450_check_insn_major_constraints): New function.
620 (check_insn_major_constraints): Use it.
621
c7a48b9a
RS
6222004-03-01 Richard Sandiford <rsandifo@redhat.com>
623
624 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
625 (scutss): Change unit to I0.
626 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
627 (mqsaths): Fix FR400-MAJOR categorization.
628 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
629 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
630 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
631 combinations.
632
8ae0baa2
RS
6332004-03-01 Richard Sandiford <rsandifo@redhat.com>
634
635 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
636 (rstb, rsth, rst, rstd, rstq): Delete.
637 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
638
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NC
6392004-02-23 Nick Clifton <nickc@redhat.com>
640
641 * Apply these patches from Renesas:
642
643 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
644
645 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
646 disassembling codes for 0x*2 addresses.
647
648 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
649
650 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
651
652 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
653
654 * cpu/m32r.cpu : Add new model m32r2.
655 Add new instructions.
656 Replace occurrances of 'Mitsubishi' with 'Renesas'.
657 Changed PIPE attr of push from O to OS.
658 Care for Little-endian of M32R.
659 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
660 Care for Little-endian of M32R.
661 (parse_slo16): signed extension for value.
662
299d901c
AC
6632004-02-20 Andrew Cagney <cagney@redhat.com>
664
e866a257
AC
665 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
666 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
667
299d901c
AC
668 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
669 written by Ben Elliston.
670
cb10e79a
RS
6712004-01-14 Richard Sandiford <rsandifo@redhat.com>
672
673 * frv.cpu (UNIT): Add IACC.
674 (iacc-multiply-r-r): Use it.
675 * frv.opc (fr400_unit_mapping): Add entry for IACC.
676 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
677
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AO
6782004-01-06 Alexandre Oliva <aoliva@redhat.com>
679
680 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
681 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
682 cut&paste errors in shifting/truncating numerical operands.
683 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
684 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
685 (parse_uslo16): Likewise.
686 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
687 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
688 (parse_s12): Likewise.
689 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
690 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
691 (parse_uslo16): Likewise.
692 (parse_uhi16): Parse gothi and gotfuncdeschi.
693 (parse_d12): Parse got12 and gotfuncdesc12.
694 (parse_s12): Likewise.
695
1340b9a9
DB
6962003-10-10 Dave Brolley <brolley@redhat.com>
697
698 * frv.cpu (dnpmop): New p-macro.
699 (GRdoublek): Use dnpmop.
700 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
701 (store-double-r-r): Use (.sym regtype doublek).
702 (r-store-double): Ditto.
703 (store-double-r-r-u): Ditto.
704 (conditional-store-double): Ditto.
705 (conditional-store-double-u): Ditto.
706 (store-double-r-simm): Ditto.
707 (fmovs): Assign to UNIT FMALL.
708
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DB
7092003-10-06 Dave Brolley <brolley@redhat.com>
710
711 * frv.cpu, frv.opc: Add support for fr550.
712
d0312406
DB
7132003-09-24 Dave Brolley <brolley@redhat.com>
714
715 * frv.cpu (u-commit): New modelling unit for fr500.
716 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
717 (commit-r): Use u-commit model for fr500.
718 (commit): Ditto.
719 (conditional-float-binary-op): Take profiling data as an argument.
720 Update callers.
721 (ne-float-binary-op): Ditto.
722
c6945302
MS
7232003-09-19 Michael Snyder <msnyder@redhat.com>
724
725 * frv.cpu (nldqi): Delete unimplemented instruction.
726
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DB
7272003-09-12 Dave Brolley <brolley@redhat.com>
728
729 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
730 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
731 frv_ref_SI to get input register referenced for profiling.
732 (clear-ne-flag-all): Pass insn profiling in as an argument.
733 (clrgr,clrfr,clrga,clrfa): Add profiling information.
734
6f18ad70
MS
7352003-09-11 Michael Snyder <msnyder@redhat.com>
736
737 * frv.cpu: Typographical corrections.
738
96486995
DB
7392003-09-09 Dave Brolley <brolley@redhat.com>
740
741 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
742 (conditional-media-dual-complex, media-quad-complex): Likewise.
743
0457efce
DB
7442003-09-04 Dave Brolley <brolley@redhat.com>
745
746 * frv.cpu (register-transfer): Pass in all attributes in on argument.
747 Update all callers.
748 (conditional-register-transfer): Ditto.
749 (cache-preload): Ditto.
750 (floating-point-conversion): Ditto.
751 (floating-point-neg): Ditto.
752 (float-abs): Ditto.
753 (float-binary-op-s): Ditto.
754 (conditional-float-binary-op): Ditto.
755 (ne-float-binary-op): Ditto.
756 (float-dual-arith): Ditto.
757 (ne-float-dual-arith): Ditto.
758
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DB
7592003-09-03 Dave Brolley <brolley@redhat.com>
760
761 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
762 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
763 MCLRACC-1.
764 (A): Removed operand.
765 (A0,A1): New operands replace operand A.
766 (mnop): Now a real insn
767 (mclracc): Removed insn.
768 (mclracc-0, mclracc-1): New insns replace mclracc.
769 (all insns): Use new UNIT attributes.
770
6d9ab561
NC
7712003-08-21 Nick Clifton <nickc@redhat.com>
772
773 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
774 and u-media-dual-btoh with output parameter.
775 (cmbtoh): Add profiling hack.
776
741a7751
NC
7772003-08-19 Michael Snyder <msnyder@redhat.com>
778
779 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
780
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7812003-06-10 Doug Evans <dje@sebabeach.org>
782
783 * frv.cpu: Add IDOC attribute.
784
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AC
7852003-06-06 Andrew Cagney <cagney@redhat.com>
786
787 Contributed by Red Hat.
788 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
789 Stan Cox, and Frank Ch. Eigler.
790 * iq2000.opc: New file. Written by Ben Elliston, Frank
791 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
792 * iq2000m.cpu: New file. Written by Jeff Johnston.
793 * iq10.cpu: New file. Written by Jeff Johnston.
794
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7952003-06-05 Nick Clifton <nickc@redhat.com>
796
797 * frv.cpu (FRintieven): New operand. An even-numbered only
798 version of the FRinti operand.
799 (FRintjeven): Likewise for FRintj.
800 (FRintkeven): Likewise for FRintk.
801 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
802 media-quad-arith-sat-semantics, media-quad-arith-sat,
803 conditional-media-quad-arith-sat, mdunpackh,
804 media-quad-multiply-semantics, media-quad-multiply,
805 conditional-media-quad-multiply, media-quad-complex-i,
806 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
807 conditional-media-quad-multiply-acc, munpackh,
808 media-quad-multiply-cross-acc-semantics, mdpackh,
809 media-quad-multiply-cross-acc, mbtoh-semantics,
810 media-quad-cross-multiply-cross-acc-semantics,
811 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
812 media-quad-cross-multiply-acc-semantics, cmbtoh,
813 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
814 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
815 cmhtob): Use new operands.
816 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 817 (parse_even_register): New function.
36c3ae24 818
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NC
8192003-06-03 Nick Clifton <nickc@redhat.com>
820
821 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
822 immediate value not unsigned.
823
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AC
8242003-06-03 Andrew Cagney <cagney@redhat.com>
825
826 Contributed by Red Hat.
827 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
828 and Eric Christopher.
829 * frv.opc: New file. Written by Catherine Moore, and Dave
830 Brolley.
831 * simplify.inc: New file. Written by Doug Evans.
832
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AC
8332003-05-02 Andrew Cagney <cagney@redhat.com>
834
835 * New file.
836
837\f
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838Copyright (C) 2003-2012 Free Software Foundation, Inc.
839
840Copying and distribution of this file, with or without modification,
841are permitted in any medium without royalty provided the copyright
842notice and this notice are preserved.
843
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844Local Variables:
845mode: change-log
846left-margin: 8
847fill-column: 74
848version-control: never
849End:
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