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Add multi-target tests
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
cc6aa1a6
AM		 12020-01-06 Alan Modra <amodra@gmail.com>
2
3 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
4 bits before shifting rather than masking after shifting.
5 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
6 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
7 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
8 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
9
102020-01-04 Alan Modra <amodra@gmail.com>
c9ae58fe
AM		 11
12 * m32r.cpu (f-disp8): Avoid left shift of negative values.
13 (f-disp16, f-disp24): Likewise.
14
3e1056a1
AM		 152019-12-23 Alan Modra <amodra@gmail.com>
16
17 * iq2000.cpu (f-offset): Avoid left shift of negative values.
18
bcd9f578
AM		 192019-12-20 Alan Modra <amodra@gmail.com>
20
21 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
22
62e65990
AM		 232019-12-17 Alan Modra <amodra@gmail.com>
24
25 * bpf.cpu (f-imm64): Avoid signed overflow.
26
e6ced26a
AM		 272019-12-16 Alan Modra <amodra@gmail.com>
28
29 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
30
1d61b032
AM		 312019-12-11 Alan Modra <amodra@gmail.com>
32
33 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
34 * lm32.cpu (f-branch, f-vall): Likewise.
35 * m32.cpu (f-lab-8-16): Likewise.
36
b8e61daa
AM		 372019-12-11 Alan Modra <amodra@gmail.com>
38
39 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
40 shift left to avoid UB on left shift of negative values.
41
e042e6c3
JM		 422019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
43
44 * bpf.cpu: Fix comment describing the 128-bit instruction format.
45
60391a25
PB		 462019-09-09 Phil Blundell <pb@pbcl.net>
47
48 binutils 2.33 branch created.
49
231097b0
JM		 502019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
51
52 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
53 %a and %ctx.
54
3719fd55
JM		 552019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
56
57 * bpf.cpu (dlabs): New pmacro.
58 (dlind): Likewise.
59
92434a14
JM		 602019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
61
62 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
63 explicit 'dst' argument.
64
a2e4218f
SH		 652019-06-13 Stafford Horne <shorne@gmail.com>
66
67 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
68
eb212c84
SH		 692019-06-13 Stafford Horne <shorne@gmail.com>
70
71 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
72 (l-adrp): Improve comment.
73
d3ad6278
SH		 742019-06-13 Stafford Horne <shorne@gmail.com>
75
76 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
77 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
78 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
79 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
80 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
81 float-setflag-unordered-symantics): New pmacro for instruction
82 symantics.
83 (float-setflag-insn): Update to use float-setflag-insn-base.
84 (float-setflag-unordered-insn): New pmacro for generating instructions.
85
6ce26ac7
SH		 862019-06-13 Andrey Bacherov <avbacherov@opencores.org>
87 Stafford Horne <shorne@gmail.com>
88
89 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
90 (ORFPX-MACHS): Removed pmacro.
91 * or1k.opc (or1k_cgen_insn_supported): New function.
92 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
93 (parse_regpair, print_regpair): New functions.
94 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
95 and add comments.
96 (h-fdr): Update comment to indicate or64.
97 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
98 (h-fd32r): New hardware for 64-bit fpu registers.
99 (h-i64r): New hardware for 64-bit int registers.
100 * or1korbis.cpu (f-resv-8-1): New field.
101 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
102 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
103 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
104 (h-roff1): New hardware.
105 (double-field-and-ops mnemonic): New pmacro to generate operations
106 rDD32F, rAD32F, rBD32F, rDDI and rADI.
107 (float-regreg-insn): Update single precision generator to MACH
108 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
109 (float-setflag-insn): Update single precision generator to MACH
110 ORFPX32-MACHS. Fix double instructions from single to double
111 precision. Add generator for or32 64-bit instructions.
112 (float-cust-insn cust-num): Update single precision generator to MACH
113 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
114 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
115 ORFPX32-MACHS.
116 (lf-rem-d): Fix operation from mod to rem.
117 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
118 (lf-itof-d): Fix operands from single to double.
119 (lf-ftoi-d): Update operand mode from DI to WI.
120
ea195bb0
JM		 1212019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
122
123 * bpf.cpu: New file.
124 * bpf.opc: Likewise.
125
f974f26c
NC		 1262018-06-24 Nick Clifton <nickc@redhat.com>
127
128 2.32 branch created.
129
07f5f4c6
RH		 1302018-10-05 Richard Henderson <rth@twiddle.net>
131 Stafford Horne <shorne@gmail.com>
132
133 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
134 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
135 (l-mul): Fix overflow support and indentation.
136 (l-mulu): Fix overflow support and indentation.
137 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
138 (l-div); Remove incorrect carry behavior.
139 (l-divu): Fix carry and overflow behavior.
140 (l-mac): Add overflow support.
141 (l-msb, l-msbu): Add carry and overflow support.
142
c8e98e36
SH		 1432018-10-05 Richard Henderson <rth@twiddle.net>
144
145 * or1k.opc (parse_disp26): Add support for plta() relocations.
146 (parse_disp21): New function.
147 (or1k_rclass): New enum.
148 (or1k_rtype): New enum.
149 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
150 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
151 (parse_imm16): Add support for the new 21bit and 13bit relocations.
152 * or1korbis.cpu (f-disp26): Don't assume SI.
153 (f-disp21): New pc-relative 21-bit 13 shifted to right.
154 (insn-opcode): Add ADRP.
155 (l-adrp): New instruction.
156
1c4f3780
RH		 1572018-10-05 Richard Henderson <rth@twiddle.net>
158
159 * or1k.opc: Add RTYPE_ enum.
160 (INVALID_STORE_RELOC): New string.
161 (or1k_imm16_relocs): New array array.
162 (parse_reloc): New static function that just does the parsing.
163 (parse_imm16): New static function for generic parsing.
164 (parse_simm16): Change to just call parse_imm16.
165 (parse_simm16_split): New function.
166 (parse_uimm16): Change to call parse_imm16.
167 (parse_uimm16_split): New function.
168 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
169 (uimm16-split): Change to use new uimm16_split.
170
67ce483b
AM		 1712018-07-24 Alan Modra <amodra@gmail.com>
172
173 PR 23430
174 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
175
84f9f8c3
AM		 1762018-05-09 Sebastian Rasmussen <sebras@gmail.com>
177
178 * or1kcommon.cpu (spr-reg-info): Typo fix.
179
a6743a54
AM		 1802018-03-03 Alan Modra <amodra@gmail.com>
181
182 * frv.opc: Include opintl.h.
183 (add_next_to_vliw): Use opcodes_error_handler to print error.
184 Standardize error message.
185 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
186
faf766e3
NC		 1872018-01-13 Nick Clifton <nickc@redhat.com>
188
189 2.30 branch created.
190
4ea0266c
SH		 1912017-03-15 Stafford Horne <shorne@gmail.com>
192
193 * or1kcommon.cpu: Add pc set semantics to also update ppc.
194
b781683b
AM		 1952016-10-06 Alan Modra <amodra@gmail.com>
196
197 * mep.opc (expand_string): Add fall through comment.
198
439baf71
AM		 1992016-03-03 Alan Modra <amodra@gmail.com>
200
201 * fr30.cpu (f-m4): Replace bogus comment with a better guess
202 at what is really going on.
203
62de1c63
AM		 2042016-03-02 Alan Modra <amodra@gmail.com>
205
206 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
207
b89807c6
AB		 2082016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
209
210 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
211 a constant to better align disassembler output.
212
018dc9be
SK		 2132014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
214
215 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
216
c151b1c6
AM		 2172014-06-12 Alan Modra <amodra@gmail.com>
218
219 * or1k.opc: Whitespace fixes.
220
999b995d
SK		 2212014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
222
223 * or1korbis.cpu (h-atomic-reserve): New hardware.
224 (h-atomic-address): Likewise.
225 (insn-opcode): Add opcodes for LWA and SWA.
226 (atomic-reserve): New operand.
227 (atomic-address): Likewise.
228 (l-lwa, l-swa): New instructions.
229 (l-lbs): Fix typo in comment.
230 (store-insn): Clear atomic reserve on store to atomic-address.
231 Fix register names in fmt field.
232
73589c9d
CS		 2332014-04-22 Christian Svensson <blue@cmd.nu>
234
235 * openrisc.cpu: Delete.
236 * openrisc.opc: Delete.
237 * or1k.cpu: New file.
238 * or1k.opc: New file.
239 * or1kcommon.cpu: New file.
240 * or1korbis.cpu: New file.
241 * or1korfpx.cpu: New file.
242
594d8fa8
MF		 2432013-12-07 Mike Frysinger <vapier@gentoo.org>
244
245 * epiphany.opc: Remove +x file mode.
246
87a8d6cb
NC		 2472013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
248
249 PR binutils/15241
250 * lm32.cpu (Control and status registers): Add CFG2, PSW,
251 TLBVADDR, TLBPADDR and TLBBADVADDR.
252
02a79b89
JR		 2532012-11-30 Oleg Raikhman <oleg@adapteva.com>
254 Joern Rennecke <joern.rennecke@embecosm.com>
255
256 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
257 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
258 (testset-insn): Add NO_DIS attribute to t.l.
259 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
260 (move-insns): Add NO-DIS attribute to cmov.l.
261 (op-mmr-movts): Add NO-DIS attribute to movts.l.
262 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
263 (op-rrr): Add NO-DIS attribute to .l.
264 (shift-rrr): Add NO-DIS attribute to .l.
265 (op-shift-rri): Add NO-DIS attribute to i32.l.
266 (bitrl, movtl): Add NO-DIS attribute.
267 (op-iextrrr): Add NO-DIS attribute to .l
268 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
269 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
270
a597d2d3
AM		 2712012-02-27 Alan Modra <amodra@gmail.com>
272
273 * mt.opc (print_dollarhex): Trim values to 32 bits.
274
5011093d
NC		 2752011-12-15 Nick Clifton <nickc@redhat.com>
276
277 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
278 hosts.
279
fd936b4c
JR		 2802011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
281
282 * epiphany.opc (parse_branch_addr): Fix type of valuep.
283 Cast value before printing it as a long.
284 (parse_postindex): Fix type of valuep.
285
cfb8c092
NC		 2862011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
287
288 * cpu/epiphany.cpu: New file.
289 * cpu/epiphany.opc: New file.
290
dc15e575
NC		 2912011-08-22 Nick Clifton <nickc@redhat.com>
292
293 * fr30.cpu: Newly contributed file.
294 * fr30.opc: Likewise.
295 * ip2k.cpu: Likewise.
296 * ip2k.opc: Likewise.
297 * mep-avc.cpu: Likewise.
298 * mep-avc2.cpu: Likewise.
299 * mep-c5.cpu: Likewise.
300 * mep-core.cpu: Likewise.
301 * mep-default.cpu: Likewise.
302 * mep-ext-cop.cpu: Likewise.
303 * mep-fmax.cpu: Likewise.
304 * mep-h1.cpu: Likewise.
305 * mep-ivc2.cpu: Likewise.
306 * mep-rhcop.cpu: Likewise.
307 * mep-sample-ucidsp.cpu: Likewise.
308 * mep.cpu: Likewise.
309 * mep.opc: Likewise.
310 * openrisc.cpu: Likewise.
311 * openrisc.opc: Likewise.
312 * xstormy16.cpu: Likewise.
313 * xstormy16.opc: Likewise.
314
9ccb8af9
AM		 3152010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
316
317 * frv.opc: #undef DEBUG.
318
21375995
DD		 3192010-07-03 DJ Delorie <dj@delorie.com>
320
321 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
322
5ff58fb0
DE		 3232010-02-11 Doug Evans <dje@sebabeach.org>
324
325 * m32r.cpu (HASH-PREFIX): Delete.
326 (duhpo, dshpo): New pmacros.
327 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
328 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
329 attribute, define with dshpo.
330 (uimm24): Delete HASH-PREFIX attribute.
331 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
332 (print_signed_with_hash_prefix): New function.
333 (print_unsigned_with_hash_prefix): New function.
334 * xc16x.cpu (dowh): New pmacro.
335 (upof16): Define with dowh, specify print handler.
336 (qbit, qlobit, qhibit): Ditto.
337 (upag16): Ditto.
338 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
339 (print_with_dot_prefix): New functions.
340 (print_with_pof_prefix, print_with_pag_prefix): New functions.
341
3fa5b97b
DE		 3422010-01-24 Doug Evans <dje@sebabeach.org>
343
344 * frv.cpu (floating-point-conversion): Update call to fp conv op.
345 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
346 conditional-floating-point-conversion, ne-floating-point-conversion,
347 float-parallel-mul-add-double-semantics): Ditto.
348
fe8afbc4
DE		 3492010-01-05 Doug Evans <dje@sebabeach.org>
350
351 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
352 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
353
caaf56fb
DE		 3542010-01-02 Doug Evans <dje@sebabeach.org>
355
356 * m32c.opc (parse_signed16): Fix typo.
357
91d6fa6a
NC		 3582009-12-11 Nick Clifton <nickc@redhat.com>
359
360 * frv.opc: Fix shadowed variable warnings.
361 * m32c.opc: Fix shadowed variable warnings.
362
ec84cc2b
DE		 3632009-11-14 Doug Evans <dje@sebabeach.org>
364
365 Must use VOID expression in VOID context.
366 * xc16x.cpu (mov4): Fix mode of `sequence'.
367 (mov9, mov10): Ditto.
368 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
369 (callr, callseg, calls, trap, rets, reti): Ditto.
370 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
371 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
372 (exts, exts1, extsr, extsr1, prior): Ditto.
373
ac1e9eca
DE		 3742009-10-23 Doug Evans <dje@sebabeach.org>
375
376 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
377 cgen-ops.h -> cgen/basic-ops.h.
378
b4744b17
AM		 3792009-09-25 Alan Modra <amodra@bigpond.net.au>
380
381 * m32r.cpu (stb-plus): Typo fix.
382
ab5f875d
DE		 3832009-09-23 Doug Evans <dje@sebabeach.org>
384
385 * m32r.cpu (sth-plus): Fix address mode and calculation.
386 (stb-plus): Ditto.
387 (clrpsw): Fix mask calculation.
388 (bset, bclr, btst): Make mode in bit calculation match expression.
389
390 * xc16x.cpu (rtl-version): Set to 0.8.
391 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
392 make uppercase. Remove unnecessary name-prefix spec.
393 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
394 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
395 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
396 (h-cr): New hardware.
397 (muls): Comment out parts that won't compile, add fixme.
398 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
399 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
400 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
401
0aaaf7c3
DE		 4022009-07-16 Doug Evans <dje@sebabeach.org>
403
404 * cpu/simplify.inc (*): One line doc strings don't need \n.
405 (df): Invoke define-full-ifield instead of claiming it's an alias.
406 (dno): Define.
407 (dnop): Mark as deprecated.
408
1998a8e0
AM		 4092009-06-22 Alan Modra <amodra@bigpond.net.au>
410
411 * m32c.opc (parse_lab_5_3): Use correct enum.
412
6347aad8
HPN		 4132009-01-07 Hans-Peter Nilsson <hp@axis.com>
414
415 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
416 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
417 (media-arith-sat-semantics): Explicitly sign- or zero-extend
418 arguments of "operation" to DI using "mode" and the new pmacros.
419
2c06b7a6
HPN		 4202009-01-03 Hans-Peter Nilsson <hp@axis.com>
421
422 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
423 of number 2, PID.
424
84e94c90
NC		 4252008-12-23 Jon Beniston <jon@beniston.com>
426
427 * lm32.cpu: New file.
428 * lm32.opc: New file.
429
90518ff4
AM		 4302008-01-29 Alan Modra <amodra@bigpond.net.au>
431
432 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
433 to source.
434
a69f60de
HPN		 4352007-10-22 Hans-Peter Nilsson <hp@axis.com>
436
437 * cris.cpu (movs, movu): Use result of extension operation when
438 updating flags.
439
9b201bb5
NC		 4402007-07-04 Nick Clifton <nickc@redhat.com>
441
442 * cris.cpu: Update copyright notice to refer to GPLv3.
443 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
444 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
445 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
446 xc16x.opc: Likewise.
447 * iq2000.cpu: Fix copyright notice to refer to FSF.
448
53289dcd
MS		 4492007-04-30 Mark Salter <msalter@sadr.localdomain>
450
451 * frv.cpu (spr-names): Support new coprocessor SPR registers.
452
f6da2ec2
NC		 4532007-04-20 Nick Clifton <nickc@redhat.com>
454
455 * xc16x.cpu: Restore after accidentally overwriting this file with
456 xc16x.opc.
457
144f4bc6
DD		 4582007-03-29 DJ Delorie <dj@redhat.com>
459
460 * m32c.cpu (Imm-8-s4n): Fix print hook.
461 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
462 (arith-jnz-imm4-dst-defn): Make relaxable.
463 (arith-jnz16-imm4-dst-defn): Fix encodings.
464
75b06e7b
DD		 4652007-03-20 DJ Delorie <dj@redhat.com>
466
467 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
468 mem20): New.
469 (src16-16-20-An-relative-*): New.
470 (dst16-*-20-An-relative-*): New.
471 (dst16-16-16sa-*): New
472 (dst16-16-16ar-*): New
473 (dst32-16-16sa-Unprefixed-*): New
474 (jsri): Fix operands.
475 (setzx): Fix encoding.
72f4393d 476
a5da764d
AM		 4772007-03-08 Alan Modra <amodra@bigpond.net.au>
478
479 * m32r.opc: Formatting.
480
b497d0b0
NC		 4812006-05-22 Nick Clifton <nickc@redhat.com>
482
483 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
484
e78efa90
DD		 4852006-04-10 DJ Delorie <dj@redhat.com>
486
487 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
488 decides if this function accepts symbolic constants or not.
489 (parse_signed_bitbase): Likewise.
490 (parse_unsigned_bitbase8): Pass the new parameter.
491 (parse_unsigned_bitbase11): Likewise.
492 (parse_unsigned_bitbase16): Likewise.
493 (parse_unsigned_bitbase19): Likewise.
494 (parse_unsigned_bitbase27): Likewise.
495 (parse_signed_bitbase8): Likewise.
496 (parse_signed_bitbase11): Likewise.
497 (parse_signed_bitbase19): Likewise.
72f4393d 498
8d0e2679
DD		 4992006-03-13 DJ Delorie <dj@redhat.com>
500
43aa3bb1
DD		 501 * m32c.cpu (Bit3-S): New.
502 (btst:s): New.
503 * m32c.opc (parse_bit3_S): New.
504
8d0e2679
DD		 505 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
506 (btst): Add optional :G suffix for MACH32.
507 (or.b:S): New.
508 (pop.w:G): Add optional :G suffix for MACH16.
509 (push.b.imm): Fix syntax.
510
253d272c
DD		 5112006-03-10 DJ Delorie <dj@redhat.com>
512
513 * m32c.cpu (mul.l): New.
514 (mulu.l): New.
515
c7d41dc5
NC		 5162006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
517
518 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
519 an error message otherwise.
520 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
521 Fix up comments to correctly describe the functions.
522
6772dd07
DD		 5232006-02-24 DJ Delorie <dj@redhat.com>
524
525 * m32c.cpu (RL_TYPE): New attribute, with macros.
526 (Lab-8-24): Add RELAX.
527 (unary-insn-defn-g, binary-arith-imm-dst-defn,
528 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
529 (binary-arith-src-dst-defn): Add 2ADDR attribute.
530 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
531 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
532 attribute.
533 (jsri16, jsri32): Add 1ADDR attribute.
534 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 535
d70c5fc7 5362006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 537 Anil Paranjape <anilp1@kpitcummins.com>
538 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 539
540 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
541 description.
542 * xc16x.opc: New file containing supporting XC16C routines.
543
8536c657
NC		 5442006-02-10 Nick Clifton <nickc@redhat.com>
545
546 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
547
458f7770
DD		 5482006-01-06 DJ Delorie <dj@redhat.com>
549
550 * m32c.cpu (mov.w:q): Fix mode.
551 (push32.b.imm): Likewise, for the comment.
552
d031aafb
NS		 5532005-12-16 Nathan Sidwell <nathan@codesourcery.com>
554
555 Second part of ms1 to mt renaming.
556 * mt.cpu (define-arch, define-isa): Set name to mt.
557 (define-mach): Adjust.
558 * mt.opc (CGEN_ASM_HASH): Update.
559 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
560 (parse_loopsize, parse_imm16): Adjust.
561
eda87aba
DD		 5622005-12-13 DJ Delorie <dj@redhat.com>
563
564 * m32c.cpu (jsri): Fix order so register names aren't treated as
565 symbols.
566 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
567 indexwd, indexws): Fix encodings.
568
4970f871
NS		 5692005-12-12 Nathan Sidwell <nathan@codesourcery.com>
570
571 * mt.cpu: Rename from ms1.cpu.
572 * mt.opc: Rename from ms1.opc.
573
48ad8298
HPN		 5742005-12-06 Hans-Peter Nilsson <hp@axis.com>
575
576 * cris.cpu (simplecris-common-writable-specregs)
577 (simplecris-common-readable-specregs): Split from
578 simplecris-common-specregs. All users changed.
579 (cris-implemented-writable-specregs-v0)
580 (cris-implemented-readable-specregs-v0): Similar from
581 cris-implemented-specregs-v0.
582 (cris-implemented-writable-specregs-v3)
583 (cris-implemented-readable-specregs-v3)
584 (cris-implemented-writable-specregs-v8)
585 (cris-implemented-readable-specregs-v8)
586 (cris-implemented-writable-specregs-v10)
587 (cris-implemented-readable-specregs-v10)
588 (cris-implemented-writable-specregs-v32)
589 (cris-implemented-readable-specregs-v32): Similar.
590 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
591 insns and specializations.
592
6f84a2a6
NS		 5932005-11-08 Nathan Sidwell <nathan@codesourcery.com>
594
595 Add ms2
596 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
597 model.
598 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
599 f-cb2incr, f-rc3): New fields.
600 (LOOP): New instruction.
601 (JAL-HAZARD): New hazard.
602 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
603 New operands.
604 (mul, muli, dbnz, iflush): Enable for ms2
605 (jal, reti): Has JAL-HAZARD.
606 (ldctxt, ldfb, stfb): Only ms1.
607 (fbcb): Only ms1,ms1-003.
608 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
609 fbcbincrs, mfbcbincrs): Enable for ms2.
610 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
611 * ms1.opc (parse_loopsize): New.
612 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
613 (print_pcrel): New.
614
95b96521
DB		 6152005-10-28 Dave Brolley <brolley@redhat.com>
616
617 Contribute the following change:
618 2003-09-24 Dave Brolley <brolley@redhat.com>
619
620 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
621 CGEN_ATTR_VALUE_TYPE.
622 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
623 Use cgen_bitset_intersect_p.
624
c6552317
DD		 6252005-10-27 DJ Delorie <dj@redhat.com>
626
627 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
628 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
629 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
630 imm operand is needed.
631 (adjnz, sbjnz): Pass the right operands.
632 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
633 unary-insn): Add -g variants for opcodes that need to support :G.
634 (not.BW:G, push.BW:G): Call it.
635 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
636 stzx16-imm8-imm8-abs16): Fix operand typos.
637 * m32c.opc (m32c_asm_hash): Support bnCND.
638 (parse_signed4n, print_signed4n): New.
72f4393d 639
f75eb1c0
DD		 6402005-10-26 DJ Delorie <dj@redhat.com>
641
642 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
643 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
644 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
645 dsp8[sp] is signed.
646 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
647 (mov.BW:S r0,r1): Fix typo r1l->r1.
648 (tst): Allow :G suffix.
649 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
650
e277c00b
AM		 6512005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
652
653 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
654
92e0a941
DD		 6552005-10-25 DJ Delorie <dj@redhat.com>
656
657 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
658 making one a macro of the other.
659
a1a280bb
DD		 6602005-10-21 DJ Delorie <dj@redhat.com>
661
662 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
663 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
664 indexld, indexls): .w variants have `1' bit.
665 (rot32.b): QI, not SI.
666 (rot32.w): HI, not SI.
667 (xchg16): HI for .w variant.
668
e74eb924
NC		 6692005-10-19 Nick Clifton <nickc@redhat.com>
670
671 * m32r.opc (parse_slo16): Fix bad application of previous patch.
672
5e03663f
NC		 6732005-10-18 Andreas Schwab <schwab@suse.de>
674
675 * m32r.opc (parse_slo16): Better version of previous patch.
676
ab7c9a26
NC		 6772005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
678
679 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
680 size.
681
fd54057a
DD		 6822005-07-25 DJ Delorie <dj@redhat.com>
683
684 * m32c.opc (parse_unsigned8): Add %dsp8().
685 (parse_signed8): Add %hi8().
686 (parse_unsigned16): Add %dsp16().
687 (parse_signed16): Add %lo16() and %hi16().
688 (parse_lab_5_3): Make valuep a bfd_vma *.
689
85da3a56
NC		 6902005-07-18 Nick Clifton <nickc@redhat.com>
691
692 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
693 components.
694 (f-lab32-jmp-s): Fix insertion sequence.
695 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
696 (Dsp-40-s8): Make parameter be signed.
697 (Dsp-40-s16): Likewise.
698 (Dsp-48-s8): Likewise.
699 (Dsp-48-s16): Likewise.
700 (Imm-13-u3): Likewise. (Despite its name!)
701 (BitBase16-16-s8): Make the parameter be unsigned.
702 (BitBase16-8-u11-S): Likewise.
703 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
704 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
705 relaxation.
706
707 * m32c.opc: Fix formatting.
708 Use safe-ctype.h instead of ctype.h
709 Move duplicated code sequences into a macro.
710 Fix compile time warnings about signedness mismatches.
711 Remove dead code.
712 (parse_lab_5_3): New parser function.
72f4393d 713
aa260854
JB		 7142005-07-16 Jim Blandy <jimb@redhat.com>
715
716 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
717 to represent isa sets.
718
0a665bfd
JB		 7192005-07-15 Jim Blandy <jimb@redhat.com>
720
721 * m32c.cpu, m32c.opc: Fix copyright.
722
49f58d10
JB		 7232005-07-14 Jim Blandy <jimb@redhat.com>
724
725 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
726
0e6b69be
AM		 7272005-07-14 Alan Modra <amodra@bigpond.net.au>
728
729 * ms1.opc (print_dollarhex): Correct format string.
730
f9210e37
AM		 7312005-07-06 Alan Modra <amodra@bigpond.net.au>
732
733 * iq2000.cpu: Include from binutils cpu dir.
734
3ec2b351
NC		 7352005-07-05 Nick Clifton <nickc@redhat.com>
736
737 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
738 unsigned in order to avoid compile time warnings about sign
739 conflicts.
740
741 * ms1.opc (parse_*): Likewise.
742 (parse_imm16): Use a "void *" as it is passed both signed and
743 unsigned arguments.
744
47b0e7ad
NC		 7452005-07-01 Nick Clifton <nickc@redhat.com>
746
747 * frv.opc: Update to ISO C90 function declaration style.
748 * iq2000.opc: Likewise.
749 * m32r.opc: Likewise.
750 * sh.opc: Likewise.
751
b081650b
DB		 7522005-06-15 Dave Brolley <brolley@redhat.com>
753
754 Contributed by Red Hat.
755 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
756 * ms1.opc: New file. Written by Stan Cox.
757
e172dbf8
NC		 7582005-05-10 Nick Clifton <nickc@redhat.com>
759
760 * Update the address and phone number of the FSF organization in
761 the GPL notices in the following files:
762 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
763 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
764 sh64-media.cpu, simplify.inc
765
b2d52a48
AM		 7662005-02-24 Alan Modra <amodra@bigpond.net.au>
767
768 * frv.opc (parse_A): Warning fix.
769
33b71eeb
NC		 7702005-02-23 Nick Clifton <nickc@redhat.com>
771
772 * frv.opc: Fixed compile time warnings about differing signed'ness
773 of pointers passed to functions.
774 * m32r.opc: Likewise.
775
bc18c937
NC		 7762005-02-11 Nick Clifton <nickc@redhat.com>
777
778 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
779 'bfd_vma *' in order avoid compile time warning message.
780
46da9a19
HPN		 7812005-01-28 Hans-Peter Nilsson <hp@axis.com>
782
783 * cris.cpu (mstep): Add missing insn.
784
90219bd0
AO		 7852005-01-25 Alexandre Oliva <aoliva@redhat.com>
786
787 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
788 * frv.cpu: Add support for TLS annotations in loads and calll.
789 * frv.opc (parse_symbolic_address): New.
790 (parse_ldd_annotation): New.
791 (parse_call_annotation): New.
792 (parse_ld_annotation): New.
793 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
794 Introduce TLS relocations.
795 (parse_d12, parse_s12, parse_u12): Likewise.
796 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
797 (parse_call_label, print_at): New.
798
c3d75c30
HPN		 7992004-12-21 Mikael Starvik <starvik@axis.com>
800
801 * cris.cpu (cris-set-mem): Correct integral write semantics.
802
68800d83
HPN		 8032004-11-29 Hans-Peter Nilsson <hp@axis.com>
804
805 * cris.cpu: New file.
806
4bd1d37b
NC		 8072004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
808
809 * iq2000.cpu: Added quotes around macro arguments so that they
810 will work with newer versions of guile.
811
4030fa5a
NC		 8122004-10-27 Nick Clifton <nickc@redhat.com>
813
814 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
815 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
816 operand.
817 * iq2000.cpu (dnop index): Rename to _index to avoid complications
818 with guile.
819
ac28a1cb
RS		 8202004-08-27 Richard Sandiford <rsandifo@redhat.com>
821
822 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
823
dc4c54bb
NC		 8242004-05-15 Nick Clifton <nickc@redhat.com>
825
826 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
827
f4453dfa
NC		 8282004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
829
830 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
831
676a64f4
RS		 8322004-03-01 Richard Sandiford <rsandifo@redhat.com>
833
834 * frv.cpu (define-arch frv): Add fr450 mach.
835 (define-mach fr450): New.
836 (define-model fr450): New. Add profile units to every fr450 insn.
837 (define-attr UNIT): Add MDCUTSSI.
838 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
839 (define-attr AUDIO): New boolean.
840 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
841 (f-LRA-null, f-TLBPR-null): New fields.
842 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
843 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
844 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
845 (LRA-null, TLBPR-null): New macros.
846 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
847 (load-real-address): New macro.
848 (lrai, lrad, tlbpr): New instructions.
849 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
850 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
851 (mdcutssi): Change UNIT attribute to MDCUTSSI.
852 (media-low-clear-semantics, media-scope-limit-semantics)
853 (media-quad-limit, media-quad-shift): New macros.
854 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
855 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
856 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
857 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
858 (fr450_unit_mapping): New array.
859 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
860 for new MDCUTSSI unit.
861 (fr450_check_insn_major_constraints): New function.
862 (check_insn_major_constraints): Use it.
863
c7a48b9a
RS		 8642004-03-01 Richard Sandiford <rsandifo@redhat.com>
865
866 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
867 (scutss): Change unit to I0.
868 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
869 (mqsaths): Fix FR400-MAJOR categorization.
870 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
871 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
872 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
873 combinations.
874
8ae0baa2
RS		 8752004-03-01 Richard Sandiford <rsandifo@redhat.com>
876
877 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
878 (rstb, rsth, rst, rstd, rstq): Delete.
879 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
880
8ee9a8b2
NC		 8812004-02-23 Nick Clifton <nickc@redhat.com>
882
883 * Apply these patches from Renesas:
884
885 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
886
887 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
888 disassembling codes for 0x*2 addresses.
889
890 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
891
892 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
893
894 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
895
896 * cpu/m32r.cpu : Add new model m32r2.
897 Add new instructions.
898 Replace occurrances of 'Mitsubishi' with 'Renesas'.
899 Changed PIPE attr of push from O to OS.
900 Care for Little-endian of M32R.
901 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
902 Care for Little-endian of M32R.
903 (parse_slo16): signed extension for value.
904
299d901c
AC		 9052004-02-20 Andrew Cagney <cagney@redhat.com>
906
e866a257
AC		 907 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
908 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
909
299d901c
AC		 910 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
911 written by Ben Elliston.
912
cb10e79a
RS		 9132004-01-14 Richard Sandiford <rsandifo@redhat.com>
914
915 * frv.cpu (UNIT): Add IACC.
916 (iacc-multiply-r-r): Use it.
917 * frv.opc (fr400_unit_mapping): Add entry for IACC.
918 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
919
d4e4dc14
AO		 9202004-01-06 Alexandre Oliva <aoliva@redhat.com>
921
922 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
923 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
924 cut&paste errors in shifting/truncating numerical operands.
925 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
926 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
927 (parse_uslo16): Likewise.
928 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
929 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
930 (parse_s12): Likewise.
931 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
932 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
933 (parse_uslo16): Likewise.
934 (parse_uhi16): Parse gothi and gotfuncdeschi.
935 (parse_d12): Parse got12 and gotfuncdesc12.
936 (parse_s12): Likewise.
937
1340b9a9
DB		 9382003-10-10 Dave Brolley <brolley@redhat.com>
939
940 * frv.cpu (dnpmop): New p-macro.
941 (GRdoublek): Use dnpmop.
942 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
943 (store-double-r-r): Use (.sym regtype doublek).
944 (r-store-double): Ditto.
945 (store-double-r-r-u): Ditto.
946 (conditional-store-double): Ditto.
947 (conditional-store-double-u): Ditto.
948 (store-double-r-simm): Ditto.
949 (fmovs): Assign to UNIT FMALL.
950
ac7c07ac
DB		 9512003-10-06 Dave Brolley <brolley@redhat.com>
952
953 * frv.cpu, frv.opc: Add support for fr550.
954
d0312406
DB		 9552003-09-24 Dave Brolley <brolley@redhat.com>
956
957 * frv.cpu (u-commit): New modelling unit for fr500.
958 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
959 (commit-r): Use u-commit model for fr500.
960 (commit): Ditto.
961 (conditional-float-binary-op): Take profiling data as an argument.
962 Update callers.
963 (ne-float-binary-op): Ditto.
964
c6945302
MS		 9652003-09-19 Michael Snyder <msnyder@redhat.com>
966
967 * frv.cpu (nldqi): Delete unimplemented instruction.
968
23600bb3
DB		 9692003-09-12 Dave Brolley <brolley@redhat.com>
970
971 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
972 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
973 frv_ref_SI to get input register referenced for profiling.
974 (clear-ne-flag-all): Pass insn profiling in as an argument.
975 (clrgr,clrfr,clrga,clrfa): Add profiling information.
976
6f18ad70
MS		 9772003-09-11 Michael Snyder <msnyder@redhat.com>
978
979 * frv.cpu: Typographical corrections.
980
96486995
DB		 9812003-09-09 Dave Brolley <brolley@redhat.com>
982
983 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
984 (conditional-media-dual-complex, media-quad-complex): Likewise.
985
0457efce
DB		 9862003-09-04 Dave Brolley <brolley@redhat.com>
987
988 * frv.cpu (register-transfer): Pass in all attributes in on argument.
989 Update all callers.
990 (conditional-register-transfer): Ditto.
991 (cache-preload): Ditto.
992 (floating-point-conversion): Ditto.
993 (floating-point-neg): Ditto.
994 (float-abs): Ditto.
995 (float-binary-op-s): Ditto.
996 (conditional-float-binary-op): Ditto.
997 (ne-float-binary-op): Ditto.
998 (float-dual-arith): Ditto.
999 (ne-float-dual-arith): Ditto.
1000
8caa9169
DB		 10012003-09-03 Dave Brolley <brolley@redhat.com>
1002
1003 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1004 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1005 MCLRACC-1.
1006 (A): Removed operand.
1007 (A0,A1): New operands replace operand A.
1008 (mnop): Now a real insn
1009 (mclracc): Removed insn.
1010 (mclracc-0, mclracc-1): New insns replace mclracc.
1011 (all insns): Use new UNIT attributes.
1012
6d9ab561
NC		 10132003-08-21 Nick Clifton <nickc@redhat.com>
1014
1015 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1016 and u-media-dual-btoh with output parameter.
1017 (cmbtoh): Add profiling hack.
1018
741a7751
NC		 10192003-08-19 Michael Snyder <msnyder@redhat.com>
1020
1021 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1022
5b5b78da
DE		 10232003-06-10 Doug Evans <dje@sebabeach.org>
1024
1025 * frv.cpu: Add IDOC attribute.
1026
539ee71a
AC		 10272003-06-06 Andrew Cagney <cagney@redhat.com>
1028
1029 Contributed by Red Hat.
1030 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1031 Stan Cox, and Frank Ch. Eigler.
1032 * iq2000.opc: New file. Written by Ben Elliston, Frank
1033 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1034 * iq2000m.cpu: New file. Written by Jeff Johnston.
1035 * iq10.cpu: New file. Written by Jeff Johnston.
1036
36c3ae24
NC		 10372003-06-05 Nick Clifton <nickc@redhat.com>
1038
1039 * frv.cpu (FRintieven): New operand. An even-numbered only
1040 version of the FRinti operand.
1041 (FRintjeven): Likewise for FRintj.
1042 (FRintkeven): Likewise for FRintk.
1043 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1044 media-quad-arith-sat-semantics, media-quad-arith-sat,
1045 conditional-media-quad-arith-sat, mdunpackh,
1046 media-quad-multiply-semantics, media-quad-multiply,
1047 conditional-media-quad-multiply, media-quad-complex-i,
1048 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1049 conditional-media-quad-multiply-acc, munpackh,
1050 media-quad-multiply-cross-acc-semantics, mdpackh,
1051 media-quad-multiply-cross-acc, mbtoh-semantics,
1052 media-quad-cross-multiply-cross-acc-semantics,
1053 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1054 media-quad-cross-multiply-acc-semantics, cmbtoh,
1055 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1056 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1057 cmhtob): Use new operands.
1058 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 1059 (parse_even_register): New function.
36c3ae24 1060
75798298
NC		 10612003-06-03 Nick Clifton <nickc@redhat.com>
1062
1063 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1064 immediate value not unsigned.
1065
9aab5aa3
AC		 10662003-06-03 Andrew Cagney <cagney@redhat.com>
1067
1068 Contributed by Red Hat.
1069 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1070 and Eric Christopher.
1071 * frv.opc: New file. Written by Catherine Moore, and Dave
1072 Brolley.
1073 * simplify.inc: New file. Written by Doug Evans.
1074
2739f79a
AC		 10752003-05-02 Andrew Cagney <cagney@redhat.com>
1076
1077 * New file.
1078
1079\f
752937aa
NC		 1080Copyright (C) 2003-2012 Free Software Foundation, Inc.
1081
1082Copying and distribution of this file, with or without modification,
1083are permitted in any medium without royalty provided the copyright
1084notice and this notice are preserved.
1085
2739f79a
AC		 1086Local Variables:
1087mode: change-log
1088left-margin: 8
1089fill-column: 74
1090version-control: never
1091End:
GDB Binutils - Deliverables
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