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* m32c.cpu (Bit3-S): New.
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
8d0e2679
DD		 12006-03-13 DJ Delorie <dj@redhat.com>
2
43aa3bb1
DD		 3 * m32c.cpu (Bit3-S): New.
4 (btst:s): New.
5 * m32c.opc (parse_bit3_S): New.
6
8d0e2679
DD		 7 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
8 (btst): Add optional :G suffix for MACH32.
9 (or.b:S): New.
10 (pop.w:G): Add optional :G suffix for MACH16.
11 (push.b.imm): Fix syntax.
12
253d272c
DD		 132006-03-10 DJ Delorie <dj@redhat.com>
14
15 * m32c.cpu (mul.l): New.
16 (mulu.l): New.
17
c7d41dc5
NC		 182006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
19
20 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
21 an error message otherwise.
22 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
23 Fix up comments to correctly describe the functions.
24
6772dd07
DD		 252006-02-24 DJ Delorie <dj@redhat.com>
26
27 * m32c.cpu (RL_TYPE): New attribute, with macros.
28 (Lab-8-24): Add RELAX.
29 (unary-insn-defn-g, binary-arith-imm-dst-defn,
30 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
31 (binary-arith-src-dst-defn): Add 2ADDR attribute.
32 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
33 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
34 attribute.
35 (jsri16, jsri32): Add 1ADDR attribute.
36 (jsr32.w, jsr32.a): Add JUMP attribute.
37
d70c5fc7
NC		 382006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
39 Anil Paranjape <anilp1@kpitcummins.com>
40 Shilin Shakti <shilins@kpitcummins.com>
41
42 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
43 description.
44 * xc16x.opc: New file containing supporting XC16C routines.
45
8536c657
NC		 462006-02-10 Nick Clifton <nickc@redhat.com>
47
48 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
49
458f7770
DD		 502006-01-06 DJ Delorie <dj@redhat.com>
51
52 * m32c.cpu (mov.w:q): Fix mode.
53 (push32.b.imm): Likewise, for the comment.
54
d031aafb
NS		 552005-12-16 Nathan Sidwell <nathan@codesourcery.com>
56
57 Second part of ms1 to mt renaming.
58 * mt.cpu (define-arch, define-isa): Set name to mt.
59 (define-mach): Adjust.
60 * mt.opc (CGEN_ASM_HASH): Update.
61 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
62 (parse_loopsize, parse_imm16): Adjust.
63
eda87aba
DD		 642005-12-13 DJ Delorie <dj@redhat.com>
65
66 * m32c.cpu (jsri): Fix order so register names aren't treated as
67 symbols.
68 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
69 indexwd, indexws): Fix encodings.
70
4970f871
NS		 712005-12-12 Nathan Sidwell <nathan@codesourcery.com>
72
73 * mt.cpu: Rename from ms1.cpu.
74 * mt.opc: Rename from ms1.opc.
75
48ad8298
HPN		 762005-12-06 Hans-Peter Nilsson <hp@axis.com>
77
78 * cris.cpu (simplecris-common-writable-specregs)
79 (simplecris-common-readable-specregs): Split from
80 simplecris-common-specregs. All users changed.
81 (cris-implemented-writable-specregs-v0)
82 (cris-implemented-readable-specregs-v0): Similar from
83 cris-implemented-specregs-v0.
84 (cris-implemented-writable-specregs-v3)
85 (cris-implemented-readable-specregs-v3)
86 (cris-implemented-writable-specregs-v8)
87 (cris-implemented-readable-specregs-v8)
88 (cris-implemented-writable-specregs-v10)
89 (cris-implemented-readable-specregs-v10)
90 (cris-implemented-writable-specregs-v32)
91 (cris-implemented-readable-specregs-v32): Similar.
92 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
93 insns and specializations.
94
6f84a2a6
NS		 952005-11-08 Nathan Sidwell <nathan@codesourcery.com>
96
97 Add ms2
98 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
99 model.
100 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
101 f-cb2incr, f-rc3): New fields.
102 (LOOP): New instruction.
103 (JAL-HAZARD): New hazard.
104 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
105 New operands.
106 (mul, muli, dbnz, iflush): Enable for ms2
107 (jal, reti): Has JAL-HAZARD.
108 (ldctxt, ldfb, stfb): Only ms1.
109 (fbcb): Only ms1,ms1-003.
110 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
111 fbcbincrs, mfbcbincrs): Enable for ms2.
112 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
113 * ms1.opc (parse_loopsize): New.
114 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
115 (print_pcrel): New.
116
95b96521
DB		 1172005-10-28 Dave Brolley <brolley@redhat.com>
118
119 Contribute the following change:
120 2003-09-24 Dave Brolley <brolley@redhat.com>
121
122 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
123 CGEN_ATTR_VALUE_TYPE.
124 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
125 Use cgen_bitset_intersect_p.
126
c6552317
DD		 1272005-10-27 DJ Delorie <dj@redhat.com>
128
129 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
130 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
131 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
132 imm operand is needed.
133 (adjnz, sbjnz): Pass the right operands.
134 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
135 unary-insn): Add -g variants for opcodes that need to support :G.
136 (not.BW:G, push.BW:G): Call it.
137 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
138 stzx16-imm8-imm8-abs16): Fix operand typos.
139 * m32c.opc (m32c_asm_hash): Support bnCND.
140 (parse_signed4n, print_signed4n): New.
141
f75eb1c0
DD		 1422005-10-26 DJ Delorie <dj@redhat.com>
143
144 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
145 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
146 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
147 dsp8[sp] is signed.
148 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
149 (mov.BW:S r0,r1): Fix typo r1l->r1.
150 (tst): Allow :G suffix.
151 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
152
e277c00b
AM		 1532005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
154
155 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
156
92e0a941
DD		 1572005-10-25 DJ Delorie <dj@redhat.com>
158
159 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
160 making one a macro of the other.
161
a1a280bb
DD		 1622005-10-21 DJ Delorie <dj@redhat.com>
163
164 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
165 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
166 indexld, indexls): .w variants have `1' bit.
167 (rot32.b): QI, not SI.
168 (rot32.w): HI, not SI.
169 (xchg16): HI for .w variant.
170
e74eb924
NC		 1712005-10-19 Nick Clifton <nickc@redhat.com>
172
173 * m32r.opc (parse_slo16): Fix bad application of previous patch.
174
5e03663f
NC		 1752005-10-18 Andreas Schwab <schwab@suse.de>
176
177 * m32r.opc (parse_slo16): Better version of previous patch.
178
ab7c9a26
NC		 1792005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
180
181 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
182 size.
183
fd54057a
DD		 1842005-07-25 DJ Delorie <dj@redhat.com>
185
186 * m32c.opc (parse_unsigned8): Add %dsp8().
187 (parse_signed8): Add %hi8().
188 (parse_unsigned16): Add %dsp16().
189 (parse_signed16): Add %lo16() and %hi16().
190 (parse_lab_5_3): Make valuep a bfd_vma *.
191
85da3a56
NC		 1922005-07-18 Nick Clifton <nickc@redhat.com>
193
194 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
195 components.
196 (f-lab32-jmp-s): Fix insertion sequence.
197 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
198 (Dsp-40-s8): Make parameter be signed.
199 (Dsp-40-s16): Likewise.
200 (Dsp-48-s8): Likewise.
201 (Dsp-48-s16): Likewise.
202 (Imm-13-u3): Likewise. (Despite its name!)
203 (BitBase16-16-s8): Make the parameter be unsigned.
204 (BitBase16-8-u11-S): Likewise.
205 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
206 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
207 relaxation.
208
209 * m32c.opc: Fix formatting.
210 Use safe-ctype.h instead of ctype.h
211 Move duplicated code sequences into a macro.
212 Fix compile time warnings about signedness mismatches.
213 Remove dead code.
214 (parse_lab_5_3): New parser function.
215
aa260854
JB		 2162005-07-16 Jim Blandy <jimb@redhat.com>
217
218 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
219 to represent isa sets.
220
0a665bfd
JB		 2212005-07-15 Jim Blandy <jimb@redhat.com>
222
223 * m32c.cpu, m32c.opc: Fix copyright.
224
49f58d10
JB		 2252005-07-14 Jim Blandy <jimb@redhat.com>
226
227 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
228
0e6b69be
AM		 2292005-07-14 Alan Modra <amodra@bigpond.net.au>
230
231 * ms1.opc (print_dollarhex): Correct format string.
232
f9210e37
AM		 2332005-07-06 Alan Modra <amodra@bigpond.net.au>
234
235 * iq2000.cpu: Include from binutils cpu dir.
236
3ec2b351
NC		 2372005-07-05 Nick Clifton <nickc@redhat.com>
238
239 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
240 unsigned in order to avoid compile time warnings about sign
241 conflicts.
242
243 * ms1.opc (parse_*): Likewise.
244 (parse_imm16): Use a "void *" as it is passed both signed and
245 unsigned arguments.
246
47b0e7ad
NC		 2472005-07-01 Nick Clifton <nickc@redhat.com>
248
249 * frv.opc: Update to ISO C90 function declaration style.
250 * iq2000.opc: Likewise.
251 * m32r.opc: Likewise.
252 * sh.opc: Likewise.
253
b081650b
DB		 2542005-06-15 Dave Brolley <brolley@redhat.com>
255
256 Contributed by Red Hat.
257 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
258 * ms1.opc: New file. Written by Stan Cox.
259
e172dbf8
NC		 2602005-05-10 Nick Clifton <nickc@redhat.com>
261
262 * Update the address and phone number of the FSF organization in
263 the GPL notices in the following files:
264 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
265 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
266 sh64-media.cpu, simplify.inc
267
b2d52a48
AM		 2682005-02-24 Alan Modra <amodra@bigpond.net.au>
269
270 * frv.opc (parse_A): Warning fix.
271
33b71eeb
NC		 2722005-02-23 Nick Clifton <nickc@redhat.com>
273
274 * frv.opc: Fixed compile time warnings about differing signed'ness
275 of pointers passed to functions.
276 * m32r.opc: Likewise.
277
bc18c937
NC		 2782005-02-11 Nick Clifton <nickc@redhat.com>
279
280 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
281 'bfd_vma *' in order avoid compile time warning message.
282
46da9a19
HPN		 2832005-01-28 Hans-Peter Nilsson <hp@axis.com>
284
285 * cris.cpu (mstep): Add missing insn.
286
90219bd0
AO		 2872005-01-25 Alexandre Oliva <aoliva@redhat.com>
288
289 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
290 * frv.cpu: Add support for TLS annotations in loads and calll.
291 * frv.opc (parse_symbolic_address): New.
292 (parse_ldd_annotation): New.
293 (parse_call_annotation): New.
294 (parse_ld_annotation): New.
295 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
296 Introduce TLS relocations.
297 (parse_d12, parse_s12, parse_u12): Likewise.
298 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
299 (parse_call_label, print_at): New.
300
c3d75c30
HPN		 3012004-12-21 Mikael Starvik <starvik@axis.com>
302
303 * cris.cpu (cris-set-mem): Correct integral write semantics.
304
68800d83
HPN		 3052004-11-29 Hans-Peter Nilsson <hp@axis.com>
306
307 * cris.cpu: New file.
308
4bd1d37b
NC		 3092004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
310
311 * iq2000.cpu: Added quotes around macro arguments so that they
312 will work with newer versions of guile.
313
4030fa5a
NC		 3142004-10-27 Nick Clifton <nickc@redhat.com>
315
316 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
317 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
318 operand.
319 * iq2000.cpu (dnop index): Rename to _index to avoid complications
320 with guile.
321
ac28a1cb
RS		 3222004-08-27 Richard Sandiford <rsandifo@redhat.com>
323
324 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
325
dc4c54bb
NC		 3262004-05-15 Nick Clifton <nickc@redhat.com>
327
328 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
329
f4453dfa
NC		 3302004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
331
332 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
333
676a64f4
RS		 3342004-03-01 Richard Sandiford <rsandifo@redhat.com>
335
336 * frv.cpu (define-arch frv): Add fr450 mach.
337 (define-mach fr450): New.
338 (define-model fr450): New. Add profile units to every fr450 insn.
339 (define-attr UNIT): Add MDCUTSSI.
340 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
341 (define-attr AUDIO): New boolean.
342 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
343 (f-LRA-null, f-TLBPR-null): New fields.
344 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
345 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
346 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
347 (LRA-null, TLBPR-null): New macros.
348 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
349 (load-real-address): New macro.
350 (lrai, lrad, tlbpr): New instructions.
351 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
352 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
353 (mdcutssi): Change UNIT attribute to MDCUTSSI.
354 (media-low-clear-semantics, media-scope-limit-semantics)
355 (media-quad-limit, media-quad-shift): New macros.
356 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
357 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
358 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
359 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
360 (fr450_unit_mapping): New array.
361 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
362 for new MDCUTSSI unit.
363 (fr450_check_insn_major_constraints): New function.
364 (check_insn_major_constraints): Use it.
365
c7a48b9a
RS		 3662004-03-01 Richard Sandiford <rsandifo@redhat.com>
367
368 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
369 (scutss): Change unit to I0.
370 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
371 (mqsaths): Fix FR400-MAJOR categorization.
372 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
373 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
374 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
375 combinations.
376
8ae0baa2
RS		 3772004-03-01 Richard Sandiford <rsandifo@redhat.com>
378
379 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
380 (rstb, rsth, rst, rstd, rstq): Delete.
381 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
382
8ee9a8b2
NC		 3832004-02-23 Nick Clifton <nickc@redhat.com>
384
385 * Apply these patches from Renesas:
386
387 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
388
389 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
390 disassembling codes for 0x*2 addresses.
391
392 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
393
394 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
395
396 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
397
398 * cpu/m32r.cpu : Add new model m32r2.
399 Add new instructions.
400 Replace occurrances of 'Mitsubishi' with 'Renesas'.
401 Changed PIPE attr of push from O to OS.
402 Care for Little-endian of M32R.
403 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
404 Care for Little-endian of M32R.
405 (parse_slo16): signed extension for value.
406
299d901c
AC		 4072004-02-20 Andrew Cagney <cagney@redhat.com>
408
e866a257
AC		 409 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
410 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
411
299d901c
AC		 412 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
413 written by Ben Elliston.
414
cb10e79a
RS		 4152004-01-14 Richard Sandiford <rsandifo@redhat.com>
416
417 * frv.cpu (UNIT): Add IACC.
418 (iacc-multiply-r-r): Use it.
419 * frv.opc (fr400_unit_mapping): Add entry for IACC.
420 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
421
d4e4dc14
AO		 4222004-01-06 Alexandre Oliva <aoliva@redhat.com>
423
424 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
425 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
426 cut&paste errors in shifting/truncating numerical operands.
427 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
428 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
429 (parse_uslo16): Likewise.
430 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
431 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
432 (parse_s12): Likewise.
433 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
434 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
435 (parse_uslo16): Likewise.
436 (parse_uhi16): Parse gothi and gotfuncdeschi.
437 (parse_d12): Parse got12 and gotfuncdesc12.
438 (parse_s12): Likewise.
439
1340b9a9
DB		 4402003-10-10 Dave Brolley <brolley@redhat.com>
441
442 * frv.cpu (dnpmop): New p-macro.
443 (GRdoublek): Use dnpmop.
444 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
445 (store-double-r-r): Use (.sym regtype doublek).
446 (r-store-double): Ditto.
447 (store-double-r-r-u): Ditto.
448 (conditional-store-double): Ditto.
449 (conditional-store-double-u): Ditto.
450 (store-double-r-simm): Ditto.
451 (fmovs): Assign to UNIT FMALL.
452
ac7c07ac
DB		 4532003-10-06 Dave Brolley <brolley@redhat.com>
454
455 * frv.cpu, frv.opc: Add support for fr550.
456
d0312406
DB		 4572003-09-24 Dave Brolley <brolley@redhat.com>
458
459 * frv.cpu (u-commit): New modelling unit for fr500.
460 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
461 (commit-r): Use u-commit model for fr500.
462 (commit): Ditto.
463 (conditional-float-binary-op): Take profiling data as an argument.
464 Update callers.
465 (ne-float-binary-op): Ditto.
466
c6945302
MS		 4672003-09-19 Michael Snyder <msnyder@redhat.com>
468
469 * frv.cpu (nldqi): Delete unimplemented instruction.
470
23600bb3
DB		 4712003-09-12 Dave Brolley <brolley@redhat.com>
472
473 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
474 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
475 frv_ref_SI to get input register referenced for profiling.
476 (clear-ne-flag-all): Pass insn profiling in as an argument.
477 (clrgr,clrfr,clrga,clrfa): Add profiling information.
478
6f18ad70
MS		 4792003-09-11 Michael Snyder <msnyder@redhat.com>
480
481 * frv.cpu: Typographical corrections.
482
96486995
DB		 4832003-09-09 Dave Brolley <brolley@redhat.com>
484
485 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
486 (conditional-media-dual-complex, media-quad-complex): Likewise.
487
0457efce
DB		 4882003-09-04 Dave Brolley <brolley@redhat.com>
489
490 * frv.cpu (register-transfer): Pass in all attributes in on argument.
491 Update all callers.
492 (conditional-register-transfer): Ditto.
493 (cache-preload): Ditto.
494 (floating-point-conversion): Ditto.
495 (floating-point-neg): Ditto.
496 (float-abs): Ditto.
497 (float-binary-op-s): Ditto.
498 (conditional-float-binary-op): Ditto.
499 (ne-float-binary-op): Ditto.
500 (float-dual-arith): Ditto.
501 (ne-float-dual-arith): Ditto.
502
8caa9169
DB		 5032003-09-03 Dave Brolley <brolley@redhat.com>
504
505 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
506 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
507 MCLRACC-1.
508 (A): Removed operand.
509 (A0,A1): New operands replace operand A.
510 (mnop): Now a real insn
511 (mclracc): Removed insn.
512 (mclracc-0, mclracc-1): New insns replace mclracc.
513 (all insns): Use new UNIT attributes.
514
6d9ab561
NC		 5152003-08-21 Nick Clifton <nickc@redhat.com>
516
517 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
518 and u-media-dual-btoh with output parameter.
519 (cmbtoh): Add profiling hack.
520
741a7751
NC		 5212003-08-19 Michael Snyder <msnyder@redhat.com>
522
523 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
524
5b5b78da
DE		 5252003-06-10 Doug Evans <dje@sebabeach.org>
526
527 * frv.cpu: Add IDOC attribute.
528
539ee71a
AC		 5292003-06-06 Andrew Cagney <cagney@redhat.com>
530
531 Contributed by Red Hat.
532 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
533 Stan Cox, and Frank Ch. Eigler.
534 * iq2000.opc: New file. Written by Ben Elliston, Frank
535 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
536 * iq2000m.cpu: New file. Written by Jeff Johnston.
537 * iq10.cpu: New file. Written by Jeff Johnston.
538
36c3ae24
NC		 5392003-06-05 Nick Clifton <nickc@redhat.com>
540
541 * frv.cpu (FRintieven): New operand. An even-numbered only
542 version of the FRinti operand.
543 (FRintjeven): Likewise for FRintj.
544 (FRintkeven): Likewise for FRintk.
545 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
546 media-quad-arith-sat-semantics, media-quad-arith-sat,
547 conditional-media-quad-arith-sat, mdunpackh,
548 media-quad-multiply-semantics, media-quad-multiply,
549 conditional-media-quad-multiply, media-quad-complex-i,
550 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
551 conditional-media-quad-multiply-acc, munpackh,
552 media-quad-multiply-cross-acc-semantics, mdpackh,
553 media-quad-multiply-cross-acc, mbtoh-semantics,
554 media-quad-cross-multiply-cross-acc-semantics,
555 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
556 media-quad-cross-multiply-acc-semantics, cmbtoh,
557 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
558 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
559 cmhtob): Use new operands.
560 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 561 (parse_even_register): New function.
36c3ae24 562
75798298
NC		 5632003-06-03 Nick Clifton <nickc@redhat.com>
564
565 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
566 immediate value not unsigned.
567
9aab5aa3
AC		 5682003-06-03 Andrew Cagney <cagney@redhat.com>
569
570 Contributed by Red Hat.
571 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
572 and Eric Christopher.
573 * frv.opc: New file. Written by Catherine Moore, and Dave
574 Brolley.
575 * simplify.inc: New file. Written by Doug Evans.
576
2739f79a
AC		 5772003-05-02 Andrew Cagney <cagney@redhat.com>
578
579 * New file.
580
581\f
582Local Variables:
583mode: change-log
584left-margin: 8
585fill-column: 74
586version-control: never
587End:
GDB Binutils - Deliverables
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