* ppc-opc.c (PWR2COM): Define.
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
5ff58fb0
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12010-02-11 Doug Evans <dje@sebabeach.org>
2
3 * m32r.cpu (HASH-PREFIX): Delete.
4 (duhpo, dshpo): New pmacros.
5 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
6 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
7 attribute, define with dshpo.
8 (uimm24): Delete HASH-PREFIX attribute.
9 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
10 (print_signed_with_hash_prefix): New function.
11 (print_unsigned_with_hash_prefix): New function.
12 * xc16x.cpu (dowh): New pmacro.
13 (upof16): Define with dowh, specify print handler.
14 (qbit, qlobit, qhibit): Ditto.
15 (upag16): Ditto.
16 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
17 (print_with_dot_prefix): New functions.
18 (print_with_pof_prefix, print_with_pag_prefix): New functions.
19
3fa5b97b
DE
202010-01-24 Doug Evans <dje@sebabeach.org>
21
22 * frv.cpu (floating-point-conversion): Update call to fp conv op.
23 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
24 conditional-floating-point-conversion, ne-floating-point-conversion,
25 float-parallel-mul-add-double-semantics): Ditto.
26
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DE
272010-01-05 Doug Evans <dje@sebabeach.org>
28
29 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
30 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
31
caaf56fb
DE
322010-01-02 Doug Evans <dje@sebabeach.org>
33
34 * m32c.opc (parse_signed16): Fix typo.
35
91d6fa6a
NC
362009-12-11 Nick Clifton <nickc@redhat.com>
37
38 * frv.opc: Fix shadowed variable warnings.
39 * m32c.opc: Fix shadowed variable warnings.
40
ec84cc2b
DE
412009-11-14 Doug Evans <dje@sebabeach.org>
42
43 Must use VOID expression in VOID context.
44 * xc16x.cpu (mov4): Fix mode of `sequence'.
45 (mov9, mov10): Ditto.
46 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
47 (callr, callseg, calls, trap, rets, reti): Ditto.
48 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
49 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
50 (exts, exts1, extsr, extsr1, prior): Ditto.
51
ac1e9eca
DE
522009-10-23 Doug Evans <dje@sebabeach.org>
53
54 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
55 cgen-ops.h -> cgen/basic-ops.h.
56
b4744b17
AM
572009-09-25 Alan Modra <amodra@bigpond.net.au>
58
59 * m32r.cpu (stb-plus): Typo fix.
60
ab5f875d
DE
612009-09-23 Doug Evans <dje@sebabeach.org>
62
63 * m32r.cpu (sth-plus): Fix address mode and calculation.
64 (stb-plus): Ditto.
65 (clrpsw): Fix mask calculation.
66 (bset, bclr, btst): Make mode in bit calculation match expression.
67
68 * xc16x.cpu (rtl-version): Set to 0.8.
69 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
70 make uppercase. Remove unnecessary name-prefix spec.
71 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
72 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
73 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
74 (h-cr): New hardware.
75 (muls): Comment out parts that won't compile, add fixme.
76 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
77 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
78 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
79
0aaaf7c3
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802009-07-16 Doug Evans <dje@sebabeach.org>
81
82 * cpu/simplify.inc (*): One line doc strings don't need \n.
83 (df): Invoke define-full-ifield instead of claiming it's an alias.
84 (dno): Define.
85 (dnop): Mark as deprecated.
86
1998a8e0
AM
872009-06-22 Alan Modra <amodra@bigpond.net.au>
88
89 * m32c.opc (parse_lab_5_3): Use correct enum.
90
6347aad8
HPN
912009-01-07 Hans-Peter Nilsson <hp@axis.com>
92
93 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
94 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
95 (media-arith-sat-semantics): Explicitly sign- or zero-extend
96 arguments of "operation" to DI using "mode" and the new pmacros.
97
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982009-01-03 Hans-Peter Nilsson <hp@axis.com>
99
100 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
101 of number 2, PID.
102
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1032008-12-23 Jon Beniston <jon@beniston.com>
104
105 * lm32.cpu: New file.
106 * lm32.opc: New file.
107
90518ff4
AM
1082008-01-29 Alan Modra <amodra@bigpond.net.au>
109
110 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
111 to source.
112
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1132007-10-22 Hans-Peter Nilsson <hp@axis.com>
114
115 * cris.cpu (movs, movu): Use result of extension operation when
116 updating flags.
117
9b201bb5
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1182007-07-04 Nick Clifton <nickc@redhat.com>
119
120 * cris.cpu: Update copyright notice to refer to GPLv3.
121 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
122 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
123 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
124 xc16x.opc: Likewise.
125 * iq2000.cpu: Fix copyright notice to refer to FSF.
126
53289dcd
MS
1272007-04-30 Mark Salter <msalter@sadr.localdomain>
128
129 * frv.cpu (spr-names): Support new coprocessor SPR registers.
130
f6da2ec2
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1312007-04-20 Nick Clifton <nickc@redhat.com>
132
133 * xc16x.cpu: Restore after accidentally overwriting this file with
134 xc16x.opc.
135
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DD
1362007-03-29 DJ Delorie <dj@redhat.com>
137
138 * m32c.cpu (Imm-8-s4n): Fix print hook.
139 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
140 (arith-jnz-imm4-dst-defn): Make relaxable.
141 (arith-jnz16-imm4-dst-defn): Fix encodings.
142
75b06e7b
DD
1432007-03-20 DJ Delorie <dj@redhat.com>
144
145 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
146 mem20): New.
147 (src16-16-20-An-relative-*): New.
148 (dst16-*-20-An-relative-*): New.
149 (dst16-16-16sa-*): New
150 (dst16-16-16ar-*): New
151 (dst32-16-16sa-Unprefixed-*): New
152 (jsri): Fix operands.
153 (setzx): Fix encoding.
154
a5da764d
AM
1552007-03-08 Alan Modra <amodra@bigpond.net.au>
156
157 * m32r.opc: Formatting.
158
b497d0b0
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1592006-05-22 Nick Clifton <nickc@redhat.com>
160
161 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
162
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DD
1632006-04-10 DJ Delorie <dj@redhat.com>
164
165 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
166 decides if this function accepts symbolic constants or not.
167 (parse_signed_bitbase): Likewise.
168 (parse_unsigned_bitbase8): Pass the new parameter.
169 (parse_unsigned_bitbase11): Likewise.
170 (parse_unsigned_bitbase16): Likewise.
171 (parse_unsigned_bitbase19): Likewise.
172 (parse_unsigned_bitbase27): Likewise.
173 (parse_signed_bitbase8): Likewise.
174 (parse_signed_bitbase11): Likewise.
175 (parse_signed_bitbase19): Likewise.
176
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DD
1772006-03-13 DJ Delorie <dj@redhat.com>
178
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DD
179 * m32c.cpu (Bit3-S): New.
180 (btst:s): New.
181 * m32c.opc (parse_bit3_S): New.
182
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DD
183 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
184 (btst): Add optional :G suffix for MACH32.
185 (or.b:S): New.
186 (pop.w:G): Add optional :G suffix for MACH16.
187 (push.b.imm): Fix syntax.
188
253d272c
DD
1892006-03-10 DJ Delorie <dj@redhat.com>
190
191 * m32c.cpu (mul.l): New.
192 (mulu.l): New.
193
c7d41dc5
NC
1942006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
195
196 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
197 an error message otherwise.
198 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
199 Fix up comments to correctly describe the functions.
200
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DD
2012006-02-24 DJ Delorie <dj@redhat.com>
202
203 * m32c.cpu (RL_TYPE): New attribute, with macros.
204 (Lab-8-24): Add RELAX.
205 (unary-insn-defn-g, binary-arith-imm-dst-defn,
206 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
207 (binary-arith-src-dst-defn): Add 2ADDR attribute.
208 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
209 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
210 attribute.
211 (jsri16, jsri32): Add 1ADDR attribute.
212 (jsr32.w, jsr32.a): Add JUMP attribute.
213
d70c5fc7
NC
2142006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
215 Anil Paranjape <anilp1@kpitcummins.com>
216 Shilin Shakti <shilins@kpitcummins.com>
217
218 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
219 description.
220 * xc16x.opc: New file containing supporting XC16C routines.
221
8536c657
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2222006-02-10 Nick Clifton <nickc@redhat.com>
223
224 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
225
458f7770
DD
2262006-01-06 DJ Delorie <dj@redhat.com>
227
228 * m32c.cpu (mov.w:q): Fix mode.
229 (push32.b.imm): Likewise, for the comment.
230
d031aafb
NS
2312005-12-16 Nathan Sidwell <nathan@codesourcery.com>
232
233 Second part of ms1 to mt renaming.
234 * mt.cpu (define-arch, define-isa): Set name to mt.
235 (define-mach): Adjust.
236 * mt.opc (CGEN_ASM_HASH): Update.
237 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
238 (parse_loopsize, parse_imm16): Adjust.
239
eda87aba
DD
2402005-12-13 DJ Delorie <dj@redhat.com>
241
242 * m32c.cpu (jsri): Fix order so register names aren't treated as
243 symbols.
244 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
245 indexwd, indexws): Fix encodings.
246
4970f871
NS
2472005-12-12 Nathan Sidwell <nathan@codesourcery.com>
248
249 * mt.cpu: Rename from ms1.cpu.
250 * mt.opc: Rename from ms1.opc.
251
48ad8298
HPN
2522005-12-06 Hans-Peter Nilsson <hp@axis.com>
253
254 * cris.cpu (simplecris-common-writable-specregs)
255 (simplecris-common-readable-specregs): Split from
256 simplecris-common-specregs. All users changed.
257 (cris-implemented-writable-specregs-v0)
258 (cris-implemented-readable-specregs-v0): Similar from
259 cris-implemented-specregs-v0.
260 (cris-implemented-writable-specregs-v3)
261 (cris-implemented-readable-specregs-v3)
262 (cris-implemented-writable-specregs-v8)
263 (cris-implemented-readable-specregs-v8)
264 (cris-implemented-writable-specregs-v10)
265 (cris-implemented-readable-specregs-v10)
266 (cris-implemented-writable-specregs-v32)
267 (cris-implemented-readable-specregs-v32): Similar.
268 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
269 insns and specializations.
270
6f84a2a6
NS
2712005-11-08 Nathan Sidwell <nathan@codesourcery.com>
272
273 Add ms2
274 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
275 model.
276 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
277 f-cb2incr, f-rc3): New fields.
278 (LOOP): New instruction.
279 (JAL-HAZARD): New hazard.
280 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
281 New operands.
282 (mul, muli, dbnz, iflush): Enable for ms2
283 (jal, reti): Has JAL-HAZARD.
284 (ldctxt, ldfb, stfb): Only ms1.
285 (fbcb): Only ms1,ms1-003.
286 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
287 fbcbincrs, mfbcbincrs): Enable for ms2.
288 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
289 * ms1.opc (parse_loopsize): New.
290 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
291 (print_pcrel): New.
292
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DB
2932005-10-28 Dave Brolley <brolley@redhat.com>
294
295 Contribute the following change:
296 2003-09-24 Dave Brolley <brolley@redhat.com>
297
298 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
299 CGEN_ATTR_VALUE_TYPE.
300 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
301 Use cgen_bitset_intersect_p.
302
c6552317
DD
3032005-10-27 DJ Delorie <dj@redhat.com>
304
305 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
306 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
307 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
308 imm operand is needed.
309 (adjnz, sbjnz): Pass the right operands.
310 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
311 unary-insn): Add -g variants for opcodes that need to support :G.
312 (not.BW:G, push.BW:G): Call it.
313 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
314 stzx16-imm8-imm8-abs16): Fix operand typos.
315 * m32c.opc (m32c_asm_hash): Support bnCND.
316 (parse_signed4n, print_signed4n): New.
317
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DD
3182005-10-26 DJ Delorie <dj@redhat.com>
319
320 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
321 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
322 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
323 dsp8[sp] is signed.
324 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
325 (mov.BW:S r0,r1): Fix typo r1l->r1.
326 (tst): Allow :G suffix.
327 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
328
e277c00b
AM
3292005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
330
331 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
332
92e0a941
DD
3332005-10-25 DJ Delorie <dj@redhat.com>
334
335 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
336 making one a macro of the other.
337
a1a280bb
DD
3382005-10-21 DJ Delorie <dj@redhat.com>
339
340 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
341 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
342 indexld, indexls): .w variants have `1' bit.
343 (rot32.b): QI, not SI.
344 (rot32.w): HI, not SI.
345 (xchg16): HI for .w variant.
346
e74eb924
NC
3472005-10-19 Nick Clifton <nickc@redhat.com>
348
349 * m32r.opc (parse_slo16): Fix bad application of previous patch.
350
5e03663f
NC
3512005-10-18 Andreas Schwab <schwab@suse.de>
352
353 * m32r.opc (parse_slo16): Better version of previous patch.
354
ab7c9a26
NC
3552005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
356
357 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
358 size.
359
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DD
3602005-07-25 DJ Delorie <dj@redhat.com>
361
362 * m32c.opc (parse_unsigned8): Add %dsp8().
363 (parse_signed8): Add %hi8().
364 (parse_unsigned16): Add %dsp16().
365 (parse_signed16): Add %lo16() and %hi16().
366 (parse_lab_5_3): Make valuep a bfd_vma *.
367
85da3a56
NC
3682005-07-18 Nick Clifton <nickc@redhat.com>
369
370 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
371 components.
372 (f-lab32-jmp-s): Fix insertion sequence.
373 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
374 (Dsp-40-s8): Make parameter be signed.
375 (Dsp-40-s16): Likewise.
376 (Dsp-48-s8): Likewise.
377 (Dsp-48-s16): Likewise.
378 (Imm-13-u3): Likewise. (Despite its name!)
379 (BitBase16-16-s8): Make the parameter be unsigned.
380 (BitBase16-8-u11-S): Likewise.
381 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
382 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
383 relaxation.
384
385 * m32c.opc: Fix formatting.
386 Use safe-ctype.h instead of ctype.h
387 Move duplicated code sequences into a macro.
388 Fix compile time warnings about signedness mismatches.
389 Remove dead code.
390 (parse_lab_5_3): New parser function.
391
aa260854
JB
3922005-07-16 Jim Blandy <jimb@redhat.com>
393
394 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
395 to represent isa sets.
396
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JB
3972005-07-15 Jim Blandy <jimb@redhat.com>
398
399 * m32c.cpu, m32c.opc: Fix copyright.
400
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JB
4012005-07-14 Jim Blandy <jimb@redhat.com>
402
403 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
404
0e6b69be
AM
4052005-07-14 Alan Modra <amodra@bigpond.net.au>
406
407 * ms1.opc (print_dollarhex): Correct format string.
408
f9210e37
AM
4092005-07-06 Alan Modra <amodra@bigpond.net.au>
410
411 * iq2000.cpu: Include from binutils cpu dir.
412
3ec2b351
NC
4132005-07-05 Nick Clifton <nickc@redhat.com>
414
415 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
416 unsigned in order to avoid compile time warnings about sign
417 conflicts.
418
419 * ms1.opc (parse_*): Likewise.
420 (parse_imm16): Use a "void *" as it is passed both signed and
421 unsigned arguments.
422
47b0e7ad
NC
4232005-07-01 Nick Clifton <nickc@redhat.com>
424
425 * frv.opc: Update to ISO C90 function declaration style.
426 * iq2000.opc: Likewise.
427 * m32r.opc: Likewise.
428 * sh.opc: Likewise.
429
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DB
4302005-06-15 Dave Brolley <brolley@redhat.com>
431
432 Contributed by Red Hat.
433 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
434 * ms1.opc: New file. Written by Stan Cox.
435
e172dbf8
NC
4362005-05-10 Nick Clifton <nickc@redhat.com>
437
438 * Update the address and phone number of the FSF organization in
439 the GPL notices in the following files:
440 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
441 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
442 sh64-media.cpu, simplify.inc
443
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AM
4442005-02-24 Alan Modra <amodra@bigpond.net.au>
445
446 * frv.opc (parse_A): Warning fix.
447
33b71eeb
NC
4482005-02-23 Nick Clifton <nickc@redhat.com>
449
450 * frv.opc: Fixed compile time warnings about differing signed'ness
451 of pointers passed to functions.
452 * m32r.opc: Likewise.
453
bc18c937
NC
4542005-02-11 Nick Clifton <nickc@redhat.com>
455
456 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
457 'bfd_vma *' in order avoid compile time warning message.
458
46da9a19
HPN
4592005-01-28 Hans-Peter Nilsson <hp@axis.com>
460
461 * cris.cpu (mstep): Add missing insn.
462
90219bd0
AO
4632005-01-25 Alexandre Oliva <aoliva@redhat.com>
464
465 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
466 * frv.cpu: Add support for TLS annotations in loads and calll.
467 * frv.opc (parse_symbolic_address): New.
468 (parse_ldd_annotation): New.
469 (parse_call_annotation): New.
470 (parse_ld_annotation): New.
471 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
472 Introduce TLS relocations.
473 (parse_d12, parse_s12, parse_u12): Likewise.
474 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
475 (parse_call_label, print_at): New.
476
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HPN
4772004-12-21 Mikael Starvik <starvik@axis.com>
478
479 * cris.cpu (cris-set-mem): Correct integral write semantics.
480
68800d83
HPN
4812004-11-29 Hans-Peter Nilsson <hp@axis.com>
482
483 * cris.cpu: New file.
484
4bd1d37b
NC
4852004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
486
487 * iq2000.cpu: Added quotes around macro arguments so that they
488 will work with newer versions of guile.
489
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NC
4902004-10-27 Nick Clifton <nickc@redhat.com>
491
492 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
493 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
494 operand.
495 * iq2000.cpu (dnop index): Rename to _index to avoid complications
496 with guile.
497
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4982004-08-27 Richard Sandiford <rsandifo@redhat.com>
499
500 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
501
dc4c54bb
NC
5022004-05-15 Nick Clifton <nickc@redhat.com>
503
504 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
505
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NC
5062004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
507
508 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
509
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RS
5102004-03-01 Richard Sandiford <rsandifo@redhat.com>
511
512 * frv.cpu (define-arch frv): Add fr450 mach.
513 (define-mach fr450): New.
514 (define-model fr450): New. Add profile units to every fr450 insn.
515 (define-attr UNIT): Add MDCUTSSI.
516 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
517 (define-attr AUDIO): New boolean.
518 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
519 (f-LRA-null, f-TLBPR-null): New fields.
520 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
521 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
522 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
523 (LRA-null, TLBPR-null): New macros.
524 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
525 (load-real-address): New macro.
526 (lrai, lrad, tlbpr): New instructions.
527 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
528 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
529 (mdcutssi): Change UNIT attribute to MDCUTSSI.
530 (media-low-clear-semantics, media-scope-limit-semantics)
531 (media-quad-limit, media-quad-shift): New macros.
532 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
533 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
534 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
535 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
536 (fr450_unit_mapping): New array.
537 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
538 for new MDCUTSSI unit.
539 (fr450_check_insn_major_constraints): New function.
540 (check_insn_major_constraints): Use it.
541
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5422004-03-01 Richard Sandiford <rsandifo@redhat.com>
543
544 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
545 (scutss): Change unit to I0.
546 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
547 (mqsaths): Fix FR400-MAJOR categorization.
548 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
549 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
550 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
551 combinations.
552
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5532004-03-01 Richard Sandiford <rsandifo@redhat.com>
554
555 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
556 (rstb, rsth, rst, rstd, rstq): Delete.
557 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
558
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5592004-02-23 Nick Clifton <nickc@redhat.com>
560
561 * Apply these patches from Renesas:
562
563 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
564
565 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
566 disassembling codes for 0x*2 addresses.
567
568 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
569
570 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
571
572 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
573
574 * cpu/m32r.cpu : Add new model m32r2.
575 Add new instructions.
576 Replace occurrances of 'Mitsubishi' with 'Renesas'.
577 Changed PIPE attr of push from O to OS.
578 Care for Little-endian of M32R.
579 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
580 Care for Little-endian of M32R.
581 (parse_slo16): signed extension for value.
582
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5832004-02-20 Andrew Cagney <cagney@redhat.com>
584
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AC
585 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
586 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
587
299d901c
AC
588 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
589 written by Ben Elliston.
590
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RS
5912004-01-14 Richard Sandiford <rsandifo@redhat.com>
592
593 * frv.cpu (UNIT): Add IACC.
594 (iacc-multiply-r-r): Use it.
595 * frv.opc (fr400_unit_mapping): Add entry for IACC.
596 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
597
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5982004-01-06 Alexandre Oliva <aoliva@redhat.com>
599
600 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
601 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
602 cut&paste errors in shifting/truncating numerical operands.
603 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
604 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
605 (parse_uslo16): Likewise.
606 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
607 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
608 (parse_s12): Likewise.
609 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
610 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
611 (parse_uslo16): Likewise.
612 (parse_uhi16): Parse gothi and gotfuncdeschi.
613 (parse_d12): Parse got12 and gotfuncdesc12.
614 (parse_s12): Likewise.
615
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DB
6162003-10-10 Dave Brolley <brolley@redhat.com>
617
618 * frv.cpu (dnpmop): New p-macro.
619 (GRdoublek): Use dnpmop.
620 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
621 (store-double-r-r): Use (.sym regtype doublek).
622 (r-store-double): Ditto.
623 (store-double-r-r-u): Ditto.
624 (conditional-store-double): Ditto.
625 (conditional-store-double-u): Ditto.
626 (store-double-r-simm): Ditto.
627 (fmovs): Assign to UNIT FMALL.
628
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DB
6292003-10-06 Dave Brolley <brolley@redhat.com>
630
631 * frv.cpu, frv.opc: Add support for fr550.
632
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DB
6332003-09-24 Dave Brolley <brolley@redhat.com>
634
635 * frv.cpu (u-commit): New modelling unit for fr500.
636 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
637 (commit-r): Use u-commit model for fr500.
638 (commit): Ditto.
639 (conditional-float-binary-op): Take profiling data as an argument.
640 Update callers.
641 (ne-float-binary-op): Ditto.
642
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MS
6432003-09-19 Michael Snyder <msnyder@redhat.com>
644
645 * frv.cpu (nldqi): Delete unimplemented instruction.
646
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DB
6472003-09-12 Dave Brolley <brolley@redhat.com>
648
649 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
650 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
651 frv_ref_SI to get input register referenced for profiling.
652 (clear-ne-flag-all): Pass insn profiling in as an argument.
653 (clrgr,clrfr,clrga,clrfa): Add profiling information.
654
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MS
6552003-09-11 Michael Snyder <msnyder@redhat.com>
656
657 * frv.cpu: Typographical corrections.
658
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DB
6592003-09-09 Dave Brolley <brolley@redhat.com>
660
661 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
662 (conditional-media-dual-complex, media-quad-complex): Likewise.
663
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DB
6642003-09-04 Dave Brolley <brolley@redhat.com>
665
666 * frv.cpu (register-transfer): Pass in all attributes in on argument.
667 Update all callers.
668 (conditional-register-transfer): Ditto.
669 (cache-preload): Ditto.
670 (floating-point-conversion): Ditto.
671 (floating-point-neg): Ditto.
672 (float-abs): Ditto.
673 (float-binary-op-s): Ditto.
674 (conditional-float-binary-op): Ditto.
675 (ne-float-binary-op): Ditto.
676 (float-dual-arith): Ditto.
677 (ne-float-dual-arith): Ditto.
678
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6792003-09-03 Dave Brolley <brolley@redhat.com>
680
681 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
682 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
683 MCLRACC-1.
684 (A): Removed operand.
685 (A0,A1): New operands replace operand A.
686 (mnop): Now a real insn
687 (mclracc): Removed insn.
688 (mclracc-0, mclracc-1): New insns replace mclracc.
689 (all insns): Use new UNIT attributes.
690
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NC
6912003-08-21 Nick Clifton <nickc@redhat.com>
692
693 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
694 and u-media-dual-btoh with output parameter.
695 (cmbtoh): Add profiling hack.
696
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NC
6972003-08-19 Michael Snyder <msnyder@redhat.com>
698
699 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
700
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7012003-06-10 Doug Evans <dje@sebabeach.org>
702
703 * frv.cpu: Add IDOC attribute.
704
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7052003-06-06 Andrew Cagney <cagney@redhat.com>
706
707 Contributed by Red Hat.
708 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
709 Stan Cox, and Frank Ch. Eigler.
710 * iq2000.opc: New file. Written by Ben Elliston, Frank
711 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
712 * iq2000m.cpu: New file. Written by Jeff Johnston.
713 * iq10.cpu: New file. Written by Jeff Johnston.
714
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NC
7152003-06-05 Nick Clifton <nickc@redhat.com>
716
717 * frv.cpu (FRintieven): New operand. An even-numbered only
718 version of the FRinti operand.
719 (FRintjeven): Likewise for FRintj.
720 (FRintkeven): Likewise for FRintk.
721 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
722 media-quad-arith-sat-semantics, media-quad-arith-sat,
723 conditional-media-quad-arith-sat, mdunpackh,
724 media-quad-multiply-semantics, media-quad-multiply,
725 conditional-media-quad-multiply, media-quad-complex-i,
726 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
727 conditional-media-quad-multiply-acc, munpackh,
728 media-quad-multiply-cross-acc-semantics, mdpackh,
729 media-quad-multiply-cross-acc, mbtoh-semantics,
730 media-quad-cross-multiply-cross-acc-semantics,
731 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
732 media-quad-cross-multiply-acc-semantics, cmbtoh,
733 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
734 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
735 cmhtob): Use new operands.
736 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 737 (parse_even_register): New function.
36c3ae24 738
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7392003-06-03 Nick Clifton <nickc@redhat.com>
740
741 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
742 immediate value not unsigned.
743
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7442003-06-03 Andrew Cagney <cagney@redhat.com>
745
746 Contributed by Red Hat.
747 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
748 and Eric Christopher.
749 * frv.opc: New file. Written by Catherine Moore, and Dave
750 Brolley.
751 * simplify.inc: New file. Written by Doug Evans.
752
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7532003-05-02 Andrew Cagney <cagney@redhat.com>
754
755 * New file.
756
757\f
758Local Variables:
759mode: change-log
760left-margin: 8
761fill-column: 74
762version-control: never
763End:
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