* m32r.cpu (sth-plus): Fix address mode and calculation.
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
ab5f875d
DE
12009-09-23 Doug Evans <dje@sebabeach.org>
2
3 * m32r.cpu (sth-plus): Fix address mode and calculation.
4 (stb-plus): Ditto.
5 (clrpsw): Fix mask calculation.
6 (bset, bclr, btst): Make mode in bit calculation match expression.
7
8 * xc16x.cpu (rtl-version): Set to 0.8.
9 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
10 make uppercase. Remove unnecessary name-prefix spec.
11 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
12 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
13 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
14 (h-cr): New hardware.
15 (muls): Comment out parts that won't compile, add fixme.
16 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
17 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
18 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
19
0aaaf7c3
DE
202009-07-16 Doug Evans <dje@sebabeach.org>
21
22 * cpu/simplify.inc (*): One line doc strings don't need \n.
23 (df): Invoke define-full-ifield instead of claiming it's an alias.
24 (dno): Define.
25 (dnop): Mark as deprecated.
26
1998a8e0
AM
272009-06-22 Alan Modra <amodra@bigpond.net.au>
28
29 * m32c.opc (parse_lab_5_3): Use correct enum.
30
6347aad8
HPN
312009-01-07 Hans-Peter Nilsson <hp@axis.com>
32
33 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
34 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
35 (media-arith-sat-semantics): Explicitly sign- or zero-extend
36 arguments of "operation" to DI using "mode" and the new pmacros.
37
2c06b7a6
HPN
382009-01-03 Hans-Peter Nilsson <hp@axis.com>
39
40 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
41 of number 2, PID.
42
84e94c90
NC
432008-12-23 Jon Beniston <jon@beniston.com>
44
45 * lm32.cpu: New file.
46 * lm32.opc: New file.
47
90518ff4
AM
482008-01-29 Alan Modra <amodra@bigpond.net.au>
49
50 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
51 to source.
52
a69f60de
HPN
532007-10-22 Hans-Peter Nilsson <hp@axis.com>
54
55 * cris.cpu (movs, movu): Use result of extension operation when
56 updating flags.
57
9b201bb5
NC
582007-07-04 Nick Clifton <nickc@redhat.com>
59
60 * cris.cpu: Update copyright notice to refer to GPLv3.
61 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
62 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
63 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
64 xc16x.opc: Likewise.
65 * iq2000.cpu: Fix copyright notice to refer to FSF.
66
53289dcd
MS
672007-04-30 Mark Salter <msalter@sadr.localdomain>
68
69 * frv.cpu (spr-names): Support new coprocessor SPR registers.
70
f6da2ec2
NC
712007-04-20 Nick Clifton <nickc@redhat.com>
72
73 * xc16x.cpu: Restore after accidentally overwriting this file with
74 xc16x.opc.
75
144f4bc6
DD
762007-03-29 DJ Delorie <dj@redhat.com>
77
78 * m32c.cpu (Imm-8-s4n): Fix print hook.
79 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
80 (arith-jnz-imm4-dst-defn): Make relaxable.
81 (arith-jnz16-imm4-dst-defn): Fix encodings.
82
75b06e7b
DD
832007-03-20 DJ Delorie <dj@redhat.com>
84
85 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
86 mem20): New.
87 (src16-16-20-An-relative-*): New.
88 (dst16-*-20-An-relative-*): New.
89 (dst16-16-16sa-*): New
90 (dst16-16-16ar-*): New
91 (dst32-16-16sa-Unprefixed-*): New
92 (jsri): Fix operands.
93 (setzx): Fix encoding.
94
a5da764d
AM
952007-03-08 Alan Modra <amodra@bigpond.net.au>
96
97 * m32r.opc: Formatting.
98
b497d0b0
NC
992006-05-22 Nick Clifton <nickc@redhat.com>
100
101 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
102
e78efa90
DD
1032006-04-10 DJ Delorie <dj@redhat.com>
104
105 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
106 decides if this function accepts symbolic constants or not.
107 (parse_signed_bitbase): Likewise.
108 (parse_unsigned_bitbase8): Pass the new parameter.
109 (parse_unsigned_bitbase11): Likewise.
110 (parse_unsigned_bitbase16): Likewise.
111 (parse_unsigned_bitbase19): Likewise.
112 (parse_unsigned_bitbase27): Likewise.
113 (parse_signed_bitbase8): Likewise.
114 (parse_signed_bitbase11): Likewise.
115 (parse_signed_bitbase19): Likewise.
116
8d0e2679
DD
1172006-03-13 DJ Delorie <dj@redhat.com>
118
43aa3bb1
DD
119 * m32c.cpu (Bit3-S): New.
120 (btst:s): New.
121 * m32c.opc (parse_bit3_S): New.
122
8d0e2679
DD
123 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
124 (btst): Add optional :G suffix for MACH32.
125 (or.b:S): New.
126 (pop.w:G): Add optional :G suffix for MACH16.
127 (push.b.imm): Fix syntax.
128
253d272c
DD
1292006-03-10 DJ Delorie <dj@redhat.com>
130
131 * m32c.cpu (mul.l): New.
132 (mulu.l): New.
133
c7d41dc5
NC
1342006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
135
136 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
137 an error message otherwise.
138 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
139 Fix up comments to correctly describe the functions.
140
6772dd07
DD
1412006-02-24 DJ Delorie <dj@redhat.com>
142
143 * m32c.cpu (RL_TYPE): New attribute, with macros.
144 (Lab-8-24): Add RELAX.
145 (unary-insn-defn-g, binary-arith-imm-dst-defn,
146 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
147 (binary-arith-src-dst-defn): Add 2ADDR attribute.
148 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
149 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
150 attribute.
151 (jsri16, jsri32): Add 1ADDR attribute.
152 (jsr32.w, jsr32.a): Add JUMP attribute.
153
d70c5fc7
NC
1542006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
155 Anil Paranjape <anilp1@kpitcummins.com>
156 Shilin Shakti <shilins@kpitcummins.com>
157
158 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
159 description.
160 * xc16x.opc: New file containing supporting XC16C routines.
161
8536c657
NC
1622006-02-10 Nick Clifton <nickc@redhat.com>
163
164 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
165
458f7770
DD
1662006-01-06 DJ Delorie <dj@redhat.com>
167
168 * m32c.cpu (mov.w:q): Fix mode.
169 (push32.b.imm): Likewise, for the comment.
170
d031aafb
NS
1712005-12-16 Nathan Sidwell <nathan@codesourcery.com>
172
173 Second part of ms1 to mt renaming.
174 * mt.cpu (define-arch, define-isa): Set name to mt.
175 (define-mach): Adjust.
176 * mt.opc (CGEN_ASM_HASH): Update.
177 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
178 (parse_loopsize, parse_imm16): Adjust.
179
eda87aba
DD
1802005-12-13 DJ Delorie <dj@redhat.com>
181
182 * m32c.cpu (jsri): Fix order so register names aren't treated as
183 symbols.
184 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
185 indexwd, indexws): Fix encodings.
186
4970f871
NS
1872005-12-12 Nathan Sidwell <nathan@codesourcery.com>
188
189 * mt.cpu: Rename from ms1.cpu.
190 * mt.opc: Rename from ms1.opc.
191
48ad8298
HPN
1922005-12-06 Hans-Peter Nilsson <hp@axis.com>
193
194 * cris.cpu (simplecris-common-writable-specregs)
195 (simplecris-common-readable-specregs): Split from
196 simplecris-common-specregs. All users changed.
197 (cris-implemented-writable-specregs-v0)
198 (cris-implemented-readable-specregs-v0): Similar from
199 cris-implemented-specregs-v0.
200 (cris-implemented-writable-specregs-v3)
201 (cris-implemented-readable-specregs-v3)
202 (cris-implemented-writable-specregs-v8)
203 (cris-implemented-readable-specregs-v8)
204 (cris-implemented-writable-specregs-v10)
205 (cris-implemented-readable-specregs-v10)
206 (cris-implemented-writable-specregs-v32)
207 (cris-implemented-readable-specregs-v32): Similar.
208 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
209 insns and specializations.
210
6f84a2a6
NS
2112005-11-08 Nathan Sidwell <nathan@codesourcery.com>
212
213 Add ms2
214 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
215 model.
216 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
217 f-cb2incr, f-rc3): New fields.
218 (LOOP): New instruction.
219 (JAL-HAZARD): New hazard.
220 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
221 New operands.
222 (mul, muli, dbnz, iflush): Enable for ms2
223 (jal, reti): Has JAL-HAZARD.
224 (ldctxt, ldfb, stfb): Only ms1.
225 (fbcb): Only ms1,ms1-003.
226 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
227 fbcbincrs, mfbcbincrs): Enable for ms2.
228 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
229 * ms1.opc (parse_loopsize): New.
230 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
231 (print_pcrel): New.
232
95b96521
DB
2332005-10-28 Dave Brolley <brolley@redhat.com>
234
235 Contribute the following change:
236 2003-09-24 Dave Brolley <brolley@redhat.com>
237
238 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
239 CGEN_ATTR_VALUE_TYPE.
240 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
241 Use cgen_bitset_intersect_p.
242
c6552317
DD
2432005-10-27 DJ Delorie <dj@redhat.com>
244
245 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
246 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
247 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
248 imm operand is needed.
249 (adjnz, sbjnz): Pass the right operands.
250 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
251 unary-insn): Add -g variants for opcodes that need to support :G.
252 (not.BW:G, push.BW:G): Call it.
253 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
254 stzx16-imm8-imm8-abs16): Fix operand typos.
255 * m32c.opc (m32c_asm_hash): Support bnCND.
256 (parse_signed4n, print_signed4n): New.
257
f75eb1c0
DD
2582005-10-26 DJ Delorie <dj@redhat.com>
259
260 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
261 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
262 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
263 dsp8[sp] is signed.
264 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
265 (mov.BW:S r0,r1): Fix typo r1l->r1.
266 (tst): Allow :G suffix.
267 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
268
e277c00b
AM
2692005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
270
271 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
272
92e0a941
DD
2732005-10-25 DJ Delorie <dj@redhat.com>
274
275 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
276 making one a macro of the other.
277
a1a280bb
DD
2782005-10-21 DJ Delorie <dj@redhat.com>
279
280 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
281 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
282 indexld, indexls): .w variants have `1' bit.
283 (rot32.b): QI, not SI.
284 (rot32.w): HI, not SI.
285 (xchg16): HI for .w variant.
286
e74eb924
NC
2872005-10-19 Nick Clifton <nickc@redhat.com>
288
289 * m32r.opc (parse_slo16): Fix bad application of previous patch.
290
5e03663f
NC
2912005-10-18 Andreas Schwab <schwab@suse.de>
292
293 * m32r.opc (parse_slo16): Better version of previous patch.
294
ab7c9a26
NC
2952005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
296
297 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
298 size.
299
fd54057a
DD
3002005-07-25 DJ Delorie <dj@redhat.com>
301
302 * m32c.opc (parse_unsigned8): Add %dsp8().
303 (parse_signed8): Add %hi8().
304 (parse_unsigned16): Add %dsp16().
305 (parse_signed16): Add %lo16() and %hi16().
306 (parse_lab_5_3): Make valuep a bfd_vma *.
307
85da3a56
NC
3082005-07-18 Nick Clifton <nickc@redhat.com>
309
310 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
311 components.
312 (f-lab32-jmp-s): Fix insertion sequence.
313 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
314 (Dsp-40-s8): Make parameter be signed.
315 (Dsp-40-s16): Likewise.
316 (Dsp-48-s8): Likewise.
317 (Dsp-48-s16): Likewise.
318 (Imm-13-u3): Likewise. (Despite its name!)
319 (BitBase16-16-s8): Make the parameter be unsigned.
320 (BitBase16-8-u11-S): Likewise.
321 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
322 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
323 relaxation.
324
325 * m32c.opc: Fix formatting.
326 Use safe-ctype.h instead of ctype.h
327 Move duplicated code sequences into a macro.
328 Fix compile time warnings about signedness mismatches.
329 Remove dead code.
330 (parse_lab_5_3): New parser function.
331
aa260854
JB
3322005-07-16 Jim Blandy <jimb@redhat.com>
333
334 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
335 to represent isa sets.
336
0a665bfd
JB
3372005-07-15 Jim Blandy <jimb@redhat.com>
338
339 * m32c.cpu, m32c.opc: Fix copyright.
340
49f58d10
JB
3412005-07-14 Jim Blandy <jimb@redhat.com>
342
343 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
344
0e6b69be
AM
3452005-07-14 Alan Modra <amodra@bigpond.net.au>
346
347 * ms1.opc (print_dollarhex): Correct format string.
348
f9210e37
AM
3492005-07-06 Alan Modra <amodra@bigpond.net.au>
350
351 * iq2000.cpu: Include from binutils cpu dir.
352
3ec2b351
NC
3532005-07-05 Nick Clifton <nickc@redhat.com>
354
355 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
356 unsigned in order to avoid compile time warnings about sign
357 conflicts.
358
359 * ms1.opc (parse_*): Likewise.
360 (parse_imm16): Use a "void *" as it is passed both signed and
361 unsigned arguments.
362
47b0e7ad
NC
3632005-07-01 Nick Clifton <nickc@redhat.com>
364
365 * frv.opc: Update to ISO C90 function declaration style.
366 * iq2000.opc: Likewise.
367 * m32r.opc: Likewise.
368 * sh.opc: Likewise.
369
b081650b
DB
3702005-06-15 Dave Brolley <brolley@redhat.com>
371
372 Contributed by Red Hat.
373 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
374 * ms1.opc: New file. Written by Stan Cox.
375
e172dbf8
NC
3762005-05-10 Nick Clifton <nickc@redhat.com>
377
378 * Update the address and phone number of the FSF organization in
379 the GPL notices in the following files:
380 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
381 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
382 sh64-media.cpu, simplify.inc
383
b2d52a48
AM
3842005-02-24 Alan Modra <amodra@bigpond.net.au>
385
386 * frv.opc (parse_A): Warning fix.
387
33b71eeb
NC
3882005-02-23 Nick Clifton <nickc@redhat.com>
389
390 * frv.opc: Fixed compile time warnings about differing signed'ness
391 of pointers passed to functions.
392 * m32r.opc: Likewise.
393
bc18c937
NC
3942005-02-11 Nick Clifton <nickc@redhat.com>
395
396 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
397 'bfd_vma *' in order avoid compile time warning message.
398
46da9a19
HPN
3992005-01-28 Hans-Peter Nilsson <hp@axis.com>
400
401 * cris.cpu (mstep): Add missing insn.
402
90219bd0
AO
4032005-01-25 Alexandre Oliva <aoliva@redhat.com>
404
405 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
406 * frv.cpu: Add support for TLS annotations in loads and calll.
407 * frv.opc (parse_symbolic_address): New.
408 (parse_ldd_annotation): New.
409 (parse_call_annotation): New.
410 (parse_ld_annotation): New.
411 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
412 Introduce TLS relocations.
413 (parse_d12, parse_s12, parse_u12): Likewise.
414 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
415 (parse_call_label, print_at): New.
416
c3d75c30
HPN
4172004-12-21 Mikael Starvik <starvik@axis.com>
418
419 * cris.cpu (cris-set-mem): Correct integral write semantics.
420
68800d83
HPN
4212004-11-29 Hans-Peter Nilsson <hp@axis.com>
422
423 * cris.cpu: New file.
424
4bd1d37b
NC
4252004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
426
427 * iq2000.cpu: Added quotes around macro arguments so that they
428 will work with newer versions of guile.
429
4030fa5a
NC
4302004-10-27 Nick Clifton <nickc@redhat.com>
431
432 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
433 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
434 operand.
435 * iq2000.cpu (dnop index): Rename to _index to avoid complications
436 with guile.
437
ac28a1cb
RS
4382004-08-27 Richard Sandiford <rsandifo@redhat.com>
439
440 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
441
dc4c54bb
NC
4422004-05-15 Nick Clifton <nickc@redhat.com>
443
444 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
445
f4453dfa
NC
4462004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
447
448 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
449
676a64f4
RS
4502004-03-01 Richard Sandiford <rsandifo@redhat.com>
451
452 * frv.cpu (define-arch frv): Add fr450 mach.
453 (define-mach fr450): New.
454 (define-model fr450): New. Add profile units to every fr450 insn.
455 (define-attr UNIT): Add MDCUTSSI.
456 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
457 (define-attr AUDIO): New boolean.
458 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
459 (f-LRA-null, f-TLBPR-null): New fields.
460 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
461 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
462 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
463 (LRA-null, TLBPR-null): New macros.
464 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
465 (load-real-address): New macro.
466 (lrai, lrad, tlbpr): New instructions.
467 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
468 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
469 (mdcutssi): Change UNIT attribute to MDCUTSSI.
470 (media-low-clear-semantics, media-scope-limit-semantics)
471 (media-quad-limit, media-quad-shift): New macros.
472 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
473 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
474 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
475 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
476 (fr450_unit_mapping): New array.
477 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
478 for new MDCUTSSI unit.
479 (fr450_check_insn_major_constraints): New function.
480 (check_insn_major_constraints): Use it.
481
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4822004-03-01 Richard Sandiford <rsandifo@redhat.com>
483
484 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
485 (scutss): Change unit to I0.
486 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
487 (mqsaths): Fix FR400-MAJOR categorization.
488 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
489 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
490 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
491 combinations.
492
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4932004-03-01 Richard Sandiford <rsandifo@redhat.com>
494
495 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
496 (rstb, rsth, rst, rstd, rstq): Delete.
497 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
498
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4992004-02-23 Nick Clifton <nickc@redhat.com>
500
501 * Apply these patches from Renesas:
502
503 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
504
505 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
506 disassembling codes for 0x*2 addresses.
507
508 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
509
510 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
511
512 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
513
514 * cpu/m32r.cpu : Add new model m32r2.
515 Add new instructions.
516 Replace occurrances of 'Mitsubishi' with 'Renesas'.
517 Changed PIPE attr of push from O to OS.
518 Care for Little-endian of M32R.
519 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
520 Care for Little-endian of M32R.
521 (parse_slo16): signed extension for value.
522
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5232004-02-20 Andrew Cagney <cagney@redhat.com>
524
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525 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
526 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
527
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528 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
529 written by Ben Elliston.
530
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5312004-01-14 Richard Sandiford <rsandifo@redhat.com>
532
533 * frv.cpu (UNIT): Add IACC.
534 (iacc-multiply-r-r): Use it.
535 * frv.opc (fr400_unit_mapping): Add entry for IACC.
536 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
537
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5382004-01-06 Alexandre Oliva <aoliva@redhat.com>
539
540 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
541 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
542 cut&paste errors in shifting/truncating numerical operands.
543 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
544 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
545 (parse_uslo16): Likewise.
546 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
547 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
548 (parse_s12): Likewise.
549 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
550 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
551 (parse_uslo16): Likewise.
552 (parse_uhi16): Parse gothi and gotfuncdeschi.
553 (parse_d12): Parse got12 and gotfuncdesc12.
554 (parse_s12): Likewise.
555
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5562003-10-10 Dave Brolley <brolley@redhat.com>
557
558 * frv.cpu (dnpmop): New p-macro.
559 (GRdoublek): Use dnpmop.
560 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
561 (store-double-r-r): Use (.sym regtype doublek).
562 (r-store-double): Ditto.
563 (store-double-r-r-u): Ditto.
564 (conditional-store-double): Ditto.
565 (conditional-store-double-u): Ditto.
566 (store-double-r-simm): Ditto.
567 (fmovs): Assign to UNIT FMALL.
568
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5692003-10-06 Dave Brolley <brolley@redhat.com>
570
571 * frv.cpu, frv.opc: Add support for fr550.
572
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5732003-09-24 Dave Brolley <brolley@redhat.com>
574
575 * frv.cpu (u-commit): New modelling unit for fr500.
576 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
577 (commit-r): Use u-commit model for fr500.
578 (commit): Ditto.
579 (conditional-float-binary-op): Take profiling data as an argument.
580 Update callers.
581 (ne-float-binary-op): Ditto.
582
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5832003-09-19 Michael Snyder <msnyder@redhat.com>
584
585 * frv.cpu (nldqi): Delete unimplemented instruction.
586
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5872003-09-12 Dave Brolley <brolley@redhat.com>
588
589 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
590 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
591 frv_ref_SI to get input register referenced for profiling.
592 (clear-ne-flag-all): Pass insn profiling in as an argument.
593 (clrgr,clrfr,clrga,clrfa): Add profiling information.
594
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5952003-09-11 Michael Snyder <msnyder@redhat.com>
596
597 * frv.cpu: Typographical corrections.
598
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5992003-09-09 Dave Brolley <brolley@redhat.com>
600
601 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
602 (conditional-media-dual-complex, media-quad-complex): Likewise.
603
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6042003-09-04 Dave Brolley <brolley@redhat.com>
605
606 * frv.cpu (register-transfer): Pass in all attributes in on argument.
607 Update all callers.
608 (conditional-register-transfer): Ditto.
609 (cache-preload): Ditto.
610 (floating-point-conversion): Ditto.
611 (floating-point-neg): Ditto.
612 (float-abs): Ditto.
613 (float-binary-op-s): Ditto.
614 (conditional-float-binary-op): Ditto.
615 (ne-float-binary-op): Ditto.
616 (float-dual-arith): Ditto.
617 (ne-float-dual-arith): Ditto.
618
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6192003-09-03 Dave Brolley <brolley@redhat.com>
620
621 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
622 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
623 MCLRACC-1.
624 (A): Removed operand.
625 (A0,A1): New operands replace operand A.
626 (mnop): Now a real insn
627 (mclracc): Removed insn.
628 (mclracc-0, mclracc-1): New insns replace mclracc.
629 (all insns): Use new UNIT attributes.
630
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6312003-08-21 Nick Clifton <nickc@redhat.com>
632
633 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
634 and u-media-dual-btoh with output parameter.
635 (cmbtoh): Add profiling hack.
636
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6372003-08-19 Michael Snyder <msnyder@redhat.com>
638
639 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
640
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6412003-06-10 Doug Evans <dje@sebabeach.org>
642
643 * frv.cpu: Add IDOC attribute.
644
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6452003-06-06 Andrew Cagney <cagney@redhat.com>
646
647 Contributed by Red Hat.
648 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
649 Stan Cox, and Frank Ch. Eigler.
650 * iq2000.opc: New file. Written by Ben Elliston, Frank
651 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
652 * iq2000m.cpu: New file. Written by Jeff Johnston.
653 * iq10.cpu: New file. Written by Jeff Johnston.
654
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6552003-06-05 Nick Clifton <nickc@redhat.com>
656
657 * frv.cpu (FRintieven): New operand. An even-numbered only
658 version of the FRinti operand.
659 (FRintjeven): Likewise for FRintj.
660 (FRintkeven): Likewise for FRintk.
661 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
662 media-quad-arith-sat-semantics, media-quad-arith-sat,
663 conditional-media-quad-arith-sat, mdunpackh,
664 media-quad-multiply-semantics, media-quad-multiply,
665 conditional-media-quad-multiply, media-quad-complex-i,
666 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
667 conditional-media-quad-multiply-acc, munpackh,
668 media-quad-multiply-cross-acc-semantics, mdpackh,
669 media-quad-multiply-cross-acc, mbtoh-semantics,
670 media-quad-cross-multiply-cross-acc-semantics,
671 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
672 media-quad-cross-multiply-acc-semantics, cmbtoh,
673 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
674 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
675 cmhtob): Use new operands.
676 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 677 (parse_even_register): New function.
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6792003-06-03 Nick Clifton <nickc@redhat.com>
680
681 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
682 immediate value not unsigned.
683
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6842003-06-03 Andrew Cagney <cagney@redhat.com>
685
686 Contributed by Red Hat.
687 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
688 and Eric Christopher.
689 * frv.opc: New file. Written by Catherine Moore, and Dave
690 Brolley.
691 * simplify.inc: New file. Written by Doug Evans.
692
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6932003-05-02 Andrew Cagney <cagney@redhat.com>
694
695 * New file.
696
697\f
698Local Variables:
699mode: change-log
700left-margin: 8
701fill-column: 74
702version-control: never
703End:
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