projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[gdb/testsuite] Fix unterminated string in gdb.objc/basicclass.exp
[deliverable/binutils-gdb.git] / cpu / ChangeLog
CommitLineData
a2e4218f
SH		 12019-06-13 Stafford Horne <shorne@gmail.com>
2
3 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
4
eb212c84
SH		 52019-06-13 Stafford Horne <shorne@gmail.com>
6
7 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
8 (l-adrp): Improve comment.
9
d3ad6278
SH		 102019-06-13 Stafford Horne <shorne@gmail.com>
11
12 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
13 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
14 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
15 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
16 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
17 float-setflag-unordered-symantics): New pmacro for instruction
18 symantics.
19 (float-setflag-insn): Update to use float-setflag-insn-base.
20 (float-setflag-unordered-insn): New pmacro for generating instructions.
21
6ce26ac7
SH		 222019-06-13 Andrey Bacherov <avbacherov@opencores.org>
23 Stafford Horne <shorne@gmail.com>
24
25 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
26 (ORFPX-MACHS): Removed pmacro.
27 * or1k.opc (or1k_cgen_insn_supported): New function.
28 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
29 (parse_regpair, print_regpair): New functions.
30 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
31 and add comments.
32 (h-fdr): Update comment to indicate or64.
33 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
34 (h-fd32r): New hardware for 64-bit fpu registers.
35 (h-i64r): New hardware for 64-bit int registers.
36 * or1korbis.cpu (f-resv-8-1): New field.
37 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
38 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
39 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
40 (h-roff1): New hardware.
41 (double-field-and-ops mnemonic): New pmacro to generate operations
42 rDD32F, rAD32F, rBD32F, rDDI and rADI.
43 (float-regreg-insn): Update single precision generator to MACH
44 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
45 (float-setflag-insn): Update single precision generator to MACH
46 ORFPX32-MACHS. Fix double instructions from single to double
47 precision. Add generator for or32 64-bit instructions.
48 (float-cust-insn cust-num): Update single precision generator to MACH
49 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
50 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
51 ORFPX32-MACHS.
52 (lf-rem-d): Fix operation from mod to rem.
53 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
54 (lf-itof-d): Fix operands from single to double.
55 (lf-ftoi-d): Update operand mode from DI to WI.
56
ea195bb0
JM		 572019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
58
59 * bpf.cpu: New file.
60 * bpf.opc: Likewise.
61
f974f26c
NC		 622018-06-24 Nick Clifton <nickc@redhat.com>
63
64 2.32 branch created.
65
07f5f4c6
RH		 662018-10-05 Richard Henderson <rth@twiddle.net>
67 Stafford Horne <shorne@gmail.com>
68
69 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
70 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
71 (l-mul): Fix overflow support and indentation.
72 (l-mulu): Fix overflow support and indentation.
73 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
74 (l-div); Remove incorrect carry behavior.
75 (l-divu): Fix carry and overflow behavior.
76 (l-mac): Add overflow support.
77 (l-msb, l-msbu): Add carry and overflow support.
78
c8e98e36
SH		 792018-10-05 Richard Henderson <rth@twiddle.net>
80
81 * or1k.opc (parse_disp26): Add support for plta() relocations.
82 (parse_disp21): New function.
83 (or1k_rclass): New enum.
84 (or1k_rtype): New enum.
85 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
86 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
87 (parse_imm16): Add support for the new 21bit and 13bit relocations.
88 * or1korbis.cpu (f-disp26): Don't assume SI.
89 (f-disp21): New pc-relative 21-bit 13 shifted to right.
90 (insn-opcode): Add ADRP.
91 (l-adrp): New instruction.
92
1c4f3780
RH		 932018-10-05 Richard Henderson <rth@twiddle.net>
94
95 * or1k.opc: Add RTYPE_ enum.
96 (INVALID_STORE_RELOC): New string.
97 (or1k_imm16_relocs): New array array.
98 (parse_reloc): New static function that just does the parsing.
99 (parse_imm16): New static function for generic parsing.
100 (parse_simm16): Change to just call parse_imm16.
101 (parse_simm16_split): New function.
102 (parse_uimm16): Change to call parse_imm16.
103 (parse_uimm16_split): New function.
104 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
105 (uimm16-split): Change to use new uimm16_split.
106
67ce483b
AM		 1072018-07-24 Alan Modra <amodra@gmail.com>
108
109 PR 23430
110 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
111
84f9f8c3
AM		 1122018-05-09 Sebastian Rasmussen <sebras@gmail.com>
113
114 * or1kcommon.cpu (spr-reg-info): Typo fix.
115
a6743a54
AM		 1162018-03-03 Alan Modra <amodra@gmail.com>
117
118 * frv.opc: Include opintl.h.
119 (add_next_to_vliw): Use opcodes_error_handler to print error.
120 Standardize error message.
121 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
122
faf766e3
NC		 1232018-01-13 Nick Clifton <nickc@redhat.com>
124
125 2.30 branch created.
126
4ea0266c
SH		 1272017-03-15 Stafford Horne <shorne@gmail.com>
128
129 * or1kcommon.cpu: Add pc set semantics to also update ppc.
130
b781683b
AM		 1312016-10-06 Alan Modra <amodra@gmail.com>
132
133 * mep.opc (expand_string): Add fall through comment.
134
439baf71
AM		 1352016-03-03 Alan Modra <amodra@gmail.com>
136
137 * fr30.cpu (f-m4): Replace bogus comment with a better guess
138 at what is really going on.
139
62de1c63
AM		 1402016-03-02 Alan Modra <amodra@gmail.com>
141
142 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
143
b89807c6
AB		 1442016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
145
146 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
147 a constant to better align disassembler output.
148
018dc9be
SK		 1492014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
150
151 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
152
c151b1c6
AM		 1532014-06-12 Alan Modra <amodra@gmail.com>
154
155 * or1k.opc: Whitespace fixes.
156
999b995d
SK		 1572014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
158
159 * or1korbis.cpu (h-atomic-reserve): New hardware.
160 (h-atomic-address): Likewise.
161 (insn-opcode): Add opcodes for LWA and SWA.
162 (atomic-reserve): New operand.
163 (atomic-address): Likewise.
164 (l-lwa, l-swa): New instructions.
165 (l-lbs): Fix typo in comment.
166 (store-insn): Clear atomic reserve on store to atomic-address.
167 Fix register names in fmt field.
168
73589c9d
CS		 1692014-04-22 Christian Svensson <blue@cmd.nu>
170
171 * openrisc.cpu: Delete.
172 * openrisc.opc: Delete.
173 * or1k.cpu: New file.
174 * or1k.opc: New file.
175 * or1kcommon.cpu: New file.
176 * or1korbis.cpu: New file.
177 * or1korfpx.cpu: New file.
178
594d8fa8
MF		 1792013-12-07 Mike Frysinger <vapier@gentoo.org>
180
181 * epiphany.opc: Remove +x file mode.
182
87a8d6cb
NC		 1832013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
184
185 PR binutils/15241
186 * lm32.cpu (Control and status registers): Add CFG2, PSW,
187 TLBVADDR, TLBPADDR and TLBBADVADDR.
188
02a79b89
JR		 1892012-11-30 Oleg Raikhman <oleg@adapteva.com>
190 Joern Rennecke <joern.rennecke@embecosm.com>
191
192 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
193 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
194 (testset-insn): Add NO_DIS attribute to t.l.
195 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
196 (move-insns): Add NO-DIS attribute to cmov.l.
197 (op-mmr-movts): Add NO-DIS attribute to movts.l.
198 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
199 (op-rrr): Add NO-DIS attribute to .l.
200 (shift-rrr): Add NO-DIS attribute to .l.
201 (op-shift-rri): Add NO-DIS attribute to i32.l.
202 (bitrl, movtl): Add NO-DIS attribute.
203 (op-iextrrr): Add NO-DIS attribute to .l
204 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
205 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
206
a597d2d3
AM		 2072012-02-27 Alan Modra <amodra@gmail.com>
208
209 * mt.opc (print_dollarhex): Trim values to 32 bits.
210
5011093d
NC		 2112011-12-15 Nick Clifton <nickc@redhat.com>
212
213 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
214 hosts.
215
fd936b4c
JR		 2162011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
217
218 * epiphany.opc (parse_branch_addr): Fix type of valuep.
219 Cast value before printing it as a long.
220 (parse_postindex): Fix type of valuep.
221
cfb8c092
NC		 2222011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
223
224 * cpu/epiphany.cpu: New file.
225 * cpu/epiphany.opc: New file.
226
dc15e575
NC		 2272011-08-22 Nick Clifton <nickc@redhat.com>
228
229 * fr30.cpu: Newly contributed file.
230 * fr30.opc: Likewise.
231 * ip2k.cpu: Likewise.
232 * ip2k.opc: Likewise.
233 * mep-avc.cpu: Likewise.
234 * mep-avc2.cpu: Likewise.
235 * mep-c5.cpu: Likewise.
236 * mep-core.cpu: Likewise.
237 * mep-default.cpu: Likewise.
238 * mep-ext-cop.cpu: Likewise.
239 * mep-fmax.cpu: Likewise.
240 * mep-h1.cpu: Likewise.
241 * mep-ivc2.cpu: Likewise.
242 * mep-rhcop.cpu: Likewise.
243 * mep-sample-ucidsp.cpu: Likewise.
244 * mep.cpu: Likewise.
245 * mep.opc: Likewise.
246 * openrisc.cpu: Likewise.
247 * openrisc.opc: Likewise.
248 * xstormy16.cpu: Likewise.
249 * xstormy16.opc: Likewise.
250
9ccb8af9
AM		 2512010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
252
253 * frv.opc: #undef DEBUG.
254
21375995
DD		 2552010-07-03 DJ Delorie <dj@delorie.com>
256
257 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
258
5ff58fb0
DE		 2592010-02-11 Doug Evans <dje@sebabeach.org>
260
261 * m32r.cpu (HASH-PREFIX): Delete.
262 (duhpo, dshpo): New pmacros.
263 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
264 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
265 attribute, define with dshpo.
266 (uimm24): Delete HASH-PREFIX attribute.
267 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
268 (print_signed_with_hash_prefix): New function.
269 (print_unsigned_with_hash_prefix): New function.
270 * xc16x.cpu (dowh): New pmacro.
271 (upof16): Define with dowh, specify print handler.
272 (qbit, qlobit, qhibit): Ditto.
273 (upag16): Ditto.
274 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
275 (print_with_dot_prefix): New functions.
276 (print_with_pof_prefix, print_with_pag_prefix): New functions.
277
3fa5b97b
DE		 2782010-01-24 Doug Evans <dje@sebabeach.org>
279
280 * frv.cpu (floating-point-conversion): Update call to fp conv op.
281 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
282 conditional-floating-point-conversion, ne-floating-point-conversion,
283 float-parallel-mul-add-double-semantics): Ditto.
284
fe8afbc4
DE		 2852010-01-05 Doug Evans <dje@sebabeach.org>
286
287 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
288 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
289
caaf56fb
DE		 2902010-01-02 Doug Evans <dje@sebabeach.org>
291
292 * m32c.opc (parse_signed16): Fix typo.
293
91d6fa6a
NC		 2942009-12-11 Nick Clifton <nickc@redhat.com>
295
296 * frv.opc: Fix shadowed variable warnings.
297 * m32c.opc: Fix shadowed variable warnings.
298
ec84cc2b
DE		 2992009-11-14 Doug Evans <dje@sebabeach.org>
300
301 Must use VOID expression in VOID context.
302 * xc16x.cpu (mov4): Fix mode of `sequence'.
303 (mov9, mov10): Ditto.
304 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
305 (callr, callseg, calls, trap, rets, reti): Ditto.
306 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
307 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
308 (exts, exts1, extsr, extsr1, prior): Ditto.
309
ac1e9eca
DE		 3102009-10-23 Doug Evans <dje@sebabeach.org>
311
312 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
313 cgen-ops.h -> cgen/basic-ops.h.
314
b4744b17
AM		 3152009-09-25 Alan Modra <amodra@bigpond.net.au>
316
317 * m32r.cpu (stb-plus): Typo fix.
318
ab5f875d
DE		 3192009-09-23 Doug Evans <dje@sebabeach.org>
320
321 * m32r.cpu (sth-plus): Fix address mode and calculation.
322 (stb-plus): Ditto.
323 (clrpsw): Fix mask calculation.
324 (bset, bclr, btst): Make mode in bit calculation match expression.
325
326 * xc16x.cpu (rtl-version): Set to 0.8.
327 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
328 make uppercase. Remove unnecessary name-prefix spec.
329 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
330 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
331 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
332 (h-cr): New hardware.
333 (muls): Comment out parts that won't compile, add fixme.
334 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
335 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
336 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
337
0aaaf7c3
DE		 3382009-07-16 Doug Evans <dje@sebabeach.org>
339
340 * cpu/simplify.inc (*): One line doc strings don't need \n.
341 (df): Invoke define-full-ifield instead of claiming it's an alias.
342 (dno): Define.
343 (dnop): Mark as deprecated.
344
1998a8e0
AM		 3452009-06-22 Alan Modra <amodra@bigpond.net.au>
346
347 * m32c.opc (parse_lab_5_3): Use correct enum.
348
6347aad8
HPN		 3492009-01-07 Hans-Peter Nilsson <hp@axis.com>
350
351 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
352 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
353 (media-arith-sat-semantics): Explicitly sign- or zero-extend
354 arguments of "operation" to DI using "mode" and the new pmacros.
355
2c06b7a6
HPN		 3562009-01-03 Hans-Peter Nilsson <hp@axis.com>
357
358 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
359 of number 2, PID.
360
84e94c90
NC		 3612008-12-23 Jon Beniston <jon@beniston.com>
362
363 * lm32.cpu: New file.
364 * lm32.opc: New file.
365
90518ff4
AM		 3662008-01-29 Alan Modra <amodra@bigpond.net.au>
367
368 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
369 to source.
370
a69f60de
HPN		 3712007-10-22 Hans-Peter Nilsson <hp@axis.com>
372
373 * cris.cpu (movs, movu): Use result of extension operation when
374 updating flags.
375
9b201bb5
NC		 3762007-07-04 Nick Clifton <nickc@redhat.com>
377
378 * cris.cpu: Update copyright notice to refer to GPLv3.
379 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
380 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
381 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
382 xc16x.opc: Likewise.
383 * iq2000.cpu: Fix copyright notice to refer to FSF.
384
53289dcd
MS		 3852007-04-30 Mark Salter <msalter@sadr.localdomain>
386
387 * frv.cpu (spr-names): Support new coprocessor SPR registers.
388
f6da2ec2
NC		 3892007-04-20 Nick Clifton <nickc@redhat.com>
390
391 * xc16x.cpu: Restore after accidentally overwriting this file with
392 xc16x.opc.
393
144f4bc6
DD		 3942007-03-29 DJ Delorie <dj@redhat.com>
395
396 * m32c.cpu (Imm-8-s4n): Fix print hook.
397 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
398 (arith-jnz-imm4-dst-defn): Make relaxable.
399 (arith-jnz16-imm4-dst-defn): Fix encodings.
400
75b06e7b
DD		 4012007-03-20 DJ Delorie <dj@redhat.com>
402
403 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
404 mem20): New.
405 (src16-16-20-An-relative-*): New.
406 (dst16-*-20-An-relative-*): New.
407 (dst16-16-16sa-*): New
408 (dst16-16-16ar-*): New
409 (dst32-16-16sa-Unprefixed-*): New
410 (jsri): Fix operands.
411 (setzx): Fix encoding.
72f4393d 412
a5da764d
AM		 4132007-03-08 Alan Modra <amodra@bigpond.net.au>
414
415 * m32r.opc: Formatting.
416
b497d0b0
NC		 4172006-05-22 Nick Clifton <nickc@redhat.com>
418
419 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
420
e78efa90
DD		 4212006-04-10 DJ Delorie <dj@redhat.com>
422
423 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
424 decides if this function accepts symbolic constants or not.
425 (parse_signed_bitbase): Likewise.
426 (parse_unsigned_bitbase8): Pass the new parameter.
427 (parse_unsigned_bitbase11): Likewise.
428 (parse_unsigned_bitbase16): Likewise.
429 (parse_unsigned_bitbase19): Likewise.
430 (parse_unsigned_bitbase27): Likewise.
431 (parse_signed_bitbase8): Likewise.
432 (parse_signed_bitbase11): Likewise.
433 (parse_signed_bitbase19): Likewise.
72f4393d 434
8d0e2679
DD		 4352006-03-13 DJ Delorie <dj@redhat.com>
436
43aa3bb1
DD		 437 * m32c.cpu (Bit3-S): New.
438 (btst:s): New.
439 * m32c.opc (parse_bit3_S): New.
440
8d0e2679
DD		 441 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
442 (btst): Add optional :G suffix for MACH32.
443 (or.b:S): New.
444 (pop.w:G): Add optional :G suffix for MACH16.
445 (push.b.imm): Fix syntax.
446
253d272c
DD		 4472006-03-10 DJ Delorie <dj@redhat.com>
448
449 * m32c.cpu (mul.l): New.
450 (mulu.l): New.
451
c7d41dc5
NC		 4522006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
453
454 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
455 an error message otherwise.
456 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
457 Fix up comments to correctly describe the functions.
458
6772dd07
DD		 4592006-02-24 DJ Delorie <dj@redhat.com>
460
461 * m32c.cpu (RL_TYPE): New attribute, with macros.
462 (Lab-8-24): Add RELAX.
463 (unary-insn-defn-g, binary-arith-imm-dst-defn,
464 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
465 (binary-arith-src-dst-defn): Add 2ADDR attribute.
466 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
467 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
468 attribute.
469 (jsri16, jsri32): Add 1ADDR attribute.
470 (jsr32.w, jsr32.a): Add JUMP attribute.
72f4393d 471
d70c5fc7 4722006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
72f4393d
L		 473 Anil Paranjape <anilp1@kpitcummins.com>
474 Shilin Shakti <shilins@kpitcummins.com>
d70c5fc7
NC		 475
476 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
477 description.
478 * xc16x.opc: New file containing supporting XC16C routines.
479
8536c657
NC		 4802006-02-10 Nick Clifton <nickc@redhat.com>
481
482 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
483
458f7770
DD		 4842006-01-06 DJ Delorie <dj@redhat.com>
485
486 * m32c.cpu (mov.w:q): Fix mode.
487 (push32.b.imm): Likewise, for the comment.
488
d031aafb
NS		 4892005-12-16 Nathan Sidwell <nathan@codesourcery.com>
490
491 Second part of ms1 to mt renaming.
492 * mt.cpu (define-arch, define-isa): Set name to mt.
493 (define-mach): Adjust.
494 * mt.opc (CGEN_ASM_HASH): Update.
495 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
496 (parse_loopsize, parse_imm16): Adjust.
497
eda87aba
DD		 4982005-12-13 DJ Delorie <dj@redhat.com>
499
500 * m32c.cpu (jsri): Fix order so register names aren't treated as
501 symbols.
502 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
503 indexwd, indexws): Fix encodings.
504
4970f871
NS		 5052005-12-12 Nathan Sidwell <nathan@codesourcery.com>
506
507 * mt.cpu: Rename from ms1.cpu.
508 * mt.opc: Rename from ms1.opc.
509
48ad8298
HPN		 5102005-12-06 Hans-Peter Nilsson <hp@axis.com>
511
512 * cris.cpu (simplecris-common-writable-specregs)
513 (simplecris-common-readable-specregs): Split from
514 simplecris-common-specregs. All users changed.
515 (cris-implemented-writable-specregs-v0)
516 (cris-implemented-readable-specregs-v0): Similar from
517 cris-implemented-specregs-v0.
518 (cris-implemented-writable-specregs-v3)
519 (cris-implemented-readable-specregs-v3)
520 (cris-implemented-writable-specregs-v8)
521 (cris-implemented-readable-specregs-v8)
522 (cris-implemented-writable-specregs-v10)
523 (cris-implemented-readable-specregs-v10)
524 (cris-implemented-writable-specregs-v32)
525 (cris-implemented-readable-specregs-v32): Similar.
526 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
527 insns and specializations.
528
6f84a2a6
NS		 5292005-11-08 Nathan Sidwell <nathan@codesourcery.com>
530
531 Add ms2
532 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
533 model.
534 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
535 f-cb2incr, f-rc3): New fields.
536 (LOOP): New instruction.
537 (JAL-HAZARD): New hazard.
538 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
539 New operands.
540 (mul, muli, dbnz, iflush): Enable for ms2
541 (jal, reti): Has JAL-HAZARD.
542 (ldctxt, ldfb, stfb): Only ms1.
543 (fbcb): Only ms1,ms1-003.
544 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
545 fbcbincrs, mfbcbincrs): Enable for ms2.
546 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
547 * ms1.opc (parse_loopsize): New.
548 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
549 (print_pcrel): New.
550
95b96521
DB		 5512005-10-28 Dave Brolley <brolley@redhat.com>
552
553 Contribute the following change:
554 2003-09-24 Dave Brolley <brolley@redhat.com>
555
556 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
557 CGEN_ATTR_VALUE_TYPE.
558 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
559 Use cgen_bitset_intersect_p.
560
c6552317
DD		 5612005-10-27 DJ Delorie <dj@redhat.com>
562
563 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
564 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
565 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
566 imm operand is needed.
567 (adjnz, sbjnz): Pass the right operands.
568 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
569 unary-insn): Add -g variants for opcodes that need to support :G.
570 (not.BW:G, push.BW:G): Call it.
571 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
572 stzx16-imm8-imm8-abs16): Fix operand typos.
573 * m32c.opc (m32c_asm_hash): Support bnCND.
574 (parse_signed4n, print_signed4n): New.
72f4393d 575
f75eb1c0
DD		 5762005-10-26 DJ Delorie <dj@redhat.com>
577
578 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
579 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
580 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
581 dsp8[sp] is signed.
582 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
583 (mov.BW:S r0,r1): Fix typo r1l->r1.
584 (tst): Allow :G suffix.
585 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
586
e277c00b
AM		 5872005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
588
589 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
590
92e0a941
DD		 5912005-10-25 DJ Delorie <dj@redhat.com>
592
593 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
594 making one a macro of the other.
595
a1a280bb
DD		 5962005-10-21 DJ Delorie <dj@redhat.com>
597
598 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
599 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
600 indexld, indexls): .w variants have `1' bit.
601 (rot32.b): QI, not SI.
602 (rot32.w): HI, not SI.
603 (xchg16): HI for .w variant.
604
e74eb924
NC		 6052005-10-19 Nick Clifton <nickc@redhat.com>
606
607 * m32r.opc (parse_slo16): Fix bad application of previous patch.
608
5e03663f
NC		 6092005-10-18 Andreas Schwab <schwab@suse.de>
610
611 * m32r.opc (parse_slo16): Better version of previous patch.
612
ab7c9a26
NC		 6132005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
614
615 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
616 size.
617
fd54057a
DD		 6182005-07-25 DJ Delorie <dj@redhat.com>
619
620 * m32c.opc (parse_unsigned8): Add %dsp8().
621 (parse_signed8): Add %hi8().
622 (parse_unsigned16): Add %dsp16().
623 (parse_signed16): Add %lo16() and %hi16().
624 (parse_lab_5_3): Make valuep a bfd_vma *.
625
85da3a56
NC		 6262005-07-18 Nick Clifton <nickc@redhat.com>
627
628 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
629 components.
630 (f-lab32-jmp-s): Fix insertion sequence.
631 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
632 (Dsp-40-s8): Make parameter be signed.
633 (Dsp-40-s16): Likewise.
634 (Dsp-48-s8): Likewise.
635 (Dsp-48-s16): Likewise.
636 (Imm-13-u3): Likewise. (Despite its name!)
637 (BitBase16-16-s8): Make the parameter be unsigned.
638 (BitBase16-8-u11-S): Likewise.
639 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
640 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
641 relaxation.
642
643 * m32c.opc: Fix formatting.
644 Use safe-ctype.h instead of ctype.h
645 Move duplicated code sequences into a macro.
646 Fix compile time warnings about signedness mismatches.
647 Remove dead code.
648 (parse_lab_5_3): New parser function.
72f4393d 649
aa260854
JB		 6502005-07-16 Jim Blandy <jimb@redhat.com>
651
652 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
653 to represent isa sets.
654
0a665bfd
JB		 6552005-07-15 Jim Blandy <jimb@redhat.com>
656
657 * m32c.cpu, m32c.opc: Fix copyright.
658
49f58d10
JB		 6592005-07-14 Jim Blandy <jimb@redhat.com>
660
661 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
662
0e6b69be
AM		 6632005-07-14 Alan Modra <amodra@bigpond.net.au>
664
665 * ms1.opc (print_dollarhex): Correct format string.
666
f9210e37
AM		 6672005-07-06 Alan Modra <amodra@bigpond.net.au>
668
669 * iq2000.cpu: Include from binutils cpu dir.
670
3ec2b351
NC		 6712005-07-05 Nick Clifton <nickc@redhat.com>
672
673 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
674 unsigned in order to avoid compile time warnings about sign
675 conflicts.
676
677 * ms1.opc (parse_*): Likewise.
678 (parse_imm16): Use a "void *" as it is passed both signed and
679 unsigned arguments.
680
47b0e7ad
NC		 6812005-07-01 Nick Clifton <nickc@redhat.com>
682
683 * frv.opc: Update to ISO C90 function declaration style.
684 * iq2000.opc: Likewise.
685 * m32r.opc: Likewise.
686 * sh.opc: Likewise.
687
b081650b
DB		 6882005-06-15 Dave Brolley <brolley@redhat.com>
689
690 Contributed by Red Hat.
691 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
692 * ms1.opc: New file. Written by Stan Cox.
693
e172dbf8
NC		 6942005-05-10 Nick Clifton <nickc@redhat.com>
695
696 * Update the address and phone number of the FSF organization in
697 the GPL notices in the following files:
698 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
699 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
700 sh64-media.cpu, simplify.inc
701
b2d52a48
AM		 7022005-02-24 Alan Modra <amodra@bigpond.net.au>
703
704 * frv.opc (parse_A): Warning fix.
705
33b71eeb
NC		 7062005-02-23 Nick Clifton <nickc@redhat.com>
707
708 * frv.opc: Fixed compile time warnings about differing signed'ness
709 of pointers passed to functions.
710 * m32r.opc: Likewise.
711
bc18c937
NC		 7122005-02-11 Nick Clifton <nickc@redhat.com>
713
714 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
715 'bfd_vma *' in order avoid compile time warning message.
716
46da9a19
HPN		 7172005-01-28 Hans-Peter Nilsson <hp@axis.com>
718
719 * cris.cpu (mstep): Add missing insn.
720
90219bd0
AO		 7212005-01-25 Alexandre Oliva <aoliva@redhat.com>
722
723 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
724 * frv.cpu: Add support for TLS annotations in loads and calll.
725 * frv.opc (parse_symbolic_address): New.
726 (parse_ldd_annotation): New.
727 (parse_call_annotation): New.
728 (parse_ld_annotation): New.
729 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
730 Introduce TLS relocations.
731 (parse_d12, parse_s12, parse_u12): Likewise.
732 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
733 (parse_call_label, print_at): New.
734
c3d75c30
HPN		 7352004-12-21 Mikael Starvik <starvik@axis.com>
736
737 * cris.cpu (cris-set-mem): Correct integral write semantics.
738
68800d83
HPN		 7392004-11-29 Hans-Peter Nilsson <hp@axis.com>
740
741 * cris.cpu: New file.
742
4bd1d37b
NC		 7432004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
744
745 * iq2000.cpu: Added quotes around macro arguments so that they
746 will work with newer versions of guile.
747
4030fa5a
NC		 7482004-10-27 Nick Clifton <nickc@redhat.com>
749
750 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
751 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
752 operand.
753 * iq2000.cpu (dnop index): Rename to _index to avoid complications
754 with guile.
755
ac28a1cb
RS		 7562004-08-27 Richard Sandiford <rsandifo@redhat.com>
757
758 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
759
dc4c54bb
NC		 7602004-05-15 Nick Clifton <nickc@redhat.com>
761
762 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
763
f4453dfa
NC		 7642004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
765
766 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
767
676a64f4
RS		 7682004-03-01 Richard Sandiford <rsandifo@redhat.com>
769
770 * frv.cpu (define-arch frv): Add fr450 mach.
771 (define-mach fr450): New.
772 (define-model fr450): New. Add profile units to every fr450 insn.
773 (define-attr UNIT): Add MDCUTSSI.
774 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
775 (define-attr AUDIO): New boolean.
776 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
777 (f-LRA-null, f-TLBPR-null): New fields.
778 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
779 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
780 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
781 (LRA-null, TLBPR-null): New macros.
782 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
783 (load-real-address): New macro.
784 (lrai, lrad, tlbpr): New instructions.
785 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
786 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
787 (mdcutssi): Change UNIT attribute to MDCUTSSI.
788 (media-low-clear-semantics, media-scope-limit-semantics)
789 (media-quad-limit, media-quad-shift): New macros.
790 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
791 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
792 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
793 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
794 (fr450_unit_mapping): New array.
795 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
796 for new MDCUTSSI unit.
797 (fr450_check_insn_major_constraints): New function.
798 (check_insn_major_constraints): Use it.
799
c7a48b9a
RS		 8002004-03-01 Richard Sandiford <rsandifo@redhat.com>
801
802 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
803 (scutss): Change unit to I0.
804 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
805 (mqsaths): Fix FR400-MAJOR categorization.
806 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
807 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
808 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
809 combinations.
810
8ae0baa2
RS		 8112004-03-01 Richard Sandiford <rsandifo@redhat.com>
812
813 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
814 (rstb, rsth, rst, rstd, rstq): Delete.
815 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
816
8ee9a8b2
NC		 8172004-02-23 Nick Clifton <nickc@redhat.com>
818
819 * Apply these patches from Renesas:
820
821 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
822
823 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
824 disassembling codes for 0x*2 addresses.
825
826 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
827
828 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
829
830 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
831
832 * cpu/m32r.cpu : Add new model m32r2.
833 Add new instructions.
834 Replace occurrances of 'Mitsubishi' with 'Renesas'.
835 Changed PIPE attr of push from O to OS.
836 Care for Little-endian of M32R.
837 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
838 Care for Little-endian of M32R.
839 (parse_slo16): signed extension for value.
840
299d901c
AC		 8412004-02-20 Andrew Cagney <cagney@redhat.com>
842
e866a257
AC		 843 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
844 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
845
299d901c
AC		 846 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
847 written by Ben Elliston.
848
cb10e79a
RS		 8492004-01-14 Richard Sandiford <rsandifo@redhat.com>
850
851 * frv.cpu (UNIT): Add IACC.
852 (iacc-multiply-r-r): Use it.
853 * frv.opc (fr400_unit_mapping): Add entry for IACC.
854 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
855
d4e4dc14
AO		 8562004-01-06 Alexandre Oliva <aoliva@redhat.com>
857
858 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
859 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
860 cut&paste errors in shifting/truncating numerical operands.
861 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
862 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
863 (parse_uslo16): Likewise.
864 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
865 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
866 (parse_s12): Likewise.
867 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
868 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
869 (parse_uslo16): Likewise.
870 (parse_uhi16): Parse gothi and gotfuncdeschi.
871 (parse_d12): Parse got12 and gotfuncdesc12.
872 (parse_s12): Likewise.
873
1340b9a9
DB		 8742003-10-10 Dave Brolley <brolley@redhat.com>
875
876 * frv.cpu (dnpmop): New p-macro.
877 (GRdoublek): Use dnpmop.
878 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
879 (store-double-r-r): Use (.sym regtype doublek).
880 (r-store-double): Ditto.
881 (store-double-r-r-u): Ditto.
882 (conditional-store-double): Ditto.
883 (conditional-store-double-u): Ditto.
884 (store-double-r-simm): Ditto.
885 (fmovs): Assign to UNIT FMALL.
886
ac7c07ac
DB		 8872003-10-06 Dave Brolley <brolley@redhat.com>
888
889 * frv.cpu, frv.opc: Add support for fr550.
890
d0312406
DB		 8912003-09-24 Dave Brolley <brolley@redhat.com>
892
893 * frv.cpu (u-commit): New modelling unit for fr500.
894 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
895 (commit-r): Use u-commit model for fr500.
896 (commit): Ditto.
897 (conditional-float-binary-op): Take profiling data as an argument.
898 Update callers.
899 (ne-float-binary-op): Ditto.
900
c6945302
MS		 9012003-09-19 Michael Snyder <msnyder@redhat.com>
902
903 * frv.cpu (nldqi): Delete unimplemented instruction.
904
23600bb3
DB		 9052003-09-12 Dave Brolley <brolley@redhat.com>
906
907 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
908 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
909 frv_ref_SI to get input register referenced for profiling.
910 (clear-ne-flag-all): Pass insn profiling in as an argument.
911 (clrgr,clrfr,clrga,clrfa): Add profiling information.
912
6f18ad70
MS		 9132003-09-11 Michael Snyder <msnyder@redhat.com>
914
915 * frv.cpu: Typographical corrections.
916
96486995
DB		 9172003-09-09 Dave Brolley <brolley@redhat.com>
918
919 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
920 (conditional-media-dual-complex, media-quad-complex): Likewise.
921
0457efce
DB		 9222003-09-04 Dave Brolley <brolley@redhat.com>
923
924 * frv.cpu (register-transfer): Pass in all attributes in on argument.
925 Update all callers.
926 (conditional-register-transfer): Ditto.
927 (cache-preload): Ditto.
928 (floating-point-conversion): Ditto.
929 (floating-point-neg): Ditto.
930 (float-abs): Ditto.
931 (float-binary-op-s): Ditto.
932 (conditional-float-binary-op): Ditto.
933 (ne-float-binary-op): Ditto.
934 (float-dual-arith): Ditto.
935 (ne-float-dual-arith): Ditto.
936
8caa9169
DB		 9372003-09-03 Dave Brolley <brolley@redhat.com>
938
939 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
940 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
941 MCLRACC-1.
942 (A): Removed operand.
943 (A0,A1): New operands replace operand A.
944 (mnop): Now a real insn
945 (mclracc): Removed insn.
946 (mclracc-0, mclracc-1): New insns replace mclracc.
947 (all insns): Use new UNIT attributes.
948
6d9ab561
NC		 9492003-08-21 Nick Clifton <nickc@redhat.com>
950
951 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
952 and u-media-dual-btoh with output parameter.
953 (cmbtoh): Add profiling hack.
954
741a7751
NC		 9552003-08-19 Michael Snyder <msnyder@redhat.com>
956
957 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
958
5b5b78da
DE		 9592003-06-10 Doug Evans <dje@sebabeach.org>
960
961 * frv.cpu: Add IDOC attribute.
962
539ee71a
AC		 9632003-06-06 Andrew Cagney <cagney@redhat.com>
964
965 Contributed by Red Hat.
966 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
967 Stan Cox, and Frank Ch. Eigler.
968 * iq2000.opc: New file. Written by Ben Elliston, Frank
969 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
970 * iq2000m.cpu: New file. Written by Jeff Johnston.
971 * iq10.cpu: New file. Written by Jeff Johnston.
972
36c3ae24
NC		 9732003-06-05 Nick Clifton <nickc@redhat.com>
974
975 * frv.cpu (FRintieven): New operand. An even-numbered only
976 version of the FRinti operand.
977 (FRintjeven): Likewise for FRintj.
978 (FRintkeven): Likewise for FRintk.
979 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
980 media-quad-arith-sat-semantics, media-quad-arith-sat,
981 conditional-media-quad-arith-sat, mdunpackh,
982 media-quad-multiply-semantics, media-quad-multiply,
983 conditional-media-quad-multiply, media-quad-complex-i,
984 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
985 conditional-media-quad-multiply-acc, munpackh,
986 media-quad-multiply-cross-acc-semantics, mdpackh,
987 media-quad-multiply-cross-acc, mbtoh-semantics,
988 media-quad-cross-multiply-cross-acc-semantics,
989 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
990 media-quad-cross-multiply-acc-semantics, cmbtoh,
991 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
992 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
993 cmhtob): Use new operands.
994 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
0e6b69be 995 (parse_even_register): New function.
36c3ae24 996
75798298
NC		 9972003-06-03 Nick Clifton <nickc@redhat.com>
998
999 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1000 immediate value not unsigned.
1001
9aab5aa3
AC		 10022003-06-03 Andrew Cagney <cagney@redhat.com>
1003
1004 Contributed by Red Hat.
1005 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1006 and Eric Christopher.
1007 * frv.opc: New file. Written by Catherine Moore, and Dave
1008 Brolley.
1009 * simplify.inc: New file. Written by Doug Evans.
1010
2739f79a
AC		 10112003-05-02 Andrew Cagney <cagney@redhat.com>
1012
1013 * New file.
1014
1015\f
752937aa
NC		 1016Copyright (C) 2003-2012 Free Software Foundation, Inc.
1017
1018Copying and distribution of this file, with or without modification,
1019are permitted in any medium without royalty provided the copyright
1020notice and this notice are preserved.
1021
2739f79a
AC		 1022Local Variables:
1023mode: change-log
1024left-margin: 8
1025fill-column: 74
1026version-control: never
1027End:
GDB Binutils - Deliverables
This page took 0.637765 seconds and 4 git commands to generate.