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[deliverable/binutils-gdb.git] / cpu / frv.cpu
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9aab5aa3
AC		 1; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*-
2;
cb10e79a 3; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
9aab5aa3
AC		 4;
5; Contributed by Red Hat Inc; developed under contract from Fujitsu.
6;
7; This file is part of the GNU Binutils.
8;
9; This program is free software; you can redistribute it and/or modify
10; it under the terms of the GNU General Public License as published by
11; the Free Software Foundation; either version 2 of the License, or
12; (at your option) any later version.
13;
14; This program is distributed in the hope that it will be useful,
15; but WITHOUT ANY WARRANTY; without even the implied warranty of
16; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17; GNU General Public License for more details.
18;
19; You should have received a copy of the GNU General Public License
20; along with this program; if not, write to the Free Software
21; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23(include "simplify.inc")
24
25; define-arch must appear first
26
27(define-arch
28 (name frv) ; name of cpu architecture
29 (comment "Fujitsu FRV")
30 (insn-lsb0? #t)
ac7c07ac 31 (machs frv fr550 fr500 fr400 tomcat simple)
9aab5aa3
AC		 32 (isas frv)
33)
34
35(define-isa
36 (name frv)
37 (base-insn-bitsize 32)
38 ; Initial bitnumbers to decode insns by.
39 (decode-assist (24 23 22 21 20 19 18))
40 (liw-insns 1) ; The frv fetches up to 1 insns at a time.
ac7c07ac 41 (parallel-insns 8) ; The frv executes up to 8 insns at a time.
9aab5aa3
AC		 42)
43
44; Cpu family definitions.
45;
46(define-cpu
47 ; cpu names must be distinct from the architecture name and machine names.
48 ; The "b" suffix stands for "base" and is the convention.
49 ; The "f" suffix stands for "family" and is the convention.
50 (name frvbf)
51 (comment "Fujitsu FRV base family")
52 (endian big)
53 (word-bitsize 32)
54)
55\f
56; Generic FR-V machine. Supports the entire architecture
57(define-mach
58 (name frv)
59 (comment "Generic FRV cpu")
60 (cpu frvbf)
61)
62(define-model
63 (name frv) (comment "Generic FRV model") (attrs)
64 (mach frv)
65
66 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
67
68 ; `state' is a list of variables for recording model state
69 ; (state)
70
71 (unit u-exec "Execution Unit" ()
72 1 1 ; issue done
73 () ; state
74 () ; inputs
75 () ; outputs
76 () ; profile action (default)
77 )
78)
79\f
ac7c07ac
DB		 80; FR550 machine
81(define-mach
82 (name fr550)
83 (comment "FR550 cpu")
84 (cpu frvbf)
85)
86(define-model
87 (name fr550) (comment "FR550 model") (attrs)
88 (mach fr550)
89
90 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
91
92 ; `state' is a list of variables for recording model state
93 (state
94 ; State items
95 ; These are all masks with each bit representing one register.
96 (prev-fr-load DI) ; Previous use of FR register was target of a load
97 (prev-fr-complex-1 DI) ; Previous use of FR register has variable latency
98 (prev-fr-complex-2 DI) ; Previous use of FR register has variable latency
99 (prev-ccr-complex DI) ; Previous use of CCR register has variable latency
100 (prev-acc-mmac DI) ; Previous use of ACC register was a MMAC category
101 (cur-fr-load DI) ; Current use of FR register was target of a load
102 (cur-fr-complex-1 DI) ; Current use of FR register has variable latency
103 (cur-fr-complex-2 DI) ; Current use of FR register has variable latency
104 (cur-ccr-complex SI) ; Current use of CCR register has variable latency
105 (cur-acc-mmac DI) ; Current use of ACC register was a MMAC category
106 )
107 ; Basic unit for instructions with no latency penalties
108 (unit u-exec "Execution Unit" ()
109 1 1 ; issue done
110 () ; state
111 () ; inputs
112 () ; outputs
113 () ; profile action (default)
114 )
115 ; Basic integer insn unit
116 (unit u-integer "Integer Unit" ()
117 1 1 ; issue done
118 () ; state
119 ((GRi INT -1) (GRj INT -1)) ; inputs
120 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
121 () ; profile action (default)
122 )
123 ; Integer multiplication unit
124 (unit u-imul "Integer Multiplication Unit" ()
125 1 1 ; issue done
126 () ; state
127 ((GRi INT -1) (GRj INT -1)) ; inputs
128 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
129 () ; profile action (default)
130 )
131 ; Integer division unit
132 (unit u-idiv "Integer Division Unit" ()
133 1 1 ; issue done
134 () ; state
135 ((GRi INT -1) (GRj INT -1)) ; inputs
136 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
137 () ; profile action (default)
138 )
139 ; Branch unit
140 (unit u-branch "Branch Unit" ()
141 1 1 ; issue done
142 () ; state
143 ((GRi INT -1) (GRj INT -1)
144 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
145 ((pc)) ; outputs
146 () ; profile action (default)
147 )
148 ; Trap unit
149 (unit u-trap "Trap Unit" ()
150 1 1 ; issue done
151 () ; state
152 ((GRi INT -1) (GRj INT -1)
153 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
154 () ; outputs
155 () ; profile action (default)
156 )
157 ; Condition code check unit
158 (unit u-check "Check Unit" ()
159 1 1 ; issue done
160 () ; state
161 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
162 () ; outputs
163 () ; profile action (default)
164 )
165 ; Float Arithmetic unit
166 (unit u-float-arith "Float Arithmetic unit" ()
167 1 1 ; issue done
168 () ; state
169 ((FRi INT -1) (FRj INT -1) ; inputs
170 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
171 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
172 () ; profile action (default)
173 )
174 ; Float Dual Arithmetic unit
175 (unit u-float-dual-arith "Float Arithmetic unit" ()
176 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
177 1 3 ; issue done
178 () ; state
179 ((FRi INT -1) (FRj INT -1) ; inputs
180 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
181 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
182 () ; profile action (default)
183 )
184 ; Float Div unit
185 (unit u-float-div "Float Div unit" ()
186 1 1 ; issue done
187 () ; state
188 ((FRi INT -1) (FRj INT -1)) ; inputs
189 ((FRk INT -1)) ; outputs
190 () ; profile action (default)
191 )
192 ; Float Square Root unit
193 (unit u-float-sqrt "Float Square Root unit" ()
194 1 1 ; issue done
195 () ; state
196 ((FRj INT -1) (FRdoublej INT -1)) ; inputs
197 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
198 () ; profile action (default)
199 )
200 ; Float Compare unit
201 (unit u-float-compare "Float Compare unit" ()
202 1 1 ; issue done
203 () ; state
204 ((FRi INT -1) (FRj INT -1)
205 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
206 ((FCCi_2 INT -1)) ; outputs
207 () ; profile action (default)
208 )
209 ; Dual Float Compare unit
210 (unit u-float-dual-compare "Float Dual Compare unit" ()
211 ; This unit has a 2 cycle penalty -- see table 14-14 in the fr550 LSI
212 1 3 ; issue done
213 () ; state
214 ((FRi INT -1) (FRj INT -1)) ; inputs
215 ((FCCi_2 INT -1)) ; outputs
216 () ; profile action (default)
217 )
218 ; FR Move to GR unit
219 (unit u-fr2gr "FR Move to GR Unit" ()
220 1 1 ; issue done
221 () ; state
222 ((FRintk INT -1)) ; inputs
223 ((GRj INT -1)) ; outputs
224 () ; profile action (default)
225 )
226 ; GR Move to FR unit
227 (unit u-gr2fr "GR Move to FR Unit" ()
228 1 1 ; issue done
229 () ; state
230 ((GRj INT -1)) ; inputs
231 ((FRintk INT -1)) ; outputs
232 () ; profile action (default)
233 )
234 ; SPR Move to GR unit
235 (unit u-spr2gr "SPR Move to GR Unit" ()
236 1 1 ; issue done
237 () ; state
238 ((spr INT -1)) ; inputs
239 ((GRj INT -1)) ; outputs
240 () ; profile action (default)
241 )
242 ; GR Move to SPR unit
243 (unit u-gr2spr "GR Move to SPR Unit" ()
244 1 1 ; issue done
245 () ; state
246 ((GRj INT -1)) ; inputs
247 ((spr INT -1)) ; outputs
248 () ; profile action (default)
249 )
250 ; GR set half unit
251 (unit u-set-hilo "GR Set Half" ()
252 1 1 ; issue done
253 () ; state
254 () ; inputs
255 ((GRkhi INT -1) (GRklo INT -1)) ; outputs
256 () ; profile action (default)
257 )
258 ; GR load unit
259 (unit u-gr-load "GR Load Unit" ()
260 1 1 ; issue done
261 () ; state
262 ((GRi INT -1) (GRj INT -1)) ; inputs
263 ((GRk INT -1) (GRdoublek INT -1)) ; outputs
264 () ; profile action (default)
265 )
266 ; GR store unit
267 (unit u-gr-store "GR Store Unit" ()
268 1 1 ; issue done
269 () ; state
270 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
271 () ; outputs
272 () ; profile action (default)
273 )
274 ; FR load unit
275 (unit u-fr-load "FR Load Unit" ()
276 1 1 ; issue done
277 () ; state
278 ((GRi INT -1) (GRj INT -1)) ; inputs
279 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
280 () ; profile action (default)
281 )
282 ; FR store unit
283 (unit u-fr-store "FR Store Unit" ()
284 1 1 ; issue done
285 () ; state
286 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
287 () ; outputs
288 () ; profile action (default)
289 )
290 ; Swap unit
291 (unit u-swap "Swap Unit" ()
292 1 1 ; issue done
293 () ; state
294 ((GRi INT -1) (GRj INT -1)) ; inputs
295 ((GRk INT -1)) ; outputs
296 () ; profile action (default)
297 )
298 ; FR Move to FR unit
299 (unit u-fr2fr "FR Move to FR Unit" ()
300 1 1 ; issue done
301 () ; state
302 ((FRi INT -1)) ; inputs
303 ((FRk INT -1)) ; outputs
304 () ; profile action (default)
305 )
306 ; Clrgr unit
307 (unit u-clrgr "Clrgr Unit" ()
308 1 1 ; issue done
309 () ; state
310 ((GRk INT -1)) ; inputs
311 () ; outputs
312 () ; profile action (default)
313 )
314 ; Clrfr unit
315 (unit u-clrfr "Clrfr Unit" ()
316 1 1 ; issue done
317 () ; state
318 ((FRk INT -1)) ; inputs
319 () ; outputs
320 () ; profile action (default)
321 )
322 ; Insn cache invalidate unit
323 (unit u-ici "Insn cache invalidate unit" ()
324 1 1 ; issue done
325 () ; state
326 ((GRi INT -1) (GRj INT -1)) ; inputs
327 () ; outputs
328 () ; profile action (default)
329 )
330 ; Data cache invalidate unit
331 (unit u-dci "Data cache invalidate unit" ()
332 1 1 ; issue done
333 () ; state
334 ((GRi INT -1) (GRj INT -1)) ; inputs
335 () ; outputs
336 () ; profile action (default)
337 )
338 ; Data cache flush unit
339 (unit u-dcf "Data cache flush unit" ()
340 1 1 ; issue done
341 () ; state
342 ((GRi INT -1) (GRj INT -1)) ; inputs
343 () ; outputs
344 () ; profile action (default)
345 )
346 ; Insn cache preload unit
347 (unit u-icpl "Insn cache preload unit" ()
348 1 1 ; issue done
349 () ; state
350 ((GRi INT -1) (GRj INT -1)) ; inputs
351 () ; outputs
352 () ; profile action (default)
353 )
354 ; Data cache preload unit
355 (unit u-dcpl "Data cache preload unit" ()
356 1 1 ; issue done
357 () ; state
358 ((GRi INT -1) (GRj INT -1)) ; inputs
359 () ; outputs
360 () ; profile action (default)
361 )
362 ; Insn cache unlock unit
363 (unit u-icul "Insn cache unlock unit" ()
364 1 1 ; issue done
365 () ; state
366 ((GRi INT -1) (GRj INT -1)) ; inputs
367 () ; outputs
368 () ; profile action (default)
369 )
370 ; Data cache unlock unit
371 (unit u-dcul "Data cache unlock unit" ()
372 1 1 ; issue done
373 () ; state
374 ((GRi INT -1) (GRj INT -1)) ; inputs
375 () ; outputs
376 () ; profile action (default)
377 )
378 ; commit unit
379 (unit u-commit "Commit Unit" ()
380 1 1 ; issue done
381 () ; state
382 ((GRk INT -1) (FRk INT -1)) ; inputs
383 () ; outputs
384 () ; profile action (default)
385 )
386 ; Float Conversion unit
387 (unit u-float-convert "Float Conversion unit" ()
388 1 1 ; issue done
389 () ; state
390 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
391 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
392 () ; profile action (default)
393 )
394 ; Media units
395 (unit u-media "Media unit" ()
396 1 1 ; issue done
397 () ; state
398 ((FRinti INT -1) (FRintj INT -1)) ; inputs
399 ((FRintk INT -1)) ; outputs
400 () ; profile action (default)
401 )
402 (unit u-media-quad "Media-quad unit" ()
403 1 1 ; issue done
404 () ; state
405 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
406 ((FRintkeven INT -1)) ; outputs
407 () ; profile action (default)
408 )
409 (unit u-media-dual-expand "Media Dual Expand unit" ()
410 1 1 ; issue done
411 () ; state
412 ((FRinti INT -1)) ; inputs
413 ((FRintkeven INT -1)) ; outputs
414 () ; profile action (default)
415 )
416 (unit u-media-3-dual "Media-3-dual unit" ()
417 1 1 ; issue done
418 () ; state
419 ((FRinti INT -1)) ; inputs
420 ((FRintk INT -1)) ; outputs
421 () ; profile action (default)
422 )
423 (unit u-media-3-acc "Media unit for M-3 using ACC" ()
424 1 1 ; issue done
425 () ; state
426 ((FRintj INT -1) (ACC40Si INT -1)) ; inputs
427 ((FRintk INT -1)) ; outputs
428 () ; profile action (default)
429 )
430 (unit u-media-3-acc-dual "Media-3-acc-dual unit" ()
431 1 1 ; issue done
432 () ; state
433 ((ACC40Si INT -1)) ; inputs
434 ((FRintkeven INT -1)) ; outputs
435 () ; profile action (default)
436 )
437 (unit u-media-3-wtacc "Media-3-wtacc unit" ()
438 1 1 ; issue done
439 () ; state
440 ((FRinti INT -1) (ACC40Sk INT -1)) ; inputs
441 () ; outputs
442 () ; profile action (default)
443 )
444 (unit u-media-3-mclracc "Media-3-mclracc unit" ()
445 1 1 ; issue done
446 () ; state
447 () ; inputs
448 () ; outputs
449 () ; profile action (default)
450 )
451 (unit u-media-set "Media set" ()
452 1 1 ; issue done
453 () ; state
454 () ; inputs
455 ((FRintk INT -1)) ; outputs
456 () ; profile action (default)
457 )
458 (unit u-media-4 "Media-4 unit" ()
459 1 1 ; issue done
460 () ; state
461 ((FRinti INT -1) (FRintj INT -1)) ; inputs
462 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
463 () ; profile action (default)
464 )
465 (unit u-media-4-acc "Media-4-acc unit" ()
466 1 1 ; issue done
467 () ; state
468 ((ACC40Si INT -1)) ; inputs
469 ((ACC40Sk INT -1)) ; outputs
470 () ; profile action (default)
471 )
472 (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
473 1 1 ; issue done
474 () ; state
475 ((ACC40Si INT -1)) ; inputs
476 ((ACC40Sk INT -1)) ; outputs
477 () ; profile action (default)
478 )
479 (unit u-media-4-add-sub "Media-4-add-sub unit" ()
480 1 1 ; issue done
481 () ; state
482 ((ACC40Si INT -1)) ; inputs
483 ((ACC40Sk INT -1)) ; outputs
484 () ; profile action (default)
485 )
486 (unit u-media-4-add-sub-dual "Media-4-add-sub-dual unit" ()
487 1 1 ; issue done
488 () ; state
489 ((ACC40Si INT -1)) ; inputs
490 ((ACC40Sk INT -1)) ; outputs
491 () ; profile action (default)
492 )
493 (unit u-media-4-quad "Media-4-quad unit" ()
494 1 1 ; issue done
495 () ; state
496 ((FRintieven INT -1) (FRintjeven INT -1)) ; inputs
497 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
498 () ; profile action (default)
499 )
500)
501
9aab5aa3
AC		 502; FR500 machine.
503(define-mach
504 (name fr500)
505 (comment "FR500 cpu")
506 (cpu frvbf)
507)
508(define-model
509 (name fr500) (comment "FR500 model") (attrs)
510 (mach fr500)
511
512 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
513
514 ; `state' is a list of variables for recording model state
515 (state
516 ; State items
517 ; These are all masks with each bit representing one register.
518 (prev-fpop DI) ; Previous use of FR register was floating point insn
519 (prev-media DI) ; Previous use of FR register was a media insn
520 (prev-cc-complex DI) ; Previous use of ICC register was not simple
521 (cur-fpop DI) ; Current use of FR register was floating point insn
522 (cur-media DI) ; Current use of FR register was a media insn
523 (cur-cc-complex DI) ; Current use of ICC register was not simple
524 )
525 ; Basic unit for instructions with no latency penalties
526 (unit u-exec "Execution Unit" ()
527 1 1 ; issue done
528 () ; state
529 () ; inputs
530 () ; outputs
531 () ; profile action (default)
532 )
533 ; Basic integer insn unit
534 (unit u-integer "Integer Unit" ()
535 1 1 ; issue done
536 () ; state
537 ((GRi INT -1) (GRj INT -1)) ; inputs
538 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
539 () ; profile action (default)
540 )
541 ; Integer multiplication unit
542 (unit u-imul "Integer Multiplication Unit" ()
543 1 1 ; issue done
544 () ; state
545 ((GRi INT -1) (GRj INT -1)) ; inputs
546 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
547 () ; profile action (default)
548 )
549 ; Integer division unit
550 (unit u-idiv "Integer Division Unit" ()
551 1 1 ; issue done
552 () ; state
553 ((GRi INT -1) (GRj INT -1)) ; inputs
554 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
555 () ; profile action (default)
556 )
557 ; Branch unit
558 (unit u-branch "Branch Unit" ()
559 1 1 ; issue done
560 () ; state
561 ((GRi INT -1) (GRj INT -1)
562 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
563 ((pc)) ; outputs
564 () ; profile action (default)
565 )
566 ; Trap unit
567 (unit u-trap "Trap Unit" ()
568 1 1 ; issue done
569 () ; state
570 ((GRi INT -1) (GRj INT -1)
571 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
572 () ; outputs
573 () ; profile action (default)
574 )
575 ; Condition code check unit
576 (unit u-check "Check Unit" ()
577 1 1 ; issue done
578 () ; state
579 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
580 () ; outputs
581 () ; profile action (default)
582 )
23600bb3
DB		 583 ; Clrgr unit
584 (unit u-clrgr "Clrgr Unit" ()
585 1 1 ; issue done
586 () ; state
587 ((GRk INT -1)) ; inputs
588 () ; outputs
589 () ; profile action (default)
590 )
591 ; Clrfr unit
592 (unit u-clrfr "Clrfr Unit" ()
593 1 1 ; issue done
594 () ; state
595 ((FRk INT -1)) ; inputs
596 () ; outputs
597 () ; profile action (default)
598 )
9aab5aa3
AC		 599 ; GR set half unit
600 (unit u-set-hilo "GR Set Half" ()
601 1 1 ; issue done
602 () ; state
603 () ; inputs
604 ((GRkhi INT -1) (GRklo INT -1)) ; outputs
605 () ; profile action (default)
606 )
607 ; GR load unit -- TODO doesn't handle quad
608 (unit u-gr-load "GR Load Unit" ()
609 1 1 ; issue done
610 () ; state
611 ((GRi INT -1) (GRj INT -1)) ; inputs
612 ((GRk INT -1) (GRdoublek INT -1)) ; outputs
613 () ; profile action (default)
614 )
615 ; GR store unit -- TODO doesn't handle quad
616 (unit u-gr-store "GR Store Unit" ()
617 1 1 ; issue done
618 () ; state
619 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
620 () ; outputs
621 () ; profile action (default)
622 )
623 ; GR recovering store unit -- TODO doesn't handle quad
624 (unit u-gr-r-store "GR Recovering Store Unit" ()
625 1 1 ; issue done
626 () ; state
627 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
628 () ; outputs
629 () ; profile action (default)
630 )
631 ; FR load unit -- TODO doesn't handle quad
632 (unit u-fr-load "FR Load Unit" ()
633 1 1 ; issue done
634 () ; state
635 ((GRi INT -1) (GRj INT -1)) ; inputs
636 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
637 () ; profile action (default)
638 )
639 ; FR store unit -- TODO doesn't handle quad
640 (unit u-fr-store "FR Store Unit" ()
641 1 1 ; issue done
642 () ; state
643 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
644 () ; outputs
645 () ; profile action (default)
646 )
647 ; FR recovering store unit -- TODO doesn't handle quad
648 (unit u-fr-r-store "FR Recovering Store Unit" ()
649 1 1 ; issue done
650 () ; state
651 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
652 () ; outputs
653 () ; profile action (default)
654 )
655 ; Swap unit
656 (unit u-swap "Swap Unit" ()
657 1 1 ; issue done
658 () ; state
659 ((GRi INT -1) (GRj INT -1)) ; inputs
660 ((GRk INT -1)) ; outputs
661 () ; profile action (default)
662 )
663 ; FR Move to FR unit
664 (unit u-fr2fr "FR Move to FR Unit" ()
665 1 1 ; issue done
666 () ; state
667 ((FRi INT -1)) ; inputs
668 ((FRk INT -1)) ; outputs
669 () ; profile action (default)
670 )
671 ; FR Move to GR unit
672 (unit u-fr2gr "FR Move to GR Unit" ()
673 1 1 ; issue done
674 () ; state
675 ((FRintk INT -1)) ; inputs
676 ((GRj INT -1)) ; outputs
677 () ; profile action (default)
678 )
679 ; SPR Move to GR unit
680 (unit u-spr2gr "SPR Move to GR Unit" ()
681 1 1 ; issue done
682 () ; state
683 ((spr INT -1)) ; inputs
684 ((GRj INT -1)) ; outputs
685 () ; profile action (default)
686 )
687 ; GR Move to FR unit
688 (unit u-gr2fr "GR Move to FR Unit" ()
689 1 1 ; issue done
690 () ; state
691 ((GRj INT -1)) ; inputs
692 ((FRintk INT -1)) ; outputs
693 () ; profile action (default)
694 )
695 ; GR Move to SPR unit
696 (unit u-gr2spr "GR Move to SPR Unit" ()
697 1 1 ; issue done
698 () ; state
699 ((GRj INT -1)) ; inputs
700 ((spr INT -1)) ; outputs
701 () ; profile action (default)
702 )
703 ; Float Arithmetic unit
704 (unit u-float-arith "Float Arithmetic unit" ()
705 1 1 ; issue done
706 () ; state
707 ((FRi INT -1) (FRj INT -1) ; inputs
708 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
709 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
710 () ; profile action (default)
711 )
712 ; Float Dual Arithmetic unit
713 (unit u-float-dual-arith "Float Arithmetic unit" ()
714 1 1 ; issue done
715 () ; state
716 ((FRi INT -1) (FRj INT -1) ; inputs
717 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
718 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
719 () ; profile action (default)
720 )
721 ; Float Div unit
722 (unit u-float-div "Float Div unit" ()
723 1 1 ; issue done
724 () ; state
725 ((FRi INT -1) (FRj INT -1)) ; inputs
726 ((FRk INT -1)) ; outputs
727 () ; profile action (default)
728 )
729 ; Float Square Root unit
730 (unit u-float-sqrt "Float Square Root unit" ()
731 1 1 ; issue done
732 () ; state
733 ((FRj INT -1) (FRdoublej INT -1)) ; inputs
734 ((FRk INT -1) (FRdoublek INT -1)) ; outputs
735 () ; profile action (default)
736 )
737 ; Float Dual Square Root unit
738 (unit u-float-dual-sqrt "Float Dual Square Root unit" ()
739 1 1 ; issue done
740 () ; state
741 ((FRj INT -1)) ; inputs
742 ((FRk INT -1)) ; outputs
743 () ; profile action (default)
744 )
745 ; Float Compare unit
746 (unit u-float-compare "Float Compare unit" ()
747 1 1 ; issue done
748 () ; state
749 ((FRi INT -1) (FRj INT -1)
750 (FRdoublei INT -1) (FRdoublej INT -1)) ; inputs
751 ((FCCi_2 INT -1)) ; outputs
752 () ; profile action (default)
753 )
754 ; Dual Float Compare unit
755 (unit u-float-dual-compare "Float Dual Compare unit" ()
756 1 1 ; issue done
757 () ; state
758 ((FRi INT -1) (FRj INT -1)) ; inputs
759 ((FCCi_2 INT -1)) ; outputs
760 () ; profile action (default)
761 )
762 ; Float Conversion unit
763 (unit u-float-convert "Float Conversion unit" ()
764 1 1 ; issue done
765 () ; state
766 ((FRj INT -1) (FRintj INT -1) (FRdoublej INT -1)) ; inputs
767 ((FRk INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; outputs
768 () ; profile action (default)
769 )
770 ; Dual Float Conversion unit
771 (unit u-float-dual-convert "Float Dual Conversion unit" ()
772 1 1 ; issue done
773 () ; state
774 ((FRj INT -1) (FRintj INT -1)) ; inputs
775 ((FRk INT -1) (FRintk INT -1)) ; outputs
776 () ; profile action (default)
777 )
778 ; Media unit
779 (unit u-media "Media unit" ()
780 1 1 ; issue done
781 () ; state
782 ((FRinti INT -1) (FRintj INT -1) (ACC40Si INT -1) (ACCGi INT -1)) ; inputs
783 ((FRintk INT -1) (ACC40Sk INT -1) (ACC40Uk INT -1) (ACCGk INT -1)) ; outputs
784 () ; profile action (default)
785 )
786 ; Media Quad Arithmetic unit
787 (unit u-media-quad-arith "Media Quad Arithmetic unit" ()
788 1 1 ; issue done
789 () ; state
790 ((FRinti INT -1) (FRintj INT -1)) ; inputs
791 ((FRintk INT -1)) ; outputs
792 () ; profile action (default)
793 )
794 ; Media Dual Multiplication unit
795 (unit u-media-dual-mul "Media Dual Multiplication unit" ()
796 1 1 ; issue done
797 () ; state
798 ((FRinti INT -1) (FRintj INT -1)) ; inputs
799 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
800 () ; profile action (default)
801 )
802 ; Media Quad Multiplication unit
803 (unit u-media-quad-mul "Media Quad Multiplication unit" ()
804 1 1 ; issue done
805 () ; state
806 ((FRinti INT -1) (FRintj INT -1)) ; inputs
807 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
808 () ; profile action (default)
809 )
810 ; Media Quad Complex unit
811 (unit u-media-quad-complex "Media Quad Complex unit" ()
812 1 1 ; issue done
813 () ; state
814 ((FRinti INT -1) (FRintj INT -1)) ; inputs
815 ((ACC40Sk INT -1)) ; outputs
816 () ; profile action (default)
817 )
818 ; Media Dual Expand unit
819 (unit u-media-dual-expand "Media Dual Expand unit" ()
820 1 1 ; issue done
821 () ; state
822 ((FRinti INT -1)) ; inputs
823 ((FRintk INT -1)) ; outputs
824 () ; profile action (default)
825 )
826 ; Media Dual Unpack unit
827 (unit u-media-dual-unpack "Media Dual Unpack unit" ()
828 1 1 ; issue done
829 () ; state
830 ((FRinti INT -1)) ; inputs
831 ((FRintk INT -1)) ; outputs
832 () ; profile action (default)
833 )
834 ; Media Dual byte to half unit
835 (unit u-media-dual-btoh "Media Byte to byte" ()
836 1 1 ; issue done
837 () ; state
838 ((FRintj INT -1)) ; inputs
839 ((FRintk INT -1)) ; outputs
840 () ; profile action (default)
841 )
842 ; Media Dual half to byte unit
843 (unit u-media-dual-htob "Media Half to byte" ()
844 1 1 ; issue done
845 () ; state
846 ((FRintj INT -1)) ; inputs
847 ((FRintk INT -1)) ; outputs
848 () ; profile action (default)
849 )
850 ; Media Dual byte to half unit extended
851 (unit u-media-dual-btohe "Media Byte to byte extended" ()
852 1 1 ; issue done
853 () ; state
854 ((FRintj INT -1)) ; inputs
855 ((FRintk INT -1)) ; outputs
856 () ; profile action (default)
857 )
858 ; Barrier unit
859 (unit u-barrier "Barrier unit" ()
860 1 1 ; issue done
861 () ; state
862 () ; inputs
863 () ; outputs
864 () ; profile action (default)
865 )
866 ; Memory Barrier unit
867 (unit u-membar "Memory Barrier unit" ()
868 1 1 ; issue done
869 () ; state
870 () ; inputs
871 () ; outputs
872 () ; profile action (default)
873 )
874 ; Insn cache invalidate unit
875 (unit u-ici "Insn cache invalidate unit" ()
876 1 1 ; issue done
877 () ; state
878 ((GRi INT -1) (GRj INT -1)) ; inputs
879 () ; outputs
880 () ; profile action (default)
881 )
882 ; Data cache invalidate unit
883 (unit u-dci "Data cache invalidate unit" ()
884 1 1 ; issue done
885 () ; state
886 ((GRi INT -1) (GRj INT -1)) ; inputs
887 () ; outputs
888 () ; profile action (default)
889 )
890 ; Data cache flush unit
891 (unit u-dcf "Data cache flush unit" ()
892 1 1 ; issue done
893 () ; state
894 ((GRi INT -1) (GRj INT -1)) ; inputs
895 () ; outputs
896 () ; profile action (default)
897 )
898 ; Insn cache preload unit
899 (unit u-icpl "Insn cache preload unit" ()
900 1 1 ; issue done
901 () ; state
902 ((GRi INT -1) (GRj INT -1)) ; inputs
903 () ; outputs
904 () ; profile action (default)
905 )
906 ; Data cache preload unit
907 (unit u-dcpl "Data cache preload unit" ()
908 1 1 ; issue done
909 () ; state
910 ((GRi INT -1) (GRj INT -1)) ; inputs
911 () ; outputs
912 () ; profile action (default)
913 )
914 ; Insn cache unlock unit
915 (unit u-icul "Insn cache unlock unit" ()
916 1 1 ; issue done
917 () ; state
918 ((GRi INT -1) (GRj INT -1)) ; inputs
919 () ; outputs
920 () ; profile action (default)
921 )
922 ; Data cache unlock unit
923 (unit u-dcul "Data cache unlock unit" ()
924 1 1 ; issue done
925 () ; state
926 ((GRi INT -1) (GRj INT -1)) ; inputs
927 () ; outputs
928 () ; profile action (default)
929 )
d0312406
DB		 930 ; commit unit
931 (unit u-commit "Commit Unit" ()
932 1 1 ; issue done
933 () ; state
934 ((GRk INT -1) (FRk INT -1)) ; inputs
935 () ; outputs
936 () ; profile action (default)
937 )
9aab5aa3
AC		 938)
939\f
940; Tomcat machine. Early version of fr500 machine
941(define-mach
942 (name tomcat)
943 (comment "Tomcat -- early version of fr500")
944 (cpu frvbf)
945)
946(define-model
947 (name tomcat) (comment "Tomcat model") (attrs)
948 (mach tomcat)
949
950 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
951
952 ; `state' is a list of variables for recording model state
953 ; (state)
954
955 (unit u-exec "Execution Unit" ()
956 1 1 ; issue done
957 () ; state
958 () ; inputs
959 () ; outputs
960 () ; profile action (default)
961 )
962)
963\f
964; FR400 machine
965(define-mach
966 (name fr400)
967 (comment "FR400 cpu")
968 (cpu frvbf)
969)
970(define-model
971 (name fr400) (comment "FR400 model") (attrs)
972 (mach fr400)
973 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
974 ; `state' is a list of variables for recording model state
975 (state
976 ; State items
977 ; These are all masks with each bit representing one register.
978 (prev-fp-load DI) ; Previous use of FR register was floating point load
979 (prev-fr-p4 DI) ; Previous use of FR register was media unit 4
980 (prev-fr-p6 DI) ; Previous use of FR register was media unit 6
981 (prev-acc-p2 DI) ; Previous use of ACC register was media unit 2
982 (prev-acc-p4 DI) ; Previous use of ACC register was media unit 4
983 (cur-fp-load DI) ; Current use of FR register is floating point load
984 (cur-fr-p4 DI) ; Current use of FR register is media unit 4
985 (cur-fr-p6 DI) ; Current use of FR register is media unit 6
986 (cur-acc-p2 DI) ; Current use of ACC register is media unit 2
987 (cur-acc-p4 DI) ; Current use of ACC register is media unit 4
988 )
989 (unit u-exec "Execution Unit" ()
990 1 1 ; issue done
991 () ; state
992 () ; inputs
993 () ; outputs
994 () ; profile action (default)
995 )
996 ; Basic integer insn unit
997 (unit u-integer "Integer Unit" ()
998 1 1 ; issue done
999 () ; state
1000 ((GRi INT -1) (GRj INT -1)) ; inputs
1001 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1002 () ; profile action (default)
1003 )
1004 ; Integer multiplication unit
1005 (unit u-imul "Integer Multiplication Unit" ()
1006 1 1 ; issue done
1007 () ; state
1008 ((GRi INT -1) (GRj INT -1)) ; inputs
1009 ((GRdoublek INT -1) (ICCi_1 INT -1)) ; outputs
1010 () ; profile action (default)
1011 )
1012 ; Integer division unit
1013 (unit u-idiv "Integer Division Unit" ()
1014 1 1 ; issue done
1015 () ; state
1016 ((GRi INT -1) (GRj INT -1)) ; inputs
1017 ((GRk INT -1) (ICCi_1 INT -1)) ; outputs
1018 () ; profile action (default)
1019 )
1020 ; Branch unit
1021 (unit u-branch "Branch Unit" ()
1022 1 1 ; issue done
1023 () ; state
1024 ((GRi INT -1) (GRj INT -1)
1025 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1026 ((pc)) ; outputs
1027 () ; profile action (default)
1028 )
1029 ; Trap unit
1030 (unit u-trap "Trap Unit" ()
1031 1 1 ; issue done
1032 () ; state
1033 ((GRi INT -1) (GRj INT -1)
1034 (ICCi_2 INT -1) (FCCi_2 INT -1)) ; inputs
1035 () ; outputs
1036 () ; profile action (default)
1037 )
1038 ; Condition code check unit
1039 (unit u-check "Check Unit" ()
1040 1 1 ; issue done
1041 () ; state
1042 ((ICCi_3 INT -1) (FCCi_3 INT -1)) ; inputs
1043 () ; outputs
1044 () ; profile action (default)
1045 )
1046 ; GR set half unit
1047 (unit u-set-hilo "GR Set Half" ()
1048 1 1 ; issue done
1049 () ; state
1050 () ; inputs
1051 ((GRkhi INT -1) (GRklo INT -1)) ; outputs
1052 () ; profile action (default)
1053 )
1054 ; GR load unit -- TODO doesn't handle quad
1055 (unit u-gr-load "GR Load Unit" ()
1056 1 1 ; issue done
1057 () ; state
1058 ((GRi INT -1) (GRj INT -1)) ; inputs
1059 ((GRk INT -1) (GRdoublek INT -1)) ; outputs
1060 () ; profile action (default)
1061 )
1062 ; GR store unit -- TODO doesn't handle quad
1063 (unit u-gr-store "GR Store Unit" ()
1064 1 1 ; issue done
1065 () ; state
1066 ((GRi INT -1) (GRj INT -1) (GRk INT -1) (GRdoublek INT -1)) ; inputs
1067 () ; outputs
1068 () ; profile action (default)
1069 )
1070 ; FR load unit -- TODO doesn't handle quad
1071 (unit u-fr-load "FR Load Unit" ()
1072 1 1 ; issue done
1073 () ; state
1074 ((GRi INT -1) (GRj INT -1)) ; inputs
1075 ((FRintk INT -1) (FRdoublek INT -1)) ; outputs
1076 () ; profile action (default)
1077 )
1078 ; FR store unit -- TODO doesn't handle quad
1079 (unit u-fr-store "FR Store Unit" ()
1080 1 1 ; issue done
1081 () ; state
1082 ((GRi INT -1) (GRj INT -1) (FRintk INT -1) (FRdoublek INT -1)) ; inputs
1083 () ; outputs
1084 () ; profile action (default)
1085 )
1086 ; Swap unit
1087 (unit u-swap "Swap Unit" ()
1088 1 1 ; issue done
1089 () ; state
1090 ((GRi INT -1) (GRj INT -1)) ; inputs
1091 ((GRk INT -1)) ; outputs
1092 () ; profile action (default)
1093 )
1094 ; FR Move to GR unit
1095 (unit u-fr2gr "FR Move to GR Unit" ()
1096 1 1 ; issue done
1097 () ; state
1098 ((FRintk INT -1)) ; inputs
1099 ((GRj INT -1)) ; outputs
1100 () ; profile action (default)
1101 )
1102 ; SPR Move to GR unit
1103 (unit u-spr2gr "SPR Move to GR Unit" ()
1104 1 1 ; issue done
1105 () ; state
1106 ((spr INT -1)) ; inputs
1107 ((GRj INT -1)) ; outputs
1108 () ; profile action (default)
1109 )
1110 ; GR Move to FR unit
1111 (unit u-gr2fr "GR Move to FR Unit" ()
1112 1 1 ; issue done
1113 () ; state
1114 ((GRj INT -1)) ; inputs
1115 ((FRintk INT -1)) ; outputs
1116 () ; profile action (default)
1117 )
1118 ; GR Move to SPR unit
1119 (unit u-gr2spr "GR Move to SPR Unit" ()
1120 1 1 ; issue done
1121 () ; state
1122 ((GRj INT -1)) ; inputs
1123 ((spr INT -1)) ; outputs
1124 () ; profile action (default)
1125 )
1126 ; Media unit M1 -- see table 13-8 in the fr400 LSI
1127 (unit u-media-1 "Media-1 unit" ()
1128 1 1 ; issue done
1129 () ; state
1130 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1131 ((FRintk INT -1)) ; outputs
1132 () ; profile action (default)
1133 )
1134 (unit u-media-1-quad "Media-1-quad unit" ()
1135 1 1 ; issue done
1136 () ; state
1137 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1138 ((FRintk INT -1)) ; outputs
1139 () ; profile action (default)
1140 )
1141 (unit u-media-hilo "Media-hilo unit -- a variation of the Media-1 unit" ()
1142 1 1 ; issue done
1143 () ; state
1144 () ; inputs
1145 ((FRkhi INT -1) (FRklo INT -1)) ; outputs
1146 () ; profile action (default)
1147 )
1148 ; Media unit M2 -- see table 13-8 in the fr400 LSI
1149 (unit u-media-2 "Media-2 unit" ()
1150 1 1 ; issue done
1151 () ; state
1152 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1153 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1154 () ; profile action (default)
1155 )
1156 (unit u-media-2-quad "Media-2-quad unit" ()
1157 1 1 ; issue done
1158 () ; state
1159 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1160 ((ACC40Sk INT -1) (ACC40Uk INT -1)) ; outputs
1161 () ; profile action (default)
1162 )
1163 (unit u-media-2-acc "Media-2-acc unit" ()
1164 1 1 ; issue done
1165 () ; state
1166 ((ACC40Si INT -1)) ; inputs
1167 ((ACC40Sk INT -1)) ; outputs
1168 () ; profile action (default)
1169 )
1170 (unit u-media-2-acc-dual "Media-2-acc-dual unit" ()
1171 1 1 ; issue done
1172 () ; state
1173 ((ACC40Si INT -1)) ; inputs
1174 ((ACC40Sk INT -1)) ; outputs
1175 () ; profile action (default)
1176 )
1177 (unit u-media-2-add-sub "Media-2-add-sub unit" ()
1178 1 1 ; issue done
1179 () ; state
1180 ((ACC40Si INT -1)) ; inputs
1181 ((ACC40Sk INT -1)) ; outputs
1182 () ; profile action (default)
1183 )
1184 (unit u-media-2-add-sub-dual "Media-2-add-sub-dual unit" ()
1185 1 1 ; issue done
1186 () ; state
1187 ((ACC40Si INT -1)) ; inputs
1188 ((ACC40Sk INT -1)) ; outputs
1189 () ; profile action (default)
1190 )
1191 ; Media unit M3 -- see table 13-8 in the fr400 LSI
1192 (unit u-media-3 "Media-3 unit" ()
1193 1 1 ; issue done
1194 () ; state
1195 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1196 ((FRintk INT -1)) ; outputs
1197 () ; profile action (default)
1198 )
1199 (unit u-media-3-dual "Media-3-dual unit" ()
1200 1 1 ; issue done
1201 () ; state
1202 ((FRinti INT -1)) ; inputs
1203 ((FRintk INT -1)) ; outputs
1204 () ; profile action (default)
1205 )
1206 (unit u-media-3-quad "Media-3-quad unit" ()
1207 1 1 ; issue done
1208 () ; state
1209 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1210 ((FRintk INT -1)) ; outputs
1211 () ; profile action (default)
1212 )
1213 ; Media unit M4 -- see table 13-8 in the fr400 LSI
1214 (unit u-media-4 "Media-4 unit" ()
1215 1 1 ; issue done
1216 () ; state
1217 ((ACC40Si INT -1) (FRintj INT -1)) ; inputs
1218 ((ACC40Sk INT -1) (FRintk INT -1)) ; outputs
1219 () ; profile action (default)
1220 )
1221 (unit u-media-4-accg "Media-4-accg unit" ()
1222 1 1 ; issue done
1223 () ; state
1224 ((ACCGi INT -1) (FRinti INT -1)) ; inputs
1225 ((ACCGk INT -1) (FRintk INT -1)) ; outputs
1226 () ; profile action (default)
1227 )
1228 (unit u-media-4-acc-dual "Media-4-acc-dual unit" ()
1229 1 1 ; issue done
1230 () ; state
1231 ((ACC40Si INT -1)) ; inputs
1232 ((FRintk INT -1)) ; outputs
1233 () ; profile action (default)
1234 )
1235 ; Media unit M6 -- see table 13-8 in the fr400 LSI
1236 (unit u-media-6 "Media-6 unit" ()
1237 1 1 ; issue done
1238 () ; state
1239 ((FRinti INT -1)) ; inputs
1240 ((FRintk INT -1)) ; outputs
1241 () ; profile action (default)
1242 )
1243 ; Media unit M7 -- see table 13-8 in the fr400 LSI
1244 (unit u-media-7 "Media-1 unit" ()
1245 1 1 ; issue done
1246 () ; state
1247 ((FRinti INT -1) (FRintj INT -1)) ; inputs
1248 ((FCCk INT -1)) ; outputs
1249 () ; profile action (default)
1250 )
1251 ; Media Dual Expand unit
1252 (unit u-media-dual-expand "Media Dual Expand unit" ()
1253 1 1 ; issue done
1254 () ; state
1255 ((FRinti INT -1)) ; inputs
1256 ((FRintk INT -1)) ; outputs
1257 () ; profile action (default)
1258 )
1259 ; Media Dual half to byte unit
1260 (unit u-media-dual-htob "Media Half to byte" ()
1261 1 1 ; issue done
1262 () ; state
1263 ((FRintj INT -1)) ; inputs
1264 ((FRintk INT -1)) ; outputs
1265 () ; profile action (default)
1266 )
1267 ; Barrier unit
1268 (unit u-barrier "Barrier unit" ()
1269 1 1 ; issue done
1270 () ; state
1271 () ; inputs
1272 () ; outputs
1273 () ; profile action (default)
1274 )
1275 ; Memory Barrier unit
1276 (unit u-membar "Memory Barrier unit" ()
1277 1 1 ; issue done
1278 () ; state
1279 () ; inputs
1280 () ; outputs
1281 () ; profile action (default)
1282 )
1283 ; Insn cache invalidate unit
1284 (unit u-ici "Insn cache invalidate unit" ()
1285 1 1 ; issue done
1286 () ; state
1287 ((GRi INT -1) (GRj INT -1)) ; inputs
1288 () ; outputs
1289 () ; profile action (default)
1290 )
1291 ; Data cache invalidate unit
1292 (unit u-dci "Data cache invalidate unit" ()
1293 1 1 ; issue done
1294 () ; state
1295 ((GRi INT -1) (GRj INT -1)) ; inputs
1296 () ; outputs
1297 () ; profile action (default)
1298 )
1299 ; Data cache flush unit
1300 (unit u-dcf "Data cache flush unit" ()
1301 1 1 ; issue done
1302 () ; state
1303 ((GRi INT -1) (GRj INT -1)) ; inputs
1304 () ; outputs
1305 () ; profile action (default)
1306 )
1307 ; Insn cache preload unit
1308 (unit u-icpl "Insn cache preload unit" ()
1309 1 1 ; issue done
1310 () ; state
1311 ((GRi INT -1) (GRj INT -1)) ; inputs
1312 () ; outputs
1313 () ; profile action (default)
1314 )
1315 ; Data cache preload unit
1316 (unit u-dcpl "Data cache preload unit" ()
1317 1 1 ; issue done
1318 () ; state
1319 ((GRi INT -1) (GRj INT -1)) ; inputs
1320 () ; outputs
1321 () ; profile action (default)
1322 )
1323 ; Insn cache unlock unit
1324 (unit u-icul "Insn cache unlock unit" ()
1325 1 1 ; issue done
1326 () ; state
1327 ((GRi INT -1) (GRj INT -1)) ; inputs
1328 () ; outputs
1329 () ; profile action (default)
1330 )
1331 ; Data cache unlock unit
1332 (unit u-dcul "Data cache unlock unit" ()
1333 1 1 ; issue done
1334 () ; state
1335 ((GRi INT -1) (GRj INT -1)) ; inputs
1336 () ; outputs
1337 () ; profile action (default)
1338 )
1339)
1340\f
1341; Simple machine - single issue integer machine
1342(define-mach
1343 (name simple)
1344 (comment "Simple single issue integer cpu")
1345 (cpu frvbf)
1346)
1347(define-model
1348 (name simple) (comment "Simple model") (attrs)
1349 (mach simple)
1350 (pipeline all "" () ((fetch) (decode) (execute) (writeback)))
1351 ; `state' is a list of variables for recording model state
1352 (state)
1353 (unit u-exec "Execution Unit" ()
1354 1 1 ; issue done
1355 () ; state
1356 () ; inputs
1357 () ; outputs
1358 () ; profile action (default)
1359 )
1360)
1361\f
1362; The instruction fetch/execute cycle.
1363;
1364; This is how to fetch and decode an instruction.
1365; Leave it out for now
1366
1367; (define-extract (const SI 0))
1368
1369; This is how to execute a decoded instruction.
1370; Leave it out for now
1371
1372; (define-execute (const SI 0))
1373\f
1374; An attribute to describe which unit an insn runs in.
1375(define-attr
1376 (for insn)
1377 (type enum)
1378 (name UNIT)
1379 (comment "parallel execution pipeline selection")
8caa9169
DB		 1380 ; The order of declaration is significant.
1381 ; See the *_unit_mapping tables in frv.opc
1382 ; Keep variations on the same unit together.
1383 ; Keep the '01' variant immediately after the '1' variant in each unit.
1384 ; Keep the 'ALL' variations immediately after the last numbered variant in each unit.
9aab5aa3 1385 (values NIL
ac7c07ac
DB		 1386 I0 I1 I01 I2 I3 IALL
1387 FM0 FM1 FM01 FM2 FM3 FMALL FMLOW
9aab5aa3
AC		 1388 B0 B1 B01
1389 C
1390 MULT-DIV ; multiply/division slotted differently on different machines
cb10e79a 1391 IACC ; iacc multiply slotted differently on different machines
9aab5aa3 1392 LOAD ; loads slotted differently on different machines
8caa9169
DB		 1393 STORE ; store slotted differently on different machines
1394 SCAN ; scan, scani slotted differently on different machines
1395 DCPL ; dcpl slotted differently on different machines
1396 MDUALACC ; media dual acc slotted differently on different machines
1397 MCLRACC-1; mclracc A==1 slotted differently on different machines
9aab5aa3
AC		 1398 NUM_UNITS
1399 )
1400)
1401; Attributes to describe major categories of insns
1402(define-attr
1403 (for insn)
1404 (type enum)
1405 (name FR400-MAJOR)
1406 (comment "fr400 major insn categories")
1407 ; The order of declaration is significant. Keep variations on the same major
1408 ; together.
1409 (values NONE
1410 I-1 I-2 I-3 I-4 I-5
1411 B-1 B-2 B-3 B-4 B-5 B-6
1412 C-1 C-2
1413 M-1 M-2
1414 )
1415)
1416(define-attr
1417 (for insn)
1418 (type enum)
1419 (name FR500-MAJOR)
1420 (comment "fr500 major insn categories")
1421 ; The order of declaration is significant. Keep variations on the same major
1422 ; together.
1423 (values NONE
1424 I-1 I-2 I-3 I-4 I-5 I-6
1425 B-1 B-2 B-3 B-4 B-5 B-6
1426 C-1 C-2
1427 F-1 F-2 F-3 F-4 F-5 F-6 F-7 F-8
1428 M-1 M-2 M-3 M-4 M-5 M-6 M-7 M-8
1429 )
1430)
ac7c07ac
DB		 1431(define-attr
1432 (for insn)
1433 (type enum)
1434 (name FR550-MAJOR)
1435 (comment "fr550 major insn categories")
1436 ; The order of declaration is significant. Keep variations on the same major
1437 ; together.
1438 (values NONE
1439 I-1 I-2 I-3 I-4 I-5 I-6 I-7 I-8
1440 B-1 B-2 B-3 B-4 B-5 B-6
1441 C-1 C-2
1442 F-1 F-2 F-3 F-4
1443 M-1 M-2 M-3 M-4 M-5
1444 )
1445)
9aab5aa3
AC		 1446; Privileged insn
1447(define-attr
1448 (for insn)
1449 (type boolean)
1450 (name PRIVILEGED)
1451 (comment "insn only allowed in supervisor mode")
1452)
1453; Non-Excepting insn
1454(define-attr
1455 (for insn)
1456 (type boolean)
1457 (name NON-EXCEPTING)
1458 (comment "non-excepting insn")
1459)
1460; Conditional insn
1461(define-attr
1462 (for insn)
1463 (type boolean)
1464 (name CONDITIONAL)
1465 (comment "conditional insn")
1466)
1467; insn accesses FR registers
1468(define-attr
1469 (for insn)
1470 (type boolean)
1471 (name FR-ACCESS)
1472 (comment "insn accesses FR registers")
1473)
1474; insn preserves MSR.OVF
1475(define-attr
1476 (for insn)
1477 (type boolean)
1478 (name PRESERVE-OVF)
1479 (comment "Preserve value of MSR.OVF")
1480)
6f18ad70 1481; null attribute -- used as a place holder for where an attribue is required.
9aab5aa3
AC		 1482(define-attr
1483 (for insn)
1484 (type boolean)
1485 (name NA)
1486 (comment "placeholder attribute")
1487 (attrs META) ; do not define in any generated file for now
1488)
5b5b78da
DE		 1489
1490; IDOC attribute for instruction documentation.
1491
1492(define-attr
1493 (for insn)
1494 (type enum)
1495 (name IDOC)
1496 (comment "insn kind for documentation")
1497 (attrs META)
1498 (values
1499 (MEM - () "Memory")
1500 (ALU - () "ALU")
1501 (FPU - () "FPU")
1502 (BR - () "Branch")
1503 (PRIV - () "Priviledged")
1504 (MISC - () "Miscellaneous")
1505 )
1506)
9aab5aa3
AC		 1507\f
1508; Instruction fields.
1509;
1510; Attributes:
1511; PCREL-ADDR: pc relative value (for reloc and disassembly purposes)
1512; ABS-ADDR: absolute address (for reloc and disassembly purposes?)
1513; RESERVED: bits are not used to decode insn, must be all 0
1514(dnf f-pack "packing bit" () 31 1)
1515(dnf f-op "primary opcode" () 24 7)
1516(dnf f-ope1 "extended opcode" () 11 6)
1517(dnf f-ope2 "extended opcode" () 9 4)
1518(dnf f-ope3 "extended opcode" () 15 3)
1519(dnf f-ope4 "extended opcode" () 7 2)
1520
1521(dnf f-GRi "source register 1" () 17 6)
1522(dnf f-GRj "source register 2" () 5 6)
1523(dnf f-GRk "destination register" () 30 6)
1524
1525(dnf f-FRi "source register 1" () 17 6)
1526(dnf f-FRj "source register 2" () 5 6)
1527(dnf f-FRk "destination register" () 30 6)
1528
1529(dnf f-CPRi "source register 1" () 17 6)
1530(dnf f-CPRj "source register 2" () 5 6)
1531(dnf f-CPRk "destination register" () 30 6)
1532
1533(dnf f-ACCGi "source register" () 17 6)
1534(dnf f-ACCGk "destination register" () 30 6)
1535
1536(dnf f-ACC40Si "40 bit signed accumulator" () 17 6)
1537(dnf f-ACC40Ui "40 bit unsigned accumulator" () 17 6)
1538(dnf f-ACC40Sk "40 bit accumulator" () 30 6)
1539(dnf f-ACC40Uk "40 bit accumulator" () 30 6)
1540
1541(dnf f-CRi "source register" () 14 3)
1542(dnf f-CRj "source register" () 2 3)
1543(dnf f-CRk "destination register" () 27 3)
1544(dnf f-CCi "condition register" () 11 3)
1545
1546(df f-CRj_int "target cr for ck insns" () 26 2 UINT
1547 ((value pc) (sub WI value 4))
1548 ((value pc) (add WI value 4))
1549)
1550(dnf f-CRj_float "target cr for fck insns" () 26 2)
1551
1552(dnf f-ICCi_1 "condition register" () 11 2)
1553(dnf f-ICCi_2 "condition register" () 26 2)
1554(dnf f-ICCi_3 "condition register" () 1 2)
1555(dnf f-FCCi_1 "condition register" () 11 2)
1556(dnf f-FCCi_2 "condition register" () 26 2)
1557(dnf f-FCCi_3 "condition register" () 1 2)
1558(dnf f-FCCk "condition register" () 26 2)
1559(dnf f-eir "exception insn register" () 17 6)
1560
1561(df f-s10 "10 bit sign extended" () 9 10 INT #f #f)
1562(df f-s12 "12 bit sign extended" () 11 12 INT #f #f)
1563(df f-d12 "12 bit sign extended" () 11 12 INT #f #f)
1564(df f-u16 "16 bit unsigned" () 15 16 UINT #f #f)
1565(df f-s16 "16 bit sign extended" () 15 16 INT #f #f)
1566(df f-s6 "6 bit signed" () 5 6 INT #f #f)
1567(df f-s6_1 "6 bit signed" () 11 6 INT #f #f)
1568(df f-u6 "6 bit unsigned" () 5 6 UINT #f #f)
1569(df f-s5 "5 bit signed" () 4 5 INT #f #f)
1570
1571(df f-u12-h "upper 6 bits of u12" () 17 6 INT #f #f)
1572(df f-u12-l "lower 6 bits of u12" () 5 6 UINT #f #f)
1573(dnmf f-u12 "12 bit signed immediate" () INT
1574 (f-u12-h f-u12-l)
1575 (sequence () ; insert
1576 (set (ifield f-u12-h) (sra SI (ifield f-u12) 6))
1577 (set (ifield f-u12-l) (and (ifield f-u12) #x3f))
1578 )
1579 (sequence () ; extract
1580 (set (ifield f-u12) (or (sll (ifield f-u12-h) 6)
1581 (ifield f-u12-l)))
1582 )
1583)
1584
1585(dnf f-int-cc "integer branch conditions" () 30 4)
1586(dnf f-flt-cc "floating branch conditions" () 30 4)
1587(df f-cond "conditional arithmetic" () 8 1 UINT #f #f)
1588(df f-ccond "lr branch condition" () 12 1 UINT #f #f)
1589(df f-hint "2 bit branch prediction hint" () 17 2 UINT #f #f)
1590(df f-LI "link indicator" () 25 1 UINT #f #f)
1591(df f-lock "cache lock indicator" () 25 1 UINT #f #f)
1592(df f-debug "debug mode indicator" () 25 1 UINT #f #f)
1593(df f-A "all accumulator bit" () 17 1 UINT #f #f)
1594(df f-ae "cache all entries indicator" () 25 1 UINT #f #f)
1595
1596(dnf f-spr-h "upper 6 bits of spr" () 30 6)
1597(dnf f-spr-l "lower 6 bits of spr" () 17 6)
1598(dnmf f-spr "special purpose register" () UINT
1599 (f-spr-h f-spr-l)
1600 (sequence () ; insert
1601 (set (ifield f-spr-h) (srl (ifield f-spr) (const 6)))
1602 (set (ifield f-spr-l) (and (ifield f-spr) (const #x3f)))
1603 )
1604 (sequence () ; extract
1605 (set (ifield f-spr) (or (sll (ifield f-spr-h) (const 6))
1606 (ifield f-spr-l)))
1607 )
1608)
1609
1610(df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
1611 ((value pc) (sra WI (sub WI value pc) (const 2)))
1612 ((value pc) (add WI (sll WI value (const 2)) pc))
1613)
1614
1615(df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f)
1616(dnf f-labelL18 "lower 18 bits of label24" () 17 18)
1617(dnmf f-label24 "26 bit signed offset" (PCREL-ADDR) INT
1618 (f-labelH6 f-labelL18)
1619 ; insert
1620 (sequence ()
1621 (set (ifield f-labelH6)
1622 (sra WI (sub (ifield f-label24) pc) (const 20)))
1623 (set (ifield f-labelL18)
1624 (and (srl (sub (ifield f-label24) pc) (const 2))
1625 (const #x3ffff)))
1626 )
1627 ; extract
1628 (sequence ()
1629 (set (ifield f-label24)
1630 (add (sll (or (sll (ifield f-labelH6) (const 18))
1631 (ifield f-labelL18))
1632 (const 2))
1633 pc)))
1634)
1635
1636(dnf f-ICCi_1-null "null field" (RESERVED) 11 2)
1637(dnf f-ICCi_2-null "null field" (RESERVED) 26 2)
1638(dnf f-ICCi_3-null "null field" (RESERVED) 1 2)
1639(dnf f-FCCi_1-null "null field" (RESERVED) 11 2)
1640(dnf f-FCCi_2-null "null field" (RESERVED) 26 2)
1641(dnf f-FCCi_3-null "null field" (RESERVED) 1 2)
1642(dnf f-rs-null "null field" (RESERVED) 17 6)
1643(dnf f-GRi-null "null field" (RESERVED) 17 6)
1644(dnf f-GRj-null "null field" (RESERVED) 5 6)
1645(dnf f-GRk-null "null field" (RESERVED) 30 6)
1646(dnf f-FRi-null "null field" (RESERVED) 17 6)
1647(dnf f-FRj-null "null field" (RESERVED) 5 6)
1648(dnf f-ACCj-null "null field" (RESERVED) 5 6)
1649(dnf f-rd-null "null field" (RESERVED) 30 6)
1650(dnf f-cond-null "null field" (RESERVED) 30 4)
1651(dnf f-ccond-null "null field" (RESERVED) 12 1)
1652(dnf f-s12-null "null field" (RESERVED) 11 12)
1653(dnf f-label16-null "null field" (RESERVED) 15 16)
1654(dnf f-misc-null-1 "null field" (RESERVED) 30 5)
1655(dnf f-misc-null-2 "null field" (RESERVED) 11 6)
1656(dnf f-misc-null-3 "null field" (RESERVED) 11 4)
1657(dnf f-misc-null-4 "null field" (RESERVED) 17 2)
1658(dnf f-misc-null-5 "null field" (RESERVED) 17 16)
1659(dnf f-misc-null-6 "null field" (RESERVED) 30 3)
1660(dnf f-misc-null-7 "null field" (RESERVED) 17 3)
1661(dnf f-misc-null-8 "null field" (RESERVED) 5 3)
1662(dnf f-misc-null-9 "null field" (RESERVED) 5 4)
1663(dnf f-misc-null-10 "null field" (RESERVED) 16 5)
1664(dnf f-misc-null-11 "null field" (RESERVED) 5 1)
1665
1666(dnf f-LI-off "null field" (RESERVED) 25 1)
1667(dnf f-LI-on "null field" (RESERVED) 25 1)
1668\f
1669; Enums.
1670
1671; insn-op:
1672; FIXME: should use die macro or some such
1673(define-normal-insn-enum insn-op "insn op enums" () OP_ f-op
1674 (
1675 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
1676 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
1677 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
1678 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
1679 "40" "41" "42" "43" "44" "45" "46" "47" "48" "49" "4A" "4B" "4C" "4D" "4E" "4F"
1680 "50" "51" "52" "53" "54" "55" "56" "57" "58" "59" "5A" "5B" "5C" "5D" "5E" "5F"
1681 "60" "61" "62" "63" "64" "65" "66" "67" "68" "69" "6A" "6B" "6C" "6D" "6E" "6F"
1682 "70" "71" "72" "73" "74" "75" "76" "77" "78" "79" "7A" "7B" "7C" "7D" "7E" "7F"
1683 )
1684)
1685
1686(define-normal-insn-enum insn-ope1 "insn ope enums" () OPE1_ f-ope1
1687 (
1688 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
1689 "10" "11" "12" "13" "14" "15" "16" "17" "18" "19" "1A" "1B" "1C" "1D" "1E" "1F"
1690 "20" "21" "22" "23" "24" "25" "26" "27" "28" "29" "2A" "2B" "2C" "2D" "2E" "2F"
1691 "30" "31" "32" "33" "34" "35" "36" "37" "38" "39" "3A" "3B" "3C" "3D" "3E" "3F"
1692 )
1693)
1694
1695(define-normal-insn-enum insn-ope2 "insn ope enums" () OPE2_ f-ope2
1696 (
1697 "00" "01" "02" "03" "04" "05" "06" "07" "08" "09" "0A" "0B" "0C" "0D" "0E" "0F"
1698 )
1699)
1700
1701(define-normal-insn-enum insn-ope3 "insn ope enums" () OPE3_ f-ope3
1702 (
1703 "00" "01" "02" "03" "04" "05" "06" "07"
1704 )
1705)
1706
1707(define-normal-insn-enum insn-ope4 "insn ope enums" () OPE4_ f-ope4
1708 (
1709 "0" "1" "2" "3"
1710 )
1711)
1712
1713; int-cc: integer branch conditions
1714; FIXME: should use die macro or some such
1715(define-normal-insn-enum int-cc "integer branch cond enums" () ICC_ f-int-cc
1716 (
1717 "nev" "c" "v" "lt" "eq" "ls" "n" "le"
1718 "ra" "nc" "nv" "ge" "ne" "hi" "p" "gt"
1719 )
1720)
1721
1722; flt-cc: floating-point/media branch conditions
1723; FIXME: should use die macro or some such
1724(define-normal-insn-enum flt-cc "float branch cond enums" () FCC_ f-flt-cc
1725 ("nev" "u" "gt" "ug" "lt" "ul" "lg" "ne"
1726 "eq" "ue" "ge" "uge" "le" "ule" "o" "ra")
1727)
1728\f
1729; Hardware pieces.
1730; These entries list the elements of the raw hardware.
1731; They're also used to provide tables and other elements of the assembly
1732; language.
1733(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
1734
1735; The PSR. The individual fields are referenced more than the entire
1736; register, so reference them directly. We can assemble the
1737; entire register contents when necessary.
1738;
1739(dsh h-psr_imple "PSR.IMPLE" () (register UQI))
1740(dsh h-psr_ver "PSR.VER" () (register UQI))
1741(dsh h-psr_ice "PSR.ICE bit" () (register BI))
1742(dsh h-psr_nem "PSR.NEM bit" () (register BI))
1743(dsh h-psr_cm "PSR.CM bit" () (register BI))
1744(dsh h-psr_be "PSR.BE bit" () (register BI))
1745(dsh h-psr_esr "PSR.ESR bit" () (register BI))
1746(dsh h-psr_ef "PSR.EF bit" () (register BI))
1747(dsh h-psr_em "PSR.EM bit" () (register BI))
1748(dsh h-psr_pil "PSR.PIL " () (register UQI))
1749(dsh h-psr_ps "PSR.PS bit" () (register BI))
1750(dsh h-psr_et "PSR.ET bit" () (register BI))
1751
1752; PSR.S requires special handling because the shadow registers (SR0-SR4) must
1753; be switched with GR4-GR7 when changing from user to supervisor mode or
1754; vice-versa.
1755(define-hardware
1756 (name h-psr_s)
1757 (comment "PSR.S bit")
1758 (attrs)
1759 (type register BI)
1760 (get)
1761 (set (newval) (c-call VOID "@cpu@_h_psr_s_set_handler" newval))
1762)
1763
1764; The TBR. The individual bits are referenced more than the entire
1765; register, so reference them directly. We can assemble the
1766; entire register contents when necessary.
1767;
1768(dsh h-tbr_tba "TBR.TBA" () (register UWI))
1769(dsh h-tbr_tt "TBR.TT" () (register UQI))
1770
1771; The BPSR. The individual bits are referenced more than the entire
1772; register, so reference them directly. We can assemble the
1773; entire register contents when necessary.
1774;
1775(dsh h-bpsr_bs "PSR.S bit" () (register BI))
1776(dsh h-bpsr_bet "PSR.ET bit" () (register BI))
1777
1778; General registers
1779;
1780(define-keyword
1781 (name gr-names)
1782 (print-name h-gr)
1783 (prefix "")
1784 (values
1785 (sp 1) (fp 2)
1786 (gr0 0)(gr1 1)(gr2 2)(gr3 3)(gr4 4)(gr5 5)(gr6 6)(gr7 7)
1787 (gr8 8)(gr9 9)(gr10 10)(gr11 11)(gr12 12)(gr13 13)(gr14 14)(gr15 15)
1788 (gr16 16)(gr17 17)(gr18 18)(gr19 19)(gr20 20)(gr21 21)(gr22 22)(gr23 23)
1789 (gr24 24)(gr25 25)(gr26 26)(gr27 27)(gr28 28)(gr29 29)(gr30 30)(gr31 31)
1790 (gr32 32)(gr33 33)(gr34 34)(gr35 35)(gr36 36)(gr37 37)(gr38 38)(gr39 39)
1791 (gr40 40)(gr41 41)(gr42 42)(gr43 43)(gr44 44)(gr45 45)(gr46 46)(gr47 47)
1792 (gr48 48)(gr49 49)(gr50 50)(gr51 51)(gr52 52)(gr53 53)(gr54 54)(gr55 55)
1793 (gr56 56)(gr57 57)(gr58 58)(gr59 59)(gr60 60)(gr61 61)(gr62 62)(gr63 63)
1794 )
1795)
1796
1797(define-hardware
1798 (name h-gr)
1799 (comment "general registers")
1800 (attrs PROFILE)
1801 (type register USI (64))
1802 (indices extern-keyword gr-names)
1803 (get (index) (c-call WI "@cpu@_h_gr_get_handler" index))
1804 (set (index newval) (c-call VOID "@cpu@_h_gr_set_handler" index newval))
1805)
1806
1807; General Registers as double words
1808; These registers are shadowed onto h-gr
1809(define-hardware
1810 (name h-gr_double)
1811 (comment "general registers as double words")
1812 (attrs PROFILE VIRTUAL)
1813 (type register DI (32))
1814 ; FIXME: Need constraint to prohibit odd numbers.
1815 (indices extern-keyword gr-names)
1816 (get (index)
1817 (c-call DI "@cpu@_h_gr_double_get_handler" index))
1818 (set (index newval)
1819 (c-call VOID "@cpu@_h_gr_double_set_handler" index newval))
1820)
1821
1822; General Registers as high and low half words
1823; These registers are shadowed onto h-gr
1824(define-hardware
1825 (name h-gr_hi)
1826 (comment "general registers as high half word")
1827 (attrs PROFILE VIRTUAL)
1828 (type register UHI (64))
1829 (indices extern-keyword gr-names)
1830 (get (index) (c-call UHI "@cpu@_h_gr_hi_get_handler" index))
1831 (set (index newval) (c-call VOID "@cpu@_h_gr_hi_set_handler" index newval))
1832)
1833(define-hardware
1834 (name h-gr_lo)
1835 (comment "general registers as low half word")
1836 (attrs PROFILE VIRTUAL)
1837 (type register UHI (64))
1838 (indices extern-keyword gr-names)
1839 (get (index) (c-call UHI "@cpu@_h_gr_lo_get_handler" index))
1840 (set (index newval) (c-call VOID "@cpu@_h_gr_lo_set_handler" index newval))
1841)
1842
1843; Floating Point Registers
1844(define-keyword
1845 (name fr-names)
1846 (print-name h-fr)
1847 (prefix "")
1848 (values
1849 (fr0 0)(fr1 1)(fr2 2)(fr3 3)(fr4 4)(fr5 5)(fr6 6)(fr7 7)
1850 (fr8 8)(fr9 9)(fr10 10)(fr11 11)(fr12 12)(fr13 13)(fr14 14)(fr15 15)
1851 (fr16 16)(fr17 17)(fr18 18)(fr19 19)(fr20 20)(fr21 21)(fr22 22)(fr23 23)
1852 (fr24 24)(fr25 25)(fr26 26)(fr27 27)(fr28 28)(fr29 29)(fr30 30)(fr31 31)
1853 (fr32 32)(fr33 33)(fr34 34)(fr35 35)(fr36 36)(fr37 37)(fr38 38)(fr39 39)
1854 (fr40 40)(fr41 41)(fr42 42)(fr43 43)(fr44 44)(fr45 45)(fr46 46)(fr47 47)
1855 (fr48 48)(fr49 49)(fr50 50)(fr51 51)(fr52 52)(fr53 53)(fr54 54)(fr55 55)
1856 (fr56 56)(fr57 57)(fr58 58)(fr59 59)(fr60 60)(fr61 61)(fr62 62)(fr63 63)
1857 )
1858)
1859
1860(define-hardware
1861 (name h-fr)
1862 (comment "floating point registers")
1863 (attrs PROFILE)
1864 (type register SF (64))
1865 (indices extern-keyword fr-names)
1866 (get (index) (c-call SF "@cpu@_h_fr_get_handler" index))
1867 (set (index newval) (c-call VOID "@cpu@_h_fr_set_handler" index newval))
1868)
1869
1870; Floating Point Registers as double precision
1871; These registers are shadowed onto h-fr
1872
1873(define-hardware
1874 (name h-fr_double)
1875 (comment "floating point registers as double precision")
1876 (attrs PROFILE VIRTUAL)
1877 (type register DF (32))
1878 ; FIXME: Need constraint to prohibit odd numbers.
1879 (indices extern-keyword fr-names)
1880 (get (index)
1881 (c-call DF "@cpu@_h_fr_double_get_handler" index))
1882 (set (index newval)
1883 (c-call VOID "@cpu@_h_fr_double_set_handler" index newval))
1884)
1885
1886; Floating Point Registers as integer words.
1887; These registers are shadowed onto h-fr
1888
1889(define-hardware
1890 (name h-fr_int)
1891 (comment "floating point registers as integers")
1892 (attrs PROFILE VIRTUAL)
1893 (type register USI (64))
1894 (indices extern-keyword fr-names)
1895 (get (index)
1896 (c-call USI "@cpu@_h_fr_int_get_handler" index))
1897 (set (index newval)
1898 (c-call VOID "@cpu@_h_fr_int_set_handler" index newval))
1899)
1900
1901; Floating Point Registers as high and low half words
1902; These registers are shadowed onto h-fr
1903(define-hardware
1904 (name h-fr_hi)
1905 (comment "floating point registers as unsigned high half word")
1906 (attrs PROFILE VIRTUAL)
1907 (type register UHI (64))
1908 (indices extern-keyword fr-names)
1909 (get (regno) (srl (reg h-fr_int regno) 16))
1910 (set (regno newval) (set (reg h-fr_int regno)
1911 (or (and (reg h-fr_int regno) #xffff)
1912 (sll newval 16))))
1913)
1914(define-hardware
1915 (name h-fr_lo)
1916 (comment "floating point registers as unsigned low half word")
1917 (attrs PROFILE VIRTUAL)
1918 (type register UHI (64))
1919 (indices extern-keyword fr-names)
1920 (get (regno) (and (reg h-fr_int regno) #xffff))
1921 (set (regno newval) (set (reg h-fr_int regno)
1922 (or (and (reg h-fr_int regno) #xffff0000)
1923 (and newval #xffff))))
1924)
1925
1926; Floating Point Registers as unsigned bytes
1927; These registers are shadowed onto h-fr
1928(define-hardware
1929 (name h-fr_0)
1930 (comment "floating point registers as unsigned byte 0")
1931 (attrs PROFILE VIRTUAL)
1932 (type register UHI (64))
1933 (indices extern-keyword fr-names)
1934 (get (regno) (and (reg h-fr_int regno) #xff))
1935 (set (regno newval)
1936 (sequence ()
1937 (if (gt USI newval #xff)
1938 (set newval #xff))
1939 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffffff00)
1940 newval))))
1941)
1942(define-hardware
1943 (name h-fr_1)
1944 (comment "floating point registers as unsigned byte 1")
1945 (attrs PROFILE VIRTUAL)
1946 (type register UHI (64))
1947 (indices extern-keyword fr-names)
1948 (get (regno) (and (srl (reg h-fr_int regno) 8) #xff))
1949 (set (regno newval)
1950 (sequence ()
1951 (if (gt USI newval #xff)
1952 (set newval #xff))
1953 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xffff00ff)
1954 (sll newval 8)))))
1955)
1956(define-hardware
1957 (name h-fr_2)
1958 (comment "floating point registers as unsigned byte 2")
1959 (attrs PROFILE VIRTUAL)
1960 (type register UHI (64))
1961 (indices extern-keyword fr-names)
1962 (get (regno) (and (srl (reg h-fr_int regno) 16) #xff))
1963 (set (regno newval)
1964 (sequence ()
1965 (if (gt USI newval #xff)
1966 (set newval #xff))
1967 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #xff00ffff)
1968 (sll newval 16)))))
1969)
1970(define-hardware
1971 (name h-fr_3)
1972 (comment "floating point registers as unsigned byte 3")
1973 (attrs PROFILE VIRTUAL)
1974 (type register UHI (64))
1975 (indices extern-keyword fr-names)
1976 (get (regno) (and (srl (reg h-fr_int regno) 24) #xff))
1977 (set (regno newval)
1978 (sequence ()
1979 (if (gt USI newval #xff)
1980 (set newval #xff))
1981 (set (reg h-fr_int regno) (or (and (reg h-fr_int regno) #x00ffffff)
1982 (sll newval 24)))))
1983)
1984; Coprocessor Registers
1985;
1986(define-keyword
1987 (name cpr-names)
1988 (print-name h-cpr)
1989 (prefix "")
1990 (values
1991(cpr0 0)(cpr1 1)(cpr2 2)(cpr3 3)(cpr4 4)(cpr5 5)(cpr6 6)(cpr7 7)
1992(cpr8 8)(cpr9 9)(cpr10 10)(cpr11 11)(cpr12 12)(cpr13 13)(cpr14 14)(cpr15 15)
1993(cpr16 16)(cpr17 17)(cpr18 18)(cpr19 19)(cpr20 20)(cpr21 21)(cpr22 22)(cpr23 23)
1994(cpr24 24)(cpr25 25)(cpr26 26)(cpr27 27)(cpr28 28)(cpr29 29)(cpr30 30)(cpr31 31)
1995(cpr32 32)(cpr33 33)(cpr34 34)(cpr35 35)(cpr36 36)(cpr37 37)(cpr38 38)(cpr39 39)
1996(cpr40 40)(cpr41 41)(cpr42 42)(cpr43 43)(cpr44 44)(cpr45 45)(cpr46 46)(cpr47 47)
1997(cpr48 48)(cpr49 49)(cpr50 50)(cpr51 51)(cpr52 52)(cpr53 53)(cpr54 54)(cpr55 55)
1998(cpr56 56)(cpr57 57)(cpr58 58)(cpr59 59)(cpr60 60)(cpr61 61)(cpr62 62)(cpr63 63)
1999 )
2000)
2001
2002(define-hardware
2003 (name h-cpr)
2004 (comment "coprocessor registers")
2005 (attrs PROFILE (MACH frv))
2006 (type register WI (64))
2007 (indices extern-keyword cpr-names)
2008)
2009
2010; Coprocessor Registers as double words
2011; These registers are shadowed onto h-cpr
2012(define-hardware
2013 (name h-cpr_double)
2014 (comment "coprocessor registers as double words")
2015 (attrs PROFILE VIRTUAL (MACH frv))
2016 (type register DI (32))
2017 ; FIXME: Need constraint to prohibit odd numbers.
2018 (indices extern-keyword cpr-names)
2019 (get (index)
2020 (c-call DI "@cpu@_h_cpr_double_get_handler" index))
2021 (set (index newval)
2022 (c-call VOID "@cpu@_h_cpr_double_set_handler" index newval))
2023)
2024
2025; Special Purpose Registers
2026;
2027(define-keyword
2028 (name spr-names)
2029 (print-name h-spr)
2030 (prefix "")
2031 (values
2032 (psr 0) (pcsr 1) (bpcsr 2) (tbr 3) (bpsr 4)
2033
2034 (hsr0 16) (hsr1 17) (hsr2 18) (hsr3 19)
2035 (hsr4 20) (hsr5 21) (hsr6 22) (hsr7 23)
2036 (hsr8 24) (hsr9 25) (hsr10 26) (hsr11 27)
2037 (hsr12 28) (hsr13 29) (hsr14 30) (hsr15 31)
2038 (hsr16 32) (hsr17 33) (hsr18 34) (hsr19 35)
2039 (hsr20 36) (hsr21 37) (hsr22 38) (hsr23 39)
2040 (hsr24 40) (hsr25 41) (hsr26 42) (hsr27 43)
2041 (hsr28 44) (hsr29 45) (hsr30 46) (hsr31 47)
2042 (hsr32 48) (hsr33 49) (hsr34 50) (hsr35 51)
2043 (hsr36 52) (hsr37 53) (hsr38 54) (hsr39 55)
2044 (hsr40 56) (hsr41 57) (hsr42 58) (hsr43 59)
2045 (hsr44 60) (hsr45 61) (hsr46 62) (hsr47 63)
2046 (hsr48 64) (hsr49 65) (hsr50 66) (hsr51 67)
2047 (hsr52 68) (hsr53 69) (hsr54 70) (hsr55 71)
2048 (hsr56 72) (hsr57 73) (hsr58 74) (hsr59 75)
2049 (hsr60 76) (hsr61 77) (hsr62 78) (hsr63 79)
2050
ac7c07ac 2051 (ccr 256) (cccr 263) (lr 272) (lcr 273) (iacc0h 280) (iacc0l 281) (isr 288)
9aab5aa3
AC		 2052
2053 (neear0 352) (neear1 353) (neear2 354) (neear3 355)
2054 (neear4 356) (neear5 357) (neear6 358) (neear7 359)
2055 (neear8 360) (neear9 361) (neear10 362) (neear11 363)
2056 (neear12 364) (neear13 365) (neear14 366) (neear15 367)
2057 (neear16 368) (neear17 369) (neear18 370) (neear19 371)
2058 (neear20 372) (neear21 373) (neear22 374) (neear23 375)
2059 (neear24 376) (neear25 377) (neear26 378) (neear27 379)
2060 (neear28 380) (neear29 381) (neear30 382) (neear31 383)
2061
2062 (nesr0 384) (nesr1 385) (nesr2 386) (nesr3 387)
2063 (nesr4 388) (nesr5 389) (nesr6 390) (nesr7 391)
2064 (nesr8 392) (nesr9 393) (nesr10 394) (nesr11 395)
2065 (nesr12 396) (nesr13 397) (nesr14 398) (nesr15 399)
2066 (nesr16 400) (nesr17 401) (nesr18 402) (nesr19 403)
2067 (nesr20 404) (nesr21 405) (nesr22 406) (nesr23 407)
2068 (nesr24 408) (nesr25 409) (nesr26 410) (nesr27 411)
2069 (nesr28 412) (nesr29 413) (nesr30 414) (nesr31 415)
2070
2071 (necr 416)
2072
2073 (gner0 432) (gner1 433)
2074
2075 (fner0 434) (fner1 435)
2076
2077 (epcr0 512) (epcr1 513) (epcr2 514) (epcr3 515)
2078 (epcr4 516) (epcr5 517) (epcr6 518) (epcr7 519)
2079 (epcr8 520) (epcr9 521) (epcr10 522) (epcr11 523)
2080 (epcr12 524) (epcr13 525) (epcr14 526) (epcr15 527)
2081 (epcr16 528) (epcr17 529) (epcr18 530) (epcr19 531)
2082 (epcr20 532) (epcr21 533) (epcr22 534) (epcr23 535)
2083 (epcr24 536) (epcr25 537) (epcr26 538) (epcr27 539)
2084 (epcr28 540) (epcr29 541) (epcr30 542) (epcr31 543)
2085 (epcr32 544) (epcr33 545) (epcr34 546) (epcr35 547)
2086 (epcr36 548) (epcr37 549) (epcr38 550) (epcr39 551)
2087 (epcr40 552) (epcr41 553) (epcr42 554) (epcr43 555)
2088 (epcr44 556) (epcr45 557) (epcr46 558) (epcr47 559)
2089 (epcr48 560) (epcr49 561) (epcr50 562) (epcr51 563)
2090 (epcr52 564) (epcr53 565) (epcr54 566) (epcr55 567)
2091 (epcr56 568) (epcr57 569) (epcr58 570) (epcr59 571)
2092 (epcr60 572) (epcr61 573) (epcr62 574) (epcr63 575)
2093
2094 (esr0 576) (esr1 577) (esr2 578) (esr3 579)
2095 (esr4 580) (esr5 581) (esr6 582) (esr7 583)
2096 (esr8 584) (esr9 585) (esr10 586) (esr11 587)
2097 (esr12 588) (esr13 589) (esr14 590) (esr15 591)
2098 (esr16 592) (esr17 593) (esr18 594) (esr19 595)
2099 (esr20 596) (esr21 597) (esr22 598) (esr23 599)
2100 (esr24 600) (esr25 601) (esr26 602) (esr27 603)
2101 (esr28 604) (esr29 605) (esr30 606) (esr31 607)
2102 (esr32 608) (esr33 609) (esr34 610) (esr35 611)
2103 (esr36 612) (esr37 613) (esr38 614) (esr39 615)
2104 (esr40 616) (esr41 617) (esr42 618) (esr43 619)
2105 (esr44 620) (esr45 621) (esr46 622) (esr47 623)
2106 (esr48 624) (esr49 625) (esr50 626) (esr51 627)
2107 (esr52 628) (esr53 629) (esr54 630) (esr55 631)
2108 (esr56 632) (esr57 633) (esr58 634) (esr59 635)
2109 (esr60 636) (esr61 637) (esr62 638) (esr63 639)
2110
2111 (eir0 640) (eir1 641) (eir2 642) (eir3 643)
2112 (eir4 644) (eir5 645) (eir6 646) (eir7 647)
2113 (eir8 648) (eir9 649) (eir10 650) (eir11 651)
2114 (eir12 652) (eir13 653) (eir14 654) (eir15 655)
2115 (eir16 656) (eir17 657) (eir18 658) (eir19 659)
2116 (eir20 660) (eir21 661) (eir22 662) (eir23 663)
2117 (eir24 664) (eir25 665) (eir26 666) (eir27 667)
2118 (eir28 668) (eir29 669) (eir30 670) (eir31 671)
2119
2120 (esfr0 672) (esfr1 673)
2121
2122 (sr0 768) (sr1 769) (sr2 770) (sr3 771)
2123
2124 (fsr0 1024) (fsr1 1025) (fsr2 1026) (fsr3 1027)
2125 (fsr4 1028) (fsr5 1029) (fsr6 1030) (fsr7 1031)
2126 (fsr8 1032) (fsr9 1033) (fsr10 1034) (fsr11 1035)
2127 (fsr12 1036) (fsr13 1037) (fsr14 1038) (fsr15 1039)
2128 (fsr16 1040) (fsr17 1041) (fsr18 1042) (fsr19 1043)
2129 (fsr20 1044) (fsr21 1045) (fsr22 1046) (fsr23 1047)
2130 (fsr24 1048) (fsr25 1049) (fsr26 1050) (fsr27 1051)
2131 (fsr28 1052) (fsr29 1053) (fsr30 1054) (fsr31 1055)
2132 (fsr32 1056) (fsr33 1057) (fsr34 1058) (fsr35 1059)
2133 (fsr36 1060) (fsr37 1061) (fsr38 1062) (fsr39 1063)
2134 (fsr40 1064) (fsr41 1065) (fsr42 1066) (fsr43 1067)
2135 (fsr44 1068) (fsr45 1069) (fsr46 1070) (fsr47 1071)
2136 (fsr48 1072) (fsr49 1073) (fsr50 1074) (fsr51 1075)
2137 (fsr52 1076) (fsr53 1077) (fsr54 1078) (fsr55 1079)
2138 (fsr56 1080) (fsr57 1081) (fsr58 1082) (fsr59 1083)
2139 (fsr60 1084) (fsr61 1085) (fsr62 1086) (fsr63 1087)
2140
2141 ; FQ0-FQ31 are 64 bit registers.
2142 ; These names allow access to the upper 32 bits of the FQ registers.
2143 (fqop0 1088) (fqop1 1090) (fqop2 1092) (fqop3 1094)
2144 (fqop4 1096) (fqop5 1098) (fqop6 1100) (fqop7 1102)
2145 (fqop8 1104) (fqop9 1106) (fqop10 1108) (fqop11 1110)
2146 (fqop12 1112) (fqop13 1114) (fqop14 1116) (fqop15 1118)
2147 (fqop16 1120) (fqop17 1122) (fqop18 1124) (fqop19 1126)
2148 (fqop20 1128) (fqop21 1130) (fqop22 1132) (fqop23 1134)
2149 (fqop24 1136) (fqop25 1138) (fqop26 1140) (fqop27 1142)
2150 (fqop28 1144) (fqop29 1146) (fqop30 1148) (fqop31 1150)
2151 ; These names allow access to the lower 32 bits of the FQ registers.
2152 (fqst0 1089) (fqst1 1091) (fqst2 1093) (fqst3 1095)
2153 (fqst4 1097) (fqst5 1099) (fqst6 1101) (fqst7 1103)
2154 (fqst8 1105) (fqst9 1107) (fqst10 1109) (fqst11 1111)
2155 (fqst12 1113) (fqst13 1115) (fqst14 1117) (fqst15 1119)
2156 (fqst16 1121) (fqst17 1123) (fqst18 1125) (fqst19 1127)
2157 (fqst20 1129) (fqst21 1131) (fqst22 1133) (fqst23 1135)
2158 (fqst24 1137) (fqst25 1139) (fqst26 1141) (fqst27 1143)
2159 (fqst28 1145) (fqst29 1147) (fqst30 1149) (fqst31 1151)
2160 ; These also access the lower 32 bits of the FQ registers.
2161 ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2162; (fq0 1089) (fq1 1091) (fq2 1093) (fq3 1095)
2163; (fq4 1097) (fq5 1099) (fq6 1101) (fq7 1103)
2164; (fq8 1105) (fq9 1107) (fq10 1109) (fq11 1111)
2165; (fq12 1113) (fq13 1115) (fq14 1117) (fq15 1119)
2166; (fq16 1121) (fq17 1123) (fq18 1125) (fq19 1127)
2167; (fq20 1129) (fq21 1131) (fq22 1133) (fq23 1135)
2168; (fq24 1137) (fq25 1139) (fq26 1141) (fq27 1143)
2169; (fq28 1145) (fq29 1147) (fq30 1149) (fq31 1151)
2170
2171 (mcilr0 1272) (mcilr1 1273)
2172
2173 (msr0 1280) (msr1 1281) (msr2 1282) (msr3 1283)
2174 (msr4 1284) (msr5 1285) (msr6 1286) (msr7 1287)
2175 (msr8 1288) (msr9 1289) (msr10 1290) (msr11 1291)
2176 (msr12 1292) (msr13 1293) (msr14 1294) (msr15 1295)
2177 (msr16 1296) (msr17 1297) (msr18 1298) (msr19 1299)
2178 (msr20 1300) (msr21 1301) (msr22 1302) (msr23 1303)
2179 (msr24 1304) (msr25 1305) (msr26 1306) (msr27 1307)
2180 (msr28 1308) (msr29 1309) (msr30 1310) (msr31 1311)
2181 (msr32 1312) (msr33 1313) (msr34 1314) (msr35 1315)
2182 (msr36 1316) (msr37 1317) (msr38 1318) (msr39 1319)
2183 (msr40 1320) (msr41 1321) (msr42 1322) (msr43 1323)
2184 (msr44 1324) (msr45 1325) (msr46 1326) (msr47 1327)
2185 (msr48 1328) (msr49 1329) (msr50 1330) (msr51 1331)
2186 (msr52 1332) (msr53 1333) (msr54 1334) (msr55 1335)
2187 (msr56 1336) (msr57 1337) (msr58 1338) (msr59 1339)
2188 (msr60 1340) (msr61 1341) (msr62 1342) (msr63 1343)
2189
2190 ; MQ0-MQ31 are 64 bit registers.
2191 ; These names allow access to the upper 32 bits of the MQ registers.
2192 (mqop0 1344) (mqop1 1346) (mqop2 1348) (mqop3 1350)
2193 (mqop4 1352) (mqop5 1354) (mqop6 1356) (mqop7 1358)
2194 (mqop8 1360) (mqop9 1362) (mqop10 1364) (mqop11 1366)
2195 (mqop12 1368) (mqop13 1370) (mqop14 1372) (mqop15 1374)
2196 (mqop16 1376) (mqop17 1378) (mqop18 1380) (mqop19 1382)
2197 (mqop20 1384) (mqop21 1386) (mqop22 1388) (mqop23 1390)
2198 (mqop24 1392) (mqop25 1394) (mqop26 1396) (mqop27 1398)
2199 (mqop28 1400) (mqop29 1402) (mqop30 1404) (mqop31 1406)
2200 ; These names allow access to the lower 32 bits of the MQ registers.
2201 (mqst0 1345) (mqst1 1347) (mqst2 1349) (mqst3 1351)
2202 (mqst4 1353) (mqst5 1355) (mqst6 1357) (mqst7 1359)
2203 (mqst8 1361) (mqst9 1363) (mqst10 1365) (mqst11 1367)
2204 (mqst12 1369) (mqst13 1371) (mqst14 1373) (mqst15 1375)
2205 (mqst16 1377) (mqst17 1379) (mqst18 1381) (mqst19 1383)
2206 (mqst20 1385) (mqst21 1387) (mqst22 1389) (mqst23 1391)
2207 (mqst24 1393) (mqst25 1395) (mqst26 1397) (mqst27 1399)
2208 (mqst28 1401) (mqst29 1403) (mqst30 1405) (mqst31 1407)
2209 ; These also access the lower 32 bits of the MQ registers.
2210 ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2211; (mq0 1345) (mq1 1347) (mq2 1349) (mq3 1351)
2212; (mq4 1353) (mq5 1355) (mq6 1357) (mq7 1359)
2213; (mq8 1361) (mq9 1363) (mq10 1365) (mq11 1367)
2214; (mq12 1369) (mq13 1371) (mq14 1373) (mq15 1375)
2215; (mq16 1377) (mq17 1379) (mq18 1381) (mq19 1383)
2216; (mq20 1385) (mq21 1387) (mq22 1389) (mq23 1391)
2217; (mq24 1393) (mq25 1395) (mq26 1397) (mq27 1399)
2218; (mq28 1401) (mq29 1403) (mq30 1405) (mq31 1407)
2219
2220 ; These are not accessible as spr registers (see LSI appendix - section 13.4)
2221; (acc0 1408) (acc1 1409) (acc2 1410) (acc3 1411)
2222; (acc4 1412) (acc5 1413) (acc6 1414) (acc7 1415)
2223; (acc8 1416) (acc9 1417) (acc10 1418) (acc11 1419)
2224; (acc12 1420) (acc13 1421) (acc14 1422) (acc15 1423)
2225; (acc16 1424) (acc17 1425) (acc18 1426) (acc19 1427)
2226; (acc20 1428) (acc21 1429) (acc22 1430) (acc23 1431)
2227; (acc24 1432) (acc25 1433) (acc26 1434) (acc27 1435)
2228; (acc28 1436) (acc29 1437) (acc30 1438) (acc31 1439)
2229; (acc32 1440) (acc33 1441) (acc34 1442) (acc35 1443)
2230; (acc36 1444) (acc37 1445) (acc38 1446) (acc39 1447)
2231; (acc40 1448) (acc41 1449) (acc42 1450) (acc43 1451)
2232; (acc44 1452) (acc45 1453) (acc46 1454) (acc47 1455)
2233; (acc48 1456) (acc49 1457) (acc50 1458) (acc51 1459)
2234; (acc52 1460) (acc53 1461) (acc54 1462) (acc55 1463)
2235; (acc56 1464) (acc57 1465) (acc58 1466) (acc59 1467)
2236; (acc60 1468) (acc61 1469) (acc62 1470) (acc63 1471)
2237
2238; (accg0 1472) (accg1 1473) (accg2 1474) (accg3 1475)
2239; (accg4 1476) (accg5 1477) (accg6 1478) (accg7 1479)
2240; (accg8 1480) (accg9 1481) (accg10 1482) (accg11 1483)
2241; (accg12 1484) (accg13 1485) (accg14 1486) (accg15 1487)
2242; (accg16 1488) (accg17 1489) (accg18 1490) (accg19 1491)
2243; (accg20 1492) (accg21 1493) (accg22 1494) (accg23 1495)
2244; (accg24 1496) (accg25 1497) (accg26 1498) (accg27 1499)
2245; (accg28 1500) (accg29 1501) (accg30 1502) (accg31 1503)
2246; (accg32 1504) (accg33 1505) (accg34 1506) (accg35 1507)
2247; (accg36 1508) (accg37 1509) (accg38 1510) (accg39 1511)
2248; (accg40 1512) (accg41 1513) (accg42 1514) (accg43 1515)
2249; (accg44 1516) (accg45 1517) (accg46 1518) (accg47 1519)
2250; (accg48 1520) (accg49 1521) (accg50 1522) (accg51 1523)
2251; (accg52 1524) (accg53 1525) (accg54 1526) (accg55 1527)
2252; (accg56 1528) (accg57 1529) (accg58 1530) (accg59 1531)
2253; (accg60 1532) (accg61 1533) (accg62 1534) (accg63 1535)
2254
2255 (ear0 1536) (ear1 1537) (ear2 1538) (ear3 1539)
2256 (ear4 1540) (ear5 1541) (ear6 1542) (ear7 1543)
2257 (ear8 1544) (ear9 1545) (ear10 1546) (ear11 1547)
2258 (ear12 1548) (ear13 1549) (ear14 1550) (ear15 1551)
2259 (ear16 1552) (ear17 1553) (ear18 1554) (ear19 1555)
2260 (ear20 1556) (ear21 1557) (ear22 1558) (ear23 1559)
2261 (ear24 1560) (ear25 1561) (ear26 1562) (ear27 1563)
2262 (ear28 1564) (ear29 1565) (ear30 1566) (ear31 1567)
2263 (ear32 1568) (ear33 1569) (ear34 1570) (ear35 1571)
2264 (ear36 1572) (ear37 1573) (ear38 1574) (ear39 1575)
2265 (ear40 1576) (ear41 1577) (ear42 1578) (ear43 1579)
2266 (ear44 1580) (ear45 1581) (ear46 1582) (ear47 1583)
2267 (ear48 1584) (ear49 1585) (ear50 1586) (ear51 1587)
2268 (ear52 1588) (ear53 1589) (ear54 1590) (ear55 1591)
2269 (ear56 1592) (ear57 1593) (ear58 1594) (ear59 1595)
2270 (ear60 1596) (ear61 1597) (ear62 1598) (ear63 1599)
2271
2272 (edr0 1600) (edr1 1601) (edr2 1602) (edr3 1603)
2273 (edr4 1604) (edr5 1605) (edr6 1606) (edr7 1607)
2274 (edr8 1608) (edr9 1609) (edr10 1610) (edr11 1611)
2275 (edr12 1612) (edr13 1613) (edr14 1614) (edr15 1615)
2276 (edr16 1616) (edr17 1617) (edr18 1618) (edr19 1619)
2277 (edr20 1620) (edr21 1621) (edr22 1622) (edr23 1623)
2278 (edr24 1624) (edr25 1625) (edr26 1626) (edr27 1627)
2279 (edr28 1628) (edr29 1629) (edr30 1630) (edr31 1631)
2280 (edr32 1632) (edr33 1636) (edr34 1634) (edr35 1635)
2281 (edr36 1636) (edr37 1637) (edr38 1638) (edr39 1639)
2282 (edr40 1640) (edr41 1641) (edr42 1642) (edr43 1643)
2283 (edr44 1644) (edr45 1645) (edr46 1646) (edr47 1647)
2284 (edr48 1648) (edr49 1649) (edr50 1650) (edr51 1651)
2285 (edr52 1652) (edr53 1653) (edr54 1654) (edr55 1655)
2286 (edr56 1656) (edr57 1657) (edr58 1658) (edr59 1659)
2287 (edr60 1660) (edr61 1661) (edr62 1662) (edr63 1663)
2288
2289 (iamlr0 1664) (iamlr1 1665) (iamlr2 1666) (iamlr3 1667)
2290 (iamlr4 1668) (iamlr5 1669) (iamlr6 1670) (iamlr7 1671)
2291 (iamlr8 1672) (iamlr9 1673) (iamlr10 1674) (iamlr11 1675)
2292 (iamlr12 1676) (iamlr13 1677) (iamlr14 1678) (iamlr15 1679)
2293 (iamlr16 1680) (iamlr17 1681) (iamlr18 1682) (iamlr19 1683)
2294 (iamlr20 1684) (iamlr21 1685) (iamlr22 1686) (iamlr23 1687)
2295 (iamlr24 1688) (iamlr25 1689) (iamlr26 1690) (iamlr27 1691)
2296 (iamlr28 1692) (iamlr29 1693) (iamlr30 1694) (iamlr31 1695)
2297 (iamlr32 1696) (iamlr33 1697) (iamlr34 1698) (iamlr35 1699)
2298 (iamlr36 1700) (iamlr37 1701) (iamlr38 1702) (iamlr39 1703)
2299 (iamlr40 1704) (iamlr41 1705) (iamlr42 1706) (iamlr43 1707)
2300 (iamlr44 1708) (iamlr45 1709) (iamlr46 1710) (iamlr47 1711)
2301 (iamlr48 1712) (iamlr49 1713) (iamlr50 1714) (iamlr51 1715)
2302 (iamlr52 1716) (iamlr53 1717) (iamlr54 1718) (iamlr55 1719)
2303 (iamlr56 1720) (iamlr57 1721) (iamlr58 1722) (iamlr59 1723)
2304 (iamlr60 1724) (iamlr61 1725) (iamlr62 1726) (iamlr63 1727)
2305
2306 (iampr0 1728) (iampr1 1729) (iampr2 1730) (iampr3 1731)
2307 (iampr4 1732) (iampr5 1733) (iampr6 1734) (iampr7 1735)
2308 (iampr8 1736) (iampr9 1737) (iampr10 1738) (iampr11 1739)
2309 (iampr12 1740) (iampr13 1741) (iampr14 1742) (iampr15 1743)
2310 (iampr16 1744) (iampr17 1745) (iampr18 1746) (iampr19 1747)
2311 (iampr20 1748) (iampr21 1749) (iampr22 1750) (iampr23 1751)
2312 (iampr24 1752) (iampr25 1753) (iampr26 1754) (iampr27 1755)
2313 (iampr28 1756) (iampr29 1757) (iampr30 1758) (iampr31 1759)
2314 (iampr32 1760) (iampr33 1761) (iampr34 1762) (iampr35 1763)
2315 (iampr36 1764) (iampr37 1765) (iampr38 1766) (iampr39 1767)
2316 (iampr40 1768) (iampr41 1769) (iampr42 1770) (iampr43 1771)
2317 (iampr44 1772) (iampr45 1773) (iampr46 1774) (iampr47 1775)
2318 (iampr48 1776) (iampr49 1777) (iampr50 1778) (iampr51 1779)
2319 (iampr52 1780) (iampr53 1781) (iampr54 1782) (iampr55 1783)
2320 (iampr56 1784) (iampr57 1785) (iampr58 1786) (iampr59 1787)
2321 (iampr60 1788) (iampr61 1789) (iampr62 1790) (iampr63 1791)
2322
2323 (damlr0 1792) (damlr1 1793) (damlr2 1794) (damlr3 1795)
2324 (damlr4 1796) (damlr5 1797) (damlr6 1798) (damlr7 1799)
2325 (damlr8 1800) (damlr9 1801) (damlr10 1802) (damlr11 1803)
2326 (damlr12 1804) (damlr13 1805) (damlr14 1806) (damlr15 1807)
2327 (damlr16 1808) (damlr17 1809) (damlr18 1810) (damlr19 1811)
2328 (damlr20 1812) (damlr21 1813) (damlr22 1814) (damlr23 1815)
2329 (damlr24 1816) (damlr25 1817) (damlr26 1818) (damlr27 1819)
2330 (damlr28 1820) (damlr29 1821) (damlr30 1822) (damlr31 1823)
2331 (damlr32 1824) (damlr33 1825) (damlr34 1826) (damlr35 1827)
2332 (damlr36 1828) (damlr37 1829) (damlr38 1830) (damlr39 1831)
2333 (damlr40 1832) (damlr41 1833) (damlr42 1834) (damlr43 1835)
2334 (damlr44 1836) (damlr45 1837) (damlr46 1838) (damlr47 1839)
2335 (damlr48 1840) (damlr49 1841) (damlr50 1842) (damlr51 1843)
2336 (damlr52 1844) (damlr53 1845) (damlr54 1846) (damlr55 1847)
2337 (damlr56 1848) (damlr57 1849) (damlr58 1850) (damlr59 1851)
2338 (damlr60 1852) (damlr61 1853) (damlr62 1854) (damlr63 1855)
2339
2340 (dampr0 1856) (dampr1 1857) (dampr2 1858) (dampr3 1859)
2341 (dampr4 1860) (dampr5 1861) (dampr6 1862) (dampr7 1863)
2342 (dampr8 1864) (dampr9 1865) (dampr10 1866) (dampr11 1867)
2343 (dampr12 1868) (dampr13 1869) (dampr14 1870) (dampr15 1871)
2344 (dampr16 1872) (dampr17 1873) (dampr18 1874) (dampr19 1875)
2345 (dampr20 1876) (dampr21 1877) (dampr22 1878) (dampr23 1879)
2346 (dampr24 1880) (dampr25 1881) (dampr26 1882) (dampr27 1883)
2347 (dampr28 1884) (dampr29 1885) (dampr30 1886) (dampr31 1887)
2348 (dampr32 1888) (dampr33 1889) (dampr34 1890) (dampr35 1891)
2349 (dampr36 1892) (dampr37 1893) (dampr38 1894) (dampr39 1895)
2350 (dampr40 1896) (dampr41 1897) (dampr42 1898) (dampr43 1899)
2351 (dampr44 1900) (dampr45 1901) (dampr46 1902) (dampr47 1903)
2352 (dampr48 1904) (dampr49 1905) (dampr50 1906) (dampr51 1907)
2353 (dampr52 1908) (dampr53 1909) (dampr54 1910) (dampr55 1911)
2354 (dampr56 1912) (dampr57 1913) (dampr58 1914) (dampr59 1915)
2355 (dampr60 1916) (dampr61 1917) (dampr62 1918) (dampr63 1919)
2356
2357 (amcr 1920) (stbar 1921) (mmcr 1922)
2358 (dcr 2048) (brr 2049) (nmar 2050)
2359
2360 (ibar0 2052) (ibar1 2053) (ibar2 2054) (ibar3 2055)
2361 (dbar0 2056) (dbar1 2057) (dbar2 2058) (dbar3 2059)
2362
2363 (dbdr00 2060) (dbdr01 2061) (dbdr02 2062) (dbdr03 2063)
2364 (dbdr10 2064) (dbdr11 2065) (dbdr12 2066) (dbdr13 2067)
2365 (dbdr20 2068) (dbdr21 2069) (dbdr22 2070) (dbdr23 2071)
2366 (dbdr30 2072) (dbdr31 2073) (dbdr32 2074) (dbdr33 2075)
2367
2368 (dbmr00 2076) (dbmr01 2077) (dbmr02 2078) (dbmr03 2079)
2369 (dbmr10 2080) (dbmr11 2081) (dbmr12 2082) (dbmr13 2083)
2370 (dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087)
2371 (dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091)
2372
2373 (cpcfr 2092) (cpcr 2093) (cpsr 2094)
2374
2375 (cpesr0 2096) (cpesr1 2097)
2376 (cpemr0 2098) (cpemr1 2099)
2377
2378 (ihsr8 3848)
2379 )
2380)
2381
2382(define-hardware
2383 (name h-spr)
2384 (comment "special purpose registers")
2385 (attrs PROFILE)
2386 (type register UWI (4096))
2387 (indices extern-keyword spr-names)
2388 (get (index) (c-call UWI "@cpu@_h_spr_get_handler" index))
2389 (set (index newval) (c-call VOID "@cpu@_h_spr_set_handler" index newval))
2390)
2391
2392(define-pmacro (spr-pcsr) (reg h-spr 1))
2393(define-pmacro (spr-bpcsr) (reg h-spr 2))
2394(define-pmacro (spr-lr) (reg h-spr 272))
2395(define-pmacro (spr-lcr) (reg h-spr 273))
ac7c07ac
DB		 2396(define-pmacro (spr-iacc0h) (reg h-spr 280))
2397(define-pmacro (spr-iacc0l) (reg h-spr 281))
9aab5aa3
AC		 2398(define-pmacro (spr-sr0) (reg h-spr 768))
2399(define-pmacro (spr-sr1) (reg h-spr 769))
2400(define-pmacro (spr-sr2) (reg h-spr 770))
2401(define-pmacro (spr-sr3) (reg h-spr 771))
2402
2403; Accumulator guard. Actually a subset of the SPR registers, but those SPRs
2404; are read-only in most insns. This hardware element is used by those insns
2405; which have direct access (mwtaccg, mrdaccg).
2406(define-keyword
2407 (name accg-names)
2408 (print-name h-accg)
2409 (prefix "")
2410 (values
2411 (accg0 0)(accg1 1)(accg2 2)(accg3 3)
2412 (accg4 4)(accg5 5)(accg6 6)(accg7 7)
2413 (accg8 8)(accg9 9)(accg10 10)(accg11 11)
2414 (accg12 12)(accg13 13)(accg14 14)(accg15 15)
2415 (accg16 16)(accg17 17)(accg18 18)(accg19 19)
2416 (accg20 20)(accg21 21)(accg22 22)(accg23 23)
2417 (accg24 24)(accg25 25)(accg26 26)(accg27 27)
2418 (accg28 28)(accg29 29)(accg30 30)(accg31 31)
2419 (accg32 32)(accg33 33)(accg34 34)(accg35 35)
2420 (accg36 36)(accg37 37)(accg38 38)(accg39 39)
2421 (accg40 40)(accg41 41)(accg42 42)(accg43 43)
2422 (accg44 44)(accg45 45)(accg46 46)(accg47 47)
2423 (accg48 48)(accg49 49)(accg50 50)(accg51 51)
2424 (accg52 52)(accg53 53)(accg54 54)(accg55 55)
2425 (accg56 56)(accg57 57)(accg58 58)(accg59 59)
2426 (accg60 60)(accg61 61)(accg62 62)(accg63 63)
2427 )
2428)
2429
2430(define-hardware
2431 (name h-accg)
2432 (comment "accumulator guard")
2433 (attrs PROFILE VIRTUAL)
2434 (type register UWI (64))
2435 (indices extern-keyword accg-names)
2436 (get (index)
2437 (and (reg h-spr (add index 1472)) #xff))
2438 (set (index newval)
2439 (set (raw-reg UWI h-spr (add index 1472)) (and newval #xff)))
2440)
2441
2442; 40 bit accumulator. Composed of ACCG and ACC registers concatenated, but
2443; referenced more often as the composed 40 bits.
2444(define-keyword
2445 (name acc-names)
2446 (print-name h-acc40)
2447 (prefix "")
2448 (values
2449(acc0 0)(acc1 1)(acc2 2)(acc3 3)(acc4 4)(acc5 5)(acc6 6)(acc7 7)
2450(acc8 8)(acc9 9)(acc10 10)(acc11 11)(acc12 12)(acc13 13)(acc14 14)(acc15 15)
2451(acc16 16)(acc17 17)(acc18 18)(acc19 19)(acc20 20)(acc21 21)(acc22 22)(acc23 23)
2452(acc24 24)(acc25 25)(acc26 26)(acc27 27)(acc28 28)(acc29 29)(acc30 30)(acc31 31)
2453(acc32 32)(acc33 33)(acc34 34)(acc35 35)(acc36 36)(acc37 37)(acc38 38)(acc39 39)
2454(acc40 40)(acc41 41)(acc42 42)(acc43 43)(acc44 44)(acc45 45)(acc46 46)(acc47 47)
2455(acc48 48)(acc49 49)(acc50 50)(acc51 51)(acc52 52)(acc53 53)(acc54 54)(acc55 55)
2456(acc56 56)(acc57 57)(acc58 58)(acc59 59)(acc60 60)(acc61 61)(acc62 62)(acc63 63)
2457 )
2458)
2459
2460(define-hardware
2461 (name h-acc40S)
2462 (comment "40 bit signed accumulator")
2463 (attrs PROFILE VIRTUAL)
2464 (type register DI (64))
2465 (indices extern-keyword acc-names)
2466 ; The accumlator is made up of two 32 bit registers, accgi/acci.
2467 ; We want to extract this as a combined 40 signed bits
2468 (get (index)
2469 (or DI
2470 (sll DI (ext DI (trunc QI (reg h-spr (add index 1472))))
2471 32)
2472 (zext DI (reg h-spr (add index 1408)))))
2473 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2474 ; on ACC and ACCG registers
2475 (set (index newval)
2476 (sequence ()
2477 (c-call VOID "frv_check_spr_write_access" (add index 1408))
2478 (set (raw-reg UWI h-spr
2479 (add index 1472)) (and (srl newval 32) #xff))
2480 (set (raw-reg UWI h-spr
2481 (add index 1408)) (trunc USI newval))))
2482)
2483
2484(define-hardware
2485 (name h-acc40U)
2486 (comment "40 bit unsigned accumulator")
2487 (attrs PROFILE VIRTUAL)
2488 (type register UDI (64))
2489 (indices extern-keyword acc-names)
2490 ; The accumlator is made up of two 32 bit registers, accgi/acci.
2491 ; We want to extract this as a combined 40 unsigned bits
2492 (get (index)
2493 (or DI
2494 (sll DI (zext DI (reg h-spr (add index 1472))) 32)
2495 (zext DI (reg h-spr (add index 1408)))))
2496 ; Bits 40-63 are not written. raw-reg is used to bypass read-only restrictions
2497 ; on ACC and ACCG registers
2498 (set (index newval)
2499 (sequence ()
2500 (c-call VOID "frv_check_spr_write_access" (add index 1408))
2501 (set (raw-reg UWI h-spr
2502 (add index 1472)) (and (srl newval 32) #xff))
2503 (set (raw-reg UWI h-spr
2504 (add index 1408)) (trunc USI newval))))
2505)
ac7c07ac
DB		 2506; 64-bit signed accumulator. Composed of iacc0h and iacc0l registers
2507; concatenated, but referenced more often as the composed 64 bits.
2508(define-keyword
2509 ; This is totally hokey -- I have to have an index!
2510 (name iacc0-names)
2511 (print-name h-iacc0)
2512 (prefix "")
2513 (values (iacc0 0))
2514)
2515
2516(define-hardware
2517 (name h-iacc0)
2518 (comment "64 bit signed accumulator")
2519 (attrs PROFILE VIRTUAL (MACH fr400))
2520 (type register DI (1))
2521 (indices extern-keyword iacc0-names)
2522 ; The single 64-bit integer accumulator is made up of two 32 bit
2523 ; registers, iacc0h and iacc0l. We want to extract this as a
2524 ; combined 64 signed bits.
2525 (get (idx) (or DI (sll DI (ext DI (spr-iacc0h)) 32) (zext DI (spr-iacc0l))))
2526 (set (idx newval)
2527 (sequence ()
2528 (set (spr-iacc0h) (trunc SI (srl newval 32)))
2529 (set (spr-iacc0l) (trunc SI newval))))
2530)
9aab5aa3
AC		 2531
2532; Integer condition code registers (CCR)
2533;
2534; The individual sub registers bits of the CCR are referenced more often than
2535; the entire register so set them directly. We can assemble the
2536; entire register when necessary.
2537;
2538(define-keyword
2539 (name iccr-names)
2540 (print-name h-iccr)
2541 (prefix "")
2542 (values (icc0 0) (icc1 1) (icc2 2) (icc3 3))
2543)
2544
2545(define-hardware
2546 (name h-iccr)
2547 (comment "Integer condition code registers")
2548 (attrs PROFILE)
2549 (type register UQI (4))
2550 (indices extern-keyword iccr-names)
2551)
2552
2553; Floating point condition code registers (CCR)
2554;
2555; The individual sub registers bits of the CCR are referenced more often than
2556; the entire register so set them directly. We can assemble the
2557; entire register when necessary.
2558;
2559(define-keyword
2560 (name fccr-names)
2561 (print-name h-fccr)
2562 (prefix "")
2563 (values (fcc0 0) (fcc1 1) (fcc2 2) (fcc3 3))
2564)
2565
2566(define-hardware
2567 (name h-fccr)
6f18ad70 2568 (comment "Floating point condition code registers")
9aab5aa3
AC		 2569 (attrs PROFILE)
2570 (type register UQI (4))
2571 (indices extern-keyword fccr-names)
2572)
2573
2574; C condition code registers (CCCR)
2575;
2576(define-keyword
2577 (name cccr-names)
2578 (print-name h-cccr)
2579 (prefix "")
2580 (values (cc0 0) (cc1 1) (cc2 2) (cc3 3) (cc4 4) (cc5 5) (cc6 6) (cc7 7))
2581)
2582
2583(define-hardware
2584 (name h-cccr)
2585 (comment "Condition code registers")
2586 (attrs PROFILE)
2587 (type register UQI (8))
2588 (indices extern-keyword cccr-names)
2589)
2590\f
2591; Dummy hardware used to define packing bit on insns
2592;
2593(define-hardware
2594 (name h-pack)
2595 (comment "Packing bit dummy hardware")
2596 (type immediate (UINT 1))
2597 (values keyword "" (("" 1) (".p" 0) (".P" 0)))
2598)
2599; Dummy hardware used to define hint field for branches always taken
2600;
2601(define-hardware
2602 (name h-hint-taken)
2603 (comment "Branch taken hint dummy hardware")
2604 (type immediate (UINT 1))
2605 ; The order of these is important. We want '2' to get written by default,
2606 ; but we also want the docoder/disassembler to allow the values '0', '1' and
2607 ; '3'.
2608 (values keyword "" (("" 2) ("" 0) ("" 1) ("" 3)))
2609)
2610; Dummy hardware used to define hint field for branches never taken
2611;
2612(define-hardware
2613 (name h-hint-not-taken)
2614 (comment "Branch not taken hint dummy hardware")
2615 (type immediate (UINT 1))
2616 ; The order of these is important. We want '0' to get written by default,
2617 ; but we also want the docoder/disassembler to allow the values '1', '2' and
2618 ; '3'.
2619 (values keyword "" (("" 0) ("" 1) ("" 2) ("" 3)))
2620)
2621\f
2622; Instruction Operands.
2623; These entries provide a layer between the assembler and the raw hardware
2624; description, and are used to refer to hardware elements in the semantic
2625; code. Usually there's a bit of over-specification, but in more complicated
2626; instruction sets there isn't.
2627
2628; FRV specific operand attributes:
2629
2630(define-attr
2631 (for operand)
2632 (type boolean)
2633 (name HASH-PREFIX)
2634 (comment "immediates have an optional '#' prefix")
2635)
2636
2637; ??? Convention says this should be o-sr, but then the insn definitions
2638; should refer to o-sr which is clumsy. The "o-" could be implicit, but
2639; then it should be implicit for all the symbols here, but then there would
2640; be confusion between (f-)simm8 and (h-)simm8.
2641; So for now the rule is exactly as it appears here.
2642
2643; dnmop: define-normal-mode-operand: temporary, pending potential removal
2644; of modes from h/w.
2645(define-pmacro (dnmop xname xcomment xattrs xtype xindex xmode)
2646 (define-operand
2647 (name xname)
2648 (comment xcomment)
2649 (.splice attrs (.unsplice xattrs))
2650 (type xtype)
2651 (index xindex)
2652 (mode xmode)
2653 )
2654)
2655
1340b9a9
DB		 2656; dnpmop: define-normal-parsed-mode-operand: Normal mode operand with parse handler
2657(define-pmacro (dnpmop xname xcomment xattrs xtype xindex xmode xparse)
2658 (define-operand
2659 (name xname)
2660 (comment xcomment)
2661 (.splice attrs (.unsplice xattrs))
2662 (type xtype)
2663 (index xindex)
2664 (mode xmode)
2665 (handlers (parse xparse))
2666 )
2667)
2668
9aab5aa3
AC		 2669(dnop pack "packing bit" () h-pack f-pack)
2670
2671(dnmop GRi "source register 1" () h-gr f-GRi SI)
2672(dnmop GRj "source register 2" () h-gr f-GRj SI)
2673(dnmop GRk "destination register" () h-gr f-GRk SI)
2674(dnmop GRkhi "destination register" () h-gr_hi f-GRk UHI)
2675(dnmop GRklo "destination register" () h-gr_lo f-GRk UHI)
1340b9a9 2676(dnpmop GRdoublek "destination register" () h-gr_double f-GRk DI "even_register")
9aab5aa3
AC		 2677(dnmop ACC40Si "signed accumulator" () h-acc40S f-ACC40Si DI)
2678(dnmop ACC40Ui "unsigned accumulator" () h-acc40U f-ACC40Ui UDI)
2679(dnmop ACC40Sk "target accumulator" () h-acc40S f-ACC40Sk DI)
2680(dnmop ACC40Uk "target accumulator" () h-acc40U f-ACC40Uk UDI)
2681(dnmop ACCGi "source register" () h-accg f-ACCGi UWI)
2682(dnmop ACCGk "target register" () h-accg f-ACCGk UWI)
2683
2684(dnmop CPRi "source register" ((MACH frv)) h-cpr f-CPRi SI)
2685(dnmop CPRj "source register" ((MACH frv)) h-cpr f-CPRj SI)
2686(dnmop CPRk "destination register" ((MACH frv)) h-cpr f-CPRk SI)
1340b9a9 2687(dnpmop CPRdoublek "destination register" ((MACH frv)) h-cpr_double f-CPRk DI "even_register")
9aab5aa3
AC		 2688
2689; floating point operands
36c3ae24
NC		 2690(dnmop FRinti "source register 1" () h-fr_int f-FRi SI)
2691(dnmop FRintj "source register 2" () h-fr_int f-FRj SI)
2692(dnmop FRintk "target register" () h-fr_int f-FRk SI)
9aab5aa3
AC		 2693(dnmop FRi "source register 1" () h-fr f-FRi SF)
2694(dnmop FRj "source register 2" () h-fr f-FRj SF)
2695(dnmop FRk "destination register" () h-fr f-FRk SF)
2696(dnmop FRkhi "destination register" () h-fr_hi f-FRk UHI)
2697(dnmop FRklo "destination register" () h-fr_lo f-FRk UHI)
1340b9a9
DB		 2698(dnpmop FRdoublei "source register 1" () h-fr_double f-FRi DF "even_register")
2699(dnpmop FRdoublej "source register 2" () h-fr_double f-FRj DF "even_register")
2700(dnpmop FRdoublek "target register" () h-fr_double f-FRk DF "even_register")
9aab5aa3
AC		 2701
2702(dnop CRi "source register 1" () h-cccr f-CRi)
2703(dnop CRj "source register 2" () h-cccr f-CRj)
2704(dnop CRj_int "destination register" () h-cccr f-CRj_int)
2705(dnop CRj_float "destination register" () h-cccr f-CRj_float)
2706(dnop CRk "destination register" () h-cccr f-CRk)
2707(dnop CCi "condition register" () h-cccr f-CCi)
2708
2709(dnop ICCi_1 "condition register" () h-iccr f-ICCi_1)
2710(dnop ICCi_2 "condition register" () h-iccr f-ICCi_2)
2711(dnop ICCi_3 "condition register" () h-iccr f-ICCi_3)
2712(dnop FCCi_1 "condition register" () h-fccr f-FCCi_1)
2713(dnop FCCi_2 "condition register" () h-fccr f-FCCi_2)
2714(dnop FCCi_3 "condition register" () h-fccr f-FCCi_3)
2715(dnop FCCk "condition register" () h-fccr f-FCCk)
2716
2717(dnop eir "exception insn reg" () h-uint f-eir)
2718(dnop s10 "10 bit signed immediate" (HASH-PREFIX) h-sint f-s10)
2719(dnop u16 "16 bit unsigned immediate" (HASH-PREFIX) h-uint f-u16)
2720(dnop s16 "16 bit signed immediate" (HASH-PREFIX) h-sint f-s16)
2721(dnop s6 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6)
2722(dnop s6_1 "6 bit signed immediate" (HASH-PREFIX) h-sint f-s6_1)
2723(dnop u6 "6 bit unsigned immediate" (HASH-PREFIX) h-uint f-u6)
2724(dnop s5 "5 bit signed immediate" (HASH-PREFIX) h-sint f-s5)
2725(dnop cond "conditional arithmetic" (HASH-PREFIX) h-uint f-cond)
2726(dnop ccond "lr branch condition" (HASH-PREFIX) h-uint f-ccond)
2727(dnop hint "2 bit branch predictor" (HASH-PREFIX) h-uint f-hint)
2728(dnop hint_taken "2 bit branch predictor" () h-hint-taken f-hint)
2729(dnop hint_not_taken "2 bit branch predictor" () h-hint-not-taken f-hint)
2730
2731(dnop LI "link indicator" () h-uint f-LI)
2732(dnop lock "cache lock indicator" (HASH-PREFIX) h-uint f-lock)
2733(dnop debug "debug mode indicator" (HASH-PREFIX) h-uint f-debug)
9aab5aa3
AC		 2734(dnop ae "all entries indicator" (HASH-PREFIX) h-uint f-ae)
2735
2736(dnop label16 "18 bit pc relative address" () h-iaddr f-label16)
2737(dnop label24 "26 bit pc relative address" () h-iaddr f-label24)
2738
8caa9169
DB		 2739(define-operand
2740 (name A0)
2741 (comment "A==0 operand of mclracc")
2742 (attrs)
2743 (type h-uint)
2744 (index f-A)
2745 (mode USI)
2746 (handlers (parse "A0"))
2747)
2748
2749(define-operand
2750 (name A1)
2751 (comment "A==1 operand of mclracc")
2752 (attrs)
2753 (type h-uint)
2754 (index f-A)
2755 (mode USI)
2756 (handlers (parse "A1"))
2757)
2758
36c3ae24
NC		 2759(define-operand
2760 (name FRintieven)
2761 (comment "(even) source register 1")
2762 (attrs)
2763 (type h-fr_int)
2764 (index f-FRi)
2765 (mode SI)
2766 (handlers (parse "even_register"))
2767)
2768
2769(define-operand
2770 (name FRintjeven)
2771 (comment "(even) source register 2")
2772 (attrs)
2773 (type h-fr_int)
2774 (index f-FRj)
2775 (mode SI)
2776 (handlers (parse "even_register"))
2777)
2778
2779(define-operand
2780 (name FRintkeven)
2781 (comment "(even) target register")
2782 (attrs)
2783 (type h-fr_int)
2784 (index f-FRk)
2785 (mode SI)
2786 (handlers (parse "even_register"))
2787)
2788
9aab5aa3
AC		 2789(define-operand
2790 (name d12)
2791 (comment "12 bit signed immediate")
2792 (attrs)
2793 (type h-sint)
2794 (index f-d12)
2795 (handlers (parse "d12"))
2796)
2797
2798(define-operand
2799 (name s12)
2800 (comment "12 bit signed immediate")
2801 (attrs HASH-PREFIX)
2802 (type h-sint)
2803 (index f-d12)
2804 (handlers (parse "s12"))
2805)
2806
2807(define-operand
2808 (name u12)
2809 (comment "12 bit signed immediate")
2810 (attrs HASH-PREFIX)
2811 (type h-sint)
2812 (index f-u12)
2813 (handlers (parse "u12"))
2814)
2815
2816(define-operand
2817 (name spr)
2818 (comment "special purpose register")
2819 (attrs)
2820 (type h-spr)
2821 (index f-spr)
2822 (handlers (parse "spr") (print "spr"))
2823)
2824
2825(define-operand
2826 (name ulo16)
2827 (comment "16 bit unsigned immediate, for #lo()")
2828 (attrs)
2829 (type h-uint)
2830 (index f-u16)
2831 (handlers (parse "ulo16") (print "lo"))
2832)
2833
2834(define-operand
2835 (name slo16)
2836 (comment "16 bit unsigned immediate, for #lo()")
2837 (attrs)
2838 (type h-sint)
2839 (index f-s16)
2840 (handlers (parse "uslo16") (print "lo"))
2841)
2842
2843(define-operand
2844 (name uhi16)
2845 (comment "16 bit unsigned immediate, for #hi()")
2846 (attrs)
2847 (type h-uint)
2848 (index f-u16)
2849 (handlers (parse "uhi16") (print "hi"))
2850)
2851
2852; operands representing hardware
2853;
2854(dnop psr_esr "PSR.ESR bit" (SEM-ONLY) h-psr_esr f-nil)
2855(dnop psr_s "PSR.S bit" (SEM-ONLY) h-psr_s f-nil)
2856(dnop psr_ps "PSR.PS bit" (SEM-ONLY) h-psr_ps f-nil)
2857(dnop psr_et "PSR.ET bit" (SEM-ONLY) h-psr_et f-nil)
2858
2859(dnop bpsr_bs "BPSR.BS bit" (SEM-ONLY) h-bpsr_bs f-nil)
2860(dnop bpsr_bet "BPSR.BET bit" (SEM-ONLY) h-bpsr_bet f-nil)
2861
2862(dnop tbr_tba "TBR.TBA" (SEM-ONLY) h-tbr_tba f-nil)
2863(dnop tbr_tt "TBR.TT" (SEM-ONLY) h-tbr_tt f-nil)
2864
2865; Null operands
2866;
2867(define-pmacro (ICCi_1-null) (f-ICCi_1-null 0))
2868(define-pmacro (ICCi_2-null) (f-ICCi_2-null 0))
2869(define-pmacro (ICCi_3-null) (f-ICCi_3-null 0))
2870(define-pmacro (FCCi_1-null) (f-FCCi_1-null 0))
2871(define-pmacro (FCCi_2-null) (f-FCCi_2-null 0))
2872(define-pmacro (FCCi_3-null) (f-FCCi_3-null 0))
2873(define-pmacro (rs-null) (f-rs-null 0))
2874(define-pmacro (GRi-null) (f-GRi-null 0))
2875(define-pmacro (GRj-null) (f-GRj-null 0))
2876(define-pmacro (GRk-null) (f-GRk-null 0))
2877(define-pmacro (FRi-null) (f-FRi-null 0))
2878(define-pmacro (FRj-null) (f-FRj-null 0))
2879(define-pmacro (ACCj-null) (f-ACCj-null 0))
2880(define-pmacro (rd-null) (f-rd-null 0))
2881(define-pmacro (cond-null) (f-cond-null 0))
2882(define-pmacro (ccond-null) (f-ccond-null 0))
2883(define-pmacro (s12-null) (f-s12-null 0))
2884(define-pmacro (label16-null) (f-label16-null 0))
2885(define-pmacro (misc-null-1) (f-misc-null-1 0))
2886(define-pmacro (misc-null-2) (f-misc-null-2 0))
2887(define-pmacro (misc-null-3) (f-misc-null-3 0))
2888(define-pmacro (misc-null-4) (f-misc-null-4 0))
2889(define-pmacro (misc-null-5) (f-misc-null-5 0))
2890(define-pmacro (misc-null-6) (f-misc-null-6 0))
2891(define-pmacro (misc-null-7) (f-misc-null-7 0))
2892(define-pmacro (misc-null-8) (f-misc-null-8 0))
2893(define-pmacro (misc-null-9) (f-misc-null-9 0))
2894(define-pmacro (misc-null-10) (f-misc-null-10 0))
2895(define-pmacro (misc-null-11) (f-misc-null-11 0))
2896
2897(define-pmacro (LI-on) (f-LI-on 1))
2898(define-pmacro (LI-off) (f-LI-off 0))
2899\f
2900; Instruction definitions.
2901;
2902; Notes:
2903; - dni is short for "define-normal-instruction"
2904; - Macros are used to represent each insn format. These should be used as much
2905; as possible unless an insn has exceptional behaviour
2906;
2907
2908; Commonly used Macros
2909;
2910; Specific registers
2911;
2912
2913; Integer condition code manipulation
2914;
2915(define-pmacro (set-z-and-n icc x)
2916 (if (eq x 0)
2917 (set icc (or (and icc #x7) #x4))
2918 (if (lt x 0)
2919 (set icc (or (and icc #xb) #x8))
2920 (set icc (and icc #x3))))
2921)
2922
2923(define-pmacro (set-n icc val)
2924 (if (eq val 0)
2925 (set icc (and icc #x7))
2926 (set icc (or icc #x8)))
2927)
2928
2929(define-pmacro (set-z icc val)
2930 (if (eq val 0)
2931 (set icc (and icc #xb))
2932 (set icc (or icc #x4)))
2933)
2934
2935(define-pmacro (set-v icc val)
2936 (if (eq val 0)
2937 (set icc (and icc #xd))
2938 (set icc (or icc #x2)))
2939)
2940
2941(define-pmacro (set-c icc val)
2942 (if (eq val 0)
2943 (set icc (and icc #xe))
2944 (set icc (or icc #x1)))
2945)
2946
2947(define-pmacro (nbit icc)
2948 (trunc BI (srl (and icc #x8) 3))
2949)
2950
2951(define-pmacro (zbit icc)
2952 (trunc BI (srl (and icc #x4) 2))
2953)
2954
2955(define-pmacro (vbit icc)
2956 (trunc BI (srl (and icc #x2) 1))
2957)
2958
2959(define-pmacro (cbit icc)
2960 (trunc BI (and icc #x1))
2961)
2962
2963(define-pmacro (ebit icc)
2964 (trunc BI (srl (and icc #x8) 3))
2965)
2966
2967(define-pmacro (lbit icc)
2968 (trunc BI (srl (and icc #x4) 2))
2969)
2970
2971(define-pmacro (gbit icc)
2972 (trunc BI (srl (and icc #x2) 1))
2973)
2974
2975(define-pmacro (ubit icc)
2976 (trunc BI (and icc #x1))
2977)
2978
8caa9169
DB		 2979; FRV insns
2980;
9aab5aa3 2981;
9aab5aa3
AC		 2982; Format: INT, Logic, Shift r-r
2983;
2984(define-pmacro (int-logic-r-r name operation op ope comment)
2985 (dni name
2986 (comment)
ac7c07ac 2987 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 2988 (.str name "$pack $GRi,$GRj,$GRk")
2989 (+ pack GRk op GRi (ICCi_1-null) ope GRj)
2990 (set GRk (operation GRi GRj))
2991 ((fr400 (unit u-integer))
ac7c07ac 2992 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 2993 )
2994)
2995
2996(int-logic-r-r add add OP_00 OPE2_00 "add reg/reg")
2997(int-logic-r-r sub sub OP_00 OPE2_04 "sub reg/reg")
2998(int-logic-r-r and and OP_01 OPE2_00 "and reg/reg")
2999(int-logic-r-r or or OP_01 OPE2_02 "or reg/reg")
3000(int-logic-r-r xor xor OP_01 OPE2_04 "xor reg/reg")
3001
3002(dni not
3003 ("not")
ac7c07ac 3004 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3005 ("not$pack $GRj,$GRk")
3006 (+ pack GRk OP_01 (rs-null) (ICCi_1-null) OPE2_06 GRj)
3007 (set GRk (inv GRj))
3008 ((fr400 (unit u-integer))
ac7c07ac 3009 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3010)
3011
3012(dni sdiv
3013 "signed division"
ac7c07ac 3014 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3015 "sdiv$pack $GRi,$GRj,$GRk"
3016 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0E GRj)
3017 (sequence ()
3018 (c-call VOID "@cpu@_signed_integer_divide"
3019 GRi GRj (index-of GRk) 0)
3020 (clobber GRk))
3021 ((fr400 (unit u-idiv))
ac7c07ac 3022 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3023)
3024
3025(dni nsdiv
3026 "non excepting signed division"
ac7c07ac
DB		 3027 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3028 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3029 "nsdiv$pack $GRi,$GRj,$GRk"
3030 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0E GRj)
3031 (sequence ()
3032 (c-call VOID "@cpu@_signed_integer_divide"
3033 GRi GRj (index-of GRk) 1)
3034 (clobber GRk))
c7a48b9a 3035 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3036)
3037
3038(dni udiv
3039 "unsigned division reg/reg"
ac7c07ac 3040 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3041 "udiv$pack $GRi,$GRj,$GRk"
3042 (+ pack GRk OP_00 GRi (ICCi_1-null) OPE2_0F GRj)
3043 (sequence ()
3044 (c-call VOID "@cpu@_unsigned_integer_divide"
3045 GRi GRj (index-of GRk) 0)
3046 (clobber GRk))
3047 ((fr400 (unit u-idiv))
ac7c07ac 3048 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3049)
3050
3051(dni nudiv
3052 "non excepting unsigned division"
ac7c07ac
DB		 3053 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3054 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3055 "nudiv$pack $GRi,$GRj,$GRk"
3056 (+ pack GRk OP_01 GRi (ICCi_1-null) OPE2_0F GRj)
3057 (sequence ()
3058 (c-call VOID "@cpu@_unsigned_integer_divide"
3059 GRi GRj (index-of GRk) 1)
3060 (clobber GRk))
c7a48b9a 3061 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3062)
3063
3064; Multiplication
3065;
3066(define-pmacro (multiply-r-r name signop op ope comment)
3067 (dni name
3068 (comment)
ac7c07ac 3069 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3070 (.str name "$pack $GRi,$GRj,$GRdoublek")
3071 (+ pack GRdoublek op GRi (ICCi_1-null) ope GRj)
3072 (set GRdoublek (mul DI (signop DI GRi) (signop DI GRj)))
3073 ((fr400 (unit u-imul))
ac7c07ac 3074 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3075 )
3076)
3077
3078(multiply-r-r smul ext OP_00 OPE2_08 "signed multiply reg/reg")
3079(multiply-r-r umul zext OP_00 OPE2_0A "unsigned multiply reg/reg")
3080
ac7c07ac
DB		 3081; Multiplication with integer accumulator IACC
3082;
3083
3084(define-pmacro (iacc-set value)
3085 (set (reg h-iacc0 0) value))
3086
3087(define-pmacro (iacc-add value)
3088 (set (reg h-iacc0 0)
3089 (cond DI
3090 ((andif (andif (gt value 0) (gt (reg h-iacc0 0) 0))
3091 (lt (sub DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3092 ; Positive overflow
3093 (const DI #x7fffffffffffffff))
3094 ((andif (andif (lt value 0) (lt (reg h-iacc0 0) 0))
3095 (gt (sub DI #x8000000000000000 value) (reg h-iacc0 0)))
3096 ; Negative overflow
3097 (const DI #x8000000000000000))
3098 (else
3099 (add DI (reg h-iacc0 0) value))))
3100)
3101
3102(define-pmacro (iacc-sub value)
3103 (set (reg h-iacc0 0)
3104 (cond DI
3105 ((andif (andif (lt value 0) (gt (reg h-iacc0 0) 0))
3106 (lt (add DI #x7fffffffffffffff value) (reg h-iacc0 0)))
3107 ; Positive overflow
3108 (const DI #x7fffffffffffffff))
3109 ((andif (andif (gt value 0) (lt (reg h-iacc0 0) 0))
3110 (gt (add DI #x8000000000000000 value) (reg h-iacc0 0)))
3111 ; Negative overflow
3112 (const DI #x8000000000000000))
3113 (else
3114 (sub DI (reg h-iacc0 0) value))))
3115)
3116
3117(define-pmacro (iacc-multiply-r-r name operation op ope comment)
3118 (dni name
3119 (comment)
cb10e79a 3120 ((UNIT IACC) (FR400-MAJOR I-1) (MACH fr400))
ac7c07ac
DB		 3121 (.str name "$pack $GRi,$GRj")
3122 (+ pack (rd-null) op GRi ope GRj)
3123 ((.sym iacc- operation) (mul DI (ext DI GRi) (ext DI GRj)))
3124 ((fr400 (unit u-integer)))
3125 )
3126)
3127
3128(iacc-multiply-r-r smu set OP_46 OPE1_05 "Signed multiply reg/reg/iacc")
3129(iacc-multiply-r-r smass add OP_46 OPE1_06 "Signed multiply/add reg/reg/iacc")
3130(iacc-multiply-r-r smsss sub OP_46 OPE1_07 "Signed multiply/sub reg/reg/iacc")
3131
9aab5aa3
AC		 3132(define-pmacro (int-shift-r-r name op ope comment)
3133 (dni name
3134 (comment)
ac7c07ac 3135 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3136 (.str name "$pack $GRi,$GRj,$GRk")
3137 (+ pack GRk op GRi (ICCi_1-null) ope GRj)
3138 (set GRk (name GRi (and GRj #x1f)))
3139 ((fr400 (unit u-integer))
ac7c07ac 3140 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3141 )
3142)
3143
3144(int-shift-r-r sll OP_01 OPE2_08 "shift left logical reg/reg")
3145(int-shift-r-r srl OP_01 OPE2_0A "shift right logical reg/reg")
3146(int-shift-r-r sra OP_01 OPE2_0C "shift right arith reg/reg")
3147
ac7c07ac
DB		 3148(dni slass
3149 "shift left arith reg/reg with saturation"
3150 ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400))
3151 "slass$pack $GRi,$GRj,$GRk"
3152 (+ pack GRk OP_46 GRi OPE1_02 GRj)
3153 (set GRk (c-call SI "@cpu@_shift_left_arith_saturate" GRi GRj))
3154 ()
3155)
3156
3157(dni scutss
3158 "Integer accumulator cut with saturation"
c7a48b9a 3159 ((UNIT I0) (FR400-MAJOR I-1) (MACH fr400))
ac7c07ac
DB		 3160 "scutss$pack $GRj,$GRk"
3161 (+ pack GRk OP_46 (rs-null) OPE1_04 GRj)
3162 (set GRk (c-call SI "@cpu@_iacc_cut" (reg h-iacc0 0) GRj))
3163 ()
3164)
3165
9aab5aa3
AC		 3166(define-pmacro (scan-semantics arg1 arg2 targ)
3167 (sequence ((WI tmp1) (WI tmp2))
3168 (set tmp1 arg1)
3169 (set tmp2 (sra arg2 1))
3170 (set targ (c-call WI "@cpu@_scan_result" (xor tmp1 tmp2))))
3171)
3172
3173(dni scan
3174 "scan"
ac7c07ac 3175 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3176 "scan$pack $GRi,$GRj,$GRk"
3177 (+ pack GRk OP_0B GRi (ICCi_1-null) OPE2_00 GRj)
3178 (scan-semantics GRi GRj GRk)
3179 ((fr400 (unit u-integer))
ac7c07ac 3180 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3181)
3182
3183; Format: conditional INT, Logic, Shift r-r
3184;
3185(define-pmacro (conditional-int-logic name operation op ope comment)
3186 (dni name
3187 (comment)
ac7c07ac 3188 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3189 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3190 (+ pack GRk op GRi CCi cond ope GRj)
3191 (if (eq CCi (or cond 2))
3192 (set GRk (operation GRi GRj)))
3193 ((fr400 (unit u-integer))
ac7c07ac 3194 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3195 )
3196)
3197
3198(conditional-int-logic cadd add OP_58 OPE4_0 "conditional add")
3199(conditional-int-logic csub sub OP_58 OPE4_1 "conditional sub")
3200(conditional-int-logic cand and OP_5A OPE4_0 "conditional and")
3201(conditional-int-logic cor or OP_5A OPE4_1 "conditional or")
3202(conditional-int-logic cxor xor OP_5A OPE4_2 "conditional xor")
3203
3204(dni cnot
3205 "conditional not"
ac7c07ac 3206 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3207 "cnot$pack $GRj,$GRk,$CCi,$cond"
3208 (+ pack GRk OP_5A (rs-null) CCi cond OPE4_3 GRj)
3209 (if (eq CCi (or cond 2))
3210 (set GRk (inv GRj)))
3211 ((fr400 (unit u-integer))
ac7c07ac 3212 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3213)
3214
3215(dni csmul
3216 "conditional signed multiply"
ac7c07ac 3217 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3218 "csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3219 (+ pack GRdoublek OP_58 GRi CCi cond OPE4_2 GRj)
3220 (if (eq CCi (or cond 2))
3221 (set GRdoublek (mul DI (ext DI GRi) (ext DI GRj))))
3222 ((fr400 (unit u-imul))
ac7c07ac 3223 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3224)
3225
3226(dni csdiv
3227 "conditional signed division"
ac7c07ac 3228 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3229 "csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3230 (+ pack GRk OP_58 GRi CCi cond OPE4_3 GRj)
3231 (if (eq CCi (or cond 2))
3232 (sequence ()
3233 (c-call VOID "@cpu@_signed_integer_divide"
3234 GRi GRj (index-of GRk) 0)
3235 (clobber GRk)))
3236 ((fr400 (unit u-idiv))
ac7c07ac 3237 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3238)
3239
3240(dni cudiv
3241 "conditional unsigned division"
ac7c07ac 3242 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3243 "cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond"
3244 (+ pack GRk OP_59 GRi CCi cond OPE4_3 GRj)
3245 (if (eq CCi (or cond 2))
3246 (sequence ()
3247 (c-call VOID "@cpu@_unsigned_integer_divide"
3248 GRi GRj (index-of GRk) 0)
3249 (clobber GRk)))
3250 ((fr400 (unit u-idiv))
ac7c07ac 3251 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3252)
3253
3254(define-pmacro (conditional-shift name operation op ope comment)
3255 (dni name
3256 (comment)
ac7c07ac 3257 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3258 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3259 (+ pack GRk op GRi CCi cond ope GRj)
3260 (if (eq CCi (or cond 2))
3261 (set GRk (operation GRi (and GRj #x1f))))
3262 ((fr400 (unit u-integer))
ac7c07ac 3263 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3264 )
3265)
3266
3267(conditional-shift csll sll OP_5C OPE4_0 "conditional shift left logical")
3268(conditional-shift csrl srl OP_5C OPE4_1 "conditional shift right logical")
3269(conditional-shift csra sra OP_5C OPE4_2 "conditional shift right arith")
3270
3271(dni cscan
3272 "conditional scan"
ac7c07ac 3273 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3274 "cscan$pack $GRi,$GRj,$GRk,$CCi,$cond"
3275 (+ pack GRk OP_65 GRi CCi cond OPE4_3 GRj)
3276 (if (eq CCi (or cond 2))
3277 (scan-semantics GRi GRj GRk))
3278 ((fr400 (unit u-integer))
ac7c07ac 3279 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3280)
3281
3282; Format: INT, Logic, Shift, cc r-r
3283;
3284(define-pmacro (int-arith-cc-semantics operation icc)
3285 (sequence ((BI tmp) (QI cc) (SI result))
3286 (set cc icc)
3287 (set tmp ((.sym operation -oflag) GRi GRj (const 0)))
3288 (set-v cc tmp)
3289 (set tmp ((.sym operation -cflag) GRi GRj (const 0)))
3290 (set-c cc tmp)
3291 (set result (operation GRi GRj))
3292 (set-z-and-n cc result)
3293 (set GRk result)
3294 (set icc cc))
3295)
3296
3297(define-pmacro (int-arith-cc-r-r name operation op ope comment)
3298 (dni name
3299 (comment)
ac7c07ac 3300 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3301 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3302 (+ pack GRk op GRi ICCi_1 ope GRj)
3303 (int-arith-cc-semantics operation ICCi_1)
3304 ((fr400 (unit u-integer))
ac7c07ac 3305 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3306 )
3307)
3308
3309(int-arith-cc-r-r addcc add OP_00 OPE2_01 "add reg/reg, set icc")
3310(int-arith-cc-r-r subcc sub OP_00 OPE2_05 "sub reg/reg, set icc")
3311
3312(define-pmacro (int-logic-cc-semantics op icc)
3313 (sequence ((SI tmp))
3314 (set tmp (op GRi GRj))
3315 (set GRk tmp)
3316 (set-z-and-n icc tmp))
3317)
3318
3319(define-pmacro (int-logic-cc-r-r name op ope comment)
3320 (dni (.sym name cc)
3321 (comment)
ac7c07ac 3322 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3323 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3324 (+ pack GRk op GRi ICCi_1 ope GRj)
3325 (int-logic-cc-semantics name ICCi_1)
3326 ((fr400 (unit u-integer))
ac7c07ac 3327 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3328 )
3329)
3330
3331(int-logic-cc-r-r and OP_01 OPE2_01 "and reg/reg, set icc")
3332(int-logic-cc-r-r or OP_01 OPE2_03 "or reg/reg, set icc")
3333(int-logic-cc-r-r xor OP_01 OPE2_05 "xor reg/reg, set icc")
3334
3335(define-pmacro (int-shift-cc-semantics op l-r icc)
3336 (sequence ((WI shift) (SI tmp) (QI cc))
3337 (set shift (and GRj #x1f))
3338 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
3339 GRi shift icc))
3340 (set tmp (op GRi shift))
3341 (set GRk tmp)
3342 (set-z-and-n cc tmp)
3343 (set icc cc))
3344)
3345
3346(define-pmacro (int-shift-cc-r-r name l-r op ope comment)
3347 (dni (.sym name cc)
3348 (comment)
ac7c07ac 3349 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3350 (.str (.sym name cc) "$pack $GRi,$GRj,$GRk,$ICCi_1")
3351 (+ pack GRk op GRi ICCi_1 ope GRj)
3352 (int-shift-cc-semantics name l-r ICCi_1)
3353 ((fr400 (unit u-integer))
ac7c07ac 3354 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3355 )
3356)
3357
3358(int-shift-cc-r-r sll left OP_01 OPE2_09 "shift left logical reg/reg,set icc")
3359(int-shift-cc-r-r srl right OP_01 OPE2_0B "shift right logical reg/reg,set icc")
3360(int-shift-cc-r-r sra right OP_01 OPE2_0D "shift right arith reg/reg,set icc")
3361
3362(define-pmacro (multiply-cc-semantics signop arg1 arg2 targ icc)
3363 (sequence ((DI tmp) (QI cc))
3364 (set cc icc)
3365 (set tmp (mul DI (signop DI arg1) (signop DI arg2)))
3366 (set-n cc (srl DI tmp 63))
3367 (set-z cc (eq tmp 0))
3368 (set targ tmp)
3369 (set icc cc))
3370)
3371
3372(define-pmacro (multiply-cc-r-r name signop op ope comment)
3373 (dni name
3374 (comment)
ac7c07ac 3375 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3376 (.str name "$pack $GRi,$GRj,$GRdoublek,$ICCi_1")
3377 (+ pack GRdoublek op GRi ICCi_1 ope GRj)
3378 (multiply-cc-semantics signop GRi GRj GRdoublek ICCi_1)
3379 ((fr400 (unit u-imul))
ac7c07ac 3380 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3381 )
3382)
3383
3384(multiply-cc-r-r smulcc ext OP_00 OPE2_09 "signed multiply reg/reg")
3385(multiply-cc-r-r umulcc zext OP_00 OPE2_0B "unsigned multiply reg/reg")
3386
3387
3388; Format: conditional INT, Logic, Shift, cc r-r
3389;
3390(define-pmacro (conditional-int-arith-cc name operation op ope comment)
3391 (dni name
3392 (comment)
ac7c07ac 3393 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3394 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3395 (+ pack GRk op GRi CCi cond ope GRj)
3396 (if (eq CCi (or cond 2))
3397 (int-arith-cc-semantics operation
3398 (reg h-iccr (and (index-of CCi) 3))))
3399 ((fr400 (unit u-integer))
ac7c07ac 3400 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3401 )
3402)
3403
3404(conditional-int-arith-cc caddcc add OP_59 OPE4_0 "add, set icc")
3405(conditional-int-arith-cc csubcc sub OP_59 OPE4_1 "sub, set icc")
3406
3407(dni csmulcc
3408 "conditional signed multiply and set condition code"
ac7c07ac 3409 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3410 "csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond"
3411 (+ pack GRdoublek OP_59 GRi CCi cond OPE4_2 GRj)
3412 (if (eq CCi (or cond 2))
3413 (multiply-cc-semantics ext GRi GRj GRdoublek
3414 (reg h-iccr (and (index-of CCi) 3))))
3415 ((fr400 (unit u-imul))
ac7c07ac 3416 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3417)
3418
3419(define-pmacro (conditional-int-logic-cc name operation op ope comment)
3420 (dni name
3421 (comment)
ac7c07ac 3422 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3423 (.str name "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3424 (+ pack GRk op GRi CCi cond ope GRj)
3425 (if (eq CCi (or cond 2))
3426 (int-logic-cc-semantics operation
3427 (reg h-iccr (and (index-of CCi) 3))))
3428 ((fr400 (unit u-integer))
ac7c07ac 3429 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3430 )
3431)
3432
3433(conditional-int-logic-cc candcc and OP_5B OPE4_0 "conditional and, set icc")
3434(conditional-int-logic-cc corcc or OP_5B OPE4_1 "conditional or , set icc")
3435(conditional-int-logic-cc cxorcc xor OP_5B OPE4_2 "conditional xor, set icc")
3436
3437(define-pmacro (conditional-int-shift-cc name l-r op ope comment)
3438 (dni (.sym c name cc)
3439 (comment)
ac7c07ac 3440 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 3441 (.str (.sym c name cc) "$pack $GRi,$GRj,$GRk,$CCi,$cond")
3442 (+ pack GRk op GRi CCi cond ope GRj)
3443 (if (eq CCi (or cond 2))
3444 (int-shift-cc-semantics name l-r
3445 (reg h-iccr (and (index-of CCi) 3))))
3446 ((fr400 (unit u-integer))
ac7c07ac 3447 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3448 )
3449)
3450
3451(conditional-int-shift-cc sll left OP_5D OPE4_0 "shift left logical, set icc")
3452(conditional-int-shift-cc srl right OP_5D OPE4_1 "shift right logical, set icc")
3453(conditional-int-shift-cc sra right OP_5D OPE4_2 "shift right arith , set icc")
3454
3455; Add and subtract with carry
3456;
3457(define-pmacro (int-arith-x-r-r name operation op ope comment)
3458 (dni name
3459 (comment)
ac7c07ac 3460 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3461 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3462 (+ pack GRk op GRi ICCi_1 ope GRj)
3463 (set GRk ((.sym operation c) GRi GRj (cbit ICCi_1)))
3464 ((fr400 (unit u-integer))
ac7c07ac 3465 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3466 )
3467)
3468
3469(int-arith-x-r-r addx add OP_00 OPE2_02 "Add reg/reg, with carry")
3470(int-arith-x-r-r subx sub OP_00 OPE2_06 "Sub reg/reg, with carry")
3471
3472(define-pmacro (int-arith-x-cc-r-r name operation op ope comment)
3473 (dni name
3474 (comment)
ac7c07ac 3475 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3476 (.str name "$pack $GRi,$GRj,$GRk,$ICCi_1")
3477 (+ pack GRk op GRi ICCi_1 ope GRj)
3478 (sequence ((WI tmp) (QI cc))
3479 (set cc ICCi_1)
3480 (set tmp ((.sym operation c) GRi GRj (cbit cc)))
3481 (set-v cc ((.sym operation -oflag) GRi GRj (cbit cc)))
3482 (set-c cc ((.sym operation -cflag) GRi GRj (cbit cc)))
3483 (set-z-and-n cc tmp)
3484 (set GRk tmp)
3485 (set ICCi_1 cc))
3486 ((fr400 (unit u-integer))
ac7c07ac 3487 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3488 )
3489)
3490
3491(int-arith-x-cc-r-r addxcc add OP_00 OPE2_03 "Add reg/reg, use/set carry")
3492(int-arith-x-cc-r-r subxcc sub OP_00 OPE2_07 "Sub reg/reg, use/set carry")
ac7c07ac
DB		 3493; Add and subtract with saturation
3494;
3495(define-pmacro (int-arith-ss-r-r name operation op ope comment)
3496 (dni name
3497 (comment)
3498 ((UNIT IALL) (FR400-MAJOR I-1) (MACH fr400))
3499 (.str name "$pack $GRi,$GRj,$GRk")
3500 (+ pack GRk op GRi ope GRj)
3501 (sequence ()
3502 (set GRk (operation GRi GRj))
3503 (if ((.sym operation -oflag) GRi GRj (const 0))
3504 ; Overflow, saturate.
3505 ; Sign of result will be
3506 ; same as sign of first operand.
3507 (set GRk
3508 (cond SI
3509 ((gt GRi 0) (const #x7fffffff))
3510 ((lt GRi 0) (const #x80000000))
3511 (else (const 0)))))
3512 )
3513 ((fr400 (unit u-integer)))
3514 )
3515)
3516
3517(int-arith-ss-r-r addss add OP_46 OPE1_00 "add reg/reg, with saturation")
3518(int-arith-ss-r-r subss sub OP_46 OPE1_01 "sub reg/reg, with saturation")
9aab5aa3
AC		 3519
3520; Format: INT, Logic, Shift r-simm
3521;
3522(define-pmacro (int-logic-r-simm name operation op comment)
3523 (dni name
3524 (comment)
ac7c07ac 3525 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3526 (.str name "$pack $GRi,$s12,$GRk")
3527 (+ pack GRk op GRi s12)
3528 (set GRk (operation GRi s12))
3529 ((fr400 (unit u-integer))
ac7c07ac 3530 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3531 )
3532)
3533
3534(int-logic-r-simm addi add OP_10 "add reg/immed")
3535(int-logic-r-simm subi sub OP_14 "sub reg/immed")
3536(int-logic-r-simm andi and OP_20 "and reg/immed")
3537(int-logic-r-simm ori or OP_22 "or reg/immed")
3538(int-logic-r-simm xori xor OP_24 "xor reg/immed")
3539
3540(dni sdivi
3541 "signed division reg/immed"
ac7c07ac 3542 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3543 "sdivi$pack $GRi,$s12,$GRk"
3544 (+ pack GRk OP_1E GRi s12)
3545 (sequence ()
3546 (c-call VOID "@cpu@_signed_integer_divide"
3547 GRi s12 (index-of GRk) 0)
3548 (clobber GRk))
3549 ((fr400 (unit u-idiv))
ac7c07ac 3550 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3551)
3552
3553(dni nsdivi
3554 "non excepting signed division reg/immed"
ac7c07ac
DB		 3555 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3556 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3557 "nsdivi$pack $GRi,$s12,$GRk"
3558 (+ pack GRk OP_2E GRi s12)
3559 (sequence ()
3560 (c-call VOID "@cpu@_signed_integer_divide"
3561 GRi s12 (index-of GRk) 1)
3562 (clobber GRk))
c7a48b9a 3563 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3564)
3565
3566(dni udivi
3567 "unsigned division reg/immed"
ac7c07ac 3568 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3569 "udivi$pack $GRi,$s12,$GRk"
3570 (+ pack GRk OP_1F GRi s12)
3571 (sequence ()
3572 (c-call VOID "@cpu@_unsigned_integer_divide"
3573 GRi s12 (index-of GRk) 0)
3574 (clobber GRk))
3575 ((fr400 (unit u-idiv))
ac7c07ac 3576 (fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3577)
3578
3579(dni nudivi
3580 "non excepting unsigned division reg/immed"
ac7c07ac
DB		 3581 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) NON-EXCEPTING
3582 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3583 "nudivi$pack $GRi,$s12,$GRk"
3584 (+ pack GRk OP_2F GRi s12)
3585 (sequence ()
3586 (c-call VOID "@cpu@_unsigned_integer_divide"
3587 GRi s12 (index-of GRk) 1)
3588 (clobber GRk))
c7a48b9a 3589 ((fr500 (unit u-idiv)) (fr550 (unit u-idiv)))
9aab5aa3
AC		 3590)
3591
3592(define-pmacro (multiply-r-simm name signop op comment)
3593 (dni name
3594 (comment)
ac7c07ac 3595 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3596 (.str name "$pack $GRi,$s12,$GRdoublek")
3597 (+ pack GRdoublek op GRi s12)
3598 (set GRdoublek (mul DI (signop DI GRi) (signop DI s12)))
3599 ((fr400 (unit u-imul))
ac7c07ac 3600 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3601 )
3602)
3603
3604(multiply-r-simm smuli ext OP_18 "signed multiply reg/immed")
3605(multiply-r-simm umuli zext OP_1A "unsigned multiply reg/immed")
3606
3607(define-pmacro (int-shift-r-simm name op comment)
3608 (dni (.sym name i)
3609 (comment)
ac7c07ac 3610 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3611 (.str (.sym name i) "$pack $GRi,$s12,$GRk")
3612 (+ pack GRk op GRi s12)
3613 (set GRk (name GRi (and s12 #x1f)))
3614 ((fr400 (unit u-integer))
ac7c07ac 3615 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3616 )
3617)
3618
3619(int-shift-r-simm sll OP_28 "shift left logical reg/immed")
3620(int-shift-r-simm srl OP_2A "shift right logical reg/immed")
3621(int-shift-r-simm sra OP_2C "shift right arith reg/immed")
3622
3623(dni scani
3624 "scan immediate"
ac7c07ac 3625 ((UNIT SCAN) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3626 "scani$pack $GRi,$s12,$GRk"
3627 (+ pack GRk OP_47 GRi s12)
3628 (scan-semantics GRi s12 GRk)
3629 ((fr400 (unit u-integer))
ac7c07ac 3630 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3631)
3632
3633; Format: INT, Logic, Shift cc r-simm
3634;
3635(define-pmacro (int-arith-cc-r-simm name operation op comment)
3636 (dni name
3637 (comment)
ac7c07ac 3638 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3639 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
3640 (+ pack GRk op GRi ICCi_1 s10)
3641 (sequence ((BI tmp) (QI cc) (SI result))
3642 (set cc ICCi_1)
3643 (set tmp ((.sym operation -oflag) GRi s10 (const 0)))
3644 (set-v cc tmp)
3645 (set tmp ((.sym operation -cflag) GRi s10 (const 0)))
3646 (set-c cc tmp)
3647 (set result (operation GRi s10))
3648 (set-z-and-n cc result)
3649 (set GRk result)
3650 (set ICCi_1 cc))
3651 ((fr400 (unit u-integer))
ac7c07ac 3652 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3653 )
3654)
3655
3656(int-arith-cc-r-simm addicc add OP_11 "add reg/immed, set icc")
3657(int-arith-cc-r-simm subicc sub OP_15 "sub reg/immed, set icc")
3658
3659(define-pmacro (int-logic-cc-r-simm name op comment)
3660 (dni (.sym name icc)
3661 (comment)
ac7c07ac 3662 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3663 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
3664 (+ pack GRk op GRi ICCi_1 s10)
3665 (sequence ((SI tmp))
3666 (set tmp (name GRi s10))
3667 (set GRk tmp)
3668 (set-z-and-n ICCi_1 tmp))
3669 ((fr400 (unit u-integer))
ac7c07ac 3670 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3671 )
3672)
3673
3674(int-logic-cc-r-simm and OP_21 "and reg/immed, set icc")
3675(int-logic-cc-r-simm or OP_23 "or reg/immed, set icc")
3676(int-logic-cc-r-simm xor OP_25 "xor reg/immed, set icc")
3677
3678(define-pmacro (multiply-cc-r-simm name signop op comment)
3679 (dni name
3680 (comment)
ac7c07ac 3681 ((UNIT MULT-DIV) (FR500-MAJOR I-1) (FR550-MAJOR I-2) (FR400-MAJOR I-1))
9aab5aa3
AC		 3682 (.str name "$pack $GRi,$s10,$GRdoublek,$ICCi_1")
3683 (+ pack GRdoublek op GRi ICCi_1 s10)
3684 (multiply-cc-semantics signop GRi s10 GRdoublek ICCi_1)
3685 ((fr400 (unit u-imul))
ac7c07ac 3686 (fr500 (unit u-imul)) (fr550 (unit u-imul)))
9aab5aa3
AC		 3687 )
3688)
3689
3690(multiply-cc-r-simm smulicc ext OP_19 "signed multiply reg/immed")
3691(multiply-cc-r-simm umulicc zext OP_1B "unsigned multiply reg/immed")
3692
3693(define-pmacro (int-shift-cc-r-simm name l-r op comment)
3694 (dni (.sym name icc)
3695 (comment)
ac7c07ac 3696 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3697 (.str (.sym name icc) "$pack $GRi,$s10,$GRk,$ICCi_1")
3698 (+ pack GRk op GRi ICCi_1 s10)
3699 (sequence ((WI shift) (SI tmp) (QI cc))
3700 (set shift (and s10 #x1f))
3701 (set cc (c-call QI (.str "@cpu@_set_icc_for_shift_" l-r)
3702 GRi shift ICCi_1))
3703 (set tmp (name GRi shift))
3704 (set GRk tmp)
3705 (set-z-and-n cc tmp)
3706 (set ICCi_1 cc))
3707 ((fr400 (unit u-integer))
ac7c07ac 3708 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3709 )
3710)
3711
3712(int-shift-cc-r-simm sll left OP_29 "shift left logical reg/immed, set icc")
3713(int-shift-cc-r-simm srl right OP_2B "shift right logical reg/immed, set icc")
3714(int-shift-cc-r-simm sra right OP_2D "shift right arith reg/immed, set icc")
3715
3716(define-pmacro (int-arith-x-r-simm name operation op comment)
3717 (dni name
3718 (comment)
ac7c07ac 3719 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3720 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
3721 (+ pack GRk op GRi ICCi_1 s10)
3722 (set GRk ((.sym operation c) GRi s10 (cbit ICCi_1)))
3723 ((fr400 (unit u-integer))
ac7c07ac 3724 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3725 )
3726)
3727
3728(int-arith-x-r-simm addxi add OP_12 "Add reg/immed, with carry")
3729(int-arith-x-r-simm subxi sub OP_16 "Sub reg/immed, with carry")
3730
3731(define-pmacro (int-arith-x-cc-r-simm name operation op comment)
3732 (dni name
3733 (comment)
ac7c07ac 3734 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3735 (.str name "$pack $GRi,$s10,$GRk,$ICCi_1")
3736 (+ pack GRk op GRi ICCi_1 s10)
3737 (sequence ((WI tmp) (QI cc))
3738 (set cc ICCi_1)
3739 (set tmp ((.sym operation c) GRi s10 (cbit cc)))
3740 (set-v cc ((.sym operation -oflag) GRi s10 (cbit cc)))
3741 (set-c cc ((.sym operation -cflag) GRi s10 (cbit cc)))
3742 (set-z-and-n cc tmp)
3743 (set GRk tmp)
3744 (set ICCi_1 cc))
3745 ((fr400 (unit u-integer))
ac7c07ac 3746 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3747 )
3748)
3749
3750(int-arith-x-cc-r-simm addxicc add OP_13 "Add reg/immed, with carry")
3751(int-arith-x-cc-r-simm subxicc sub OP_17 "Sub reg/immed, with carry")
3752
3753; Byte compare insns
3754
3755(dni cmpb
3756 "Compare bytes"
ac7c07ac 3757 ((UNIT IALL) (FR400-MAJOR I-1) (FR550-MAJOR I-1) (MACH fr400,fr550))
9aab5aa3
AC		 3758 "cmpb$pack $GRi,$GRj,$ICCi_1"
3759 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0C GRj)
3760 (sequence ((QI cc))
3761 (set-n cc (eq (and GRi #xff000000) (and GRj #xff000000)))
3762 (set-z cc (eq (and GRi #x00ff0000) (and GRj #x00ff0000)))
3763 (set-v cc (eq (and GRi #x0000ff00) (and GRj #x0000ff00)))
3764 (set-c cc (eq (and GRi #x000000ff) (and GRj #x000000ff)))
3765 (set ICCi_1 cc))
ac7c07ac 3766 ((fr400 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3767)
3768
3769(dni cmpba
3770 "OR of Compare bytes"
ac7c07ac 3771 ((UNIT IALL) (FR400-MAJOR I-1) (FR550-MAJOR I-1) (MACH fr400,fr550))
9aab5aa3
AC		 3772 "cmpba$pack $GRi,$GRj,$ICCi_1"
3773 (+ pack (GRk-null) OP_00 GRi ICCi_1 OPE2_0D GRj)
3774 (sequence ((QI cc))
3775 (set cc 0)
3776 (set-c cc
3777 (orif (eq (and GRi #xff000000) (and GRj #xff000000))
3778 (orif (eq (and GRi #x00ff0000) (and GRj #x00ff0000))
3779 (orif (eq (and GRi #x0000ff00)
3780 (and GRj #x0000ff00))
3781 (eq (and GRi #x000000ff)
3782 (and GRj #x000000ff))))))
3783 (set ICCi_1 cc))
ac7c07ac 3784 ((fr400 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3785)
3786
3787; Format: Load immediate
3788;
3789(dni setlo
3790 "set low order bits"
ac7c07ac 3791 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3792 "setlo$pack $ulo16,$GRklo"
3793 (+ pack GRk OP_3D (misc-null-4) u16)
3794 (set GRklo u16)
3795 ((fr400 (unit u-set-hilo))
ac7c07ac 3796 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
9aab5aa3
AC		 3797)
3798
3799(dni sethi
3800 "set high order bits"
ac7c07ac 3801 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3802 "sethi$pack $uhi16,$GRkhi"
3803 (+ pack GRkhi OP_3E (misc-null-4) u16)
3804 (set GRkhi u16)
3805 ((fr400 (unit u-set-hilo))
ac7c07ac 3806 (fr500 (unit u-set-hilo)) (fr550 (unit u-set-hilo)))
9aab5aa3
AC		 3807)
3808
3809(dni setlos
3810 "set low order bits and extend sign"
ac7c07ac 3811 ((UNIT IALL) (FR500-MAJOR I-1) (FR550-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 3812 "setlos$pack $slo16,$GRk"
3813 (+ pack GRk OP_3F (misc-null-4) s16)
3814 (set GRk s16)
3815 ((fr400 (unit u-integer))
ac7c07ac 3816 (fr500 (unit u-integer)) (fr550 (unit u-integer)))
9aab5aa3
AC		 3817)
3818
3819(define-pmacro (load-gr-r name mode op ope comment)
3820 (dni name
3821 (comment)
ac7c07ac 3822 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2))
9aab5aa3
AC		 3823 (.str name "$pack @($GRi,$GRj),$GRk")
3824 (+ pack GRk op GRi ope GRj)
3825 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
3826 ((fr400 (unit u-gr-load))
ac7c07ac 3827 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 3828 )
3829)
3830
3831(load-gr-r ldsb QI OP_02 OPE1_00 "Load signed byte")
3832(load-gr-r ldub UQI OP_02 OPE1_01 "Load unsigned byte")
3833(load-gr-r ldsh HI OP_02 OPE1_02 "Load signed half")
3834(load-gr-r lduh UHI OP_02 OPE1_03 "Load unsigned half")
3835(load-gr-r ld SI OP_02 OPE1_04 "Load word")
3836
3837(define-pmacro (load-fr-r name mode op ope comment)
3838 (dni name
3839 (comment)
ac7c07ac 3840 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS)
9aab5aa3
AC		 3841 (.str name "$pack @($GRi,$GRj),$FRintk")
3842 (+ pack FRintk op GRi ope GRj)
3843 (set FRintk (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
3844 ((fr400 (unit u-fr-load))
ac7c07ac 3845 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 3846 )
3847)
3848
3849(load-fr-r ldbf UQI OP_02 OPE1_08 "Load byte float")
3850(load-fr-r ldhf UHI OP_02 OPE1_09 "Load half float")
3851(load-fr-r ldf SI OP_02 OPE1_0A "Load word float")
3852
3853(define-pmacro (load-cpr-r name mode op ope reg attr comment)
3854 (dni name
3855 (comment)
3856 ((UNIT LOAD) (FR500-MAJOR I-2) attr)
3857 (.str name "$pack @($GRi,$GRj),$" reg "k")
3858 (+ pack (.sym reg k) op GRi ope GRj)
3859 (set (.sym reg k)
3860 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj)))
3861 ()
3862 )
3863)
3864
3865(load-cpr-r ldc SI OP_02 OPE1_0D CPR (MACH frv) "Load coprocessor word")
3866
3867; These correspond to enumerators in frv-sim.h
3868(define-pmacro (ne-UQI-size) 0)
3869(define-pmacro (ne-QI-size) 1)
3870(define-pmacro (ne-UHI-size) 2)
3871(define-pmacro (ne-HI-size) 3)
3872(define-pmacro (ne-SI-size) 4)
3873(define-pmacro (ne-DI-size) 5)
3874(define-pmacro (ne-XI-size) 6)
3875
3876(define-pmacro (ne-load-semantics base dispix targ idisp size is_float action)
3877 (sequence ((BI do_op))
3878 (set do_op
3879 (c-call BI "@cpu@_check_non_excepting_load"
3880 (index-of base) dispix (index-of targ)
3881 idisp size is_float))
3882 (if do_op action))
3883)
3884
3885(define-pmacro (ne-load-gr-r name mode op ope size comment)
3886 (dni name
3887 (comment)
ac7c07ac
DB		 3888 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
3889 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3890 (.str name "$pack @($GRi,$GRj),$GRk")
3891 (+ pack GRk op GRi ope GRj)
3892 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
3893 (set GRk
3894 (c-call mode (.str "@cpu@_read_mem_" mode)
3895 pc (add GRi GRj))))
ac7c07ac 3896 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 3897 )
3898)
3899
3900(ne-load-gr-r nldsb QI OP_02 OPE1_20 (ne-QI-size) "Load signed byte")
3901(ne-load-gr-r nldub UQI OP_02 OPE1_21 (ne-UQI-size) "Load unsigned byte")
3902(ne-load-gr-r nldsh HI OP_02 OPE1_22 (ne-HI-size) "Load signed half")
3903(ne-load-gr-r nlduh UHI OP_02 OPE1_23 (ne-UHI-size) "Load unsigned half")
3904(ne-load-gr-r nld SI OP_02 OPE1_24 (ne-SI-size) "Load word")
3905
3906(define-pmacro (ne-load-fr-r name mode op ope size comment)
3907 (dni name
3908 (comment)
ac7c07ac
DB		 3909 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
3910 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3911 (.str name "$pack @($GRi,$GRj),$FRintk")
3912 (+ pack FRintk op GRi ope GRj)
3913 (ne-load-semantics GRi (index-of GRj) FRintk 0 size 1
3914 (set FRintk
3915 (c-call mode (.str "@cpu@_read_mem_" mode)
3916 pc (add GRi GRj))))
ac7c07ac 3917 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 3918 )
3919)
3920
3921(ne-load-fr-r nldbf UQI OP_02 OPE1_28 (ne-UQI-size) "Load byte float")
3922(ne-load-fr-r nldhf UHI OP_02 OPE1_29 (ne-UHI-size) "Load half float")
3923(ne-load-fr-r nldf SI OP_02 OPE1_2A (ne-SI-size) "Load word float")
3924
3925; Semantics for a load-double insn
3926;
3927(define-pmacro (load-double-semantics not_gr mode regtype address arg)
3928 (if (orif not_gr (ne (index-of (.sym regtype doublek)) 0))
3929 (sequence ()
3930 (set address (add GRi arg))
3931 (set (.sym regtype doublek)
3932 (c-call mode (.str "@cpu@_read_mem_" mode) pc address))))
3933)
3934
3935(define-pmacro (load-double-r-r
3936 name not_gr mode op ope regtype attr profile comment)
3937 (dni name
3938 (comment)
ac7c07ac 3939 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr)
9aab5aa3
AC		 3940 (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
3941 (+ pack (.sym regtype doublek) op GRi ope GRj)
3942 (sequence ((WI address))
3943 (load-double-semantics not_gr mode regtype address GRj))
3944 profile
3945 )
3946)
3947
3948(load-double-r-r ldd 0 DI OP_02 OPE1_05 GR NA
ac7c07ac 3949 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 3950 "Load double word")
3951(load-double-r-r lddf 1 DF OP_02 OPE1_0B FR FR-ACCESS
ac7c07ac 3952 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 3953 "Load double float")
3954(load-double-r-r lddc 1 DI OP_02 OPE1_0E CPR (MACH frv) ()
3955 "Load coprocessor double")
3956
3957(define-pmacro (ne-load-double-r-r
3958 name not_gr mode op ope regtype size is_float attr profile
3959 comment)
3960 (dni name
3961 (comment)
ac7c07ac
DB		 3962 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
3963 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 3964 (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
3965 (+ pack (.sym regtype doublek) op GRi ope GRj)
3966 (sequence ((WI address))
3967 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek)
3968 0 size is_float
3969 (load-double-semantics not_gr mode
3970 regtype
3971 address GRj)))
3972 profile
3973 )
3974)
3975
3976(ne-load-double-r-r nldd 0 DI OP_02 OPE1_25 GR (ne-DI-size) 0 NA
ac7c07ac 3977 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
9aab5aa3 3978(ne-load-double-r-r nlddf 1 DF OP_02 OPE1_2B FR (ne-DI-size) 1 FR-ACCESS
ac7c07ac 3979 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
9aab5aa3
AC		 3980
3981; Semantics for a load-quad insn
3982;
3983(define-pmacro (load-quad-semantics regtype address arg)
3984 (sequence ()
3985 (set address (add GRi arg))
3986 (c-call VOID (.str "@cpu@_load_quad_" regtype)
3987 pc address (index-of (.sym regtype k))))
3988)
3989
3990(define-pmacro (load-quad-r-r name op ope regtype attr profile comment)
3991 (dni name
3992 (comment)
3993 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
3994 (.str name "$pack @($GRi,$GRj),$" regtype "k")
3995 (+ pack (.sym regtype k) op GRi ope GRj)
3996 (sequence ((WI address))
3997 (load-quad-semantics regtype address GRj))
3998 ; TODO regtype-k not referenced for profiling
3999 profile
4000 )
4001)
4002
4003(load-quad-r-r ldq OP_02 OPE1_06 GR NA ((fr500 (unit u-gr-load)))
4004 "Load quad word")
4005(load-quad-r-r ldqf OP_02 OPE1_0C FRint FR-ACCESS ((fr500 (unit u-fr-load)))
4006 "Load quad float")
4007(load-quad-r-r ldqc OP_02 OPE1_0F CPR NA () "Load coprocessor quad")
4008
4009(define-pmacro (ne-load-quad-r-r
4010 name op ope regtype size is_float attr profile comment)
4011 (dni name
4012 (comment)
4013 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4014 (.str name "$pack @($GRi,$GRj),$" regtype "k")
4015 (+ pack (.sym regtype k) op GRi ope GRj)
4016 (sequence ((WI address))
4017 (ne-load-semantics GRi (index-of GRj) (.sym regtype k)
4018 0 size is_float
4019 (load-quad-semantics regtype address GRj)))
4020 ; TODO regtype-k not referenced for profiling
4021 profile
4022 )
4023)
4024
4025(ne-load-quad-r-r nldq OP_02 OPE1_26 GR (ne-XI-size) 0 NA
4026 ((fr500 (unit u-gr-load))) "Load quad word")
4027(ne-load-quad-r-r nldqf OP_02 OPE1_2C FRint (ne-XI-size) 1 FR-ACCESS
4028 ((fr500 (unit u-fr-load))) "Load quad float")
4029
4030(define-pmacro (load-gr-u-semantics mode)
4031 (sequence ((UWI address))
4032 (set address (add GRi GRj))
4033 (set GRk (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4034 (if (ne (index-of GRi) (index-of GRk))
4035 (sequence ()
4036 (set GRi address)
4037 (c-call VOID "@cpu@_force_update"))))
4038)
4039
4040(define-pmacro (load-gr-u name mode op ope comment)
4041 (dni name
4042 (comment)
ac7c07ac 4043 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2))
9aab5aa3
AC		 4044 (.str name "$pack @($GRi,$GRj),$GRk")
4045 (+ pack GRk op GRi ope GRj)
4046 (load-gr-u-semantics mode)
4047 ((fr400 (unit u-gr-load))
ac7c07ac 4048 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4049 )
4050)
4051
4052(load-gr-u ldsbu QI OP_02 OPE1_10 "Load signed byte, update index")
4053(load-gr-u ldubu UQI OP_02 OPE1_11 "Load unsigned byte, update index")
4054(load-gr-u ldshu HI OP_02 OPE1_12 "Load signed half, update index")
4055(load-gr-u lduhu UHI OP_02 OPE1_13 "Load unsigned half, update index")
4056(load-gr-u ldu SI OP_02 OPE1_14 "Load word, update index")
4057
4058(define-pmacro (ne-load-gr-u name mode op ope size comment)
4059 (dni name
4060 (comment)
ac7c07ac
DB		 4061 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4062 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4063 (.str name "$pack @($GRi,$GRj),$GRk")
4064 (+ pack GRk op GRi ope GRj)
4065 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0 (load-gr-u-semantics mode))
ac7c07ac 4066 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4067 )
4068)
4069
4070(ne-load-gr-u nldsbu QI OP_02 OPE1_30 (ne-QI-size) "Load signed byte, update index")
4071(ne-load-gr-u nldubu UQI OP_02 OPE1_31 (ne-UQI-size) "Load unsigned byte, update index")
4072(ne-load-gr-u nldshu HI OP_02 OPE1_32 (ne-HI-size) "Load signed half, update index")
4073(ne-load-gr-u nlduhu UHI OP_02 OPE1_33 (ne-UHI-size) "Load unsigned half, update index")
4074(ne-load-gr-u nldu SI OP_02 OPE1_34 (ne-SI-size) "Load word, update index")
4075
4076(define-pmacro (load-non-gr-u-semantics mode regtype)
4077 (sequence ((UWI address))
4078 (set address (add GRi GRj))
4079 (set (.sym regtype k)
4080 (c-call mode (.str "@cpu@_read_mem_" mode) pc address))
4081 (set GRi address)
4082 (c-call VOID "@cpu@_force_update"))
4083)
4084
4085(define-pmacro (load-fr-u name mode op ope comment)
4086 (dni name
4087 (comment)
ac7c07ac 4088 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) FR-ACCESS)
9aab5aa3
AC		 4089 (.str name "$pack @($GRi,$GRj),$FRintk")
4090 (+ pack FRintk op GRi ope GRj)
4091 (load-non-gr-u-semantics mode FRint)
4092 ((fr400 (unit u-fr-load))
ac7c07ac 4093 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4094 )
4095)
4096
4097(load-fr-u ldbfu UQI OP_02 OPE1_18 "Load byte float, update index")
4098(load-fr-u ldhfu UHI OP_02 OPE1_19 "Load half float, update index")
4099(load-fr-u ldfu SI OP_02 OPE1_1A "Load word float, update index")
4100
4101(define-pmacro (load-cpr-u name mode op ope comment)
4102 (dni name
4103 (comment)
4104 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4105 (.str name "$pack @($GRi,$GRj),$CPRk")
4106 (+ pack CPRk op GRi ope GRj)
4107 (load-non-gr-u-semantics mode CPR)
4108 ()
4109 )
4110)
4111
4112(load-cpr-u ldcu SI OP_02 OPE1_1D "Load coprocessor word float,update index")
4113
4114(define-pmacro (ne-load-non-gr-u name mode op ope regtype size comment)
4115 (dni name
4116 (comment)
ac7c07ac
DB		 4117 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4118 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4119 (.str name "$pack @($GRi,$GRj),$" regtype "k")
4120 (+ pack (.sym regtype k) op GRi ope GRj)
4121 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4122 (load-non-gr-u-semantics mode regtype))
ac7c07ac 4123 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4124 )
4125)
4126
4127(ne-load-non-gr-u nldbfu UQI OP_02 OPE1_38 FRint (ne-UQI-size) "Load byte float, update index")
4128(ne-load-non-gr-u nldhfu UHI OP_02 OPE1_39 FRint (ne-UHI-size) "Load half float, update index")
4129(ne-load-non-gr-u nldfu SI OP_02 OPE1_3A FRint (ne-SI-size) "Load word float, update index")
4130
4131(define-pmacro (load-double-gr-u-semantics)
4132 (sequence ((WI address))
4133 (load-double-semantics 0 DI GR address GRj)
4134 (if (ne (index-of GRi) (index-of GRdoublek))
4135 (sequence ()
4136 (set GRi address)
4137 (c-call VOID "@cpu@_force_update"))))
4138)
4139
4140(define-pmacro (load-double-gr-u name op ope comment)
4141 (dni name
4142 (comment)
ac7c07ac 4143 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2))
9aab5aa3
AC		 4144 (.str name "$pack @($GRi,$GRj),$GRdoublek")
4145 (+ pack GRdoublek op GRi ope GRj)
4146 (load-double-gr-u-semantics)
4147 ((fr400 (unit u-gr-load))
ac7c07ac 4148 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4149 )
4150)
4151
4152(load-double-gr-u lddu OP_02 OPE1_15 "Load double word, update index")
4153
4154(define-pmacro (ne-load-double-gr-u name op ope size comment)
4155 (dni name
4156 (comment)
ac7c07ac
DB		 4157 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING
4158 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4159 (.str name "$pack @($GRi,$GRj),$GRdoublek")
4160 (+ pack GRdoublek op GRi ope GRj)
4161 (ne-load-semantics GRi (index-of GRj) GRdoublek 0 size 0
4162 (load-double-gr-u-semantics))
ac7c07ac 4163 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4164
4165 )
4166)
4167
4168(ne-load-double-gr-u nlddu OP_02 OPE1_35 (ne-DI-size) "Load double word, update index")
4169
4170(define-pmacro (load-double-non-gr-u-semantics mode regtype)
4171 (sequence ((WI address))
4172 (load-double-semantics 1 mode regtype address GRj)
4173 (set GRi address)
4174 (c-call VOID "@cpu@_force_update"))
4175)
4176
4177(define-pmacro (load-double-non-gr-u
4178 name mode op ope regtype attr profile comment)
4179 (dni name
4180 (comment)
ac7c07ac 4181 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr)
9aab5aa3
AC		 4182 (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4183 (+ pack (.sym regtype doublek) op GRi ope GRj)
4184 (load-double-non-gr-u-semantics mode regtype)
4185 profile
4186 )
4187)
4188
4189(load-double-non-gr-u lddfu DF OP_02 OPE1_1B FR FR-ACCESS
ac7c07ac 4190 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4191 "Load double float, update index")
4192(load-double-non-gr-u lddcu DI OP_02 OPE1_1E CPR (MACH frv)
4193 () "Load coprocessor double float, update index")
4194
4195(define-pmacro (ne-load-double-non-gr-u name mode op ope regtype size comment)
4196 (dni name
4197 (comment)
ac7c07ac
DB		 4198 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING FR-ACCESS
4199 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4200 (.str name "$pack @($GRi,$GRj),$" regtype "doublek")
4201 (+ pack (.sym regtype doublek) op GRi ope GRj)
4202 (ne-load-semantics GRi (index-of GRj) (.sym regtype doublek) 0 size 1
4203 (load-double-non-gr-u-semantics mode regtype))
ac7c07ac 4204 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4205 )
4206)
4207
4208(ne-load-double-non-gr-u nlddfu DF OP_02 OPE1_3B FR (ne-DI-size) "Load double float, update index")
4209
4210(define-pmacro (load-quad-gr-u-semantics)
4211 (sequence ((WI address))
4212 (load-quad-semantics GR address GRj)
4213 (if (ne (index-of GRi) (index-of GRk))
4214 (sequence ()
4215 (set GRi address)
4216 (c-call VOID "@cpu@_force_update"))))
4217)
4218
4219(define-pmacro (load-quad-gr-u name op ope comment)
4220 (dni name
4221 (comment)
4222 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv))
4223 (.str name "$pack @($GRi,$GRj),$GRk")
4224 (+ pack GRk op GRi ope GRj)
4225 (load-quad-gr-u-semantics)
4226 ; TODO - GRk not referenced here for profiling
4227 ((fr500 (unit u-gr-load)))
4228 )
4229)
4230
4231(load-quad-gr-u ldqu OP_02 OPE1_16 "Load quad word, update index")
4232
4233(define-pmacro (ne-load-quad-gr-u name op ope size comment)
4234 (dni name
4235 (comment)
4236 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING)
4237 (.str name "$pack @($GRi,$GRj),$GRk")
4238 (+ pack GRk op GRi ope GRj)
4239 (ne-load-semantics GRi (index-of GRj) GRk 0 size 0
4240 (load-quad-gr-u-semantics))
4241 ; TODO - GRk not referenced here for profiling
4242 ((fr500 (unit u-gr-load)))
4243 )
4244)
4245
4246(ne-load-quad-gr-u nldqu OP_02 OPE1_36 (ne-XI-size) "Load quad word, update index")
4247
4248(define-pmacro (load-quad-non-gr-u-semantics regtype)
4249 (sequence ((WI address))
4250 (load-quad-semantics regtype address GRj)
4251 (set GRi address)
4252 (c-call VOID "@cpu@_force_update"))
4253)
4254
4255(define-pmacro (load-quad-non-gr-u name op ope regtype attr profile comment)
4256 (dni name
4257 (comment)
4258 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4259 (.str name "$pack @($GRi,$GRj),$" regtype "k")
4260 (+ pack (.sym regtype k) op GRi ope GRj)
4261 (load-quad-non-gr-u-semantics regtype)
4262 profile
4263 )
4264)
4265
4266(load-quad-non-gr-u ldqfu OP_02 OPE1_1C FRint FR-ACCESS
4267 ((fr500 (unit u-fr-load))) "Load quad float, update index")
4268(load-quad-non-gr-u ldqcu OP_02 OPE1_1F CPR NA
4269 () "Load coprocessor quad word, update index")
4270
4271(define-pmacro (ne-load-quad-non-gr-u name op ope regtype size comment)
4272 (dni name
4273 (comment)
4274 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING FR-ACCESS)
4275 (.str name "$pack @($GRi,$GRj),$" regtype "k")
4276 (+ pack (.sym regtype k) op GRi ope GRj)
4277 (ne-load-semantics GRi (index-of GRj) (.sym regtype k) 0 size 1
4278 (load-quad-non-gr-u-semantics regtype))
4279 ((fr500 (unit u-fr-load)))
4280 )
4281)
4282
4283(ne-load-quad-non-gr-u nldqfu OP_02 OPE1_3C FRint (ne-XI-size) "Load quad float,update index")
4284
4285(define-pmacro (load-r-simm name mode op regtype attr profile comment)
4286 (dni name
4287 (comment)
ac7c07ac 4288 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr)
9aab5aa3
AC		 4289 (.str name "$pack @($GRi,$d12),$" regtype "k")
4290 (+ pack (.sym regtype k) op GRi d12)
4291 (set (.sym regtype k)
4292 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi d12)))
4293 profile
4294 )
4295)
4296
4297(load-r-simm ldsbi QI OP_30 GR NA
ac7c07ac 4298 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4299 "Load signed byte")
4300(load-r-simm ldshi HI OP_31 GR NA
ac7c07ac 4301 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4302 "Load signed half")
4303(load-r-simm ldi SI OP_32 GR NA
ac7c07ac 4304 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4305 "Load word")
4306(load-r-simm ldubi UQI OP_35 GR NA
ac7c07ac 4307 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4308 "Load unsigned byte")
4309(load-r-simm lduhi UHI OP_36 GR NA
ac7c07ac 4310 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4311 "Load unsigned half")
4312
4313(load-r-simm ldbfi UQI OP_38 FRint FR-ACCESS
ac7c07ac 4314 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4315 "Load byte float")
4316(load-r-simm ldhfi UHI OP_39 FRint FR-ACCESS
ac7c07ac 4317 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4318 "Load half float")
4319(load-r-simm ldfi SI OP_3A FRint FR-ACCESS
ac7c07ac 4320 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4321 "Load word float")
4322
4323(define-pmacro (ne-load-r-simm
4324 name mode op regtype size is_float attr profile comment)
4325 (dni name
4326 (comment)
ac7c07ac
DB		 4327 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4328 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4329 (.str name "$pack @($GRi,$d12),$" regtype "k")
4330 (+ pack (.sym regtype k) op GRi d12)
4331 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4332 (set (.sym regtype k)
4333 (c-call mode (.str "@cpu@_read_mem_" mode)
4334 pc (add GRi d12))))
4335 profile
4336 )
4337)
4338
4339(ne-load-r-simm nldsbi QI OP_40 GR (ne-QI-size) 0 NA
ac7c07ac 4340 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed byte")
9aab5aa3 4341(ne-load-r-simm nldubi UQI OP_41 GR (ne-UQI-size) 0 NA
ac7c07ac 4342 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned byte")
9aab5aa3 4343(ne-load-r-simm nldshi HI OP_42 GR (ne-HI-size) 0 NA
ac7c07ac 4344 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load signed half")
9aab5aa3 4345(ne-load-r-simm nlduhi UHI OP_43 GR (ne-UHI-size) 0 NA
ac7c07ac 4346 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load unsigned half")
9aab5aa3 4347(ne-load-r-simm nldi SI OP_44 GR (ne-SI-size) 0 NA
ac7c07ac 4348 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load word")
9aab5aa3
AC		 4349
4350(ne-load-r-simm nldbfi UQI OP_48 FRint (ne-UQI-size) 1 FR-ACCESS
ac7c07ac 4351 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load byte float")
9aab5aa3 4352(ne-load-r-simm nldhfi UHI OP_49 FRint (ne-UHI-size) 1 FR-ACCESS
ac7c07ac 4353 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load half float")
9aab5aa3 4354(ne-load-r-simm nldfi SI OP_4A FRint (ne-SI-size) 1 FR-ACCESS
ac7c07ac 4355 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load word float")
9aab5aa3
AC		 4356
4357(define-pmacro (load-double-r-simm
4358 name not_gr mode op regtype attr profile comment)
4359 (dni name
4360 (comment)
ac7c07ac 4361 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) attr)
9aab5aa3
AC		 4362 (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4363 (+ pack (.sym regtype doublek) op GRi d12)
4364 (sequence ((WI address))
4365 (load-double-semantics not_gr mode regtype address d12))
4366 profile
4367 )
4368)
4369
4370(load-double-r-simm lddi 0 DI OP_33 GR NA
ac7c07ac 4371 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4372 "Load double word")
4373(load-double-r-simm lddfi 1 DF OP_3B FR FR-ACCESS
ac7c07ac 4374 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4375 "Load double float")
4376
4377(define-pmacro (ne-load-double-r-simm
4378 name not_gr mode op regtype size is_float attr profile comment)
4379 (dni name
4380 (comment)
ac7c07ac
DB		 4381 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) NON-EXCEPTING attr
4382 (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 4383 (.str name "$pack @($GRi,$d12),$" regtype "doublek")
4384 (+ pack (.sym regtype doublek) op GRi d12)
4385 (sequence ((WI address))
4386 (ne-load-semantics GRi -1 (.sym regtype doublek)
4387 d12 size is_float
4388 (load-double-semantics not_gr mode
4389 regtype
4390 address d12)))
4391 profile
4392 )
4393)
4394
4395(ne-load-double-r-simm nlddi 0 DI OP_45 GR (ne-DI-size) 0 NA
ac7c07ac 4396 ((fr500 (unit u-gr-load)) (fr550 (unit u-gr-load))) "Load double word")
9aab5aa3 4397(ne-load-double-r-simm nlddfi 1 DF OP_4B FR (ne-DI-size) 1 FR-ACCESS
ac7c07ac 4398 ((fr500 (unit u-fr-load)) (fr550 (unit u-fr-load))) "Load double float")
9aab5aa3
AC		 4399
4400(define-pmacro (load-quad-r-simm name op regtype attr profile comment)
4401 (dni name
4402 (comment)
4403 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) attr)
4404 (.str name "$pack @($GRi,$d12),$" regtype "k")
4405 (+ pack (.sym regtype k) op GRi d12)
4406 (sequence ((WI address))
4407 (load-quad-semantics regtype address d12))
4408 profile
4409 )
4410)
4411
4412(load-quad-r-simm ldqi OP_34 GR NA
4413 ((fr500 (unit u-gr-load))) "Load quad word")
4414(load-quad-r-simm ldqfi OP_3C FRint FR-ACCESS
4415 ((fr500 (unit u-fr-load))) "Load quad float")
4416
4417(define-pmacro (ne-load-quad-r-simm
4418 name op regtype size is_float attr profile comment)
4419 (dni name
4420 (comment)
4421 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) NON-EXCEPTING attr)
4422 (.str name "$pack @($GRi,$d12),$" regtype "k")
4423 (+ pack (.sym regtype k) op GRi d12)
4424 (sequence ((WI address))
4425 (ne-load-semantics GRi -1 (.sym regtype k) d12 size is_float
4426 (load-quad-semantics regtype address d12)))
4427 profile
4428 )
4429)
4430
9aab5aa3
AC		 4431(ne-load-quad-r-simm nldqfi OP_4C FRint (ne-XI-size) 1 FR-ACCESS
4432 ((fr500 (unit u-fr-load))) "Load quad float")
4433
4434(define-pmacro (store-r-r name mode op ope reg attr profile comment)
4435 (dni name
4436 (comment)
ac7c07ac 4437 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
9aab5aa3
AC		 4438 (.str name "$pack $" reg "k,@($GRi,$GRj)")
4439 (+ pack (.sym reg k) op GRi ope GRj)
4440 (c-call VOID (.str "@cpu@_write_mem_" mode)
4441 pc (add GRi GRj) (.sym reg k))
4442 profile
4443 )
4444)
4445
4446(store-r-r stb QI OP_03 OPE1_00 GR NA
ac7c07ac 4447 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4448 "Store unsigned byte")
4449(store-r-r sth HI OP_03 OPE1_01 GR NA
ac7c07ac 4450 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4451 "Store unsigned half")
4452(store-r-r st SI OP_03 OPE1_02 GR NA
ac7c07ac 4453 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4454 "Store word")
4455
4456(store-r-r stbf QI OP_03 OPE1_08 FRint FR-ACCESS
ac7c07ac 4457 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4458 "Store byte float")
4459(store-r-r sthf HI OP_03 OPE1_09 FRint FR-ACCESS
ac7c07ac 4460 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4461 "Store half float")
4462(store-r-r stf SI OP_03 OPE1_0A FRint FR-ACCESS
ac7c07ac 4463 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4464 "Store word float")
4465
4466(store-r-r stc SI OP_03 OPE1_25 CPR (MACH frv) () "Store coprocessor word")
4467
9aab5aa3
AC		 4468; Semantics for a store-double insn
4469;
4470(define-pmacro (store-double-semantics mode regtype address arg)
4471 (sequence ()
4472 (set address (add GRi arg))
4473 (c-call VOID (.str "@cpu@_write_mem_" mode)
4474 pc address (.sym regtype doublek)))
4475)
4476
4477(define-pmacro (store-double-r-r name mode op ope regtype attr profile comment)
4478 (dni name
4479 (comment)
ac7c07ac 4480 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
1340b9a9
DB		 4481 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
4482 (+ pack (.sym regtype doublek) op GRi ope GRj)
9aab5aa3
AC		 4483 (sequence ((WI address))
4484 (store-double-semantics mode regtype address GRj))
4485 profile
4486 )
4487)
4488
4489(store-double-r-r std DI OP_03 OPE1_03 GR NA
ac7c07ac 4490 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4491 "Store double word")
4492(store-double-r-r stdf DF OP_03 OPE1_0B FR FR-ACCESS
ac7c07ac 4493 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4494 "Store double float")
4495
4496(store-double-r-r stdc DI OP_03 OPE1_26 CPR (MACH frv)
4497 () "Store coprocessor double word")
4498
9aab5aa3
AC		 4499; Semantics for a store-quad insn
4500;
4501(define-pmacro (store-quad-semantics regtype address arg)
4502 (sequence ()
4503 (set address (add GRi arg))
4504 (c-call VOID (.str "@cpu@_store_quad_" regtype)
4505 pc address (index-of (.sym regtype k))))
4506)
4507
4508(define-pmacro (store-quad-r-r name op ope regtype attr profile comment)
4509 (dni name
4510 (comment)
8caa9169 4511 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
9aab5aa3
AC		 4512 (.str name "$pack $" regtype "k,@($GRi,$GRj)")
4513 (+ pack (.sym regtype k) op GRi ope GRj)
4514 (sequence ((WI address))
4515 (store-quad-semantics regtype address GRj))
4516 profile
4517 )
4518)
4519
4520(store-quad-r-r stq OP_03 OPE1_04 GR NA
4521 ((fr500 (unit u-gr-store))) "Store quad word")
4522(store-quad-r-r stqf OP_03 OPE1_0C FRint FR-ACCESS
4523 ((fr500 (unit u-fr-store)))
4524 "Store quad float")
4525(store-quad-r-r stqc OP_03 OPE1_27 CPR NA
4526 () "Store coprocessor quad word")
4527
9aab5aa3
AC		 4528(define-pmacro (store-r-r-u name mode op ope regtype attr profile comment)
4529 (dni name
4530 (comment)
ac7c07ac 4531 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
9aab5aa3
AC		 4532 (.str name "$pack $" regtype "k,@($GRi,$GRj)")
4533 (+ pack (.sym regtype k) op GRi ope GRj)
4534 (sequence ((UWI address))
4535 (set address (add GRi GRj))
4536 (c-call VOID (.str "@cpu@_write_mem_" mode)
4537 pc address (.sym regtype k))
4538 (set GRi address))
4539 profile
4540 )
4541)
4542
4543(store-r-r-u stbu QI OP_03 OPE1_10 GR NA
ac7c07ac 4544 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4545 "Store unsigned byte, update index")
4546(store-r-r-u sthu HI OP_03 OPE1_11 GR NA
ac7c07ac 4547 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4548 "Store unsigned half, update index")
4549(store-r-r-u stu WI OP_03 OPE1_12 GR NA
ac7c07ac 4550 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4551 "Store word, update index")
4552
4553(store-r-r-u stbfu QI OP_03 OPE1_18 FRint FR-ACCESS
ac7c07ac 4554 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4555 "Store byte float, update index")
4556(store-r-r-u sthfu HI OP_03 OPE1_19 FRint FR-ACCESS
ac7c07ac 4557 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4558 "Store half float, update index")
4559(store-r-r-u stfu SI OP_03 OPE1_1A FRint FR-ACCESS
ac7c07ac 4560 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4561 "Store word float, update index")
4562
4563(store-r-r-u stcu SI OP_03 OPE1_2D CPR (MACH frv) ()
4564 "Store coprocessor word, update index")
4565
4566(define-pmacro (store-double-r-r-u
4567 name mode op ope regtype attr profile comment)
4568 (dni name
4569 (comment)
ac7c07ac 4570 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
1340b9a9
DB		 4571 (.str name "$pack $" regtype "doublek,@($GRi,$GRj)")
4572 (+ pack (.sym regtype doublek) op GRi ope GRj)
9aab5aa3
AC		 4573 (sequence ((WI address))
4574 (store-double-semantics mode regtype address GRj)
4575 (set GRi address))
4576 profile
4577 )
4578)
4579
4580(store-double-r-r-u stdu DI OP_03 OPE1_13 GR NA
ac7c07ac 4581 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4582 "Store double word, update index")
4583(store-double-r-r-u stdfu DF OP_03 OPE1_1B FR FR-ACCESS
ac7c07ac 4584 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4585 "Store double float,update index")
4586(store-double-r-r-u stdcu DI OP_03 OPE1_2E CPR (MACH frv) ()
4587 "Store coprocessor double word, update index")
4588
4589(define-pmacro (store-quad-r-r-u name op ope regtype attr profile comment)
4590 (dni name
4591 (comment)
8caa9169 4592 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
9aab5aa3
AC		 4593 (.str name "$pack $" regtype "k,@($GRi,$GRj)")
4594 (+ pack (.sym regtype k) op GRi ope GRj)
4595 (sequence ((WI address))
4596 (store-quad-semantics regtype address GRj)
4597 (set GRi address))
4598 profile
4599 )
4600)
4601
4602(store-quad-r-r-u stqu OP_03 OPE1_14 GR NA
4603 ((fr500 (unit u-gr-store)))
4604 "Store quad word, update index")
4605(store-quad-r-r-u stqfu OP_03 OPE1_1C FRint FR-ACCESS
4606 ((fr500 (unit u-fr-store)))
4607 "Store quad float, update index")
4608(store-quad-r-r-u stqcu OP_03 OPE1_2F CPR NA ()
4609 "Store coprocessor quad word, update index")
4610
4611(define-pmacro (conditional-load name mode op ope regtype profile comment)
4612 (dni name
4613 (comment)
ac7c07ac 4614 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL)
9aab5aa3
AC		 4615 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
4616 (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
4617 (if (eq CCi (or cond 2))
4618 (set (.sym regtype k)
4619 (c-call mode (.str "@cpu@_read_mem_" mode) pc (add GRi GRj))))
4620 profile
4621 )
4622)
4623
4624(conditional-load cldsb QI OP_5E OPE4_0 GR
ac7c07ac 4625 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4626 "Load signed byte")
4627(conditional-load cldub UQI OP_5E OPE4_1 GR
ac7c07ac 4628 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4629 "Load unsigned byte")
4630(conditional-load cldsh HI OP_5E OPE4_2 GR
ac7c07ac 4631 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4632 "Load signed half")
4633(conditional-load clduh UHI OP_5E OPE4_3 GR
ac7c07ac 4634 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4635 "Load unsigned half")
4636(conditional-load cld SI OP_5F OPE4_0 GR
ac7c07ac 4637 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4638 "Load word")
4639
4640(conditional-load cldbf UQI OP_60 OPE4_0 FRint
ac7c07ac 4641 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4642 "Load byte float")
4643(conditional-load cldhf UHI OP_60 OPE4_1 FRint
ac7c07ac 4644 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4645 "Load half float")
4646(conditional-load cldf SI OP_60 OPE4_2 FRint
ac7c07ac 4647 ((fr400 (unit u-fr-load)) (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4648 "Load word float")
4649
4650(define-pmacro (conditional-load-double
4651 name not_gr mode op ope regtype attr profile comment)
4652 (dni name
4653 (comment)
ac7c07ac 4654 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL attr)
9aab5aa3
AC		 4655 (.str name "$pack @($GRi,$GRj),$" regtype "doublek,$CCi,$cond")
4656 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
4657 (if (eq CCi (or cond 2))
4658 (sequence ((WI address))
4659 (load-double-semantics not_gr mode regtype address GRj)))
4660 profile
4661 )
4662)
4663
4664(conditional-load-double cldd 0 DI OP_5F OPE4_1 GR NA
ac7c07ac 4665 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4666 "Load double word")
4667(conditional-load-double clddf 1 DF OP_60 OPE4_3 FR FR-ACCESS
ac7c07ac 4668 ((fr400 (unit u-gr-load)) (fr500 (unit u-gr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4669 "Load double float")
4670
4671(dni cldq
4672 "conditional load quad integer"
4673 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
4674 "cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond"
4675 (+ pack GRk OP_5F GRi CCi cond OPE4_2 GRj)
4676 (if (eq CCi (or cond 2))
4677 (sequence ((WI address))
4678 (load-quad-semantics GR address GRj)))
4679 ((fr500 (unit u-gr-load)))
4680)
4681
4682(define-pmacro (conditional-load-gr-u name mode op ope comment)
4683 (dni name
4684 (comment)
ac7c07ac 4685 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL)
9aab5aa3
AC		 4686 (.str name "$pack @($GRi,$GRj),$GRk,$CCi,$cond")
4687 (+ pack GRk op GRi CCi cond ope GRj)
4688 (if (eq CCi (or cond 2))
4689 (sequence ((WI address))
4690 (set address (add GRi GRj))
4691 (set GRk
4692 (c-call mode (.str "@cpu@_read_mem_" mode)
4693 pc address))
4694 (if (ne (index-of GRi) (index-of GRk))
4695 (set GRi address))))
4696 ((fr400 (unit u-gr-load))
ac7c07ac 4697 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4698 )
4699)
4700
4701(conditional-load-gr-u cldsbu QI OP_61 OPE4_0 "Load signed byte, update")
4702(conditional-load-gr-u cldubu UQI OP_61 OPE4_1 "Load unsigned byte, update")
4703(conditional-load-gr-u cldshu HI OP_61 OPE4_2 "Load signed half, update")
4704(conditional-load-gr-u clduhu UHI OP_61 OPE4_3 "Load unsigned half, update")
4705(conditional-load-gr-u cldu SI OP_62 OPE4_0 "Load word, update")
4706
4707(define-pmacro (conditional-load-non-gr-u name mode op ope regtype comment)
4708 (dni name
4709 (comment)
ac7c07ac 4710 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 4711 (.str name "$pack @($GRi,$GRj),$" regtype "k,$CCi,$cond")
4712 (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
4713 (if (eq CCi (or cond 2))
4714 (sequence ((WI address))
4715 (set address (add GRi GRj))
4716 (set (.sym regtype k)
4717 (c-call mode (.str "@cpu@_read_mem_" mode)
4718 pc address))
4719 (set GRi address)))
4720 ((fr400 (unit u-fr-load))
ac7c07ac 4721 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4722 )
4723)
4724
4725(conditional-load-non-gr-u cldbfu UQI OP_63 OPE4_0 FRint "Load byte float, update")
4726(conditional-load-non-gr-u cldhfu UHI OP_63 OPE4_1 FRint "Load half float, update")
4727(conditional-load-non-gr-u cldfu SI OP_63 OPE4_2 FRint "Load word float, update")
4728
4729
4730(dni clddu
4731 "Load double word, update"
ac7c07ac 4732 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL)
9aab5aa3
AC		 4733 "clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond"
4734 (+ pack GRdoublek OP_62 GRi CCi cond OPE4_1 GRj)
4735 (if (eq CCi (or cond 2))
4736 (sequence ((WI address))
4737 (load-double-semantics 0 DI GR address GRj)
4738 (if (ne (index-of GRi) (index-of GRdoublek))
4739 (set GRi address))))
4740 ((fr400 (unit u-gr-load))
ac7c07ac 4741 (fr500 (unit u-gr-load)) (fr550 (unit u-gr-load)))
9aab5aa3
AC		 4742)
4743
4744(dni clddfu
4745 "Load double float, update"
ac7c07ac 4746 ((UNIT LOAD) (FR550-MAJOR I-3) (FR500-MAJOR I-2) (FR400-MAJOR I-2) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 4747 "clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond"
4748 (+ pack FRdoublek OP_63 GRi CCi cond OPE4_3 GRj)
4749 (if (eq CCi (or cond 2))
4750 (sequence ((WI address))
4751 (load-double-semantics 1 DF FR address GRj)
4752 (set GRi address)))
4753 ((fr400 (unit u-fr-load))
ac7c07ac 4754 (fr500 (unit u-fr-load)) (fr550 (unit u-fr-load)))
9aab5aa3
AC		 4755)
4756
4757(dni cldqu
4758 "conditional load quad integer and update index"
4759 ((UNIT LOAD) (FR500-MAJOR I-2) (MACH frv) CONDITIONAL)
4760 "cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond"
4761 (+ pack GRk OP_62 GRi CCi cond OPE4_2 GRj)
4762 (if (eq CCi (or cond 2))
4763 (sequence ((WI address))
4764 (load-quad-semantics GR address GRj)
4765 (if (ne (index-of GRi) (index-of GRk))
4766 (set GRi address))))
4767 ((fr500 (unit u-gr-load)))
4768)
4769
4770(define-pmacro (conditional-store name mode op ope regtype profile comment)
4771 (dni name
4772 (comment)
ac7c07ac 4773 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL)
9aab5aa3
AC		 4774 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
4775 (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
4776 (if (eq CCi (or cond 2))
4777 (c-call VOID (.str "@cpu@_write_mem_" mode)
4778 pc (add GRi GRj) (.sym regtype k)))
4779 profile
4780 )
4781)
4782
4783(conditional-store cstb QI OP_64 OPE4_0 GR
ac7c07ac 4784 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4785 "Store unsigned byte")
4786(conditional-store csth HI OP_64 OPE4_1 GR
ac7c07ac 4787 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4788 "Store unsigned half")
4789(conditional-store cst SI OP_64 OPE4_2 GR
ac7c07ac 4790 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4791 "Store word")
4792
4793(conditional-store cstbf QI OP_66 OPE4_0 FRint
ac7c07ac 4794 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4795 "Store byte float")
4796(conditional-store csthf HI OP_66 OPE4_1 FRint
ac7c07ac 4797 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4798 "Store half float")
4799(conditional-store cstf SI OP_66 OPE4_2 FRint
ac7c07ac 4800 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4801 "Store word float")
4802
4803(define-pmacro (conditional-store-double
4804 name mode op ope regtype attr profile comment)
4805 (dni name
4806 (comment)
ac7c07ac 4807 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr)
1340b9a9
DB		 4808 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
4809 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
9aab5aa3
AC		 4810 (if (eq CCi (or cond 2))
4811 (sequence ((WI address))
4812 (store-double-semantics mode regtype address GRj)))
4813 profile
4814 )
4815)
4816
4817(conditional-store-double cstd DI OP_64 OPE4_3 GR NA
ac7c07ac 4818 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4819 "Store double word")
4820(conditional-store-double cstdf DF OP_66 OPE4_3 FR FR-ACCESS
ac7c07ac 4821 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4822 "Store double float")
4823
4824(dni cstq
4825 "conditionally store quad word"
8caa9169 4826 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) CONDITIONAL)
9aab5aa3
AC		 4827 "cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond"
4828 (+ pack GRk OP_65 GRi CCi cond OPE4_0 GRj)
4829 (if (eq CCi (or cond 2))
4830 (sequence ((WI address))
4831 (store-quad-semantics GR address GRj)))
4832 ((fr500 (unit u-gr-store)))
4833)
4834
4835(define-pmacro (conditional-store-u
4836 name mode op ope regtype attr profile comment)
4837 (dni name
4838 (comment)
ac7c07ac 4839 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr)
9aab5aa3
AC		 4840 (.str name "$pack $" regtype "k,@($GRi,$GRj),$CCi,$cond")
4841 (+ pack (.sym regtype k) op GRi CCi cond ope GRj)
4842 (if (eq CCi (or cond 2))
4843 (sequence ((WI address))
4844 (set address (add GRi GRj))
4845 (c-call VOID (.str "@cpu@_write_mem_" mode)
4846 pc address (.sym regtype k))
4847 (set GRi address)))
4848 profile
4849 )
4850)
4851
4852(conditional-store-u cstbu QI OP_67 OPE4_0 GR NA
ac7c07ac 4853 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4854 "Store unsigned byte, update index")
4855(conditional-store-u csthu HI OP_67 OPE4_1 GR NA
ac7c07ac 4856 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4857 "Store unsigned half, update index")
4858(conditional-store-u cstu SI OP_67 OPE4_2 GR NA
ac7c07ac 4859 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4860 "Store word, update index")
4861
4862(conditional-store-u cstbfu QI OP_68 OPE4_0 FRint FR-ACCESS
ac7c07ac 4863 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4864 "Store byte float, update index")
4865(conditional-store-u csthfu HI OP_68 OPE4_1 FRint FR-ACCESS
ac7c07ac 4866 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4867 "Store half float, update index")
4868(conditional-store-u cstfu SI OP_68 OPE4_2 FRint FR-ACCESS
ac7c07ac 4869 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4870 "Store word float, update index")
4871
4872(define-pmacro (conditional-store-double-u
4873 name mode op ope regtype attr profile comment)
4874 (dni name
4875 (comment)
ac7c07ac 4876 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) CONDITIONAL attr)
1340b9a9
DB		 4877 (.str name "$pack $" regtype "doublek,@($GRi,$GRj),$CCi,$cond")
4878 (+ pack (.sym regtype doublek) op GRi CCi cond ope GRj)
9aab5aa3
AC		 4879 (if (eq CCi (or cond 2))
4880 (sequence ((WI address))
4881 (store-double-semantics mode regtype address GRj)
4882 (set GRi address)))
4883 profile
4884 )
4885)
4886
4887(conditional-store-double-u cstdu DI OP_67 OPE4_3 GR NA
4888 ((fr400 (unit u-gr-store))
ac7c07ac 4889 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4890 "Store double word, update index")
4891(conditional-store-double-u cstdfu DF OP_68 OPE4_3 FR FR-ACCESS
ac7c07ac
DB		 4892 ((fr400 (unit u-fr-store))
4893 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4894 "Store double float, update index")
4895
4896(define-pmacro (store-r-simm name mode op regtype attr profile comment)
4897 (dni name
4898 (comment)
ac7c07ac 4899 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
9aab5aa3
AC		 4900 (.str name "$pack $" regtype "k,@($GRi,$d12)")
4901 (+ pack (.sym regtype k) op GRi d12)
4902 (c-call VOID (.str "@cpu@_write_mem_" mode)
4903 pc (add GRi d12) (.sym regtype k))
4904 profile
4905 )
4906)
4907
4908(store-r-simm stbi QI OP_50 GR NA
ac7c07ac 4909 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4910 "Store unsigned byte")
4911(store-r-simm sthi HI OP_51 GR NA
ac7c07ac 4912 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4913 "Store unsigned half")
4914(store-r-simm sti SI OP_52 GR NA
ac7c07ac 4915 ((fr400 (unit u-gr-store)) (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4916 "Store word")
4917
4918(store-r-simm stbfi QI OP_4E FRint FR-ACCESS
ac7c07ac 4919 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4920 "Store byte float")
4921(store-r-simm sthfi HI OP_4F FRint FR-ACCESS
ac7c07ac 4922 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4923 "Store half float")
4924(store-r-simm stfi SI OP_55 FRint FR-ACCESS
ac7c07ac 4925 ((fr400 (unit u-fr-store)) (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4926 "Store word float")
4927
4928(define-pmacro (store-double-r-simm name mode op regtype attr profile comment)
4929 (dni name
4930 (comment)
ac7c07ac 4931 ((UNIT STORE) (FR550-MAJOR I-4) (FR500-MAJOR I-3) (FR400-MAJOR I-3) attr)
1340b9a9
DB		 4932 (.str name "$pack $" regtype "doublek,@($GRi,$d12)")
4933 (+ pack (.sym regtype doublek) op GRi d12)
9aab5aa3
AC		 4934 (sequence ((WI address))
4935 (store-double-semantics mode regtype address d12))
4936 profile
4937 )
4938)
4939
4940(store-double-r-simm stdi DI OP_53 GR NA
ac7c07ac
DB		 4941 ((fr400 (unit u-gr-store))
4942 (fr500 (unit u-gr-store)) (fr550 (unit u-gr-store)))
9aab5aa3
AC		 4943 "Store double word")
4944(store-double-r-simm stdfi DF OP_56 FR FR-ACCESS
ac7c07ac
DB		 4945 ((fr400 (unit u-fr-store))
4946 (fr500 (unit u-fr-store)) (fr550 (unit u-fr-store)))
9aab5aa3
AC		 4947 "Store double float")
4948
4949(define-pmacro (store-quad-r-simm name op regtype attr profile comment)
4950 (dni name
4951 (comment)
8caa9169 4952 ((UNIT STORE) (FR500-MAJOR I-3) (MACH frv) attr)
9aab5aa3
AC		 4953 (.str name "$pack $" regtype "k,@($GRi,$d12)")
4954 (+ pack (.sym regtype k) op GRi d12)
4955 (sequence ((WI address))
4956 (store-quad-semantics regtype address d12))
4957 profile
4958 )
4959)
4960
4961(store-quad-r-simm stqi OP_54 GR NA ((fr500 (unit u-gr-store)))
4962 "Store quad word")
4963(store-quad-r-simm stqfi OP_57 FRint FR-ACCESS ()
4964 "Store quad float")
4965
4966(define-pmacro (swap-semantics base offset arg)
4967 (sequence ((WI tmp) (WI address))
4968 (set tmp arg)
4969 (set address (add base offset))
ac7c07ac 4970 (c-call VOID "@cpu@_check_swap_address" address)
9aab5aa3
AC		 4971 (set arg (c-call WI "@cpu@_read_mem_WI" pc address))
4972 (c-call VOID "@cpu@_write_mem_WI" pc address tmp))
4973)
4974
4975(dni swap
4976 "Swap contents of memory with GR"
ac7c07ac 4977 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 4978 "swap$pack @($GRi,$GRj),$GRk"
4979 (+ pack GRk OP_03 GRi OPE1_05 GRj)
4980 (swap-semantics GRi GRj GRk)
4981 ((fr400 (unit u-swap))
ac7c07ac 4982 (fr500 (unit u-swap)) (fr550 (unit u-swap)))
9aab5aa3
AC		 4983)
4984
4985(dni "swapi"
4986 "Swap contents of memory with GR"
ac7c07ac 4987 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 4988 ("swapi$pack @($GRi,$d12),$GRk")
4989 (+ pack GRk OP_4D GRi d12)
4990 (swap-semantics GRi d12 GRk)
4991 ((fr400 (unit u-swap))
ac7c07ac 4992 (fr500 (unit u-swap)) (fr550 (unit u-swap)))
9aab5aa3
AC		 4993)
4994
4995(dni cswap
4996 "Conditionally swap contents of memory with GR"
ac7c07ac 4997 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2) CONDITIONAL)
9aab5aa3
AC		 4998 "cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond"
4999 (+ pack GRk OP_65 GRi CCi cond OPE4_2 GRj)
5000 (if (eq CCi (or cond 2))
5001 (swap-semantics GRi GRj GRk))
5002 ((fr400 (unit u-swap))
ac7c07ac 5003 (fr500 (unit u-swap)) (fr550 (unit u-swap)))
9aab5aa3
AC		 5004)
5005
5006(define-pmacro (register-transfer
0457efce 5007 name op ope reg_src reg_targ pipe attrs profile comment)
9aab5aa3
AC		 5008 (dni name
5009 (comment)
0457efce 5010 (.splice (UNIT pipe) (.unsplice attrs))
9aab5aa3
AC		 5011 (.str name "$pack $" reg_src ",$" reg_targ)
5012 (+ pack reg_targ op (rs-null) ope reg_src)
5013 (set reg_targ reg_src)
5014 profile
5015 )
5016)
5017
5018(register-transfer movgf OP_03 OPE1_15
0457efce 5019 GRj FRintk I0
ac7c07ac
DB		 5020 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS)
5021 ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
9aab5aa3
AC		 5022 "transfer gr to fr")
5023(register-transfer movfg OP_03 OPE1_0D
0457efce 5024 FRintk GRj I0
ac7c07ac
DB		 5025 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS)
5026 ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
9aab5aa3
AC		 5027 "transfer fr to gr")
5028
5029(define-pmacro (nextreg hw r offset) (reg hw (add (index-of r) offset)))
5030
5031(define-pmacro (register-transfer-double-from-gr-semantics cond)
5032 (if cond
5033 (if (eq (index-of GRj) 0)
5034 (sequence ()
5035 (set FRintk 0)
5036 (set (nextreg h-fr_int FRintk 1) 0))
5037 (sequence ()
5038 (set FRintk GRj)
5039 (set (nextreg h-fr_int FRintk 1) (nextreg h-gr GRj 1)))))
5040)
5041
5042(dni movgfd
5043 "move GR for FR double"
ac7c07ac 5044 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS)
9aab5aa3
AC		 5045 "movgfd$pack $GRj,$FRintk"
5046 (+ pack FRintk OP_03 (rs-null) OPE1_16 GRj)
5047 (register-transfer-double-from-gr-semantics 1)
5048 ; TODO -- doesn't handle second register in the pair
5049 ((fr400 (unit u-gr2fr))
ac7c07ac 5050 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
9aab5aa3
AC		 5051)
5052
5053(define-pmacro (register-transfer-double-to-gr-semantics cond)
5054 (if (andif (ne (index-of GRj) 0) cond)
5055 (sequence ()
5056 (set GRj FRintk)
5057 (set (nextreg h-gr GRj 1) (nextreg h-fr_int FRintk 1))))
5058)
5059
5060(dni movfgd
5061 "move FR for GR double"
ac7c07ac 5062 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) FR-ACCESS)
9aab5aa3
AC		 5063 "movfgd$pack $FRintk,$GRj"
5064 (+ pack FRintk OP_03 (rs-null) OPE1_0E GRj)
5065 (register-transfer-double-to-gr-semantics 1)
5066 ; TODO -- doesn't handle second register in the pair
5067 ((fr400 (unit u-fr2gr))
ac7c07ac 5068 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
9aab5aa3
AC		 5069)
5070
5071(dni movgfq
5072 "move GR for FR quad"
5073 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5074 "movgfq$pack $GRj,$FRintk"
5075 (+ pack FRintk OP_03 (rs-null) OPE1_17 GRj)
5076 (if (eq (index-of GRj) 0)
5077 (sequence ()
5078 (set FRintk 0)
5079 (set (reg h-fr_int (add (index-of FRintk) 1)) 0)
5080 (set (reg h-fr_int (add (index-of FRintk) 2)) 0)
5081 (set (reg h-fr_int (add (index-of FRintk) 3)) 0))
5082 (sequence ()
5083 (set FRintk GRj)
5084 (set (reg h-fr_int (add (index-of FRintk) 1))
5085 (reg h-gr (add (index-of GRj) 1)))
5086 (set (reg h-fr_int (add (index-of FRintk) 2))
5087 (reg h-gr (add (index-of GRj) 2)))
5088 (set (reg h-fr_int (add (index-of FRintk) 3))
5089 (reg h-gr (add (index-of GRj) 3)))))
5090 ()
5091)
5092
5093(dni movfgq
5094 "move FR for GR quad"
5095 ((UNIT I0) (FR500-MAJOR I-4) (MACH frv) FR-ACCESS)
5096 "movfgq$pack $FRintk,$GRj"
5097 (+ pack FRintk OP_03 (rs-null) OPE1_0F GRj)
5098 (if (ne (index-of GRj) 0)
5099 (sequence ()
5100 (set GRj FRintk)
5101 (set (reg h-gr (add (index-of GRj) 1))
5102 (reg h-fr_int (add (index-of FRintk) 1)))
5103 (set (reg h-gr (add (index-of GRj) 2))
5104 (reg h-fr_int (add (index-of FRintk) 2)))
5105 (set (reg h-gr (add (index-of GRj) 3))
5106 (reg h-fr_int (add (index-of FRintk) 3)))))
5107 ()
5108)
5109
5110(define-pmacro (conditional-register-transfer
0457efce 5111 name op ope reg_src reg_targ pipe attrs profile comment)
9aab5aa3
AC		 5112 (dni name
5113 (comment)
0457efce 5114 (.splice (UNIT pipe) CONDITIONAL FR-ACCESS (.unsplice attrs))
9aab5aa3
AC		 5115 (.str name "$pack $" reg_src ",$" reg_targ ",$CCi,$cond")
5116 (+ pack reg_targ op (rs-null) CCi cond ope reg_src)
5117 (if (eq CCi (or cond 2))
5118 (set reg_targ reg_src))
5119 profile
5120 )
5121)
5122
5123(conditional-register-transfer cmovgf OP_69 OPE4_0 GRj FRintk I0
ac7c07ac
DB		 5124 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4))
5125 ((fr400 (unit u-gr2fr)) (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
9aab5aa3
AC		 5126 "transfer gr to fr")
5127(conditional-register-transfer cmovfg OP_69 OPE4_2 FRintk GRj I0
ac7c07ac
DB		 5128 ((FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4))
5129 ((fr400 (unit u-fr2gr)) (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
9aab5aa3
AC		 5130 "transfer fr to gr")
5131
5132
5133(dni cmovgfd
5134 "Conditional move GR to FR double"
ac7c07ac 5135 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 5136 "cmovgfd$pack $GRj,$FRintk,$CCi,$cond"
5137 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_1 GRj)
5138 (register-transfer-double-from-gr-semantics (eq CCi (or cond 2)))
5139 ; TODO -- doesn't handle extra registers in double
5140 ((fr400 (unit u-gr2fr))
ac7c07ac 5141 (fr500 (unit u-gr2fr)) (fr550 (unit u-gr2fr)))
9aab5aa3
AC		 5142)
5143
5144(dni cmovfgd
5145 "Conditional move FR to GR double"
ac7c07ac 5146 ((UNIT I0) (FR500-MAJOR I-4) (FR550-MAJOR I-5) (FR400-MAJOR I-4) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 5147 "cmovfgd$pack $FRintk,$GRj,$CCi,$cond"
5148 (+ pack FRintk OP_69 (rs-null) CCi cond OPE4_3 GRj)
5149 (register-transfer-double-to-gr-semantics (eq CCi (or cond 2)))
5150 ; TODO -- doesn't handle second register in the pair
5151 ((fr400 (unit u-fr2gr))
ac7c07ac 5152 (fr500 (unit u-fr2gr)) (fr550 (unit u-fr2gr)))
9aab5aa3
AC		 5153)
5154
5155(define-pmacro (register-transfer-spr
5156 name op ope reg_src reg_targ unitname comment)
5157 (dni name
5158 (comment)
ac7c07ac 5159 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 5160 (.str name "$pack $" reg_src ",$" reg_targ)
5161 (+ pack reg_targ op ope reg_src)
5162 (set reg_targ reg_src)
5163 ((fr400 (unit unitname))
ac7c07ac 5164 (fr500 (unit unitname)) (fr550 (unit unitname)))
9aab5aa3
AC		 5165 )
5166)
5167
5168(register-transfer-spr movgs OP_03 OPE1_06 GRj spr u-gr2spr "transfer gr->spr")
5169(register-transfer-spr movsg OP_03 OPE1_07 spr GRj u-spr2gr "transfer spr->gr")
5170
5171; Integer Branch Conditions
5172(define-pmacro (Inev cc) (const BI 0))
5173(define-pmacro (Ira cc) (const BI 1))
5174(define-pmacro (Ieq cc) ( zbit cc))
5175(define-pmacro (Ine cc) (not (zbit cc)))
5176(define-pmacro (Ile cc) ( orif (zbit cc) (xor (nbit cc) (vbit cc))))
5177(define-pmacro (Igt cc) (not (orif (zbit cc) (xor (nbit cc) (vbit cc)))))
5178(define-pmacro (Ilt cc) ( xor (nbit cc) (vbit cc)))
5179(define-pmacro (Ige cc) (not (xor (nbit cc) (vbit cc))))
5180(define-pmacro (Ils cc) ( orif (cbit cc) (zbit cc)))
5181(define-pmacro (Ihi cc) (not (orif (cbit cc) (zbit cc))))
5182(define-pmacro (Ic cc) ( cbit cc))
5183(define-pmacro (Inc cc) (not (cbit cc)))
5184(define-pmacro (In cc) ( nbit cc))
5185(define-pmacro (Ip cc) (not (nbit cc)))
5186(define-pmacro (Iv cc) ( vbit cc))
5187(define-pmacro (Inv cc) (not (vbit cc)))
5188
5189; Float Branch Conditions
5190(define-pmacro (Fnev cc) (const BI 0))
5191(define-pmacro (Fra cc) (const BI 1))
5192(define-pmacro (Fne cc) (orif (lbit cc) (orif (gbit cc) (ubit cc))))
5193(define-pmacro (Feq cc) (ebit cc))
5194(define-pmacro (Flg cc) (orif (lbit cc) (gbit cc)))
5195(define-pmacro (Fue cc) (orif (ebit cc) (ubit cc)))
5196(define-pmacro (Ful cc) (orif (lbit cc) (ubit cc)))
5197(define-pmacro (Fge cc) (orif (ebit cc) (gbit cc)))
5198(define-pmacro (Flt cc) (lbit cc))
5199(define-pmacro (Fuge cc) (orif (ebit cc) (orif (gbit cc) (ubit cc))))
5200(define-pmacro (Fug cc) (orif (gbit cc) (ubit cc)))
5201(define-pmacro (Fle cc) (orif (ebit cc) (lbit cc)))
5202(define-pmacro (Fgt cc) (gbit cc))
5203(define-pmacro (Fule cc) (orif (ebit cc) (orif (lbit cc) (ubit cc))))
5204(define-pmacro (Fu cc) (ubit cc))
5205(define-pmacro (Fo cc) (orif (ebit cc) (orif (lbit cc) (gbit cc))))
5206
5207(define-pmacro (conditional-branch-i prefix cc op cond comment)
5208 (dni (.sym prefix cc)
5209 (comment)
ac7c07ac 5210 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1))
9aab5aa3
AC		 5211 (.str (.sym prefix cc) "$pack $ICCi_2,$hint,$label16")
5212 (+ pack (.sym ICC_ cc) ICCi_2 op hint label16)
5213 (sequence ()
5214 (c-call VOID "@cpu@_model_branch" label16 hint)
5215 (if (cond ICCi_2)
5216 (set pc label16)))
5217 ((fr400 (unit u-branch))
ac7c07ac 5218 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5219 )
5220)
5221
5222(dni bra
5223 "integer branch equal"
ac7c07ac 5224 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1))
9aab5aa3
AC		 5225 "bra$pack $hint_taken$label16"
5226 (+ pack ICC_ra (ICCi_2-null) OP_06 hint_taken label16)
5227 (sequence ()
5228 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5229 (set pc label16))
5230 ((fr400 (unit u-branch))
ac7c07ac 5231 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5232)
5233
5234(dni bno
5235 "integer branch never"
ac7c07ac 5236 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1))
9aab5aa3
AC		 5237 "bno$pack$hint_not_taken"
5238 (+ pack ICC_nev (ICCi_2-null) OP_06 hint_not_taken (label16-null))
5239 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5240 ((fr400 (unit u-branch))
ac7c07ac 5241 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5242)
5243
5244(conditional-branch-i b eq OP_06 Ieq "integer branch equal")
5245(conditional-branch-i b ne OP_06 Ine "integer branch not equal")
5246(conditional-branch-i b le OP_06 Ile "integer branch less or equal")
5247(conditional-branch-i b gt OP_06 Igt "integer branch greater")
5248(conditional-branch-i b lt OP_06 Ilt "integer branch less")
5249(conditional-branch-i b ge OP_06 Ige "integer branch greater or equal")
5250(conditional-branch-i b ls OP_06 Ils "integer branch less or equal unsigned")
5251(conditional-branch-i b hi OP_06 Ihi "integer branch greater unsigned")
5252(conditional-branch-i b c OP_06 Ic "integer branch carry set")
5253(conditional-branch-i b nc OP_06 Inc "integer branch carry clear")
5254(conditional-branch-i b n OP_06 In "integer branch negative")
5255(conditional-branch-i b p OP_06 Ip "integer branch positive")
5256(conditional-branch-i b v OP_06 Iv "integer branch overflow set")
5257(conditional-branch-i b nv OP_06 Inv "integer branch overflow clear")
5258
5259(define-pmacro (conditional-branch-f prefix cc op cond comment)
5260 (dni (.sym prefix cc)
5261 (comment)
ac7c07ac 5262 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS)
9aab5aa3
AC		 5263 (.str (.sym prefix cc) "$pack $FCCi_2,$hint,$label16")
5264 (+ pack (.sym FCC_ cc) FCCi_2 op hint label16)
5265 (sequence ()
5266 (c-call VOID "@cpu@_model_branch" label16 hint)
5267 (if (cond FCCi_2) (set pc label16)))
5268 ((fr400 (unit u-branch))
ac7c07ac 5269 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5270 )
5271)
5272
5273(dni fbra
5274 "float branch equal"
ac7c07ac 5275 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS)
9aab5aa3
AC		 5276 "fbra$pack $hint_taken$label16"
5277 (+ pack FCC_ra (FCCi_2-null) OP_07 hint_taken label16)
5278 (sequence ()
5279 (c-call VOID "@cpu@_model_branch" label16 hint_taken)
5280 (set pc label16))
5281 ((fr400 (unit u-branch))
ac7c07ac 5282 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5283)
5284
5285(dni fbno
5286 "float branch never"
ac7c07ac 5287 ((UNIT B01) (FR500-MAJOR B-1) (FR550-MAJOR B-1) (FR400-MAJOR B-1) FR-ACCESS)
9aab5aa3
AC		 5288 "fbno$pack$hint_not_taken"
5289 (+ pack FCC_nev (FCCi_2-null) OP_07 hint_not_taken (label16-null))
5290 (c-call VOID "@cpu@_model_branch" label16 hint_not_taken)
5291 ((fr400 (unit u-branch))
ac7c07ac 5292 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5293)
5294
5295(conditional-branch-f fb ne OP_07 Fne "float branch not equal")
5296(conditional-branch-f fb eq OP_07 Feq "float branch equal")
5297(conditional-branch-f fb lg OP_07 Flg "float branch less or greater")
5298(conditional-branch-f fb ue OP_07 Fue "float branch unordered or equal")
5299(conditional-branch-f fb ul OP_07 Ful "float branch unordered or less")
5300(conditional-branch-f fb ge OP_07 Fge "float branch greater or equal")
5301(conditional-branch-f fb lt OP_07 Flt "float branch less")
5302(conditional-branch-f fb uge OP_07 Fuge "float branch unordered, greater,equal")
5303(conditional-branch-f fb ug OP_07 Fug "float branch unordered or greater")
5304(conditional-branch-f fb le OP_07 Fle "float branch less or equal")
5305(conditional-branch-f fb gt OP_07 Fgt "float branch greater")
5306(conditional-branch-f fb ule OP_07 Fule "float branch unordered, less or equal")
5307(conditional-branch-f fb u OP_07 Fu "float branch unordered")
5308(conditional-branch-f fb o OP_07 Fo "float branch ordered")
5309
5310(define-pmacro (ctrlr-branch-semantics cond ccond)
5311 (sequence ((SI tmp))
5312 (set tmp (sub (spr-lcr) 1))
5313 (set (spr-lcr) tmp)
5314 (if cond
5315 (if (eq ccond 0)
5316 (if (ne tmp 0)
5317 (set pc (spr-lr)))
5318 (if (eq tmp 0)
5319 (set pc (spr-lr))))))
5320)
5321
5322(dni bctrlr
5323 "LCR conditional branch to lr"
ac7c07ac 5324 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2))
9aab5aa3
AC		 5325 ("bctrlr$pack $ccond,$hint")
5326 (+ pack (cond-null) (ICCi_2-null) OP_0E hint OPE3_01 ccond (s12-null))
5327 (sequence ()
5328 (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5329 (ctrlr-branch-semantics (const BI 1) ccond))
5330 ((fr400 (unit u-branch))
ac7c07ac 5331 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5332)
5333
5334(define-pmacro (conditional-branch-cclr prefix cc i-f op ope cond attr comment)
5335 (dni (.sym prefix cc lr)
5336 (comment)
ac7c07ac 5337 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) attr)
9aab5aa3
AC		 5338 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$hint")
5339 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope
5340 (ccond-null) (s12-null))
5341 (sequence ()
5342 (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5343 (if (cond (.sym i-f CCi_2)) (set pc (spr-lr))))
5344 ((fr400 (unit u-branch))
ac7c07ac 5345 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5346 )
5347)
5348
5349(dni bralr
5350 "integer cclr branch always"
ac7c07ac 5351 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3))
9aab5aa3
AC		 5352 "bralr$pack$hint_taken"
5353 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_02 (ccond-null) (s12-null))
5354 (sequence ()
5355 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5356 (set pc (spr-lr)))
5357 ((fr400 (unit u-branch))
ac7c07ac 5358 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5359)
5360
5361(dni bnolr
5362 "integer cclr branch never"
ac7c07ac 5363 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3))
9aab5aa3
AC		 5364 "bnolr$pack$hint_not_taken"
5365 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_02 (ccond-null) (s12-null))
5366 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5367 ((fr400 (unit u-branch))
ac7c07ac 5368 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5369)
5370
5371(conditional-branch-cclr b eq I OP_0E OPE3_02 Ieq NA "integer cclr branch equal")
5372(conditional-branch-cclr b ne I OP_0E OPE3_02 Ine NA "integer cclr branch not equal")
5373(conditional-branch-cclr b le I OP_0E OPE3_02 Ile NA "integer cclr branch less or equal")
5374(conditional-branch-cclr b gt I OP_0E OPE3_02 Igt NA "integer cclr branch greater")
5375(conditional-branch-cclr b lt I OP_0E OPE3_02 Ilt NA "integer cclr branch less")
5376(conditional-branch-cclr b ge I OP_0E OPE3_02 Ige NA "integer cclr branch greater or equal")
5377(conditional-branch-cclr b ls I OP_0E OPE3_02 Ils NA "integer cclr branch less or equal unsigned")
5378(conditional-branch-cclr b hi I OP_0E OPE3_02 Ihi NA "integer cclr branch greater unsigned")
5379(conditional-branch-cclr b c I OP_0E OPE3_02 Ic NA "integer cclr branch carry set")
5380(conditional-branch-cclr b nc I OP_0E OPE3_02 Inc NA "integer cclr branch carry clear")
5381(conditional-branch-cclr b n I OP_0E OPE3_02 In NA "integer cclr branch negative")
5382(conditional-branch-cclr b p I OP_0E OPE3_02 Ip NA "integer cclr branch positive")
5383(conditional-branch-cclr b v I OP_0E OPE3_02 Iv NA "integer cclr branch overflow set")
5384(conditional-branch-cclr b nv I OP_0E OPE3_02 Inv NA "integer cclr branch overflow clear")
5385
5386(dni fbralr
5387 "float cclr branch always"
ac7c07ac 5388 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS)
9aab5aa3
AC		 5389 "fbralr$pack$hint_taken"
5390 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_06 (ccond-null) (s12-null))
5391 (sequence ()
5392 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5393 (set pc (spr-lr)))
5394 ((fr400 (unit u-branch))
ac7c07ac 5395 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5396)
5397
5398(dni fbnolr
5399 "float cclr branch never"
ac7c07ac 5400 ((UNIT B01) (FR500-MAJOR B-3) (FR550-MAJOR B-3) (FR400-MAJOR B-3) FR-ACCESS)
9aab5aa3
AC		 5401 "fbnolr$pack$hint_not_taken"
5402 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_06 (ccond-null) (s12-null))
5403 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5404 ((fr400 (unit u-branch))
ac7c07ac 5405 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5406)
5407
5408(conditional-branch-cclr fb eq F OP_0E OPE3_06 Feq FR-ACCESS "float cclr branch equal")
5409(conditional-branch-cclr fb ne F OP_0E OPE3_06 Fne FR-ACCESS "float cclr branch not equal")
5410(conditional-branch-cclr fb lg F OP_0E OPE3_06 Flg FR-ACCESS "float branch less or greater")
5411(conditional-branch-cclr fb ue F OP_0E OPE3_06 Fue FR-ACCESS "float branch unordered or equal")
5412(conditional-branch-cclr fb ul F OP_0E OPE3_06 Ful FR-ACCESS "float branch unordered or less")
5413(conditional-branch-cclr fb ge F OP_0E OPE3_06 Fge FR-ACCESS "float branch greater or equal")
5414(conditional-branch-cclr fb lt F OP_0E OPE3_06 Flt FR-ACCESS "float branch less")
5415(conditional-branch-cclr fb uge F OP_0E OPE3_06 Fuge FR-ACCESS "float branch unordered, greater, equal")
5416(conditional-branch-cclr fb ug F OP_0E OPE3_06 Fug FR-ACCESS "float branch unordered or greater")
5417(conditional-branch-cclr fb le F OP_0E OPE3_06 Fle FR-ACCESS "float branch less or equal")
5418(conditional-branch-cclr fb gt F OP_0E OPE3_06 Fgt FR-ACCESS "float branch greater")
5419(conditional-branch-cclr fb ule F OP_0E OPE3_06 Fule FR-ACCESS "float branch unordered, less or equal")
5420(conditional-branch-cclr fb u F OP_0E OPE3_06 Fu FR-ACCESS "float branch unordered")
5421(conditional-branch-cclr fb o F OP_0E OPE3_06 Fo FR-ACCESS "float branch ordered")
5422
5423(define-pmacro (conditional-branch-ctrlr prefix cc i-f op ope cond attr comment)
5424 (dni (.sym prefix cc lr)
5425 (comment)
ac7c07ac 5426 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) attr)
9aab5aa3
AC		 5427 (.str (.sym prefix cc lr) "$pack $" i-f "CCi_2,$ccond,$hint")
5428 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op hint ope ccond (s12-null))
5429 (sequence ()
5430 (c-call VOID "@cpu@_model_branch" (spr-lr) hint)
5431 (ctrlr-branch-semantics (cond (.sym i-f CCi_2)) ccond))
5432 ((fr400 (unit u-branch))
ac7c07ac 5433 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5434 )
5435)
5436
5437(dni bcralr
5438 "integer ctrlr branch always"
ac7c07ac 5439 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2))
9aab5aa3
AC		 5440 "bcralr$pack $ccond$hint_taken"
5441 (+ pack ICC_ra (ICCi_2-null) OP_0E hint_taken OPE3_03 ccond (s12-null))
5442 (sequence ()
5443 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5444 (ctrlr-branch-semantics (const BI 1) ccond))
5445 ((fr400 (unit u-branch))
ac7c07ac 5446 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5447)
5448
5449(dni bcnolr
5450 "integer ctrlr branch never"
ac7c07ac 5451 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2))
9aab5aa3
AC		 5452 "bcnolr$pack$hint_not_taken"
5453 (+ pack ICC_nev (ICCi_2-null) OP_0E hint_not_taken OPE3_03 (ccond-null) (s12-null))
5454 (sequence ()
5455 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5456 (ctrlr-branch-semantics (const BI 0) ccond))
5457 ((fr400 (unit u-branch))
ac7c07ac 5458 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5459)
5460
5461(conditional-branch-ctrlr bc eq I OP_0E OPE3_03 Ieq NA "integer ctrlr branch equal")
5462(conditional-branch-ctrlr bc ne I OP_0E OPE3_03 Ine NA "integer ctrlr branch not equal")
5463(conditional-branch-ctrlr bc le I OP_0E OPE3_03 Ile NA "integer ctrlr branch less equal")
5464(conditional-branch-ctrlr bc gt I OP_0E OPE3_03 Igt NA "integer ctrlr branch greater")
5465(conditional-branch-ctrlr bc lt I OP_0E OPE3_03 Ilt NA "integer ctrlr branch less")
5466(conditional-branch-ctrlr bc ge I OP_0E OPE3_03 Ige NA "integer ctrlr branch greater equal")
5467(conditional-branch-ctrlr bc ls I OP_0E OPE3_03 Ils NA "integer ctrlr branch less equal unsigned")
5468(conditional-branch-ctrlr bc hi I OP_0E OPE3_03 Ihi NA "integer ctrlr branch greater unsigned")
5469(conditional-branch-ctrlr bc c I OP_0E OPE3_03 Ic NA "integer ctrlr branch carry set")
5470(conditional-branch-ctrlr bc nc I OP_0E OPE3_03 Inc NA "integer ctrlr branch carry clear")
5471(conditional-branch-ctrlr bc n I OP_0E OPE3_03 In NA "integer ctrlr branch negative")
5472(conditional-branch-ctrlr bc p I OP_0E OPE3_03 Ip NA "integer ctrlr branch positive")
5473(conditional-branch-ctrlr bc v I OP_0E OPE3_03 Iv NA "integer ctrlr branch overflow set")
5474(conditional-branch-ctrlr bc nv I OP_0E OPE3_03 Inv NA "integer ctrlr branch overflow clear")
5475
5476(dni fcbralr
5477 "float ctrlr branch always"
ac7c07ac 5478 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS)
9aab5aa3
AC		 5479 "fcbralr$pack $ccond$hint_taken"
5480 (+ pack FCC_ra (FCCi_2-null) OP_0E hint_taken OPE3_07 ccond (s12-null))
5481 (sequence ()
5482 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_taken)
5483 (ctrlr-branch-semantics (const BI 1) ccond))
5484 ((fr400 (unit u-branch))
ac7c07ac 5485 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5486)
5487
5488(dni fcbnolr
5489 "float ctrlr branch never"
ac7c07ac 5490 ((UNIT B0) (FR500-MAJOR B-2) (FR550-MAJOR B-2) (FR400-MAJOR B-2) FR-ACCESS)
9aab5aa3
AC		 5491 "fcbnolr$pack$hint_not_taken"
5492 (+ pack FCC_nev (FCCi_2-null) OP_0E hint_not_taken OPE3_07 (ccond-null) (s12-null))
5493 (sequence ()
5494 (c-call VOID "@cpu@_model_branch" (spr-lr) hint_not_taken)
5495 (ctrlr-branch-semantics (const BI 0) ccond))
5496 ((fr400 (unit u-branch))
ac7c07ac 5497 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5498)
5499
5500(conditional-branch-ctrlr fcb eq F OP_0E OPE3_07 Feq FR-ACCESS "float cclr branch equal")
5501(conditional-branch-ctrlr fcb ne F OP_0E OPE3_07 Fne FR-ACCESS "float cclr branch not equal")
5502(conditional-branch-ctrlr fcb lg F OP_0E OPE3_07 Flg FR-ACCESS "float branch less or greater")
5503(conditional-branch-ctrlr fcb ue F OP_0E OPE3_07 Fue FR-ACCESS "float branch unordered or equal")
5504(conditional-branch-ctrlr fcb ul F OP_0E OPE3_07 Ful FR-ACCESS "float branch unordered or less")
5505(conditional-branch-ctrlr fcb ge F OP_0E OPE3_07 Fge FR-ACCESS "float branch greater or equal")
5506(conditional-branch-ctrlr fcb lt F OP_0E OPE3_07 Flt FR-ACCESS "float branch less")
5507(conditional-branch-ctrlr fcb uge F OP_0E OPE3_07 Fuge FR-ACCESS "float branch unordered, greater, equal")
5508(conditional-branch-ctrlr fcb ug F OP_0E OPE3_07 Fug FR-ACCESS "float branch unordered or greater")
5509(conditional-branch-ctrlr fcb le F OP_0E OPE3_07 Fle FR-ACCESS "float branch less or equal")
5510(conditional-branch-ctrlr fcb gt F OP_0E OPE3_07 Fgt FR-ACCESS "float branch greater")
5511(conditional-branch-ctrlr fcb ule F OP_0E OPE3_07 Fule FR-ACCESS "float branch unordered, less or equal")
5512(conditional-branch-ctrlr fcb u F OP_0E OPE3_07 Fu FR-ACCESS "float branch unordered")
5513(conditional-branch-ctrlr fcb o F OP_0E OPE3_07 Fo FR-ACCESS "float branch ordered")
5514
5515(define-pmacro (jump-and-link-semantics base offset LI)
5516 (sequence ()
5517 (if (eq LI 1)
5518 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1))
5519 ; Target address gets aligned here
5520 (set pc (and (add base offset) #xfffffffc))
5521 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
5522)
5523
5524(dni jmpl
5525 "jump and link"
ac7c07ac 5526 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5))
9aab5aa3
AC		 5527 "jmpl$pack @($GRi,$GRj)"
5528 (+ pack (misc-null-1) (LI-off) OP_0C GRi (misc-null-2) GRj)
5529 (jump-and-link-semantics GRi GRj LI)
5530 ((fr400 (unit u-branch))
ac7c07ac 5531 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5532)
5533
5534(dni calll
5535 "call and link"
c7a48b9a 5536 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5))
9aab5aa3
AC		 5537 "calll$pack @($GRi,$GRj)"
5538 (+ pack (misc-null-1) (LI-on) OP_0C GRi (misc-null-2) GRj)
5539 (jump-and-link-semantics GRi GRj LI)
5540 ((fr400 (unit u-branch))
c7a48b9a 5541 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5542)
5543
5544(dni jmpil
5545 "jump immediate and link"
ac7c07ac 5546 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5))
9aab5aa3
AC		 5547 "jmpil$pack @($GRi,$s12)"
5548 (+ pack (misc-null-1) (LI-off) OP_0D GRi s12)
5549 (jump-and-link-semantics GRi s12 LI)
5550 ((fr400 (unit u-branch))
ac7c07ac 5551 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5552)
5553
5554(dni callil
5555 "call immediate and link"
c7a48b9a 5556 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6) (FR400-MAJOR I-5))
9aab5aa3
AC		 5557 "callil$pack @($GRi,$s12)"
5558 (+ pack (misc-null-1) (LI-on) OP_0D GRi s12)
5559 (jump-and-link-semantics GRi s12 LI)
5560 ((fr400 (unit u-branch))
c7a48b9a 5561 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5562)
5563
5564(dni call
5565 "call and link"
ac7c07ac 5566 ((UNIT B0) (FR500-MAJOR B-4) (FR550-MAJOR B-4) (FR400-MAJOR B-4))
9aab5aa3
AC		 5567 "call$pack $label24"
5568 (+ pack OP_0F label24)
5569 (sequence ()
5570 (c-call VOID "@cpu@_set_write_next_vliw_addr_to_LR" 1)
5571 (set pc label24)
5572 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
5573 ((fr400 (unit u-branch))
ac7c07ac 5574 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 5575)
5576
5577(dni rett
5578 "return from trap"
ac7c07ac 5579 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2) PRIVILEGED)
9aab5aa3
AC		 5580 "rett$pack $debug"
5581 (+ pack (misc-null-1) debug OP_05 (rs-null) (s12-null))
5582 ; frv_rett handles operating vs user mode
5583 (sequence ()
5584 (set pc (c-call UWI "frv_rett" pc debug))
5585 (c-call VOID "@cpu@_model_branch" pc #x2)) ; hint branch taken
5586 ()
5587)
5588
5589(dni rei
5590 "run exception instruction"
5591 ((UNIT C) (FR500-MAJOR C-1) (MACH frv) PRIVILEGED)
5592 "rei$pack $eir"
5593 (+ pack (rd-null) OP_37 eir (s12-null))
5594 (nop) ; for now
5595 ()
5596)
5597
5598(define-pmacro (trap-semantics cond base offset)
5599 (if cond
5600 (sequence ()
5601 ; This is defered to frv_itrap because for the breakpoint
5602 ; case we want to change as little of the machine state as
5603 ; possible.
5604 ;
5605 ; PCSR=PC
5606 ; PSR.PS=PSR.S
5607 ; PSR.ET=0
5608 ; if PSR.ESR==1
5609 ; SR0 through SR3=GR4 through GR7
5610 ; TBR.TT=0x80 + ((GRi + s12) & 0x7f)
5611 ; PC=TBR
5612 ; We still should indicate what is modified by this insn.
5613 (clobber (spr-pcsr))
5614 (clobber psr_ps)
5615 (clobber psr_et)
5616 (clobber tbr_tt)
5617 (if (ne psr_esr (const 0))
5618 (sequence ()
5619 (clobber (spr-sr0))
5620 (clobber (spr-sr1))
5621 (clobber (spr-sr2))
5622 (clobber (spr-sr3))))
5623 ; frv_itrap handles operating vs user mode
5624 (c-call VOID "frv_itrap" pc base offset)))
5625)
5626
5627(define-pmacro (trap-r prefix cc i-f op ope cond attr comment)
5628 (dni (.sym prefix cc)
5629 (comment)
ac7c07ac 5630 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) attr)
9aab5aa3
AC		 5631 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$GRj")
5632 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi (misc-null-3) ope GRj)
5633 (trap-semantics (cond (.sym i-f CCi_2)) GRi GRj)
5634 ((fr400 (unit u-trap))
ac7c07ac 5635 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5636 )
5637)
5638
5639(dni tra
5640 "integer trap always"
ac7c07ac 5641 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1))
9aab5aa3
AC		 5642 "tra$pack $GRi,$GRj"
5643 (+ pack ICC_ra (ICCi_2-null) OP_04 GRi (misc-null-3) OPE4_0 GRj)
5644 (trap-semantics (const BI 1) GRi GRj)
5645 ((fr400 (unit u-trap))
ac7c07ac 5646 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5647)
5648
5649(dni tno
5650 "integer trap never"
ac7c07ac 5651 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1))
9aab5aa3
AC		 5652 "tno$pack"
5653 (+ pack ICC_nev (ICCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_0 (GRj-null))
5654 (trap-semantics (const BI 0) GRi GRj)
5655 ((fr400 (unit u-trap))
ac7c07ac 5656 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5657)
5658
5659(trap-r t eq I OP_04 OPE4_0 Ieq NA "integer trap equal")
5660(trap-r t ne I OP_04 OPE4_0 Ine NA "integer trap not equal")
5661(trap-r t le I OP_04 OPE4_0 Ile NA "integer trap less or equal")
5662(trap-r t gt I OP_04 OPE4_0 Igt NA "integer trap greater")
5663(trap-r t lt I OP_04 OPE4_0 Ilt NA "integer trap less")
5664(trap-r t ge I OP_04 OPE4_0 Ige NA "integer trap greater or equal")
5665(trap-r t ls I OP_04 OPE4_0 Ils NA "integer trap less or equal unsigned")
5666(trap-r t hi I OP_04 OPE4_0 Ihi NA "integer trap greater unsigned")
5667(trap-r t c I OP_04 OPE4_0 Ic NA "integer trap carry set")
5668(trap-r t nc I OP_04 OPE4_0 Inc NA "integer trap carry clear")
5669(trap-r t n I OP_04 OPE4_0 In NA "integer trap negative")
5670(trap-r t p I OP_04 OPE4_0 Ip NA "integer trap positive")
5671(trap-r t v I OP_04 OPE4_0 Iv NA "integer trap overflow set")
5672(trap-r t nv I OP_04 OPE4_0 Inv NA "integer trap overflow clear")
5673
5674(dni ftra
5675 "float trap always"
ac7c07ac 5676 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS)
9aab5aa3
AC		 5677 "ftra$pack $GRi,$GRj"
5678 (+ pack FCC_ra (FCCi_2-null) OP_04 GRi (misc-null-3) OPE4_1 GRj)
5679 (trap-semantics (const BI 1) GRi GRj)
5680 ((fr400 (unit u-trap))
ac7c07ac 5681 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5682)
5683
5684(dni ftno
5685 "flost trap never"
ac7c07ac 5686 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS)
9aab5aa3
AC		 5687 "ftno$pack"
5688 (+ pack FCC_nev (FCCi_2-null) OP_04 (GRi-null) (misc-null-3) OPE4_1 (GRj-null))
5689 (trap-semantics (const BI 0) GRi GRj)
5690 ((fr400 (unit u-trap))
ac7c07ac 5691 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5692)
5693
5694(trap-r ft ne F OP_04 OPE4_1 Fne FR-ACCESS "float trap not equal")
5695(trap-r ft eq F OP_04 OPE4_1 Feq FR-ACCESS "float trap equal")
5696(trap-r ft lg F OP_04 OPE4_1 Flg FR-ACCESS "float trap greater or less")
5697(trap-r ft ue F OP_04 OPE4_1 Fue FR-ACCESS "float trap unordered or equal")
5698(trap-r ft ul F OP_04 OPE4_1 Ful FR-ACCESS "float trap unordered or less")
5699(trap-r ft ge F OP_04 OPE4_1 Fge FR-ACCESS "float trap greater or equal")
5700(trap-r ft lt F OP_04 OPE4_1 Flt FR-ACCESS "float trap less")
5701(trap-r ft uge F OP_04 OPE4_1 Fuge FR-ACCESS "float trap unordered greater or equal")
5702(trap-r ft ug F OP_04 OPE4_1 Fug FR-ACCESS "float trap unordered or greater")
5703(trap-r ft le F OP_04 OPE4_1 Fle FR-ACCESS "float trap less or equal")
5704(trap-r ft gt F OP_04 OPE4_1 Fgt FR-ACCESS "float trap greater")
5705(trap-r ft ule F OP_04 OPE4_1 Fule FR-ACCESS "float trap unordered less or equal")
5706(trap-r ft u F OP_04 OPE4_1 Fu FR-ACCESS "float trap unordered")
5707(trap-r ft o F OP_04 OPE4_1 Fo FR-ACCESS "float trap ordered")
5708
5709(define-pmacro (trap-immed prefix cc i-f op cond attr comment)
5710 (dni (.sym prefix cc)
5711 (comment)
ac7c07ac 5712 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) attr)
9aab5aa3
AC		 5713 (.str (.sym prefix cc) "$pack $" i-f "CCi_2,$GRi,$s12")
5714 (+ pack (.sym i-f CC_ cc) (.sym i-f CCi_2) op GRi s12)
5715 (trap-semantics (cond (.sym i-f CCi_2)) GRi s12)
5716 ((fr400 (unit u-trap))
ac7c07ac 5717 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5718 )
5719)
5720
5721(dni tira
5722 "integer trap always"
ac7c07ac 5723 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1))
9aab5aa3
AC		 5724 "tira$pack $GRi,$s12"
5725 (+ pack ICC_ra (ICCi_2-null) OP_1C GRi s12)
5726 (trap-semantics (const BI 1) GRi s12)
5727 ((fr400 (unit u-trap))
ac7c07ac 5728 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5729)
5730
5731(dni tino
5732 "integer trap never"
ac7c07ac 5733 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1))
9aab5aa3
AC		 5734 "tino$pack"
5735 (+ pack ICC_nev (ICCi_2-null) OP_1C (GRi-null) (s12-null))
5736 (trap-semantics (const BI 0) GRi s12)
5737 ((fr400 (unit u-trap))
ac7c07ac 5738 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5739)
5740
5741(trap-immed ti eq I OP_1C Ieq NA "integer trap equal")
5742(trap-immed ti ne I OP_1C Ine NA "integer trap not equal")
5743(trap-immed ti le I OP_1C Ile NA "integer trap less or equal")
5744(trap-immed ti gt I OP_1C Igt NA "integer trap greater")
5745(trap-immed ti lt I OP_1C Ilt NA "integer trap less")
5746(trap-immed ti ge I OP_1C Ige NA "integer trap greater or equal")
5747(trap-immed ti ls I OP_1C Ils NA "integer trap less or equal unsigned")
5748(trap-immed ti hi I OP_1C Ihi NA "integer trap greater unsigned")
5749(trap-immed ti c I OP_1C Ic NA "integer trap carry set")
5750(trap-immed ti nc I OP_1C Inc NA "integer trap carry clear")
5751(trap-immed ti n I OP_1C In NA "integer trap negative")
5752(trap-immed ti p I OP_1C Ip NA "integer trap positive")
5753(trap-immed ti v I OP_1C Iv NA "integer trap overflow set")
5754(trap-immed ti nv I OP_1C Inv NA "integer trap overflow clear")
5755
5756(dni ftira
5757 "float trap always"
ac7c07ac 5758 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS)
9aab5aa3
AC		 5759 "ftira$pack $GRi,$s12"
5760 (+ pack FCC_ra (ICCi_2-null) OP_1D GRi s12)
5761 (trap-semantics (const BI 1) GRi s12)
5762 ((fr400 (unit u-trap))
ac7c07ac 5763 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5764)
5765
5766(dni ftino
5767 "float trap never"
ac7c07ac 5768 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS)
9aab5aa3
AC		 5769 "ftino$pack"
5770 (+ pack FCC_nev (FCCi_2-null) OP_1D (GRi-null) (s12-null))
5771 (trap-semantics (const BI 0) GRi s12)
5772 ((fr400 (unit u-trap))
ac7c07ac 5773 (fr500 (unit u-trap)) (fr550 (unit u-trap)))
9aab5aa3
AC		 5774)
5775
5776(trap-immed fti ne F OP_1D Fne FR-ACCESS "float trap not equal")
5777(trap-immed fti eq F OP_1D Feq FR-ACCESS "float trap equal")
5778(trap-immed fti lg F OP_1D Flg FR-ACCESS "float trap greater or less")
5779(trap-immed fti ue F OP_1D Fue FR-ACCESS "float trap unordered or equal")
5780(trap-immed fti ul F OP_1D Ful FR-ACCESS "float trap unordered or less")
5781(trap-immed fti ge F OP_1D Fge FR-ACCESS "float trap greater or equal")
5782(trap-immed fti lt F OP_1D Flt FR-ACCESS "float trap less")
5783(trap-immed fti uge F OP_1D Fuge FR-ACCESS "float trap unordered greater or equal")
5784(trap-immed fti ug F OP_1D Fug FR-ACCESS "float trap unordered or greater")
5785(trap-immed fti le F OP_1D Fle FR-ACCESS "float trap less or equal")
5786(trap-immed fti gt F OP_1D Fgt FR-ACCESS "float trap greater")
5787(trap-immed fti ule F OP_1D Fule FR-ACCESS "float trap unordered less or equal")
5788(trap-immed fti u F OP_1D Fu FR-ACCESS "float trap unordered")
5789(trap-immed fti o F OP_1D Fo FR-ACCESS "float trap ordered")
5790
5791(dni break
5792 "break trap"
ac7c07ac 5793 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1))
9aab5aa3
AC		 5794 "break$pack"
5795 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_3 (GRj-null))
5796 (sequence ()
5797 ; This is defered to frv_break because for the breakpoint
5798 ; case we want to change as little of the machine state as
5799 ; possible.
5800 ;
5801 ; BPCSR=PC
5802 ; BPSR.BS=PSR.S
5803 ; BPSR.BET=PSR.ET
5804 ; PSR.S=1
5805 ; PSR.ET=0
5806 ; TBR.TT=0xff
5807 ; PC=TBR
5808 ; We still should indicate what is modified by this insn.
5809 (clobber (spr-bpcsr))
5810 (clobber bpsr_bs)
5811 (clobber bpsr_bet)
5812 (clobber psr_s)
5813 (clobber psr_et)
5814 (clobber tbr_tt)
5815 (c-call VOID "frv_break"))
5816 ()
5817)
5818
5819(dni mtrap
5820 "media trap"
ac7c07ac 5821 ((UNIT C) (FR500-MAJOR C-1) (FR550-MAJOR C-1) (FR400-MAJOR C-1) FR-ACCESS)
9aab5aa3
AC		 5822 "mtrap$pack"
5823 (+ pack (rd-null) OP_04 (rs-null) (misc-null-3) OPE4_2 (GRj-null))
5824 (c-call VOID "frv_mtrap")
5825 ()
5826)
5827
5828(define-pmacro (condition-code-logic name operation ope comment)
5829 (dni name
5830 (comment)
ac7c07ac 5831 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) (FR400-MAJOR B-6))
9aab5aa3
AC		 5832 (.str name "$pack $CRi,$CRj,$CRk")
5833 (+ pack (misc-null-6) CRk OP_0A (misc-null-7) CRi ope (misc-null-8) CRj)
5834 (set CRk (c-call UQI "@cpu@_cr_logic" operation CRi CRj))
5835 ()
5836 )
5837)
5838(define-pmacro (op-andcr) 0)
5839(define-pmacro (op-orcr) 1)
5840(define-pmacro (op-xorcr) 2)
5841(define-pmacro (op-nandcr) 3)
5842(define-pmacro (op-norcr) 4)
5843(define-pmacro (op-andncr) 5)
5844(define-pmacro (op-orncr) 6)
5845(define-pmacro (op-nandncr) 7)
5846(define-pmacro (op-norncr) 8)
5847
5848(define-pmacro (cr-true) 3)
5849(define-pmacro (cr-false) 2)
5850(define-pmacro (cr-undefined) 0)
5851
5852(condition-code-logic andcr (op-andcr) OPE1_08 "and condition code regs")
5853(condition-code-logic orcr (op-orcr) OPE1_09 "or condition code regs")
5854(condition-code-logic xorcr (op-xorcr) OPE1_0A "xor condition code regs")
5855(condition-code-logic nandcr (op-nandcr) OPE1_0C "nand condition code regs")
5856(condition-code-logic norcr (op-norcr) OPE1_0D "nor condition code regs")
5857(condition-code-logic andncr (op-andncr) OPE1_10 "andn condition code regs")
5858(condition-code-logic orncr (op-orncr) OPE1_11 "orn condition code regs")
5859(condition-code-logic nandncr (op-nandncr) OPE1_14 "nandn condition code regs")
5860(condition-code-logic norncr (op-norncr) OPE1_15 "norn condition code regs")
5861
5862(dni notcr
5863 ("not cccr register")
ac7c07ac 5864 ((UNIT B01) (FR500-MAJOR B-6) (FR550-MAJOR B-6) (FR400-MAJOR B-6))
9aab5aa3
AC		 5865 (.str notcr "$pack $CRj,$CRk")
5866 (+ pack (misc-null-6) CRk OP_0A (rs-null) OPE1_0B (misc-null-8) CRj)
5867 (set CRk (xor CRj 1))
5868 ()
5869)
5870
5871(define-pmacro (check-semantics cond cr)
5872 (if cond (set cr (cr-true)) (set cr (cr-false)))
5873)
5874
5875(define-pmacro (check-int-condition-code prefix cc op cond comment)
5876 (dni (.sym prefix cc)
5877 (comment)
ac7c07ac 5878 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5))
9aab5aa3
AC		 5879 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int")
5880 (+ pack (.sym ICC_ cc) CRj_int op (misc-null-5) ICCi_3)
5881 (check-semantics (cond ICCi_3) CRj_int)
5882 ((fr400 (unit u-check))
ac7c07ac 5883 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5884 )
5885)
5886
5887(dni ckra
5888 "check integer cc always"
ac7c07ac 5889 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5))
9aab5aa3
AC		 5890 "ckra$pack $CRj_int"
5891 (+ pack ICC_ra CRj_int OP_08 (misc-null-5) (ICCi_3-null))
5892 (check-semantics (const BI 1) CRj_int)
5893 ((fr400 (unit u-check))
ac7c07ac 5894 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5895)
5896
5897(dni ckno
5898 "check integer cc never"
ac7c07ac 5899 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5))
9aab5aa3
AC		 5900 "ckno$pack $CRj_int"
5901 (+ pack ICC_nev CRj_int OP_08 (misc-null-5) (ICCi_3-null))
5902 (check-semantics (const BI 0) CRj_int)
5903 ((fr400 (unit u-check))
ac7c07ac 5904 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5905)
5906
5907(check-int-condition-code ck eq OP_08 Ieq "check integer cc equal")
5908(check-int-condition-code ck ne OP_08 Ine "check integer cc not equal")
5909(check-int-condition-code ck le OP_08 Ile "check integer cc less or equal")
5910(check-int-condition-code ck gt OP_08 Igt "check integer cc greater")
5911(check-int-condition-code ck lt OP_08 Ilt "check integer cc less")
5912(check-int-condition-code ck ge OP_08 Ige "check integer cc greater or equal")
5913(check-int-condition-code ck ls OP_08 Ils "check integer cc less or equal unsigned")
5914(check-int-condition-code ck hi OP_08 Ihi "check integer cc greater unsigned")
5915(check-int-condition-code ck c OP_08 Ic "check integer cc carry set")
5916(check-int-condition-code ck nc OP_08 Inc "check integer cc carry clear")
5917(check-int-condition-code ck n OP_08 In "check integer cc negative")
5918(check-int-condition-code ck p OP_08 Ip "check integer cc positive")
5919(check-int-condition-code ck v OP_08 Iv "check integer cc overflow set")
5920(check-int-condition-code ck nv OP_08 Inv "check integer cc overflow clear")
5921
5922(define-pmacro (check-float-condition-code prefix cc op cond comment)
5923 (dni (.sym prefix cc)
5924 (comment)
ac7c07ac 5925 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS)
9aab5aa3
AC		 5926 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float")
5927 (+ pack (.sym FCC_ cc) CRj_float op (misc-null-5) FCCi_3)
5928 (check-semantics (cond FCCi_3) CRj_float)
5929 ((fr400 (unit u-check))
ac7c07ac 5930 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5931 )
5932)
5933
5934(dni fckra
5935 "check float cc always"
ac7c07ac 5936 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS)
9aab5aa3
AC		 5937 "fckra$pack $CRj_float"
5938 (+ pack FCC_ra CRj_float OP_09 (misc-null-5) FCCi_3)
5939 (check-semantics (const BI 1) CRj_float)
5940 ((fr400 (unit u-check))
ac7c07ac 5941 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5942)
5943
5944(dni fckno
5945 "check float cc never"
ac7c07ac 5946 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) FR-ACCESS)
9aab5aa3
AC		 5947 "fckno$pack $CRj_float"
5948 (+ pack FCC_nev CRj_float OP_09 (misc-null-5) FCCi_3)
5949 (check-semantics (const BI 0) CRj_float)
5950 ((fr400 (unit u-check))
ac7c07ac 5951 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5952)
5953
5954(check-float-condition-code fck ne OP_09 Fne "check float cc not equal")
5955(check-float-condition-code fck eq OP_09 Feq "check float cc equal")
5956(check-float-condition-code fck lg OP_09 Flg "check float cc greater or less")
5957(check-float-condition-code fck ue OP_09 Fue "check float cc unordered or equal")
5958(check-float-condition-code fck ul OP_09 Ful "check float cc unordered or less")
5959(check-float-condition-code fck ge OP_09 Fge "check float cc greater or equal")
5960(check-float-condition-code fck lt OP_09 Flt "check float cc less")
5961(check-float-condition-code fck uge OP_09 Fuge "check float cc unordered greater or equal")
5962(check-float-condition-code fck ug OP_09 Fug "check float cc unordered or greater")
5963(check-float-condition-code fck le OP_09 Fle "check float cc less or equal")
5964(check-float-condition-code fck gt OP_09 Fgt "check float cc greater")
5965(check-float-condition-code fck ule OP_09 Fule "check float cc unordered less or equal")
5966(check-float-condition-code fck u OP_09 Fu "check float cc unordered")
5967(check-float-condition-code fck o OP_09 Fo "check float cc ordered")
5968
5969(define-pmacro (conditional-check-int-condition-code prefix cc op ope test comment)
5970 (dni (.sym prefix cc)
5971 (comment)
ac7c07ac 5972 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL)
9aab5aa3
AC		 5973 (.str (.sym prefix cc) "$pack $ICCi_3,$CRj_int,$CCi,$cond")
5974 (+ pack (.sym ICC_ cc) CRj_int op (rs-null) CCi cond ope
5975 (misc-null-9) ICCi_3)
5976 (if (eq CCi (or cond 2))
5977 (check-semantics (test ICCi_3) CRj_int)
5978 (set CRj_int (cr-undefined)))
5979 ((fr400 (unit u-check))
ac7c07ac 5980 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5981 )
5982)
5983
5984(dni cckra
5985 "conditional check integer cc always"
ac7c07ac 5986 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL)
9aab5aa3
AC		 5987 "cckra$pack $CRj_int,$CCi,$cond"
5988 (+ pack ICC_ra CRj_int OP_6A (rs-null) CCi cond OPE4_0
5989 (misc-null-9) (ICCi_3-null))
5990 (if (eq CCi (or cond 2))
5991 (check-semantics (const BI 1) CRj_int)
5992 (set CRj_int (cr-undefined)))
5993 ((fr400 (unit u-check))
ac7c07ac 5994 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 5995)
5996
5997(dni cckno
5998 "conditional check integer cc never"
ac7c07ac 5999 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL)
9aab5aa3
AC		 6000 "cckno$pack $CRj_int,$CCi,$cond"
6001 (+ pack ICC_nev CRj_int OP_6A (rs-null) CCi cond OPE4_0
6002 (misc-null-9) (ICCi_3-null))
6003 (if (eq CCi (or cond 2))
6004 (check-semantics (const BI 0) CRj_int)
6005 (set CRj_int (cr-undefined)))
6006 ((fr400 (unit u-check))
ac7c07ac 6007 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 6008)
6009
6010(conditional-check-int-condition-code cck eq OP_6A OPE4_0 Ieq "check integer cc equal")
6011(conditional-check-int-condition-code cck ne OP_6A OPE4_0 Ine "check integer cc not equal")
6012(conditional-check-int-condition-code cck le OP_6A OPE4_0 Ile "check integer cc less or equal")
6013(conditional-check-int-condition-code cck gt OP_6A OPE4_0 Igt "check integer cc greater")
6014(conditional-check-int-condition-code cck lt OP_6A OPE4_0 Ilt "check integer cc less")
6015(conditional-check-int-condition-code cck ge OP_6A OPE4_0 Ige "check integer cc greater or equal")
6016(conditional-check-int-condition-code cck ls OP_6A OPE4_0 Ils "check integer cc less or equal unsigned")
6017(conditional-check-int-condition-code cck hi OP_6A OPE4_0 Ihi "check integer cc greater unsigned")
6018(conditional-check-int-condition-code cck c OP_6A OPE4_0 Ic "check integer cc carry set")
6019(conditional-check-int-condition-code cck nc OP_6A OPE4_0 Inc "check integer cc carry clear")
6020(conditional-check-int-condition-code cck n OP_6A OPE4_0 In "check integer cc negative")
6021(conditional-check-int-condition-code cck p OP_6A OPE4_0 Ip "check integer cc positive")
6022(conditional-check-int-condition-code cck v OP_6A OPE4_0 Iv "check integer cc overflow set")
6023(conditional-check-int-condition-code cck nv OP_6A OPE4_0 Inv "check integer cc overflow clear")
6024
6025(define-pmacro (conditional-check-float-condition-code prefix cc op ope test comment)
6026 (dni (.sym prefix cc)
6027 (comment)
ac7c07ac 6028 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 6029 (.str (.sym prefix cc) "$pack $FCCi_3,$CRj_float,$CCi,$cond")
6030 (+ pack (.sym FCC_ cc) CRj_float op (rs-null) CCi cond ope
6031 (misc-null-9) FCCi_3)
6032 (if (eq CCi (or cond 2))
6033 (check-semantics (test FCCi_3) CRj_float)
6034 (set CRj_float (cr-undefined)))
6035 ((fr400 (unit u-check))
ac7c07ac 6036 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 6037 )
6038)
6039
6040(dni cfckra
6041 "conditional check float cc always"
ac7c07ac 6042 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 6043 "cfckra$pack $CRj_float,$CCi,$cond"
6044 (+ pack FCC_ra CRj_float OP_6A (rs-null) CCi cond OPE4_1
6045 (misc-null-9) (FCCi_3-null))
6046 (if (eq CCi (or cond 2))
6047 (check-semantics (const BI 1) CRj_float)
6048 (set CRj_float (cr-undefined)))
6049 ((fr400 (unit u-check))
ac7c07ac 6050 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 6051)
6052
6053(dni cfckno
6054 "conditional check float cc never"
ac7c07ac 6055 ((UNIT B01) (FR500-MAJOR B-5) (FR550-MAJOR B-5) (FR400-MAJOR B-5) CONDITIONAL FR-ACCESS)
9aab5aa3
AC		 6056 "cfckno$pack $CRj_float,$CCi,$cond"
6057 (+ pack FCC_nev CRj_float OP_6A (rs-null) CCi cond OPE4_1
6058 (misc-null-9) (FCCi_3-null))
6059 (if (eq CCi (or cond 2))
6060 (check-semantics (const BI 0) CRj_float)
6061 (set CRj_float (cr-undefined)))
6062 ((fr400 (unit u-check))
ac7c07ac 6063 (fr500 (unit u-check)) (fr550 (unit u-check)))
9aab5aa3
AC		 6064)
6065
6066(conditional-check-float-condition-code cfck ne OP_6A OPE4_1 Fne "check float cc not equal")
6067(conditional-check-float-condition-code cfck eq OP_6A OPE4_1 Feq "check float cc equal")
6068(conditional-check-float-condition-code cfck lg OP_6A OPE4_1 Flg "check float cc greater or less")
6069(conditional-check-float-condition-code cfck ue OP_6A OPE4_1 Fue "check float cc unordered or equal")
6070(conditional-check-float-condition-code cfck ul OP_6A OPE4_1 Ful "check float cc unordered or less")
6071(conditional-check-float-condition-code cfck ge OP_6A OPE4_1 Fge "check float cc greater or equal")
6072(conditional-check-float-condition-code cfck lt OP_6A OPE4_1 Flt "check float cc less")
6073(conditional-check-float-condition-code cfck uge OP_6A OPE4_1 Fuge "check float cc unordered greater or equal")
6074(conditional-check-float-condition-code cfck ug OP_6A OPE4_1 Fug "check float cc unordered or greater")
6075(conditional-check-float-condition-code cfck le OP_6A OPE4_1 Fle "check float cc less or equal")
6076(conditional-check-float-condition-code cfck gt OP_6A OPE4_1 Fgt "check float cc greater")
6077(conditional-check-float-condition-code cfck ule OP_6A OPE4_1 Fule "check float cc unordered less or equal")
6078(conditional-check-float-condition-code cfck u OP_6A OPE4_1 Fu "check float cc unordered")
6079(conditional-check-float-condition-code cfck o OP_6A OPE4_1 Fo "check float cc ordered")
6080
6081(dni cjmpl
6082 "conditional jump and link"
c7a48b9a
RS		 6083 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6084 (FR400-MAJOR I-5) CONDITIONAL)
9aab5aa3
AC		 6085 "cjmpl$pack @($GRi,$GRj),$CCi,$cond"
6086 (+ pack (misc-null-1) (LI-off) OP_6A GRi CCi cond OPE4_2 GRj)
6087 (if (eq CCi (or cond 2))
6088 (jump-and-link-semantics GRi GRj LI))
6089 ((fr400 (unit u-branch))
ac7c07ac 6090 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 6091)
6092
6093(dni ccalll
6094 "conditional call and link"
c7a48b9a
RS		 6095 ((UNIT I0) (FR500-MAJOR I-5) (FR550-MAJOR I-6)
6096 (FR400-MAJOR I-5) CONDITIONAL)
9aab5aa3
AC		 6097 "ccalll$pack @($GRi,$GRj),$CCi,$cond"
6098 (+ pack (misc-null-1) (LI-on) OP_6A GRi CCi cond OPE4_2 GRj)
6099 (if (eq CCi (or cond 2))
6100 (jump-and-link-semantics GRi GRj LI))
6101 ((fr400 (unit u-branch))
c7a48b9a 6102 (fr500 (unit u-branch)) (fr550 (unit u-branch)))
9aab5aa3
AC		 6103)
6104
6105(define-pmacro (cache-invalidate name cache all op ope profile comment)
6106 (dni name
6107 (comment)
ac7c07ac 6108 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 6109 (.str name "$pack @($GRi,$GRj)")
6110 (+ pack (rd-null) op GRi ope GRj)
6111 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) all)
6112 profile
6113 )
6114)
6115
6116(cache-invalidate ici insn 0 OP_03 OPE1_38
ac7c07ac 6117 ((fr400 (unit u-ici)) (fr500 (unit u-ici)) (fr550 (unit u-ici)))
9aab5aa3
AC		 6118 "invalidate insn cache")
6119(cache-invalidate dci data 0 OP_03 OPE1_3C
ac7c07ac 6120 ((fr400 (unit u-dci)) (fr500 (unit u-dci)) (fr550 (unit u-dci)))
9aab5aa3
AC		 6121 "invalidate data cache")
6122
6123(define-pmacro (cache-invalidate-entry name cache op ope profile comment)
6124 (dni name
6125 (comment)
ac7c07ac 6126 ((UNIT C) (FR400-MAJOR C-2) (FR550-MAJOR C-2) (MACH fr400,fr550))
9aab5aa3
AC		 6127 (.str name "$pack @($GRi,$GRj),$ae")
6128 (+ pack (misc-null-1) ae op GRi ope GRj)
6129 (if (eq ae 0)
6130 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) -1) ; Invalid ae setting for this insn
6131 (c-call VOID (.str "@cpu@_" cache "_cache_invalidate") (add GRi GRj) ae))
6132 profile
6133 )
6134)
6135
6136(cache-invalidate-entry icei insn OP_03 OPE1_39
ac7c07ac 6137 ((fr400 (unit u-ici)) (fr550 (unit u-ici)))
9aab5aa3
AC		 6138 "invalidate insn cache entry")
6139(cache-invalidate-entry dcei data OP_03 OPE1_3A
ac7c07ac 6140 ((fr400 (unit u-dci)) (fr550 (unit u-dci)))
9aab5aa3
AC		 6141 "invalidate data cache entry")
6142
6143(dni dcf
6144 "Data cache flush"
ac7c07ac 6145 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 6146 "dcf$pack @($GRi,$GRj)"
6147 (+ pack (rd-null) OP_03 GRi OPE1_3D GRj)
6148 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) 0)
6149 ((fr400 (unit u-dcf))
ac7c07ac 6150 (fr500 (unit u-dcf)) (fr550 (unit u-dcf)))
9aab5aa3
AC		 6151)
6152
6153(dni dcef
6154 "Data cache entry flush"
ac7c07ac 6155 ((UNIT C) (FR400-MAJOR C-2) (FR550-MAJOR C-2) (MACH fr400,fr550))
9aab5aa3
AC		 6156 "dcef$pack @($GRi,$GRj),$ae"
6157 (+ pack (misc-null-1) ae OP_03 GRi OPE1_3B GRj)
6158 (if (eq ae 0)
6159 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) -1)
6160 (c-call VOID "@cpu@_data_cache_flush" (add GRi GRj) ae))
ac7c07ac 6161 ((fr400 (unit u-dcf)) (fr550 (unit u-dcf)))
9aab5aa3
AC		 6162)
6163
6164(define-pmacro (write-TLB name insn op ope comment)
6165 (dni name
6166 (comment)
6167 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6168 (.str insn "$pack $GRk,@($GRi,$GRj)")
6169 (+ pack GRk op GRi ope GRj)
6170 (nop) ; for now
6171 ()
6172 )
6173)
6174
6175(write-TLB witlb witlb OP_03 OPE1_32 "write for insn TLB")
6176(write-TLB wdtlb wdtlb OP_03 OPE1_36 "write for data TLB")
6177
6178(define-pmacro (invalidate-TLB name insn op ope comment)
6179 (dni name
6180 (comment)
6181 ((UNIT C) (FR500-MAJOR C-2) (MACH frv) PRIVILEGED)
6182 (.str insn "$pack @($GRi,$GRj)")
6183 (+ pack (rd-null) op GRi ope GRj)
6184 (nop) ; for now
6185 ()
6186 )
6187)
6188
6189(invalidate-TLB itlbi itlbi OP_03 OPE1_33 "invalidate insn TLB")
6190(invalidate-TLB dtlbi dtlbi OP_03 OPE1_37 "invalidate data TLB")
6191
0457efce 6192(define-pmacro (cache-preload name cache pipe attrs op ope profile comment)
9aab5aa3
AC		 6193 (dni name
6194 (comment)
0457efce 6195 (.splice (UNIT pipe) (FR500-MAJOR C-2) (FR400-MAJOR C-2) (.unsplice attrs))
9aab5aa3
AC		 6196 (.str name "$pack $GRi,$GRj,$lock")
6197 (+ pack (misc-null-1) lock op GRi ope GRj)
6198 (c-call VOID (.str "@cpu@_" cache "_cache_preload") GRi GRj lock)
6199 profile
6200 )
6201)
6202
ac7c07ac
DB		 6203(cache-preload icpl insn C ((FR550-MAJOR C-2)) OP_03 OPE1_30
6204 ((fr400 (unit u-icpl)) (fr500 (unit u-icpl)) (fr550 (unit u-icpl)))
9aab5aa3 6205 "preload insn cache")
ac7c07ac
DB		 6206(cache-preload dcpl data DCPL ((FR550-MAJOR I-8)) OP_03 OPE1_34
6207 ((fr400 (unit u-dcpl)) (fr500 (unit u-dcpl)) (fr550 (unit u-dcpl)))
9aab5aa3
AC		 6208 "preload data cache")
6209
6210(define-pmacro (cache-unlock name cache op ope profile comment)
6211 (dni name
6212 (comment)
ac7c07ac 6213 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 6214 (.str name "$pack $GRi")
6215 (+ pack (rd-null) op GRi ope (GRj-null))
6216 (c-call VOID (.str "@cpu@_" cache "_cache_unlock") GRi)
6217 profile
6218 )
6219)
6220
6221(cache-unlock icul insn OP_03 OPE1_31
ac7c07ac 6222 ((fr400 (unit u-icul)) (fr500 (unit u-icul)) (fr550 (unit u-icul)))
9aab5aa3
AC		 6223 "unlock insn cache")
6224(cache-unlock dcul data OP_03 OPE1_35
ac7c07ac 6225 ((fr400 (unit u-dcul)) (fr500 (unit u-dcul)) (fr550 (unit u-dcul)))
9aab5aa3
AC		 6226 "unlock data cache")
6227
6228(define-pmacro (barrier name insn op ope profile comment)
6229 (dni name
6230 (comment)
ac7c07ac 6231 ((UNIT C) (FR500-MAJOR C-2) (FR550-MAJOR C-2) (FR400-MAJOR C-2))
9aab5aa3
AC		 6232 (.str insn "$pack")
6233 (+ pack (rd-null) op (rs-null) ope (GRj-null))
6234 (nop) ; sufficient implementation
6235 profile
6236 )
6237)
6238
6239(barrier bar bar OP_03 OPE1_3E
6240 ((fr400 (unit u-barrier)) (fr500 (unit u-barrier)))
6241 "barrier")
6242(barrier membar membar OP_03 OPE1_3F
6243 ((fr400 (unit u-membar)) (fr500 (unit u-membar)))
6244 "memory barrier")
6245
6246; Coprocessor operations
6247(define-pmacro (cop-op num op)
6248 (dni (.sym cop num)
6249 "Coprocessor operation"
6250 ((UNIT C) (FR500-MAJOR C-2) (MACH frv))
6251 (.str "cop" num "$pack $s6_1,$CPRi,$CPRj,$CPRk")
6252 (+ pack CPRk op CPRi s6_1 CPRj)
6253 (nop) ; sufficient implementation
6254 ()
6255 )
6256)
6257
6258(cop-op 1 OP_7E)
6259(cop-op 2 OP_7F)
6260
6261(define-pmacro (clear-ne-flag-semantics target_index is_float)
6262 (c-call VOID "@cpu@_clear_ne_flags" target_index is_float)
6263)
6264
23600bb3 6265(define-pmacro (clear-ne-flag-r name op ope reg is_float attr profile comment)
9aab5aa3
AC		 6266 (dni name
6267 (comment)
ac7c07ac 6268 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
9aab5aa3
AC		 6269 (.str name "$pack $" reg "k")
6270 (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
23600bb3
DB		 6271 (sequence ()
6272 ; hack to get this referenced for profiling
6273 (c-raw-call VOID "frv_ref_SI" (.sym reg k))
6274 (clear-ne-flag-semantics (index-of (.sym reg k)) is_float))
6275 profile
9aab5aa3
AC		 6276 )
6277)
6278
23600bb3 6279(clear-ne-flag-r clrgr OP_0A OPE1_00 GR 0 NA
ac7c07ac 6280 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
23600bb3
DB		 6281 "Clear GR NE flag")
6282(clear-ne-flag-r clrfr OP_0A OPE1_02 FR 1 FR-ACCESS
ac7c07ac 6283 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
23600bb3 6284 "Clear FR NE flag")
9aab5aa3 6285
23600bb3 6286(define-pmacro (clear-ne-flag-all name op ope is_float attr profile comment)
9aab5aa3
AC		 6287 (dni name
6288 (comment)
ac7c07ac 6289 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH simple,tomcat,fr500,fr550,frv) attr)
9aab5aa3
AC		 6290 (.str name "$pack")
6291 (+ pack (rd-null) op (rs-null) ope (GRj-null))
6292 (clear-ne-flag-semantics -1 is_float)
23600bb3 6293 profile
9aab5aa3
AC		 6294 )
6295)
6296
23600bb3 6297(clear-ne-flag-all clrga OP_0A OPE1_01 0 NA
ac7c07ac 6298 ((fr500 (unit u-clrgr)) (fr550 (unit u-clrgr)))
23600bb3
DB		 6299 "Clear GR NE flag ALL")
6300(clear-ne-flag-all clrfa OP_0A OPE1_03 1 FR-ACCESS
ac7c07ac 6301 ((fr500 (unit u-clrfr)) (fr550 (unit u-clrfr)))
23600bb3 6302 "Clear FR NE flag ALL")
9aab5aa3
AC		 6303
6304(define-pmacro (commit-semantics target_index is_float)
6305 (c-call VOID "@cpu@_commit" target_index is_float)
6306)
6307
6308(define-pmacro (commit-r name op ope reg is_float attr comment)
6309 (dni name
6310 (comment)
ac7c07ac 6311 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
9aab5aa3
AC		 6312 (.str name "$pack $" reg "k")
6313 (+ pack (.sym reg k) op (rs-null) ope (GRj-null))
6314 (commit-semantics (index-of (.sym reg k)) is_float)
ac7c07ac 6315 ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
9aab5aa3
AC		 6316 )
6317)
6318
6319(commit-r commitgr OP_0A OPE1_04 GR 0 NA "commit exceptions, specific GR")
6320(commit-r commitfr OP_0A OPE1_06 FR 1 FR-ACCESS "commit exceptions, specific FR")
6321
6322(define-pmacro (commit name op ope is_float attr comment)
6323 (dni name
6324 (comment)
ac7c07ac 6325 ((UNIT I01) (FR500-MAJOR I-6) (FR550-MAJOR I-7) (MACH frv,fr500,fr550) attr)
9aab5aa3
AC		 6326 (.str name "$pack")
6327 (+ pack (rd-null) op (rs-null) ope (GRj-null))
6328 (commit-semantics -1 is_float)
ac7c07ac 6329 ((fr500 (unit u-commit)) (fr550 (unit u-commit)))
9aab5aa3
AC		 6330 )
6331)
6332
6333(commit commitga OP_0A OPE1_05 0 NA "commit exceptions, any GR")
6334(commit commitfa OP_0A OPE1_07 1 FR-ACCESS "commit exceptions, any FR")
6335
6336(define-pmacro (floating-point-conversion
6337 name op ope conv mode src targ attr comment)
6338 (dni name
6339 (comment)
0457efce 6340 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
9aab5aa3
AC		 6341 (.str name "$pack $" src ",$" targ)
6342 (+ pack targ op (rs-null) ope src)
6343 (set targ (conv mode src))
ac7c07ac 6344 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
9aab5aa3
AC		 6345 )
6346)
6347
0457efce 6348(floating-point-conversion fitos OP_79 OPE1_00 float SF FRintj FRk
ac7c07ac 6349 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
0457efce
DB		 6350 "Convert Integer to Single")
6351(floating-point-conversion fstoi OP_79 OPE1_01 fix SI FRj FRintk
ac7c07ac 6352 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
0457efce
DB		 6353 "Convert Single to Integer")
6354(floating-point-conversion fitod OP_7A OPE1_00 float DF FRintj FRdoublek
6355 ((MACH frv))
6356 "Convert Integer to Double")
6357(floating-point-conversion fdtoi OP_7A OPE1_01 fix SI FRdoublej FRintk
6358 ((MACH frv))
6359 "Convert Double to Integer")
9aab5aa3
AC		 6360
6361(define-pmacro (floating-point-dual-conversion
6362 name op ope conv mode src src_hw targ targ_hw attr comment)
6363 (dni name
6364 (comment)
8caa9169 6365 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) attr)
9aab5aa3
AC		 6366 (.str name "$pack $" src ",$" targ)
6367 (+ pack targ op (rs-null) ope src)
6368 (sequence ()
6369 (set targ (conv mode src))
6370 (set (nextreg targ_hw targ 1)
6371 (conv mode (nextreg src_hw src 1))))
6372 ((fr500 (unit u-float-dual-convert)))
6373 )
6374)
6375
6376(floating-point-dual-conversion fditos OP_79 OPE1_10 float SF FRintj h-fr_int FRk h-fr NA "Dual Convert Integer to Single")
6377(floating-point-dual-conversion fdstoi OP_79 OPE1_11 fix SI FRj h-fr FRintk h-fr_int NA "Dual Convert Single to Integer")
6378
6379(define-pmacro (ne-floating-point-dual-conversion
6380 name op ope conv mode src src_hw targ targ_hw attr comment)
6381 (dni name
6382 (comment)
8caa9169 6383 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1) NON-EXCEPTING attr)
9aab5aa3
AC		 6384 (.str name "$pack $" src ",$" targ)
6385 (+ pack targ op (rs-null) ope src)
6386 (sequence ()
6387 (c-call VOID "@cpu@_set_ne_index" (index-of targ))
6388 (set targ (conv mode src))
6389 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
6390 (set (nextreg targ_hw targ 1)
6391 (conv mode (nextreg src_hw src 1))))
6392 ((fr500 (unit u-float-dual-convert)))
6393 )
6394)
6395
6396(ne-floating-point-dual-conversion nfditos OP_79 OPE1_30 float SF FRintj h-fr_int FRk h-fr NA "Non excepting dual Convert Integer to Single")
6397(ne-floating-point-dual-conversion nfdstoi OP_79 OPE1_31 fix SI FRj h-fr FRintk h-fr_int NA "Non excepting dual Convert Single to Integer")
6398
6399(define-pmacro (conditional-floating-point-conversion
6400 name op ope conv mode src targ comment)
6401 (dni name
6402 (comment)
ac7c07ac 6403 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6404 (.str name "$pack $" src ",$" targ ",$CCi,$cond")
6405 (+ pack targ op (rs-null) CCi cond ope src)
6406 (if (eq CCi (or cond 2))
6407 (set targ (conv mode src)))
ac7c07ac 6408 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
9aab5aa3
AC		 6409 )
6410)
6411
6412(conditional-floating-point-conversion cfitos OP_6B OPE4_0 float SF FRintj FRk "Conditional convert Integer to Single")
6413(conditional-floating-point-conversion cfstoi OP_6B OPE4_1 fix SI FRj FRintk "Conditional convert Single to Integer")
6414
6415(define-pmacro (ne-floating-point-conversion
6416 name op ope conv mode src targ comment)
6417 (dni name
6418 (comment)
ac7c07ac 6419 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6420 (.str name "$pack $" src ",$" targ)
6421 (+ pack targ op (rs-null) ope src)
6422 (sequence ()
6423 (c-call VOID "@cpu@_set_ne_index" (index-of targ))
6424 (set targ (conv mode src)))
ac7c07ac 6425 ((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
9aab5aa3
AC		 6426 )
6427)
6428
6429(ne-floating-point-conversion nfitos OP_79 OPE1_20 float SF FRintj FRk "NE convert Integer to Single")
6430(ne-floating-point-conversion nfstoi OP_79 OPE1_21 fix SI FRj FRintk "NE convert Single to Integer")
6431
6432(register-transfer fmovs OP_79 OPE1_02
1340b9a9 6433 FRj FRk FMALL
ac7c07ac 6434 ((FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6435 ((fr500 (unit u-fr2fr)))
6436 "Move Single Float")
6437(register-transfer fmovd OP_7A OPE1_02
6438 ; TODO -- unit doesn't handle extra register
0457efce
DB		 6439 FRdoublej FRdoublek FM01
6440 ((FR500-MAJOR F-1) (MACH frv))
ac7c07ac 6441 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
9aab5aa3
AC		 6442 "Move Double Float")
6443
6444(dni fdmovs
6445 "Dual move single float"
8caa9169 6446 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
9aab5aa3
AC		 6447 "fdmovs$pack $FRj,$FRk"
6448 (+ pack FRk OP_79 (rs-null) OPE1_12 FRj)
6449 (sequence ()
6450 (set FRk FRj)
6451 (set (nextreg h-fr FRk 1) (nextreg h-fr FRj 1)))
6452 ; TODO -- unit doesn't handle extra register
6453 ((fr500 (unit u-fr2fr)))
6454)
6455
6456(conditional-register-transfer cfmovs OP_6C OPE4_0 FRj FRk FM01
ac7c07ac
DB		 6457 ((FR500-MAJOR F-1) (FR550-MAJOR F-2)
6458 (MACH simple,tomcat,fr500,fr550,frv))
6459 ((fr500 (unit u-fr2fr)) (fr550 (unit u-fr2fr)))
9aab5aa3
AC		 6460 "Conditional move Single Float")
6461
6462(define-pmacro (floating-point-neg name src targ op ope attr comment)
6463 (dni name
6464 (comment)
0457efce 6465 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
9aab5aa3
AC		 6466 (.str name "$pack $" src ",$" targ)
6467 (+ pack src op (rs-null) ope targ)
6468 (set targ (neg src))
ac7c07ac 6469 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
9aab5aa3
AC		 6470 )
6471)
6472
ac7c07ac 6473(floating-point-neg fnegs FRj FRk OP_79 OPE1_03 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Floating point negate, single")
0457efce 6474(floating-point-neg fnegd FRdoublej FRdoublek OP_7A OPE1_03 ((MACH frv)) "Floating point negate, double")
9aab5aa3
AC		 6475
6476(dni fdnegs
6477 "Floating point dual negate, single"
8caa9169 6478 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
9aab5aa3
AC		 6479 "fdnegs$pack $FRj,$FRk"
6480 (+ pack FRk OP_79 (rs-null) OPE1_13 FRj)
6481 (sequence ()
6482 (set FRk (neg FRj))
6483 (set (nextreg h-fr FRk 1) (neg (nextreg h-fr FRj 1))))
6484 ((fr500 (unit u-float-dual-arith)))
6485)
6486
6487(dni cfnegs
6488 "Conditional floating point negate, single"
ac7c07ac 6489 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6490 "cfnegs$pack $FRj,$FRk,$CCi,$cond"
6491 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_1 FRk)
6492 (if (eq CCi (or cond 2))
6493 (set FRk (neg FRj)))
ac7c07ac 6494 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
9aab5aa3
AC		 6495)
6496
6497(define-pmacro (float-abs name src targ op ope attr comment)
6498 (dni name
6499 (comment)
0457efce 6500 (.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
9aab5aa3
AC		 6501 (.str name "$pack $" src ",$" targ )
6502 (+ pack targ op (rs-null) ope src)
6503 (set targ (abs src))
ac7c07ac 6504 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
9aab5aa3
AC		 6505 )
6506)
6507
ac7c07ac 6508(float-abs fabss FRj FRk OP_79 OPE1_04 ((FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv)) "Float absolute value, single")
0457efce 6509(float-abs fabsd FRdoublej FRdoublek OP_7A OPE1_04 ((MACH frv)) "Float absolute value, double")
9aab5aa3
AC		 6510
6511(dni fdabss
6512 "Floating point dual absolute value, single"
8caa9169 6513 ((MACH frv) (UNIT FMALL) (FR500-MAJOR F-1))
9aab5aa3
AC		 6514 "fdabss$pack $FRj,$FRk"
6515 (+ pack FRk OP_79 (rs-null) OPE1_14 FRj)
6516 (sequence ()
6517 (set FRk (abs FRj))
6518 (set (nextreg h-fr FRk 1) (abs (nextreg h-fr FRj 1))))
6519 ((fr500 (unit u-float-dual-arith)))
6520)
6521
6522(dni cfabss
6523 "Conditional floating point absolute value, single"
ac7c07ac 6524 ((UNIT FMALL) (FR500-MAJOR F-1) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6525 "cfabss$pack $FRj,$FRk,$CCi,$cond"
6526 (+ pack FRj OP_6C (rs-null) CCi cond OPE4_2 FRk)
6527 (if (eq CCi (or cond 2))
6528 (set FRk (abs FRj)))
ac7c07ac 6529 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
9aab5aa3
AC		 6530)
6531
6532(dni fsqrts
6533 "Square root single"
ac7c07ac 6534 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6535 "fsqrts$pack $FRj,$FRk"
6536 (+ pack FRk OP_79 (rs-null) OPE1_05 FRj)
6537 (set FRk (sqrt SF FRj))
ac7c07ac 6538 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
9aab5aa3
AC		 6539)
6540
6541(dni fdsqrts
6542 "Dual square root single"
6543 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4))
6544 "fdsqrts$pack $FRj,$FRk"
6545 (+ pack FRk OP_79 (rs-null) OPE1_15 FRj)
6546 (sequence ()
6547 (set FRk (sqrt SF FRj))
6548 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
6549 ((fr500 (unit u-float-dual-sqrt)))
6550)
6551
6552(dni nfdsqrts
6553 "Non excepting Dual square root single"
6554 ((MACH frv) (UNIT FM01) (FR500-MAJOR F-4) NON-EXCEPTING)
6555 "nfdsqrts$pack $FRj,$FRk"
6556 (+ pack FRk OP_79 (rs-null) OPE1_35 FRj)
6557 (sequence ()
6558 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6559 (set FRk (sqrt SF FRj))
6560 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
6561 (set (nextreg h-fr FRk 1) (sqrt (nextreg h-fr FRj 1))))
6562 ((fr500 (unit u-float-dual-sqrt)))
6563)
6564
6565(dni fsqrtd
6566 "Square root double"
6567 ((UNIT FM01) (FR500-MAJOR F-4) (MACH frv))
6568 "fsqrtd$pack $FRdoublej,$FRdoublek"
6569 (+ pack FRdoublek OP_7A (rs-null) OPE1_05 FRdoublej)
6570 (set FRdoublek (sqrt DF FRdoublej))
6571 ((fr500 (unit u-float-sqrt)))
6572)
6573
6574(dni cfsqrts
6575 "Conditional square root single"
ac7c07ac 6576 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6577 "cfsqrts$pack $FRj,$FRk,$CCi,$cond"
6578 (+ pack FRk OP_6E (rs-null) CCi cond OPE4_2 FRj)
6579 (if (eq CCi (or cond 2))
6580 (set FRk (sqrt SF FRj)))
ac7c07ac 6581 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
9aab5aa3
AC		 6582)
6583
6584(dni nfsqrts
6585 "Non exception square root, single"
ac7c07ac 6586 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6587 "nfsqrts$pack $FRj,$FRk"
6588 (+ pack FRk OP_79 (rs-null) OPE1_25 FRj)
6589 (sequence ()
6590 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6591 (set FRk (sqrt SF FRj)))
ac7c07ac 6592 ((fr500 (unit u-float-sqrt)) (fr550 (unit u-float-sqrt)))
9aab5aa3
AC		 6593)
6594
0457efce 6595(define-pmacro (float-binary-op-s name pipe attr operation op ope comment)
9aab5aa3
AC		 6596 (dni name
6597 (comment)
ac7c07ac 6598 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv) (.unsplice attr))
9aab5aa3
AC		 6599 (.str name "$pack $FRi,$FRj,$FRk")
6600 (+ pack FRk op FRi ope FRj)
6601 (set FRk (operation FRi FRj))
ac7c07ac 6602 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
9aab5aa3
AC		 6603 )
6604)
6605
ac7c07ac
DB		 6606(float-binary-op-s fadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_06 "add single float")
6607(float-binary-op-s fsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_07 "sub single float")
6608(float-binary-op-s fmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_08 "mul single float")
9aab5aa3
AC		 6609
6610(dni fdivs
6611 "div single float"
ac7c07ac 6612 ((UNIT FM01) (FR500-MAJOR F-4) (FR550-MAJOR F-3) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6613 "fdivs$pack $FRi,$FRj,$FRk"
6614 (+ pack FRk OP_79 FRi OPE1_09 FRj)
6615 (set FRk (div FRi FRj))
ac7c07ac
DB		 6616 ((fr500 (unit u-float-div))
6617 (fr550 (unit u-float-div)))
9aab5aa3
AC		 6618)
6619
6620(define-pmacro (float-binary-op-d name operation op ope major comment)
6621 (dni name
6622 (comment)
8caa9169 6623 ((UNIT FMALL) (FR500-MAJOR major) (MACH frv))
9aab5aa3
AC		 6624 (.str name "$pack $FRdoublei,$FRdoublej,$FRdoublek")
6625 (+ pack FRdoublek op FRdoublei ope FRdoublej)
6626 (set FRdoublek (operation FRdoublei FRdoublej))
6627 ((fr500 (unit u-float-arith)))
6628 )
6629)
6630
6631(float-binary-op-d faddd add OP_7A OPE1_06 F-2 "add double float")
6632(float-binary-op-d fsubd sub OP_7A OPE1_07 F-2 "sub double float")
6633(float-binary-op-d fmuld mul OP_7A OPE1_08 F-3 "mul double float")
6634(float-binary-op-d fdivd div OP_7A OPE1_09 F-4 "div double float")
6635
d0312406 6636(define-pmacro (conditional-float-binary-op name pipe attr operation op ope profile comment)
9aab5aa3
AC		 6637 (dni name
6638 (comment)
ac7c07ac 6639 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
0457efce 6640 (.unsplice attr))
9aab5aa3
AC		 6641 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
6642 (+ pack FRk op FRi CCi cond ope FRj)
6643 (if (eq CCi (or cond 2))
6644 (set FRk (operation FRi FRj)))
d0312406 6645 profile
9aab5aa3
AC		 6646 )
6647)
6648
ac7c07ac
DB		 6649(conditional-float-binary-op cfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_6D OPE4_0
6650 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6651 "cond add single")
ac7c07ac
DB		 6652(conditional-float-binary-op cfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_6D OPE4_1
6653 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6654 "cond sub single")
ac7c07ac
DB		 6655(conditional-float-binary-op cfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_6E OPE4_0
6656 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6657 "cond mul single")
ac7c07ac
DB		 6658(conditional-float-binary-op cfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_6E OPE4_1
6659 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
d0312406 6660 "cond div single")
9aab5aa3 6661
d0312406 6662(define-pmacro (ne-float-binary-op name pipe attr operation op ope profile comment)
9aab5aa3
AC		 6663 (dni name
6664 (comment)
ac7c07ac 6665 (.splice (UNIT pipe) (MACH simple,tomcat,fr500,fr550,frv)
0457efce 6666 (.unsplice attr))
9aab5aa3
AC		 6667 (.str name "$pack $FRi,$FRj,$FRk")
6668 (+ pack FRk op FRi ope FRj)
6669 (sequence ()
6670 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6671 (set FRk (operation FRi FRj)))
d0312406 6672 profile
9aab5aa3
AC		 6673 )
6674)
6675
ac7c07ac
DB		 6676(ne-float-binary-op nfadds FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) add OP_79 OPE1_26
6677 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6678 "ne add single")
ac7c07ac
DB		 6679(ne-float-binary-op nfsubs FMALL ((FR500-MAJOR F-2) (FR550-MAJOR F-2)) sub OP_79 OPE1_27
6680 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6681 "ne sub single")
ac7c07ac
DB		 6682(ne-float-binary-op nfmuls FM01 ((FR500-MAJOR F-3) (FR550-MAJOR F-3)) mul OP_79 OPE1_28
6683 ((fr500 (unit u-float-arith)) (fr550 (unit u-float-arith)))
d0312406 6684 "ne mul single")
ac7c07ac
DB		 6685(ne-float-binary-op nfdivs FM01 ((FR500-MAJOR F-4) (FR550-MAJOR F-3)) div OP_79 OPE1_29
6686 ((fr500 (unit u-float-div)) (fr550 (unit u-float-div)))
d0312406 6687 "ne div single")
9aab5aa3
AC		 6688
6689(define-pmacro (fcc-eq) 8)
6690(define-pmacro (fcc-lt) 4)
6691(define-pmacro (fcc-gt) 2)
6692(define-pmacro (fcc-uo) 1)
6693
6694(define-pmacro (compare-and-set-fcc arg1 arg2 fcc)
6695 (if (gt arg1 arg2)
6696 (set fcc (fcc-gt))
6697 (if (eq arg1 arg2)
6698 (set fcc (fcc-eq))
6699 (if (lt arg1 arg2)
6700 (set fcc (fcc-lt))
6701 (set fcc (fcc-uo)))))
6702)
6703
6704(dni fcmps
6705 "compare single float"
ac7c07ac 6706 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6707 "fcmps$pack $FRi,$FRj,$FCCi_2"
6708 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_0A FRj)
6709 (compare-and-set-fcc FRi FRj FCCi_2)
ac7c07ac 6710 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
9aab5aa3
AC		 6711)
6712
6713(dni fcmpd
6714 "compare double float"
8caa9169 6715 ((UNIT FMALL) (FR500-MAJOR F-2) (MACH frv))
9aab5aa3
AC		 6716 "fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2"
6717 (+ pack (cond-null) FCCi_2 OP_7A FRdoublei OPE1_0A FRdoublej)
6718 (compare-and-set-fcc FRdoublei FRdoublej FCCi_2)
6719 ((fr500 (unit u-float-compare)))
6720)
6721
6722(dni cfcmps
6723 "Conditional compare single, float"
ac7c07ac 6724 ((UNIT FMALL) (FR500-MAJOR F-2) (FR550-MAJOR F-2) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6725 "cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond"
6726 (+ pack (cond-null) FCCi_2 OP_6D FRi CCi cond OPE4_2 FRj)
6727 (if (eq CCi (or cond 2))
6728 (compare-and-set-fcc FRi FRj FCCi_2))
ac7c07ac 6729 ((fr500 (unit u-float-compare)) (fr550 (unit u-float-compare)))
9aab5aa3
AC		 6730)
6731
6732(dni fdcmps
6733 "float dual compare single"
ac7c07ac 6734 ((UNIT FMALL) (FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6735 "fdcmps$pack $FRi,$FRj,$FCCi_2"
6736 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_1A FRj)
6737 (sequence ()
6738 (compare-and-set-fcc FRi FRj FCCi_2)
6739 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
6740 (nextreg h-fccr FCCi_2 1)))
ac7c07ac 6741 ((fr500 (unit u-float-dual-compare)) (fr550 (unit u-float-dual-compare)))
9aab5aa3
AC		 6742)
6743
6744(define-pmacro (float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
6745 (dni name
6746 (comment)
8caa9169 6747 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
9aab5aa3
AC		 6748 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6749 (+ pack targ op arg1 ope arg2)
6750 (set targ (add_sub (mul arg1 arg2) targ))
6751 ((fr500 (unit u-float-dual-arith)))
6752 )
6753)
6754
6755(float-mul-with-add fmadds add FRi FRj FRk OP_79 OPE1_0B "mul with add, single")
6756(float-mul-with-add fmsubs sub FRi FRj FRk OP_79 OPE1_0C "mul with sub, single")
6757
6758(float-mul-with-add fmaddd add FRdoublei FRdoublej FRdoublek OP_7A OPE1_0B "mul with add, double")
6759(float-mul-with-add fmsubd sub FRdoublei FRdoublej FRdoublek OP_7A OPE1_0C "mul with sub, double")
6760
6761(dni fdmadds
6762 "Float dual multiply with add"
8caa9169 6763 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
9aab5aa3
AC		 6764 "fdmadds$pack $FRi,$FRj,$FRk"
6765 (+ pack FRk OP_79 FRi OPE1_1B FRj)
6766 (sequence ()
6767 (set FRk (add (mul FRi FRj) FRk))
6768 (set (nextreg h-fr FRk 1)
6769 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
6770 (nextreg h-fr FRk 1))))
6771 ; TODO dual registers not referenced for profiling
6772 ((fr500 (unit u-float-dual-arith)))
6773)
6774
6775(dni nfdmadds
6776 "Non excepting float dual multiply with add"
8caa9169 6777 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv))
9aab5aa3
AC		 6778 "nfdmadds$pack $FRi,$FRj,$FRk"
6779 (+ pack FRk OP_79 FRi OPE1_3B FRj)
6780 (sequence ()
6781 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6782 (set FRk (add (mul FRi FRj) FRk))
6783 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
6784 (set (nextreg h-fr FRk 1)
6785 (add (mul (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))
6786 (nextreg h-fr FRk 1))))
6787 ; TODO dual registers not referenced for profiling
6788 ((fr500 (unit u-float-dual-arith)))
6789)
6790
6791(define-pmacro (conditional-float-mul-with-add
6792 name add_sub arg1 arg2 targ op ope comment)
6793 (dni name
6794 (comment)
8caa9169 6795 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) CONDITIONAL)
9aab5aa3
AC		 6796 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
6797 (+ pack FRk op FRi CCi cond ope FRj)
6798 (if (eq CCi (or cond 2))
6799 (set targ (add_sub (mul arg1 arg2) targ)))
6800 ((fr500 (unit u-float-dual-arith)))
6801 )
6802)
6803
6804(conditional-float-mul-with-add cfmadds add FRi FRj FRk OP_6F OPE4_0 "conditional mul with add, single")
6805(conditional-float-mul-with-add cfmsubs sub FRi FRj FRk OP_6F OPE4_1 "conditional mul with sub, single")
6806
6807(define-pmacro (ne-float-mul-with-add name add_sub arg1 arg2 targ op ope comment)
6808 (dni name
6809 (comment)
8caa9169 6810 ((UNIT FMALL) (FR500-MAJOR F-5) (MACH frv) NON-EXCEPTING)
9aab5aa3
AC		 6811 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6812 (+ pack targ op arg1 ope arg2)
6813 (sequence ()
6814 (c-call VOID "@cpu@_set_ne_index" (index-of targ))
6815 (set targ (add_sub (mul arg1 arg2) targ)))
6816 ((fr500 (unit u-float-dual-arith)))
6817 )
6818)
6819
6820(ne-float-mul-with-add nfmadds add FRi FRj FRk OP_79 OPE1_2B "non excepting mul with add, single")
6821(ne-float-mul-with-add nfmsubs sub FRi FRj FRk OP_79 OPE1_2C "non excepting mul with sub, single")
6822
6823(define-pmacro (float-parallel-mul-add-semantics cond add_sub arg1 arg2 targ)
6824 (if cond
6825 (sequence ()
6826 (set targ (mul arg1 arg2))
6827 (set (nextreg h-fr targ 1)
6828 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))))
6829)
6830
6831(define-pmacro (float-parallel-mul-add
6832 name add_sub arg1 arg2 targ op ope comment)
6833 (dni name
6834 (comment)
ac7c07ac 6835 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6836 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6837 (+ pack targ op arg1 ope arg2)
6838 (float-parallel-mul-add-semantics 1 add_sub arg1 arg2 targ)
ac7c07ac 6839 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 6840 )
6841)
6842
6843(float-parallel-mul-add fmas add FRi FRj FRk OP_79 OPE1_0E "parallel mul/add, single")
6844(float-parallel-mul-add fmss sub FRi FRj FRk OP_79 OPE1_0F "parallel mul/sub, single")
6845
6846(define-pmacro (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
6847 (sequence ()
6848 (set targ (mul arg1 arg2))
6849 (set (nextreg h-fr targ 1)
6850 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
6851 (set (nextreg h-fr targ 2)
6852 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2)))
6853 (set (nextreg h-fr targ 3)
6854 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
6855)
6856
6857(define-pmacro (float-dual-parallel-mul-add
6858 name add_sub arg1 arg2 targ op ope comment)
6859 (dni name
6860 (comment)
6861 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
6862 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6863 (+ pack targ op arg1 ope arg2)
6864 (float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
6865 ()
6866 )
6867)
6868
6869(float-dual-parallel-mul-add fdmas add FRi FRj FRk OP_79 OPE1_1C "dual parallel mul/add, single")
6870(float-dual-parallel-mul-add fdmss sub FRi FRj FRk OP_79 OPE1_1D "dual parallel mul/sub, single")
6871
6872(define-pmacro (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
6873 (sequence ()
6874 (c-call VOID "@cpu@_set_ne_index" (index-of targ))
6875 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
6876 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 2))
6877 (c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 3))
6878 (set targ (mul arg1 arg2))
6879 (set (nextreg h-fr targ 1)
6880 (add_sub (nextreg h-fr arg1 1) (nextreg h-fr arg2 1)))
6881 (set (nextreg h-fr targ 2)
6882 (mul (nextreg h-fr arg1 2) (nextreg h-fr arg2 2)))
6883 (set (nextreg h-fr targ 3)
6884 (add_sub (nextreg h-fr arg1 3) (nextreg h-fr arg2 3))))
6885)
6886
6887(define-pmacro (ne-float-dual-parallel-mul-add
6888 name add_sub arg1 arg2 targ op ope comment)
6889 (dni name
6890 (comment)
6891 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
6892 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6893 (+ pack targ op arg1 ope arg2)
6894 (ne-float-dual-parallel-mul-add-semantics add_sub arg1 arg2 targ)
6895 ()
6896 )
6897)
6898
6899(ne-float-dual-parallel-mul-add nfdmas add FRi FRj FRk OP_79 OPE1_3C "non excepting dual parallel mul/add, single")
6900(ne-float-dual-parallel-mul-add nfdmss sub FRi FRj FRk OP_79 OPE1_3D "non excepting dual parallel mul/sub, single")
6901
6902(define-pmacro (conditional-float-parallel-mul-add name add_sub op ope comment)
6903 (dni name
6904 (comment)
ac7c07ac 6905 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) CONDITIONAL (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6906 (.str name "$pack $FRi,$FRj,$FRk,$CCi,$cond")
6907 (+ pack FRk op FRi CCi cond ope FRj)
6908 (float-parallel-mul-add-semantics (eq CCi (or cond 2))
6909 add_sub FRi FRj FRk)
ac7c07ac 6910 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 6911 )
6912)
6913
6914(conditional-float-parallel-mul-add cfmas add OP_6F OPE4_2 "conditional parallel mul/add, single")
6915(conditional-float-parallel-mul-add cfmss sub OP_6F OPE4_3 "conditional parallel mul/sub, single")
6916
6917(define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
6918 (sequence ()
6919 (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2))))
6920 (set (nextreg h-fr targ 1)
6921 (ftrunc SF (add_sub DF
6922 (fext DF (nextreg h-fr arg1 1))
6923 (fext DF (nextreg h-fr arg2 1))))))
6924)
6925
6926(define-pmacro (float-parallel-mul-add-double
6927 name add_sub arg1 arg2 targ op ope comment)
6928 (dni name
6929 (comment)
6930 ((UNIT FM01) (FR500-MAJOR F-5) (MACH frv))
6931 (.str name "$pack $" arg1 ",$" arg2 ",$" targ)
6932 (+ pack targ op arg1 ope arg2)
6933 (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
6934 ()
6935 )
6936)
6937
6938(float-parallel-mul-add-double fmad add FRi FRj FRk OP_7A OPE1_0E "parallel mul/add, double")
6939(float-parallel-mul-add-double fmsd sub FRi FRj FRk OP_7A OPE1_0F "parallel mul/sub, double")
6940
6941(define-pmacro (ne-float-parallel-mul-add name add_sub op ope comment)
6942 (dni name
6943 (comment)
ac7c07ac 6944 ((UNIT FM01) (FR500-MAJOR F-5) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6945 (.str name "$pack $FRi,$FRj,$FRk")
6946 (+ pack FRk op FRi ope FRj)
6947 (sequence ()
6948 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6949 (set FRk (mul FRi FRj))
6950 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
6951 (set (nextreg h-fr FRk 1)
6952 (add_sub (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
ac7c07ac 6953 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 6954 )
6955)
6956
6957(ne-float-parallel-mul-add nfmas add OP_79 OPE1_2E "ne parallel mul/add,single")
6958(ne-float-parallel-mul-add nfmss sub OP_79 OPE1_2F "ne parallel mul/sub,single")
6959
0457efce 6960(define-pmacro (float-dual-arith name attr oper1 oper2 op ope comment)
9aab5aa3
AC		 6961 (dni name
6962 (comment)
0457efce 6963 (.splice (UNIT FM01) (.unsplice attr))
9aab5aa3
AC		 6964 (.str name "$pack $FRi,$FRj,$FRk")
6965 (+ pack FRk op FRi ope FRj)
6966 (sequence ()
6967 (set FRk (oper1 FRi FRj))
6968 (set (nextreg h-fr FRk 1)
6969 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
ac7c07ac 6970 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 6971 )
6972)
6973
ac7c07ac
DB		 6974(float-dual-arith fdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_16 "dual add, single")
6975(float-dual-arith fdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_17 "dual sub, single")
6976(float-dual-arith fdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_18 "dual mul, single")
6977(float-dual-arith fddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_19 "dual div,single")
6978(float-dual-arith fdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_1E "dual add/sub, single")
9aab5aa3
AC		 6979
6980(dni fdmulcs
6981 "Float dual cross multiply single"
ac7c07ac 6982 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6983 "fdmulcs$pack $FRi,$FRj,$FRk"
6984 (+ pack FRk OP_79 FRi OPE1_1F FRj)
6985 (sequence ()
6986 (set FRk (mul FRi (nextreg h-fr FRj 1)))
6987 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
ac7c07ac 6988 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 6989)
6990
6991(dni nfdmulcs
6992 "NE float dual cross multiply single"
ac7c07ac 6993 ((UNIT FM01) (FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 6994 "nfdmulcs$pack $FRi,$FRj,$FRk"
6995 (+ pack FRk OP_79 FRi OPE1_3F FRj)
6996 (sequence ()
6997 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
6998 (set FRk (mul FRi (nextreg h-fr FRj 1)))
6999 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7000 (set (nextreg h-fr FRk 1) (mul (nextreg h-fr FRi 1) FRj)))
ac7c07ac 7001 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 7002)
7003
0457efce 7004(define-pmacro (ne-float-dual-arith name attr oper1 oper2 op ope comment)
9aab5aa3
AC		 7005 (dni name
7006 (comment)
0457efce 7007 (.splice (UNIT FM01) (.unsplice attr))
9aab5aa3
AC		 7008 (.str name "$pack $FRi,$FRj,$FRk")
7009 (+ pack FRk op FRi ope FRj)
7010 (sequence ()
7011 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7012 (set FRk (oper1 FRi FRj))
7013 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7014 (set (nextreg h-fr FRk 1)
7015 (oper2 (nextreg h-fr FRi 1) (nextreg h-fr FRj 1))))
ac7c07ac 7016 ((fr500 (unit u-float-dual-arith)) (fr550 (unit u-float-dual-arith)))
9aab5aa3
AC		 7017 )
7018)
7019
ac7c07ac
DB		 7020(ne-float-dual-arith nfdadds ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add add OP_79 OPE1_36 "ne dual add, single")
7021(ne-float-dual-arith nfdsubs ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) sub sub OP_79 OPE1_37 "ne dual sub, single")
7022(ne-float-dual-arith nfdmuls ((FR500-MAJOR F-7) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) mul mul OP_79 OPE1_38 "ne dual mul, single")
7023(ne-float-dual-arith nfddivs ((FR500-MAJOR F-7) (MACH frv)) div div OP_79 OPE1_39 "ne dual div,single")
7024(ne-float-dual-arith nfdsads ((FR500-MAJOR F-6) (FR550-MAJOR F-4) (MACH simple,tomcat,fr500,fr550,frv)) add sub OP_79 OPE1_3E "ne dual add/sub, single")
9aab5aa3
AC		 7025
7026(dni nfdcmps
7027 "non-excepting dual float compare"
7028 ((UNIT FM01) (FR500-MAJOR F-6) (MACH simple,tomcat,frv))
7029 "nfdcmps$pack $FRi,$FRj,$FCCi_2"
7030 (+ pack (cond-null) FCCi_2 OP_79 FRi OPE1_3A FRj)
7031 (sequence ()
7032 (c-call VOID "@cpu@_set_ne_index" (index-of FRk))
7033 (compare-and-set-fcc FRi FRj FCCi_2)
7034 (c-call VOID "@cpu@_set_ne_index" (add (index-of FRk) 1))
7035 (compare-and-set-fcc (nextreg h-fr FRi 1) (nextreg h-fr FRj 1)
7036 (nextreg h-fccr FCCi_2 1)))
7037 ((fr500 (unit u-float-dual-compare)))
7038)
7039
7040; Media Instructions
7041;
7042(define-pmacro (halfword hilo arg offset)
7043 (reg (.sym h-fr_ hilo) (add (index-of arg) offset)))
7044
7045(dni mhsetlos
7046 "Media set lower signed 12 bits"
ac7c07ac 7047 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1))
9aab5aa3
AC		 7048 "mhsetlos$pack $u12,$FRklo"
7049 (+ pack FRklo OP_78 OPE1_20 u12)
7050 (set FRklo u12)
ac7c07ac 7051 ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk FRklo))))
9aab5aa3
AC		 7052)
7053
7054(dni mhsethis
7055 "Media set upper signed 12 bits"
ac7c07ac 7056 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1))
9aab5aa3
AC		 7057 "mhsethis$pack $u12,$FRkhi"
7058 (+ pack FRkhi OP_78 OPE1_22 u12)
7059 (set FRkhi u12)
ac7c07ac 7060 ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk FRkhi))))
9aab5aa3
AC		 7061)
7062
7063(dni mhdsets
7064 "Media dual set halfword signed 12 bits"
ac7c07ac 7065 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1))
9aab5aa3
AC		 7066 "mhdsets$pack $u12,$FRintk"
7067 (+ pack FRintk OP_78 OPE1_24 u12)
7068 (sequence ()
7069 ; hack to get FRintk passed to modelling functions
7070 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7071 (set (halfword hi FRintk 0) u12)
7072 (set (halfword lo FRintk 0) u12))
ac7c07ac 7073 ((fr400 (unit u-media-1)) (fr550 (unit u-media-set)))
9aab5aa3
AC		 7074)
7075
7076(define-pmacro (set-5-semantics target value)
7077 (sequence ((HI tmp))
7078 (set tmp target)
7079 (set tmp (and tmp #x07ff))
7080 (set tmp (or tmp (sll (and s5 #x1f) 11)))
7081 (set target tmp))
7082)
7083
7084(define-pmacro (media-set-5 name hilo op ope comment)
7085 (dni name
7086 (comment)
ac7c07ac 7087 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1))
9aab5aa3
AC		 7088 (.str name "$pack $s5,$FRk" hilo)
7089 (+ pack (.sym FRk hilo) op (FRi-null) ope (misc-null-11) s5)
7090 (set-5-semantics (.sym FRk hilo) s5)
ac7c07ac 7091 ((fr400 (unit u-media-hilo)) (fr550 (unit u-media-set (out FRintk (.sym FRk hilo)))))
9aab5aa3
AC		 7092 )
7093)
7094
7095(media-set-5 mhsetloh lo OP_78 OPE1_21 "Media set upper 5 bits lo")
7096(media-set-5 mhsethih hi OP_78 OPE1_23 "Media set upper 5 bits hi")
7097
7098(dni mhdseth
7099 "Media dual set halfword upper 5 bits"
ac7c07ac 7100 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-5) (FR400-MAJOR M-1))
9aab5aa3
AC		 7101 "mhdseth$pack $s5,$FRintk"
7102 (+ pack FRintk OP_78 (FRi-null) OPE1_25 (misc-null-11) s5)
7103 (sequence ()
7104 ; hack to get FRintk passed to modelling functions
7105 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7106 (set-5-semantics (halfword hi FRintk 0) s5)
7107 (set-5-semantics (halfword lo FRintk 0) s5))
ac7c07ac 7108 ((fr400 (unit u-media-1)) (fr550 (unit u-media-set)))
9aab5aa3
AC		 7109)
7110
7111(define-pmacro (media-logic-r-r name operation op ope comment)
7112 (dni name
7113 (comment)
ac7c07ac 7114 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7115 (.str name "$pack $FRinti,$FRintj,$FRintk")
7116 (+ pack FRintk op FRinti ope FRintj)
7117 (set FRintk (operation FRinti FRintj))
7118 ((fr400 (unit u-media-1))
ac7c07ac 7119 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7120 )
7121)
7122
7123(media-logic-r-r mand and OP_7B OPE1_00 "and reg/reg")
7124(media-logic-r-r mor or OP_7B OPE1_01 "or reg/reg")
7125(media-logic-r-r mxor xor OP_7B OPE1_02 "xor reg/reg")
7126
7127(define-pmacro (conditional-media-logic name operation op ope comment)
7128 (dni name
7129 (comment)
ac7c07ac 7130 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 7131 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
7132 (+ pack FRintk op FRinti CCi cond ope FRintj)
7133 (if (eq CCi (or cond 2))
7134 (set FRintk (operation FRinti FRintj)))
7135 ((fr400 (unit u-media-1))
ac7c07ac 7136 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7137 )
7138)
7139
7140(conditional-media-logic cmand and OP_70 OPE4_0 "conditional and reg/reg")
7141(conditional-media-logic cmor or OP_70 OPE4_1 "conditional or reg/reg")
7142(conditional-media-logic cmxor xor OP_70 OPE4_2 "conditional xor reg/reg")
7143
7144(dni mnot
7145 ("mnot")
ac7c07ac 7146 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7147 ("mnot$pack $FRintj,$FRintk")
7148 (+ pack FRintk OP_7B (rs-null) OPE1_03 FRintj)
7149 (set FRintk (inv FRintj))
7150 ((fr400 (unit u-media-1))
ac7c07ac 7151 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7152)
7153
7154(dni cmnot
7155 ("cmnot")
ac7c07ac 7156 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 7157 ("cmnot$pack $FRintj,$FRintk,$CCi,$cond")
7158 (+ pack FRintk OP_70 (rs-null) CCi cond OPE4_3 FRintj)
7159 (if (eq CCi (or cond 2))
7160 (set FRintk (inv FRintj)))
7161 ((fr400 (unit u-media-1))
ac7c07ac 7162 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7163)
7164
7165(define-pmacro (media-rotate-r-r name operation op ope comment)
7166 (dni name
7167 (comment)
ac7c07ac 7168 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 7169 (.str name "$pack $FRinti,$u6,$FRintk")
7170 (+ pack FRintk op FRinti ope u6)
7171 (set FRintk (operation FRinti (and u6 #x1f)))
7172 ((fr400 (unit u-media-3))
ac7c07ac 7173 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7174 )
7175)
7176
7177(media-rotate-r-r mrotli rol OP_7B OPE1_04 "rotate left reg/reg")
7178(media-rotate-r-r mrotri ror OP_7B OPE1_05 "rotate right reg/reg")
7179
7180(define-pmacro (media-cut-r-r name arg op ope comment)
7181 (dni name
7182 (comment)
ac7c07ac 7183 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
9aab5aa3
AC		 7184 (.str name "$pack $FRinti,$" arg ",$FRintk")
7185 (+ pack FRintk op FRinti ope arg)
7186 (set FRintk (c-call SI "@cpu@_cut" FRinti (nextreg h-fr_int FRinti 1) arg))
7187 ((fr400 (unit u-media-3))
ac7c07ac 7188 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7189 )
7190)
7191
7192(media-cut-r-r mwcut FRintj OP_7B OPE1_06 "media cut")
7193(media-cut-r-r mwcuti u6 OP_7B OPE1_07 "media cut")
7194
7195(define-pmacro (media-cut-acc name arg op ope comment)
7196 (dni name
7197 (comment)
ac7c07ac 7198 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 7199 (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7200 (+ pack FRintk op ACC40Si ope arg)
7201 (set FRintk (c-call SI "@cpu@_media_cut" ACC40Si arg))
7202 ((fr400 (unit u-media-4))
ac7c07ac 7203 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
9aab5aa3
AC		 7204 )
7205)
7206
7207(media-cut-acc mcut FRintj OP_7B OPE1_2C "media accumulator cut reg")
7208(media-cut-acc mcuti s6 OP_7B OPE1_2E "media accumulator cut immed")
7209
7210(define-pmacro (media-cut-acc-ss name arg op ope comment)
7211 (dni name
7212 (comment)
ac7c07ac 7213 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 7214 (.str name "$pack $ACC40Si,$" arg ",$FRintk")
7215 (+ pack FRintk op ACC40Si ope arg)
7216 (set FRintk (c-call SI "@cpu@_media_cut_ss" ACC40Si arg))
7217 ((fr400 (unit u-media-4))
ac7c07ac 7218 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
9aab5aa3
AC		 7219 )
7220)
7221
7222(media-cut-acc-ss mcutss FRintj OP_7B OPE1_2D "media accumulator cut reg with saturation")
7223(media-cut-acc-ss mcutssi s6 OP_7B OPE1_2F "media accumulator cut immed with saturation")
7224
7225; Dual Media Instructions
7226;
7227(define-pmacro (register-unaligned register alignment)
7228 (and (index-of register) (sub alignment 1))
7229)
7230
7231(dni mdcutssi
7232 "Media dual cut with signed saturation"
ac7c07ac 7233 ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 7234 "mdcutssi$pack $ACC40Si,$s6,$FRintkeven"
7235 (+ pack FRintkeven OP_78 ACC40Si OPE1_0E s6)
9aab5aa3
AC		 7236 (if (register-unaligned ACC40Si 2)
7237 (c-call VOID "@cpu@_media_acc_not_aligned")
36c3ae24 7238 (if (register-unaligned FRintkeven 2)
9aab5aa3
AC		 7239 (c-call VOID "@cpu@_media_register_not_aligned")
7240 (sequence ()
36c3ae24
NC		 7241 (set FRintkeven (c-call SI "@cpu@_media_cut_ss" ACC40Si s6))
7242 (set (nextreg h-fr_int FRintkeven 1)
9aab5aa3
AC		 7243 (c-call SI "@cpu@_media_cut_ss"
7244 (nextreg h-acc40S ACC40Si 1) s6)))))
36c3ae24 7245 ((fr400 (unit u-media-4-acc-dual
ac7c07ac 7246 (out FRintk FRintkeven))) (fr550 (unit u-media-3-acc-dual)))
9aab5aa3
AC		 7247)
7248
7249; The (add (xxxx) (mul arg 0)) is a hack to get a reference to arg generated
7250; so it will be passed to the unit modelers. YUCK!!!!!
7251(define-pmacro (extract-hilo reg1 off1 reg2 off2 arg1hi arg1lo arg2hi arg2lo)
7252 (sequence ()
7253 (set arg1hi (add (halfword hi reg1 off1) (mul reg1 0)))
7254 (set arg1lo (add (halfword lo reg1 off1) (mul reg1 0)))
7255 (set arg2hi (add (halfword hi reg2 off2) (mul reg2 0)))
7256 (set arg2lo (add (halfword lo reg2 off2) (mul reg2 0))))
7257)
7258
7259(dni maveh
7260 "Media dual average"
ac7c07ac 7261 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7262 "maveh$pack $FRinti,$FRintj,$FRintk"
7263 (+ pack FRintk OP_7B FRinti OPE1_08 FRintj)
7264 (set FRintk (c-call SI "@cpu@_media_average" FRinti FRintj))
7265 ((fr400 (unit u-media-1))
ac7c07ac 7266 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7267)
7268
7269(define-pmacro (media-dual-shift name operation op ope profile comment)
7270 (dni name
7271 (comment)
ac7c07ac 7272 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 7273 (.str name "$pack $FRinti,$u6,$FRintk")
7274 (+ pack FRintk op FRinti ope u6)
7275 (sequence ()
7276 ; hack to get these referenced for profiling
7277 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
7278 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7279 (set (halfword hi FRintk 0)
7280 (operation (halfword hi FRinti 0) (and u6 #xf)))
7281 (set (halfword lo FRintk 0)
7282 (operation (halfword lo FRinti 0) (and u6 #xf))))
7283 profile
7284 )
7285)
7286
7287(media-dual-shift msllhi sll OP_7B OPE1_09
ac7c07ac 7288 ((fr400 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7289 "Media dual shift left logical")
7290(media-dual-shift msrlhi srl OP_7B OPE1_0A
ac7c07ac 7291 ((fr400 (unit u-media-3)) (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7292 "Media dual shift right logical")
7293(media-dual-shift msrahi sra OP_7B OPE1_0B
ac7c07ac 7294 ((fr400 (unit u-media-6)) (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7295 "Media dual shift right arithmetic")
7296
7297(define-pmacro (media-dual-word-rotate-r-r name operation op ope comment)
7298 (dni name
7299 (comment)
ac7c07ac 7300 ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 7301 (.str name "$pack $FRintieven,$s6,$FRintkeven")
7302 (+ pack FRintkeven op FRintieven ope s6)
7303 (if (orif (register-unaligned FRintieven 2)
7304 (register-unaligned FRintkeven 2))
9aab5aa3
AC		 7305 (c-call VOID "@cpu@_media_register_not_aligned")
7306 (sequence ()
36c3ae24
NC		 7307 (set FRintkeven (operation FRintieven (and s6 #x1f)))
7308 (set (nextreg h-fr_int FRintkeven 1)
7309 (operation (nextreg h-fr_int FRintieven 1)
75798298 7310 (and s6 #x1f)))))
36c3ae24
NC		 7311 ((fr400 (unit u-media-3-quad
7312 (in FRinti FRintieven)
ac7c07ac 7313 (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
9aab5aa3
AC		 7314 )
7315)
7316
7317(media-dual-word-rotate-r-r mdrotli rol OP_78 OPE1_0B "rotate left reg/reg")
7318
7319(dni mcplhi
ac7c07ac
DB		 7320 "Media bit concatenate, halfword"
7321 ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
9aab5aa3
AC		 7322 "mcplhi$pack $FRinti,$u6,$FRintk"
7323 (+ pack FRintk OP_78 FRinti OPE1_0C u6)
7324 (sequence ((HI arg1) (HI arg2) (HI shift))
7325 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
7326 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7327 (set shift (and u6 #xf))
7328 (set arg1 (sll (halfword hi FRinti 0) shift))
7329 (if (ne shift 0)
7330 (sequence ()
7331 (set arg2 (halfword hi FRinti 1))
7332 (set arg2 (srl HI (sll HI arg2 (sub 15 shift))
7333 (sub 15 shift)))
7334 (set arg1 (or HI arg1 arg2))))
7335 (set (halfword hi FRintk 0) arg1))
ac7c07ac 7336 ((fr400 (unit u-media-3-dual)) (fr550 (unit u-media-3-dual)))
9aab5aa3
AC		 7337)
7338
7339(dni mcpli
ac7c07ac
DB		 7340 "Media bit concatenate, word"
7341 ((UNIT FMLOW) (MACH fr400,fr550) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
9aab5aa3
AC		 7342 "mcpli$pack $FRinti,$u6,$FRintk"
7343 (+ pack FRintk OP_78 FRinti OPE1_0D u6)
7344 (sequence ((SI tmp) (SI shift))
7345 (set shift (and u6 #x1f))
7346 (set tmp (sll FRinti shift))
7347 (if (ne shift 0)
7348 (sequence ((SI tmp1))
7349 (set tmp1 (srl (sll (nextreg h-fr_int FRinti 1)
7350 (sub 31 shift))
7351 (sub 31 shift)))
7352 (set tmp (or tmp tmp1))))
7353 (set FRintk tmp))
ac7c07ac 7354 ((fr400 (unit u-media-3-dual)) (fr550 (unit u-media-3-dual)))
9aab5aa3
AC		 7355)
7356
7357(define-pmacro (saturate arg max min result)
7358 (if (gt arg max)
7359 (set result max)
7360 (if (lt arg min)
7361 (set result min)
7362 (set result arg)))
7363)
7364
7365(dni msaths
7366 "Media dual saturation signed"
ac7c07ac 7367 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7368 "msaths$pack $FRinti,$FRintj,$FRintk"
7369 (+ pack FRintk OP_7B FRinti OPE1_0C FRintj)
7370 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
7371 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
7372 (saturate argihi argjhi (inv argjhi) (halfword hi FRintk 0))
7373 (saturate argilo argjlo (inv argjlo) (halfword lo FRintk 0)))
7374 ((fr400 (unit u-media-1))
ac7c07ac 7375 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7376)
7377
7378(dni mqsaths
7379 "Media quad saturation signed"
c7a48b9a 7380 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-2))
36c3ae24
NC		 7381 "mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven"
7382 (+ pack FRintkeven OP_78 FRintieven OPE1_0F FRintjeven)
7383 (if (orif (register-unaligned FRintieven 2)
7384 (orif (register-unaligned FRintjeven 2)
7385 (register-unaligned FRintkeven 2)))
9aab5aa3
AC		 7386 (c-call VOID "@cpu@_media_register_not_aligned")
7387 (sequence ((HI argihi) (HI argilo) (HI argjhi) (HI argjlo))
36c3ae24
NC		 7388 ; hack to get FRintkeven referenced as a target for profiling
7389 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
7390 (extract-hilo FRintieven 0 FRintjeven 0 argihi argilo argjhi argjlo)
7391 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 0))
7392 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 0))
7393 (extract-hilo FRintieven 1 FRintjeven 1 argihi argilo argjhi argjlo)
7394 (saturate argihi argjhi (inv argjhi) (halfword hi FRintkeven 1))
7395 (saturate argilo argjlo (inv argjlo) (halfword lo FRintkeven 1))))
7396 ((fr400 (unit u-media-1-quad
7397 (in FRinti FRintieven)
7398 (in FRintj FRintjeven)
ac7c07ac 7399 (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
9aab5aa3
AC		 7400)
7401
7402(define-pmacro (saturate-unsigned arg max result)
7403 (if (gt arg max)
7404 (set result max)
7405 (set result arg))
7406)
7407
7408(dni msathu
7409 "Media dual saturation unsigned"
ac7c07ac 7410 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7411 "msathu$pack $FRinti,$FRintj,$FRintk"
7412 (+ pack FRintk OP_7B FRinti OPE1_0D FRintj)
7413 (sequence ((UHI argihi) (UHI argilo) (UHI argjhi) (UHI argjlo))
7414 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
7415 (saturate-unsigned argihi argjhi (halfword hi FRintk 0))
7416 (saturate-unsigned argilo argjlo (halfword lo FRintk 0)))
7417 ((fr400 (unit u-media-1))
ac7c07ac 7418 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7419)
7420
7421(define-pmacro (media-dual-compare name mode op ope comment)
7422 (dni name
7423 (comment)
ac7c07ac 7424 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7425 (.str name "$pack $FRinti,$FRintj,$FCCk")
7426 (+ pack (cond-null) FCCk op FRinti ope FRintj)
7427 (if (register-unaligned FCCk 2)
7428 (c-call VOID "@cpu@_media_cr_not_aligned")
7429 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
7430 (extract-hilo FRinti 0 FRintj 0
7431 argihi argilo argjhi argjlo)
7432 (compare-and-set-fcc argihi argjhi FCCk)
7433 (compare-and-set-fcc argilo argjlo (nextreg h-fccr FCCk 1))))
7434 ; TODO - doesn't handle second FCC
7435 ((fr400 (unit u-media-7))
ac7c07ac 7436 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7437 )
7438)
7439
7440(media-dual-compare mcmpsh HI OP_7B OPE1_0E "Media dual compare signed")
7441(media-dual-compare mcmpuh UHI OP_7B OPE1_0F "Media dual compare unsigned")
7442
7443; Bits for the MSR.SIE field
7444(define-pmacro (msr-sie-nil) 0)
7445(define-pmacro (msr-sie-fri-hi) 8)
7446(define-pmacro (msr-sie-fri-lo) 4)
7447(define-pmacro (msr-sie-fri-1-hi) 2)
7448(define-pmacro (msr-sie-fri-1-lo) 1)
7449(define-pmacro (msr-sie-acci) 8)
7450(define-pmacro (msr-sie-acci-1) 4)
7451(define-pmacro (msr-sie-acci-2) 2)
7452(define-pmacro (msr-sie-acci-3) 1)
7453
7454(define-pmacro (saturate-v arg max min sie result)
7455 (if (gt DI arg max)
7456 (sequence ()
7457 (set result max)
7458 (c-call VOID "@cpu@_media_overflow" sie))
7459 (if (lt DI arg min)
7460 (sequence ()
7461 (set result min)
7462 (c-call VOID "@cpu@_media_overflow" sie))
7463 (set result arg)))
7464)
7465
7466(dni mabshs
7467 "Media dual absolute value, halfword"
ac7c07ac 7468 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7469 "mabshs$pack $FRintj,$FRintk"
7470 (+ pack FRintk OP_78 (FRi-null) OPE1_0A FRintj)
7471 (sequence ((HI arghi) (HI arglo))
7472 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
7473 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
7474 (set arghi (halfword hi FRintj 0))
7475 (set arglo (halfword lo FRintj 0))
7476 (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi)
7477 (halfword hi FRintk 0))
7478 (saturate-v (abs arglo) 32767 -32768 (msr-sie-fri-lo)
7479 (halfword lo FRintk 0)))
ac7c07ac 7480 ((fr400 (unit u-media-1)) (fr550 (unit u-media)))
9aab5aa3
AC		 7481)
7482
7483(define-pmacro (media-arith-sat-semantics
7484 operation arg1 arg2 res mode max min sie)
7485 (sequence ((DI tmp))
7486 (set tmp (operation arg1 arg2))
7487 (saturate-v tmp max min sie res))
7488)
7489
7490(define-pmacro (media-dual-arith-sat-semantics operation mode max min)
7491 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
7492 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
7493 (media-arith-sat-semantics operation argihi argjhi
7494 (halfword hi FRintk 0) mode max min
7495 (msr-sie-fri-hi))
7496 (media-arith-sat-semantics operation argilo argjlo
7497 (halfword lo FRintk 0) mode max min
7498 (msr-sie-fri-lo)))
7499)
7500
7501(define-pmacro (media-dual-arith-sat name operation mode max min op ope comment)
7502 (dni name
7503 (comment)
ac7c07ac 7504 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1))
9aab5aa3
AC		 7505 (.str name "$pack $FRinti,$FRintj,$FRintk")
7506 (+ pack FRintk op FRinti ope FRintj)
7507 (media-dual-arith-sat-semantics operation mode max min)
7508 ((fr400 (unit u-media-1))
ac7c07ac 7509 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7510 )
7511)
7512
7513(media-dual-arith-sat maddhss add HI 32767 -32768 OP_7B OPE1_10 "Media dual add signed with saturation")
7514(media-dual-arith-sat maddhus add UHI 65535 0 OP_7B OPE1_11 "Media dual add unsigned with saturation")
7515
7516(media-dual-arith-sat msubhss sub HI 32767 -32768 OP_7B OPE1_12 "Media dual sub signed with saturation")
7517(media-dual-arith-sat msubhus sub UHI 65535 0 OP_7B OPE1_13 "Media dual sub unsigned with saturation")
7518
7519(define-pmacro (conditional-media-dual-arith-sat
7520 name operation mode max min op ope comment)
7521 (dni name
7522 (comment)
ac7c07ac 7523 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 7524 (.str name "$pack $FRinti,$FRintj,$FRintk,$CCi,$cond")
7525 (+ pack FRintk op FRinti CCi cond ope FRintj)
7526 (if (eq CCi (or cond 2))
7527 (media-dual-arith-sat-semantics operation mode max min))
7528 ((fr400 (unit u-media-1))
ac7c07ac 7529 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 7530 )
7531)
7532
7533(conditional-media-dual-arith-sat cmaddhss add HI 32767 -32768 OP_71 OPE4_0 "Conditional Media dual add signed with saturation")
7534(conditional-media-dual-arith-sat cmaddhus add UHI 65535 0 OP_71 OPE4_1 "Conditional Media dual add unsigned with saturation")
7535
7536(conditional-media-dual-arith-sat cmsubhss sub HI 32767 -32768 OP_71 OPE4_2 "Conditional Media dual sub signed with saturation")
7537(conditional-media-dual-arith-sat cmsubhus sub UHI 65535 0 OP_71 OPE4_3 "Conditional Media dual sub unsigned with saturation")
7538
7539(define-pmacro (media-quad-arith-sat-semantics cond operation mode max min)
36c3ae24
NC		 7540 (if (orif (register-unaligned FRintieven 2)
7541 (orif (register-unaligned FRintjeven 2)
7542 (register-unaligned FRintkeven 2)))
9aab5aa3
AC		 7543 (c-call VOID "@cpu@_media_register_not_aligned")
7544 (if cond
7545 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
36c3ae24
NC		 7546 ; hack to get FRintkeven referenced as a target for profiling
7547 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
7548 (extract-hilo FRintieven 0 FRintjeven 0
9aab5aa3
AC		 7549 argihi argilo argjhi argjlo)
7550 (media-arith-sat-semantics operation argihi argjhi
36c3ae24 7551 (halfword hi FRintkeven 0) mode
9aab5aa3
AC		 7552 max min (msr-sie-fri-hi))
7553 (media-arith-sat-semantics operation argilo argjlo
36c3ae24 7554 (halfword lo FRintkeven 0) mode
9aab5aa3 7555 max min (msr-sie-fri-lo))
36c3ae24 7556 (extract-hilo FRintieven 1 FRintjeven 1
9aab5aa3
AC		 7557 argihi argilo argjhi argjlo)
7558 (media-arith-sat-semantics operation argihi argjhi
36c3ae24 7559 (halfword hi FRintkeven 1) mode
9aab5aa3
AC		 7560 max min (msr-sie-fri-1-hi))
7561 (media-arith-sat-semantics operation argilo argjlo
36c3ae24 7562 (halfword lo FRintkeven 1) mode
9aab5aa3
AC		 7563 max min (msr-sie-fri-1-lo)))))
7564)
7565
7566(define-pmacro (media-quad-arith-sat name operation mode max min op ope comment)
7567 (dni name
7568 (comment)
ac7c07ac 7569 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-2))
36c3ae24
NC		 7570 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven")
7571 (+ pack FRintkeven op FRintieven ope FRintjeven)
9aab5aa3 7572 (media-quad-arith-sat-semantics 1 operation mode max min)
36c3ae24
NC		 7573 ((fr400 (unit u-media-1-quad
7574 (in FRinti FRintieven)
7575 (in FRintj FRintjeven)
741a7751 7576 (out FRintk FRintkeven)))
36c3ae24
NC		 7577 (fr500 (unit u-media-quad-arith
7578 (in FRinti FRintieven)
7579 (in FRintj FRintjeven)
ac7c07ac 7580 (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
9aab5aa3
AC		 7581 )
7582)
7583
7584(media-quad-arith-sat mqaddhss add HI 32767 -32768 OP_7B OPE1_18 "Media quad add signed with saturation")
7585(media-quad-arith-sat mqaddhus add UHI 65535 0 OP_7B OPE1_19 "Media quad add unsigned with saturation")
7586
7587(media-quad-arith-sat mqsubhss sub HI 32767 -32768 OP_7B OPE1_1A "Media quad sub signed with saturation")
7588(media-quad-arith-sat mqsubhus sub UHI 65535 0 OP_7B OPE1_1B "Media quad sub unsigned with saturation")
7589
7590(define-pmacro (conditional-media-quad-arith-sat
7591 name operation mode max min op ope comment)
7592 (dni name
7593 (comment)
ac7c07ac 7594 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-2) (FR400-MAJOR M-2) CONDITIONAL)
36c3ae24
NC		 7595 (.str name "$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond")
7596 (+ pack FRintkeven op FRintieven CCi cond ope FRintjeven)
9aab5aa3
AC		 7597 (media-quad-arith-sat-semantics (eq CCi (or cond 2))
7598 operation mode max min)
36c3ae24
NC		 7599 ((fr400 (unit u-media-1-quad
7600 (in FRinti FRintieven)
7601 (in FRintj FRintjeven)
741a7751 7602 (out FRintk FRintkeven)))
36c3ae24
NC		 7603 (fr500 (unit u-media-quad-arith
7604 (in FRinti FRintieven)
7605 (in FRintj FRintjeven)
ac7c07ac 7606 (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
9aab5aa3
AC		 7607 )
7608)
7609
7610(conditional-media-quad-arith-sat cmqaddhss add HI 32767 -32768 OP_73 OPE4_0 "Conditional Media quad add signed with saturation")
7611(conditional-media-quad-arith-sat cmqaddhus add UHI 65535 0 OP_73 OPE4_1 "Conditional Media quad add unsigned with saturation")
7612
7613(conditional-media-quad-arith-sat cmqsubhss sub HI 32767 -32768 OP_73 OPE4_2 "Conditional Media quad sub signed with saturation")
7614(conditional-media-quad-arith-sat cmqsubhus sub UHI 65535 0 OP_73 OPE4_3 "Conditional Media quad sub unsigned with saturation")
7615
7616(define-pmacro (media-acc-arith-sat name operation mode max min op ope comment)
7617 (dni name
7618 (comment)
ac7c07ac 7619 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-1))
9aab5aa3
AC		 7620 (.str name "$pack $ACC40Si,$ACC40Sk")
7621 (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
ac7c07ac
DB		 7622 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
7623 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7624 (if (register-unaligned ACC40Si 2)
7625 (c-call VOID "@cpu@_media_acc_not_aligned")
7626 (media-arith-sat-semantics operation ACC40Si
7627 (nextreg h-acc40S ACC40Si 1)
7628 ACC40Sk mode max min (msr-sie-acci)))))
7629 ((fr400 (unit u-media-2-acc)) (fr550 (unit u-media-4-acc)))
9aab5aa3
AC		 7630 )
7631)
7632
7633(media-acc-arith-sat maddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
7634 OP_78 OPE1_04 "Media accumulator addition")
7635(media-acc-arith-sat msubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
7636 OP_78 OPE1_05 "Media accumulator subtraction")
7637
7638(define-pmacro (media-dual-acc-arith-sat name operation mode max min op ope
7639 comment)
7640 (dni name
7641 (comment)
ac7c07ac 7642 ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
9aab5aa3
AC		 7643 (.str name "$pack $ACC40Si,$ACC40Sk")
7644 (+ pack ACC40Sk op ACC40Si ope (ACCj-null))
ac7c07ac
DB		 7645 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
7646 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7647 (if (register-unaligned ACC40Si 4)
7648 (c-call VOID "@cpu@_media_acc_not_aligned")
7649 (if (register-unaligned ACC40Sk 2)
7650 (c-call VOID "@cpu@_media_acc_not_aligned")
7651 (sequence ()
7652 (media-arith-sat-semantics operation ACC40Si
7653 (nextreg h-acc40S ACC40Si 1)
7654 ACC40Sk mode max min
7655 (msr-sie-acci))
7656 (media-arith-sat-semantics operation
7657 (nextreg h-acc40S ACC40Si 2)
7658 (nextreg h-acc40S ACC40Si 3)
7659 (nextreg h-acc40S ACC40Sk 1)
7660 mode max min
7661 (msr-sie-acci-1)))))))
7662 ((fr400 (unit u-media-2-acc-dual)) (fr550 (unit u-media-4-acc-dual)))
9aab5aa3
AC		 7663 )
7664)
7665
7666(media-dual-acc-arith-sat mdaddaccs add DI #x7fffffffff (inv DI #x7fffffffff)
7667 OP_78 OPE1_06 "Media accumulator addition")
7668(media-dual-acc-arith-sat mdsubaccs sub DI #x7fffffffff (inv DI #x7fffffffff)
7669 OP_78 OPE1_07 "Media accumulator subtraction")
7670
7671(dni masaccs
7672 "Media add and subtract signed accumulator with saturation"
ac7c07ac 7673 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-1))
9aab5aa3
AC		 7674 "masaccs$pack $ACC40Si,$ACC40Sk"
7675 (+ pack ACC40Sk OP_78 ACC40Si OPE1_08 (ACCj-null))
ac7c07ac
DB		 7676 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
7677 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7678 (if (register-unaligned ACC40Si 2)
7679 (c-call VOID "@cpu@_media_acc_not_aligned")
7680 (if (register-unaligned ACC40Sk 2)
7681 (c-call VOID "@cpu@_media_acc_not_aligned")
7682 (sequence ()
7683 (media-arith-sat-semantics add ACC40Si
7684 (nextreg h-acc40S ACC40Si 1)
7685 ACC40Sk DI
7686 #x7fffffffff
7687 (inv DI #x7fffffffff)
7688 (msr-sie-acci))
7689 (media-arith-sat-semantics sub ACC40Si
7690 (nextreg h-acc40S ACC40Si 1)
7691 (nextreg h-acc40S ACC40Sk 1)
7692 DI
7693 #x7fffffffff
7694 (inv DI #x7fffffffff)
7695 (msr-sie-acci-1)))))))
7696 ((fr400 (unit u-media-2-add-sub)) (fr550 (unit u-media-4-add-sub)))
9aab5aa3
AC		 7697 )
7698
7699(dni mdasaccs
7700 "Media add and subtract signed accumulator with saturation"
ac7c07ac 7701 ((UNIT MDUALACC) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
9aab5aa3
AC		 7702 "mdasaccs$pack $ACC40Si,$ACC40Sk"
7703 (+ pack ACC40Sk OP_78 ACC40Si OPE1_09 (ACCj-null))
ac7c07ac
DB		 7704 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Si))
7705 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7706 (if (register-unaligned ACC40Si 4)
7707 (c-call VOID "@cpu@_media_acc_not_aligned")
7708 (if (register-unaligned ACC40Sk 4)
7709 (c-call VOID "@cpu@_media_acc_not_aligned")
7710 (sequence ()
7711 (media-arith-sat-semantics add ACC40Si
7712 (nextreg h-acc40S ACC40Si 1)
7713 ACC40Sk DI
7714 #x7fffffffff
7715 (inv DI #x7fffffffff)
7716 (msr-sie-acci))
7717 (media-arith-sat-semantics sub ACC40Si
7718 (nextreg h-acc40S ACC40Si 1)
7719 (nextreg h-acc40S ACC40Sk 1)
7720 DI
7721 #x7fffffffff
7722 (inv DI #x7fffffffff)
7723 (msr-sie-acci-1))
7724 (media-arith-sat-semantics add
7725 (nextreg h-acc40S ACC40Si 2)
7726 (nextreg h-acc40S ACC40Si 3)
7727 (nextreg h-acc40S ACC40Sk 2)
7728 DI
7729 #x7fffffffff
7730 (inv DI #x7fffffffff)
7731 (msr-sie-acci-2))
7732 (media-arith-sat-semantics sub
7733 (nextreg h-acc40S ACC40Si 2)
7734 (nextreg h-acc40S ACC40Si 3)
7735 (nextreg h-acc40S ACC40Sk 3)
7736 DI
7737 #x7fffffffff
7738 (inv DI #x7fffffffff)
7739 (msr-sie-acci-3)))))))
7740 ((fr400 (unit u-media-2-add-sub-dual)) (fr550 (unit u-media-4-add-sub-dual)))
9aab5aa3
AC		 7741 )
7742
7743(define-pmacro (media-multiply-semantics conv arg1 arg2 res)
7744 (set res (mul DI (conv DI arg1) (conv DI arg2)))
7745)
7746
7747(define-pmacro (media-dual-multiply-semantics cond mode conv rhs1 rhs2)
ac7c07ac
DB		 7748 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7749 (if (register-unaligned ACC40Sk 2)
7750 (c-call VOID "@cpu@_media_acc_not_aligned")
7751 (if cond
7752 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
7753 (extract-hilo FRinti 0 FRintj 0
7754 argihi argilo argjhi argjlo)
7755 (media-multiply-semantics conv argihi rhs1 ACC40Sk)
7756 (media-multiply-semantics conv argilo rhs2
7757 (nextreg h-acc40S ACC40Sk 1))))))
9aab5aa3
AC		 7758)
7759
7760(define-pmacro (media-dual-multiply name mode conv rhs1 rhs2 op ope comment)
7761 (dni name
7762 (comment)
ac7c07ac 7763 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) PRESERVE-OVF)
9aab5aa3
AC		 7764 (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
7765 (+ pack ACC40Sk op FRinti ope FRintj)
7766 (media-dual-multiply-semantics 1 mode conv rhs1 rhs2)
7767 ((fr400 (unit u-media-2))
ac7c07ac 7768 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 7769 )
7770)
7771
7772(media-dual-multiply mmulhs HI ext argjhi argjlo OP_7B OPE1_14 "Media dual multiply signed")
7773(media-dual-multiply mmulhu UHI zext argjhi argjlo OP_7B OPE1_15 "Media dual multiply unsigned")
7774
7775(media-dual-multiply mmulxhs HI ext argjlo argjhi OP_7B OPE1_28 "Media dual cross multiply signed")
7776(media-dual-multiply mmulxhu UHI zext argjlo argjhi OP_7B OPE1_29 "Media dual cross multiply unsigned")
7777
7778(define-pmacro (conditional-media-dual-multiply
7779 name mode conv rhs1 rhs2 op ope comment)
7780 (dni name
7781 (comment)
ac7c07ac 7782 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1)
9aab5aa3
AC		 7783 PRESERVE-OVF CONDITIONAL)
7784 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
7785 (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
7786 (media-dual-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
7787 ((fr400 (unit u-media-2))
ac7c07ac 7788 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 7789 )
7790)
7791
7792(conditional-media-dual-multiply cmmulhs HI ext argjhi argjlo OP_72 OPE4_0 "Conditional Media dual multiply signed")
7793(conditional-media-dual-multiply cmmulhu UHI zext argjhi argjlo OP_72 OPE4_1 "Conditional Media dual multiply unsigned")
7794
7795(define-pmacro (media-quad-multiply-semantics cond mode conv rhs1 rhs2)
ac7c07ac
DB		 7796 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
7797 (if (register-unaligned ACC40Sk 4)
7798 (c-call VOID "@cpu@_media_acc_not_aligned")
7799 (if (orif (register-unaligned FRintieven 2)
7800 (register-unaligned FRintjeven 2))
7801 (c-call VOID "@cpu@_media_register_not_aligned")
7802 (if cond
7803 (sequence ((mode argihi) (mode argilo)
7804 (mode argjhi) (mode argjlo))
7805 (extract-hilo FRintieven 0 FRintjeven 0
7806 argihi argilo argjhi argjlo)
7807 (media-multiply-semantics conv argihi rhs1 ACC40Sk)
7808 (media-multiply-semantics conv argilo rhs2
7809 (nextreg h-acc40S ACC40Sk 1))
7810 (extract-hilo FRintieven 1 FRintjeven 1
7811 argihi argilo argjhi argjlo)
7812 (media-multiply-semantics conv argihi rhs1
7813 (nextreg h-acc40S ACC40Sk 2))
7814 (media-multiply-semantics conv argilo rhs2
7815 (nextreg h-acc40S ACC40Sk 3)))))))
9aab5aa3
AC		 7816)
7817
7818(define-pmacro (media-quad-multiply name mode conv rhs1 rhs2 op ope comment)
7819 (dni name
7820 (comment)
ac7c07ac 7821 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2) PRESERVE-OVF)
36c3ae24
NC		 7822 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
7823 (+ pack ACC40Sk op FRintieven ope FRintjeven)
9aab5aa3 7824 (media-quad-multiply-semantics 1 mode conv rhs1 rhs2)
36c3ae24
NC		 7825 ((fr400 (unit u-media-2-quad
7826 (in FRinti FRintieven)
7827 (in FRintj FRintjeven)))
7828 (fr500 (unit u-media-quad-mul
7829 (in FRinti FRintieven)
ac7c07ac 7830 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 7831 )
7832)
7833
7834(media-quad-multiply mqmulhs HI ext argjhi argjlo OP_7B OPE1_1C "Media quad multiply signed")
7835(media-quad-multiply mqmulhu UHI zext argjhi argjlo OP_7B OPE1_1D "Media quad multiply unsigned")
7836
7837(media-quad-multiply mqmulxhs HI ext argjlo argjhi OP_7B OPE1_2A "Media quad cross multiply signed")
7838(media-quad-multiply mqmulxhu UHI zext argjlo argjhi OP_7B OPE1_2B "Media quad cross multiply unsigned")
7839
7840(define-pmacro (conditional-media-quad-multiply
7841 name mode conv rhs1 rhs2 op ope comment)
7842 (dni name
7843 (comment)
ac7c07ac 7844 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2)
9aab5aa3 7845 PRESERVE-OVF CONDITIONAL)
36c3ae24
NC		 7846 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond")
7847 (+ pack ACC40Sk op FRintieven CCi cond ope FRintjeven)
9aab5aa3 7848 (media-quad-multiply-semantics (eq CCi (or cond 2)) mode conv rhs1 rhs2)
36c3ae24
NC		 7849 ((fr400 (unit u-media-2-quad
7850 (in FRinti FRintieven)
7851 (in FRintj FRintjeven)))
7852 (fr500 (unit u-media-quad-mul
7853 (in FRinti FRintieven)
ac7c07ac 7854 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 7855 )
7856)
7857
7858(conditional-media-quad-multiply cmqmulhs HI ext argjhi argjlo OP_74 OPE4_0 "Conditional Media quad multiply signed")
7859(conditional-media-quad-multiply cmqmulhu UHI zext argjhi argjlo OP_74 OPE4_1 "Conditional Media quad multiply unsigned")
7860
7861(define-pmacro (media-multiply-acc-semantics
7862 conv arg1 addop arg2 res max min sie)
7863 (sequence ((DI tmp))
7864 (set tmp (addop res (mul DI (conv DI arg1) (conv DI arg2))))
7865 (saturate-v tmp max min sie res))
7866)
7867
7868(define-pmacro (media-dual-multiply-acc-semantics
7869 cond mode conv addop rhw res max min)
ac7c07ac
DB		 7870 (if (c-call SI "@cpu@_check_acc_range" (index-of res))
7871 (if (register-unaligned res 2)
7872 (c-call VOID "@cpu@_media_acc_not_aligned")
7873 (if cond
7874 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
7875 (extract-hilo FRinti 0 FRintj 0
7876 argihi argilo argjhi argjlo)
7877 (media-multiply-acc-semantics conv argihi addop argjhi
7878 res
7879 max min (msr-sie-acci))
7880 (media-multiply-acc-semantics conv argilo addop argjlo
7881 (nextreg rhw res 1)
7882 max min (msr-sie-acci-1))))))
9aab5aa3
AC		 7883)
7884
7885(define-pmacro (media-dual-multiply-acc
7886 name mode conv addop rhw res max min op ope comment)
7887 (dni name
7888 (comment)
ac7c07ac 7889 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1))
9aab5aa3
AC		 7890 (.str name "$pack $FRinti,$FRintj,$" res)
7891 (+ pack res op FRinti ope FRintj)
7892 (media-dual-multiply-acc-semantics 1 mode conv addop rhw res max min)
7893 ((fr400 (unit u-media-2))
ac7c07ac 7894 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 7895 )
7896)
7897
7898(media-dual-multiply-acc mmachs HI ext add h-acc40S ACC40Sk
7899 (const DI #x7fffffffff) (const DI #xffffff8000000000)
7900 OP_7B OPE1_16
7901 "Media dual multiply and accumulate signed")
7902
7903(media-dual-multiply-acc mmachu UHI zext add h-acc40U ACC40Uk
7904 (const DI #xffffffffff) (const DI 0)
7905 OP_7B OPE1_17
7906 "Media dual multiply and accumulate unsigned")
7907
7908(media-dual-multiply-acc mmrdhs HI ext sub h-acc40S ACC40Sk
7909 (const DI #x7fffffffff) (const DI #xffffff8000000000)
7910 OP_7B OPE1_30
7911 "Media dual multiply and reduce signed")
7912
7913(media-dual-multiply-acc mmrdhu UHI zext sub h-acc40U ACC40Uk
7914 (const DI #xffffffffff) (const DI 0)
7915 OP_7B OPE1_31
7916 "Media dual multiply and reduce unsigned")
7917
7918(define-pmacro (conditional-media-dual-multiply-acc
7919 name mode conv addop rhw res max min op ope comment)
7920 (dni name
7921 (comment)
ac7c07ac 7922 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 7923 (.str name "$pack $FRinti,$FRintj,$" res ",$CCi,$cond")
7924 (+ pack res op FRinti CCi cond ope FRintj)
7925 (media-dual-multiply-acc-semantics (eq CCi (or cond 2))
7926 mode conv addop rhw res max min)
7927 ((fr400 (unit u-media-2))
ac7c07ac 7928 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 7929 )
7930)
7931
7932(conditional-media-dual-multiply-acc cmmachs HI ext add h-acc40S ACC40Sk
7933 (const DI #x7fffffffff) (const DI #xffffff8000000000)
7934 OP_72 OPE4_2
7935 "Conditional Media dual multiply and accumulate signed")
7936
7937(conditional-media-dual-multiply-acc cmmachu UHI zext add h-acc40U ACC40Uk
7938 (const DI #xffffffffff) (const DI 0)
7939 OP_72 OPE4_3
7940 "Conditional Media dual multiply and accumulate unsigned")
7941
7942(define-pmacro (media-quad-multiply-acc-semantics
7943 cond mode conv addop rhw res max min)
ac7c07ac
DB		 7944 (if (c-call SI "@cpu@_check_acc_range" (index-of res))
7945 (if (register-unaligned res 4)
7946 (c-call VOID "@cpu@_media_acc_not_aligned")
7947 (if (orif (register-unaligned FRintieven 2)
7948 (register-unaligned FRintjeven 2))
7949 (c-call VOID "@cpu@_media_register_not_aligned")
7950 (if cond
7951 (sequence ((mode argihi) (mode argilo)
7952 (mode argjhi) (mode argjlo))
7953 (extract-hilo FRintieven 0 FRintjeven 0
7954 argihi argilo argjhi argjlo)
7955 (media-multiply-acc-semantics conv argihi addop argjhi
7956 res
7957 max min (msr-sie-acci))
7958 (media-multiply-acc-semantics conv argilo addop argjlo
7959 (nextreg rhw res 1)
7960 max min (msr-sie-acci-1))
7961 (extract-hilo FRintieven 1 FRintjeven 1
7962 argihi argilo argjhi argjlo)
7963 (media-multiply-acc-semantics conv argihi addop argjhi
7964 (nextreg rhw res 2)
7965 max min (msr-sie-acci-2))
7966 (media-multiply-acc-semantics conv argilo addop argjlo
7967 (nextreg rhw res 3)
7968 max min
7969 (msr-sie-acci-3)))))))
9aab5aa3
AC		 7970)
7971
7972(define-pmacro (media-quad-multiply-acc
7973 name mode conv addop rhw res max min op ope comment)
7974 (dni name
7975 (comment)
ac7c07ac 7976 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 7977 (.str name "$pack $FRintieven,$FRintjeven,$" res)
7978 (+ pack res op FRintieven ope FRintjeven)
9aab5aa3 7979 (media-quad-multiply-acc-semantics 1 mode conv addop rhw res max min)
36c3ae24
NC		 7980 ((fr400 (unit u-media-2-quad
7981 (in FRinti FRintieven)
7982 (in FRintj FRintjeven)))
7983 (fr500 (unit u-media-quad-mul
7984 (in FRinti FRintieven)
ac7c07ac 7985 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 7986 )
7987)
7988
7989(media-quad-multiply-acc mqmachs HI ext add h-acc40S ACC40Sk
7990 (const DI #x7fffffffff) (const DI #xffffff8000000000)
7991 OP_7B OPE1_1E
7992 "Media quad multiply and accumulate signed")
7993
7994(media-quad-multiply-acc mqmachu UHI zext add h-acc40U ACC40Uk
7995 (const DI #xffffffffff) (const DI 0)
7996 OP_7B OPE1_1F
7997 "Media quad multiply and accumulate unsigned")
7998
7999(define-pmacro (conditional-media-quad-multiply-acc
8000 name mode conv addop rhw res max min op ope comment)
8001 (dni name
8002 (comment)
ac7c07ac 8003 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2) CONDITIONAL)
36c3ae24
NC		 8004 (.str name "$pack $FRintieven,$FRintjeven,$" res ",$CCi,$cond")
8005 (+ pack res op FRintieven CCi cond ope FRintjeven)
9aab5aa3
AC		 8006 (media-quad-multiply-acc-semantics (eq CCi (or cond 2))
8007 mode conv addop rhw res max min)
36c3ae24
NC		 8008 ((fr400 (unit u-media-2-quad
8009 (in FRinti FRintieven)
8010 (in FRintj FRintjeven)))
8011 (fr500 (unit u-media-quad-mul
8012 (in FRinti FRintieven)
ac7c07ac 8013 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8014 )
8015)
8016
8017(conditional-media-quad-multiply-acc cmqmachs HI ext add h-acc40S ACC40Sk
8018 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8019 OP_74 OPE4_2
8020 "Conditional Media quad multiply and accumulate signed")
8021
8022(conditional-media-quad-multiply-acc cmqmachu UHI zext add h-acc40U ACC40Uk
8023 (const DI #xffffffffff) (const DI 0)
8024 OP_74 OPE4_3
8025 "Conditional media quad multiply and accumulate unsigned")
8026
8027(define-pmacro (media-quad-multiply-cross-acc-semantics
8028 cond mode conv addop rhw res max min)
ac7c07ac
DB		 8029 (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8030 (if (register-unaligned res 4)
8031 (c-call VOID "@cpu@_media_acc_not_aligned")
8032 (if (orif (register-unaligned FRintieven 2)
8033 (register-unaligned FRintjeven 2))
8034 (c-call VOID "@cpu@_media_register_not_aligned")
8035 (if cond
8036 (sequence ((mode argihi) (mode argilo)
8037 (mode argjhi) (mode argjlo))
8038 (extract-hilo FRintieven 0 FRintjeven 0
8039 argihi argilo argjhi argjlo)
8040 (media-multiply-acc-semantics conv argihi addop argjhi
8041 (nextreg rhw res 2)
8042 max min (msr-sie-acci-2))
8043 (media-multiply-acc-semantics conv argilo addop argjlo
8044 (nextreg rhw res 3)
8045 max min (msr-sie-acci-3))
8046 (extract-hilo FRintieven 1 FRintjeven 1
8047 argihi argilo argjhi argjlo)
8048 (media-multiply-acc-semantics conv argihi addop argjhi
8049 res
8050 max min (msr-sie-acci))
8051 (media-multiply-acc-semantics conv argilo addop argjlo
8052 (nextreg rhw res 1)
8053 max min
8054 (msr-sie-acci-1)))))))
9aab5aa3
AC		 8055)
8056
8057(define-pmacro (media-quad-multiply-cross-acc
8058 name mode conv addop rhw res max min op ope comment)
8059 (dni name
8060 (comment)
c7a48b9a 8061 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 8062 (.str name "$pack $FRintieven,$FRintjeven,$" res)
8063 (+ pack res op FRintieven ope FRintjeven)
9aab5aa3
AC		 8064 (media-quad-multiply-cross-acc-semantics 1 mode conv addop rhw res
8065 max min)
36c3ae24
NC		 8066 ((fr400 (unit u-media-2-quad
8067 (in FRinti FRintieven)
ac7c07ac 8068 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8069 )
8070)
8071
8072(media-quad-multiply-cross-acc mqxmachs HI ext add h-acc40S ACC40Sk
8073 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8074 OP_78 OPE1_00
8075 "Media quad multiply and cross accumulate signed")
8076
8077(define-pmacro (media-quad-cross-multiply-cross-acc-semantics
8078 cond mode conv addop rhw res max min)
ac7c07ac
DB		 8079 (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8080 (if (register-unaligned res 4)
8081 (c-call VOID "@cpu@_media_acc_not_aligned")
8082 (if (orif (register-unaligned FRintieven 2)
8083 (register-unaligned FRintjeven 2))
8084 (c-call VOID "@cpu@_media_register_not_aligned")
8085 (if cond
8086 (sequence ((mode argihi) (mode argilo)
8087 (mode argjhi) (mode argjlo))
8088 (extract-hilo FRintieven 0 FRintjeven 0
8089 argihi argilo argjhi argjlo)
8090 (media-multiply-acc-semantics conv argihi addop argjlo
8091 (nextreg rhw res 2)
8092 max min (msr-sie-acci-2))
8093 (media-multiply-acc-semantics conv argilo addop argjhi
8094 (nextreg rhw res 3)
8095 max min (msr-sie-acci-3))
8096 (extract-hilo FRintieven 1 FRintjeven 1
8097 argihi argilo argjhi argjlo)
8098 (media-multiply-acc-semantics conv argihi addop argjlo
8099 res
8100 max min (msr-sie-acci))
8101 (media-multiply-acc-semantics conv argilo addop argjhi
8102 (nextreg rhw res 1)
8103 max min
8104 (msr-sie-acci-1)))))))
9aab5aa3
AC		 8105)
8106
8107(define-pmacro (media-quad-cross-multiply-cross-acc
8108 name mode conv addop rhw res max min op ope comment)
8109 (dni name
8110 (comment)
c7a48b9a 8111 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 8112 (.str name "$pack $FRintieven,$FRintjeven,$" res)
8113 (+ pack res op FRintieven ope FRintjeven)
9aab5aa3
AC		 8114 (media-quad-cross-multiply-cross-acc-semantics 1 mode conv addop rhw res
8115 max min)
36c3ae24
NC		 8116 ((fr400 (unit u-media-2-quad
8117 (in FRinti FRintieven)
ac7c07ac 8118 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8119 )
8120)
8121
8122(media-quad-cross-multiply-cross-acc mqxmacxhs HI ext add h-acc40S ACC40Sk
8123 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8124 OP_78 OPE1_01
8125 "Media quad cross multiply and cross accumulate signed")
8126
8127(define-pmacro (media-quad-cross-multiply-acc-semantics
8128 cond mode conv addop rhw res max min)
ac7c07ac
DB		 8129 (if (c-call SI "@cpu@_check_acc_range" (index-of res))
8130 (if (register-unaligned res 4)
8131 (c-call VOID "@cpu@_media_acc_not_aligned")
8132 (if (orif (register-unaligned FRintieven 2)
8133 (register-unaligned FRintjeven 2))
8134 (c-call VOID "@cpu@_media_register_not_aligned")
8135 (if cond
8136 (sequence ((mode argihi) (mode argilo)
8137 (mode argjhi) (mode argjlo))
8138 (extract-hilo FRintieven 0 FRintjeven 0
8139 argihi argilo argjhi argjlo)
8140 (media-multiply-acc-semantics conv argihi addop argjlo
8141 res
8142 max min (msr-sie-acci))
8143 (media-multiply-acc-semantics conv argilo addop argjhi
8144 (nextreg rhw res 1)
8145 max min (msr-sie-acci-1))
8146 (extract-hilo FRintieven 1 FRintjeven 1
8147 argihi argilo argjhi argjlo)
8148 (media-multiply-acc-semantics conv argihi addop argjlo
8149 (nextreg rhw res 2)
8150 max min (msr-sie-acci-2))
8151 (media-multiply-acc-semantics conv argilo addop argjhi
8152 (nextreg rhw res 3)
8153 max min
8154 (msr-sie-acci-3)))))))
9aab5aa3
AC		 8155)
8156
8157(define-pmacro (media-quad-cross-multiply-acc
8158 name mode conv addop rhw res max min op ope comment)
8159 (dni name
8160 (comment)
c7a48b9a 8161 ((UNIT FMALL) (MACH fr400,fr550) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 8162 (.str name "$pack $FRintieven,$FRintjeven,$" res)
8163 (+ pack res op FRintieven ope FRintjeven)
9aab5aa3
AC		 8164 (media-quad-cross-multiply-acc-semantics 1 mode conv addop rhw res
8165 max min)
36c3ae24
NC		 8166 ((fr400 (unit u-media-2-quad
8167 (in FRinti FRintieven)
ac7c07ac 8168 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8169 )
8170)
8171
8172(media-quad-cross-multiply-acc mqmacxhs HI ext add h-acc40S ACC40Sk
8173 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8174 OP_78 OPE1_02
8175 "Media quad cross multiply and accumulate signed")
8176
8177(define-pmacro (media-complex-semantics
8178 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
8179 (sequence ((DI tmp1) (DI tmp2))
8180 (media-multiply-semantics conv lhs1 rhs1 tmp1)
8181 (media-multiply-semantics conv lhs2 rhs2 tmp2)
8182 (set tmp1 (sub tmp1 tmp2))
8183 (saturate-v tmp1 max min sie res))
8184)
8185
8186(define-pmacro (media-complex-semantics-i
8187 conv lhs1 rhs1 lhs2 rhs2 res max min sie)
8188 (sequence ((DI tmp1) (DI tmp2))
8189 (media-multiply-semantics conv lhs1 rhs1 tmp1)
8190 (media-multiply-semantics conv lhs2 rhs2 tmp2)
8191 (set tmp1 (add tmp1 tmp2))
8192 (saturate-v tmp1 max min sie res))
8193)
8194
8195(define-pmacro (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
ac7c07ac
DB		 8196 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8197 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8198 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8199 (media-complex-semantics conv argihi rhs1 argilo rhs2 ACC40Sk
8200 max min (msr-sie-acci))))
9aab5aa3
AC		 8201)
8202
8203(define-pmacro (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
ac7c07ac
DB		 8204 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8205 (sequence ((mode argihi) (mode argilo) (mode argjhi) (mode argjlo))
8206 (extract-hilo FRinti 0 FRintj 0 argihi argilo argjhi argjlo)
8207 (media-complex-semantics-i conv argihi rhs1 argilo rhs2 ACC40Sk
8208 max min (msr-sie-acci))))
9aab5aa3
AC		 8209)
8210
8211(define-pmacro (media-dual-complex
8212 name mode conv rhs1 rhs2 max min op ope comment)
8213 (dni name
8214 (comment)
ac7c07ac 8215 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1))
9aab5aa3
AC		 8216 (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
8217 (+ pack ACC40Sk op FRinti ope FRintj)
8218 (media-dual-complex-semantics mode conv rhs1 rhs2 max min)
8219 ((fr400 (unit u-media-2))
ac7c07ac 8220 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 8221 )
8222)
8223
8224(define-pmacro (media-dual-complex-i
8225 name mode conv rhs1 rhs2 max min op ope comment)
8226 (dni name
8227 (comment)
ac7c07ac 8228 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1))
9aab5aa3
AC		 8229 (.str name "$pack $FRinti,$FRintj,$ACC40Sk")
8230 (+ pack ACC40Sk op FRinti ope FRintj)
8231 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min)
8232 ((fr400 (unit u-media-2))
ac7c07ac 8233 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 8234 )
8235)
8236
8237(media-dual-complex mcpxrs HI ext argjhi argjlo
8238 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8239 OP_7B OPE1_20
8240 "Media dual complex real signed with saturation")
8241
8242(media-dual-complex mcpxru UHI zext argjhi argjlo
8243 (const DI #xffffffffff) (const DI 0)
8244 OP_7B OPE1_21
8245 "Media dual complex real unsigned with saturation")
8246
8247(media-dual-complex-i mcpxis HI ext argjlo argjhi
8248 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8249 OP_7B OPE1_22
8250 "Media dual complex imaginary signed with saturation")
8251
8252(media-dual-complex-i mcpxiu UHI zext argjlo argjhi
8253 (const DI #xffffffffff) (const DI 0)
8254 OP_7B OPE1_23
8255 "Media dual complex imaginary unsigned with saturation")
8256
8257(define-pmacro (conditional-media-dual-complex
8258 name mode conv rhs1 rhs2 max min op ope comment)
8259 (dni name
8260 (comment)
ac7c07ac 8261 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 8262 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
8263 (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
8264 (if (eq CCi (or cond 2))
8265 (media-dual-complex-semantics mode conv rhs1 rhs2 max min))
8266 ((fr400 (unit u-media-2))
ac7c07ac 8267 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 8268 )
8269)
8270
8271(define-pmacro (conditional-media-dual-complex-i
8272 name mode conv rhs1 rhs2 max min op ope comment)
8273 (dni name
8274 (comment)
ac7c07ac 8275 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 8276 (.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
8277 (+ pack ACC40Sk op FRinti CCi cond ope FRintj)
8278 (if (eq CCi (or cond 2))
8279 (media-dual-complex-semantics-i mode conv rhs1 rhs2 max min))
8280 ((fr400 (unit u-media-2))
ac7c07ac 8281 (fr500 (unit u-media-dual-mul)) (fr550 (unit u-media-4)))
9aab5aa3
AC		 8282 )
8283)
8284
8285(conditional-media-dual-complex cmcpxrs HI ext argjhi argjlo
8286 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8287 OP_75 OPE4_0
8288 "Conditional Media dual complex real signed with saturation")
8289
8290(conditional-media-dual-complex cmcpxru UHI zext argjhi argjlo
8291 (const DI #xffffffffff) (const DI 0)
8292 OP_75 OPE4_1
8293 "Conditional Media dual complex real unsigned with saturation")
8294
8295(conditional-media-dual-complex-i cmcpxis HI ext argjlo argjhi
8296 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8297 OP_75 OPE4_2
8298 "Conditional Media dual complex imaginary signed with saturation")
8299
8300(conditional-media-dual-complex-i cmcpxiu UHI zext argjlo argjhi
8301 (const DI #xffffffffff) (const DI 0)
8302 OP_75 OPE4_3
8303 "Conditional Media dual complex imaginary unsigned with saturation")
8304
8305(define-pmacro (media-quad-complex
8306 name mode conv rhs1 rhs2 max min op ope comment)
8307 (dni name
8308 (comment)
ac7c07ac 8309 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 8310 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
8311 (+ pack ACC40Sk op FRintieven ope FRintjeven)
ac7c07ac
DB		 8312 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8313 (if (register-unaligned ACC40Sk 2)
8314 (c-call VOID "@cpu@_media_acc_not_aligned")
8315 (if (orif (register-unaligned FRintieven 2)
8316 (register-unaligned FRintjeven 2))
8317 (c-call VOID "@cpu@_media_register_not_aligned")
8318 (sequence ((mode argihi) (mode argilo)
8319 (mode argjhi) (mode argjlo))
8320 (extract-hilo FRintieven 0 FRintjeven 0
8321 argihi argilo argjhi argjlo)
8322 (media-complex-semantics conv argihi rhs1 argilo rhs2
8323 ACC40Sk
8324 max min (msr-sie-acci))
8325 (extract-hilo FRintieven 1 FRintjeven 1
8326 argihi argilo argjhi argjlo)
8327 (media-complex-semantics conv argihi rhs1 argilo rhs2
8328 (nextreg h-acc40S ACC40Sk 1)
8329 max min (msr-sie-acci-1))))))
36c3ae24
NC		 8330 ((fr400 (unit u-media-2-quad
8331 (in FRinti FRintieven)
8332 (in FRintj FRintjeven)))
8333 (fr500 (unit u-media-quad-complex
8334 (in FRinti FRintieven)
ac7c07ac 8335 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8336 )
8337)
8338
8339(define-pmacro (media-quad-complex-i
8340 name mode conv rhs1 rhs2 max min op ope comment)
8341 (dni name
8342 (comment)
ac7c07ac 8343 ((UNIT FMALL) (FR500-MAJOR M-4) (FR550-MAJOR M-4) (FR400-MAJOR M-2))
36c3ae24
NC		 8344 (.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
8345 (+ pack ACC40Sk op FRintieven ope FRintjeven)
ac7c07ac
DB		 8346 (if (c-call SI "@cpu@_check_acc_range" (index-of ACC40Sk))
8347 (if (register-unaligned ACC40Sk 2)
8348 (c-call VOID "@cpu@_media_acc_not_aligned")
8349 (if (orif (register-unaligned FRintieven 2)
8350 (register-unaligned FRintjeven 2))
8351 (c-call VOID "@cpu@_media_register_not_aligned")
8352 (sequence ((mode argihi) (mode argilo)
8353 (mode argjhi) (mode argjlo))
8354 (extract-hilo FRintieven 0 FRintjeven 0
8355 argihi argilo argjhi argjlo)
8356 (media-complex-semantics-i conv argihi rhs1 argilo rhs2
8357 ACC40Sk
8358 max min (msr-sie-acci))
8359 (extract-hilo FRintieven 1 FRintjeven 1
8360 argihi argilo argjhi argjlo)
8361 (media-complex-semantics-i conv argihi rhs1 argilo rhs2
8362 (nextreg h-acc40S ACC40Sk 1)
8363 max min (msr-sie-acci-1))))))
36c3ae24
NC		 8364 ((fr400 (unit u-media-2-quad
8365 (in FRinti FRintieven)
8366 (in FRintj FRintjeven)))
8367 (fr500 (unit u-media-quad-complex
8368 (in FRinti FRintieven)
ac7c07ac 8369 (in FRintj FRintjeven))) (fr550 (unit u-media-4-quad)))
9aab5aa3
AC		 8370 )
8371)
8372
8373(media-quad-complex mqcpxrs HI ext argjhi argjlo
8374 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8375 OP_7B OPE1_24
8376 "Media quad complex real signed with saturation")
8377
8378(media-quad-complex mqcpxru UHI zext argjhi argjlo
8379 (const DI #xffffffffff) (const DI 0)
8380 OP_7B OPE1_25
8381 "Media quad complex real unsigned with saturation")
8382
8383(media-quad-complex-i mqcpxis HI ext argjlo argjhi
8384 (const DI #x7fffffffff) (const DI #xffffff8000000000)
8385 OP_7B OPE1_26
8386 "Media quad complex imaginary signed with saturation")
8387
8388(media-quad-complex-i mqcpxiu UHI zext argjlo argjhi
8389 (const DI #xffffffffff) (const DI 0)
8390 OP_7B OPE1_27
8391 "Media quad complex imaginary unsigned with saturation")
8392
8393(define-pmacro (media-pack src1 src2 targ offset)
8394 (sequence ()
8395 (set (halfword hi targ offset) (halfword lo src1 offset))
8396 (set (halfword lo targ offset) (halfword lo src2 offset)))
8397)
8398
8399(define-pmacro (media-expand-halfword-to-word-semantics cond)
8400 (if cond
8401 (sequence ((UHI tmp))
8402 (if (and u6 1)
8403 (set tmp (halfword lo FRinti 0))
8404 (set tmp (halfword hi FRinti 0)))
8405 (set (halfword hi FRintk 0) tmp)
8406 (set (halfword lo FRintk 0) tmp)))
8407)
8408
8409(dni mexpdhw
8410 "Media expand halfword to word"
ac7c07ac 8411 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8412 "mexpdhw$pack $FRinti,$u6,$FRintk"
8413 (+ pack FRintk OP_7B FRinti OPE1_32 u6)
8414 (media-expand-halfword-to-word-semantics 1)
8415 ((fr400 (unit u-media-3))
ac7c07ac 8416 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 8417)
8418
8419(dni cmexpdhw
8420 "Conditional media expand halfword to word"
ac7c07ac 8421 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1) CONDITIONAL)
9aab5aa3
AC		 8422 "cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond"
8423 (+ pack FRintk OP_76 FRinti CCi cond OPE4_2 u6)
8424 (media-expand-halfword-to-word-semantics (eq CCi (or cond 2)))
8425 ((fr400 (unit u-media-3))
ac7c07ac 8426 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 8427)
8428
8429(define-pmacro (media-expand-halfword-to-double-semantics cond)
36c3ae24 8430 (if (register-unaligned FRintkeven 2)
9aab5aa3
AC		 8431 (c-call VOID "@cpu@_media_register_not_aligned")
8432 (if cond
8433 (sequence ((UHI tmp))
36c3ae24
NC		 8434 ; a hack to get FRintkeven referenced for profiling
8435 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9aab5aa3
AC		 8436 (if (and u6 1)
8437 (set tmp (halfword lo FRinti 0))
8438 (set tmp (halfword hi FRinti 0)))
36c3ae24
NC		 8439 (set (halfword hi FRintkeven 0) tmp)
8440 (set (halfword lo FRintkeven 0) tmp)
8441 (set (halfword hi FRintkeven 1) tmp)
8442 (set (halfword lo FRintkeven 1) tmp))))
9aab5aa3
AC		 8443)
8444
8445(dni mexpdhd
8446 "Media expand halfword to double"
ac7c07ac 8447 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 8448 "mexpdhd$pack $FRinti,$u6,$FRintkeven"
8449 (+ pack FRintkeven OP_7B FRinti OPE1_33 u6)
9aab5aa3 8450 (media-expand-halfword-to-double-semantics 1)
36c3ae24
NC		 8451 ((fr400 (unit u-media-dual-expand
8452 (out FRintk FRintkeven)))
8453 (fr500 (unit u-media-dual-expand
ac7c07ac 8454 (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand)))
9aab5aa3
AC		 8455)
8456
8457(dni cmexpdhd
8458 "Conditional media expand halfword to double"
ac7c07ac 8459 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL)
36c3ae24
NC		 8460 "cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond"
8461 (+ pack FRintkeven OP_76 FRinti CCi cond OPE4_3 u6)
9aab5aa3 8462 (media-expand-halfword-to-double-semantics (eq CCi (or cond 2)))
36c3ae24
NC		 8463 ((fr400 (unit u-media-dual-expand
8464 (out FRintk FRintkeven)))
8465 (fr500 (unit u-media-dual-expand
ac7c07ac 8466 (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand)))
9aab5aa3
AC		 8467)
8468
8469(dni mpackh
8470 "Media halfword pack"
ac7c07ac 8471 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8472 "mpackh$pack $FRinti,$FRintj,$FRintk"
8473 (+ pack FRintk OP_7B FRinti OPE1_34 FRintj)
8474 (media-pack FRinti FRintj FRintk 0)
8475 ((fr400 (unit u-media-3))
ac7c07ac 8476 (fr500 (unit u-media)) (fr550 (unit u-media)))
9aab5aa3
AC		 8477)
8478
8479(dni mdpackh
8480 "Media dual pack"
ac7c07ac 8481 ((UNIT FM01) (FR500-MAJOR M-5) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 8482 "mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven"
8483 (+ pack FRintkeven OP_7B FRintieven OPE1_36 FRintjeven)
8484 (if (orif (register-unaligned FRintieven 2)
8485 (orif (register-unaligned FRintjeven 2)
8486 (register-unaligned FRintkeven 2)))
9aab5aa3
AC		 8487 (c-call VOID "@cpu@_media_register_not_aligned")
8488 (sequence ()
8489 ; hack to get these referenced for profiling
36c3ae24
NC		 8490 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
8491 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
8492 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8493 (media-pack FRintieven FRintjeven FRintkeven 0)
8494 (media-pack FRintieven FRintjeven FRintkeven 1)))
8495 ((fr400 (unit u-media-3-quad
8496 (in FRinti FRintieven)
8497 (in FRintj FRintjeven)
8498 (out FRintk FRintkeven)))
8499 (fr500 (unit u-media-quad-arith
8500 (in FRinti FRintieven)
8501 (in FRintj FRintjeven)
ac7c07ac 8502 (out FRintk FRintkeven))) (fr550 (unit u-media-quad)))
9aab5aa3
AC		 8503)
8504
8505(define-pmacro (media-unpack src soff targ toff)
8506 (sequence ()
8507 (set (halfword hi targ toff) (halfword hi src soff))
8508 (set (halfword lo targ toff) (halfword hi src soff))
8509 (set (halfword hi targ (add toff 1)) (halfword lo src soff))
8510 (set (halfword lo targ (add toff 1)) (halfword lo src soff)))
8511)
8512
8513(dni munpackh
8514 "Media halfword unpack"
ac7c07ac 8515 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 8516 "munpackh$pack $FRinti,$FRintkeven"
8517 (+ pack FRintkeven OP_7B FRinti OPE1_35 (FRj-null))
8518 (if (register-unaligned FRintkeven 2)
9aab5aa3
AC		 8519 (c-call VOID "@cpu@_media_register_not_aligned")
8520 (sequence ()
8521 ; hack to get these referenced for profiling
8522 (set FRinti (c-raw-call SI "frv_ref_SI" FRinti))
36c3ae24
NC		 8523 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8524 (media-unpack FRinti 0 FRintkeven 0)))
8525 ((fr400 (unit u-media-dual-expand
8526 (out FRintk FRintkeven)))
8527 (fr500 (unit u-media-dual-expand
ac7c07ac 8528 (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand)))
9aab5aa3
AC		 8529)
8530
8531(dni mdunpackh
8532 "Media dual unpack"
8533 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
36c3ae24
NC		 8534 "mdunpackh$pack $FRintieven,$FRintk"
8535 (+ pack FRintk OP_7B FRintieven OPE1_37 (FRj-null))
8536 (if (orif (register-unaligned FRintieven 2) (register-unaligned FRintk 4))
9aab5aa3
AC		 8537 (c-call VOID "@cpu@_media_register_not_aligned")
8538 (sequence ()
8539 ; hack to get these referenced for profiling
36c3ae24 8540 (set FRintieven (c-raw-call SI "frv_ref_SI" FRintieven))
9aab5aa3 8541 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
36c3ae24
NC		 8542 (media-unpack FRintieven 0 FRintk 0)
8543 (media-unpack FRintieven 1 FRintk 2)))
8544 ((fr500 (unit u-media-dual-unpack
8545 (in FRinti FRintieven))))
9aab5aa3
AC		 8546)
8547
8548(define-pmacro (ubyte num arg offset)
8549 (reg (.sym h-fr_ num) (add (index-of arg) offset)))
8550
8551(define-pmacro (mbtoh-semantics cond)
36c3ae24 8552 (if (register-unaligned FRintkeven 2)
9aab5aa3
AC		 8553 (c-call VOID "@cpu@_media_register_not_aligned")
8554 (if cond
8555 (sequence ()
36c3ae24
NC		 8556 (set (halfword hi FRintkeven 0) (ubyte 3 FRintj 0))
8557 (set (halfword lo FRintkeven 0) (ubyte 2 FRintj 0))
8558 (set (halfword hi FRintkeven 1) (ubyte 1 FRintj 0))
8559 (set (halfword lo FRintkeven 1) (ubyte 0 FRintj 0)))))
9aab5aa3
AC		 8560)
8561
8562(dni mbtoh
8563 "Media convert byte to halfword"
ac7c07ac 8564 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 8565 "mbtoh$pack $FRintj,$FRintkeven"
8566 (+ pack FRintkeven OP_7B (FRi-null) OPE1_38 FRintj)
9aab5aa3
AC		 8567 (sequence ()
8568 ; hack to get these referenced for profiling
8569 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
36c3ae24 8570 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
9aab5aa3 8571 (mbtoh-semantics 1))
36c3ae24 8572 ((fr400 (unit u-media-dual-expand
6d9ab561 8573 (out FRintk FRintkeven)))
36c3ae24 8574 (fr500 (unit u-media-dual-btoh
ac7c07ac 8575 (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand)))
9aab5aa3
AC		 8576)
8577
8578(dni cmbtoh
8579 "Conditional media convert byte to halfword"
ac7c07ac 8580 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL)
36c3ae24
NC		 8581 "cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond"
8582 (+ pack FRintkeven OP_77 (FRi-null) CCi cond OPE4_0 FRintj)
6d9ab561
NC		 8583 (sequence ()
8584 ; hack to get these referenced for profiling
8585 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
8586 (set FRintkeven (c-raw-call SI "frv_ref_SI" FRintkeven))
8587 (mbtoh-semantics (eq CCi (or cond 2))))
36c3ae24
NC		 8588 ((fr400 (unit u-media-dual-expand
8589 (out FRintk FRintkeven)))
8590 (fr500 (unit u-media-dual-btoh
ac7c07ac 8591 (out FRintk FRintkeven))) (fr550 (unit u-media-dual-expand (in FRinti FRintj))))
9aab5aa3
AC		 8592)
8593
8594(define-pmacro (mhtob-semantics cond)
36c3ae24 8595 (if (register-unaligned FRintjeven 2)
9aab5aa3
AC		 8596 (c-call VOID "@cpu@_media_register_not_aligned")
8597 (if cond
8598 (sequence ()
36c3ae24
NC		 8599 (set (ubyte 3 FRintk 0) (halfword hi FRintjeven 0))
8600 (set (ubyte 2 FRintk 0) (halfword lo FRintjeven 0))
8601 (set (ubyte 1 FRintk 0) (halfword hi FRintjeven 1))
8602 (set (ubyte 0 FRintk 0) (halfword lo FRintjeven 1)))))
9aab5aa3
AC		 8603)
8604
8605(dni mhtob
8606 "Media convert halfword to byte"
ac7c07ac 8607 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
36c3ae24
NC		 8608 "mhtob$pack $FRintjeven,$FRintk"
8609 (+ pack FRintk OP_7B (FRi-null) OPE1_39 FRintjeven)
9aab5aa3
AC		 8610 (sequence ()
8611 ; hack to get these referenced for profiling
36c3ae24 8612 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9aab5aa3
AC		 8613 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8614 (mhtob-semantics 1))
36c3ae24
NC		 8615 ((fr400 (unit u-media-dual-htob
8616 (in FRintj FRintjeven)))
8617 (fr500 (unit u-media-dual-htob
ac7c07ac 8618 (in FRintj FRintjeven))) (fr550 (unit u-media-3-dual (in FRinti FRintjeven))))
9aab5aa3
AC		 8619)
8620
8621(dni cmhtob
8622 "Conditional media convert halfword to byte"
ac7c07ac 8623 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-2) CONDITIONAL)
36c3ae24
NC		 8624 "cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond"
8625 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_1 FRintjeven)
9aab5aa3
AC		 8626 (sequence ()
8627 ; hack to get these referenced for profiling
36c3ae24 8628 (set FRintjeven (c-raw-call SI "frv_ref_SI" FRintjeven))
9aab5aa3
AC		 8629 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8630 (mhtob-semantics (eq CCi (or cond 2))))
36c3ae24
NC		 8631 ((fr400 (unit u-media-dual-htob
8632 (in FRintj FRintjeven)))
8633 (fr500 (unit u-media-dual-htob
ac7c07ac 8634 (in FRintj FRintjeven))) (fr550 (unit u-media-3-dual (in FRinti FRintjeven))))
9aab5aa3
AC		 8635)
8636
8637(define-pmacro (mbtohe-semantics cond)
8638 (if (register-unaligned FRintk 4)
8639 (c-call VOID "@cpu@_media_register_not_aligned")
8640 (if cond
8641 (sequence ()
8642 (set (halfword hi FRintk 0) (ubyte 3 FRintj 0))
8643 (set (halfword lo FRintk 0) (ubyte 3 FRintj 0))
8644 (set (halfword hi FRintk 1) (ubyte 2 FRintj 0))
8645 (set (halfword lo FRintk 1) (ubyte 2 FRintj 0))
8646 (set (halfword hi FRintk 2) (ubyte 1 FRintj 0))
8647 (set (halfword lo FRintk 2) (ubyte 1 FRintj 0))
8648 (set (halfword hi FRintk 3) (ubyte 0 FRintj 0))
8649 (set (halfword lo FRintk 3) (ubyte 0 FRintj 0)))))
8650)
8651
8652(dni mbtohe
8653 "Media convert byte to halfword extended"
8654 ((UNIT FM01) (FR500-MAJOR M-7) (MACH simple,tomcat,frv))
8655 "mbtohe$pack $FRintj,$FRintk"
8656 (+ pack FRintk OP_7B (FRi-null) OPE1_3A FRintj)
8657 (sequence ()
8658 ; hack to get these referenced for profiling
8659 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
8660 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8661 (mbtohe-semantics 1))
8662 ((fr500 (unit u-media-dual-btohe)))
8663)
8664
8665(dni cmbtohe
8666 "Conditional media convert byte to halfword extended"
8667 ((UNIT FM01) (FR500-MAJOR M-7) CONDITIONAL (MACH simple,tomcat,frv))
8668 "cmbtohe$pack $FRintj,$FRintk,$CCi,$cond"
8669 (+ pack FRintk OP_77 (FRi-null) CCi cond OPE4_2 FRintj)
8670 (sequence ()
8671 ; hack to get these referenced for profiling
8672 (set FRintj (c-raw-call SI "frv_ref_SI" FRintj))
8673 (set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
8674 (mbtohe-semantics (eq CCi (or cond 2))))
8675 ((fr500 (unit u-media-dual-btohe)))
8676)
8677
8caa9169
DB		 8678; Media NOP
8679; A special case of mclracc
8680(dni mnop "Media nop"
ac7c07ac 8681 ((UNIT FMALL) (FR500-MAJOR M-1) (FR550-MAJOR M-1) (FR400-MAJOR M-1))
8caa9169
DB		 8682 "mnop$pack"
8683 (+ pack (f-ACC40Sk 63) OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
8684 (nop)
8685 ()
8686)
8687
8688; mclracc with #A==0
8689(dni mclracc-0
8690 "Media clear accumulator(s)"
ac7c07ac 8691 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
8caa9169
DB		 8692 "mclracc$pack $ACC40Sk,$A0"
8693 (+ pack ACC40Sk OP_7B (f-A 0) (misc-null-10) OPE1_3B (FRj-null))
8694 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 0)
8695 ((fr400 (unit u-media-4))
ac7c07ac 8696 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
8caa9169
DB		 8697)
8698
8699; mclracc with #A==1
8700(dni mclracc-1
9aab5aa3 8701 "Media clear accumulator(s)"
ac7c07ac 8702 ((UNIT MCLRACC-1) (FR500-MAJOR M-6) (FR550-MAJOR M-3) (FR400-MAJOR M-2))
8caa9169
DB		 8703 "mclracc$pack $ACC40Sk,$A1"
8704 (+ pack ACC40Sk OP_7B (f-A 1) (misc-null-10) OPE1_3B (FRj-null))
8705 (c-call VOID "@cpu@_clear_accumulators" (index-of ACC40Sk) 1)
9aab5aa3 8706 ((fr400 (unit u-media-4))
ac7c07ac 8707 (fr500 (unit u-media)) (fr550 (unit u-media-3-mclracc)))
9aab5aa3
AC		 8708)
8709
8710(dni mrdacc
8711 "Media read accumulator"
ac7c07ac 8712 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8713 "mrdacc$pack $ACC40Si,$FRintk"
8714 (+ pack FRintk OP_7B ACC40Si OPE1_3C (FRj-null))
8715 (set FRintk ACC40Si)
8716 ((fr400 (unit u-media-4))
ac7c07ac 8717 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc)))
9aab5aa3
AC		 8718)
8719
8720(dni mrdaccg
8721 "Media read accumulator guard"
ac7c07ac 8722 ((UNIT FM01) (FR500-MAJOR M-2) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8723 "mrdaccg$pack $ACCGi,$FRintk"
8724 (+ pack FRintk OP_7B ACCGi OPE1_3E (FRj-null))
8725 (set FRintk ACCGi)
8726 ((fr400 (unit u-media-4-accg))
ac7c07ac 8727 (fr500 (unit u-media)) (fr550 (unit u-media-3-acc (in ACC40Si ACCGi))))
9aab5aa3
AC		 8728)
8729
8730(dni mwtacc
8731 "Media write accumulator"
ac7c07ac 8732 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8733 "mwtacc$pack $FRinti,$ACC40Sk"
8734 (+ pack ACC40Sk OP_7B FRinti OPE1_3D (FRj-null))
8735 (set ACC40Sk (or (and ACC40Sk (const DI #xffffffff00000000))
8736 FRinti))
8737 ((fr400 (unit u-media-4))
ac7c07ac 8738 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc)))
9aab5aa3
AC		 8739)
8740
8741(dni mwtaccg
8742 "Media write accumulator guard"
ac7c07ac 8743 ((UNIT FM01) (FR500-MAJOR M-3) (FR550-MAJOR M-3) (FR400-MAJOR M-1))
9aab5aa3
AC		 8744 "mwtaccg$pack $FRinti,$ACCGk"
8745 (+ pack ACCGk OP_7B FRinti OPE1_3F (FRj-null))
d0312406
DB		 8746 (sequence ()
8747 ; hack to get these referenced for profiling
8748 (c-raw-call VOID "frv_ref_SI" ACCGk)
8749 (set ACCGk FRinti))
9aab5aa3 8750 ((fr400 (unit u-media-4-accg))
ac7c07ac 8751 (fr500 (unit u-media)) (fr550 (unit u-media-3-wtacc (in ACC40Sk ACCGk))))
9aab5aa3
AC		 8752)
8753
8754(define-pmacro (media-cop num op)
8755 (dni (.sym mcop num)
8756 "Media custom instruction"
8757 ((UNIT FM01) (FR500-MAJOR M-1) (MACH frv))
8758 (.str "mcop" num "$pack $FRi,$FRj,$FRk")
8759 (+ pack FRk op FRi OPE1_00 FRj)
8760 (c-call VOID "@cpu@_media_cop" num)
8761 ()
8762 )
8763)
8764
8765(media-cop 1 OP_7C)
8766(media-cop 2 OP_7D)
8767
8768; nop
8769; A nop is defined to be a "ori gr0,0,gr0"
8770; This needn't be a macro-insn, but making it one greatly simplifies decode.c
8771; On the other hand spending a little time in the decoder is often worth it.
8772;
8773(dnmi nop "nop"
8caa9169 8774 ((UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 8775 "nop$pack"
8776 (emit ori pack (GRi 0) (s12 0) (GRk 0))
8777)
8778
8779; Floating point NOP
8780(dni fnop
8781 "Floating point nop"
ac7c07ac 8782 ((UNIT FMALL) (FR500-MAJOR F-8) (FR550-MAJOR F-1) (MACH simple,tomcat,fr500,fr550,frv))
9aab5aa3
AC		 8783 "fnop$pack"
8784 (+ pack (rd-null) OP_79 (FRi-null) OPE1_0D (FRj-null))
8785 (nop)
8786 ()
8787)
8788
9aab5aa3
AC		 8789; A return instruction
8790(dnmi ret "return"
8791 (NO-DIS (UNIT B01) (FR500-MAJOR B-3) (FR400-MAJOR B-3))
8792 "ret$pack"
8793 (emit bralr pack (hint_taken 2))
8794)
8795
8796(dnmi cmp "compare"
8caa9169 8797 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 8798 "cmp$pack $GRi,$GRj,$ICCi_1"
8799 (emit subcc pack GRi GRj (GRk 0) ICCi_1)
8800)
8801
8802(dnmi cmpi "compare immediate"
8caa9169 8803 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 8804 "cmpi$pack $GRi,$s10,$ICCi_1"
8805 (emit subicc pack GRi s10 (GRk 0) ICCi_1)
8806)
8807
8808(dnmi ccmp "conditional compare"
8caa9169 8809 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 8810 "ccmp$pack $GRi,$GRj,$CCi,$cond"
8811 (emit csubcc pack GRi GRj (GRk 0) CCi cond)
8812)
8813
8814(dnmi mov "move"
8caa9169 8815 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1))
9aab5aa3
AC		 8816 "mov$pack $GRi,$GRk"
8817 (emit ori pack GRi (s12 0) GRk)
8818)
8819
8820(dnmi cmov "conditional move"
8caa9169 8821 (NO-DIS (UNIT IALL) (FR500-MAJOR I-1) (FR400-MAJOR I-1) CONDITIONAL)
9aab5aa3
AC		 8822 "cmov$pack $GRi,$GRk,$CCi,$cond"
8823 (emit cor pack GRi (GRj 0) GRk CCi cond)
8824)
GDB Binutils - Deliverables
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