projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 2ab836db MR |
1 | /* |
| 2 | * Copyright (c) 2016 Maxime Ripard. All rights reserved. | |
| 3 | * | |
| 4 | * This software is licensed under the terms of the GNU General Public | |
| 5 | * License version 2, as published by the Free Software Foundation, and | |
| 6 | * may be copied, distributed, and modified under those terms. | |
| 7 | * | |
| 8 | * This program is distributed in the hope that it will be useful, | |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | * GNU General Public License for more details. | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef _CCU_MP_H_ | |
| 15 | #define _CCU_MP_H_ | |
| 16 | ||
| 17 | #include <linux/clk-provider.h> | |
| 18 | ||
| 19 | #include "ccu_common.h" | |
| 20 | #include "ccu_div.h" | |
| 21 | #include "ccu_mult.h" | |
| 22 | #include "ccu_mux.h" | |
| 23 | ||
| 24 | /* | |
| 25 | * struct ccu_mp - Definition of an M-P clock | |
| 26 | * | |
| 27 | * Clocks based on the formula parent >> P / M | |
| 28 | */ | |
| 29 | struct ccu_mp { | |
| 30 | u32 enable; | |
| 31 | ||
| 32 | struct _ccu_div m; | |
| 33 | struct _ccu_div p; | |
| 34 | struct ccu_mux_internal mux; | |
| 35 | struct ccu_common common; | |
| 36 | }; | |
| 37 | ||
| 38 | #define SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ | |
| 39 | _mshift, _mwidth, \ | |
| 40 | _pshift, _pwidth, \ | |
| 41 | _muxshift, _muxwidth, \ | |
| 42 | _gate, _flags) \ | |
| 43 | struct ccu_mp _struct = { \ | |
| 44 | .enable = _gate, \ | |
| 45 | .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ | |
| 46 | .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \ | |
| 89af8525 | 47 | .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ |
| 2ab836db MR |
48 | .common = { \ |
| 49 | .reg = _reg, \ | |
| 50 | .hw.init = CLK_HW_INIT_PARENTS(_name, \ | |
| 51 | _parents, \ | |
| 52 | &ccu_mp_ops, \ | |
| 53 | _flags), \ | |
| 54 | } \ | |
| 55 | } | |
| 56 | ||
| 57 | #define SUNXI_CCU_MP_WITH_MUX(_struct, _name, _parents, _reg, \ | |
| 58 | _mshift, _mwidth, \ | |
| 59 | _pshift, _pwidth, \ | |
| 60 | _muxshift, _muxwidth, \ | |
| 61 | _flags) \ | |
| 62 | SUNXI_CCU_MP_WITH_MUX_GATE(_struct, _name, _parents, _reg, \ | |
| 63 | _mshift, _mwidth, \ | |
| 64 | _pshift, _pwidth, \ | |
| 65 | _muxshift, _muxwidth, \ | |
| 66 | 0, _flags) | |
| 67 | ||
| 68 | static inline struct ccu_mp *hw_to_ccu_mp(struct clk_hw *hw) | |
| 69 | { | |
| 70 | struct ccu_common *common = hw_to_ccu_common(hw); | |
| 71 | ||
| 72 | return container_of(common, struct ccu_mp, common); | |
| 73 | } | |
| 74 | ||
| 75 | extern const struct clk_ops ccu_mp_ops; | |
| 76 | ||
| 77 | #endif /* _CCU_MP_H_ */ |