projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| df6561e6 MR |
1 | /* |
| 2 | * Copyright (c) 2016 Maxime Ripard. All rights reserved. | |
| 3 | * | |
| 4 | * This software is licensed under the terms of the GNU General Public | |
| 5 | * License version 2, as published by the Free Software Foundation, and | |
| 6 | * may be copied, distributed, and modified under those terms. | |
| 7 | * | |
| 8 | * This program is distributed in the hope that it will be useful, | |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 11 | * GNU General Public License for more details. | |
| 12 | */ | |
| 13 | ||
| 14 | #ifndef _CCU_NKM_H_ | |
| 15 | #define _CCU_NKM_H_ | |
| 16 | ||
| 17 | #include <linux/clk-provider.h> | |
| 18 | ||
| 19 | #include "ccu_common.h" | |
| 20 | #include "ccu_div.h" | |
| 21 | #include "ccu_mult.h" | |
| 22 | ||
| 23 | /* | |
| 24 | * struct ccu_nkm - Definition of an N-K-M clock | |
| 25 | * | |
| 26 | * Clocks based on the formula parent * N * K / M | |
| 27 | */ | |
| 28 | struct ccu_nkm { | |
| 29 | u32 enable; | |
| 30 | u32 lock; | |
| 31 | ||
| 32 | struct _ccu_mult n; | |
| 33 | struct _ccu_mult k; | |
| 34 | struct _ccu_div m; | |
| a3658359 | 35 | struct ccu_mux_internal mux; |
| df6561e6 MR |
36 | |
| 37 | struct ccu_common common; | |
| 38 | }; | |
| 39 | ||
| a3658359 CYT |
40 | #define SUNXI_CCU_NKM_WITH_MUX_GATE_LOCK(_struct, _name, _parents, _reg, \ |
| 41 | _nshift, _nwidth, \ | |
| 42 | _kshift, _kwidth, \ | |
| 43 | _mshift, _mwidth, \ | |
| 44 | _muxshift, _muxwidth, \ | |
| 45 | _gate, _lock, _flags) \ | |
| 46 | struct ccu_nkm _struct = { \ | |
| 47 | .enable = _gate, \ | |
| 48 | .lock = _lock, \ | |
| 49 | .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ | |
| 50 | .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ | |
| 51 | .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ | |
| 89af8525 | 52 | .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \ |
| a3658359 CYT |
53 | .common = { \ |
| 54 | .reg = _reg, \ | |
| 55 | .hw.init = CLK_HW_INIT_PARENTS(_name, \ | |
| 56 | _parents, \ | |
| 57 | &ccu_nkm_ops, \ | |
| 58 | _flags), \ | |
| 59 | }, \ | |
| 60 | } | |
| 61 | ||
| df6561e6 MR |
62 | #define SUNXI_CCU_NKM_WITH_GATE_LOCK(_struct, _name, _parent, _reg, \ |
| 63 | _nshift, _nwidth, \ | |
| 64 | _kshift, _kwidth, \ | |
| 65 | _mshift, _mwidth, \ | |
| 66 | _gate, _lock, _flags) \ | |
| 67 | struct ccu_nkm _struct = { \ | |
| 68 | .enable = _gate, \ | |
| 69 | .lock = _lock, \ | |
| 70 | .k = _SUNXI_CCU_MULT(_kshift, _kwidth), \ | |
| 71 | .n = _SUNXI_CCU_MULT(_nshift, _nwidth), \ | |
| 72 | .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \ | |
| 73 | .common = { \ | |
| 74 | .reg = _reg, \ | |
| 75 | .hw.init = CLK_HW_INIT(_name, \ | |
| 76 | _parent, \ | |
| 77 | &ccu_nkm_ops, \ | |
| 78 | _flags), \ | |
| 79 | }, \ | |
| 80 | } | |
| 81 | ||
| 82 | static inline struct ccu_nkm *hw_to_ccu_nkm(struct clk_hw *hw) | |
| 83 | { | |
| 84 | struct ccu_common *common = hw_to_ccu_common(hw); | |
| 85 | ||
| 86 | return container_of(common, struct ccu_nkm, common); | |
| 87 | } | |
| 88 | ||
| 89 | extern const struct clk_ops ccu_nkm_ops; | |
| 90 | ||
| 91 | #endif /* _CCU_NKM_H_ */ |