Merge remote-tracking branch 'xen-tip/linux-next'
[deliverable/linux.git] / drivers / crypto / Kconfig
CommitLineData
b511431d
JE
1
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
06bfb7eb
JE
5 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
b511431d
JE
10
11if CRYPTO_HW
1da177e4
LT
12
13config CRYPTO_DEV_PADLOCK
d158325e 14 tristate "Support for VIA PadLock ACE"
2f817418 15 depends on X86 && !UML
1da177e4
LT
16 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
1191f0a4
ML
19 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
1da177e4
LT
21
22 The instructions are used only when the CPU supports them.
5644bda5
ML
23 Otherwise software encryption is used.
24
1da177e4 25config CRYPTO_DEV_PADLOCK_AES
1191f0a4 26 tristate "PadLock driver for AES algorithm"
1da177e4 27 depends on CRYPTO_DEV_PADLOCK
28ce728a 28 select CRYPTO_BLKCIPHER
7dc748e4 29 select CRYPTO_AES
1da177e4
LT
30 help
31 Use VIA PadLock for AES algorithm.
32
1191f0a4
ML
33 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
4737f097 36 called padlock-aes.
1191f0a4 37
6c833275
ML
38config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
bbbee467 41 select CRYPTO_HASH
6c833275
ML
42 select CRYPTO_SHA1
43 select CRYPTO_SHA256
6c833275
ML
44 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
4737f097 50 called padlock-sha.
6c833275 51
9fe757b0
JC
52config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
f6259dea 54 depends on X86_32 && PCI
9fe757b0
JC
55 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
9fe757b0
JC
57 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
3dde6ad8 59 engine for the CryptoAPI AES algorithm.
9fe757b0
JC
60
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
61d48c2c
MS
64config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
2f7c8bd6 67 select HW_RANDOM
61d48c2c
MS
68 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
cf2d007b
HD
76 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
61d48c2c 78
3f5615e0
JG
79config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
563f346d 82 select CRYPTO_HASH
3f5615e0
JG
83 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
d393d9b8
JG
87 It is available as of z990.
88
3f5615e0
JG
89config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
563f346d 92 select CRYPTO_HASH
3f5615e0
JG
93 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
d393d9b8 97 It is available as of z9.
3f5615e0 98
291dc7c0 99config CRYPTO_SHA512_S390
4e2c6d7f 100 tristate "SHA384 and SHA512 digest algorithm"
291dc7c0 101 depends on S390
563f346d 102 select CRYPTO_HASH
291dc7c0
JG
103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
d393d9b8 107 It is available as of z10.
291dc7c0 108
3f5615e0
JG
109config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
63291d40 114 select CRYPTO_DES
3f5615e0 115 help
0200f3ec 116 This is the s390 hardware accelerated implementation of the
3f5615e0
JG
117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
0200f3ec
GS
119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
3f5615e0
JG
122config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
99d97222
GS
129 AES cipher algorithms (FIPS-197).
130
131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
0200f3ec
GS
135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
99d97222 137 512 bit keys.
3f5615e0
JG
138
139config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
d393d9b8
JG
147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
3f5615e0 151
df1309ce
GS
152config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
f848dbd3
HB
162config CRYPTO_CRC32_S390
163 tristate "CRC-32 algorithms"
164 depends on S390
165 select CRYPTO_HASH
166 select CRC32
167 help
168 Select this option if you want to use hardware accelerated
169 implementations of CRC algorithms. With this option, you
170 can optimize the computation of CRC-32 (IEEE 802.3 Ethernet)
171 and CRC-32C (Castagnoli).
172
173 It is available with IBM z13 or later.
174
85a7f0ac
SAS
175config CRYPTO_DEV_MV_CESA
176 tristate "Marvell's Cryptographic Engine"
177 depends on PLAT_ORION
85a7f0ac 178 select CRYPTO_AES
596103cf 179 select CRYPTO_BLKCIPHER
1ebfefcf 180 select CRYPTO_HASH
51b44fc8 181 select SRAM
85a7f0ac
SAS
182 help
183 This driver allows you to utilize the Cryptographic Engines and
184 Security Accelerator (CESA) which can be found on the Marvell Orion
185 and Kirkwood SoCs, such as QNAP's TS-209.
186
187 Currently the driver supports AES in ECB and CBC mode without DMA.
188
f63601fd
BB
189config CRYPTO_DEV_MARVELL_CESA
190 tristate "New Marvell's Cryptographic Engine driver"
fe55dfdc 191 depends on PLAT_ORION || ARCH_MVEBU
f63601fd
BB
192 select CRYPTO_AES
193 select CRYPTO_DES
194 select CRYPTO_BLKCIPHER
195 select CRYPTO_HASH
196 select SRAM
197 help
198 This driver allows you to utilize the Cryptographic Engines and
199 Security Accelerator (CESA) which can be found on the Armada 370.
db509a45 200 This driver supports CPU offload through DMA transfers.
f63601fd
BB
201
202 This driver is aimed at replacing the mv_cesa driver. This will only
203 happen once it has received proper testing.
204
0a625fd2
DM
205config CRYPTO_DEV_NIAGARA2
206 tristate "Niagara2 Stream Processing Unit driver"
50e78161 207 select CRYPTO_DES
596103cf
HX
208 select CRYPTO_BLKCIPHER
209 select CRYPTO_HASH
8054b800
LC
210 select CRYPTO_MD5
211 select CRYPTO_SHA1
212 select CRYPTO_SHA256
0a625fd2
DM
213 depends on SPARC64
214 help
215 Each core of a Niagara2 processor contains a Stream
216 Processing Unit, which itself contains several cryptographic
217 sub-units. One set provides the Modular Arithmetic Unit,
218 used for SSL offload. The other set provides the Cipher
219 Group, which can perform encryption, decryption, hashing,
220 checksumming, and raw copies.
221
f7d0561e
EP
222config CRYPTO_DEV_HIFN_795X
223 tristate "Driver HIFN 795x crypto accelerator chips"
c3041f9c 224 select CRYPTO_DES
653ebd9c 225 select CRYPTO_BLKCIPHER
946fef4e 226 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
2707b937 227 depends on PCI
75b76625 228 depends on !ARCH_DMA_ADDR_T_64BIT
f7d0561e
EP
229 help
230 This option allows you to have support for HIFN 795x crypto adapters.
231
946fef4e
HX
232config CRYPTO_DEV_HIFN_795X_RNG
233 bool "HIFN 795x random number generator"
234 depends on CRYPTO_DEV_HIFN_795X
235 help
236 Select this option if you want to enable the random number generator
237 on the HIFN 795x crypto adapters.
f7d0561e 238
8e8ec596
KP
239source drivers/crypto/caam/Kconfig
240
9c4a7965
KP
241config CRYPTO_DEV_TALITOS
242 tristate "Talitos Freescale Security Engine (SEC)"
596103cf 243 select CRYPTO_AEAD
9c4a7965 244 select CRYPTO_AUTHENC
596103cf
HX
245 select CRYPTO_BLKCIPHER
246 select CRYPTO_HASH
9c4a7965
KP
247 select HW_RANDOM
248 depends on FSL_SOC
249 help
250 Say 'Y' here to use the Freescale Security Engine (SEC)
251 to offload cryptographic algorithm computation.
252
253 The Freescale SEC is present on PowerQUICC 'E' processors, such
254 as the MPC8349E and MPC8548E.
255
256 To compile this driver as a module, choose M here: the module
257 will be called talitos.
258
5b841a65
LC
259config CRYPTO_DEV_TALITOS1
260 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
261 depends on CRYPTO_DEV_TALITOS
262 depends on PPC_8xx || PPC_82xx
263 default y
264 help
265 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
266 found on MPC82xx or the Freescale Security Engine (SEC Lite)
267 version 1.2 found on MPC8xx
268
269config CRYPTO_DEV_TALITOS2
270 bool "SEC2+ (SEC version 2.0 or upper)"
271 depends on CRYPTO_DEV_TALITOS
272 default y if !PPC_8xx
273 help
274 Say 'Y' here to use the Freescale Security Engine (SEC)
275 version 2 and following as found on MPC83xx, MPC85xx, etc ...
276
81bef015
CH
277config CRYPTO_DEV_IXP4XX
278 tristate "Driver for IXP4xx crypto hardware acceleration"
9665c52b 279 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
81bef015 280 select CRYPTO_DES
596103cf 281 select CRYPTO_AEAD
090657e4 282 select CRYPTO_AUTHENC
81bef015
CH
283 select CRYPTO_BLKCIPHER
284 help
285 Driver for the IXP4xx NPE crypto engine.
286
049359d6
JH
287config CRYPTO_DEV_PPC4XX
288 tristate "Driver AMCC PPC4xx crypto accelerator"
289 depends on PPC && 4xx
290 select CRYPTO_HASH
049359d6
JH
291 select CRYPTO_BLKCIPHER
292 help
293 This option allows you to have support for AMCC crypto acceleration.
294
5343e674
CL
295config HW_RANDOM_PPC4XX
296 bool "PowerPC 4xx generic true random number generator support"
297 depends on CRYPTO_DEV_PPC4XX && HW_RANDOM
298 default y
299 ---help---
300 This option provides the kernel-side support for the TRNG hardware
301 found in the security function of some PowerPC 4xx SoCs.
302
8628e7c8 303config CRYPTO_DEV_OMAP_SHAM
eaef7e3f
LV
304 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
305 depends on ARCH_OMAP2PLUS
8628e7c8
DK
306 select CRYPTO_SHA1
307 select CRYPTO_MD5
eaef7e3f
LV
308 select CRYPTO_SHA256
309 select CRYPTO_SHA512
310 select CRYPTO_HMAC
8628e7c8 311 help
eaef7e3f
LV
312 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
313 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
8628e7c8 314
537559a5
DK
315config CRYPTO_DEV_OMAP_AES
316 tristate "Support for OMAP AES hw engine"
1bbf6437 317 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
537559a5 318 select CRYPTO_AES
596103cf 319 select CRYPTO_BLKCIPHER
0529900a 320 select CRYPTO_ENGINE
537559a5
DK
321 help
322 OMAP processors have AES module accelerator. Select this if you
323 want to use the OMAP module for AES algorithms.
324
701d0f19 325config CRYPTO_DEV_OMAP_DES
97ee7ed3 326 tristate "Support for OMAP DES/3DES hw engine"
701d0f19
JF
327 depends on ARCH_OMAP2PLUS
328 select CRYPTO_DES
596103cf 329 select CRYPTO_BLKCIPHER
f1b77aac 330 select CRYPTO_ENGINE
701d0f19
JF
331 help
332 OMAP processors have DES/3DES module accelerator. Select this if you
333 want to use the OMAP module for DES and 3DES algorithms. Currently
97ee7ed3
PM
334 the ECB and CBC modes of operation are supported by the driver. Also
335 accesses made on unaligned boundaries are supported.
701d0f19 336
ce921368
JI
337config CRYPTO_DEV_PICOXCELL
338 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
fad8fa47 339 depends on ARCH_PICOXCELL && HAVE_CLK
596103cf 340 select CRYPTO_AEAD
ce921368
JI
341 select CRYPTO_AES
342 select CRYPTO_AUTHENC
596103cf 343 select CRYPTO_BLKCIPHER
ce921368
JI
344 select CRYPTO_DES
345 select CRYPTO_CBC
346 select CRYPTO_ECB
347 select CRYPTO_SEQIV
348 help
349 This option enables support for the hardware offload engines in the
350 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
351 and for 3gpp Layer 2 ciphering support.
352
353 Saying m here will build a module named pipcoxcell_crypto.
354
5de88752
JM
355config CRYPTO_DEV_SAHARA
356 tristate "Support for SAHARA crypto accelerator"
74d24d83 357 depends on ARCH_MXC && OF
5de88752
JM
358 select CRYPTO_BLKCIPHER
359 select CRYPTO_AES
360 select CRYPTO_ECB
361 help
362 This option enables support for the SAHARA HW crypto accelerator
363 found in some Freescale i.MX chips.
364
d293b640
ST
365config CRYPTO_DEV_MXC_SCC
366 tristate "Support for Freescale Security Controller (SCC)"
367 depends on ARCH_MXC && OF
368 select CRYPTO_BLKCIPHER
369 select CRYPTO_DES
370 help
371 This option enables support for the Security Controller (SCC)
372 found in Freescale i.MX25 chips.
373
a49e490c 374config CRYPTO_DEV_S5P
e922e96f 375 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
dc1d9dee
KK
376 depends on ARCH_S5PV210 || ARCH_EXYNOS || COMPILE_TEST
377 depends on HAS_IOMEM && HAS_DMA
a49e490c 378 select CRYPTO_AES
a49e490c
VZ
379 select CRYPTO_BLKCIPHER
380 help
381 This option allows you to have support for S5P crypto acceleration.
e922e96f 382 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
a49e490c
VZ
383 algorithms execution.
384
aef7b31c 385config CRYPTO_DEV_NX
7011a122
DS
386 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
387 depends on PPC64
aef7b31c 388 help
7011a122
DS
389 This enables support for the NX hardware cryptographic accelerator
390 coprocessor that is in IBM PowerPC P7+ or later processors. This
391 does not actually enable any drivers, it only allows you to select
392 which acceleration type (encryption and/or compression) to enable.
322cacce
SJ
393
394if CRYPTO_DEV_NX
395 source "drivers/crypto/nx/Kconfig"
396endif
aef7b31c 397
2789c08f
AW
398config CRYPTO_DEV_UX500
399 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
400 depends on ARCH_U8500
2789c08f
AW
401 help
402 Driver for ST-Ericsson UX500 crypto engine.
403
404if CRYPTO_DEV_UX500
405 source "drivers/crypto/ux500/Kconfig"
406endif # if CRYPTO_DEV_UX500
407
b8840098
SZ
408config CRYPTO_DEV_BFIN_CRC
409 tristate "Support for Blackfin CRC hardware"
410 depends on BF60x
411 help
412 Newer Blackfin processors have CRC hardware. Select this if you
413 want to use the Blackfin CRC module.
414
bd3c7b5c
NR
415config CRYPTO_DEV_ATMEL_AES
416 tristate "Support for Atmel AES hw accelerator"
cbafd643 417 depends on HAS_DMA
56b85c9d 418 depends on AT_XDMAC || AT_HDMAC || COMPILE_TEST
bd3c7b5c 419 select CRYPTO_AES
d4419548 420 select CRYPTO_AEAD
bd3c7b5c 421 select CRYPTO_BLKCIPHER
bd3c7b5c
NR
422 help
423 Some Atmel processors have AES hw accelerator.
424 Select this if you want to use the Atmel module for
425 AES algorithms.
426
427 To compile this driver as a module, choose M here: the module
428 will be called atmel-aes.
429
13802005
NR
430config CRYPTO_DEV_ATMEL_TDES
431 tristate "Support for Atmel DES/TDES hw accelerator"
432 depends on ARCH_AT91
433 select CRYPTO_DES
13802005
NR
434 select CRYPTO_BLKCIPHER
435 help
436 Some Atmel processors have DES/TDES hw accelerator.
437 Select this if you want to use the Atmel module for
438 DES/TDES algorithms.
439
440 To compile this driver as a module, choose M here: the module
441 will be called atmel-tdes.
442
ebc82efa 443config CRYPTO_DEV_ATMEL_SHA
d4905b38 444 tristate "Support for Atmel SHA hw accelerator"
ebc82efa 445 depends on ARCH_AT91
596103cf 446 select CRYPTO_HASH
ebc82efa 447 help
d4905b38
NR
448 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
449 hw accelerator.
ebc82efa 450 Select this if you want to use the Atmel module for
d4905b38 451 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
ebc82efa
NR
452
453 To compile this driver as a module, choose M here: the module
454 will be called atmel-sha.
455
f1147660
TL
456config CRYPTO_DEV_CCP
457 bool "Support for AMD Cryptographic Coprocessor"
6c506343 458 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
f1147660 459 help
21dc9e8f 460 The AMD Cryptographic Coprocessor provides hardware offload support
f1147660
TL
461 for encryption, hashing and related operations.
462
463if CRYPTO_DEV_CCP
464 source "drivers/crypto/ccp/Kconfig"
465endif
466
15b59e7c
MV
467config CRYPTO_DEV_MXS_DCP
468 tristate "Support for Freescale MXS DCP"
a2712e6c 469 depends on (ARCH_MXS || ARCH_MXC)
dc97fa02 470 select STMP_DEVICE
15b59e7c
MV
471 select CRYPTO_CBC
472 select CRYPTO_ECB
473 select CRYPTO_AES
474 select CRYPTO_BLKCIPHER
596103cf 475 select CRYPTO_HASH
15b59e7c
MV
476 help
477 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
478 co-processor on the die.
479
480 To compile this driver as a module, choose M here: the module
481 will be called mxs-dcp.
482
cea4001a 483source "drivers/crypto/qat/Kconfig"
c672752d
SV
484
485config CRYPTO_DEV_QCE
486 tristate "Qualcomm crypto engine accelerator"
71d932d9 487 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
c672752d
SV
488 select CRYPTO_AES
489 select CRYPTO_DES
490 select CRYPTO_ECB
491 select CRYPTO_CBC
492 select CRYPTO_XTS
493 select CRYPTO_CTR
c672752d
SV
494 select CRYPTO_BLKCIPHER
495 help
496 This driver supports Qualcomm crypto engine accelerator
497 hardware. To compile this driver as a module, choose M here. The
498 module will be called qcrypto.
499
d2e3ae6f
LB
500config CRYPTO_DEV_VMX
501 bool "Support for VMX cryptographic acceleration instructions"
f1ab4287 502 depends on PPC64 && VSX
d2e3ae6f
LB
503 help
504 Support for VMX cryptographic acceleration instructions.
505
506source "drivers/crypto/vmx/Kconfig"
507
d358f1ab 508config CRYPTO_DEV_IMGTEC_HASH
d358f1ab 509 tristate "Imagination Technologies hardware hash accelerator"
8c98ebd7
GU
510 depends on MIPS || COMPILE_TEST
511 depends on HAS_DMA
d358f1ab
JH
512 select CRYPTO_MD5
513 select CRYPTO_SHA1
d358f1ab
JH
514 select CRYPTO_SHA256
515 select CRYPTO_HASH
516 help
517 This driver interfaces with the Imagination Technologies
518 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
519 hashing algorithms.
520
6298e948
LC
521config CRYPTO_DEV_SUN4I_SS
522 tristate "Support for Allwinner Security System cryptographic accelerator"
f823ab93 523 depends on ARCH_SUNXI && !64BIT
6298e948
LC
524 select CRYPTO_MD5
525 select CRYPTO_SHA1
526 select CRYPTO_AES
527 select CRYPTO_DES
528 select CRYPTO_BLKCIPHER
529 help
530 Some Allwinner SoC have a crypto accelerator named
531 Security System. Select this if you want to use it.
532 The Security System handle AES/DES/3DES ciphers in CBC mode
533 and SHA1 and MD5 hash algorithms.
534
535 To compile this driver as a module, choose M here: the module
536 will be called sun4i-ss.
537
433cd2c6
ZW
538config CRYPTO_DEV_ROCKCHIP
539 tristate "Rockchip's Cryptographic Engine driver"
540 depends on OF && ARCH_ROCKCHIP
541 select CRYPTO_AES
542 select CRYPTO_DES
bfd927ff
ZW
543 select CRYPTO_MD5
544 select CRYPTO_SHA1
545 select CRYPTO_SHA256
546 select CRYPTO_HASH
433cd2c6
ZW
547 select CRYPTO_BLKCIPHER
548
549 help
550 This driver interfaces with the hardware crypto accelerator.
551 Supporting cbc/ecb chainmode, and aes/des/des3_ede cipher mode.
552
02038fd6
HS
553source "drivers/crypto/chelsio/Kconfig"
554
b511431d 555endif # CRYPTO_HW
This page took 0.843772 seconds and 5 git commands to generate.