Commit | Line | Data |
---|---|---|
045e3678 YK |
1 | /* |
2 | * caam - Freescale FSL CAAM support for ahash functions of crypto API | |
3 | * | |
4 | * Copyright 2011 Freescale Semiconductor, Inc. | |
5 | * | |
6 | * Based on caamalg.c crypto API driver. | |
7 | * | |
8 | * relationship of digest job descriptor or first job descriptor after init to | |
9 | * shared descriptors: | |
10 | * | |
11 | * --------------- --------------- | |
12 | * | JobDesc #1 |-------------------->| ShareDesc | | |
13 | * | *(packet 1) | | (hashKey) | | |
14 | * --------------- | (operation) | | |
15 | * --------------- | |
16 | * | |
17 | * relationship of subsequent job descriptors to shared descriptors: | |
18 | * | |
19 | * --------------- --------------- | |
20 | * | JobDesc #2 |-------------------->| ShareDesc | | |
21 | * | *(packet 2) | |------------->| (hashKey) | | |
22 | * --------------- | |-------->| (operation) | | |
23 | * . | | | (load ctx2) | | |
24 | * . | | --------------- | |
25 | * --------------- | | | |
26 | * | JobDesc #3 |------| | | |
27 | * | *(packet 3) | | | |
28 | * --------------- | | |
29 | * . | | |
30 | * . | | |
31 | * --------------- | | |
32 | * | JobDesc #4 |------------ | |
33 | * | *(packet 4) | | |
34 | * --------------- | |
35 | * | |
36 | * The SharedDesc never changes for a connection unless rekeyed, but | |
37 | * each packet will likely be in a different place. So all we need | |
38 | * to know to process the packet is where the input is, where the | |
39 | * output goes, and what context we want to process with. Context is | |
40 | * in the SharedDesc, packet references in the JobDesc. | |
41 | * | |
42 | * So, a job desc looks like: | |
43 | * | |
44 | * --------------------- | |
45 | * | Header | | |
46 | * | ShareDesc Pointer | | |
47 | * | SEQ_OUT_PTR | | |
48 | * | (output buffer) | | |
49 | * | (output length) | | |
50 | * | SEQ_IN_PTR | | |
51 | * | (input buffer) | | |
52 | * | (input length) | | |
53 | * --------------------- | |
54 | */ | |
55 | ||
56 | #include "compat.h" | |
57 | ||
58 | #include "regs.h" | |
59 | #include "intern.h" | |
60 | #include "desc_constr.h" | |
61 | #include "jr.h" | |
62 | #include "error.h" | |
63 | #include "sg_sw_sec4.h" | |
64 | #include "key_gen.h" | |
65 | ||
66 | #define CAAM_CRA_PRIORITY 3000 | |
67 | ||
68 | /* max hash key is max split key size */ | |
69 | #define CAAM_MAX_HASH_KEY_SIZE (SHA512_DIGEST_SIZE * 2) | |
70 | ||
71 | #define CAAM_MAX_HASH_BLOCK_SIZE SHA512_BLOCK_SIZE | |
72 | #define CAAM_MAX_HASH_DIGEST_SIZE SHA512_DIGEST_SIZE | |
73 | ||
74 | /* length of descriptors text */ | |
045e3678 YK |
75 | #define DESC_AHASH_BASE (4 * CAAM_CMD_SZ) |
76 | #define DESC_AHASH_UPDATE_LEN (6 * CAAM_CMD_SZ) | |
77 | #define DESC_AHASH_UPDATE_FIRST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) | |
78 | #define DESC_AHASH_FINAL_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) | |
79 | #define DESC_AHASH_FINUP_LEN (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ) | |
80 | #define DESC_AHASH_DIGEST_LEN (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ) | |
81 | ||
82 | #define DESC_HASH_MAX_USED_BYTES (DESC_AHASH_FINAL_LEN + \ | |
83 | CAAM_MAX_HASH_KEY_SIZE) | |
84 | #define DESC_HASH_MAX_USED_LEN (DESC_HASH_MAX_USED_BYTES / CAAM_CMD_SZ) | |
85 | ||
86 | /* caam context sizes for hashes: running digest + 8 */ | |
87 | #define HASH_MSG_LEN 8 | |
88 | #define MAX_CTX_LEN (HASH_MSG_LEN + SHA512_DIGEST_SIZE) | |
89 | ||
90 | #ifdef DEBUG | |
91 | /* for print_hex_dumps with line references */ | |
045e3678 YK |
92 | #define debug(format, arg...) printk(format, arg) |
93 | #else | |
94 | #define debug(format, arg...) | |
95 | #endif | |
96 | ||
cfc6f11b RG |
97 | |
98 | static struct list_head hash_list; | |
99 | ||
045e3678 YK |
100 | /* ahash per-session context */ |
101 | struct caam_hash_ctx { | |
e11793f5 RK |
102 | u32 sh_desc_update[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; |
103 | u32 sh_desc_update_first[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; | |
104 | u32 sh_desc_fin[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; | |
105 | u32 sh_desc_digest[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; | |
106 | u32 sh_desc_finup[DESC_HASH_MAX_USED_LEN] ____cacheline_aligned; | |
107 | dma_addr_t sh_desc_update_dma ____cacheline_aligned; | |
045e3678 YK |
108 | dma_addr_t sh_desc_update_first_dma; |
109 | dma_addr_t sh_desc_fin_dma; | |
110 | dma_addr_t sh_desc_digest_dma; | |
111 | dma_addr_t sh_desc_finup_dma; | |
e11793f5 | 112 | struct device *jrdev; |
045e3678 YK |
113 | u32 alg_type; |
114 | u32 alg_op; | |
115 | u8 key[CAAM_MAX_HASH_KEY_SIZE]; | |
116 | dma_addr_t key_dma; | |
117 | int ctx_len; | |
118 | unsigned int split_key_len; | |
119 | unsigned int split_key_pad_len; | |
120 | }; | |
121 | ||
122 | /* ahash state */ | |
123 | struct caam_hash_state { | |
124 | dma_addr_t buf_dma; | |
125 | dma_addr_t ctx_dma; | |
126 | u8 buf_0[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned; | |
127 | int buflen_0; | |
128 | u8 buf_1[CAAM_MAX_HASH_BLOCK_SIZE] ____cacheline_aligned; | |
129 | int buflen_1; | |
e7472422 | 130 | u8 caam_ctx[MAX_CTX_LEN] ____cacheline_aligned; |
045e3678 YK |
131 | int (*update)(struct ahash_request *req); |
132 | int (*final)(struct ahash_request *req); | |
133 | int (*finup)(struct ahash_request *req); | |
134 | int current_buf; | |
135 | }; | |
136 | ||
5ec90831 RK |
137 | struct caam_export_state { |
138 | u8 buf[CAAM_MAX_HASH_BLOCK_SIZE]; | |
139 | u8 caam_ctx[MAX_CTX_LEN]; | |
140 | int buflen; | |
141 | int (*update)(struct ahash_request *req); | |
142 | int (*final)(struct ahash_request *req); | |
143 | int (*finup)(struct ahash_request *req); | |
144 | }; | |
145 | ||
045e3678 YK |
146 | /* Common job descriptor seq in/out ptr routines */ |
147 | ||
148 | /* Map state->caam_ctx, and append seq_out_ptr command that points to it */ | |
ce572085 HG |
149 | static inline int map_seq_out_ptr_ctx(u32 *desc, struct device *jrdev, |
150 | struct caam_hash_state *state, | |
151 | int ctx_len) | |
045e3678 YK |
152 | { |
153 | state->ctx_dma = dma_map_single(jrdev, state->caam_ctx, | |
154 | ctx_len, DMA_FROM_DEVICE); | |
ce572085 HG |
155 | if (dma_mapping_error(jrdev, state->ctx_dma)) { |
156 | dev_err(jrdev, "unable to map ctx\n"); | |
157 | return -ENOMEM; | |
158 | } | |
159 | ||
045e3678 | 160 | append_seq_out_ptr(desc, state->ctx_dma, ctx_len, 0); |
ce572085 HG |
161 | |
162 | return 0; | |
045e3678 YK |
163 | } |
164 | ||
165 | /* Map req->result, and append seq_out_ptr command that points to it */ | |
166 | static inline dma_addr_t map_seq_out_ptr_result(u32 *desc, struct device *jrdev, | |
167 | u8 *result, int digestsize) | |
168 | { | |
169 | dma_addr_t dst_dma; | |
170 | ||
171 | dst_dma = dma_map_single(jrdev, result, digestsize, DMA_FROM_DEVICE); | |
172 | append_seq_out_ptr(desc, dst_dma, digestsize, 0); | |
173 | ||
174 | return dst_dma; | |
175 | } | |
176 | ||
177 | /* Map current buffer in state and put it in link table */ | |
178 | static inline dma_addr_t buf_map_to_sec4_sg(struct device *jrdev, | |
179 | struct sec4_sg_entry *sec4_sg, | |
180 | u8 *buf, int buflen) | |
181 | { | |
182 | dma_addr_t buf_dma; | |
183 | ||
184 | buf_dma = dma_map_single(jrdev, buf, buflen, DMA_TO_DEVICE); | |
185 | dma_to_sec4_sg_one(sec4_sg, buf_dma, buflen, 0); | |
186 | ||
187 | return buf_dma; | |
188 | } | |
189 | ||
045e3678 YK |
190 | /* |
191 | * Only put buffer in link table if it contains data, which is possible, | |
192 | * since a buffer has previously been used, and needs to be unmapped, | |
193 | */ | |
194 | static inline dma_addr_t | |
195 | try_buf_map_to_sec4_sg(struct device *jrdev, struct sec4_sg_entry *sec4_sg, | |
196 | u8 *buf, dma_addr_t buf_dma, int buflen, | |
197 | int last_buflen) | |
198 | { | |
199 | if (buf_dma && !dma_mapping_error(jrdev, buf_dma)) | |
200 | dma_unmap_single(jrdev, buf_dma, last_buflen, DMA_TO_DEVICE); | |
201 | if (buflen) | |
202 | buf_dma = buf_map_to_sec4_sg(jrdev, sec4_sg, buf, buflen); | |
203 | else | |
204 | buf_dma = 0; | |
205 | ||
206 | return buf_dma; | |
207 | } | |
208 | ||
209 | /* Map state->caam_ctx, and add it to link table */ | |
ce572085 HG |
210 | static inline int ctx_map_to_sec4_sg(u32 *desc, struct device *jrdev, |
211 | struct caam_hash_state *state, int ctx_len, | |
212 | struct sec4_sg_entry *sec4_sg, u32 flag) | |
045e3678 YK |
213 | { |
214 | state->ctx_dma = dma_map_single(jrdev, state->caam_ctx, ctx_len, flag); | |
ce572085 HG |
215 | if (dma_mapping_error(jrdev, state->ctx_dma)) { |
216 | dev_err(jrdev, "unable to map ctx\n"); | |
217 | return -ENOMEM; | |
218 | } | |
219 | ||
045e3678 | 220 | dma_to_sec4_sg_one(sec4_sg, state->ctx_dma, ctx_len, 0); |
ce572085 HG |
221 | |
222 | return 0; | |
045e3678 YK |
223 | } |
224 | ||
225 | /* Common shared descriptor commands */ | |
226 | static inline void append_key_ahash(u32 *desc, struct caam_hash_ctx *ctx) | |
227 | { | |
228 | append_key_as_imm(desc, ctx->key, ctx->split_key_pad_len, | |
229 | ctx->split_key_len, CLASS_2 | | |
230 | KEY_DEST_MDHA_SPLIT | KEY_ENC); | |
231 | } | |
232 | ||
233 | /* Append key if it has been set */ | |
234 | static inline void init_sh_desc_key_ahash(u32 *desc, struct caam_hash_ctx *ctx) | |
235 | { | |
236 | u32 *key_jump_cmd; | |
237 | ||
61bb86bb | 238 | init_sh_desc(desc, HDR_SHARE_SERIAL); |
045e3678 YK |
239 | |
240 | if (ctx->split_key_len) { | |
241 | /* Skip if already shared */ | |
242 | key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL | | |
243 | JUMP_COND_SHRD); | |
244 | ||
245 | append_key_ahash(desc, ctx); | |
246 | ||
247 | set_jump_tgt_here(desc, key_jump_cmd); | |
248 | } | |
249 | ||
250 | /* Propagate errors from shared to job descriptor */ | |
251 | append_cmd(desc, SET_OK_NO_PROP_ERRORS | CMD_LOAD); | |
252 | } | |
253 | ||
254 | /* | |
255 | * For ahash read data from seqin following state->caam_ctx, | |
256 | * and write resulting class2 context to seqout, which may be state->caam_ctx | |
257 | * or req->result | |
258 | */ | |
259 | static inline void ahash_append_load_str(u32 *desc, int digestsize) | |
260 | { | |
261 | /* Calculate remaining bytes to read */ | |
262 | append_math_add(desc, VARSEQINLEN, SEQINLEN, REG0, CAAM_CMD_SZ); | |
263 | ||
264 | /* Read remaining bytes */ | |
265 | append_seq_fifo_load(desc, 0, FIFOLD_CLASS_CLASS2 | FIFOLD_TYPE_LAST2 | | |
266 | FIFOLD_TYPE_MSG | KEY_VLF); | |
267 | ||
268 | /* Store class2 context bytes */ | |
269 | append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | | |
270 | LDST_SRCDST_BYTE_CONTEXT); | |
271 | } | |
272 | ||
273 | /* | |
274 | * For ahash update, final and finup, import context, read and write to seqout | |
275 | */ | |
276 | static inline void ahash_ctx_data_to_out(u32 *desc, u32 op, u32 state, | |
277 | int digestsize, | |
278 | struct caam_hash_ctx *ctx) | |
279 | { | |
280 | init_sh_desc_key_ahash(desc, ctx); | |
281 | ||
282 | /* Import context from software */ | |
283 | append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT | | |
284 | LDST_CLASS_2_CCB | ctx->ctx_len); | |
285 | ||
286 | /* Class 2 operation */ | |
287 | append_operation(desc, op | state | OP_ALG_ENCRYPT); | |
288 | ||
289 | /* | |
290 | * Load from buf and/or src and write to req->result or state->context | |
291 | */ | |
292 | ahash_append_load_str(desc, digestsize); | |
293 | } | |
294 | ||
295 | /* For ahash firsts and digest, read and write to seqout */ | |
296 | static inline void ahash_data_to_out(u32 *desc, u32 op, u32 state, | |
297 | int digestsize, struct caam_hash_ctx *ctx) | |
298 | { | |
299 | init_sh_desc_key_ahash(desc, ctx); | |
300 | ||
301 | /* Class 2 operation */ | |
302 | append_operation(desc, op | state | OP_ALG_ENCRYPT); | |
303 | ||
304 | /* | |
305 | * Load from buf and/or src and write to req->result or state->context | |
306 | */ | |
307 | ahash_append_load_str(desc, digestsize); | |
308 | } | |
309 | ||
310 | static int ahash_set_sh_desc(struct crypto_ahash *ahash) | |
311 | { | |
312 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
313 | int digestsize = crypto_ahash_digestsize(ahash); | |
314 | struct device *jrdev = ctx->jrdev; | |
315 | u32 have_key = 0; | |
316 | u32 *desc; | |
317 | ||
318 | if (ctx->split_key_len) | |
319 | have_key = OP_ALG_AAI_HMAC_PRECOMP; | |
320 | ||
321 | /* ahash_update shared descriptor */ | |
322 | desc = ctx->sh_desc_update; | |
323 | ||
61bb86bb | 324 | init_sh_desc(desc, HDR_SHARE_SERIAL); |
045e3678 YK |
325 | |
326 | /* Import context from software */ | |
327 | append_cmd(desc, CMD_SEQ_LOAD | LDST_SRCDST_BYTE_CONTEXT | | |
328 | LDST_CLASS_2_CCB | ctx->ctx_len); | |
329 | ||
330 | /* Class 2 operation */ | |
331 | append_operation(desc, ctx->alg_type | OP_ALG_AS_UPDATE | | |
332 | OP_ALG_ENCRYPT); | |
333 | ||
334 | /* Load data and write to result or context */ | |
335 | ahash_append_load_str(desc, ctx->ctx_len); | |
336 | ||
337 | ctx->sh_desc_update_dma = dma_map_single(jrdev, desc, desc_bytes(desc), | |
338 | DMA_TO_DEVICE); | |
339 | if (dma_mapping_error(jrdev, ctx->sh_desc_update_dma)) { | |
340 | dev_err(jrdev, "unable to map shared descriptor\n"); | |
341 | return -ENOMEM; | |
342 | } | |
343 | #ifdef DEBUG | |
514df281 AP |
344 | print_hex_dump(KERN_ERR, |
345 | "ahash update shdesc@"__stringify(__LINE__)": ", | |
045e3678 YK |
346 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
347 | #endif | |
348 | ||
349 | /* ahash_update_first shared descriptor */ | |
350 | desc = ctx->sh_desc_update_first; | |
351 | ||
352 | ahash_data_to_out(desc, have_key | ctx->alg_type, OP_ALG_AS_INIT, | |
353 | ctx->ctx_len, ctx); | |
354 | ||
355 | ctx->sh_desc_update_first_dma = dma_map_single(jrdev, desc, | |
356 | desc_bytes(desc), | |
357 | DMA_TO_DEVICE); | |
358 | if (dma_mapping_error(jrdev, ctx->sh_desc_update_first_dma)) { | |
359 | dev_err(jrdev, "unable to map shared descriptor\n"); | |
360 | return -ENOMEM; | |
361 | } | |
362 | #ifdef DEBUG | |
514df281 AP |
363 | print_hex_dump(KERN_ERR, |
364 | "ahash update first shdesc@"__stringify(__LINE__)": ", | |
045e3678 YK |
365 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
366 | #endif | |
367 | ||
368 | /* ahash_final shared descriptor */ | |
369 | desc = ctx->sh_desc_fin; | |
370 | ||
371 | ahash_ctx_data_to_out(desc, have_key | ctx->alg_type, | |
372 | OP_ALG_AS_FINALIZE, digestsize, ctx); | |
373 | ||
374 | ctx->sh_desc_fin_dma = dma_map_single(jrdev, desc, desc_bytes(desc), | |
375 | DMA_TO_DEVICE); | |
376 | if (dma_mapping_error(jrdev, ctx->sh_desc_fin_dma)) { | |
377 | dev_err(jrdev, "unable to map shared descriptor\n"); | |
378 | return -ENOMEM; | |
379 | } | |
380 | #ifdef DEBUG | |
514df281 | 381 | print_hex_dump(KERN_ERR, "ahash final shdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
382 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
383 | desc_bytes(desc), 1); | |
384 | #endif | |
385 | ||
386 | /* ahash_finup shared descriptor */ | |
387 | desc = ctx->sh_desc_finup; | |
388 | ||
389 | ahash_ctx_data_to_out(desc, have_key | ctx->alg_type, | |
390 | OP_ALG_AS_FINALIZE, digestsize, ctx); | |
391 | ||
392 | ctx->sh_desc_finup_dma = dma_map_single(jrdev, desc, desc_bytes(desc), | |
393 | DMA_TO_DEVICE); | |
394 | if (dma_mapping_error(jrdev, ctx->sh_desc_finup_dma)) { | |
395 | dev_err(jrdev, "unable to map shared descriptor\n"); | |
396 | return -ENOMEM; | |
397 | } | |
398 | #ifdef DEBUG | |
514df281 | 399 | print_hex_dump(KERN_ERR, "ahash finup shdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
400 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
401 | desc_bytes(desc), 1); | |
402 | #endif | |
403 | ||
404 | /* ahash_digest shared descriptor */ | |
405 | desc = ctx->sh_desc_digest; | |
406 | ||
407 | ahash_data_to_out(desc, have_key | ctx->alg_type, OP_ALG_AS_INITFINAL, | |
408 | digestsize, ctx); | |
409 | ||
410 | ctx->sh_desc_digest_dma = dma_map_single(jrdev, desc, | |
411 | desc_bytes(desc), | |
412 | DMA_TO_DEVICE); | |
413 | if (dma_mapping_error(jrdev, ctx->sh_desc_digest_dma)) { | |
414 | dev_err(jrdev, "unable to map shared descriptor\n"); | |
415 | return -ENOMEM; | |
416 | } | |
417 | #ifdef DEBUG | |
514df281 AP |
418 | print_hex_dump(KERN_ERR, |
419 | "ahash digest shdesc@"__stringify(__LINE__)": ", | |
045e3678 YK |
420 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
421 | desc_bytes(desc), 1); | |
422 | #endif | |
423 | ||
424 | return 0; | |
425 | } | |
426 | ||
66b3e887 | 427 | static int gen_split_hash_key(struct caam_hash_ctx *ctx, const u8 *key_in, |
045e3678 YK |
428 | u32 keylen) |
429 | { | |
430 | return gen_split_key(ctx->jrdev, ctx->key, ctx->split_key_len, | |
431 | ctx->split_key_pad_len, key_in, keylen, | |
432 | ctx->alg_op); | |
433 | } | |
434 | ||
435 | /* Digest hash size if it is too large */ | |
66b3e887 | 436 | static int hash_digest_key(struct caam_hash_ctx *ctx, const u8 *key_in, |
045e3678 YK |
437 | u32 *keylen, u8 *key_out, u32 digestsize) |
438 | { | |
439 | struct device *jrdev = ctx->jrdev; | |
440 | u32 *desc; | |
441 | struct split_key_result result; | |
442 | dma_addr_t src_dma, dst_dma; | |
443 | int ret = 0; | |
444 | ||
9c23b7d3 | 445 | desc = kmalloc(CAAM_CMD_SZ * 8 + CAAM_PTR_SZ * 2, GFP_KERNEL | GFP_DMA); |
2af8f4a2 KP |
446 | if (!desc) { |
447 | dev_err(jrdev, "unable to allocate key input memory\n"); | |
448 | return -ENOMEM; | |
449 | } | |
045e3678 YK |
450 | |
451 | init_job_desc(desc, 0); | |
452 | ||
453 | src_dma = dma_map_single(jrdev, (void *)key_in, *keylen, | |
454 | DMA_TO_DEVICE); | |
455 | if (dma_mapping_error(jrdev, src_dma)) { | |
456 | dev_err(jrdev, "unable to map key input memory\n"); | |
457 | kfree(desc); | |
458 | return -ENOMEM; | |
459 | } | |
460 | dst_dma = dma_map_single(jrdev, (void *)key_out, digestsize, | |
461 | DMA_FROM_DEVICE); | |
462 | if (dma_mapping_error(jrdev, dst_dma)) { | |
463 | dev_err(jrdev, "unable to map key output memory\n"); | |
464 | dma_unmap_single(jrdev, src_dma, *keylen, DMA_TO_DEVICE); | |
465 | kfree(desc); | |
466 | return -ENOMEM; | |
467 | } | |
468 | ||
469 | /* Job descriptor to perform unkeyed hash on key_in */ | |
470 | append_operation(desc, ctx->alg_type | OP_ALG_ENCRYPT | | |
471 | OP_ALG_AS_INITFINAL); | |
472 | append_seq_in_ptr(desc, src_dma, *keylen, 0); | |
473 | append_seq_fifo_load(desc, *keylen, FIFOLD_CLASS_CLASS2 | | |
474 | FIFOLD_TYPE_LAST2 | FIFOLD_TYPE_MSG); | |
475 | append_seq_out_ptr(desc, dst_dma, digestsize, 0); | |
476 | append_seq_store(desc, digestsize, LDST_CLASS_2_CCB | | |
477 | LDST_SRCDST_BYTE_CONTEXT); | |
478 | ||
479 | #ifdef DEBUG | |
514df281 | 480 | print_hex_dump(KERN_ERR, "key_in@"__stringify(__LINE__)": ", |
045e3678 | 481 | DUMP_PREFIX_ADDRESS, 16, 4, key_in, *keylen, 1); |
514df281 | 482 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
483 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
484 | #endif | |
485 | ||
486 | result.err = 0; | |
487 | init_completion(&result.completion); | |
488 | ||
489 | ret = caam_jr_enqueue(jrdev, desc, split_key_done, &result); | |
490 | if (!ret) { | |
491 | /* in progress */ | |
492 | wait_for_completion_interruptible(&result.completion); | |
493 | ret = result.err; | |
494 | #ifdef DEBUG | |
514df281 AP |
495 | print_hex_dump(KERN_ERR, |
496 | "digested key@"__stringify(__LINE__)": ", | |
045e3678 YK |
497 | DUMP_PREFIX_ADDRESS, 16, 4, key_in, |
498 | digestsize, 1); | |
499 | #endif | |
500 | } | |
045e3678 YK |
501 | dma_unmap_single(jrdev, src_dma, *keylen, DMA_TO_DEVICE); |
502 | dma_unmap_single(jrdev, dst_dma, digestsize, DMA_FROM_DEVICE); | |
503 | ||
e11aa9f1 HG |
504 | *keylen = digestsize; |
505 | ||
045e3678 YK |
506 | kfree(desc); |
507 | ||
508 | return ret; | |
509 | } | |
510 | ||
511 | static int ahash_setkey(struct crypto_ahash *ahash, | |
512 | const u8 *key, unsigned int keylen) | |
513 | { | |
514 | /* Sizes for MDHA pads (*not* keys): MD5, SHA1, 224, 256, 384, 512 */ | |
515 | static const u8 mdpadlen[] = { 16, 20, 32, 32, 64, 64 }; | |
516 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
517 | struct device *jrdev = ctx->jrdev; | |
518 | int blocksize = crypto_tfm_alg_blocksize(&ahash->base); | |
519 | int digestsize = crypto_ahash_digestsize(ahash); | |
520 | int ret = 0; | |
521 | u8 *hashed_key = NULL; | |
522 | ||
523 | #ifdef DEBUG | |
524 | printk(KERN_ERR "keylen %d\n", keylen); | |
525 | #endif | |
526 | ||
527 | if (keylen > blocksize) { | |
528 | hashed_key = kmalloc(sizeof(u8) * digestsize, GFP_KERNEL | | |
529 | GFP_DMA); | |
530 | if (!hashed_key) | |
531 | return -ENOMEM; | |
532 | ret = hash_digest_key(ctx, key, &keylen, hashed_key, | |
533 | digestsize); | |
534 | if (ret) | |
535 | goto badkey; | |
536 | key = hashed_key; | |
537 | } | |
538 | ||
539 | /* Pick class 2 key length from algorithm submask */ | |
540 | ctx->split_key_len = mdpadlen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >> | |
541 | OP_ALG_ALGSEL_SHIFT] * 2; | |
542 | ctx->split_key_pad_len = ALIGN(ctx->split_key_len, 16); | |
543 | ||
544 | #ifdef DEBUG | |
545 | printk(KERN_ERR "split_key_len %d split_key_pad_len %d\n", | |
546 | ctx->split_key_len, ctx->split_key_pad_len); | |
514df281 | 547 | print_hex_dump(KERN_ERR, "key in @"__stringify(__LINE__)": ", |
045e3678 YK |
548 | DUMP_PREFIX_ADDRESS, 16, 4, key, keylen, 1); |
549 | #endif | |
550 | ||
551 | ret = gen_split_hash_key(ctx, key, keylen); | |
552 | if (ret) | |
553 | goto badkey; | |
554 | ||
555 | ctx->key_dma = dma_map_single(jrdev, ctx->key, ctx->split_key_pad_len, | |
556 | DMA_TO_DEVICE); | |
557 | if (dma_mapping_error(jrdev, ctx->key_dma)) { | |
558 | dev_err(jrdev, "unable to map key i/o memory\n"); | |
3d67be27 HG |
559 | ret = -ENOMEM; |
560 | goto map_err; | |
045e3678 YK |
561 | } |
562 | #ifdef DEBUG | |
514df281 | 563 | print_hex_dump(KERN_ERR, "ctx.key@"__stringify(__LINE__)": ", |
045e3678 YK |
564 | DUMP_PREFIX_ADDRESS, 16, 4, ctx->key, |
565 | ctx->split_key_pad_len, 1); | |
566 | #endif | |
567 | ||
568 | ret = ahash_set_sh_desc(ahash); | |
569 | if (ret) { | |
570 | dma_unmap_single(jrdev, ctx->key_dma, ctx->split_key_pad_len, | |
571 | DMA_TO_DEVICE); | |
572 | } | |
573 | ||
3d67be27 | 574 | map_err: |
045e3678 YK |
575 | kfree(hashed_key); |
576 | return ret; | |
577 | badkey: | |
578 | kfree(hashed_key); | |
579 | crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); | |
580 | return -EINVAL; | |
581 | } | |
582 | ||
583 | /* | |
584 | * ahash_edesc - s/w-extended ahash descriptor | |
585 | * @dst_dma: physical mapped address of req->result | |
586 | * @sec4_sg_dma: physical mapped address of h/w link table | |
587 | * @src_nents: number of segments in input scatterlist | |
588 | * @sec4_sg_bytes: length of dma mapped sec4_sg space | |
045e3678 | 589 | * @hw_desc: the h/w job descriptor followed by any referenced link tables |
343e44b1 | 590 | * @sec4_sg: h/w link table |
045e3678 YK |
591 | */ |
592 | struct ahash_edesc { | |
593 | dma_addr_t dst_dma; | |
594 | dma_addr_t sec4_sg_dma; | |
595 | int src_nents; | |
596 | int sec4_sg_bytes; | |
d7b24ed4 | 597 | u32 hw_desc[DESC_JOB_IO_LEN / sizeof(u32)] ____cacheline_aligned; |
343e44b1 | 598 | struct sec4_sg_entry sec4_sg[0]; |
045e3678 YK |
599 | }; |
600 | ||
601 | static inline void ahash_unmap(struct device *dev, | |
602 | struct ahash_edesc *edesc, | |
603 | struct ahash_request *req, int dst_len) | |
604 | { | |
605 | if (edesc->src_nents) | |
13fb8fd7 | 606 | dma_unmap_sg(dev, req->src, edesc->src_nents, DMA_TO_DEVICE); |
045e3678 YK |
607 | if (edesc->dst_dma) |
608 | dma_unmap_single(dev, edesc->dst_dma, dst_len, DMA_FROM_DEVICE); | |
609 | ||
610 | if (edesc->sec4_sg_bytes) | |
611 | dma_unmap_single(dev, edesc->sec4_sg_dma, | |
612 | edesc->sec4_sg_bytes, DMA_TO_DEVICE); | |
613 | } | |
614 | ||
615 | static inline void ahash_unmap_ctx(struct device *dev, | |
616 | struct ahash_edesc *edesc, | |
617 | struct ahash_request *req, int dst_len, u32 flag) | |
618 | { | |
619 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
620 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
621 | struct caam_hash_state *state = ahash_request_ctx(req); | |
622 | ||
623 | if (state->ctx_dma) | |
624 | dma_unmap_single(dev, state->ctx_dma, ctx->ctx_len, flag); | |
625 | ahash_unmap(dev, edesc, req, dst_len); | |
626 | } | |
627 | ||
628 | static void ahash_done(struct device *jrdev, u32 *desc, u32 err, | |
629 | void *context) | |
630 | { | |
631 | struct ahash_request *req = context; | |
632 | struct ahash_edesc *edesc; | |
633 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
634 | int digestsize = crypto_ahash_digestsize(ahash); | |
635 | #ifdef DEBUG | |
636 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
637 | struct caam_hash_state *state = ahash_request_ctx(req); | |
638 | ||
639 | dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); | |
640 | #endif | |
641 | ||
642 | edesc = (struct ahash_edesc *)((char *)desc - | |
643 | offsetof(struct ahash_edesc, hw_desc)); | |
fa9659cd MV |
644 | if (err) |
645 | caam_jr_strstatus(jrdev, err); | |
045e3678 YK |
646 | |
647 | ahash_unmap(jrdev, edesc, req, digestsize); | |
648 | kfree(edesc); | |
649 | ||
650 | #ifdef DEBUG | |
514df281 | 651 | print_hex_dump(KERN_ERR, "ctx@"__stringify(__LINE__)": ", |
045e3678 YK |
652 | DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, |
653 | ctx->ctx_len, 1); | |
654 | if (req->result) | |
514df281 | 655 | print_hex_dump(KERN_ERR, "result@"__stringify(__LINE__)": ", |
045e3678 YK |
656 | DUMP_PREFIX_ADDRESS, 16, 4, req->result, |
657 | digestsize, 1); | |
658 | #endif | |
659 | ||
660 | req->base.complete(&req->base, err); | |
661 | } | |
662 | ||
663 | static void ahash_done_bi(struct device *jrdev, u32 *desc, u32 err, | |
664 | void *context) | |
665 | { | |
666 | struct ahash_request *req = context; | |
667 | struct ahash_edesc *edesc; | |
668 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
669 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
670 | #ifdef DEBUG | |
671 | struct caam_hash_state *state = ahash_request_ctx(req); | |
672 | int digestsize = crypto_ahash_digestsize(ahash); | |
673 | ||
674 | dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); | |
675 | #endif | |
676 | ||
677 | edesc = (struct ahash_edesc *)((char *)desc - | |
678 | offsetof(struct ahash_edesc, hw_desc)); | |
fa9659cd MV |
679 | if (err) |
680 | caam_jr_strstatus(jrdev, err); | |
045e3678 YK |
681 | |
682 | ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_BIDIRECTIONAL); | |
683 | kfree(edesc); | |
684 | ||
685 | #ifdef DEBUG | |
514df281 | 686 | print_hex_dump(KERN_ERR, "ctx@"__stringify(__LINE__)": ", |
045e3678 YK |
687 | DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, |
688 | ctx->ctx_len, 1); | |
689 | if (req->result) | |
514df281 | 690 | print_hex_dump(KERN_ERR, "result@"__stringify(__LINE__)": ", |
045e3678 YK |
691 | DUMP_PREFIX_ADDRESS, 16, 4, req->result, |
692 | digestsize, 1); | |
693 | #endif | |
694 | ||
695 | req->base.complete(&req->base, err); | |
696 | } | |
697 | ||
698 | static void ahash_done_ctx_src(struct device *jrdev, u32 *desc, u32 err, | |
699 | void *context) | |
700 | { | |
701 | struct ahash_request *req = context; | |
702 | struct ahash_edesc *edesc; | |
703 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
704 | int digestsize = crypto_ahash_digestsize(ahash); | |
705 | #ifdef DEBUG | |
706 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
707 | struct caam_hash_state *state = ahash_request_ctx(req); | |
708 | ||
709 | dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); | |
710 | #endif | |
711 | ||
712 | edesc = (struct ahash_edesc *)((char *)desc - | |
713 | offsetof(struct ahash_edesc, hw_desc)); | |
fa9659cd MV |
714 | if (err) |
715 | caam_jr_strstatus(jrdev, err); | |
045e3678 | 716 | |
bc9e05f9 | 717 | ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_TO_DEVICE); |
045e3678 YK |
718 | kfree(edesc); |
719 | ||
720 | #ifdef DEBUG | |
514df281 | 721 | print_hex_dump(KERN_ERR, "ctx@"__stringify(__LINE__)": ", |
045e3678 YK |
722 | DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, |
723 | ctx->ctx_len, 1); | |
724 | if (req->result) | |
514df281 | 725 | print_hex_dump(KERN_ERR, "result@"__stringify(__LINE__)": ", |
045e3678 YK |
726 | DUMP_PREFIX_ADDRESS, 16, 4, req->result, |
727 | digestsize, 1); | |
728 | #endif | |
729 | ||
730 | req->base.complete(&req->base, err); | |
731 | } | |
732 | ||
733 | static void ahash_done_ctx_dst(struct device *jrdev, u32 *desc, u32 err, | |
734 | void *context) | |
735 | { | |
736 | struct ahash_request *req = context; | |
737 | struct ahash_edesc *edesc; | |
738 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
739 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
740 | #ifdef DEBUG | |
741 | struct caam_hash_state *state = ahash_request_ctx(req); | |
742 | int digestsize = crypto_ahash_digestsize(ahash); | |
743 | ||
744 | dev_err(jrdev, "%s %d: err 0x%x\n", __func__, __LINE__, err); | |
745 | #endif | |
746 | ||
747 | edesc = (struct ahash_edesc *)((char *)desc - | |
748 | offsetof(struct ahash_edesc, hw_desc)); | |
fa9659cd MV |
749 | if (err) |
750 | caam_jr_strstatus(jrdev, err); | |
045e3678 | 751 | |
ef62b231 | 752 | ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_FROM_DEVICE); |
045e3678 YK |
753 | kfree(edesc); |
754 | ||
755 | #ifdef DEBUG | |
514df281 | 756 | print_hex_dump(KERN_ERR, "ctx@"__stringify(__LINE__)": ", |
045e3678 YK |
757 | DUMP_PREFIX_ADDRESS, 16, 4, state->caam_ctx, |
758 | ctx->ctx_len, 1); | |
759 | if (req->result) | |
514df281 | 760 | print_hex_dump(KERN_ERR, "result@"__stringify(__LINE__)": ", |
045e3678 YK |
761 | DUMP_PREFIX_ADDRESS, 16, 4, req->result, |
762 | digestsize, 1); | |
763 | #endif | |
764 | ||
765 | req->base.complete(&req->base, err); | |
766 | } | |
767 | ||
5588d039 RK |
768 | /* |
769 | * Allocate an enhanced descriptor, which contains the hardware descriptor | |
770 | * and space for hardware scatter table containing sg_num entries. | |
771 | */ | |
772 | static struct ahash_edesc *ahash_edesc_alloc(struct caam_hash_ctx *ctx, | |
30a43b44 RK |
773 | int sg_num, u32 *sh_desc, |
774 | dma_addr_t sh_desc_dma, | |
775 | gfp_t flags) | |
5588d039 RK |
776 | { |
777 | struct ahash_edesc *edesc; | |
778 | unsigned int sg_size = sg_num * sizeof(struct sec4_sg_entry); | |
779 | ||
780 | edesc = kzalloc(sizeof(*edesc) + sg_size, GFP_DMA | flags); | |
781 | if (!edesc) { | |
782 | dev_err(ctx->jrdev, "could not allocate extended descriptor\n"); | |
783 | return NULL; | |
784 | } | |
785 | ||
30a43b44 RK |
786 | init_job_desc_shared(edesc->hw_desc, sh_desc_dma, desc_len(sh_desc), |
787 | HDR_SHARE_DEFER | HDR_REVERSE); | |
788 | ||
5588d039 RK |
789 | return edesc; |
790 | } | |
791 | ||
65cf164a RK |
792 | static int ahash_edesc_add_src(struct caam_hash_ctx *ctx, |
793 | struct ahash_edesc *edesc, | |
794 | struct ahash_request *req, int nents, | |
795 | unsigned int first_sg, | |
796 | unsigned int first_bytes, size_t to_hash) | |
797 | { | |
798 | dma_addr_t src_dma; | |
799 | u32 options; | |
800 | ||
801 | if (nents > 1 || first_sg) { | |
802 | struct sec4_sg_entry *sg = edesc->sec4_sg; | |
803 | unsigned int sgsize = sizeof(*sg) * (first_sg + nents); | |
804 | ||
805 | sg_to_sec4_sg_last(req->src, nents, sg + first_sg, 0); | |
806 | ||
807 | src_dma = dma_map_single(ctx->jrdev, sg, sgsize, DMA_TO_DEVICE); | |
808 | if (dma_mapping_error(ctx->jrdev, src_dma)) { | |
809 | dev_err(ctx->jrdev, "unable to map S/G table\n"); | |
810 | return -ENOMEM; | |
811 | } | |
812 | ||
813 | edesc->sec4_sg_bytes = sgsize; | |
814 | edesc->sec4_sg_dma = src_dma; | |
815 | options = LDST_SGF; | |
816 | } else { | |
817 | src_dma = sg_dma_address(req->src); | |
818 | options = 0; | |
819 | } | |
820 | ||
821 | append_seq_in_ptr(edesc->hw_desc, src_dma, first_bytes + to_hash, | |
822 | options); | |
823 | ||
824 | return 0; | |
825 | } | |
826 | ||
045e3678 YK |
827 | /* submit update job descriptor */ |
828 | static int ahash_update_ctx(struct ahash_request *req) | |
829 | { | |
830 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
831 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
832 | struct caam_hash_state *state = ahash_request_ctx(req); | |
833 | struct device *jrdev = ctx->jrdev; | |
834 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
835 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
836 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
837 | int *buflen = state->current_buf ? &state->buflen_1 : &state->buflen_0; | |
838 | u8 *next_buf = state->current_buf ? state->buf_0 : state->buf_1; | |
839 | int *next_buflen = state->current_buf ? &state->buflen_0 : | |
840 | &state->buflen_1, last_buflen; | |
841 | int in_len = *buflen + req->nbytes, to_hash; | |
30a43b44 | 842 | u32 *desc; |
bc13c69e | 843 | int src_nents, mapped_nents, sec4_sg_bytes, sec4_sg_src_index; |
045e3678 YK |
844 | struct ahash_edesc *edesc; |
845 | int ret = 0; | |
045e3678 YK |
846 | |
847 | last_buflen = *next_buflen; | |
848 | *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1); | |
849 | to_hash = in_len - *next_buflen; | |
850 | ||
851 | if (to_hash) { | |
13fb8fd7 LC |
852 | src_nents = sg_nents_for_len(req->src, |
853 | req->nbytes - (*next_buflen)); | |
f9970c28 LC |
854 | if (src_nents < 0) { |
855 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
856 | return src_nents; | |
857 | } | |
bc13c69e RK |
858 | |
859 | if (src_nents) { | |
860 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
861 | DMA_TO_DEVICE); | |
862 | if (!mapped_nents) { | |
863 | dev_err(jrdev, "unable to DMA map source\n"); | |
864 | return -ENOMEM; | |
865 | } | |
866 | } else { | |
867 | mapped_nents = 0; | |
868 | } | |
869 | ||
045e3678 | 870 | sec4_sg_src_index = 1 + (*buflen ? 1 : 0); |
bc13c69e | 871 | sec4_sg_bytes = (sec4_sg_src_index + mapped_nents) * |
045e3678 YK |
872 | sizeof(struct sec4_sg_entry); |
873 | ||
874 | /* | |
875 | * allocate space for base edesc and hw desc commands, | |
876 | * link tables | |
877 | */ | |
5588d039 | 878 | edesc = ahash_edesc_alloc(ctx, sec4_sg_src_index + mapped_nents, |
30a43b44 RK |
879 | ctx->sh_desc_update, |
880 | ctx->sh_desc_update_dma, flags); | |
045e3678 | 881 | if (!edesc) { |
bc13c69e | 882 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
883 | return -ENOMEM; |
884 | } | |
885 | ||
886 | edesc->src_nents = src_nents; | |
887 | edesc->sec4_sg_bytes = sec4_sg_bytes; | |
045e3678 | 888 | |
ce572085 HG |
889 | ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, |
890 | edesc->sec4_sg, DMA_BIDIRECTIONAL); | |
891 | if (ret) | |
32686d34 | 892 | goto err; |
045e3678 YK |
893 | |
894 | state->buf_dma = try_buf_map_to_sec4_sg(jrdev, | |
895 | edesc->sec4_sg + 1, | |
896 | buf, state->buf_dma, | |
c7556ff7 | 897 | *buflen, last_buflen); |
045e3678 | 898 | |
bc13c69e RK |
899 | if (mapped_nents) { |
900 | sg_to_sec4_sg_last(req->src, mapped_nents, | |
901 | edesc->sec4_sg + sec4_sg_src_index, | |
902 | 0); | |
8af7b0f8 | 903 | if (*next_buflen) |
307fd543 CS |
904 | scatterwalk_map_and_copy(next_buf, req->src, |
905 | to_hash - *buflen, | |
906 | *next_buflen, 0); | |
045e3678 YK |
907 | } else { |
908 | (edesc->sec4_sg + sec4_sg_src_index - 1)->len |= | |
261ea058 | 909 | cpu_to_caam32(SEC4_SG_LEN_FIN); |
045e3678 YK |
910 | } |
911 | ||
8af7b0f8 VM |
912 | state->current_buf = !state->current_buf; |
913 | ||
045e3678 | 914 | desc = edesc->hw_desc; |
045e3678 | 915 | |
1da2be33 RG |
916 | edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, |
917 | sec4_sg_bytes, | |
918 | DMA_TO_DEVICE); | |
ce572085 HG |
919 | if (dma_mapping_error(jrdev, edesc->sec4_sg_dma)) { |
920 | dev_err(jrdev, "unable to map S/G table\n"); | |
32686d34 RK |
921 | ret = -ENOMEM; |
922 | goto err; | |
ce572085 | 923 | } |
1da2be33 | 924 | |
045e3678 YK |
925 | append_seq_in_ptr(desc, edesc->sec4_sg_dma, ctx->ctx_len + |
926 | to_hash, LDST_SGF); | |
927 | ||
928 | append_seq_out_ptr(desc, state->ctx_dma, ctx->ctx_len, 0); | |
929 | ||
930 | #ifdef DEBUG | |
514df281 | 931 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
932 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
933 | desc_bytes(desc), 1); | |
934 | #endif | |
935 | ||
936 | ret = caam_jr_enqueue(jrdev, desc, ahash_done_bi, req); | |
32686d34 RK |
937 | if (ret) |
938 | goto err; | |
939 | ||
940 | ret = -EINPROGRESS; | |
045e3678 | 941 | } else if (*next_buflen) { |
307fd543 CS |
942 | scatterwalk_map_and_copy(buf + *buflen, req->src, 0, |
943 | req->nbytes, 0); | |
045e3678 YK |
944 | *buflen = *next_buflen; |
945 | *next_buflen = last_buflen; | |
946 | } | |
947 | #ifdef DEBUG | |
514df281 | 948 | print_hex_dump(KERN_ERR, "buf@"__stringify(__LINE__)": ", |
045e3678 | 949 | DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1); |
514df281 | 950 | print_hex_dump(KERN_ERR, "next buf@"__stringify(__LINE__)": ", |
045e3678 YK |
951 | DUMP_PREFIX_ADDRESS, 16, 4, next_buf, |
952 | *next_buflen, 1); | |
953 | #endif | |
954 | ||
955 | return ret; | |
32686d34 RK |
956 | |
957 | err: | |
958 | ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_BIDIRECTIONAL); | |
959 | kfree(edesc); | |
960 | return ret; | |
045e3678 YK |
961 | } |
962 | ||
963 | static int ahash_final_ctx(struct ahash_request *req) | |
964 | { | |
965 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
966 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
967 | struct caam_hash_state *state = ahash_request_ctx(req); | |
968 | struct device *jrdev = ctx->jrdev; | |
969 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
970 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
971 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
972 | int buflen = state->current_buf ? state->buflen_1 : state->buflen_0; | |
973 | int last_buflen = state->current_buf ? state->buflen_0 : | |
974 | state->buflen_1; | |
30a43b44 | 975 | u32 *desc; |
b310c178 | 976 | int sec4_sg_bytes, sec4_sg_src_index; |
045e3678 YK |
977 | int digestsize = crypto_ahash_digestsize(ahash); |
978 | struct ahash_edesc *edesc; | |
979 | int ret = 0; | |
045e3678 | 980 | |
b310c178 HG |
981 | sec4_sg_src_index = 1 + (buflen ? 1 : 0); |
982 | sec4_sg_bytes = sec4_sg_src_index * sizeof(struct sec4_sg_entry); | |
045e3678 YK |
983 | |
984 | /* allocate space for base edesc and hw desc commands, link tables */ | |
30a43b44 RK |
985 | edesc = ahash_edesc_alloc(ctx, sec4_sg_src_index, |
986 | ctx->sh_desc_fin, ctx->sh_desc_fin_dma, | |
987 | flags); | |
5588d039 | 988 | if (!edesc) |
045e3678 | 989 | return -ENOMEM; |
045e3678 | 990 | |
045e3678 | 991 | desc = edesc->hw_desc; |
045e3678 YK |
992 | |
993 | edesc->sec4_sg_bytes = sec4_sg_bytes; | |
045e3678 YK |
994 | edesc->src_nents = 0; |
995 | ||
ce572085 HG |
996 | ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, |
997 | edesc->sec4_sg, DMA_TO_DEVICE); | |
998 | if (ret) | |
32686d34 | 999 | goto err; |
045e3678 YK |
1000 | |
1001 | state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1, | |
1002 | buf, state->buf_dma, buflen, | |
1003 | last_buflen); | |
261ea058 HG |
1004 | (edesc->sec4_sg + sec4_sg_src_index - 1)->len |= |
1005 | cpu_to_caam32(SEC4_SG_LEN_FIN); | |
045e3678 | 1006 | |
1da2be33 RG |
1007 | edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, |
1008 | sec4_sg_bytes, DMA_TO_DEVICE); | |
ce572085 HG |
1009 | if (dma_mapping_error(jrdev, edesc->sec4_sg_dma)) { |
1010 | dev_err(jrdev, "unable to map S/G table\n"); | |
32686d34 RK |
1011 | ret = -ENOMEM; |
1012 | goto err; | |
ce572085 | 1013 | } |
1da2be33 | 1014 | |
045e3678 YK |
1015 | append_seq_in_ptr(desc, edesc->sec4_sg_dma, ctx->ctx_len + buflen, |
1016 | LDST_SGF); | |
1017 | ||
1018 | edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result, | |
1019 | digestsize); | |
ce572085 HG |
1020 | if (dma_mapping_error(jrdev, edesc->dst_dma)) { |
1021 | dev_err(jrdev, "unable to map dst\n"); | |
32686d34 RK |
1022 | ret = -ENOMEM; |
1023 | goto err; | |
ce572085 | 1024 | } |
045e3678 YK |
1025 | |
1026 | #ifdef DEBUG | |
514df281 | 1027 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1028 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
1029 | #endif | |
1030 | ||
1031 | ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_src, req); | |
32686d34 RK |
1032 | if (ret) |
1033 | goto err; | |
045e3678 | 1034 | |
32686d34 RK |
1035 | return -EINPROGRESS; |
1036 | ||
1037 | err: | |
1038 | ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_FROM_DEVICE); | |
1039 | kfree(edesc); | |
045e3678 YK |
1040 | return ret; |
1041 | } | |
1042 | ||
1043 | static int ahash_finup_ctx(struct ahash_request *req) | |
1044 | { | |
1045 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1046 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1047 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1048 | struct device *jrdev = ctx->jrdev; | |
1049 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1050 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
1051 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
1052 | int buflen = state->current_buf ? state->buflen_1 : state->buflen_0; | |
1053 | int last_buflen = state->current_buf ? state->buflen_0 : | |
1054 | state->buflen_1; | |
30a43b44 | 1055 | u32 *desc; |
65cf164a | 1056 | int sec4_sg_src_index; |
bc13c69e | 1057 | int src_nents, mapped_nents; |
045e3678 YK |
1058 | int digestsize = crypto_ahash_digestsize(ahash); |
1059 | struct ahash_edesc *edesc; | |
1060 | int ret = 0; | |
045e3678 | 1061 | |
13fb8fd7 | 1062 | src_nents = sg_nents_for_len(req->src, req->nbytes); |
f9970c28 LC |
1063 | if (src_nents < 0) { |
1064 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
1065 | return src_nents; | |
1066 | } | |
bc13c69e RK |
1067 | |
1068 | if (src_nents) { | |
1069 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
1070 | DMA_TO_DEVICE); | |
1071 | if (!mapped_nents) { | |
1072 | dev_err(jrdev, "unable to DMA map source\n"); | |
1073 | return -ENOMEM; | |
1074 | } | |
1075 | } else { | |
1076 | mapped_nents = 0; | |
1077 | } | |
1078 | ||
045e3678 | 1079 | sec4_sg_src_index = 1 + (buflen ? 1 : 0); |
045e3678 YK |
1080 | |
1081 | /* allocate space for base edesc and hw desc commands, link tables */ | |
5588d039 | 1082 | edesc = ahash_edesc_alloc(ctx, sec4_sg_src_index + mapped_nents, |
30a43b44 | 1083 | ctx->sh_desc_finup, ctx->sh_desc_finup_dma, |
5588d039 | 1084 | flags); |
045e3678 | 1085 | if (!edesc) { |
bc13c69e | 1086 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
1087 | return -ENOMEM; |
1088 | } | |
1089 | ||
045e3678 | 1090 | desc = edesc->hw_desc; |
045e3678 YK |
1091 | |
1092 | edesc->src_nents = src_nents; | |
045e3678 | 1093 | |
ce572085 HG |
1094 | ret = ctx_map_to_sec4_sg(desc, jrdev, state, ctx->ctx_len, |
1095 | edesc->sec4_sg, DMA_TO_DEVICE); | |
1096 | if (ret) | |
32686d34 | 1097 | goto err; |
045e3678 YK |
1098 | |
1099 | state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg + 1, | |
1100 | buf, state->buf_dma, buflen, | |
1101 | last_buflen); | |
1102 | ||
65cf164a RK |
1103 | ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, |
1104 | sec4_sg_src_index, ctx->ctx_len + buflen, | |
1105 | req->nbytes); | |
1106 | if (ret) | |
32686d34 | 1107 | goto err; |
045e3678 YK |
1108 | |
1109 | edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result, | |
1110 | digestsize); | |
ce572085 HG |
1111 | if (dma_mapping_error(jrdev, edesc->dst_dma)) { |
1112 | dev_err(jrdev, "unable to map dst\n"); | |
32686d34 RK |
1113 | ret = -ENOMEM; |
1114 | goto err; | |
ce572085 | 1115 | } |
045e3678 YK |
1116 | |
1117 | #ifdef DEBUG | |
514df281 | 1118 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1119 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
1120 | #endif | |
1121 | ||
1122 | ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_src, req); | |
32686d34 RK |
1123 | if (ret) |
1124 | goto err; | |
045e3678 | 1125 | |
32686d34 RK |
1126 | return -EINPROGRESS; |
1127 | ||
1128 | err: | |
1129 | ahash_unmap_ctx(jrdev, edesc, req, digestsize, DMA_FROM_DEVICE); | |
1130 | kfree(edesc); | |
045e3678 YK |
1131 | return ret; |
1132 | } | |
1133 | ||
1134 | static int ahash_digest(struct ahash_request *req) | |
1135 | { | |
1136 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1137 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1138 | struct device *jrdev = ctx->jrdev; | |
1139 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1140 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
30a43b44 | 1141 | u32 *desc; |
045e3678 | 1142 | int digestsize = crypto_ahash_digestsize(ahash); |
65cf164a | 1143 | int src_nents, mapped_nents; |
045e3678 YK |
1144 | struct ahash_edesc *edesc; |
1145 | int ret = 0; | |
045e3678 | 1146 | |
3d5a2db6 | 1147 | src_nents = sg_nents_for_len(req->src, req->nbytes); |
f9970c28 LC |
1148 | if (src_nents < 0) { |
1149 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
1150 | return src_nents; | |
1151 | } | |
bc13c69e RK |
1152 | |
1153 | if (src_nents) { | |
1154 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
1155 | DMA_TO_DEVICE); | |
1156 | if (!mapped_nents) { | |
1157 | dev_err(jrdev, "unable to map source for DMA\n"); | |
1158 | return -ENOMEM; | |
1159 | } | |
1160 | } else { | |
1161 | mapped_nents = 0; | |
1162 | } | |
1163 | ||
045e3678 | 1164 | /* allocate space for base edesc and hw desc commands, link tables */ |
5588d039 | 1165 | edesc = ahash_edesc_alloc(ctx, mapped_nents > 1 ? mapped_nents : 0, |
30a43b44 | 1166 | ctx->sh_desc_digest, ctx->sh_desc_digest_dma, |
5588d039 | 1167 | flags); |
045e3678 | 1168 | if (!edesc) { |
bc13c69e | 1169 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
1170 | return -ENOMEM; |
1171 | } | |
343e44b1 | 1172 | |
045e3678 YK |
1173 | edesc->src_nents = src_nents; |
1174 | ||
65cf164a RK |
1175 | ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 0, 0, |
1176 | req->nbytes); | |
1177 | if (ret) { | |
1178 | ahash_unmap(jrdev, edesc, req, digestsize); | |
1179 | kfree(edesc); | |
1180 | return ret; | |
045e3678 | 1181 | } |
65cf164a RK |
1182 | |
1183 | desc = edesc->hw_desc; | |
045e3678 YK |
1184 | |
1185 | edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result, | |
1186 | digestsize); | |
ce572085 HG |
1187 | if (dma_mapping_error(jrdev, edesc->dst_dma)) { |
1188 | dev_err(jrdev, "unable to map dst\n"); | |
32686d34 RK |
1189 | ahash_unmap(jrdev, edesc, req, digestsize); |
1190 | kfree(edesc); | |
ce572085 HG |
1191 | return -ENOMEM; |
1192 | } | |
045e3678 YK |
1193 | |
1194 | #ifdef DEBUG | |
514df281 | 1195 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1196 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
1197 | #endif | |
1198 | ||
1199 | ret = caam_jr_enqueue(jrdev, desc, ahash_done, req); | |
1200 | if (!ret) { | |
1201 | ret = -EINPROGRESS; | |
1202 | } else { | |
1203 | ahash_unmap(jrdev, edesc, req, digestsize); | |
1204 | kfree(edesc); | |
1205 | } | |
1206 | ||
1207 | return ret; | |
1208 | } | |
1209 | ||
1210 | /* submit ahash final if it the first job descriptor */ | |
1211 | static int ahash_final_no_ctx(struct ahash_request *req) | |
1212 | { | |
1213 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1214 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1215 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1216 | struct device *jrdev = ctx->jrdev; | |
1217 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1218 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
1219 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
1220 | int buflen = state->current_buf ? state->buflen_1 : state->buflen_0; | |
30a43b44 | 1221 | u32 *desc; |
045e3678 YK |
1222 | int digestsize = crypto_ahash_digestsize(ahash); |
1223 | struct ahash_edesc *edesc; | |
1224 | int ret = 0; | |
045e3678 YK |
1225 | |
1226 | /* allocate space for base edesc and hw desc commands, link tables */ | |
30a43b44 RK |
1227 | edesc = ahash_edesc_alloc(ctx, 0, ctx->sh_desc_digest, |
1228 | ctx->sh_desc_digest_dma, flags); | |
5588d039 | 1229 | if (!edesc) |
045e3678 | 1230 | return -ENOMEM; |
045e3678 | 1231 | |
045e3678 | 1232 | desc = edesc->hw_desc; |
045e3678 YK |
1233 | |
1234 | state->buf_dma = dma_map_single(jrdev, buf, buflen, DMA_TO_DEVICE); | |
ce572085 HG |
1235 | if (dma_mapping_error(jrdev, state->buf_dma)) { |
1236 | dev_err(jrdev, "unable to map src\n"); | |
32686d34 RK |
1237 | ahash_unmap(jrdev, edesc, req, digestsize); |
1238 | kfree(edesc); | |
ce572085 HG |
1239 | return -ENOMEM; |
1240 | } | |
045e3678 YK |
1241 | |
1242 | append_seq_in_ptr(desc, state->buf_dma, buflen, 0); | |
1243 | ||
1244 | edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result, | |
1245 | digestsize); | |
ce572085 HG |
1246 | if (dma_mapping_error(jrdev, edesc->dst_dma)) { |
1247 | dev_err(jrdev, "unable to map dst\n"); | |
32686d34 RK |
1248 | ahash_unmap(jrdev, edesc, req, digestsize); |
1249 | kfree(edesc); | |
ce572085 HG |
1250 | return -ENOMEM; |
1251 | } | |
045e3678 YK |
1252 | edesc->src_nents = 0; |
1253 | ||
1254 | #ifdef DEBUG | |
514df281 | 1255 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1256 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
1257 | #endif | |
1258 | ||
1259 | ret = caam_jr_enqueue(jrdev, desc, ahash_done, req); | |
1260 | if (!ret) { | |
1261 | ret = -EINPROGRESS; | |
1262 | } else { | |
1263 | ahash_unmap(jrdev, edesc, req, digestsize); | |
1264 | kfree(edesc); | |
1265 | } | |
1266 | ||
1267 | return ret; | |
1268 | } | |
1269 | ||
1270 | /* submit ahash update if it the first job descriptor after update */ | |
1271 | static int ahash_update_no_ctx(struct ahash_request *req) | |
1272 | { | |
1273 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1274 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1275 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1276 | struct device *jrdev = ctx->jrdev; | |
1277 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1278 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
1279 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
1280 | int *buflen = state->current_buf ? &state->buflen_1 : &state->buflen_0; | |
1281 | u8 *next_buf = state->current_buf ? state->buf_0 : state->buf_1; | |
1282 | int *next_buflen = state->current_buf ? &state->buflen_0 : | |
1283 | &state->buflen_1; | |
1284 | int in_len = *buflen + req->nbytes, to_hash; | |
bc13c69e | 1285 | int sec4_sg_bytes, src_nents, mapped_nents; |
045e3678 | 1286 | struct ahash_edesc *edesc; |
30a43b44 | 1287 | u32 *desc; |
045e3678 | 1288 | int ret = 0; |
045e3678 YK |
1289 | |
1290 | *next_buflen = in_len & (crypto_tfm_alg_blocksize(&ahash->base) - 1); | |
1291 | to_hash = in_len - *next_buflen; | |
1292 | ||
1293 | if (to_hash) { | |
13fb8fd7 | 1294 | src_nents = sg_nents_for_len(req->src, |
3d5a2db6 | 1295 | req->nbytes - *next_buflen); |
f9970c28 LC |
1296 | if (src_nents < 0) { |
1297 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
1298 | return src_nents; | |
1299 | } | |
bc13c69e RK |
1300 | |
1301 | if (src_nents) { | |
1302 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
1303 | DMA_TO_DEVICE); | |
1304 | if (!mapped_nents) { | |
1305 | dev_err(jrdev, "unable to DMA map source\n"); | |
1306 | return -ENOMEM; | |
1307 | } | |
1308 | } else { | |
1309 | mapped_nents = 0; | |
1310 | } | |
1311 | ||
1312 | sec4_sg_bytes = (1 + mapped_nents) * | |
045e3678 YK |
1313 | sizeof(struct sec4_sg_entry); |
1314 | ||
1315 | /* | |
1316 | * allocate space for base edesc and hw desc commands, | |
1317 | * link tables | |
1318 | */ | |
30a43b44 RK |
1319 | edesc = ahash_edesc_alloc(ctx, 1 + mapped_nents, |
1320 | ctx->sh_desc_update_first, | |
1321 | ctx->sh_desc_update_first_dma, | |
1322 | flags); | |
045e3678 | 1323 | if (!edesc) { |
bc13c69e | 1324 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
1325 | return -ENOMEM; |
1326 | } | |
1327 | ||
1328 | edesc->src_nents = src_nents; | |
1329 | edesc->sec4_sg_bytes = sec4_sg_bytes; | |
76b99080 | 1330 | edesc->dst_dma = 0; |
045e3678 YK |
1331 | |
1332 | state->buf_dma = buf_map_to_sec4_sg(jrdev, edesc->sec4_sg, | |
1333 | buf, *buflen); | |
bc13c69e RK |
1334 | sg_to_sec4_sg_last(req->src, mapped_nents, |
1335 | edesc->sec4_sg + 1, 0); | |
1336 | ||
045e3678 | 1337 | if (*next_buflen) { |
307fd543 CS |
1338 | scatterwalk_map_and_copy(next_buf, req->src, |
1339 | to_hash - *buflen, | |
1340 | *next_buflen, 0); | |
045e3678 YK |
1341 | } |
1342 | ||
8af7b0f8 VM |
1343 | state->current_buf = !state->current_buf; |
1344 | ||
045e3678 | 1345 | desc = edesc->hw_desc; |
045e3678 | 1346 | |
1da2be33 RG |
1347 | edesc->sec4_sg_dma = dma_map_single(jrdev, edesc->sec4_sg, |
1348 | sec4_sg_bytes, | |
1349 | DMA_TO_DEVICE); | |
ce572085 HG |
1350 | if (dma_mapping_error(jrdev, edesc->sec4_sg_dma)) { |
1351 | dev_err(jrdev, "unable to map S/G table\n"); | |
32686d34 RK |
1352 | ret = -ENOMEM; |
1353 | goto err; | |
ce572085 | 1354 | } |
1da2be33 | 1355 | |
045e3678 YK |
1356 | append_seq_in_ptr(desc, edesc->sec4_sg_dma, to_hash, LDST_SGF); |
1357 | ||
ce572085 HG |
1358 | ret = map_seq_out_ptr_ctx(desc, jrdev, state, ctx->ctx_len); |
1359 | if (ret) | |
32686d34 | 1360 | goto err; |
045e3678 YK |
1361 | |
1362 | #ifdef DEBUG | |
514df281 | 1363 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1364 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
1365 | desc_bytes(desc), 1); | |
1366 | #endif | |
1367 | ||
1368 | ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_dst, req); | |
32686d34 RK |
1369 | if (ret) |
1370 | goto err; | |
1371 | ||
1372 | ret = -EINPROGRESS; | |
1373 | state->update = ahash_update_ctx; | |
1374 | state->finup = ahash_finup_ctx; | |
1375 | state->final = ahash_final_ctx; | |
045e3678 | 1376 | } else if (*next_buflen) { |
307fd543 CS |
1377 | scatterwalk_map_and_copy(buf + *buflen, req->src, 0, |
1378 | req->nbytes, 0); | |
045e3678 YK |
1379 | *buflen = *next_buflen; |
1380 | *next_buflen = 0; | |
1381 | } | |
1382 | #ifdef DEBUG | |
514df281 | 1383 | print_hex_dump(KERN_ERR, "buf@"__stringify(__LINE__)": ", |
045e3678 | 1384 | DUMP_PREFIX_ADDRESS, 16, 4, buf, *buflen, 1); |
514df281 | 1385 | print_hex_dump(KERN_ERR, "next buf@"__stringify(__LINE__)": ", |
045e3678 YK |
1386 | DUMP_PREFIX_ADDRESS, 16, 4, next_buf, |
1387 | *next_buflen, 1); | |
1388 | #endif | |
1389 | ||
1390 | return ret; | |
32686d34 RK |
1391 | |
1392 | err: | |
1393 | ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_TO_DEVICE); | |
1394 | kfree(edesc); | |
1395 | return ret; | |
045e3678 YK |
1396 | } |
1397 | ||
1398 | /* submit ahash finup if it the first job descriptor after update */ | |
1399 | static int ahash_finup_no_ctx(struct ahash_request *req) | |
1400 | { | |
1401 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1402 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1403 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1404 | struct device *jrdev = ctx->jrdev; | |
1405 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1406 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
1407 | u8 *buf = state->current_buf ? state->buf_1 : state->buf_0; | |
1408 | int buflen = state->current_buf ? state->buflen_1 : state->buflen_0; | |
1409 | int last_buflen = state->current_buf ? state->buflen_0 : | |
1410 | state->buflen_1; | |
30a43b44 | 1411 | u32 *desc; |
bc13c69e | 1412 | int sec4_sg_bytes, sec4_sg_src_index, src_nents, mapped_nents; |
045e3678 YK |
1413 | int digestsize = crypto_ahash_digestsize(ahash); |
1414 | struct ahash_edesc *edesc; | |
045e3678 YK |
1415 | int ret = 0; |
1416 | ||
13fb8fd7 | 1417 | src_nents = sg_nents_for_len(req->src, req->nbytes); |
f9970c28 LC |
1418 | if (src_nents < 0) { |
1419 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
1420 | return src_nents; | |
1421 | } | |
bc13c69e RK |
1422 | |
1423 | if (src_nents) { | |
1424 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
1425 | DMA_TO_DEVICE); | |
1426 | if (!mapped_nents) { | |
1427 | dev_err(jrdev, "unable to DMA map source\n"); | |
1428 | return -ENOMEM; | |
1429 | } | |
1430 | } else { | |
1431 | mapped_nents = 0; | |
1432 | } | |
1433 | ||
045e3678 | 1434 | sec4_sg_src_index = 2; |
bc13c69e | 1435 | sec4_sg_bytes = (sec4_sg_src_index + mapped_nents) * |
045e3678 YK |
1436 | sizeof(struct sec4_sg_entry); |
1437 | ||
1438 | /* allocate space for base edesc and hw desc commands, link tables */ | |
30a43b44 RK |
1439 | edesc = ahash_edesc_alloc(ctx, sec4_sg_src_index + mapped_nents, |
1440 | ctx->sh_desc_digest, ctx->sh_desc_digest_dma, | |
1441 | flags); | |
045e3678 | 1442 | if (!edesc) { |
bc13c69e | 1443 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
1444 | return -ENOMEM; |
1445 | } | |
1446 | ||
045e3678 | 1447 | desc = edesc->hw_desc; |
045e3678 YK |
1448 | |
1449 | edesc->src_nents = src_nents; | |
1450 | edesc->sec4_sg_bytes = sec4_sg_bytes; | |
045e3678 YK |
1451 | |
1452 | state->buf_dma = try_buf_map_to_sec4_sg(jrdev, edesc->sec4_sg, buf, | |
1453 | state->buf_dma, buflen, | |
1454 | last_buflen); | |
1455 | ||
65cf164a RK |
1456 | ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 1, buflen, |
1457 | req->nbytes); | |
1458 | if (ret) { | |
ce572085 | 1459 | dev_err(jrdev, "unable to map S/G table\n"); |
32686d34 RK |
1460 | ahash_unmap(jrdev, edesc, req, digestsize); |
1461 | kfree(edesc); | |
ce572085 HG |
1462 | return -ENOMEM; |
1463 | } | |
1da2be33 | 1464 | |
045e3678 YK |
1465 | edesc->dst_dma = map_seq_out_ptr_result(desc, jrdev, req->result, |
1466 | digestsize); | |
ce572085 HG |
1467 | if (dma_mapping_error(jrdev, edesc->dst_dma)) { |
1468 | dev_err(jrdev, "unable to map dst\n"); | |
32686d34 RK |
1469 | ahash_unmap(jrdev, edesc, req, digestsize); |
1470 | kfree(edesc); | |
ce572085 HG |
1471 | return -ENOMEM; |
1472 | } | |
045e3678 YK |
1473 | |
1474 | #ifdef DEBUG | |
514df281 | 1475 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1476 | DUMP_PREFIX_ADDRESS, 16, 4, desc, desc_bytes(desc), 1); |
1477 | #endif | |
1478 | ||
1479 | ret = caam_jr_enqueue(jrdev, desc, ahash_done, req); | |
1480 | if (!ret) { | |
1481 | ret = -EINPROGRESS; | |
1482 | } else { | |
1483 | ahash_unmap(jrdev, edesc, req, digestsize); | |
1484 | kfree(edesc); | |
1485 | } | |
1486 | ||
1487 | return ret; | |
1488 | } | |
1489 | ||
1490 | /* submit first update job descriptor after init */ | |
1491 | static int ahash_update_first(struct ahash_request *req) | |
1492 | { | |
1493 | struct crypto_ahash *ahash = crypto_ahash_reqtfm(req); | |
1494 | struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash); | |
1495 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1496 | struct device *jrdev = ctx->jrdev; | |
1497 | gfp_t flags = (req->base.flags & (CRYPTO_TFM_REQ_MAY_BACKLOG | | |
1498 | CRYPTO_TFM_REQ_MAY_SLEEP)) ? GFP_KERNEL : GFP_ATOMIC; | |
4451d494 CS |
1499 | u8 *next_buf = state->current_buf ? state->buf_1 : state->buf_0; |
1500 | int *next_buflen = state->current_buf ? | |
1501 | &state->buflen_1 : &state->buflen_0; | |
045e3678 | 1502 | int to_hash; |
30a43b44 | 1503 | u32 *desc; |
65cf164a | 1504 | int src_nents, mapped_nents; |
045e3678 YK |
1505 | struct ahash_edesc *edesc; |
1506 | int ret = 0; | |
045e3678 YK |
1507 | |
1508 | *next_buflen = req->nbytes & (crypto_tfm_alg_blocksize(&ahash->base) - | |
1509 | 1); | |
1510 | to_hash = req->nbytes - *next_buflen; | |
1511 | ||
1512 | if (to_hash) { | |
3d5a2db6 RK |
1513 | src_nents = sg_nents_for_len(req->src, |
1514 | req->nbytes - *next_buflen); | |
f9970c28 LC |
1515 | if (src_nents < 0) { |
1516 | dev_err(jrdev, "Invalid number of src SG.\n"); | |
1517 | return src_nents; | |
1518 | } | |
bc13c69e RK |
1519 | |
1520 | if (src_nents) { | |
1521 | mapped_nents = dma_map_sg(jrdev, req->src, src_nents, | |
1522 | DMA_TO_DEVICE); | |
1523 | if (!mapped_nents) { | |
1524 | dev_err(jrdev, "unable to map source for DMA\n"); | |
1525 | return -ENOMEM; | |
1526 | } | |
1527 | } else { | |
1528 | mapped_nents = 0; | |
1529 | } | |
045e3678 YK |
1530 | |
1531 | /* | |
1532 | * allocate space for base edesc and hw desc commands, | |
1533 | * link tables | |
1534 | */ | |
5588d039 | 1535 | edesc = ahash_edesc_alloc(ctx, mapped_nents > 1 ? |
30a43b44 RK |
1536 | mapped_nents : 0, |
1537 | ctx->sh_desc_update_first, | |
1538 | ctx->sh_desc_update_first_dma, | |
1539 | flags); | |
045e3678 | 1540 | if (!edesc) { |
bc13c69e | 1541 | dma_unmap_sg(jrdev, req->src, src_nents, DMA_TO_DEVICE); |
045e3678 YK |
1542 | return -ENOMEM; |
1543 | } | |
1544 | ||
1545 | edesc->src_nents = src_nents; | |
76b99080 | 1546 | edesc->dst_dma = 0; |
045e3678 | 1547 | |
65cf164a RK |
1548 | ret = ahash_edesc_add_src(ctx, edesc, req, mapped_nents, 0, 0, |
1549 | to_hash); | |
1550 | if (ret) | |
1551 | goto err; | |
045e3678 YK |
1552 | |
1553 | if (*next_buflen) | |
307fd543 CS |
1554 | scatterwalk_map_and_copy(next_buf, req->src, to_hash, |
1555 | *next_buflen, 0); | |
045e3678 | 1556 | |
045e3678 | 1557 | desc = edesc->hw_desc; |
045e3678 | 1558 | |
ce572085 HG |
1559 | ret = map_seq_out_ptr_ctx(desc, jrdev, state, ctx->ctx_len); |
1560 | if (ret) | |
32686d34 | 1561 | goto err; |
045e3678 YK |
1562 | |
1563 | #ifdef DEBUG | |
514df281 | 1564 | print_hex_dump(KERN_ERR, "jobdesc@"__stringify(__LINE__)": ", |
045e3678 YK |
1565 | DUMP_PREFIX_ADDRESS, 16, 4, desc, |
1566 | desc_bytes(desc), 1); | |
1567 | #endif | |
1568 | ||
32686d34 RK |
1569 | ret = caam_jr_enqueue(jrdev, desc, ahash_done_ctx_dst, req); |
1570 | if (ret) | |
1571 | goto err; | |
1572 | ||
1573 | ret = -EINPROGRESS; | |
1574 | state->update = ahash_update_ctx; | |
1575 | state->finup = ahash_finup_ctx; | |
1576 | state->final = ahash_final_ctx; | |
045e3678 YK |
1577 | } else if (*next_buflen) { |
1578 | state->update = ahash_update_no_ctx; | |
1579 | state->finup = ahash_finup_no_ctx; | |
1580 | state->final = ahash_final_no_ctx; | |
307fd543 CS |
1581 | scatterwalk_map_and_copy(next_buf, req->src, 0, |
1582 | req->nbytes, 0); | |
045e3678 YK |
1583 | } |
1584 | #ifdef DEBUG | |
514df281 | 1585 | print_hex_dump(KERN_ERR, "next buf@"__stringify(__LINE__)": ", |
045e3678 YK |
1586 | DUMP_PREFIX_ADDRESS, 16, 4, next_buf, |
1587 | *next_buflen, 1); | |
1588 | #endif | |
1589 | ||
1590 | return ret; | |
32686d34 RK |
1591 | |
1592 | err: | |
1593 | ahash_unmap_ctx(jrdev, edesc, req, ctx->ctx_len, DMA_TO_DEVICE); | |
1594 | kfree(edesc); | |
1595 | return ret; | |
045e3678 YK |
1596 | } |
1597 | ||
1598 | static int ahash_finup_first(struct ahash_request *req) | |
1599 | { | |
1600 | return ahash_digest(req); | |
1601 | } | |
1602 | ||
1603 | static int ahash_init(struct ahash_request *req) | |
1604 | { | |
1605 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1606 | ||
1607 | state->update = ahash_update_first; | |
1608 | state->finup = ahash_finup_first; | |
1609 | state->final = ahash_final_no_ctx; | |
1610 | ||
1611 | state->current_buf = 0; | |
de0e35ec | 1612 | state->buf_dma = 0; |
6fd4b156 SC |
1613 | state->buflen_0 = 0; |
1614 | state->buflen_1 = 0; | |
045e3678 YK |
1615 | |
1616 | return 0; | |
1617 | } | |
1618 | ||
1619 | static int ahash_update(struct ahash_request *req) | |
1620 | { | |
1621 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1622 | ||
1623 | return state->update(req); | |
1624 | } | |
1625 | ||
1626 | static int ahash_finup(struct ahash_request *req) | |
1627 | { | |
1628 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1629 | ||
1630 | return state->finup(req); | |
1631 | } | |
1632 | ||
1633 | static int ahash_final(struct ahash_request *req) | |
1634 | { | |
1635 | struct caam_hash_state *state = ahash_request_ctx(req); | |
1636 | ||
1637 | return state->final(req); | |
1638 | } | |
1639 | ||
1640 | static int ahash_export(struct ahash_request *req, void *out) | |
1641 | { | |
045e3678 | 1642 | struct caam_hash_state *state = ahash_request_ctx(req); |
5ec90831 RK |
1643 | struct caam_export_state *export = out; |
1644 | int len; | |
1645 | u8 *buf; | |
045e3678 | 1646 | |
5ec90831 RK |
1647 | if (state->current_buf) { |
1648 | buf = state->buf_1; | |
1649 | len = state->buflen_1; | |
1650 | } else { | |
1651 | buf = state->buf_0; | |
f456cd2d | 1652 | len = state->buflen_0; |
5ec90831 RK |
1653 | } |
1654 | ||
1655 | memcpy(export->buf, buf, len); | |
1656 | memcpy(export->caam_ctx, state->caam_ctx, sizeof(export->caam_ctx)); | |
1657 | export->buflen = len; | |
1658 | export->update = state->update; | |
1659 | export->final = state->final; | |
1660 | export->finup = state->finup; | |
434b4212 | 1661 | |
045e3678 YK |
1662 | return 0; |
1663 | } | |
1664 | ||
1665 | static int ahash_import(struct ahash_request *req, const void *in) | |
1666 | { | |
045e3678 | 1667 | struct caam_hash_state *state = ahash_request_ctx(req); |
5ec90831 | 1668 | const struct caam_export_state *export = in; |
045e3678 | 1669 | |
5ec90831 RK |
1670 | memset(state, 0, sizeof(*state)); |
1671 | memcpy(state->buf_0, export->buf, export->buflen); | |
1672 | memcpy(state->caam_ctx, export->caam_ctx, sizeof(state->caam_ctx)); | |
1673 | state->buflen_0 = export->buflen; | |
1674 | state->update = export->update; | |
1675 | state->final = export->final; | |
1676 | state->finup = export->finup; | |
434b4212 | 1677 | |
045e3678 YK |
1678 | return 0; |
1679 | } | |
1680 | ||
1681 | struct caam_hash_template { | |
1682 | char name[CRYPTO_MAX_ALG_NAME]; | |
1683 | char driver_name[CRYPTO_MAX_ALG_NAME]; | |
b0e09bae YK |
1684 | char hmac_name[CRYPTO_MAX_ALG_NAME]; |
1685 | char hmac_driver_name[CRYPTO_MAX_ALG_NAME]; | |
045e3678 YK |
1686 | unsigned int blocksize; |
1687 | struct ahash_alg template_ahash; | |
1688 | u32 alg_type; | |
1689 | u32 alg_op; | |
1690 | }; | |
1691 | ||
1692 | /* ahash descriptors */ | |
1693 | static struct caam_hash_template driver_hash[] = { | |
1694 | { | |
b0e09bae YK |
1695 | .name = "sha1", |
1696 | .driver_name = "sha1-caam", | |
1697 | .hmac_name = "hmac(sha1)", | |
1698 | .hmac_driver_name = "hmac-sha1-caam", | |
045e3678 YK |
1699 | .blocksize = SHA1_BLOCK_SIZE, |
1700 | .template_ahash = { | |
1701 | .init = ahash_init, | |
1702 | .update = ahash_update, | |
1703 | .final = ahash_final, | |
1704 | .finup = ahash_finup, | |
1705 | .digest = ahash_digest, | |
1706 | .export = ahash_export, | |
1707 | .import = ahash_import, | |
1708 | .setkey = ahash_setkey, | |
1709 | .halg = { | |
1710 | .digestsize = SHA1_DIGEST_SIZE, | |
5ec90831 | 1711 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1712 | }, |
659f313d | 1713 | }, |
045e3678 YK |
1714 | .alg_type = OP_ALG_ALGSEL_SHA1, |
1715 | .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC, | |
1716 | }, { | |
b0e09bae YK |
1717 | .name = "sha224", |
1718 | .driver_name = "sha224-caam", | |
1719 | .hmac_name = "hmac(sha224)", | |
1720 | .hmac_driver_name = "hmac-sha224-caam", | |
045e3678 YK |
1721 | .blocksize = SHA224_BLOCK_SIZE, |
1722 | .template_ahash = { | |
1723 | .init = ahash_init, | |
1724 | .update = ahash_update, | |
1725 | .final = ahash_final, | |
1726 | .finup = ahash_finup, | |
1727 | .digest = ahash_digest, | |
1728 | .export = ahash_export, | |
1729 | .import = ahash_import, | |
1730 | .setkey = ahash_setkey, | |
1731 | .halg = { | |
1732 | .digestsize = SHA224_DIGEST_SIZE, | |
5ec90831 | 1733 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1734 | }, |
659f313d | 1735 | }, |
045e3678 YK |
1736 | .alg_type = OP_ALG_ALGSEL_SHA224, |
1737 | .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC, | |
1738 | }, { | |
b0e09bae YK |
1739 | .name = "sha256", |
1740 | .driver_name = "sha256-caam", | |
1741 | .hmac_name = "hmac(sha256)", | |
1742 | .hmac_driver_name = "hmac-sha256-caam", | |
045e3678 YK |
1743 | .blocksize = SHA256_BLOCK_SIZE, |
1744 | .template_ahash = { | |
1745 | .init = ahash_init, | |
1746 | .update = ahash_update, | |
1747 | .final = ahash_final, | |
1748 | .finup = ahash_finup, | |
1749 | .digest = ahash_digest, | |
1750 | .export = ahash_export, | |
1751 | .import = ahash_import, | |
1752 | .setkey = ahash_setkey, | |
1753 | .halg = { | |
1754 | .digestsize = SHA256_DIGEST_SIZE, | |
5ec90831 | 1755 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1756 | }, |
659f313d | 1757 | }, |
045e3678 YK |
1758 | .alg_type = OP_ALG_ALGSEL_SHA256, |
1759 | .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC, | |
1760 | }, { | |
b0e09bae YK |
1761 | .name = "sha384", |
1762 | .driver_name = "sha384-caam", | |
1763 | .hmac_name = "hmac(sha384)", | |
1764 | .hmac_driver_name = "hmac-sha384-caam", | |
045e3678 YK |
1765 | .blocksize = SHA384_BLOCK_SIZE, |
1766 | .template_ahash = { | |
1767 | .init = ahash_init, | |
1768 | .update = ahash_update, | |
1769 | .final = ahash_final, | |
1770 | .finup = ahash_finup, | |
1771 | .digest = ahash_digest, | |
1772 | .export = ahash_export, | |
1773 | .import = ahash_import, | |
1774 | .setkey = ahash_setkey, | |
1775 | .halg = { | |
1776 | .digestsize = SHA384_DIGEST_SIZE, | |
5ec90831 | 1777 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1778 | }, |
659f313d | 1779 | }, |
045e3678 YK |
1780 | .alg_type = OP_ALG_ALGSEL_SHA384, |
1781 | .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC, | |
1782 | }, { | |
b0e09bae YK |
1783 | .name = "sha512", |
1784 | .driver_name = "sha512-caam", | |
1785 | .hmac_name = "hmac(sha512)", | |
1786 | .hmac_driver_name = "hmac-sha512-caam", | |
045e3678 YK |
1787 | .blocksize = SHA512_BLOCK_SIZE, |
1788 | .template_ahash = { | |
1789 | .init = ahash_init, | |
1790 | .update = ahash_update, | |
1791 | .final = ahash_final, | |
1792 | .finup = ahash_finup, | |
1793 | .digest = ahash_digest, | |
1794 | .export = ahash_export, | |
1795 | .import = ahash_import, | |
1796 | .setkey = ahash_setkey, | |
1797 | .halg = { | |
1798 | .digestsize = SHA512_DIGEST_SIZE, | |
5ec90831 | 1799 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1800 | }, |
659f313d | 1801 | }, |
045e3678 YK |
1802 | .alg_type = OP_ALG_ALGSEL_SHA512, |
1803 | .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, | |
1804 | }, { | |
b0e09bae YK |
1805 | .name = "md5", |
1806 | .driver_name = "md5-caam", | |
1807 | .hmac_name = "hmac(md5)", | |
1808 | .hmac_driver_name = "hmac-md5-caam", | |
045e3678 YK |
1809 | .blocksize = MD5_BLOCK_WORDS * 4, |
1810 | .template_ahash = { | |
1811 | .init = ahash_init, | |
1812 | .update = ahash_update, | |
1813 | .final = ahash_final, | |
1814 | .finup = ahash_finup, | |
1815 | .digest = ahash_digest, | |
1816 | .export = ahash_export, | |
1817 | .import = ahash_import, | |
1818 | .setkey = ahash_setkey, | |
1819 | .halg = { | |
1820 | .digestsize = MD5_DIGEST_SIZE, | |
5ec90831 | 1821 | .statesize = sizeof(struct caam_export_state), |
045e3678 | 1822 | }, |
659f313d | 1823 | }, |
045e3678 YK |
1824 | .alg_type = OP_ALG_ALGSEL_MD5, |
1825 | .alg_op = OP_ALG_ALGSEL_MD5 | OP_ALG_AAI_HMAC, | |
1826 | }, | |
1827 | }; | |
1828 | ||
1829 | struct caam_hash_alg { | |
1830 | struct list_head entry; | |
045e3678 YK |
1831 | int alg_type; |
1832 | int alg_op; | |
1833 | struct ahash_alg ahash_alg; | |
1834 | }; | |
1835 | ||
1836 | static int caam_hash_cra_init(struct crypto_tfm *tfm) | |
1837 | { | |
1838 | struct crypto_ahash *ahash = __crypto_ahash_cast(tfm); | |
1839 | struct crypto_alg *base = tfm->__crt_alg; | |
1840 | struct hash_alg_common *halg = | |
1841 | container_of(base, struct hash_alg_common, base); | |
1842 | struct ahash_alg *alg = | |
1843 | container_of(halg, struct ahash_alg, halg); | |
1844 | struct caam_hash_alg *caam_hash = | |
1845 | container_of(alg, struct caam_hash_alg, ahash_alg); | |
1846 | struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm); | |
045e3678 YK |
1847 | /* Sizes for MDHA running digests: MD5, SHA1, 224, 256, 384, 512 */ |
1848 | static const u8 runninglen[] = { HASH_MSG_LEN + MD5_DIGEST_SIZE, | |
1849 | HASH_MSG_LEN + SHA1_DIGEST_SIZE, | |
1850 | HASH_MSG_LEN + 32, | |
1851 | HASH_MSG_LEN + SHA256_DIGEST_SIZE, | |
1852 | HASH_MSG_LEN + 64, | |
1853 | HASH_MSG_LEN + SHA512_DIGEST_SIZE }; | |
045e3678 YK |
1854 | int ret = 0; |
1855 | ||
1856 | /* | |
cfc6f11b | 1857 | * Get a Job ring from Job Ring driver to ensure in-order |
045e3678 YK |
1858 | * crypto request processing per tfm |
1859 | */ | |
cfc6f11b RG |
1860 | ctx->jrdev = caam_jr_alloc(); |
1861 | if (IS_ERR(ctx->jrdev)) { | |
1862 | pr_err("Job Ring Device allocation for transform failed\n"); | |
1863 | return PTR_ERR(ctx->jrdev); | |
1864 | } | |
045e3678 YK |
1865 | /* copy descriptor header template value */ |
1866 | ctx->alg_type = OP_TYPE_CLASS2_ALG | caam_hash->alg_type; | |
1867 | ctx->alg_op = OP_TYPE_CLASS2_ALG | caam_hash->alg_op; | |
1868 | ||
1869 | ctx->ctx_len = runninglen[(ctx->alg_op & OP_ALG_ALGSEL_SUBMASK) >> | |
1870 | OP_ALG_ALGSEL_SHIFT]; | |
1871 | ||
1872 | crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm), | |
1873 | sizeof(struct caam_hash_state)); | |
1874 | ||
1875 | ret = ahash_set_sh_desc(ahash); | |
1876 | ||
1877 | return ret; | |
1878 | } | |
1879 | ||
1880 | static void caam_hash_cra_exit(struct crypto_tfm *tfm) | |
1881 | { | |
1882 | struct caam_hash_ctx *ctx = crypto_tfm_ctx(tfm); | |
1883 | ||
1884 | if (ctx->sh_desc_update_dma && | |
1885 | !dma_mapping_error(ctx->jrdev, ctx->sh_desc_update_dma)) | |
1886 | dma_unmap_single(ctx->jrdev, ctx->sh_desc_update_dma, | |
1887 | desc_bytes(ctx->sh_desc_update), | |
1888 | DMA_TO_DEVICE); | |
1889 | if (ctx->sh_desc_update_first_dma && | |
1890 | !dma_mapping_error(ctx->jrdev, ctx->sh_desc_update_first_dma)) | |
1891 | dma_unmap_single(ctx->jrdev, ctx->sh_desc_update_first_dma, | |
1892 | desc_bytes(ctx->sh_desc_update_first), | |
1893 | DMA_TO_DEVICE); | |
1894 | if (ctx->sh_desc_fin_dma && | |
1895 | !dma_mapping_error(ctx->jrdev, ctx->sh_desc_fin_dma)) | |
1896 | dma_unmap_single(ctx->jrdev, ctx->sh_desc_fin_dma, | |
1897 | desc_bytes(ctx->sh_desc_fin), DMA_TO_DEVICE); | |
1898 | if (ctx->sh_desc_digest_dma && | |
1899 | !dma_mapping_error(ctx->jrdev, ctx->sh_desc_digest_dma)) | |
1900 | dma_unmap_single(ctx->jrdev, ctx->sh_desc_digest_dma, | |
1901 | desc_bytes(ctx->sh_desc_digest), | |
1902 | DMA_TO_DEVICE); | |
1903 | if (ctx->sh_desc_finup_dma && | |
1904 | !dma_mapping_error(ctx->jrdev, ctx->sh_desc_finup_dma)) | |
1905 | dma_unmap_single(ctx->jrdev, ctx->sh_desc_finup_dma, | |
1906 | desc_bytes(ctx->sh_desc_finup), DMA_TO_DEVICE); | |
cfc6f11b RG |
1907 | |
1908 | caam_jr_free(ctx->jrdev); | |
045e3678 YK |
1909 | } |
1910 | ||
1911 | static void __exit caam_algapi_hash_exit(void) | |
1912 | { | |
045e3678 YK |
1913 | struct caam_hash_alg *t_alg, *n; |
1914 | ||
cfc6f11b | 1915 | if (!hash_list.next) |
045e3678 YK |
1916 | return; |
1917 | ||
cfc6f11b | 1918 | list_for_each_entry_safe(t_alg, n, &hash_list, entry) { |
045e3678 YK |
1919 | crypto_unregister_ahash(&t_alg->ahash_alg); |
1920 | list_del(&t_alg->entry); | |
1921 | kfree(t_alg); | |
1922 | } | |
1923 | } | |
1924 | ||
1925 | static struct caam_hash_alg * | |
cfc6f11b | 1926 | caam_hash_alloc(struct caam_hash_template *template, |
b0e09bae | 1927 | bool keyed) |
045e3678 YK |
1928 | { |
1929 | struct caam_hash_alg *t_alg; | |
1930 | struct ahash_alg *halg; | |
1931 | struct crypto_alg *alg; | |
1932 | ||
9c4f9733 | 1933 | t_alg = kzalloc(sizeof(*t_alg), GFP_KERNEL); |
045e3678 | 1934 | if (!t_alg) { |
cfc6f11b | 1935 | pr_err("failed to allocate t_alg\n"); |
045e3678 YK |
1936 | return ERR_PTR(-ENOMEM); |
1937 | } | |
1938 | ||
1939 | t_alg->ahash_alg = template->template_ahash; | |
1940 | halg = &t_alg->ahash_alg; | |
1941 | alg = &halg->halg.base; | |
1942 | ||
b0e09bae YK |
1943 | if (keyed) { |
1944 | snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", | |
1945 | template->hmac_name); | |
1946 | snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", | |
1947 | template->hmac_driver_name); | |
1948 | } else { | |
1949 | snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", | |
1950 | template->name); | |
1951 | snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", | |
1952 | template->driver_name); | |
a0118c8b | 1953 | t_alg->ahash_alg.setkey = NULL; |
b0e09bae | 1954 | } |
045e3678 YK |
1955 | alg->cra_module = THIS_MODULE; |
1956 | alg->cra_init = caam_hash_cra_init; | |
1957 | alg->cra_exit = caam_hash_cra_exit; | |
1958 | alg->cra_ctxsize = sizeof(struct caam_hash_ctx); | |
1959 | alg->cra_priority = CAAM_CRA_PRIORITY; | |
1960 | alg->cra_blocksize = template->blocksize; | |
1961 | alg->cra_alignmask = 0; | |
1962 | alg->cra_flags = CRYPTO_ALG_ASYNC | CRYPTO_ALG_TYPE_AHASH; | |
1963 | alg->cra_type = &crypto_ahash_type; | |
1964 | ||
1965 | t_alg->alg_type = template->alg_type; | |
1966 | t_alg->alg_op = template->alg_op; | |
045e3678 YK |
1967 | |
1968 | return t_alg; | |
1969 | } | |
1970 | ||
1971 | static int __init caam_algapi_hash_init(void) | |
1972 | { | |
35af6403 RG |
1973 | struct device_node *dev_node; |
1974 | struct platform_device *pdev; | |
1975 | struct device *ctrldev; | |
045e3678 | 1976 | int i = 0, err = 0; |
bf83490e VM |
1977 | struct caam_drv_private *priv; |
1978 | unsigned int md_limit = SHA512_DIGEST_SIZE; | |
1979 | u32 cha_inst, cha_vid; | |
045e3678 | 1980 | |
35af6403 RG |
1981 | dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec-v4.0"); |
1982 | if (!dev_node) { | |
1983 | dev_node = of_find_compatible_node(NULL, NULL, "fsl,sec4.0"); | |
1984 | if (!dev_node) | |
1985 | return -ENODEV; | |
1986 | } | |
1987 | ||
1988 | pdev = of_find_device_by_node(dev_node); | |
1989 | if (!pdev) { | |
1990 | of_node_put(dev_node); | |
1991 | return -ENODEV; | |
1992 | } | |
1993 | ||
1994 | ctrldev = &pdev->dev; | |
1995 | priv = dev_get_drvdata(ctrldev); | |
1996 | of_node_put(dev_node); | |
1997 | ||
1998 | /* | |
1999 | * If priv is NULL, it's probably because the caam driver wasn't | |
2000 | * properly initialized (e.g. RNG4 init failed). Thus, bail out here. | |
2001 | */ | |
2002 | if (!priv) | |
2003 | return -ENODEV; | |
2004 | ||
bf83490e VM |
2005 | /* |
2006 | * Register crypto algorithms the device supports. First, identify | |
2007 | * presence and attributes of MD block. | |
2008 | */ | |
2009 | cha_vid = rd_reg32(&priv->ctrl->perfmon.cha_id_ls); | |
2010 | cha_inst = rd_reg32(&priv->ctrl->perfmon.cha_num_ls); | |
2011 | ||
2012 | /* | |
2013 | * Skip registration of any hashing algorithms if MD block | |
2014 | * is not present. | |
2015 | */ | |
2016 | if (!((cha_inst & CHA_ID_LS_MD_MASK) >> CHA_ID_LS_MD_SHIFT)) | |
2017 | return -ENODEV; | |
2018 | ||
2019 | /* Limit digest size based on LP256 */ | |
2020 | if ((cha_vid & CHA_ID_LS_MD_MASK) == CHA_ID_LS_MD_LP256) | |
2021 | md_limit = SHA256_DIGEST_SIZE; | |
2022 | ||
cfc6f11b | 2023 | INIT_LIST_HEAD(&hash_list); |
045e3678 YK |
2024 | |
2025 | /* register crypto algorithms the device supports */ | |
2026 | for (i = 0; i < ARRAY_SIZE(driver_hash); i++) { | |
045e3678 | 2027 | struct caam_hash_alg *t_alg; |
bf83490e VM |
2028 | struct caam_hash_template *alg = driver_hash + i; |
2029 | ||
2030 | /* If MD size is not supported by device, skip registration */ | |
2031 | if (alg->template_ahash.halg.digestsize > md_limit) | |
2032 | continue; | |
045e3678 | 2033 | |
b0e09bae | 2034 | /* register hmac version */ |
bf83490e | 2035 | t_alg = caam_hash_alloc(alg, true); |
b0e09bae YK |
2036 | if (IS_ERR(t_alg)) { |
2037 | err = PTR_ERR(t_alg); | |
bf83490e | 2038 | pr_warn("%s alg allocation failed\n", alg->driver_name); |
b0e09bae YK |
2039 | continue; |
2040 | } | |
2041 | ||
2042 | err = crypto_register_ahash(&t_alg->ahash_alg); | |
2043 | if (err) { | |
6ea30f0a RK |
2044 | pr_warn("%s alg registration failed: %d\n", |
2045 | t_alg->ahash_alg.halg.base.cra_driver_name, | |
2046 | err); | |
b0e09bae YK |
2047 | kfree(t_alg); |
2048 | } else | |
cfc6f11b | 2049 | list_add_tail(&t_alg->entry, &hash_list); |
b0e09bae YK |
2050 | |
2051 | /* register unkeyed version */ | |
bf83490e | 2052 | t_alg = caam_hash_alloc(alg, false); |
045e3678 YK |
2053 | if (IS_ERR(t_alg)) { |
2054 | err = PTR_ERR(t_alg); | |
bf83490e | 2055 | pr_warn("%s alg allocation failed\n", alg->driver_name); |
045e3678 YK |
2056 | continue; |
2057 | } | |
2058 | ||
2059 | err = crypto_register_ahash(&t_alg->ahash_alg); | |
2060 | if (err) { | |
6ea30f0a RK |
2061 | pr_warn("%s alg registration failed: %d\n", |
2062 | t_alg->ahash_alg.halg.base.cra_driver_name, | |
2063 | err); | |
045e3678 YK |
2064 | kfree(t_alg); |
2065 | } else | |
cfc6f11b | 2066 | list_add_tail(&t_alg->entry, &hash_list); |
045e3678 YK |
2067 | } |
2068 | ||
2069 | return err; | |
2070 | } | |
2071 | ||
2072 | module_init(caam_algapi_hash_init); | |
2073 | module_exit(caam_algapi_hash_exit); | |
2074 | ||
2075 | MODULE_LICENSE("GPL"); | |
2076 | MODULE_DESCRIPTION("FSL CAAM support for ahash functions of crypto API"); | |
2077 | MODULE_AUTHOR("Freescale Semiconductor - NMG"); |