gpio/omap: move bank->dbck initialization to omap_gpio_mod_init()
[deliverable/linux.git] / drivers / gpio / gpio-pca953x.c
CommitLineData
9e60fdcf 1/*
c103de24 2 * PCA953x 4/8/16 bit I/O ports
9e60fdcf 3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
d120c17f 16#include <linux/gpio.h>
89ea8bbe
MZ
17#include <linux/interrupt.h>
18#include <linux/irq.h>
9e60fdcf 19#include <linux/i2c.h>
d1c057e3 20#include <linux/i2c/pca953x.h>
5a0e3ad6 21#include <linux/slab.h>
1965d303
NC
22#ifdef CONFIG_OF_GPIO
23#include <linux/of_platform.h>
1965d303 24#endif
9e60fdcf 25
33226ffd
HZ
26#define PCA953X_INPUT 0
27#define PCA953X_OUTPUT 1
28#define PCA953X_INVERT 2
29#define PCA953X_DIRECTION 3
30
ae79c190
AS
31#define REG_ADDR_AI 0x80
32
33226ffd
HZ
33#define PCA957X_IN 0
34#define PCA957X_INVRT 1
35#define PCA957X_BKEN 2
36#define PCA957X_PUPD 3
37#define PCA957X_CFG 4
38#define PCA957X_OUT 5
39#define PCA957X_MSK 6
40#define PCA957X_INTS 7
41
42#define PCA_GPIO_MASK 0x00FF
43#define PCA_INT 0x0100
44#define PCA953X_TYPE 0x1000
45#define PCA957X_TYPE 0x2000
89ea8bbe 46
3760f736 47static const struct i2c_device_id pca953x_id[] = {
33226ffd
HZ
48 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
49 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
50 { "pca9536", 4 | PCA953X_TYPE, },
51 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
52 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
53 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
54 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9556", 8 | PCA953X_TYPE, },
57 { "pca9557", 8 | PCA953X_TYPE, },
58 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
59 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
60
61 { "max7310", 8 | PCA953X_TYPE, },
62 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
63 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
64 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
65 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
66 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
67 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
ae79c190 68 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
3760f736 69 { }
f5e8ff48 70};
3760f736 71MODULE_DEVICE_TABLE(i2c, pca953x_id);
9e60fdcf 72
f3dc3630 73struct pca953x_chip {
9e60fdcf 74 unsigned gpio_start;
ae79c190
AS
75 u32 reg_output;
76 u32 reg_direction;
6e20fb18 77 struct mutex i2c_lock;
9e60fdcf 78
89ea8bbe
MZ
79#ifdef CONFIG_GPIO_PCA953X_IRQ
80 struct mutex irq_lock;
81 uint16_t irq_mask;
82 uint16_t irq_stat;
83 uint16_t irq_trig_raise;
84 uint16_t irq_trig_fall;
85 int irq_base;
86#endif
87
9e60fdcf 88 struct i2c_client *client;
89 struct gpio_chip gpio_chip;
62154991 90 const char *const *names;
33226ffd 91 int chip_type;
9e60fdcf 92};
93
ae79c190 94static int pca953x_write_reg(struct pca953x_chip *chip, int reg, u32 val)
9e60fdcf 95{
33226ffd 96 int ret = 0;
f5e8ff48
GL
97
98 if (chip->gpio_chip.ngpio <= 8)
99 ret = i2c_smbus_write_byte_data(chip->client, reg, val);
ae79c190 100 else if (chip->gpio_chip.ngpio == 24) {
96b70641
AS
101 cpu_to_le32s(&val);
102 ret = i2c_smbus_write_i2c_block_data(chip->client,
ae79c190 103 (reg << 2) | REG_ADDR_AI,
96b70641
AS
104 3,
105 (u8 *) &val);
ae79c190 106 }
33226ffd
HZ
107 else {
108 switch (chip->chip_type) {
109 case PCA953X_TYPE:
110 ret = i2c_smbus_write_word_data(chip->client,
111 reg << 1, val);
112 break;
113 case PCA957X_TYPE:
114 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
115 val & 0xff);
116 if (ret < 0)
117 break;
118 ret = i2c_smbus_write_byte_data(chip->client,
119 (reg << 1) + 1,
120 (val & 0xff00) >> 8);
121 break;
122 }
123 }
f5e8ff48
GL
124
125 if (ret < 0) {
126 dev_err(&chip->client->dev, "failed writing register\n");
ab5dc372 127 return ret;
f5e8ff48
GL
128 }
129
130 return 0;
9e60fdcf 131}
132
ae79c190 133static int pca953x_read_reg(struct pca953x_chip *chip, int reg, u32 *val)
9e60fdcf 134{
135 int ret;
136
96b70641 137 if (chip->gpio_chip.ngpio <= 8) {
f5e8ff48 138 ret = i2c_smbus_read_byte_data(chip->client, reg);
96b70641 139 *val = ret;
ae79c190 140 }
96b70641
AS
141 else if (chip->gpio_chip.ngpio == 24) {
142 *val = 0;
143 ret = i2c_smbus_read_i2c_block_data(chip->client,
144 (reg << 2) | REG_ADDR_AI,
145 3,
146 (u8 *) val);
147 le32_to_cpus(val);
148 } else {
f5e8ff48 149 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
96b70641
AS
150 *val = ret;
151 }
f5e8ff48 152
9e60fdcf 153 if (ret < 0) {
154 dev_err(&chip->client->dev, "failed reading register\n");
ab5dc372 155 return ret;
9e60fdcf 156 }
157
9e60fdcf 158 return 0;
159}
160
f3dc3630 161static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
9e60fdcf 162{
f3dc3630 163 struct pca953x_chip *chip;
ae79c190 164 uint reg_val;
33226ffd 165 int ret, offset = 0;
9e60fdcf 166
f3dc3630 167 chip = container_of(gc, struct pca953x_chip, gpio_chip);
9e60fdcf 168
6e20fb18 169 mutex_lock(&chip->i2c_lock);
9e60fdcf 170 reg_val = chip->reg_direction | (1u << off);
33226ffd
HZ
171
172 switch (chip->chip_type) {
173 case PCA953X_TYPE:
174 offset = PCA953X_DIRECTION;
175 break;
176 case PCA957X_TYPE:
177 offset = PCA957X_CFG;
178 break;
179 }
180 ret = pca953x_write_reg(chip, offset, reg_val);
9e60fdcf 181 if (ret)
6e20fb18 182 goto exit;
9e60fdcf 183
184 chip->reg_direction = reg_val;
6e20fb18
RS
185 ret = 0;
186exit:
187 mutex_unlock(&chip->i2c_lock);
188 return ret;
9e60fdcf 189}
190
f3dc3630 191static int pca953x_gpio_direction_output(struct gpio_chip *gc,
9e60fdcf 192 unsigned off, int val)
193{
f3dc3630 194 struct pca953x_chip *chip;
ae79c190 195 uint reg_val;
33226ffd 196 int ret, offset = 0;
9e60fdcf 197
f3dc3630 198 chip = container_of(gc, struct pca953x_chip, gpio_chip);
9e60fdcf 199
6e20fb18 200 mutex_lock(&chip->i2c_lock);
9e60fdcf 201 /* set output level */
202 if (val)
203 reg_val = chip->reg_output | (1u << off);
204 else
205 reg_val = chip->reg_output & ~(1u << off);
206
33226ffd
HZ
207 switch (chip->chip_type) {
208 case PCA953X_TYPE:
209 offset = PCA953X_OUTPUT;
210 break;
211 case PCA957X_TYPE:
212 offset = PCA957X_OUT;
213 break;
214 }
215 ret = pca953x_write_reg(chip, offset, reg_val);
9e60fdcf 216 if (ret)
6e20fb18 217 goto exit;
9e60fdcf 218
219 chip->reg_output = reg_val;
220
221 /* then direction */
222 reg_val = chip->reg_direction & ~(1u << off);
33226ffd
HZ
223 switch (chip->chip_type) {
224 case PCA953X_TYPE:
225 offset = PCA953X_DIRECTION;
226 break;
227 case PCA957X_TYPE:
228 offset = PCA957X_CFG;
229 break;
230 }
231 ret = pca953x_write_reg(chip, offset, reg_val);
9e60fdcf 232 if (ret)
6e20fb18 233 goto exit;
9e60fdcf 234
235 chip->reg_direction = reg_val;
6e20fb18
RS
236 ret = 0;
237exit:
238 mutex_unlock(&chip->i2c_lock);
239 return ret;
9e60fdcf 240}
241
f3dc3630 242static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
9e60fdcf 243{
f3dc3630 244 struct pca953x_chip *chip;
ae79c190 245 u32 reg_val;
33226ffd 246 int ret, offset = 0;
9e60fdcf 247
f3dc3630 248 chip = container_of(gc, struct pca953x_chip, gpio_chip);
9e60fdcf 249
6e20fb18 250 mutex_lock(&chip->i2c_lock);
33226ffd
HZ
251 switch (chip->chip_type) {
252 case PCA953X_TYPE:
253 offset = PCA953X_INPUT;
254 break;
255 case PCA957X_TYPE:
256 offset = PCA957X_IN;
257 break;
258 }
259 ret = pca953x_read_reg(chip, offset, &reg_val);
6e20fb18 260 mutex_unlock(&chip->i2c_lock);
9e60fdcf 261 if (ret < 0) {
262 /* NOTE: diagnostic already emitted; that's all we should
263 * do unless gpio_*_value_cansleep() calls become different
264 * from their nonsleeping siblings (and report faults).
265 */
266 return 0;
267 }
268
269 return (reg_val & (1u << off)) ? 1 : 0;
270}
271
f3dc3630 272static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
9e60fdcf 273{
f3dc3630 274 struct pca953x_chip *chip;
ae79c190 275 u32 reg_val;
33226ffd 276 int ret, offset = 0;
9e60fdcf 277
f3dc3630 278 chip = container_of(gc, struct pca953x_chip, gpio_chip);
9e60fdcf 279
6e20fb18 280 mutex_lock(&chip->i2c_lock);
9e60fdcf 281 if (val)
282 reg_val = chip->reg_output | (1u << off);
283 else
284 reg_val = chip->reg_output & ~(1u << off);
285
33226ffd
HZ
286 switch (chip->chip_type) {
287 case PCA953X_TYPE:
288 offset = PCA953X_OUTPUT;
289 break;
290 case PCA957X_TYPE:
291 offset = PCA957X_OUT;
292 break;
293 }
294 ret = pca953x_write_reg(chip, offset, reg_val);
9e60fdcf 295 if (ret)
6e20fb18 296 goto exit;
9e60fdcf 297
298 chip->reg_output = reg_val;
6e20fb18
RS
299exit:
300 mutex_unlock(&chip->i2c_lock);
9e60fdcf 301}
302
f5e8ff48 303static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
9e60fdcf 304{
305 struct gpio_chip *gc;
306
307 gc = &chip->gpio_chip;
308
f3dc3630
GL
309 gc->direction_input = pca953x_gpio_direction_input;
310 gc->direction_output = pca953x_gpio_direction_output;
311 gc->get = pca953x_gpio_get_value;
312 gc->set = pca953x_gpio_set_value;
84207805 313 gc->can_sleep = 1;
9e60fdcf 314
315 gc->base = chip->gpio_start;
f5e8ff48
GL
316 gc->ngpio = gpios;
317 gc->label = chip->client->name;
d8f388d8 318 gc->dev = &chip->client->dev;
d72cbed0 319 gc->owner = THIS_MODULE;
77906a54 320 gc->names = chip->names;
9e60fdcf 321}
322
89ea8bbe
MZ
323#ifdef CONFIG_GPIO_PCA953X_IRQ
324static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
325{
326 struct pca953x_chip *chip;
327
328 chip = container_of(gc, struct pca953x_chip, gpio_chip);
329 return chip->irq_base + off;
330}
331
6f5cfc0e 332static void pca953x_irq_mask(struct irq_data *d)
89ea8bbe 333{
6f5cfc0e 334 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
89ea8bbe 335
6f5cfc0e 336 chip->irq_mask &= ~(1 << (d->irq - chip->irq_base));
89ea8bbe
MZ
337}
338
6f5cfc0e 339static void pca953x_irq_unmask(struct irq_data *d)
89ea8bbe 340{
6f5cfc0e 341 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
89ea8bbe 342
6f5cfc0e 343 chip->irq_mask |= 1 << (d->irq - chip->irq_base);
89ea8bbe
MZ
344}
345
6f5cfc0e 346static void pca953x_irq_bus_lock(struct irq_data *d)
89ea8bbe 347{
6f5cfc0e 348 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
89ea8bbe
MZ
349
350 mutex_lock(&chip->irq_lock);
351}
352
6f5cfc0e 353static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
89ea8bbe 354{
6f5cfc0e 355 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
a2cb9aeb
MZ
356 uint16_t new_irqs;
357 uint16_t level;
358
359 /* Look for any newly setup interrupt */
360 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
361 new_irqs &= ~chip->reg_direction;
362
363 while (new_irqs) {
364 level = __ffs(new_irqs);
365 pca953x_gpio_direction_input(&chip->gpio_chip, level);
366 new_irqs &= ~(1 << level);
367 }
89ea8bbe
MZ
368
369 mutex_unlock(&chip->irq_lock);
370}
371
6f5cfc0e 372static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
89ea8bbe 373{
6f5cfc0e
LB
374 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
375 uint16_t level = d->irq - chip->irq_base;
89ea8bbe
MZ
376 uint16_t mask = 1 << level;
377
378 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
379 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
6f5cfc0e 380 d->irq, type);
89ea8bbe
MZ
381 return -EINVAL;
382 }
383
384 if (type & IRQ_TYPE_EDGE_FALLING)
385 chip->irq_trig_fall |= mask;
386 else
387 chip->irq_trig_fall &= ~mask;
388
389 if (type & IRQ_TYPE_EDGE_RISING)
390 chip->irq_trig_raise |= mask;
391 else
392 chip->irq_trig_raise &= ~mask;
393
a2cb9aeb 394 return 0;
89ea8bbe
MZ
395}
396
397static struct irq_chip pca953x_irq_chip = {
398 .name = "pca953x",
6f5cfc0e
LB
399 .irq_mask = pca953x_irq_mask,
400 .irq_unmask = pca953x_irq_unmask,
401 .irq_bus_lock = pca953x_irq_bus_lock,
402 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
403 .irq_set_type = pca953x_irq_set_type,
89ea8bbe
MZ
404};
405
406static uint16_t pca953x_irq_pending(struct pca953x_chip *chip)
407{
ae79c190 408 u32 cur_stat;
89ea8bbe
MZ
409 uint16_t old_stat;
410 uint16_t pending;
411 uint16_t trigger;
33226ffd
HZ
412 int ret, offset = 0;
413
414 switch (chip->chip_type) {
415 case PCA953X_TYPE:
416 offset = PCA953X_INPUT;
417 break;
418 case PCA957X_TYPE:
419 offset = PCA957X_IN;
420 break;
421 }
422 ret = pca953x_read_reg(chip, offset, &cur_stat);
89ea8bbe
MZ
423 if (ret)
424 return 0;
425
426 /* Remove output pins from the equation */
427 cur_stat &= chip->reg_direction;
428
429 old_stat = chip->irq_stat;
430 trigger = (cur_stat ^ old_stat) & chip->irq_mask;
431
432 if (!trigger)
433 return 0;
434
435 chip->irq_stat = cur_stat;
436
437 pending = (old_stat & chip->irq_trig_fall) |
438 (cur_stat & chip->irq_trig_raise);
439 pending &= trigger;
440
441 return pending;
442}
443
444static irqreturn_t pca953x_irq_handler(int irq, void *devid)
445{
446 struct pca953x_chip *chip = devid;
447 uint16_t pending;
448 uint16_t level;
449
450 pending = pca953x_irq_pending(chip);
451
452 if (!pending)
453 return IRQ_HANDLED;
454
455 do {
456 level = __ffs(pending);
6dd599f8 457 handle_nested_irq(level + chip->irq_base);
89ea8bbe
MZ
458
459 pending &= ~(1 << level);
460 } while (pending);
461
462 return IRQ_HANDLED;
463}
464
465static int pca953x_irq_setup(struct pca953x_chip *chip,
c6dcf592
DJ
466 const struct i2c_device_id *id,
467 int irq_base)
89ea8bbe
MZ
468{
469 struct i2c_client *client = chip->client;
33226ffd 470 int ret, offset = 0;
ae79c190 471 u32 temporary;
89ea8bbe 472
c6dcf592 473 if (irq_base != -1
33226ffd 474 && (id->driver_data & PCA_INT)) {
89ea8bbe
MZ
475 int lvl;
476
33226ffd
HZ
477 switch (chip->chip_type) {
478 case PCA953X_TYPE:
479 offset = PCA953X_INPUT;
480 break;
481 case PCA957X_TYPE:
482 offset = PCA957X_IN;
483 break;
484 }
ae79c190
AS
485 ret = pca953x_read_reg(chip, offset, &temporary);
486 chip->irq_stat = temporary;
89ea8bbe
MZ
487 if (ret)
488 goto out_failed;
489
490 /*
491 * There is no way to know which GPIO line generated the
492 * interrupt. We have to rely on the previous read for
493 * this purpose.
494 */
495 chip->irq_stat &= chip->reg_direction;
89ea8bbe
MZ
496 mutex_init(&chip->irq_lock);
497
c6dcf592 498 chip->irq_base = irq_alloc_descs(-1, irq_base, chip->gpio_chip.ngpio, -1);
910c8fb6
DJ
499 if (chip->irq_base < 0)
500 goto out_failed;
501
89ea8bbe
MZ
502 for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) {
503 int irq = lvl + chip->irq_base;
504
910c8fb6 505 irq_clear_status_flags(irq, IRQ_NOREQUEST);
b51804bc 506 irq_set_chip_data(irq, chip);
6dd599f8
DJ
507 irq_set_chip(irq, &pca953x_irq_chip);
508 irq_set_nested_thread(irq, true);
89ea8bbe
MZ
509#ifdef CONFIG_ARM
510 set_irq_flags(irq, IRQF_VALID);
511#else
b51804bc 512 irq_set_noprobe(irq);
89ea8bbe
MZ
513#endif
514 }
515
516 ret = request_threaded_irq(client->irq,
517 NULL,
518 pca953x_irq_handler,
17e8b42c 519 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
89ea8bbe
MZ
520 dev_name(&client->dev), chip);
521 if (ret) {
522 dev_err(&client->dev, "failed to request irq %d\n",
523 client->irq);
524 goto out_failed;
525 }
526
527 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
528 }
529
530 return 0;
531
532out_failed:
8a233f01 533 chip->irq_base = -1;
89ea8bbe
MZ
534 return ret;
535}
536
537static void pca953x_irq_teardown(struct pca953x_chip *chip)
538{
c609c05d
DJ
539 if (chip->irq_base != -1) {
540 irq_free_descs(chip->irq_base, chip->gpio_chip.ngpio);
89ea8bbe 541 free_irq(chip->client->irq, chip);
c609c05d 542 }
89ea8bbe
MZ
543}
544#else /* CONFIG_GPIO_PCA953X_IRQ */
545static int pca953x_irq_setup(struct pca953x_chip *chip,
c6dcf592
DJ
546 const struct i2c_device_id *id,
547 int irq_base)
89ea8bbe
MZ
548{
549 struct i2c_client *client = chip->client;
89ea8bbe 550
c6dcf592 551 if (irq_base != -1 && (id->driver_data & PCA_INT))
89ea8bbe
MZ
552 dev_warn(&client->dev, "interrupt support not compiled in\n");
553
554 return 0;
555}
556
557static void pca953x_irq_teardown(struct pca953x_chip *chip)
558{
559}
560#endif
561
1965d303
NC
562/*
563 * Handlers for alternative sources of platform_data
564 */
565#ifdef CONFIG_OF_GPIO
566/*
567 * Translate OpenFirmware node properties into platform_data
a57339b4 568 * WARNING: This is DEPRECATED and will be removed eventually!
1965d303 569 */
404ba2b8 570static void
c6dcf592 571pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
1965d303 572{
1965d303 573 struct device_node *node;
1648237d
DE
574 const __be32 *val;
575 int size;
1965d303 576
61c7a080 577 node = client->dev.of_node;
1965d303 578 if (node == NULL)
c6dcf592 579 return;
1965d303 580
c6dcf592 581 *gpio_base = -1;
1648237d 582 val = of_get_property(node, "linux,gpio-base", &size);
a57339b4 583 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
1965d303 584 if (val) {
1648237d
DE
585 if (size != sizeof(*val))
586 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
587 node->full_name);
1965d303 588 else
c6dcf592 589 *gpio_base = be32_to_cpup(val);
1965d303
NC
590 }
591
592 val = of_get_property(node, "polarity", NULL);
a57339b4 593 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
1965d303 594 if (val)
c6dcf592 595 *invert = *val;
1965d303
NC
596}
597#else
404ba2b8 598static void
c6dcf592 599pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, int *invert)
1965d303 600{
25fcf2b7 601 *gpio_base = -1;
1965d303
NC
602}
603#endif
604
33226ffd
HZ
605static int __devinit device_pca953x_init(struct pca953x_chip *chip, int invert)
606{
607 int ret;
608
609 ret = pca953x_read_reg(chip, PCA953X_OUTPUT, &chip->reg_output);
610 if (ret)
611 goto out;
612
613 ret = pca953x_read_reg(chip, PCA953X_DIRECTION,
614 &chip->reg_direction);
615 if (ret)
616 goto out;
617
618 /* set platform specific polarity inversion */
619 ret = pca953x_write_reg(chip, PCA953X_INVERT, invert);
33226ffd
HZ
620out:
621 return ret;
622}
623
624static int __devinit device_pca957x_init(struct pca953x_chip *chip, int invert)
625{
626 int ret;
ae79c190 627 u32 val = 0;
33226ffd
HZ
628
629 /* Let every port in proper state, that could save power */
630 pca953x_write_reg(chip, PCA957X_PUPD, 0x0);
631 pca953x_write_reg(chip, PCA957X_CFG, 0xffff);
632 pca953x_write_reg(chip, PCA957X_OUT, 0x0);
633
634 ret = pca953x_read_reg(chip, PCA957X_IN, &val);
635 if (ret)
636 goto out;
637 ret = pca953x_read_reg(chip, PCA957X_OUT, &chip->reg_output);
638 if (ret)
639 goto out;
640 ret = pca953x_read_reg(chip, PCA957X_CFG, &chip->reg_direction);
641 if (ret)
642 goto out;
643
644 /* set platform specific polarity inversion */
645 pca953x_write_reg(chip, PCA957X_INVRT, invert);
646
647 /* To enable register 6, 7 to controll pull up and pull down */
648 pca953x_write_reg(chip, PCA957X_BKEN, 0x202);
649
650 return 0;
651out:
652 return ret;
653}
654
d2653e92 655static int __devinit pca953x_probe(struct i2c_client *client,
3760f736 656 const struct i2c_device_id *id)
9e60fdcf 657{
f3dc3630
GL
658 struct pca953x_platform_data *pdata;
659 struct pca953x_chip *chip;
a57339b4 660 int irq_base=0, invert=0;
7ea2aa20 661 int ret;
9e60fdcf 662
1965d303
NC
663 chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
664 if (chip == NULL)
665 return -ENOMEM;
666
9e60fdcf 667 pdata = client->dev.platform_data;
c6dcf592
DJ
668 if (pdata) {
669 irq_base = pdata->irq_base;
670 chip->gpio_start = pdata->gpio_base;
671 invert = pdata->invert;
672 chip->names = pdata->names;
673 } else {
674 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
a57339b4
DJ
675#ifdef CONFIG_OF_GPIO
676 /* If I2C node has no interrupts property, disable GPIO interrupts */
677 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
678 irq_base = -1;
679#endif
1965d303 680 }
9e60fdcf 681
682 chip->client = client;
683
33226ffd 684 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
77906a54 685
6e20fb18
RS
686 mutex_init(&chip->i2c_lock);
687
9e60fdcf 688 /* initialize cached registers from their original values.
689 * we can't share this chip with another i2c master.
690 */
33226ffd 691 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
f5e8ff48 692
33226ffd 693 if (chip->chip_type == PCA953X_TYPE)
7ea2aa20 694 ret = device_pca953x_init(chip, invert);
33226ffd 695 else
7ea2aa20
WS
696 ret = device_pca957x_init(chip, invert);
697 if (ret)
9e60fdcf 698 goto out_failed;
699
c6dcf592 700 ret = pca953x_irq_setup(chip, id, irq_base);
89ea8bbe
MZ
701 if (ret)
702 goto out_failed;
f5e8ff48
GL
703
704 ret = gpiochip_add(&chip->gpio_chip);
9e60fdcf 705 if (ret)
272df502 706 goto out_failed_irq;
9e60fdcf 707
c6dcf592 708 if (pdata && pdata->setup) {
9e60fdcf 709 ret = pdata->setup(client, chip->gpio_chip.base,
710 chip->gpio_chip.ngpio, pdata->context);
711 if (ret < 0)
712 dev_warn(&client->dev, "setup failed, %d\n", ret);
713 }
714
715 i2c_set_clientdata(client, chip);
716 return 0;
717
272df502 718out_failed_irq:
89ea8bbe 719 pca953x_irq_teardown(chip);
272df502 720out_failed:
9e60fdcf 721 kfree(chip);
722 return ret;
723}
724
f3dc3630 725static int pca953x_remove(struct i2c_client *client)
9e60fdcf 726{
f3dc3630
GL
727 struct pca953x_platform_data *pdata = client->dev.platform_data;
728 struct pca953x_chip *chip = i2c_get_clientdata(client);
9e60fdcf 729 int ret = 0;
730
c6dcf592 731 if (pdata && pdata->teardown) {
9e60fdcf 732 ret = pdata->teardown(client, chip->gpio_chip.base,
733 chip->gpio_chip.ngpio, pdata->context);
734 if (ret < 0) {
735 dev_err(&client->dev, "%s failed, %d\n",
736 "teardown", ret);
737 return ret;
738 }
739 }
740
741 ret = gpiochip_remove(&chip->gpio_chip);
742 if (ret) {
743 dev_err(&client->dev, "%s failed, %d\n",
744 "gpiochip_remove()", ret);
745 return ret;
746 }
747
89ea8bbe 748 pca953x_irq_teardown(chip);
9e60fdcf 749 kfree(chip);
750 return 0;
751}
752
f3dc3630 753static struct i2c_driver pca953x_driver = {
9e60fdcf 754 .driver = {
f3dc3630 755 .name = "pca953x",
9e60fdcf 756 },
f3dc3630
GL
757 .probe = pca953x_probe,
758 .remove = pca953x_remove,
3760f736 759 .id_table = pca953x_id,
9e60fdcf 760};
761
f3dc3630 762static int __init pca953x_init(void)
9e60fdcf 763{
f3dc3630 764 return i2c_add_driver(&pca953x_driver);
9e60fdcf 765}
2f8d1197
DB
766/* register after i2c postcore initcall and before
767 * subsys initcalls that may rely on these GPIOs
768 */
769subsys_initcall(pca953x_init);
9e60fdcf 770
f3dc3630 771static void __exit pca953x_exit(void)
9e60fdcf 772{
f3dc3630 773 i2c_del_driver(&pca953x_driver);
9e60fdcf 774}
f3dc3630 775module_exit(pca953x_exit);
9e60fdcf 776
777MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
f3dc3630 778MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
9e60fdcf 779MODULE_LICENSE("GPL");
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