[deliverable/linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_prime.c

/*
 * Copyright 2012 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * based on nouveau_prime.c
 *
 * Authors: Alex Deucher
 */
#include <drm/drmP.h>

#include "amdgpu.h"
#include <drm/amdgpu_drm.h>
#include <linux/dma-buf.h>

struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	int npages = bo->tbo.num_pages;

	return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
}

void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	int ret;

	ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
			  &bo->dma_buf_vmap);
	if (ret)
		return ERR_PTR(ret);

	return bo->dma_buf_vmap.virtual;
}

void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);

	ttm_bo_kunmap(&bo->dma_buf_vmap);
}

struct drm_gem_object *amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
							struct dma_buf_attachment *attach,
							struct sg_table *sg)
{
	struct reservation_object *resv = attach->dmabuf->resv;
	struct amdgpu_device *adev = dev->dev_private;
	struct amdgpu_bo *bo;
	int ret;

	ww_mutex_lock(&resv->lock, NULL);
	ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
			       AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
	ww_mutex_unlock(&resv->lock);
	if (ret)
		return ERR_PTR(ret);

	return &bo->gem_base;
}

int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	int ret = 0;

	ret = amdgpu_bo_reserve(bo, false);
	if (unlikely(ret != 0))
		return ret;

	/* pin buffer into GTT */
	ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
	amdgpu_bo_unreserve(bo);
	return ret;
}

void amdgpu_gem_prime_unpin(struct drm_gem_object *obj)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	int ret = 0;

	ret = amdgpu_bo_reserve(bo, false);
	if (unlikely(ret != 0))
		return;

	amdgpu_bo_unpin(bo);
	amdgpu_bo_unreserve(bo);
}

struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);

	return bo->tbo.resv;
}

struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
					struct drm_gem_object *gobj,
					int flags)
{
	struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);

	if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))
		return ERR_PTR(-EPERM);

	return drm_gem_prime_export(dev, gobj, flags);
}
Commit	Line	Data
d38ceaf9 AD	1	/*
	2	* Copyright 2012 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* based on nouveau_prime.c
	23	*
	24	* Authors: Alex Deucher
	25	*/
	26	#include <drm/drmP.h>
	27
	28	#include "amdgpu.h"
	29	#include <drm/amdgpu_drm.h>
	30	#include <linux/dma-buf.h>
	31
	32	struct sg_table amdgpu_gem_prime_get_sg_table(struct drm_gem_object obj)
	33	{
	34	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	35	int npages = bo->tbo.num_pages;
	36
	37	return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
	38	}
	39
	40	void amdgpu_gem_prime_vmap(struct drm_gem_object obj)
	41	{
	42	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	43	int ret;
	44
	45	ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
	46	&bo->dma_buf_vmap);
	47	if (ret)
	48	return ERR_PTR(ret);
	49
	50	return bo->dma_buf_vmap.virtual;
	51	}
	52
	53	void amdgpu_gem_prime_vunmap(struct drm_gem_object obj, void vaddr)
	54	{
	55	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	56
	57	ttm_bo_kunmap(&bo->dma_buf_vmap);
	58	}
	59
	60	struct drm_gem_object amdgpu_gem_prime_import_sg_table(struct drm_device dev,
	61	struct dma_buf_attachment *attach,
	62	struct sg_table *sg)
	63	{
72d7668b	64	struct reservation_object *resv = attach->dmabuf->resv;
d38ceaf9 AD	65	struct amdgpu_device *adev = dev->dev_private;
	66	struct amdgpu_bo *bo;
	67	int ret;
	68
72d7668b	69	ww_mutex_lock(&resv->lock, NULL);
d38ceaf9	70	ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
72d7668b CK	71	AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
72d7668b CK	72	ww_mutex_unlock(&resv->lock);
d38ceaf9 AD	73	if (ret)
	74	return ERR_PTR(ret);
	75
d38ceaf9 AD	76	return &bo->gem_base;
	77	}
	78
	79	int amdgpu_gem_prime_pin(struct drm_gem_object *obj)
	80	{
	81	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	82	int ret = 0;
	83
	84	ret = amdgpu_bo_reserve(bo, false);
	85	if (unlikely(ret != 0))
	86	return ret;
	87
	88	/* pin buffer into GTT */
	89	ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
	90	amdgpu_bo_unreserve(bo);
	91	return ret;
	92	}
	93
	94	void amdgpu_gem_prime_unpin(struct drm_gem_object *obj)
	95	{
	96	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	97	int ret = 0;
	98
	99	ret = amdgpu_bo_reserve(bo, false);
	100	if (unlikely(ret != 0))
	101	return;
	102
	103	amdgpu_bo_unpin(bo);
	104	amdgpu_bo_unreserve(bo);
	105	}
	106
	107	struct reservation_object amdgpu_gem_prime_res_obj(struct drm_gem_object obj)
	108	{
	109	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
	110
	111	return bo->tbo.resv;
	112	}
	113
	114	struct dma_buf amdgpu_gem_prime_export(struct drm_device dev,
	115	struct drm_gem_object *gobj,
	116	int flags)
	117	{
	118	struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
	119
cc325d19	120	if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))
d38ceaf9 AD	121	return ERR_PTR(-EPERM);
	122
	123	return drm_gem_prime_export(dev, gobj, flags);
	124	}