[deliverable/linux.git] / drivers / gpu / drm / arm / malidp_drv.c

/*
 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
 *
 * This program is free software and is provided to you under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation, and any use by you of this program is subject to the terms
 * of such GNU licence.
 *
 * ARM Mali DP500/DP550/DP650 KMS/DRM driver
 */

#include <linux/module.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/of_device.h>
#include <linux/of_graph.h>
#include <linux/of_reserved_mem.h>

#include <drm/drmP.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_crtc.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_of.h>

#include "malidp_drv.h"
#include "malidp_regs.h"
#include "malidp_hw.h"

#define MALIDP_CONF_VALID_TIMEOUT	250

/*
 * set the "config valid" bit and wait until the hardware acts on it
 */
static int malidp_set_and_wait_config_valid(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;
	int ret;

	hwdev->set_config_valid(hwdev);
	/* don't wait for config_valid flag if we are in config mode */
	if (hwdev->in_config_mode(hwdev))
		return 0;

	ret = wait_event_interruptible_timeout(malidp->wq,
			atomic_read(&malidp->config_valid) == 1,
			msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));

	return (ret > 0) ? 0 : -ETIMEDOUT;
}

static void malidp_output_poll_changed(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;

	drm_fbdev_cma_hotplug_event(malidp->fbdev);
}

static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
{
	struct drm_pending_vblank_event *event;
	struct drm_device *drm = state->dev;
	struct malidp_drm *malidp = drm->dev_private;
	int ret = malidp_set_and_wait_config_valid(drm);

	if (ret)
		DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");

	event = malidp->crtc.state->event;
	if (event) {
		malidp->crtc.state->event = NULL;

		spin_lock_irq(&drm->event_lock);
		if (drm_crtc_vblank_get(&malidp->crtc) == 0)
			drm_crtc_arm_vblank_event(&malidp->crtc, event);
		else
			drm_crtc_send_vblank_event(&malidp->crtc, event);
		spin_unlock_irq(&drm->event_lock);
	}
	drm_atomic_helper_commit_hw_done(state);
}

static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
{
	struct drm_device *drm = state->dev;

	drm_atomic_helper_commit_modeset_disables(drm, state);
	drm_atomic_helper_commit_modeset_enables(drm, state);
	drm_atomic_helper_commit_planes(drm, state,
					DRM_PLANE_COMMIT_ACTIVE_ONLY);

	malidp_atomic_commit_hw_done(state);

	drm_atomic_helper_wait_for_vblanks(drm, state);

	drm_atomic_helper_cleanup_planes(drm, state);
}

static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
	.atomic_commit_tail = malidp_atomic_commit_tail,
};

static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
	.fb_create = drm_fb_cma_create,
	.output_poll_changed = malidp_output_poll_changed,
	.atomic_check = drm_atomic_helper_check,
	.atomic_commit = drm_atomic_helper_commit,
};

static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
			     hwdev->map.de_irq_map.vsync_irq);
	return 0;
}

static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
{
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
			      hwdev->map.de_irq_map.vsync_irq);
}

static int malidp_init(struct drm_device *drm)
{
	int ret;
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	drm_mode_config_init(drm);

	drm->mode_config.min_width = hwdev->min_line_size;
	drm->mode_config.min_height = hwdev->min_line_size;
	drm->mode_config.max_width = hwdev->max_line_size;
	drm->mode_config.max_height = hwdev->max_line_size;
	drm->mode_config.funcs = &malidp_mode_config_funcs;
	drm->mode_config.helper_private = &malidp_mode_config_helpers;

	ret = malidp_crtc_init(drm);
	if (ret) {
		drm_mode_config_cleanup(drm);
		return ret;
	}

	return 0;
}

static int malidp_irq_init(struct platform_device *pdev)
{
	int irq_de, irq_se, ret = 0;
	struct drm_device *drm = dev_get_drvdata(&pdev->dev);

	/* fetch the interrupts from DT */
	irq_de = platform_get_irq_byname(pdev, "DE");
	if (irq_de < 0) {
		DRM_ERROR("no 'DE' IRQ specified!\n");
		return irq_de;
	}
	irq_se = platform_get_irq_byname(pdev, "SE");
	if (irq_se < 0) {
		DRM_ERROR("no 'SE' IRQ specified!\n");
		return irq_se;
	}

	ret = malidp_de_irq_init(drm, irq_de);
	if (ret)
		return ret;

	ret = malidp_se_irq_init(drm, irq_se);
	if (ret) {
		malidp_de_irq_fini(drm);
		return ret;
	}

	return 0;
}

static void malidp_lastclose(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;

	drm_fbdev_cma_restore_mode(malidp->fbdev);
}

static const struct file_operations fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
#ifdef CONFIG_COMPAT
	.compat_ioctl = drm_compat_ioctl,
#endif
	.poll = drm_poll,
	.read = drm_read,
	.llseek = noop_llseek,
	.mmap = drm_gem_cma_mmap,
};

static struct drm_driver malidp_driver = {
	.driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
			   DRIVER_PRIME,
	.lastclose = malidp_lastclose,
	.get_vblank_counter = drm_vblank_no_hw_counter,
	.enable_vblank = malidp_enable_vblank,
	.disable_vblank = malidp_disable_vblank,
	.gem_free_object_unlocked = drm_gem_cma_free_object,
	.gem_vm_ops = &drm_gem_cma_vm_ops,
	.dumb_create = drm_gem_cma_dumb_create,
	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
	.dumb_destroy = drm_gem_dumb_destroy,
	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = drm_gem_prime_export,
	.gem_prime_import = drm_gem_prime_import,
	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	.gem_prime_vmap = drm_gem_cma_prime_vmap,
	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
	.gem_prime_mmap = drm_gem_cma_prime_mmap,
	.fops = &fops,
	.name = "mali-dp",
	.desc = "ARM Mali Display Processor driver",
	.date = "20160106",
	.major = 1,
	.minor = 0,
};

static const struct of_device_id  malidp_drm_of_match[] = {
	{
		.compatible = "arm,mali-dp500",
		.data = &malidp_device[MALIDP_500]
	},
	{
		.compatible = "arm,mali-dp550",
		.data = &malidp_device[MALIDP_550]
	},
	{
		.compatible = "arm,mali-dp650",
		.data = &malidp_device[MALIDP_650]
	},
	{},
};
MODULE_DEVICE_TABLE(of, malidp_drm_of_match);

#define MAX_OUTPUT_CHANNELS	3

static int malidp_bind(struct device *dev)
{
	struct resource *res;
	struct drm_device *drm;
	struct device_node *ep;
	struct malidp_drm *malidp;
	struct malidp_hw_device *hwdev;
	struct platform_device *pdev = to_platform_device(dev);
	/* number of lines for the R, G and B output */
	u8 output_width[MAX_OUTPUT_CHANNELS];
	int ret = 0, i;
	u32 version, out_depth = 0;

	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
	if (!malidp)
		return -ENOMEM;

	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
	if (!hwdev)
		return -ENOMEM;

	/*
	 * copy the associated data from malidp_drm_of_match to avoid
	 * having to keep a reference to the OF node after binding
	 */
	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
	malidp->dev = hwdev;

	INIT_LIST_HEAD(&malidp->event_list);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	hwdev->regs = devm_ioremap_resource(dev, res);
	if (IS_ERR(hwdev->regs))
		return PTR_ERR(hwdev->regs);

	hwdev->pclk = devm_clk_get(dev, "pclk");
	if (IS_ERR(hwdev->pclk))
		return PTR_ERR(hwdev->pclk);

	hwdev->aclk = devm_clk_get(dev, "aclk");
	if (IS_ERR(hwdev->aclk))
		return PTR_ERR(hwdev->aclk);

	hwdev->mclk = devm_clk_get(dev, "mclk");
	if (IS_ERR(hwdev->mclk))
		return PTR_ERR(hwdev->mclk);

	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
	if (IS_ERR(hwdev->pxlclk))
		return PTR_ERR(hwdev->pxlclk);

	/* Get the optional framebuffer memory resource */
	ret = of_reserved_mem_device_init(dev);
	if (ret && ret != -ENODEV)
		return ret;

	drm = drm_dev_alloc(&malidp_driver, dev);
	if (!drm) {
		ret = -ENOMEM;
		goto alloc_fail;
	}

	/* Enable APB clock in order to get access to the registers */
	clk_prepare_enable(hwdev->pclk);
	/*
	 * Enable AXI clock and main clock so that prefetch can start once
	 * the registers are set
	 */
	clk_prepare_enable(hwdev->aclk);
	clk_prepare_enable(hwdev->mclk);

	ret = hwdev->query_hw(hwdev);
	if (ret) {
		DRM_ERROR("Invalid HW configuration\n");
		goto query_hw_fail;
	}

	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
		 (version >> 12) & 0xf, (version >> 8) & 0xf);

	/* set the number of lines used for output of RGB data */
	ret = of_property_read_u8_array(dev->of_node,
					"arm,malidp-output-port-lines",
					output_width, MAX_OUTPUT_CHANNELS);
	if (ret)
		goto query_hw_fail;

	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
		out_depth = (out_depth << 8) | (output_width[i] & 0xf);
	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);

	drm->dev_private = malidp;
	dev_set_drvdata(dev, drm);
	atomic_set(&malidp->config_valid, 0);
	init_waitqueue_head(&malidp->wq);

	ret = malidp_init(drm);
	if (ret < 0)
		goto init_fail;

	ret = drm_dev_register(drm, 0);
	if (ret)
		goto register_fail;

	/* Set the CRTC's port so that the encoder component can find it */
	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
	if (!ep) {
		ret = -EINVAL;
		goto port_fail;
	}
	malidp->crtc.port = of_get_next_parent(ep);

	ret = component_bind_all(dev, drm);
	if (ret) {
		DRM_ERROR("Failed to bind all components\n");
		goto bind_fail;
	}

	ret = malidp_irq_init(pdev);
	if (ret < 0)
		goto irq_init_fail;

	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
	if (ret < 0) {
		DRM_ERROR("failed to initialise vblank\n");
		goto vblank_fail;
	}

	drm_mode_config_reset(drm);

	malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
					   drm->mode_config.num_connector);

	if (IS_ERR(malidp->fbdev)) {
		ret = PTR_ERR(malidp->fbdev);
		malidp->fbdev = NULL;
		goto fbdev_fail;
	}

	drm_kms_helper_poll_init(drm);
	return 0;

fbdev_fail:
	drm_vblank_cleanup(drm);
vblank_fail:
	malidp_se_irq_fini(drm);
	malidp_de_irq_fini(drm);
irq_init_fail:
	component_unbind_all(dev, drm);
bind_fail:
	of_node_put(malidp->crtc.port);
	malidp->crtc.port = NULL;
port_fail:
	drm_dev_unregister(drm);
register_fail:
	malidp_de_planes_destroy(drm);
	drm_mode_config_cleanup(drm);
init_fail:
	drm->dev_private = NULL;
	dev_set_drvdata(dev, NULL);
query_hw_fail:
	clk_disable_unprepare(hwdev->mclk);
	clk_disable_unprepare(hwdev->aclk);
	clk_disable_unprepare(hwdev->pclk);
	drm_dev_unref(drm);
alloc_fail:
	of_reserved_mem_device_release(dev);

	return ret;
}

static void malidp_unbind(struct device *dev)
{
	struct drm_device *drm = dev_get_drvdata(dev);
	struct malidp_drm *malidp = drm->dev_private;
	struct malidp_hw_device *hwdev = malidp->dev;

	if (malidp->fbdev) {
		drm_fbdev_cma_fini(malidp->fbdev);
		malidp->fbdev = NULL;
	}
	drm_kms_helper_poll_fini(drm);
	malidp_se_irq_fini(drm);
	malidp_de_irq_fini(drm);
	drm_vblank_cleanup(drm);
	component_unbind_all(dev, drm);
	of_node_put(malidp->crtc.port);
	malidp->crtc.port = NULL;
	drm_dev_unregister(drm);
	malidp_de_planes_destroy(drm);
	drm_mode_config_cleanup(drm);
	drm->dev_private = NULL;
	dev_set_drvdata(dev, NULL);
	clk_disable_unprepare(hwdev->mclk);
	clk_disable_unprepare(hwdev->aclk);
	clk_disable_unprepare(hwdev->pclk);
	drm_dev_unref(drm);
	of_reserved_mem_device_release(dev);
}

static const struct component_master_ops malidp_master_ops = {
	.bind = malidp_bind,
	.unbind = malidp_unbind,
};

static int malidp_compare_dev(struct device *dev, void *data)
{
	struct device_node *np = data;

	return dev->of_node == np;
}

static int malidp_platform_probe(struct platform_device *pdev)
{
	struct device_node *port, *ep;
	struct component_match *match = NULL;

	if (!pdev->dev.of_node)
		return -ENODEV;

	/* there is only one output port inside each device, find it */
	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
	if (!ep)
		return -ENODEV;

	if (!of_device_is_available(ep)) {
		of_node_put(ep);
		return -ENODEV;
	}

	/* add the remote encoder port as component */
	port = of_graph_get_remote_port_parent(ep);
	of_node_put(ep);
	if (!port || !of_device_is_available(port)) {
		of_node_put(port);
		return -EAGAIN;
	}

	component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
					       match);
}

static int malidp_platform_remove(struct platform_device *pdev)
{
	component_master_del(&pdev->dev, &malidp_master_ops);
	return 0;
}

static struct platform_driver malidp_platform_driver = {
	.probe		= malidp_platform_probe,
	.remove		= malidp_platform_remove,
	.driver	= {
		.name = "mali-dp",
		.of_match_table	= malidp_drm_of_match,
	},
};

module_platform_driver(malidp_platform_driver);

MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
MODULE_DESCRIPTION("ARM Mali DP DRM driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
ad49f860 LD	1	/*
	2	* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
	3	* Author: Liviu Dudau <Liviu.Dudau@arm.com>
	4	*
	5	* This program is free software and is provided to you under the terms of the
	6	* GNU General Public License version 2 as published by the Free Software
	7	* Foundation, and any use by you of this program is subject to the terms
	8	* of such GNU licence.
	9	*
	10	* ARM Mali DP500/DP550/DP650 KMS/DRM driver
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/clk.h>
	15	#include <linux/component.h>
	16	#include <linux/of_device.h>
	17	#include <linux/of_graph.h>
	18	#include <linux/of_reserved_mem.h>
	19
	20	#include <drm/drmP.h>
	21	#include <drm/drm_atomic.h>
	22	#include <drm/drm_atomic_helper.h>
	23	#include <drm/drm_crtc.h>
	24	#include <drm/drm_crtc_helper.h>
	25	#include <drm/drm_fb_helper.h>
	26	#include <drm/drm_fb_cma_helper.h>
	27	#include <drm/drm_gem_cma_helper.h>
	28	#include <drm/drm_of.h>
	29
	30	#include "malidp_drv.h"
	31	#include "malidp_regs.h"
	32	#include "malidp_hw.h"
	33
	34	#define MALIDP_CONF_VALID_TIMEOUT 250
	35
	36	/*
	37	* set the "config valid" bit and wait until the hardware acts on it
	38	*/
	39	static int malidp_set_and_wait_config_valid(struct drm_device *drm)
	40	{
	41	struct malidp_drm *malidp = drm->dev_private;
	42	struct malidp_hw_device *hwdev = malidp->dev;
	43	int ret;
	44
	45	hwdev->set_config_valid(hwdev);
	46	/* don't wait for config_valid flag if we are in config mode */
	47	if (hwdev->in_config_mode(hwdev))
	48	return 0;
	49
	50	ret = wait_event_interruptible_timeout(malidp->wq,
	51	atomic_read(&malidp->config_valid) == 1,
	52	msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));
	53
	54	return (ret > 0) ? 0 : -ETIMEDOUT;
	55	}
	56
	57	static void malidp_output_poll_changed(struct drm_device *drm)
	58	{
	59	struct malidp_drm *malidp = drm->dev_private;
	60
	61	drm_fbdev_cma_hotplug_event(malidp->fbdev);
	62	}
	63
	64	static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
65	{
66	struct drm_pending_vblank_event *event;
67	struct drm_device *drm = state->dev;
68	struct malidp_drm *malidp = drm->dev_private;
69	int ret = malidp_set_and_wait_config_valid(drm);
70
71	if (ret)
72	DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
73
74	event = malidp->crtc.state->event;
75	if (event) {
76	malidp->crtc.state->event = NULL;
77
78	spin_lock_irq(&drm->event_lock);
79	if (drm_crtc_vblank_get(&malidp->crtc) == 0)
80	drm_crtc_arm_vblank_event(&malidp->crtc, event);
81	else
82	drm_crtc_send_vblank_event(&malidp->crtc, event);
83	spin_unlock_irq(&drm->event_lock);
84	}
85	drm_atomic_helper_commit_hw_done(state);
86	}
87
88	static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
89	{
90	struct drm_device *drm = state->dev;
91
92	drm_atomic_helper_commit_modeset_disables(drm, state);
93	drm_atomic_helper_commit_modeset_enables(drm, state);
2b58e98d LY	94	drm_atomic_helper_commit_planes(drm, state,
2b58e98d LY	95	DRM_PLANE_COMMIT_ACTIVE_ONLY);
ad49f860 LD	96
	97	malidp_atomic_commit_hw_done(state);
	98
	99	drm_atomic_helper_wait_for_vblanks(drm, state);
	100
	101	drm_atomic_helper_cleanup_planes(drm, state);
	102	}
	103
	104	static struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
	105	.atomic_commit_tail = malidp_atomic_commit_tail,
	106	};
	107
	108	static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
	109	.fb_create = drm_fb_cma_create,
	110	.output_poll_changed = malidp_output_poll_changed,
	111	.atomic_check = drm_atomic_helper_check,
	112	.atomic_commit = drm_atomic_helper_commit,
	113	};
	114
	115	static int malidp_enable_vblank(struct drm_device *drm, unsigned int crtc)
	116	{
	117	struct malidp_drm *malidp = drm->dev_private;
	118	struct malidp_hw_device *hwdev = malidp->dev;
	119
	120	malidp_hw_enable_irq(hwdev, MALIDP_DE_BLOCK,
	121	hwdev->map.de_irq_map.vsync_irq);
	122	return 0;
	123	}
	124
	125	static void malidp_disable_vblank(struct drm_device *drm, unsigned int pipe)
	126	{
	127	struct malidp_drm *malidp = drm->dev_private;
	128	struct malidp_hw_device *hwdev = malidp->dev;
	129
	130	malidp_hw_disable_irq(hwdev, MALIDP_DE_BLOCK,
	131	hwdev->map.de_irq_map.vsync_irq);
	132	}
	133
	134	static int malidp_init(struct drm_device *drm)
	135	{
	136	int ret;
	137	struct malidp_drm *malidp = drm->dev_private;
	138	struct malidp_hw_device *hwdev = malidp->dev;
	139
	140	drm_mode_config_init(drm);
	141
	142	drm->mode_config.min_width = hwdev->min_line_size;
	143	drm->mode_config.min_height = hwdev->min_line_size;
	144	drm->mode_config.max_width = hwdev->max_line_size;
	145	drm->mode_config.max_height = hwdev->max_line_size;
	146	drm->mode_config.funcs = &malidp_mode_config_funcs;
	147	drm->mode_config.helper_private = &malidp_mode_config_helpers;
	148
	149	ret = malidp_crtc_init(drm);
	150	if (ret) {
	151	drm_mode_config_cleanup(drm);
	152	return ret;
	153	}
	154
	155	return 0;
	156	}
	157
	158	static int malidp_irq_init(struct platform_device *pdev)
	159	{
160	int irq_de, irq_se, ret = 0;
161	struct drm_device *drm = dev_get_drvdata(&pdev->dev);
162
163	/* fetch the interrupts from DT */
164	irq_de = platform_get_irq_byname(pdev, "DE");
165	if (irq_de < 0) {
166	DRM_ERROR("no 'DE' IRQ specified!\n");
167	return irq_de;
168	}
169	irq_se = platform_get_irq_byname(pdev, "SE");
170	if (irq_se < 0) {
171	DRM_ERROR("no 'SE' IRQ specified!\n");
172	return irq_se;
173	}
174
175	ret = malidp_de_irq_init(drm, irq_de);
176	if (ret)
177	return ret;
178
179	ret = malidp_se_irq_init(drm, irq_se);
180	if (ret) {
181	malidp_de_irq_fini(drm);
182	return ret;
183	}
184
185	return 0;
186	}
187
188	static void malidp_lastclose(struct drm_device *drm)
189	{
190	struct malidp_drm *malidp = drm->dev_private;
191
192	drm_fbdev_cma_restore_mode(malidp->fbdev);
193	}
194
195	static const struct file_operations fops = {
196	.owner = THIS_MODULE,
197	.open = drm_open,
198	.release = drm_release,
199	.unlocked_ioctl = drm_ioctl,
200	#ifdef CONFIG_COMPAT
201	.compat_ioctl = drm_compat_ioctl,
202	#endif
203	.poll = drm_poll,
204	.read = drm_read,
205	.llseek = noop_llseek,
206	.mmap = drm_gem_cma_mmap,
207	};
208
209	static struct drm_driver malidp_driver = {
210	.driver_features = DRIVER_GEM \| DRIVER_MODESET \| DRIVER_ATOMIC \|
211	DRIVER_PRIME,
212	.lastclose = malidp_lastclose,
213	.get_vblank_counter = drm_vblank_no_hw_counter,
214	.enable_vblank = malidp_enable_vblank,
215	.disable_vblank = malidp_disable_vblank,
216	.gem_free_object_unlocked = drm_gem_cma_free_object,
217	.gem_vm_ops = &drm_gem_cma_vm_ops,
218	.dumb_create = drm_gem_cma_dumb_create,
219	.dumb_map_offset = drm_gem_cma_dumb_map_offset,
220	.dumb_destroy = drm_gem_dumb_destroy,
221	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
222	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
223	.gem_prime_export = drm_gem_prime_export,
224	.gem_prime_import = drm_gem_prime_import,
225	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
226	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
227	.gem_prime_vmap = drm_gem_cma_prime_vmap,
228	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
229	.gem_prime_mmap = drm_gem_cma_prime_mmap,
230	.fops = &fops,
231	.name = "mali-dp",
232	.desc = "ARM Mali Display Processor driver",
233	.date = "20160106",
234	.major = 1,
235	.minor = 0,
236	};
237
238	static const struct of_device_id malidp_drm_of_match[] = {
239	{
240	.compatible = "arm,mali-dp500",
241	.data = &malidp_device[MALIDP_500]
242	},
243	{
244	.compatible = "arm,mali-dp550",
245	.data = &malidp_device[MALIDP_550]
246	},
247	{
248	.compatible = "arm,mali-dp650",
249	.data = &malidp_device[MALIDP_650]
250	},
251	{},
252	};
253	MODULE_DEVICE_TABLE(of, malidp_drm_of_match);
254
255	#define MAX_OUTPUT_CHANNELS 3
256
257	static int malidp_bind(struct device *dev)
258	{
259	struct resource *res;
260	struct drm_device *drm;
3c31760e	261	struct device_node *ep;
ad49f860 LD	262	struct malidp_drm *malidp;
	263	struct malidp_hw_device *hwdev;
	264	struct platform_device *pdev = to_platform_device(dev);
	265	/* number of lines for the R, G and B output */
	266	u8 output_width[MAX_OUTPUT_CHANNELS];
	267	int ret = 0, i;
	268	u32 version, out_depth = 0;
	269
	270	malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
	271	if (!malidp)
	272	return -ENOMEM;
	273
	274	hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
	275	if (!hwdev)
	276	return -ENOMEM;
	277
	278	/*
	279	* copy the associated data from malidp_drm_of_match to avoid
	280	* having to keep a reference to the OF node after binding
	281	*/
	282	memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
	283	malidp->dev = hwdev;
	284
	285	INIT_LIST_HEAD(&malidp->event_list);
	286
	287	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	288	hwdev->regs = devm_ioremap_resource(dev, res);
1a9d71f8	289	if (IS_ERR(hwdev->regs))
ad49f860	290	return PTR_ERR(hwdev->regs);
ad49f860 LD	291
	292	hwdev->pclk = devm_clk_get(dev, "pclk");
	293	if (IS_ERR(hwdev->pclk))
	294	return PTR_ERR(hwdev->pclk);
	295
	296	hwdev->aclk = devm_clk_get(dev, "aclk");
	297	if (IS_ERR(hwdev->aclk))
	298	return PTR_ERR(hwdev->aclk);
	299
	300	hwdev->mclk = devm_clk_get(dev, "mclk");
	301	if (IS_ERR(hwdev->mclk))
	302	return PTR_ERR(hwdev->mclk);
	303
	304	hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
	305	if (IS_ERR(hwdev->pxlclk))
	306	return PTR_ERR(hwdev->pxlclk);
	307
	308	/* Get the optional framebuffer memory resource */
	309	ret = of_reserved_mem_device_init(dev);
	310	if (ret && ret != -ENODEV)
	311	return ret;
	312
	313	drm = drm_dev_alloc(&malidp_driver, dev);
	314	if (!drm) {
	315	ret = -ENOMEM;
	316	goto alloc_fail;
	317	}
	318
	319	/* Enable APB clock in order to get access to the registers */
	320	clk_prepare_enable(hwdev->pclk);
	321	/*
	322	* Enable AXI clock and main clock so that prefetch can start once
	323	* the registers are set
	324	*/
	325	clk_prepare_enable(hwdev->aclk);
	326	clk_prepare_enable(hwdev->mclk);
	327
	328	ret = hwdev->query_hw(hwdev);
	329	if (ret) {
	330	DRM_ERROR("Invalid HW configuration\n");
	331	goto query_hw_fail;
	332	}
	333
	334	version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
	335	DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
	336	(version >> 12) & 0xf, (version >> 8) & 0xf);
	337
	338	/* set the number of lines used for output of RGB data */
	339	ret = of_property_read_u8_array(dev->of_node,
	340	"arm,malidp-output-port-lines",
	341	output_width, MAX_OUTPUT_CHANNELS);
	342	if (ret)
	343	goto query_hw_fail;
	344
	345	for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
	346	out_depth = (out_depth << 8) \| (output_width[i] & 0xf);
	347	malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
	348
	349	drm->dev_private = malidp;
	350	dev_set_drvdata(dev, drm);
	351	atomic_set(&malidp->config_valid, 0);
	352	init_waitqueue_head(&malidp->wq);
	353
	354	ret = malidp_init(drm);
355	if (ret < 0)
356	goto init_fail;
357
358	ret = drm_dev_register(drm, 0);
359	if (ret)
360	goto register_fail;
361
362	/* Set the CRTC's port so that the encoder component can find it */
3c31760e	363	ep = of_graph_get_next_endpoint(dev->of_node, NULL);
12ae57aa WY	364	if (!ep) {
12ae57aa WY	365	ret = -EINVAL;
3c31760e	366	goto port_fail;
12ae57aa	367	}
3c31760e	368	malidp->crtc.port = of_get_next_parent(ep);
ad49f860 LD	369
ad49f860 LD	370	ret = component_bind_all(dev, drm);
ad49f860 LD	371	if (ret) {
	372	DRM_ERROR("Failed to bind all components\n");
	373	goto bind_fail;
	374	}
	375
	376	ret = malidp_irq_init(pdev);
	377	if (ret < 0)
	378	goto irq_init_fail;
	379
	380	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
	381	if (ret < 0) {
	382	DRM_ERROR("failed to initialise vblank\n");
	383	goto vblank_fail;
	384	}
	385
	386	drm_mode_config_reset(drm);
	387
	388	malidp->fbdev = drm_fbdev_cma_init(drm, 32, drm->mode_config.num_crtc,
	389	drm->mode_config.num_connector);
	390
	391	if (IS_ERR(malidp->fbdev)) {
	392	ret = PTR_ERR(malidp->fbdev);
	393	malidp->fbdev = NULL;
	394	goto fbdev_fail;
	395	}
	396
	397	drm_kms_helper_poll_init(drm);
	398	return 0;
	399
	400	fbdev_fail:
	401	drm_vblank_cleanup(drm);
	402	vblank_fail:
	403	malidp_se_irq_fini(drm);
	404	malidp_de_irq_fini(drm);
	405	irq_init_fail:
	406	component_unbind_all(dev, drm);
	407	bind_fail:
3c31760e BS	408	of_node_put(malidp->crtc.port);
	409	malidp->crtc.port = NULL;
	410	port_fail:
ad49f860 LD	411	drm_dev_unregister(drm);
	412	register_fail:
	413	malidp_de_planes_destroy(drm);
	414	drm_mode_config_cleanup(drm);
	415	init_fail:
	416	drm->dev_private = NULL;
	417	dev_set_drvdata(dev, NULL);
	418	query_hw_fail:
	419	clk_disable_unprepare(hwdev->mclk);
	420	clk_disable_unprepare(hwdev->aclk);
	421	clk_disable_unprepare(hwdev->pclk);
	422	drm_dev_unref(drm);
	423	alloc_fail:
	424	of_reserved_mem_device_release(dev);
	425
	426	return ret;
	427	}
	428
	429	static void malidp_unbind(struct device *dev)
	430	{
	431	struct drm_device *drm = dev_get_drvdata(dev);
	432	struct malidp_drm *malidp = drm->dev_private;
	433	struct malidp_hw_device *hwdev = malidp->dev;
	434
	435	if (malidp->fbdev) {
	436	drm_fbdev_cma_fini(malidp->fbdev);
	437	malidp->fbdev = NULL;
	438	}
	439	drm_kms_helper_poll_fini(drm);
	440	malidp_se_irq_fini(drm);
	441	malidp_de_irq_fini(drm);
	442	drm_vblank_cleanup(drm);
	443	component_unbind_all(dev, drm);
3c31760e BS	444	of_node_put(malidp->crtc.port);
3c31760e BS	445	malidp->crtc.port = NULL;
ad49f860 LD	446	drm_dev_unregister(drm);
	447	malidp_de_planes_destroy(drm);
	448	drm_mode_config_cleanup(drm);
	449	drm->dev_private = NULL;
	450	dev_set_drvdata(dev, NULL);
	451	clk_disable_unprepare(hwdev->mclk);
	452	clk_disable_unprepare(hwdev->aclk);
	453	clk_disable_unprepare(hwdev->pclk);
	454	drm_dev_unref(drm);
	455	of_reserved_mem_device_release(dev);
	456	}
	457
	458	static const struct component_master_ops malidp_master_ops = {
	459	.bind = malidp_bind,
	460	.unbind = malidp_unbind,
	461	};
	462
	463	static int malidp_compare_dev(struct device dev, void data)
	464	{
	465	struct device_node *np = data;
	466
	467	return dev->of_node == np;
	468	}
	469
	470	static int malidp_platform_probe(struct platform_device *pdev)
	471	{
	472	struct device_node port, ep;
	473	struct component_match *match = NULL;
	474
	475	if (!pdev->dev.of_node)
	476	return -ENODEV;
	477
	478	/* there is only one output port inside each device, find it */
	479	ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
	480	if (!ep)
	481	return -ENODEV;
	482
	483	if (!of_device_is_available(ep)) {
	484	of_node_put(ep);
	485	return -ENODEV;
	486	}
	487
	488	/* add the remote encoder port as component */
	489	port = of_graph_get_remote_port_parent(ep);
	490	of_node_put(ep);
	491	if (!port \|\| !of_device_is_available(port)) {
	492	of_node_put(port);
	493	return -EAGAIN;
	494	}
	495
	496	component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
	497	return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
	498	match);
	499	}
	500
	501	static int malidp_platform_remove(struct platform_device *pdev)
	502	{
	503	component_master_del(&pdev->dev, &malidp_master_ops);
	504	return 0;
	505	}
	506
	507	static struct platform_driver malidp_platform_driver = {
	508	.probe = malidp_platform_probe,
	509	.remove = malidp_platform_remove,
510	.driver = {
511	.name = "mali-dp",
512	.of_match_table = malidp_drm_of_match,
513	},
514	};
515
516	module_platform_driver(malidp_platform_driver);
517
518	MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
519	MODULE_DESCRIPTION("ARM Mali DP DRM driver");
520	MODULE_LICENSE("GPL v2");