[deliverable/linux.git] / drivers / gpu / drm / arm / malidp_planes.c

/*
 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
 *
 * This program is free software and is provided to you under the terms of the
 * GNU General Public License version 2 as published by the Free Software
 * Foundation, and any use by you of this program is subject to the terms
 * of such GNU licence.
 *
 * ARM Mali DP plane manipulation routines.
 */

#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_plane_helper.h>

#include "malidp_hw.h"
#include "malidp_drv.h"

/* Layer specific register offsets */
#define MALIDP_LAYER_FORMAT		0x000
#define MALIDP_LAYER_CONTROL		0x004
#define   LAYER_ENABLE			(1 << 0)
#define   LAYER_ROT_OFFSET		8
#define   LAYER_H_FLIP			(1 << 10)
#define   LAYER_V_FLIP			(1 << 11)
#define   LAYER_ROT_MASK		(0xf << 8)
#define MALIDP_LAYER_SIZE		0x00c
#define   LAYER_H_VAL(x)		(((x) & 0x1fff) << 0)
#define   LAYER_V_VAL(x)		(((x) & 0x1fff) << 16)
#define MALIDP_LAYER_COMP_SIZE		0x010
#define MALIDP_LAYER_OFFSET		0x014
#define MALIDP_LAYER_STRIDE		0x018

static void malidp_de_plane_destroy(struct drm_plane *plane)
{
	struct malidp_plane *mp = to_malidp_plane(plane);

	if (mp->base.fb)
		drm_framebuffer_unreference(mp->base.fb);

	drm_plane_helper_disable(plane);
	drm_plane_cleanup(plane);
	devm_kfree(plane->dev->dev, mp);
}

struct drm_plane_state *malidp_duplicate_plane_state(struct drm_plane *plane)
{
	struct malidp_plane_state *state, *m_state;

	if (!plane->state)
		return NULL;

	state = kmalloc(sizeof(*state), GFP_KERNEL);
	if (state) {
		m_state = to_malidp_plane_state(plane->state);
		__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
		state->rotmem_size = m_state->rotmem_size;
	}

	return &state->base;
}

void malidp_destroy_plane_state(struct drm_plane *plane,
				struct drm_plane_state *state)
{
	struct malidp_plane_state *m_state = to_malidp_plane_state(state);

	__drm_atomic_helper_plane_destroy_state(state);
	kfree(m_state);
}

static const struct drm_plane_funcs malidp_de_plane_funcs = {
	.update_plane = drm_atomic_helper_update_plane,
	.disable_plane = drm_atomic_helper_disable_plane,
	.destroy = malidp_de_plane_destroy,
	.reset = drm_atomic_helper_plane_reset,
	.atomic_duplicate_state = malidp_duplicate_plane_state,
	.atomic_destroy_state = malidp_destroy_plane_state,
};

static int malidp_de_plane_check(struct drm_plane *plane,
				 struct drm_plane_state *state)
{
	struct malidp_plane *mp = to_malidp_plane(plane);
	struct malidp_plane_state *ms = to_malidp_plane_state(state);
	u8 format_id;
	u32 src_w, src_h;

	if (!state->crtc || !state->fb)
		return 0;

	format_id = malidp_hw_get_format_id(&mp->hwdev->map, mp->layer->id,
					    state->fb->pixel_format);
	if (format_id == MALIDP_INVALID_FORMAT_ID)
		return -EINVAL;

	src_w = state->src_w >> 16;
	src_h = state->src_h >> 16;

	if ((state->crtc_w > mp->hwdev->max_line_size) ||
	    (state->crtc_h > mp->hwdev->max_line_size) ||
	    (state->crtc_w < mp->hwdev->min_line_size) ||
	    (state->crtc_h < mp->hwdev->min_line_size) ||
	    (state->crtc_w != src_w) || (state->crtc_h != src_h))
		return -EINVAL;

	/* packed RGB888 / BGR888 can't be rotated or flipped */
	if (state->rotation != DRM_ROTATE_0 &&
	    (state->fb->pixel_format == DRM_FORMAT_RGB888 ||
	     state->fb->pixel_format == DRM_FORMAT_BGR888))
		return -EINVAL;

	ms->rotmem_size = 0;
	if (state->rotation & MALIDP_ROTATED_MASK) {
		int val;

		val = mp->hwdev->rotmem_required(mp->hwdev, state->crtc_h,
						 state->crtc_w,
						 state->fb->pixel_format);
		if (val < 0)
			return val;

		ms->rotmem_size = val;
	}

	return 0;
}

static void malidp_de_plane_update(struct drm_plane *plane,
				   struct drm_plane_state *old_state)
{
	struct drm_gem_cma_object *obj;
	struct malidp_plane *mp;
	const struct malidp_hw_regmap *map;
	u8 format_id;
	u16 ptr;
	u32 format, src_w, src_h, dest_w, dest_h, val = 0;
	int num_planes, i;

	mp = to_malidp_plane(plane);

	map = &mp->hwdev->map;
	format = plane->state->fb->pixel_format;
	format_id = malidp_hw_get_format_id(map, mp->layer->id, format);
	num_planes = drm_format_num_planes(format);

	/* convert src values from Q16 fixed point to integer */
	src_w = plane->state->src_w >> 16;
	src_h = plane->state->src_h >> 16;
	if (plane->state->rotation & MALIDP_ROTATED_MASK) {
		dest_w = plane->state->crtc_h;
		dest_h = plane->state->crtc_w;
	} else {
		dest_w = plane->state->crtc_w;
		dest_h = plane->state->crtc_h;
	}

	malidp_hw_write(mp->hwdev, format_id, mp->layer->base);

	for (i = 0; i < num_planes; i++) {
		/* calculate the offset for the layer's plane registers */
		ptr = mp->layer->ptr + (i << 4);

		obj = drm_fb_cma_get_gem_obj(plane->state->fb, i);
		malidp_hw_write(mp->hwdev, lower_32_bits(obj->paddr), ptr);
		malidp_hw_write(mp->hwdev, upper_32_bits(obj->paddr), ptr + 4);
		malidp_hw_write(mp->hwdev, plane->state->fb->pitches[i],
				mp->layer->base + MALIDP_LAYER_STRIDE);
	}

	malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) | LAYER_V_VAL(src_h),
			mp->layer->base + MALIDP_LAYER_SIZE);

	malidp_hw_write(mp->hwdev, LAYER_H_VAL(dest_w) | LAYER_V_VAL(dest_h),
			mp->layer->base + MALIDP_LAYER_COMP_SIZE);

	malidp_hw_write(mp->hwdev, LAYER_H_VAL(plane->state->crtc_x) |
			LAYER_V_VAL(plane->state->crtc_y),
			mp->layer->base + MALIDP_LAYER_OFFSET);

	/* first clear the rotation bits in the register */
	malidp_hw_clearbits(mp->hwdev, LAYER_ROT_MASK,
			    mp->layer->base + MALIDP_LAYER_CONTROL);

	/* setup the rotation and axis flip bits */
	if (plane->state->rotation & DRM_ROTATE_MASK)
		val = ilog2(plane->state->rotation & DRM_ROTATE_MASK) << LAYER_ROT_OFFSET;
	if (plane->state->rotation & DRM_REFLECT_X)
		val |= LAYER_V_FLIP;
	if (plane->state->rotation & DRM_REFLECT_Y)
		val |= LAYER_H_FLIP;

	/* set the 'enable layer' bit */
	val |= LAYER_ENABLE;

	malidp_hw_setbits(mp->hwdev, val,
			  mp->layer->base + MALIDP_LAYER_CONTROL);
}

static void malidp_de_plane_disable(struct drm_plane *plane,
				    struct drm_plane_state *state)
{
	struct malidp_plane *mp = to_malidp_plane(plane);

	malidp_hw_clearbits(mp->hwdev, LAYER_ENABLE,
			    mp->layer->base + MALIDP_LAYER_CONTROL);
}

static const struct drm_plane_helper_funcs malidp_de_plane_helper_funcs = {
	.atomic_check = malidp_de_plane_check,
	.atomic_update = malidp_de_plane_update,
	.atomic_disable = malidp_de_plane_disable,
};

int malidp_de_planes_init(struct drm_device *drm)
{
	struct malidp_drm *malidp = drm->dev_private;
	const struct malidp_hw_regmap *map = &malidp->dev->map;
	struct malidp_plane *plane = NULL;
	enum drm_plane_type plane_type;
	unsigned long crtcs = 1 << drm->mode_config.num_crtc;
	u32 *formats;
	int ret, i, j, n;

	formats = kcalloc(map->n_input_formats, sizeof(*formats), GFP_KERNEL);
	if (!formats) {
		ret = -ENOMEM;
		goto cleanup;
	}

	for (i = 0; i < map->n_layers; i++) {
		u8 id = map->layers[i].id;

		plane = kzalloc(sizeof(*plane), GFP_KERNEL);
		if (!plane) {
			ret = -ENOMEM;
			goto cleanup;
		}

		/* build the list of DRM supported formats based on the map */
		for (n = 0, j = 0;  j < map->n_input_formats; j++) {
			if ((map->input_formats[j].layer & id) == id)
				formats[n++] = map->input_formats[j].format;
		}

		plane_type = (i == 0) ? DRM_PLANE_TYPE_PRIMARY :
					DRM_PLANE_TYPE_OVERLAY;
		ret = drm_universal_plane_init(drm, &plane->base, crtcs,
					       &malidp_de_plane_funcs, formats,
					       n, plane_type, NULL);
		if (ret < 0)
			goto cleanup;

		if (!drm->mode_config.rotation_property) {
			unsigned long flags = DRM_ROTATE_0 |
					      DRM_ROTATE_90 |
					      DRM_ROTATE_180 |
					      DRM_ROTATE_270 |
					      DRM_REFLECT_X |
					      DRM_REFLECT_Y;
			drm->mode_config.rotation_property =
				drm_mode_create_rotation_property(drm, flags);
		}
		/* SMART layer can't be rotated */
		if (drm->mode_config.rotation_property && (id != DE_SMART))
			drm_object_attach_property(&plane->base.base,
						   drm->mode_config.rotation_property,
						   DRM_ROTATE_0);

		drm_plane_helper_add(&plane->base,
				     &malidp_de_plane_helper_funcs);
		plane->hwdev = malidp->dev;
		plane->layer = &map->layers[i];
	}

	kfree(formats);

	return 0;

cleanup:
	malidp_de_planes_destroy(drm);
	kfree(formats);

	return ret;
}

void malidp_de_planes_destroy(struct drm_device *drm)
{
	struct drm_plane *p, *pt;

	list_for_each_entry_safe(p, pt, &drm->mode_config.plane_list, head) {
		drm_plane_cleanup(p);
		kfree(p);
	}
}
Commit	Line	Data
ad49f860 LD	1	/*
	2	* (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
	3	* Author: Liviu Dudau <Liviu.Dudau@arm.com>
	4	*
	5	* This program is free software and is provided to you under the terms of the
	6	* GNU General Public License version 2 as published by the Free Software
	7	* Foundation, and any use by you of this program is subject to the terms
	8	* of such GNU licence.
	9	*
	10	* ARM Mali DP plane manipulation routines.
	11	*/
	12
	13	#include <drm/drmP.h>
	14	#include <drm/drm_atomic_helper.h>
	15	#include <drm/drm_fb_cma_helper.h>
	16	#include <drm/drm_gem_cma_helper.h>
	17	#include <drm/drm_plane_helper.h>
	18
	19	#include "malidp_hw.h"
	20	#include "malidp_drv.h"
	21
	22	/* Layer specific register offsets */
	23	#define MALIDP_LAYER_FORMAT 0x000
	24	#define MALIDP_LAYER_CONTROL 0x004
	25	#define LAYER_ENABLE (1 << 0)
	26	#define LAYER_ROT_OFFSET 8
	27	#define LAYER_H_FLIP (1 << 10)
	28	#define LAYER_V_FLIP (1 << 11)
	29	#define LAYER_ROT_MASK (0xf << 8)
	30	#define MALIDP_LAYER_SIZE 0x00c
	31	#define LAYER_H_VAL(x) (((x) & 0x1fff) << 0)
	32	#define LAYER_V_VAL(x) (((x) & 0x1fff) << 16)
	33	#define MALIDP_LAYER_COMP_SIZE 0x010
	34	#define MALIDP_LAYER_OFFSET 0x014
	35	#define MALIDP_LAYER_STRIDE 0x018
	36
	37	static void malidp_de_plane_destroy(struct drm_plane *plane)
	38	{
	39	struct malidp_plane *mp = to_malidp_plane(plane);
	40
	41	if (mp->base.fb)
	42	drm_framebuffer_unreference(mp->base.fb);
	43
	44	drm_plane_helper_disable(plane);
	45	drm_plane_cleanup(plane);
	46	devm_kfree(plane->dev->dev, mp);
	47	}
	48
	49	struct drm_plane_state malidp_duplicate_plane_state(struct drm_plane plane)
	50	{
	51	struct malidp_plane_state state, m_state;
	52
	53	if (!plane->state)
	54	return NULL;
	55
	56	state = kmalloc(sizeof(*state), GFP_KERNEL);
	57	if (state) {
	58	m_state = to_malidp_plane_state(plane->state);
	59	__drm_atomic_helper_plane_duplicate_state(plane, &state->base);
	60	state->rotmem_size = m_state->rotmem_size;
	61	}
	62
	63	return &state->base;
	64	}
65
66	void malidp_destroy_plane_state(struct drm_plane *plane,
67	struct drm_plane_state *state)
68	{
69	struct malidp_plane_state *m_state = to_malidp_plane_state(state);
70
71	__drm_atomic_helper_plane_destroy_state(state);
72	kfree(m_state);
73	}
74
75	static const struct drm_plane_funcs malidp_de_plane_funcs = {
76	.update_plane = drm_atomic_helper_update_plane,
77	.disable_plane = drm_atomic_helper_disable_plane,
78	.destroy = malidp_de_plane_destroy,
79	.reset = drm_atomic_helper_plane_reset,
80	.atomic_duplicate_state = malidp_duplicate_plane_state,
81	.atomic_destroy_state = malidp_destroy_plane_state,
82	};
83
84	static int malidp_de_plane_check(struct drm_plane *plane,
85	struct drm_plane_state *state)
86	{
87	struct malidp_plane *mp = to_malidp_plane(plane);
88	struct malidp_plane_state *ms = to_malidp_plane_state(state);
89	u8 format_id;
90	u32 src_w, src_h;
91
92	if (!state->crtc \|\| !state->fb)
93	return 0;
94
95	format_id = malidp_hw_get_format_id(&mp->hwdev->map, mp->layer->id,
96	state->fb->pixel_format);
97	if (format_id == MALIDP_INVALID_FORMAT_ID)
98	return -EINVAL;
99
100	src_w = state->src_w >> 16;
101	src_h = state->src_h >> 16;
102
103	if ((state->crtc_w > mp->hwdev->max_line_size) \|\|
104	(state->crtc_h > mp->hwdev->max_line_size) \|\|
105	(state->crtc_w < mp->hwdev->min_line_size) \|\|
106	(state->crtc_h < mp->hwdev->min_line_size) \|\|
107	(state->crtc_w != src_w) \|\| (state->crtc_h != src_h))
108	return -EINVAL;
109
110	/* packed RGB888 / BGR888 can't be rotated or flipped */
31ad61e4	111	if (state->rotation != DRM_ROTATE_0 &&
ad49f860 LD	112	(state->fb->pixel_format == DRM_FORMAT_RGB888 \|\|
	113	state->fb->pixel_format == DRM_FORMAT_BGR888))
	114	return -EINVAL;
	115
	116	ms->rotmem_size = 0;
	117	if (state->rotation & MALIDP_ROTATED_MASK) {
	118	int val;
	119
	120	val = mp->hwdev->rotmem_required(mp->hwdev, state->crtc_h,
	121	state->crtc_w,
	122	state->fb->pixel_format);
	123	if (val < 0)
	124	return val;
	125
	126	ms->rotmem_size = val;
	127	}
	128
	129	return 0;
	130	}
	131
	132	static void malidp_de_plane_update(struct drm_plane *plane,
	133	struct drm_plane_state *old_state)
	134	{
	135	struct drm_gem_cma_object *obj;
	136	struct malidp_plane *mp;
	137	const struct malidp_hw_regmap *map;
	138	u8 format_id;
	139	u16 ptr;
	140	u32 format, src_w, src_h, dest_w, dest_h, val = 0;
	141	int num_planes, i;
	142
	143	mp = to_malidp_plane(plane);
	144
	145	map = &mp->hwdev->map;
	146	format = plane->state->fb->pixel_format;
	147	format_id = malidp_hw_get_format_id(map, mp->layer->id, format);
	148	num_planes = drm_format_num_planes(format);
	149
	150	/* convert src values from Q16 fixed point to integer */
	151	src_w = plane->state->src_w >> 16;
	152	src_h = plane->state->src_h >> 16;
	153	if (plane->state->rotation & MALIDP_ROTATED_MASK) {
	154	dest_w = plane->state->crtc_h;
	155	dest_h = plane->state->crtc_w;
	156	} else {
	157	dest_w = plane->state->crtc_w;
	158	dest_h = plane->state->crtc_h;
	159	}
	160
	161	malidp_hw_write(mp->hwdev, format_id, mp->layer->base);
	162
	163	for (i = 0; i < num_planes; i++) {
	164	/* calculate the offset for the layer's plane registers */
	165	ptr = mp->layer->ptr + (i << 4);
	166
	167	obj = drm_fb_cma_get_gem_obj(plane->state->fb, i);
	168	malidp_hw_write(mp->hwdev, lower_32_bits(obj->paddr), ptr);
	169	malidp_hw_write(mp->hwdev, upper_32_bits(obj->paddr), ptr + 4);
	170	malidp_hw_write(mp->hwdev, plane->state->fb->pitches[i],
	171	mp->layer->base + MALIDP_LAYER_STRIDE);
	172	}
	173
	174	malidp_hw_write(mp->hwdev, LAYER_H_VAL(src_w) \| LAYER_V_VAL(src_h),
	175	mp->layer->base + MALIDP_LAYER_SIZE);
176
177	malidp_hw_write(mp->hwdev, LAYER_H_VAL(dest_w) \| LAYER_V_VAL(dest_h),
178	mp->layer->base + MALIDP_LAYER_COMP_SIZE);
179
180	malidp_hw_write(mp->hwdev, LAYER_H_VAL(plane->state->crtc_x) \|
181	LAYER_V_VAL(plane->state->crtc_y),
182	mp->layer->base + MALIDP_LAYER_OFFSET);
183
184	/* first clear the rotation bits in the register */
185	malidp_hw_clearbits(mp->hwdev, LAYER_ROT_MASK,
186	mp->layer->base + MALIDP_LAYER_CONTROL);
187
188	/* setup the rotation and axis flip bits */
189	if (plane->state->rotation & DRM_ROTATE_MASK)
190	val = ilog2(plane->state->rotation & DRM_ROTATE_MASK) << LAYER_ROT_OFFSET;
31ad61e4	191	if (plane->state->rotation & DRM_REFLECT_X)
ad49f860	192	val \|= LAYER_V_FLIP;
31ad61e4	193	if (plane->state->rotation & DRM_REFLECT_Y)
ad49f860 LD	194	val \|= LAYER_H_FLIP;
	195
	196	/* set the 'enable layer' bit */
	197	val \|= LAYER_ENABLE;
	198
	199	malidp_hw_setbits(mp->hwdev, val,
	200	mp->layer->base + MALIDP_LAYER_CONTROL);
	201	}
	202
	203	static void malidp_de_plane_disable(struct drm_plane *plane,
	204	struct drm_plane_state *state)
	205	{
	206	struct malidp_plane *mp = to_malidp_plane(plane);
	207
	208	malidp_hw_clearbits(mp->hwdev, LAYER_ENABLE,
	209	mp->layer->base + MALIDP_LAYER_CONTROL);
	210	}
	211
	212	static const struct drm_plane_helper_funcs malidp_de_plane_helper_funcs = {
	213	.atomic_check = malidp_de_plane_check,
	214	.atomic_update = malidp_de_plane_update,
	215	.atomic_disable = malidp_de_plane_disable,
	216	};
	217
	218	int malidp_de_planes_init(struct drm_device *drm)
	219	{
	220	struct malidp_drm *malidp = drm->dev_private;
	221	const struct malidp_hw_regmap *map = &malidp->dev->map;
	222	struct malidp_plane *plane = NULL;
	223	enum drm_plane_type plane_type;
	224	unsigned long crtcs = 1 << drm->mode_config.num_crtc;
	225	u32 *formats;
	226	int ret, i, j, n;
	227
	228	formats = kcalloc(map->n_input_formats, sizeof(*formats), GFP_KERNEL);
	229	if (!formats) {
	230	ret = -ENOMEM;
	231	goto cleanup;
	232	}
	233
	234	for (i = 0; i < map->n_layers; i++) {
	235	u8 id = map->layers[i].id;
	236
	237	plane = kzalloc(sizeof(*plane), GFP_KERNEL);
	238	if (!plane) {
	239	ret = -ENOMEM;
	240	goto cleanup;
	241	}
	242
	243	/* build the list of DRM supported formats based on the map */
	244	for (n = 0, j = 0; j < map->n_input_formats; j++) {
	245	if ((map->input_formats[j].layer & id) == id)
	246	formats[n++] = map->input_formats[j].format;
	247	}
	248
	249	plane_type = (i == 0) ? DRM_PLANE_TYPE_PRIMARY :
	250	DRM_PLANE_TYPE_OVERLAY;
	251	ret = drm_universal_plane_init(drm, &plane->base, crtcs,
	252	&malidp_de_plane_funcs, formats,
	253	n, plane_type, NULL);
	254	if (ret < 0)
	255	goto cleanup;
	256
	257	if (!drm->mode_config.rotation_property) {
31ad61e4 JL	258	unsigned long flags = DRM_ROTATE_0 \|
	259	DRM_ROTATE_90 \|
	260	DRM_ROTATE_180 \|
	261	DRM_ROTATE_270 \|
	262	DRM_REFLECT_X \|
	263	DRM_REFLECT_Y;
ad49f860 LD	264	drm->mode_config.rotation_property =
	265	drm_mode_create_rotation_property(drm, flags);
	266	}
	267	/* SMART layer can't be rotated */
	268	if (drm->mode_config.rotation_property && (id != DE_SMART))
	269	drm_object_attach_property(&plane->base.base,
	270	drm->mode_config.rotation_property,
31ad61e4	271	DRM_ROTATE_0);
ad49f860 LD	272
	273	drm_plane_helper_add(&plane->base,
	274	&malidp_de_plane_helper_funcs);
	275	plane->hwdev = malidp->dev;
	276	plane->layer = &map->layers[i];
	277	}
	278
	279	kfree(formats);
	280
	281	return 0;
	282
	283	cleanup:
	284	malidp_de_planes_destroy(drm);
	285	kfree(formats);
	286
	287	return ret;
	288	}
	289
	290	void malidp_de_planes_destroy(struct drm_device *drm)
	291	{
	292	struct drm_plane p, pt;
	293
	294	list_for_each_entry_safe(p, pt, &drm->mode_config.plane_list, head) {
	295	drm_plane_cleanup(p);
	296	kfree(p);
	297	}
	298	}