[deliverable/linux.git] / drivers / gpu / drm / bridge / analogix / analogix_dp_core.h

/*
 * Header file for Analogix DP (Display Port) core interface driver.
 *
 * Copyright (C) 2012 Samsung Electronics Co., Ltd.
 * Author: Jingoo Han <jg1.han@samsung.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#ifndef _ANALOGIX_DP_CORE_H
#define _ANALOGIX_DP_CORE_H

#include <drm/drm_crtc.h>
#include <drm/drm_dp_helper.h>

#define DP_TIMEOUT_LOOP_COUNT 100
#define MAX_CR_LOOP 5
#define MAX_EQ_LOOP 5

/* I2C EDID Chip ID, Slave Address */
#define I2C_EDID_DEVICE_ADDR			0x50
#define I2C_E_EDID_DEVICE_ADDR			0x30

#define EDID_BLOCK_LENGTH			0x80
#define EDID_HEADER_PATTERN			0x00
#define EDID_EXTENSION_FLAG			0x7e
#define EDID_CHECKSUM				0x7f

/* DP_MAX_LANE_COUNT */
#define DPCD_ENHANCED_FRAME_CAP(x)		(((x) >> 7) & 0x1)
#define DPCD_MAX_LANE_COUNT(x)			((x) & 0x1f)

/* DP_LANE_COUNT_SET */
#define DPCD_LANE_COUNT_SET(x)			((x) & 0x1f)

/* DP_TRAINING_LANE0_SET */
#define DPCD_PRE_EMPHASIS_SET(x)		(((x) & 0x3) << 3)
#define DPCD_PRE_EMPHASIS_GET(x)		(((x) >> 3) & 0x3)
#define DPCD_VOLTAGE_SWING_SET(x)		(((x) & 0x3) << 0)
#define DPCD_VOLTAGE_SWING_GET(x)		(((x) >> 0) & 0x3)

enum link_lane_count_type {
	LANE_COUNT1 = 1,
	LANE_COUNT2 = 2,
	LANE_COUNT4 = 4
};

enum link_training_state {
	START,
	CLOCK_RECOVERY,
	EQUALIZER_TRAINING,
	FINISHED,
	FAILED
};

enum voltage_swing_level {
	VOLTAGE_LEVEL_0,
	VOLTAGE_LEVEL_1,
	VOLTAGE_LEVEL_2,
	VOLTAGE_LEVEL_3,
};

enum pre_emphasis_level {
	PRE_EMPHASIS_LEVEL_0,
	PRE_EMPHASIS_LEVEL_1,
	PRE_EMPHASIS_LEVEL_2,
	PRE_EMPHASIS_LEVEL_3,
};

enum pattern_set {
	PRBS7,
	D10_2,
	TRAINING_PTN1,
	TRAINING_PTN2,
	DP_NONE
};

enum color_space {
	COLOR_RGB,
	COLOR_YCBCR422,
	COLOR_YCBCR444
};

enum color_depth {
	COLOR_6,
	COLOR_8,
	COLOR_10,
	COLOR_12
};

enum color_coefficient {
	COLOR_YCBCR601,
	COLOR_YCBCR709
};

enum dynamic_range {
	VESA,
	CEA
};

enum pll_status {
	PLL_UNLOCKED,
	PLL_LOCKED
};

enum clock_recovery_m_value_type {
	CALCULATED_M,
	REGISTER_M
};

enum video_timing_recognition_type {
	VIDEO_TIMING_FROM_CAPTURE,
	VIDEO_TIMING_FROM_REGISTER
};

enum analog_power_block {
	AUX_BLOCK,
	CH0_BLOCK,
	CH1_BLOCK,
	CH2_BLOCK,
	CH3_BLOCK,
	ANALOG_TOTAL,
	POWER_ALL
};

enum dp_irq_type {
	DP_IRQ_TYPE_HP_CABLE_IN  = BIT(0),
	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
	DP_IRQ_TYPE_HP_CHANGE    = BIT(2),
	DP_IRQ_TYPE_UNKNOWN      = BIT(3),
};

struct video_info {
	char *name;

	bool h_sync_polarity;
	bool v_sync_polarity;
	bool interlaced;

	enum color_space color_space;
	enum dynamic_range dynamic_range;
	enum color_coefficient ycbcr_coeff;
	enum color_depth color_depth;

	int max_link_rate;
	enum link_lane_count_type max_lane_count;
};

struct link_train {
	int eq_loop;
	int cr_loop[4];

	u8 link_rate;
	u8 lane_count;
	u8 training_lane[4];

	enum link_training_state lt_state;
};

struct analogix_dp_device {
	struct drm_encoder	*encoder;
	struct device		*dev;
	struct drm_device	*drm_dev;
	struct drm_connector	connector;
	struct drm_bridge	*bridge;
	struct clk		*clock;
	unsigned int		irq;
	void __iomem		*reg_base;

	struct video_info	video_info;
	struct link_train	link_train;
	struct phy		*phy;
	int			dpms_mode;
	int			hpd_gpio;
	bool                    force_hpd;
	unsigned char           edid[EDID_BLOCK_LENGTH * 2];
	bool			psr_support;

	struct mutex		panel_lock;
	bool			panel_is_modeset;

	struct analogix_dp_plat_data *plat_data;
};

/* analogix_dp_reg.c */
void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable);
void analogix_dp_stop_video(struct analogix_dp_device *dp);
void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable);
void analogix_dp_init_analog_param(struct analogix_dp_device *dp);
void analogix_dp_init_interrupt(struct analogix_dp_device *dp);
void analogix_dp_reset(struct analogix_dp_device *dp);
void analogix_dp_swreset(struct analogix_dp_device *dp);
void analogix_dp_config_interrupt(struct analogix_dp_device *dp);
void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp);
void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp);
enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp);
void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
				       enum analog_power_block block,
				       bool enable);
void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
void analogix_dp_init_hpd(struct analogix_dp_device *dp);
void analogix_dp_force_hpd(struct analogix_dp_device *dp);
enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
void analogix_dp_reset_aux(struct analogix_dp_device *dp);
void analogix_dp_init_aux(struct analogix_dp_device *dp);
int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp);
int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
				   unsigned int reg_addr,
				   unsigned char data);
int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
				    unsigned int reg_addr,
				    unsigned char *data);
int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
				    unsigned int reg_addr,
				    unsigned int count,
				    unsigned char data[]);
int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
				     unsigned int reg_addr,
				     unsigned int count,
				     unsigned char data[]);
int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
				  unsigned int device_addr,
				  unsigned int reg_addr);
int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
				   unsigned int device_addr,
				   unsigned int reg_addr,
				   unsigned int *data);
int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
				    unsigned int device_addr,
				    unsigned int reg_addr,
				    unsigned int count,
				    unsigned char edid[]);
void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype);
void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype);
void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count);
void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count);
void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
				      bool enable);
void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
				      enum pattern_set pattern);
void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
					u32 level);
void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
					u32 level);
void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
					u32 level);
void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
					u32 level);
void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
					 u32 training_lane);
void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
					 u32 training_lane);
void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
					 u32 training_lane);
void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
					 u32 training_lane);
u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
void analogix_dp_reset_macro(struct analogix_dp_device *dp);
void analogix_dp_init_video(struct analogix_dp_device *dp);

void analogix_dp_set_video_color_format(struct analogix_dp_device *dp);
int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp);
void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
				 enum clock_recovery_m_value_type type,
				 u32 m_value,
				 u32 n_value);
void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type);
void analogix_dp_enable_video_master(struct analogix_dp_device *dp,
				     bool enable);
void analogix_dp_start_video(struct analogix_dp_device *dp);
int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
			      struct edp_vsc_psr *vsc);

#endif /* _ANALOGIX_DP_CORE_H */
Commit	Line	Data
3424e3a4 YY	1	/*
	2	* Header file for Analogix DP (Display Port) core interface driver.
	3	*
	4	* Copyright (C) 2012 Samsung Electronics Co., Ltd.
	5	* Author: Jingoo Han <jg1.han@samsung.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License as published by the
	9	* Free Software Foundation; either version 2 of the License, or (at your
	10	* option) any later version.
	11	*/
	12
	13	#ifndef _ANALOGIX_DP_CORE_H
	14	#define _ANALOGIX_DP_CORE_H
	15
	16	#include <drm/drm_crtc.h>
	17	#include <drm/drm_dp_helper.h>
	18
	19	#define DP_TIMEOUT_LOOP_COUNT 100
	20	#define MAX_CR_LOOP 5
	21	#define MAX_EQ_LOOP 5
	22
398a3995 YY	23	/* I2C EDID Chip ID, Slave Address */
	24	#define I2C_EDID_DEVICE_ADDR 0x50
	25	#define I2C_E_EDID_DEVICE_ADDR 0x30
	26
	27	#define EDID_BLOCK_LENGTH 0x80
	28	#define EDID_HEADER_PATTERN 0x00
	29	#define EDID_EXTENSION_FLAG 0x7e
	30	#define EDID_CHECKSUM 0x7f
	31
	32	/* DP_MAX_LANE_COUNT */
	33	#define DPCD_ENHANCED_FRAME_CAP(x) (((x) >> 7) & 0x1)
	34	#define DPCD_MAX_LANE_COUNT(x) ((x) & 0x1f)
	35
	36	/* DP_LANE_COUNT_SET */
	37	#define DPCD_LANE_COUNT_SET(x) ((x) & 0x1f)
	38
	39	/* DP_TRAINING_LANE0_SET */
	40	#define DPCD_PRE_EMPHASIS_SET(x) (((x) & 0x3) << 3)
	41	#define DPCD_PRE_EMPHASIS_GET(x) (((x) >> 3) & 0x3)
	42	#define DPCD_VOLTAGE_SWING_SET(x) (((x) & 0x3) << 0)
	43	#define DPCD_VOLTAGE_SWING_GET(x) (((x) >> 0) & 0x3)
	44
3424e3a4 YY	45	enum link_lane_count_type {
	46	LANE_COUNT1 = 1,
	47	LANE_COUNT2 = 2,
	48	LANE_COUNT4 = 4
	49	};
	50
	51	enum link_training_state {
	52	START,
	53	CLOCK_RECOVERY,
	54	EQUALIZER_TRAINING,
	55	FINISHED,
	56	FAILED
	57	};
	58
	59	enum voltage_swing_level {
	60	VOLTAGE_LEVEL_0,
	61	VOLTAGE_LEVEL_1,
	62	VOLTAGE_LEVEL_2,
	63	VOLTAGE_LEVEL_3,
	64	};
	65
	66	enum pre_emphasis_level {
	67	PRE_EMPHASIS_LEVEL_0,
	68	PRE_EMPHASIS_LEVEL_1,
	69	PRE_EMPHASIS_LEVEL_2,
	70	PRE_EMPHASIS_LEVEL_3,
	71	};
	72
	73	enum pattern_set {
	74	PRBS7,
	75	D10_2,
	76	TRAINING_PTN1,
	77	TRAINING_PTN2,
	78	DP_NONE
	79	};
	80
	81	enum color_space {
	82	COLOR_RGB,
	83	COLOR_YCBCR422,
	84	COLOR_YCBCR444
	85	};
	86
	87	enum color_depth {
	88	COLOR_6,
	89	COLOR_8,
	90	COLOR_10,
	91	COLOR_12
	92	};
	93
	94	enum color_coefficient {
	95	COLOR_YCBCR601,
	96	COLOR_YCBCR709
	97	};
	98
	99	enum dynamic_range {
	100	VESA,
	101	CEA
	102	};
	103
	104	enum pll_status {
	105	PLL_UNLOCKED,
	106	PLL_LOCKED
	107	};
	108
109	enum clock_recovery_m_value_type {
110	CALCULATED_M,
111	REGISTER_M
112	};
113
114	enum video_timing_recognition_type {
115	VIDEO_TIMING_FROM_CAPTURE,
116	VIDEO_TIMING_FROM_REGISTER
117	};
118
119	enum analog_power_block {
120	AUX_BLOCK,
121	CH0_BLOCK,
122	CH1_BLOCK,
123	CH2_BLOCK,
124	CH3_BLOCK,
125	ANALOG_TOTAL,
126	POWER_ALL
127	};
128
129	enum dp_irq_type {
7608a9fb YY	130	DP_IRQ_TYPE_HP_CABLE_IN = BIT(0),
	131	DP_IRQ_TYPE_HP_CABLE_OUT = BIT(1),
	132	DP_IRQ_TYPE_HP_CHANGE = BIT(2),
	133	DP_IRQ_TYPE_UNKNOWN = BIT(3),
3424e3a4 YY	134	};
	135
	136	struct video_info {
	137	char *name;
	138
	139	bool h_sync_polarity;
	140	bool v_sync_polarity;
	141	bool interlaced;
	142
	143	enum color_space color_space;
	144	enum dynamic_range dynamic_range;
	145	enum color_coefficient ycbcr_coeff;
	146	enum color_depth color_depth;
	147
0d0abd89 YY	148	int max_link_rate;
0d0abd89 YY	149	enum link_lane_count_type max_lane_count;
3424e3a4 YY	150	};
	151
	152	struct link_train {
	153	int eq_loop;
	154	int cr_loop[4];
	155
	156	u8 link_rate;
	157	u8 lane_count;
	158	u8 training_lane[4];
	159
	160	enum link_training_state lt_state;
	161	};
	162
	163	struct analogix_dp_device {
	164	struct drm_encoder *encoder;
	165	struct device *dev;
	166	struct drm_device *drm_dev;
	167	struct drm_connector connector;
	168	struct drm_bridge *bridge;
	169	struct clk *clock;
	170	unsigned int irq;
	171	void __iomem *reg_base;
	172
793ce4eb	173	struct video_info video_info;
3424e3a4	174	struct link_train link_train;
3424e3a4 YY	175	struct phy *phy;
	176	int dpms_mode;
	177	int hpd_gpio;
5cff007c	178	bool force_hpd;
398a3995	179	unsigned char edid[EDID_BLOCK_LENGTH * 2];
5b3f84f2	180	bool psr_support;
3424e3a4	181
0b8b059a SP	182	struct mutex panel_lock;
	183	bool panel_is_modeset;
	184
3424e3a4 YY	185	struct analogix_dp_plat_data *plat_data;
	186	};
	187
	188	/* analogix_dp_reg.c */
	189	void analogix_dp_enable_video_mute(struct analogix_dp_device *dp, bool enable);
	190	void analogix_dp_stop_video(struct analogix_dp_device *dp);
	191	void analogix_dp_lane_swap(struct analogix_dp_device *dp, bool enable);
	192	void analogix_dp_init_analog_param(struct analogix_dp_device *dp);
	193	void analogix_dp_init_interrupt(struct analogix_dp_device *dp);
	194	void analogix_dp_reset(struct analogix_dp_device *dp);
	195	void analogix_dp_swreset(struct analogix_dp_device *dp);
	196	void analogix_dp_config_interrupt(struct analogix_dp_device *dp);
7b4b7a8d YY	197	void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp);
7b4b7a8d YY	198	void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp);
3424e3a4 YY	199	enum pll_status analogix_dp_get_pll_lock_status(struct analogix_dp_device *dp);
	200	void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable);
	201	void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp,
	202	enum analog_power_block block,
	203	bool enable);
	204	void analogix_dp_init_analog_func(struct analogix_dp_device *dp);
	205	void analogix_dp_init_hpd(struct analogix_dp_device *dp);
5cff007c	206	void analogix_dp_force_hpd(struct analogix_dp_device *dp);
3424e3a4 YY	207	enum dp_irq_type analogix_dp_get_irq_type(struct analogix_dp_device *dp);
	208	void analogix_dp_clear_hotplug_interrupts(struct analogix_dp_device *dp);
	209	void analogix_dp_reset_aux(struct analogix_dp_device *dp);
	210	void analogix_dp_init_aux(struct analogix_dp_device *dp);
	211	int analogix_dp_get_plug_in_status(struct analogix_dp_device *dp);
	212	void analogix_dp_enable_sw_function(struct analogix_dp_device *dp);
	213	int analogix_dp_start_aux_transaction(struct analogix_dp_device *dp);
	214	int analogix_dp_write_byte_to_dpcd(struct analogix_dp_device *dp,
bcbb7033 YY	215	unsigned int reg_addr,
bcbb7033 YY	216	unsigned char data);
3424e3a4	217	int analogix_dp_read_byte_from_dpcd(struct analogix_dp_device *dp,
bcbb7033 YY	218	unsigned int reg_addr,
bcbb7033 YY	219	unsigned char *data);
3424e3a4	220	int analogix_dp_write_bytes_to_dpcd(struct analogix_dp_device *dp,
bcbb7033 YY	221	unsigned int reg_addr,
	222	unsigned int count,
	223	unsigned char data[]);
3424e3a4	224	int analogix_dp_read_bytes_from_dpcd(struct analogix_dp_device *dp,
bcbb7033 YY	225	unsigned int reg_addr,
	226	unsigned int count,
	227	unsigned char data[]);
3424e3a4	228	int analogix_dp_select_i2c_device(struct analogix_dp_device *dp,
bcbb7033 YY	229	unsigned int device_addr,
bcbb7033 YY	230	unsigned int reg_addr);
3424e3a4	231	int analogix_dp_read_byte_from_i2c(struct analogix_dp_device *dp,
bcbb7033 YY	232	unsigned int device_addr,
	233	unsigned int reg_addr,
	234	unsigned int *data);
3424e3a4	235	int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp,
bcbb7033 YY	236	unsigned int device_addr,
	237	unsigned int reg_addr,
	238	unsigned int count,
	239	unsigned char edid[]);
3424e3a4 YY	240	void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype);
	241	void analogix_dp_get_link_bandwidth(struct analogix_dp_device dp, u32 bwtype);
	242	void analogix_dp_set_lane_count(struct analogix_dp_device *dp, u32 count);
	243	void analogix_dp_get_lane_count(struct analogix_dp_device dp, u32 count);
bcbb7033 YY	244	void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
bcbb7033 YY	245	bool enable);
3424e3a4	246	void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
bcbb7033 YY	247	enum pattern_set pattern);
	248	void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
	249	u32 level);
	250	void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
	251	u32 level);
	252	void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
	253	u32 level);
	254	void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
	255	u32 level);
3424e3a4	256	void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
bcbb7033	257	u32 training_lane);
3424e3a4	258	void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
bcbb7033	259	u32 training_lane);
3424e3a4	260	void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
bcbb7033	261	u32 training_lane);
3424e3a4	262	void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
bcbb7033	263	u32 training_lane);
3424e3a4 YY	264	u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
	265	u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
	266	u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
	267	u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
	268	void analogix_dp_reset_macro(struct analogix_dp_device *dp);
	269	void analogix_dp_init_video(struct analogix_dp_device *dp);
	270
	271	void analogix_dp_set_video_color_format(struct analogix_dp_device *dp);
	272	int analogix_dp_is_slave_video_stream_clock_on(struct analogix_dp_device *dp);
	273	void analogix_dp_set_video_cr_mn(struct analogix_dp_device *dp,
bcbb7033 YY	274	enum clock_recovery_m_value_type type,
	275	u32 m_value,
	276	u32 n_value);
3424e3a4	277	void analogix_dp_set_video_timing_mode(struct analogix_dp_device *dp, u32 type);
bcbb7033 YY	278	void analogix_dp_enable_video_master(struct analogix_dp_device *dp,
bcbb7033 YY	279	bool enable);
3424e3a4 YY	280	void analogix_dp_start_video(struct analogix_dp_device *dp);
	281	int analogix_dp_is_video_stream_on(struct analogix_dp_device *dp);
	282	void analogix_dp_config_video_slave_mode(struct analogix_dp_device *dp);
	283	void analogix_dp_enable_scrambling(struct analogix_dp_device *dp);
	284	void analogix_dp_disable_scrambling(struct analogix_dp_device *dp);
5b3f84f2 YY	285	void analogix_dp_enable_psr_crc(struct analogix_dp_device *dp);
	286	void analogix_dp_send_psr_spd(struct analogix_dp_device *dp,
	287	struct edp_vsc_psr *vsc);
	288
3424e3a4	289	#endif /* _ANALOGIX_DP_CORE_H */