Merge remote-tracking branch 'block/for-next'
[deliverable/linux.git] / drivers / gpu / drm / gma500 / psb_intel_lvds.c
CommitLineData
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1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc.,
15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16 *
17 * Authors:
18 * Eric Anholt <eric@anholt.net>
19 * Dave Airlie <airlied@linux.ie>
20 * Jesse Barnes <jesse.barnes@intel.com>
21 */
22
23#include <linux/i2c.h>
24#include <drm/drmP.h>
25
26#include "intel_bios.h"
27#include "psb_drv.h"
28#include "psb_intel_drv.h"
29#include "psb_intel_reg.h"
30#include "power.h"
31#include <linux/pm_runtime.h>
32
33/*
34 * LVDS I2C backlight control macros
35 */
36#define BRIGHTNESS_MAX_LEVEL 100
37#define BRIGHTNESS_MASK 0xFF
38#define BLC_I2C_TYPE 0x01
39#define BLC_PWM_TYPT 0x02
40
41#define BLC_POLARITY_NORMAL 0
42#define BLC_POLARITY_INVERSE 1
43
44#define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
45#define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
46#define PSB_BLC_PWM_PRECISION_FACTOR (10)
47#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
48#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
49
50struct psb_intel_lvds_priv {
51 /*
52 * Saved LVDO output states
53 */
54 uint32_t savePP_ON;
55 uint32_t savePP_OFF;
56 uint32_t saveLVDS;
57 uint32_t savePP_CONTROL;
58 uint32_t savePP_CYCLE;
59 uint32_t savePFIT_CONTROL;
60 uint32_t savePFIT_PGM_RATIOS;
61 uint32_t saveBLC_PWM_CTL;
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62
63 struct psb_intel_i2c_chan *i2c_bus;
64 struct psb_intel_i2c_chan *ddc_bus;
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65};
66
67
68/*
69 * Returns the maximum level of the backlight duty cycle field.
70 */
71static u32 psb_intel_lvds_get_max_backlight(struct drm_device *dev)
72{
73 struct drm_psb_private *dev_priv = dev->dev_private;
1f0d0b51 74 u32 ret;
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75
76 if (gma_power_begin(dev, false)) {
1f0d0b51 77 ret = REG_READ(BLC_PWM_CTL);
89c78134 78 gma_power_end(dev);
1f0d0b51 79 } else /* Powered off, use the saved value */
648a8e34 80 ret = dev_priv->regs.saveBLC_PWM_CTL;
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81
82 /* Top 15bits hold the frequency mask */
83 ret = (ret & BACKLIGHT_MODULATION_FREQ_MASK) >>
84 BACKLIGHT_MODULATION_FREQ_SHIFT;
85
86 ret *= 2; /* Return a 16bit range as needed for setting */
87 if (ret == 0)
88 dev_err(dev->dev, "BL bug: Reg %08x save %08X\n",
648a8e34 89 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL);
1f0d0b51 90 return ret;
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91}
92
93/*
94 * Set LVDS backlight level by I2C command
95 *
96 * FIXME: at some point we need to both track this for PM and also
97 * disable runtime pm on MRST if the brightness is nil (ie blanked)
98 */
99static int psb_lvds_i2c_set_brightness(struct drm_device *dev,
100 unsigned int level)
101{
102 struct drm_psb_private *dev_priv =
103 (struct drm_psb_private *)dev->dev_private;
104
105 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
106 u8 out_buf[2];
107 unsigned int blc_i2c_brightness;
108
109 struct i2c_msg msgs[] = {
110 {
111 .addr = lvds_i2c_bus->slave_addr,
112 .flags = 0,
113 .len = 2,
114 .buf = out_buf,
115 }
116 };
117
118 blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
119 BRIGHTNESS_MASK /
120 BRIGHTNESS_MAX_LEVEL);
121
122 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
123 blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
124
125 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
126 out_buf[1] = (u8)blc_i2c_brightness;
127
128 if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1) {
129 dev_dbg(dev->dev, "I2C set brightness.(command, value) (%d, %d)\n",
130 dev_priv->lvds_bl->brightnesscmd,
131 blc_i2c_brightness);
132 return 0;
133 }
134
135 dev_err(dev->dev, "I2C transfer error\n");
136 return -1;
137}
138
139
140static int psb_lvds_pwm_set_brightness(struct drm_device *dev, int level)
141{
142 struct drm_psb_private *dev_priv =
143 (struct drm_psb_private *)dev->dev_private;
144
145 u32 max_pwm_blc;
146 u32 blc_pwm_duty_cycle;
147
148 max_pwm_blc = psb_intel_lvds_get_max_backlight(dev);
149
150 /*BLC_PWM_CTL Should be initiated while backlight device init*/
1f0d0b51 151 BUG_ON(max_pwm_blc == 0);
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152
153 blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
154
155 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
156 blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
157
158 blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
159 REG_WRITE(BLC_PWM_CTL,
160 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
161 (blc_pwm_duty_cycle));
162
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163 dev_info(dev->dev, "Backlight lvds set brightness %08x\n",
164 (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
165 (blc_pwm_duty_cycle));
166
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167 return 0;
168}
169
170/*
171 * Set LVDS backlight level either by I2C or PWM
172 */
173void psb_intel_lvds_set_brightness(struct drm_device *dev, int level)
174{
1f0d0b51 175 struct drm_psb_private *dev_priv = dev->dev_private;
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176
177 dev_dbg(dev->dev, "backlight level is %d\n", level);
178
179 if (!dev_priv->lvds_bl) {
1f0d0b51 180 dev_err(dev->dev, "NO LVDS backlight info\n");
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181 return;
182 }
183
184 if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
185 psb_lvds_i2c_set_brightness(dev, level);
186 else
187 psb_lvds_pwm_set_brightness(dev, level);
188}
189
190/*
191 * Sets the backlight level.
192 *
193 * level: backlight level, from 0 to psb_intel_lvds_get_max_backlight().
194 */
195static void psb_intel_lvds_set_backlight(struct drm_device *dev, int level)
196{
197 struct drm_psb_private *dev_priv = dev->dev_private;
198 u32 blc_pwm_ctl;
199
200 if (gma_power_begin(dev, false)) {
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201 blc_pwm_ctl = REG_READ(BLC_PWM_CTL);
202 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
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203 REG_WRITE(BLC_PWM_CTL,
204 (blc_pwm_ctl |
205 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
648a8e34 206 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
1f0d0b51 207 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
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208 gma_power_end(dev);
209 } else {
648a8e34 210 blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
89c78134 211 ~BACKLIGHT_DUTY_CYCLE_MASK;
648a8e34 212 dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
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213 (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
214 }
215}
216
217/*
218 * Sets the power state for the panel.
219 */
9c8cee47 220static void psb_intel_lvds_set_power(struct drm_device *dev, bool on)
89c78134 221{
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222 struct drm_psb_private *dev_priv = dev->dev_private;
223 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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224 u32 pp_status;
225
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226 if (!gma_power_begin(dev, true)) {
227 dev_err(dev->dev, "set power, chip off!\n");
89c78134 228 return;
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229 }
230
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231 if (on) {
232 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
233 POWER_TARGET_ON);
234 do {
235 pp_status = REG_READ(PP_STATUS);
236 } while ((pp_status & PP_ON) == 0);
237
238 psb_intel_lvds_set_backlight(dev,
9c8cee47 239 mode_dev->backlight_duty_cycle);
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240 } else {
241 psb_intel_lvds_set_backlight(dev, 0);
242
243 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
244 ~POWER_TARGET_ON);
245 do {
246 pp_status = REG_READ(PP_STATUS);
247 } while (pp_status & PP_ON);
248 }
249
250 gma_power_end(dev);
251}
252
253static void psb_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
254{
255 struct drm_device *dev = encoder->dev;
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256
257 if (mode == DRM_MODE_DPMS_ON)
9c8cee47 258 psb_intel_lvds_set_power(dev, true);
89c78134 259 else
9c8cee47 260 psb_intel_lvds_set_power(dev, false);
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261
262 /* XXX: We never power down the LVDS pairs. */
263}
264
265static void psb_intel_lvds_save(struct drm_connector *connector)
266{
267 struct drm_device *dev = connector->dev;
268 struct drm_psb_private *dev_priv =
269 (struct drm_psb_private *)dev->dev_private;
367e4408 270 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
89c78134 271 struct psb_intel_lvds_priv *lvds_priv =
367e4408 272 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
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273
274 lvds_priv->savePP_ON = REG_READ(LVDSPP_ON);
275 lvds_priv->savePP_OFF = REG_READ(LVDSPP_OFF);
276 lvds_priv->saveLVDS = REG_READ(LVDS);
277 lvds_priv->savePP_CONTROL = REG_READ(PP_CONTROL);
278 lvds_priv->savePP_CYCLE = REG_READ(PP_CYCLE);
279 /*lvds_priv->savePP_DIVISOR = REG_READ(PP_DIVISOR);*/
280 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
281 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL);
282 lvds_priv->savePFIT_PGM_RATIOS = REG_READ(PFIT_PGM_RATIOS);
283
284 /*TODO: move backlight_duty_cycle to psb_intel_lvds_priv*/
648a8e34 285 dev_priv->backlight_duty_cycle = (dev_priv->regs.saveBLC_PWM_CTL &
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286 BACKLIGHT_DUTY_CYCLE_MASK);
287
288 /*
289 * If the light is off at server startup,
290 * just make it full brightness
291 */
292 if (dev_priv->backlight_duty_cycle == 0)
293 dev_priv->backlight_duty_cycle =
294 psb_intel_lvds_get_max_backlight(dev);
295
296 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
297 lvds_priv->savePP_ON,
298 lvds_priv->savePP_OFF,
299 lvds_priv->saveLVDS,
300 lvds_priv->savePP_CONTROL,
301 lvds_priv->savePP_CYCLE,
302 lvds_priv->saveBLC_PWM_CTL);
303}
304
305static void psb_intel_lvds_restore(struct drm_connector *connector)
306{
307 struct drm_device *dev = connector->dev;
308 u32 pp_status;
367e4408 309 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
89c78134 310 struct psb_intel_lvds_priv *lvds_priv =
367e4408 311 (struct psb_intel_lvds_priv *)gma_encoder->dev_priv;
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312
313 dev_dbg(dev->dev, "(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x)\n",
314 lvds_priv->savePP_ON,
315 lvds_priv->savePP_OFF,
316 lvds_priv->saveLVDS,
317 lvds_priv->savePP_CONTROL,
318 lvds_priv->savePP_CYCLE,
319 lvds_priv->saveBLC_PWM_CTL);
320
321 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL);
322 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL);
323 REG_WRITE(PFIT_PGM_RATIOS, lvds_priv->savePFIT_PGM_RATIOS);
324 REG_WRITE(LVDSPP_ON, lvds_priv->savePP_ON);
325 REG_WRITE(LVDSPP_OFF, lvds_priv->savePP_OFF);
326 /*REG_WRITE(PP_DIVISOR, lvds_priv->savePP_DIVISOR);*/
327 REG_WRITE(PP_CYCLE, lvds_priv->savePP_CYCLE);
328 REG_WRITE(PP_CONTROL, lvds_priv->savePP_CONTROL);
329 REG_WRITE(LVDS, lvds_priv->saveLVDS);
330
331 if (lvds_priv->savePP_CONTROL & POWER_TARGET_ON) {
332 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
333 POWER_TARGET_ON);
334 do {
335 pp_status = REG_READ(PP_STATUS);
336 } while ((pp_status & PP_ON) == 0);
337 } else {
338 REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
339 ~POWER_TARGET_ON);
340 do {
341 pp_status = REG_READ(PP_STATUS);
342 } while (pp_status & PP_ON);
343 }
344}
345
346int psb_intel_lvds_mode_valid(struct drm_connector *connector,
347 struct drm_display_mode *mode)
348{
9c8cee47 349 struct drm_psb_private *dev_priv = connector->dev->dev_private;
367e4408 350 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
89c78134 351 struct drm_display_mode *fixed_mode =
9c8cee47 352 dev_priv->mode_dev.panel_fixed_mode;
89c78134 353
367e4408 354 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
9c8cee47 355 fixed_mode = dev_priv->mode_dev.panel_fixed_mode2;
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356
357 /* just in case */
358 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
359 return MODE_NO_DBLESCAN;
360
361 /* just in case */
362 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
363 return MODE_NO_INTERLACE;
364
365 if (fixed_mode) {
366 if (mode->hdisplay > fixed_mode->hdisplay)
367 return MODE_PANEL;
368 if (mode->vdisplay > fixed_mode->vdisplay)
369 return MODE_PANEL;
370 }
371 return MODE_OK;
372}
373
374bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder,
e811f5ae 375 const struct drm_display_mode *mode,
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376 struct drm_display_mode *adjusted_mode)
377{
89c78134 378 struct drm_device *dev = encoder->dev;
9c8cee47
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379 struct drm_psb_private *dev_priv = dev->dev_private;
380 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
6306865d 381 struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
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382 struct drm_encoder *tmp_encoder;
383 struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
367e4408 384 struct gma_encoder *gma_encoder = to_gma_encoder(encoder);
89c78134 385
367e4408 386 if (gma_encoder->type == INTEL_OUTPUT_MIPI2)
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387 panel_fixed_mode = mode_dev->panel_fixed_mode2;
388
89c78134 389 /* PSB requires the LVDS is on pipe B, MRST has only one pipe anyway */
6306865d 390 if (!IS_MRST(dev) && gma_crtc->pipe == 0) {
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391 printk(KERN_ERR "Can't support LVDS on pipe A\n");
392 return false;
393 }
6306865d 394 if (IS_MRST(dev) && gma_crtc->pipe != 0) {
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395 printk(KERN_ERR "Must use PIPE A\n");
396 return false;
397 }
398 /* Should never happen!! */
399 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
400 head) {
401 if (tmp_encoder != encoder
402 && tmp_encoder->crtc == encoder->crtc) {
403 printk(KERN_ERR "Can't enable LVDS and another "
404 "encoder on the same pipe\n");
405 return false;
406 }
407 }
408
409 /*
410 * If we have timings from the BIOS for the panel, put them in
411 * to the adjusted mode. The CRTC will be set up for this mode,
412 * with the panel scaling set up to source from the H/VDisplay
413 * of the original mode.
414 */
415 if (panel_fixed_mode != NULL) {
416 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
417 adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
418 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
419 adjusted_mode->htotal = panel_fixed_mode->htotal;
420 adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
421 adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
422 adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
423 adjusted_mode->vtotal = panel_fixed_mode->vtotal;
424 adjusted_mode->clock = panel_fixed_mode->clock;
425 drm_mode_set_crtcinfo(adjusted_mode,
426 CRTC_INTERLACE_HALVE_V);
427 }
428
429 /*
430 * XXX: It would be nice to support lower refresh rates on the
431 * panels to reduce power consumption, and perhaps match the
432 * user's requested refresh rate.
433 */
434
435 return true;
436}
437
438static void psb_intel_lvds_prepare(struct drm_encoder *encoder)
439{
440 struct drm_device *dev = encoder->dev;
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441 struct drm_psb_private *dev_priv = dev->dev_private;
442 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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443
444 if (!gma_power_begin(dev, true))
445 return;
446
447 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
448 mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
449 BACKLIGHT_DUTY_CYCLE_MASK);
450
9c8cee47 451 psb_intel_lvds_set_power(dev, false);
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452
453 gma_power_end(dev);
454}
455
456static void psb_intel_lvds_commit(struct drm_encoder *encoder)
457{
458 struct drm_device *dev = encoder->dev;
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459 struct drm_psb_private *dev_priv = dev->dev_private;
460 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
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461
462 if (mode_dev->backlight_duty_cycle == 0)
463 mode_dev->backlight_duty_cycle =
464 psb_intel_lvds_get_max_backlight(dev);
465
9c8cee47 466 psb_intel_lvds_set_power(dev, true);
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467}
468
469static void psb_intel_lvds_mode_set(struct drm_encoder *encoder,
470 struct drm_display_mode *mode,
471 struct drm_display_mode *adjusted_mode)
472{
473 struct drm_device *dev = encoder->dev;
474 struct drm_psb_private *dev_priv = dev->dev_private;
475 u32 pfit_control;
476
477 /*
478 * The LVDS pin pair will already have been turned on in the
479 * psb_intel_crtc_mode_set since it has a large impact on the DPLL
480 * settings.
481 */
482
483 /*
484 * Enable automatic panel scaling so that non-native modes fill the
485 * screen. Should be enabled before the pipe is enabled, according to
486 * register description and PRM.
487 */
488 if (mode->hdisplay != adjusted_mode->hdisplay ||
489 mode->vdisplay != adjusted_mode->vdisplay)
490 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
491 HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
492 HORIZ_INTERP_BILINEAR);
493 else
494 pfit_control = 0;
495
496 if (dev_priv->lvds_dither)
497 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
498
499 REG_WRITE(PFIT_CONTROL, pfit_control);
500}
501
502/*
503 * Detect the LVDS connection.
504 *
505 * This always returns CONNECTOR_STATUS_CONNECTED.
506 * This connector should only have
507 * been set up if the LVDS was actually connected anyway.
508 */
509static enum drm_connector_status psb_intel_lvds_detect(struct drm_connector
510 *connector, bool force)
511{
512 return connector_status_connected;
513}
514
515/*
516 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
517 */
518static int psb_intel_lvds_get_modes(struct drm_connector *connector)
519{
520 struct drm_device *dev = connector->dev;
9c8cee47
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521 struct drm_psb_private *dev_priv = dev->dev_private;
522 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
367e4408
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523 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
524 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
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525 int ret = 0;
526
527 if (!IS_MRST(dev))
9c8cee47 528 ret = psb_intel_ddc_get_modes(connector, &lvds_priv->i2c_bus->adapter);
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529
530 if (ret)
531 return ret;
532
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533 if (mode_dev->panel_fixed_mode != NULL) {
534 struct drm_display_mode *mode =
535 drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
536 drm_mode_probed_add(connector, mode);
537 return 1;
538 }
539
540 return 0;
541}
542
543/**
544 * psb_intel_lvds_destroy - unregister and free LVDS structures
545 * @connector: connector to free
546 *
547 * Unregister the DDC bus for this connector then free the driver private
548 * structure.
549 */
550void psb_intel_lvds_destroy(struct drm_connector *connector)
551{
367e4408
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552 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
553 struct psb_intel_lvds_priv *lvds_priv = gma_encoder->dev_priv;
89c78134 554
44fb4b8a 555 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
34ea3d38 556 drm_connector_unregister(connector);
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557 drm_connector_cleanup(connector);
558 kfree(connector);
559}
560
561int psb_intel_lvds_set_property(struct drm_connector *connector,
562 struct drm_property *property,
563 uint64_t value)
564{
565 struct drm_encoder *encoder = connector->encoder;
566
567 if (!encoder)
568 return -1;
569
570 if (!strcmp(property->name, "scaling mode")) {
6306865d 571 struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
89c78134
AC
572 uint64_t curval;
573
574 if (!crtc)
575 goto set_prop_error;
576
577 switch (value) {
578 case DRM_MODE_SCALE_FULLSCREEN:
579 break;
580 case DRM_MODE_SCALE_NO_SCALE:
581 break;
582 case DRM_MODE_SCALE_ASPECT:
583 break;
584 default:
585 goto set_prop_error;
586 }
587
a69ac9ea 588 if (drm_object_property_get_value(&connector->base,
89c78134
AC
589 property,
590 &curval))
591 goto set_prop_error;
592
593 if (curval == value)
594 goto set_prop_done;
595
a69ac9ea 596 if (drm_object_property_set_value(&connector->base,
89c78134
AC
597 property,
598 value))
599 goto set_prop_error;
600
601 if (crtc->saved_mode.hdisplay != 0 &&
602 crtc->saved_mode.vdisplay != 0) {
603 if (!drm_crtc_helper_set_mode(encoder->crtc,
604 &crtc->saved_mode,
605 encoder->crtc->x,
606 encoder->crtc->y,
f4510a27 607 encoder->crtc->primary->fb))
89c78134
AC
608 goto set_prop_error;
609 }
610 } else if (!strcmp(property->name, "backlight")) {
a69ac9ea 611 if (drm_object_property_set_value(&connector->base,
89c78134
AC
612 property,
613 value))
614 goto set_prop_error;
d112a816
ZY
615 else
616 gma_backlight_set(encoder->dev, value);
89c78134 617 } else if (!strcmp(property->name, "DPMS")) {
45fe734c 618 const struct drm_encoder_helper_funcs *hfuncs
89c78134
AC
619 = encoder->helper_private;
620 hfuncs->dpms(encoder, value);
621 }
622
623set_prop_done:
624 return 0;
625set_prop_error:
626 return -1;
627}
628
629static const struct drm_encoder_helper_funcs psb_intel_lvds_helper_funcs = {
630 .dpms = psb_intel_lvds_encoder_dpms,
631 .mode_fixup = psb_intel_lvds_mode_fixup,
632 .prepare = psb_intel_lvds_prepare,
633 .mode_set = psb_intel_lvds_mode_set,
634 .commit = psb_intel_lvds_commit,
635};
636
637const struct drm_connector_helper_funcs
638 psb_intel_lvds_connector_helper_funcs = {
639 .get_modes = psb_intel_lvds_get_modes,
640 .mode_valid = psb_intel_lvds_mode_valid,
c9d49590 641 .best_encoder = gma_best_encoder,
89c78134
AC
642};
643
644const struct drm_connector_funcs psb_intel_lvds_connector_funcs = {
645 .dpms = drm_helper_connector_dpms,
89c78134
AC
646 .detect = psb_intel_lvds_detect,
647 .fill_modes = drm_helper_probe_single_connector_modes,
648 .set_property = psb_intel_lvds_set_property,
649 .destroy = psb_intel_lvds_destroy,
650};
651
652
653static void psb_intel_lvds_enc_destroy(struct drm_encoder *encoder)
654{
655 drm_encoder_cleanup(encoder);
656}
657
658const struct drm_encoder_funcs psb_intel_lvds_enc_funcs = {
659 .destroy = psb_intel_lvds_enc_destroy,
660};
661
662
663
664/**
665 * psb_intel_lvds_init - setup LVDS connectors on this device
666 * @dev: drm device
667 *
668 * Create the connector, register the LVDS DDC bus, and try to figure out what
669 * modes we can display on the LVDS panel (if present).
670 */
671void psb_intel_lvds_init(struct drm_device *dev,
9c8cee47 672 struct psb_intel_mode_device *mode_dev)
89c78134 673{
367e4408 674 struct gma_encoder *gma_encoder;
a3d5d75f 675 struct gma_connector *gma_connector;
89c78134
AC
676 struct psb_intel_lvds_priv *lvds_priv;
677 struct drm_connector *connector;
678 struct drm_encoder *encoder;
679 struct drm_display_mode *scan; /* *modes, *bios_mode; */
680 struct drm_crtc *crtc;
1f0d0b51 681 struct drm_psb_private *dev_priv = dev->dev_private;
89c78134
AC
682 u32 lvds;
683 int pipe;
684
367e4408
PJ
685 gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL);
686 if (!gma_encoder) {
687 dev_err(dev->dev, "gma_encoder allocation error\n");
89c78134 688 return;
9c8cee47
PJ
689 }
690
a3d5d75f
PJ
691 gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL);
692 if (!gma_connector) {
693 dev_err(dev->dev, "gma_connector allocation error\n");
aa7c62af 694 goto failed_encoder;
9c8cee47 695 }
89c78134
AC
696
697 lvds_priv = kzalloc(sizeof(struct psb_intel_lvds_priv), GFP_KERNEL);
698 if (!lvds_priv) {
89c78134 699 dev_err(dev->dev, "LVDS private allocation error\n");
9c8cee47 700 goto failed_connector;
89c78134
AC
701 }
702
367e4408 703 gma_encoder->dev_priv = lvds_priv;
1f0d0b51 704
a3d5d75f 705 connector = &gma_connector->base;
d56f57ac
DV
706 gma_connector->save = psb_intel_lvds_save;
707 gma_connector->restore = psb_intel_lvds_restore;
708
367e4408 709 encoder = &gma_encoder->base;
9c8cee47 710 drm_connector_init(dev, connector,
89c78134
AC
711 &psb_intel_lvds_connector_funcs,
712 DRM_MODE_CONNECTOR_LVDS);
713
9c8cee47 714 drm_encoder_init(dev, encoder,
89c78134 715 &psb_intel_lvds_enc_funcs,
13a3d91f 716 DRM_MODE_ENCODER_LVDS, NULL);
89c78134 717
367e4408
PJ
718 gma_connector_attach_encoder(gma_connector, gma_encoder);
719 gma_encoder->type = INTEL_OUTPUT_LVDS;
89c78134
AC
720
721 drm_encoder_helper_add(encoder, &psb_intel_lvds_helper_funcs);
722 drm_connector_helper_add(connector,
723 &psb_intel_lvds_connector_helper_funcs);
724 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
725 connector->interlace_allowed = false;
726 connector->doublescan_allowed = false;
727
728 /*Attach connector properties*/
a69ac9ea 729 drm_object_attach_property(&connector->base,
89c78134
AC
730 dev->mode_config.scaling_mode_property,
731 DRM_MODE_SCALE_FULLSCREEN);
a69ac9ea 732 drm_object_attach_property(&connector->base,
89c78134
AC
733 dev_priv->backlight_property,
734 BRIGHTNESS_MAX_LEVEL);
735
736 /*
737 * Set up I2C bus
738 * FIXME: distroy i2c_bus when exit
739 */
9c8cee47
PJ
740 lvds_priv->i2c_bus = psb_intel_i2c_create(dev, GPIOB, "LVDSBLC_B");
741 if (!lvds_priv->i2c_bus) {
89c78134
AC
742 dev_printk(KERN_ERR,
743 &dev->pdev->dev, "I2C bus registration failed.\n");
744 goto failed_blc_i2c;
745 }
9c8cee47
PJ
746 lvds_priv->i2c_bus->slave_addr = 0x2C;
747 dev_priv->lvds_i2c_bus = lvds_priv->i2c_bus;
89c78134
AC
748
749 /*
750 * LVDS discovery:
751 * 1) check for EDID on DDC
752 * 2) check for VBT data
753 * 3) check to see if LVDS is already on
754 * if none of the above, no panel
755 * 4) make sure lid is open
756 * if closed, act like it's not there for now
757 */
758
759 /* Set up the DDC bus. */
9c8cee47
PJ
760 lvds_priv->ddc_bus = psb_intel_i2c_create(dev, GPIOC, "LVDSDDC_C");
761 if (!lvds_priv->ddc_bus) {
89c78134
AC
762 dev_printk(KERN_ERR, &dev->pdev->dev,
763 "DDC bus registration " "failed.\n");
764 goto failed_ddc;
765 }
766
767 /*
768 * Attempt to get the fixed panel mode from DDC. Assume that the
769 * preferred mode is the right one.
770 */
c46145ae 771 mutex_lock(&dev->mode_config.mutex);
9c8cee47 772 psb_intel_ddc_get_modes(connector, &lvds_priv->ddc_bus->adapter);
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AC
773 list_for_each_entry(scan, &connector->probed_modes, head) {
774 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
775 mode_dev->panel_fixed_mode =
776 drm_mode_duplicate(dev, scan);
777 goto out; /* FIXME: check for quirks */
778 }
779 }
780
781 /* Failed to get EDID, what about VBT? do we need this? */
782 if (mode_dev->vbt_mode)
783 mode_dev->panel_fixed_mode =
784 drm_mode_duplicate(dev, mode_dev->vbt_mode);
785
786 if (!mode_dev->panel_fixed_mode)
787 if (dev_priv->lfp_lvds_vbt_mode)
788 mode_dev->panel_fixed_mode =
789 drm_mode_duplicate(dev,
790 dev_priv->lfp_lvds_vbt_mode);
791
792 /*
793 * If we didn't get EDID, try checking if the panel is already turned
794 * on. If so, assume that whatever is currently programmed is the
795 * correct mode.
796 */
797 lvds = REG_READ(LVDS);
798 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
799 crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
800
801 if (crtc && (lvds & LVDS_PORT_EN)) {
802 mode_dev->panel_fixed_mode =
803 psb_intel_crtc_mode_get(dev, crtc);
804 if (mode_dev->panel_fixed_mode) {
805 mode_dev->panel_fixed_mode->type |=
806 DRM_MODE_TYPE_PREFERRED;
807 goto out; /* FIXME: check for quirks */
808 }
809 }
810
811 /* If we still don't have a mode after all that, give up. */
812 if (!mode_dev->panel_fixed_mode) {
813 dev_err(dev->dev, "Found no modes on the lvds, ignoring the LVDS\n");
814 goto failed_find;
815 }
816
817 /*
818 * Blacklist machines with BIOSes that list an LVDS panel without
819 * actually having one.
820 */
821out:
c46145ae 822 mutex_unlock(&dev->mode_config.mutex);
34ea3d38 823 drm_connector_register(connector);
89c78134
AC
824 return;
825
826failed_find:
c46145ae 827 mutex_unlock(&dev->mode_config.mutex);
44fb4b8a 828 psb_intel_i2c_destroy(lvds_priv->ddc_bus);
89c78134 829failed_ddc:
44fb4b8a 830 psb_intel_i2c_destroy(lvds_priv->i2c_bus);
89c78134
AC
831failed_blc_i2c:
832 drm_encoder_cleanup(encoder);
833 drm_connector_cleanup(connector);
9c8cee47 834failed_connector:
a3d5d75f 835 kfree(gma_connector);
aa7c62af 836failed_encoder:
367e4408 837 kfree(gma_encoder);
89c78134
AC
838}
839
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