[deliverable/linux.git] / drivers / gpu / drm / i915 / i915_gem_debug.c

/*
 * Copyright © 2008 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 *
 * Authors:
 *    Keith Packard <keithp@keithp.com>
 *
 */

#include <drm/drmP.h>
#include <drm/i915_drm.h>
#include "i915_drv.h"

#if WATCH_LISTS
int
i915_verify_lists(struct drm_device *dev)
{
	static int warned;
	struct drm_i915_private *dev_priv = to_i915(dev);
	struct drm_i915_gem_object *obj;
	struct intel_engine_cs *engine;
	int err = 0;

	if (warned)
		return 0;

	for_each_engine(engine, dev_priv) {
		list_for_each_entry(obj, &engine->active_list,
				    engine_list[engine->id]) {
			if (obj->base.dev != dev ||
			    !atomic_read(&obj->base.refcount.refcount)) {
				DRM_ERROR("%s: freed active obj %p\n",
					  engine->name, obj);
				err++;
				break;
			} else if (!obj->active ||
				   obj->last_read_req[engine->id] == NULL) {
				DRM_ERROR("%s: invalid active obj %p\n",
					  engine->name, obj);
				err++;
			} else if (obj->base.write_domain) {
				DRM_ERROR("%s: invalid write obj %p (w %x)\n",
					  engine->name,
					  obj, obj->base.write_domain);
				err++;
			}
		}
	}

	return warned = err;
}
#endif /* WATCH_LIST */
Commit	Line	Data
673a394b EA	1	/*
	2	* Copyright © 2008 Intel Corporation
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice (including the next
	12	* paragraph) shall be included in all copies or substantial portions of the
	13	* Software.
	14	*
	15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	16	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	17	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	18	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	19	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	20	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	21	* IN THE SOFTWARE.
	22	*
	23	* Authors:
	24	* Keith Packard <keithp@keithp.com>
	25	*
	26	*/
	27
760285e7 DH	28	#include <drm/drmP.h>
760285e7 DH	29	#include <drm/i915_drm.h>
673a394b EA	30	#include "i915_drv.h"
673a394b EA	31
23bc5982 CW	32	#if WATCH_LISTS
	33	int
	34	i915_verify_lists(struct drm_device *dev)
673a394b	35	{
23bc5982	36	static int warned;
b4716185	37	struct drm_i915_private *dev_priv = to_i915(dev);
23bc5982	38	struct drm_i915_gem_object *obj;
e2f80391	39	struct intel_engine_cs *engine;
23bc5982 CW	40	int err = 0;
	41
	42	if (warned)
	43	return 0;
	44
b4ac5afc	45	for_each_engine(engine, dev_priv) {
e2f80391	46	list_for_each_entry(obj, &engine->active_list,
117897f4	47	engine_list[engine->id]) {
b4716185 CW	48	if (obj->base.dev != dev \|\|
	49	!atomic_read(&obj->base.refcount.refcount)) {
	50	DRM_ERROR("%s: freed active obj %p\n",
e2f80391	51	engine->name, obj);
b4716185 CW	52	err++;
	53	break;
	54	} else if (!obj->active \|\|
e2f80391	55	obj->last_read_req[engine->id] == NULL) {
b4716185	56	DRM_ERROR("%s: invalid active obj %p\n",
e2f80391	57	engine->name, obj);
b4716185 CW	58	err++;
	59	} else if (obj->base.write_domain) {
	60	DRM_ERROR("%s: invalid write obj %p (w %x)\n",
e2f80391	61	engine->name,
b4716185 CW	62	obj, obj->base.write_domain);
	63	err++;
	64	}
23bc5982	65	}
673a394b	66	}
23bc5982	67
23bc5982	68	return warned = err;
673a394b	69	}
c55651b3	70	#endif /* WATCH_LIST */