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ea2c67bb MR |
1 | /* |
2 | * Copyright © 2014 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice (including the next | |
12 | * paragraph) shall be included in all copies or substantial portions of the | |
13 | * Software. | |
14 | * | |
15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
21 | * DEALINGS IN THE SOFTWARE. | |
22 | */ | |
23 | ||
24 | /** | |
cd524719 | 25 | * DOC: atomic plane helpers |
ea2c67bb MR |
26 | * |
27 | * The functions here are used by the atomic plane helper functions to | |
28 | * implement legacy plane updates (i.e., drm_plane->update_plane() and | |
29 | * drm_plane->disable_plane()). This allows plane updates to use the | |
30 | * atomic state infrastructure and perform plane updates as separate | |
31 | * prepare/check/commit/cleanup steps. | |
32 | */ | |
33 | ||
34 | #include <drm/drmP.h> | |
35 | #include <drm/drm_atomic_helper.h> | |
36 | #include <drm/drm_plane_helper.h> | |
37 | #include "intel_drv.h" | |
38 | ||
8e7d688b MR |
39 | /** |
40 | * intel_create_plane_state - create plane state object | |
41 | * @plane: drm plane | |
42 | * | |
43 | * Allocates a fresh plane state for the given plane and sets some of | |
44 | * the state values to sensible initial values. | |
45 | * | |
46 | * Returns: A newly allocated plane state, or NULL on failure | |
47 | */ | |
48 | struct intel_plane_state * | |
49 | intel_create_plane_state(struct drm_plane *plane) | |
50 | { | |
51 | struct intel_plane_state *state; | |
52 | ||
53 | state = kzalloc(sizeof(*state), GFP_KERNEL); | |
54 | if (!state) | |
55 | return NULL; | |
56 | ||
57 | state->base.plane = plane; | |
31ad61e4 | 58 | state->base.rotation = DRM_ROTATE_0; |
818ed961 | 59 | state->ckey.flags = I915_SET_COLORKEY_NONE; |
8e7d688b MR |
60 | |
61 | return state; | |
62 | } | |
63 | ||
ea2c67bb MR |
64 | /** |
65 | * intel_plane_duplicate_state - duplicate plane state | |
66 | * @plane: drm plane | |
67 | * | |
68 | * Allocates and returns a copy of the plane state (both common and | |
69 | * Intel-specific) for the specified plane. | |
70 | * | |
8e7d688b | 71 | * Returns: The newly allocated plane state, or NULL on failure. |
ea2c67bb MR |
72 | */ |
73 | struct drm_plane_state * | |
74 | intel_plane_duplicate_state(struct drm_plane *plane) | |
75 | { | |
8e7d688b MR |
76 | struct drm_plane_state *state; |
77 | struct intel_plane_state *intel_state; | |
ea2c67bb | 78 | |
bca8013e | 79 | intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL); |
ea2c67bb | 80 | |
8e7d688b | 81 | if (!intel_state) |
ea2c67bb MR |
82 | return NULL; |
83 | ||
8e7d688b | 84 | state = &intel_state->base; |
f0c60574 ACO |
85 | |
86 | __drm_atomic_helper_plane_duplicate_state(plane, state); | |
7580d774 | 87 | intel_state->wait_req = NULL; |
ea2c67bb | 88 | |
8e7d688b | 89 | return state; |
ea2c67bb MR |
90 | } |
91 | ||
92 | /** | |
93 | * intel_plane_destroy_state - destroy plane state | |
94 | * @plane: drm plane | |
cd524719 | 95 | * @state: state object to destroy |
ea2c67bb MR |
96 | * |
97 | * Destroys the plane state (both common and Intel-specific) for the | |
98 | * specified plane. | |
99 | */ | |
100 | void | |
101 | intel_plane_destroy_state(struct drm_plane *plane, | |
102 | struct drm_plane_state *state) | |
103 | { | |
7580d774 | 104 | WARN_ON(state && to_intel_plane_state(state)->wait_req); |
ea2c67bb MR |
105 | drm_atomic_helper_plane_destroy_state(plane, state); |
106 | } | |
107 | ||
108 | static int intel_plane_atomic_check(struct drm_plane *plane, | |
109 | struct drm_plane_state *state) | |
110 | { | |
111 | struct drm_crtc *crtc = state->crtc; | |
112 | struct intel_crtc *intel_crtc; | |
8c7b5ccb | 113 | struct intel_crtc_state *crtc_state; |
ea2c67bb MR |
114 | struct intel_plane *intel_plane = to_intel_plane(plane); |
115 | struct intel_plane_state *intel_state = to_intel_plane_state(state); | |
c389c9c4 | 116 | struct drm_crtc_state *drm_crtc_state; |
da20eabd | 117 | int ret; |
ea2c67bb | 118 | |
061e4b8d | 119 | crtc = crtc ? crtc : plane->state->crtc; |
ea2c67bb MR |
120 | intel_crtc = to_intel_crtc(crtc); |
121 | ||
c196e1d6 MR |
122 | /* |
123 | * Both crtc and plane->crtc could be NULL if we're updating a | |
124 | * property while the plane is disabled. We don't actually have | |
125 | * anything driver-specific we need to test in that case, so | |
126 | * just return success. | |
127 | */ | |
128 | if (!crtc) | |
129 | return 0; | |
130 | ||
c389c9c4 ML |
131 | drm_crtc_state = drm_atomic_get_existing_crtc_state(state->state, crtc); |
132 | if (WARN_ON(!drm_crtc_state)) | |
133 | return -EINVAL; | |
061e4b8d | 134 | |
c389c9c4 | 135 | crtc_state = to_intel_crtc_state(drm_crtc_state); |
8c7b5ccb | 136 | |
ea2c67bb MR |
137 | /* Clip all planes to CRTC size, or 0x0 if CRTC is disabled */ |
138 | intel_state->clip.x1 = 0; | |
139 | intel_state->clip.y1 = 0; | |
140 | intel_state->clip.x2 = | |
35c08f43 | 141 | crtc_state->base.enable ? crtc_state->pipe_src_w : 0; |
ea2c67bb | 142 | intel_state->clip.y2 = |
35c08f43 | 143 | crtc_state->base.enable ? crtc_state->pipe_src_h : 0; |
ea2c67bb | 144 | |
3b7a5119 | 145 | if (state->fb && intel_rotation_90_or_270(state->rotation)) { |
d3828147 | 146 | char *format_name; |
3b7a5119 SJ |
147 | if (!(state->fb->modifier[0] == I915_FORMAT_MOD_Y_TILED || |
148 | state->fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED)) { | |
149 | DRM_DEBUG_KMS("Y/Yf tiling required for 90/270!\n"); | |
150 | return -EINVAL; | |
151 | } | |
152 | ||
153 | /* | |
154 | * 90/270 is not allowed with RGB64 16:16:16:16, | |
155 | * RGB 16-bit 5:6:5, and Indexed 8-bit. | |
156 | * TBD: Add RGB64 case once its added in supported format list. | |
157 | */ | |
158 | switch (state->fb->pixel_format) { | |
159 | case DRM_FORMAT_C8: | |
160 | case DRM_FORMAT_RGB565: | |
90844f00 EE |
161 | format_name = drm_get_format_name(state->fb->pixel_format); |
162 | DRM_DEBUG_KMS("Unsupported pixel format %s for 90/270!\n", format_name); | |
163 | kfree(format_name); | |
3b7a5119 SJ |
164 | return -EINVAL; |
165 | ||
166 | default: | |
167 | break; | |
168 | } | |
169 | } | |
170 | ||
936e71e3 | 171 | intel_state->base.visible = false; |
061e4b8d | 172 | ret = intel_plane->check_plane(plane, crtc_state, intel_state); |
c389c9c4 | 173 | if (ret) |
da20eabd ML |
174 | return ret; |
175 | ||
176 | return intel_plane_atomic_calc_changes(&crtc_state->base, state); | |
ea2c67bb MR |
177 | } |
178 | ||
179 | static void intel_plane_atomic_update(struct drm_plane *plane, | |
180 | struct drm_plane_state *old_state) | |
181 | { | |
182 | struct intel_plane *intel_plane = to_intel_plane(plane); | |
183 | struct intel_plane_state *intel_state = | |
184 | to_intel_plane_state(plane->state); | |
a758e684 | 185 | struct drm_crtc *crtc = plane->state->crtc ?: old_state->crtc; |
a758e684 | 186 | |
936e71e3 | 187 | if (intel_state->base.visible) |
a758e684 | 188 | intel_plane->update_plane(plane, |
9f6151c9 | 189 | to_intel_crtc_state(crtc->state), |
a758e684 ML |
190 | intel_state); |
191 | else | |
192 | intel_plane->disable_plane(plane, crtc); | |
ea2c67bb MR |
193 | } |
194 | ||
195 | const struct drm_plane_helper_funcs intel_plane_helper_funcs = { | |
196 | .prepare_fb = intel_prepare_plane_fb, | |
197 | .cleanup_fb = intel_cleanup_plane_fb, | |
198 | .atomic_check = intel_plane_atomic_check, | |
199 | .atomic_update = intel_plane_atomic_update, | |
200 | }; | |
201 | ||
a98b3431 MR |
202 | /** |
203 | * intel_plane_atomic_get_property - fetch plane property value | |
204 | * @plane: plane to fetch property for | |
205 | * @state: state containing the property value | |
206 | * @property: property to look up | |
207 | * @val: pointer to write property value into | |
208 | * | |
209 | * The DRM core does not store shadow copies of properties for | |
210 | * atomic-capable drivers. This entrypoint is used to fetch | |
211 | * the current value of a driver-specific plane property. | |
212 | */ | |
213 | int | |
214 | intel_plane_atomic_get_property(struct drm_plane *plane, | |
215 | const struct drm_plane_state *state, | |
216 | struct drm_property *property, | |
217 | uint64_t *val) | |
218 | { | |
aaed1aa5 TU |
219 | DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); |
220 | return -EINVAL; | |
a98b3431 MR |
221 | } |
222 | ||
223 | /** | |
224 | * intel_plane_atomic_set_property - set plane property value | |
225 | * @plane: plane to set property for | |
226 | * @state: state to update property value in | |
227 | * @property: property to set | |
228 | * @val: value to set property to | |
229 | * | |
230 | * Writes the specified property value for a plane into the provided atomic | |
231 | * state object. | |
232 | * | |
233 | * Returns 0 on success, -EINVAL on unrecognized properties | |
234 | */ | |
235 | int | |
236 | intel_plane_atomic_set_property(struct drm_plane *plane, | |
237 | struct drm_plane_state *state, | |
238 | struct drm_property *property, | |
239 | uint64_t val) | |
240 | { | |
aaed1aa5 TU |
241 | DRM_DEBUG_KMS("Unknown plane property '%s'\n", property->name); |
242 | return -EINVAL; | |
a98b3431 | 243 | } |