Merge remote-tracking branch 'lightnvm/for-next'
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
5addcf0a
DA
32#include "drmP.h"
33#include "drm_crtc_helper.h"
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
923bc416 40#include <nvif/class.h>
845f2725 41#include <nvif/cl0002.h>
8ed1730c 42#include <nvif/cla06f.h>
538b269b
BS
43#include <nvif/if0004.h>
44
4dc28134 45#include "nouveau_drv.h"
ebb945a9 46#include "nouveau_dma.h"
77145f1c
BS
47#include "nouveau_ttm.h"
48#include "nouveau_gem.h"
77145f1c 49#include "nouveau_vga.h"
b9ed919f 50#include "nouveau_hwmon.h"
77145f1c
BS
51#include "nouveau_acpi.h"
52#include "nouveau_bios.h"
53#include "nouveau_ioctl.h"
ebb945a9
BS
54#include "nouveau_abi16.h"
55#include "nouveau_fbcon.h"
56#include "nouveau_fence.h"
33b903e8 57#include "nouveau_debugfs.h"
27111a23 58#include "nouveau_usif.h"
703fa264 59#include "nouveau_connector.h"
055a65d5 60#include "nouveau_platform.h"
ebb945a9 61
94580299
BS
62MODULE_PARM_DESC(config, "option string to pass to driver core");
63static char *nouveau_config;
64module_param_named(config, nouveau_config, charp, 0400);
65
66MODULE_PARM_DESC(debug, "debug string to pass to driver core");
67static char *nouveau_debug;
68module_param_named(debug, nouveau_debug, charp, 0400);
69
ebb945a9
BS
70MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
71static int nouveau_noaccel = 0;
72module_param_named(noaccel, nouveau_noaccel, int, 0400);
73
9430738d
BS
74MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
75 "0 = disabled, 1 = enabled, 2 = headless)");
76int nouveau_modeset = -1;
77145f1c
BS
77module_param_named(modeset, nouveau_modeset, int, 0400);
78
5addcf0a
DA
79MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
80int nouveau_runtime_pm = -1;
81module_param_named(runpm, nouveau_runtime_pm, int, 0400);
82
915b4d11
DH
83static struct drm_driver driver_stub;
84static struct drm_driver driver_pci;
85static struct drm_driver driver_platform;
77145f1c 86
94580299 87static u64
420b9469 88nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
89{
90 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
91 name |= pdev->bus->number << 16;
92 name |= PCI_SLOT(pdev->devfn) << 8;
93 return name | PCI_FUNC(pdev->devfn);
94}
95
420b9469
AC
96static u64
97nouveau_platform_name(struct platform_device *platformdev)
98{
99 return platformdev->id;
100}
101
102static u64
103nouveau_name(struct drm_device *dev)
104{
105 if (dev->pdev)
106 return nouveau_pci_name(dev->pdev);
107 else
108 return nouveau_platform_name(dev->platformdev);
109}
110
94580299 111static int
9ad97ede 112nouveau_cli_create(struct drm_device *dev, const char *sname,
fa6df8c1 113 int size, void **pcli)
94580299 114{
0ad72863 115 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
9ad97ede 116 int ret;
0ad72863 117 if (cli) {
9ad97ede
BS
118 snprintf(cli->name, sizeof(cli->name), "%s", sname);
119 cli->dev = dev;
120
a01ca78c 121 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
9ad97ede
BS
122 nouveau_config, nouveau_debug,
123 &cli->base);
27111a23 124 if (ret == 0) {
0ad72863 125 mutex_init(&cli->mutex);
27111a23
BS
126 usif_client_init(cli);
127 }
94580299 128 return ret;
dd5700ea 129 }
0ad72863 130 return -ENOMEM;
94580299
BS
131}
132
133static void
134nouveau_cli_destroy(struct nouveau_cli *cli)
135{
be83cd4e 136 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 137 nvif_client_fini(&cli->base);
27111a23 138 usif_client_fini(cli);
f5654d95 139 kfree(cli);
94580299
BS
140}
141
ebb945a9
BS
142static void
143nouveau_accel_fini(struct nouveau_drm *drm)
144{
fbd58ebd 145 nouveau_channel_idle(drm->channel);
0ad72863 146 nvif_object_fini(&drm->ntfy);
f027f491 147 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 148 nvif_notify_fini(&drm->flip);
0ad72863 149 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
150 nouveau_channel_del(&drm->channel);
151
152 nouveau_channel_idle(drm->cechan);
0ad72863 153 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
154 nouveau_channel_del(&drm->cechan);
155
ebb945a9
BS
156 if (drm->fence)
157 nouveau_fence(drm)->dtor(drm);
158}
159
160static void
161nouveau_accel_init(struct nouveau_drm *drm)
162{
967e7bde 163 struct nvif_device *device = &drm->device;
41a63406 164 struct nvif_sclass *sclass;
49981046 165 u32 arg0, arg1;
41a63406 166 int ret, i, n;
ebb945a9 167
967e7bde 168 if (nouveau_noaccel)
ebb945a9
BS
169 return;
170
171 /* initialise synchronisation routines */
967e7bde
BS
172 /*XXX: this is crap, but the fence/channel stuff is a little
173 * backwards in some places. this will be fixed.
174 */
41a63406 175 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
176 if (ret < 0)
177 return;
178
41a63406
BS
179 for (ret = -ENOSYS, i = 0; i < n; i++) {
180 switch (sclass[i].oclass) {
bbf8906b 181 case NV03_CHANNEL_DMA:
967e7bde
BS
182 ret = nv04_fence_create(drm);
183 break;
bbf8906b 184 case NV10_CHANNEL_DMA:
967e7bde
BS
185 ret = nv10_fence_create(drm);
186 break;
bbf8906b
BS
187 case NV17_CHANNEL_DMA:
188 case NV40_CHANNEL_DMA:
967e7bde
BS
189 ret = nv17_fence_create(drm);
190 break;
bbf8906b 191 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
192 ret = nv50_fence_create(drm);
193 break;
bbf8906b 194 case G82_CHANNEL_GPFIFO:
967e7bde
BS
195 ret = nv84_fence_create(drm);
196 break;
bbf8906b
BS
197 case FERMI_CHANNEL_GPFIFO:
198 case KEPLER_CHANNEL_GPFIFO_A:
63f8c9b7 199 case KEPLER_CHANNEL_GPFIFO_B:
a1020afe 200 case MAXWELL_CHANNEL_GPFIFO_A:
e8ff9794 201 case PASCAL_CHANNEL_GPFIFO_A:
967e7bde
BS
202 ret = nvc0_fence_create(drm);
203 break;
204 default:
205 break;
206 }
207 }
208
41a63406 209 nvif_object_sclass_put(&sclass);
ebb945a9
BS
210 if (ret) {
211 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
212 nouveau_accel_fini(drm);
213 return;
214 }
215
967e7bde 216 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
fcf3f91c 217 ret = nouveau_channel_new(drm, &drm->device,
1f5ff7f5
BS
218 NVA06F_V0_ENGINE_CE0 |
219 NVA06F_V0_ENGINE_CE1,
bbf8906b 220 0, &drm->cechan);
49981046
BS
221 if (ret)
222 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
223
1f5ff7f5 224 arg0 = NVA06F_V0_ENGINE_GR;
49469800 225 arg1 = 1;
00fc6f6f 226 } else
967e7bde
BS
227 if (device->info.chipset >= 0xa3 &&
228 device->info.chipset != 0xaa &&
229 device->info.chipset != 0xac) {
fcf3f91c 230 ret = nouveau_channel_new(drm, &drm->device,
0ad72863 231 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
232 if (ret)
233 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
234
235 arg0 = NvDmaFB;
236 arg1 = NvDmaTT;
49981046
BS
237 } else {
238 arg0 = NvDmaFB;
239 arg1 = NvDmaTT;
240 }
241
fcf3f91c 242 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
ebb945a9
BS
243 if (ret) {
244 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
245 nouveau_accel_fini(drm);
246 return;
247 }
248
a01ca78c 249 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 250 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 251 if (ret == 0) {
69a6146d
BS
252 ret = RING_SPACE(drm->channel, 2);
253 if (ret == 0) {
967e7bde 254 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
255 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
256 OUT_RING (drm->channel, NVDRM_NVSW);
257 } else
967e7bde 258 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
259 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
260 OUT_RING (drm->channel, 0x001f0000);
261 }
262 }
898a2b32
BS
263
264 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
265 false, NV04_NVSW_NTFY_UEVENT,
266 NULL, 0, 0, &drm->flip);
898a2b32
BS
267 if (ret == 0)
268 ret = nvif_notify_get(&drm->flip);
269 if (ret) {
270 nouveau_accel_fini(drm);
271 return;
272 }
69a6146d
BS
273 }
274
275 if (ret) {
276 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
277 nouveau_accel_fini(drm);
278 return;
279 }
280
967e7bde 281 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
f027f491
BS
282 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
283 NULL, &drm->notify);
ebb945a9
BS
284 if (ret) {
285 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
286 nouveau_accel_fini(drm);
287 return;
288 }
289
a01ca78c 290 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
291 NV_DMA_IN_MEMORY,
292 &(struct nv_dma_v0) {
293 .target = NV_DMA_V0_TARGET_VRAM,
294 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
295 .start = drm->notify->addr,
296 .limit = drm->notify->addr + 31
4acfd707 297 }, sizeof(struct nv_dma_v0),
0ad72863 298 &drm->ntfy);
ebb945a9
BS
299 if (ret) {
300 nouveau_accel_fini(drm);
301 return;
302 }
303 }
304
305
49981046 306 nouveau_bo_move_init(drm);
ebb945a9
BS
307}
308
56550d94
GKH
309static int nouveau_drm_probe(struct pci_dev *pdev,
310 const struct pci_device_id *pent)
94580299 311{
be83cd4e 312 struct nvkm_device *device;
ebb945a9
BS
313 struct apertures_struct *aper;
314 bool boot = false;
94580299
BS
315 int ret;
316
b00e5334 317 if (vga_switcheroo_client_probe_defer(pdev))
98b3a340
LW
318 return -EPROBE_DEFER;
319
0e67bed2
BS
320 /* We need to check that the chipset is supported before booting
321 * fbdev off the hardware, as there's no way to put it back.
322 */
323 ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
324 if (ret)
325 return ret;
326
327 nvkm_device_del(&device);
328
329 /* Remove conflicting drivers (vesafb, efifb etc). */
ebb945a9
BS
330 aper = alloc_apertures(3);
331 if (!aper)
332 return -ENOMEM;
333
334 aper->ranges[0].base = pci_resource_start(pdev, 1);
335 aper->ranges[0].size = pci_resource_len(pdev, 1);
336 aper->count = 1;
337
338 if (pci_resource_len(pdev, 2)) {
339 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
340 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
341 aper->count++;
342 }
343
344 if (pci_resource_len(pdev, 3)) {
345 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
346 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
347 aper->count++;
348 }
349
350#ifdef CONFIG_X86
351 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
352#endif
771fa0e4 353 if (nouveau_modeset != 2)
44adece5 354 drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 355 kfree(aper);
ebb945a9 356
7974dd1b
BS
357 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
358 true, true, ~0ULL, &device);
94580299
BS
359 if (ret)
360 return ret;
361
362 pci_set_master(pdev);
363
915b4d11 364 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 365 if (ret) {
e781dc8f 366 nvkm_device_del(&device);
94580299
BS
367 return ret;
368 }
369
370 return 0;
371}
372
5addcf0a
DA
373#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
374
375static void
46941b0f 376nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 377{
46941b0f 378 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 379
420b9469 380 if (!pdev) {
f2a0adad 381 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
420b9469
AC
382 drm->hdmi_device = NULL;
383 return;
384 }
385
5addcf0a
DA
386 /* subfunction one is a hdmi audio device? */
387 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
388 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
389
390 if (!drm->hdmi_device) {
46941b0f 391 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
392 return;
393 }
394
395 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 396 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
397 pci_dev_put(drm->hdmi_device);
398 drm->hdmi_device = NULL;
399 return;
400 }
401}
402
5b8a43ae 403static int
94580299
BS
404nouveau_drm_load(struct drm_device *dev, unsigned long flags)
405{
94580299
BS
406 struct nouveau_drm *drm;
407 int ret;
408
9ad97ede 409 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
94580299
BS
410 if (ret)
411 return ret;
412
77145f1c
BS
413 dev->dev_private = drm;
414 drm->dev = dev;
989aa5b7 415 nvxx_client(&drm->client.base)->debug =
be83cd4e 416 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 417
94580299 418 INIT_LIST_HEAD(&drm->clients);
ebb945a9 419 spin_lock_init(&drm->tile.lock);
94580299 420
46941b0f 421 nouveau_get_hdmi_dev(drm);
5addcf0a 422
fcf3f91c 423 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
586491e6 424 &(struct nv_device_v0) {
94580299 425 .device = ~0,
586491e6 426 }, sizeof(struct nv_device_v0),
0ad72863 427 &drm->device);
94580299
BS
428 if (ret)
429 goto fail_device;
430
7d3428cd
IM
431 dev->irq_enabled = true;
432
77145f1c
BS
433 /* workaround an odd issue on nvc1 by disabling the device's
434 * nosnoop capability. hopefully won't cause issues until a
435 * better fix is found - assuming there is one...
436 */
967e7bde 437 if (drm->device.info.chipset == 0xc1)
a01ca78c 438 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 439
77145f1c 440 nouveau_vga_init(drm);
cb75d97e 441
967e7bde 442 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
2100292c
BS
443 if (!nvxx_device(&drm->device)->mmu) {
444 ret = -ENOSYS;
445 goto fail_device;
446 }
447
be83cd4e 448 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 449 0x1000, NULL, &drm->client.vm);
ebb945a9
BS
450 if (ret)
451 goto fail_device;
3ee6f5b5 452
989aa5b7 453 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
454 }
455
456 ret = nouveau_ttm_init(drm);
94580299 457 if (ret)
77145f1c
BS
458 goto fail_ttm;
459
460 ret = nouveau_bios_init(dev);
461 if (ret)
462 goto fail_bios;
463
77145f1c 464 ret = nouveau_display_create(dev);
ebb945a9 465 if (ret)
77145f1c
BS
466 goto fail_dispctor;
467
468 if (dev->mode_config.num_crtc) {
469 ret = nouveau_display_init(dev);
470 if (ret)
471 goto fail_dispinit;
472 }
473
b126a200 474 nouveau_debugfs_init(drm);
b9ed919f 475 nouveau_hwmon_init(dev);
ebb945a9
BS
476 nouveau_accel_init(drm);
477 nouveau_fbcon_init(dev);
5addcf0a
DA
478
479 if (nouveau_runtime_pm != 0) {
480 pm_runtime_use_autosuspend(dev->dev);
481 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
482 pm_runtime_set_active(dev->dev);
483 pm_runtime_allow(dev->dev);
484 pm_runtime_mark_last_busy(dev->dev);
485 pm_runtime_put(dev->dev);
486 }
94580299
BS
487 return 0;
488
77145f1c
BS
489fail_dispinit:
490 nouveau_display_destroy(dev);
491fail_dispctor:
77145f1c
BS
492 nouveau_bios_takedown(dev);
493fail_bios:
ebb945a9 494 nouveau_ttm_fini(drm);
77145f1c 495fail_ttm:
77145f1c 496 nouveau_vga_fini(drm);
94580299 497fail_device:
0ad72863 498 nvif_device_fini(&drm->device);
94580299
BS
499 nouveau_cli_destroy(&drm->client);
500 return ret;
501}
502
5b8a43ae 503static int
94580299
BS
504nouveau_drm_unload(struct drm_device *dev)
505{
77145f1c 506 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 507
c1b16b45
LW
508 if (nouveau_runtime_pm != 0) {
509 pm_runtime_get_sync(dev->dev);
55c868a3 510 pm_runtime_forbid(dev->dev);
c1b16b45
LW
511 }
512
ebb945a9
BS
513 nouveau_fbcon_fini(dev);
514 nouveau_accel_fini(drm);
b9ed919f 515 nouveau_hwmon_fini(dev);
b126a200 516 nouveau_debugfs_fini(drm);
77145f1c 517
9430738d
BS
518 if (dev->mode_config.num_crtc)
519 nouveau_display_fini(dev);
77145f1c
BS
520 nouveau_display_destroy(dev);
521
77145f1c 522 nouveau_bios_takedown(dev);
94580299 523
ebb945a9 524 nouveau_ttm_fini(drm);
77145f1c 525 nouveau_vga_fini(drm);
cb75d97e 526
0ad72863 527 nvif_device_fini(&drm->device);
5addcf0a
DA
528 if (drm->hdmi_device)
529 pci_dev_put(drm->hdmi_device);
94580299
BS
530 nouveau_cli_destroy(&drm->client);
531 return 0;
532}
533
8ba9ff11
AC
534void
535nouveau_drm_device_remove(struct drm_device *dev)
94580299 536{
77145f1c 537 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 538 struct nvkm_client *client;
76ecea5b 539 struct nvkm_device *device;
77145f1c 540
7d3428cd 541 dev->irq_enabled = false;
989aa5b7 542 client = nvxx_client(&drm->client.base);
4e7e62d6 543 device = nvkm_device_find(client->device);
77145f1c
BS
544 drm_put_dev(dev);
545
e781dc8f 546 nvkm_device_del(&device);
94580299 547}
8ba9ff11
AC
548
549static void
550nouveau_drm_remove(struct pci_dev *pdev)
551{
552 struct drm_device *dev = pci_get_drvdata(pdev);
553
554 nouveau_drm_device_remove(dev);
555}
94580299 556
cd897837 557static int
05c63c2f 558nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 559{
77145f1c 560 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
561 struct nouveau_cli *cli;
562 int ret;
563
6fbb702e
BS
564 if (dev->mode_config.num_crtc) {
565 NV_INFO(drm, "suspending console...\n");
566 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 567 NV_INFO(drm, "suspending display...\n");
6fbb702e 568 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
569 if (ret)
570 return ret;
571 }
94580299 572
c52f4fa6 573 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
574 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
575
c52f4fa6 576 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
577 if (drm->cechan) {
578 ret = nouveau_channel_idle(drm->cechan);
579 if (ret)
f3980dc5 580 goto fail_display;
81dff21b
BS
581 }
582
583 if (drm->channel) {
584 ret = nouveau_channel_idle(drm->channel);
585 if (ret)
f3980dc5 586 goto fail_display;
81dff21b
BS
587 }
588
c52f4fa6 589 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 590 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
591 if (!nouveau_fence(drm)->suspend(drm)) {
592 ret = -ENOMEM;
593 goto fail_display;
594 }
ebb945a9
BS
595 }
596
94580299 597 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 598 ret = nvif_client_suspend(&cli->base);
94580299
BS
599 if (ret)
600 goto fail_client;
601 }
602
c52f4fa6 603 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 604 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
605 if (ret)
606 goto fail_client;
607
94580299
BS
608 return 0;
609
610fail_client:
611 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 612 nvif_client_resume(&cli->base);
94580299
BS
613 }
614
f3980dc5
IM
615 if (drm->fence && nouveau_fence(drm)->resume)
616 nouveau_fence(drm)->resume(drm);
617
618fail_display:
9430738d 619 if (dev->mode_config.num_crtc) {
c52f4fa6 620 NV_INFO(drm, "resuming display...\n");
6fbb702e 621 nouveau_display_resume(dev, runtime);
9430738d 622 }
94580299
BS
623 return ret;
624}
625
cd897837 626static int
6fbb702e 627nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
628{
629 struct nouveau_drm *drm = nouveau_drm(dev);
630 struct nouveau_cli *cli;
631
c52f4fa6 632 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 633 nvif_client_resume(&drm->client.base);
94580299 634
c52f4fa6 635 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
636 if (drm->fence && nouveau_fence(drm)->resume)
637 nouveau_fence(drm)->resume(drm);
638
94580299 639 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 640 nvif_client_resume(&cli->base);
94580299 641 }
cb75d97e 642
77145f1c 643 nouveau_run_vbios_init(dev);
77145f1c 644
9430738d 645 if (dev->mode_config.num_crtc) {
c52f4fa6 646 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
647 nouveau_display_resume(dev, runtime);
648 NV_INFO(drm, "resuming console...\n");
649 nouveau_fbcon_set_suspend(dev, 0);
9430738d 650 }
5addcf0a 651
77145f1c 652 return 0;
94580299
BS
653}
654
7bb6d442
BS
655int
656nouveau_pmops_suspend(struct device *dev)
657{
658 struct pci_dev *pdev = to_pci_dev(dev);
659 struct drm_device *drm_dev = pci_get_drvdata(pdev);
660 int ret;
661
662 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
663 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
664 return 0;
665
666 ret = nouveau_do_suspend(drm_dev, false);
667 if (ret)
668 return ret;
669
670 pci_save_state(pdev);
671 pci_disable_device(pdev);
7bb6d442 672 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 673 udelay(200);
7bb6d442
BS
674 return 0;
675}
676
677int
678nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
679{
680 struct pci_dev *pdev = to_pci_dev(dev);
681 struct drm_device *drm_dev = pci_get_drvdata(pdev);
682 int ret;
683
5addcf0a
DA
684 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
685 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
686 return 0;
687
688 pci_set_power_state(pdev, PCI_D0);
689 pci_restore_state(pdev);
690 ret = pci_enable_device(pdev);
691 if (ret)
692 return ret;
693 pci_set_master(pdev);
694
6fbb702e 695 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
696}
697
7bb6d442
BS
698static int
699nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
700{
701 struct pci_dev *pdev = to_pci_dev(dev);
702 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 703 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
704}
705
7bb6d442
BS
706static int
707nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
708{
709 struct pci_dev *pdev = to_pci_dev(dev);
710 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 711 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
712}
713
7bb6d442
BS
714static int
715nouveau_pmops_runtime_suspend(struct device *dev)
716{
717 struct pci_dev *pdev = to_pci_dev(dev);
718 struct drm_device *drm_dev = pci_get_drvdata(pdev);
719 int ret;
720
721 if (nouveau_runtime_pm == 0) {
722 pm_runtime_forbid(dev);
723 return -EBUSY;
724 }
725
726 /* are we optimus enabled? */
727 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
728 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
729 pm_runtime_forbid(dev);
730 return -EBUSY;
731 }
732
7bb6d442
BS
733 drm_kms_helper_poll_disable(drm_dev);
734 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
735 nouveau_switcheroo_optimus_dsm();
736 ret = nouveau_do_suspend(drm_dev, true);
737 pci_save_state(pdev);
738 pci_disable_device(pdev);
8c863944 739 pci_ignore_hotplug(pdev);
7bb6d442
BS
740 pci_set_power_state(pdev, PCI_D3cold);
741 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
742 return ret;
743}
744
745static int
746nouveau_pmops_runtime_resume(struct device *dev)
747{
748 struct pci_dev *pdev = to_pci_dev(dev);
749 struct drm_device *drm_dev = pci_get_drvdata(pdev);
750 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
751 int ret;
752
753 if (nouveau_runtime_pm == 0)
754 return -EINVAL;
755
756 pci_set_power_state(pdev, PCI_D0);
757 pci_restore_state(pdev);
758 ret = pci_enable_device(pdev);
759 if (ret)
760 return ret;
761 pci_set_master(pdev);
762
763 ret = nouveau_do_resume(drm_dev, true);
764 drm_kms_helper_poll_enable(drm_dev);
765 /* do magic */
a01ca78c 766 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
767 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
768 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
7bb6d442
BS
769 return ret;
770}
771
772static int
773nouveau_pmops_runtime_idle(struct device *dev)
774{
775 struct pci_dev *pdev = to_pci_dev(dev);
776 struct drm_device *drm_dev = pci_get_drvdata(pdev);
777 struct nouveau_drm *drm = nouveau_drm(drm_dev);
778 struct drm_crtc *crtc;
779
780 if (nouveau_runtime_pm == 0) {
781 pm_runtime_forbid(dev);
782 return -EBUSY;
783 }
784
785 /* are we optimus enabled? */
786 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
787 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
788 pm_runtime_forbid(dev);
789 return -EBUSY;
790 }
791
792 /* if we have a hdmi audio device - make sure it has a driver loaded */
793 if (drm->hdmi_device) {
794 if (!drm->hdmi_device->driver) {
795 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
796 pm_runtime_mark_last_busy(dev);
797 return -EBUSY;
798 }
799 }
800
801 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
802 if (crtc->enabled) {
803 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
804 return -EBUSY;
805 }
806 }
807 pm_runtime_mark_last_busy(dev);
808 pm_runtime_autosuspend(dev);
809 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
810 return 1;
811}
2d8b9ccb 812
5b8a43ae 813static int
ebb945a9
BS
814nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
815{
ebb945a9
BS
816 struct nouveau_drm *drm = nouveau_drm(dev);
817 struct nouveau_cli *cli;
a2896ced 818 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
819 int ret;
820
5addcf0a
DA
821 /* need to bring up power immediately if opening device */
822 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 823 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
824 return ret;
825
a2896ced
MS
826 get_task_comm(tmpname, current);
827 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 828
9ad97ede 829 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
420b9469 830
ebb945a9 831 if (ret)
5addcf0a 832 goto out_suspend;
ebb945a9 833
0ad72863
BS
834 cli->base.super = false;
835
967e7bde 836 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 837 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 838 0x1000, NULL, &cli->vm);
ebb945a9
BS
839 if (ret) {
840 nouveau_cli_destroy(cli);
5addcf0a 841 goto out_suspend;
ebb945a9 842 }
3ee6f5b5 843
989aa5b7 844 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
845 }
846
847 fpriv->driver_priv = cli;
848
849 mutex_lock(&drm->client.mutex);
850 list_add(&cli->head, &drm->clients);
851 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
852
853out_suspend:
854 pm_runtime_mark_last_busy(dev->dev);
855 pm_runtime_put_autosuspend(dev->dev);
856
857 return ret;
ebb945a9
BS
858}
859
5b8a43ae 860static void
ebb945a9
BS
861nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
862{
863 struct nouveau_cli *cli = nouveau_cli(fpriv);
864 struct nouveau_drm *drm = nouveau_drm(dev);
865
5addcf0a
DA
866 pm_runtime_get_sync(dev->dev);
867
ac8c7930 868 mutex_lock(&cli->mutex);
ebb945a9
BS
869 if (cli->abi16)
870 nouveau_abi16_fini(cli->abi16);
ac8c7930 871 mutex_unlock(&cli->mutex);
ebb945a9
BS
872
873 mutex_lock(&drm->client.mutex);
874 list_del(&cli->head);
875 mutex_unlock(&drm->client.mutex);
5addcf0a 876
ebb945a9
BS
877}
878
5b8a43ae 879static void
ebb945a9
BS
880nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
881{
882 struct nouveau_cli *cli = nouveau_cli(fpriv);
883 nouveau_cli_destroy(cli);
5addcf0a
DA
884 pm_runtime_mark_last_busy(dev->dev);
885 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
886}
887
baa70943 888static const struct drm_ioctl_desc
77145f1c 889nouveau_ioctls[] = {
f8c47144
DV
890 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
891 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
892 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
893 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
894 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
895 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
896 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
897 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
898 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
899 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
900 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
901 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
902};
903
27111a23
BS
904long
905nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 906{
27111a23
BS
907 struct drm_file *filp = file->private_data;
908 struct drm_device *dev = filp->minor->dev;
5addcf0a 909 long ret;
5addcf0a
DA
910
911 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 912 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
913 return ret;
914
27111a23
BS
915 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
916 case DRM_NOUVEAU_NVIF:
917 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
918 break;
919 default:
920 ret = drm_ioctl(file, cmd, arg);
921 break;
922 }
5addcf0a
DA
923
924 pm_runtime_mark_last_busy(dev->dev);
925 pm_runtime_put_autosuspend(dev->dev);
926 return ret;
927}
27111a23 928
77145f1c
BS
929static const struct file_operations
930nouveau_driver_fops = {
931 .owner = THIS_MODULE,
932 .open = drm_open,
933 .release = drm_release,
5addcf0a 934 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
935 .mmap = nouveau_ttm_mmap,
936 .poll = drm_poll,
77145f1c
BS
937 .read = drm_read,
938#if defined(CONFIG_COMPAT)
939 .compat_ioctl = nouveau_compat_ioctl,
940#endif
941 .llseek = noop_llseek,
942};
943
944static struct drm_driver
915b4d11 945driver_stub = {
77145f1c 946 .driver_features =
0e975980
PA
947 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
948 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
949
950 .load = nouveau_drm_load,
951 .unload = nouveau_drm_unload,
952 .open = nouveau_drm_open,
953 .preclose = nouveau_drm_preclose,
954 .postclose = nouveau_drm_postclose,
955 .lastclose = nouveau_vga_lastclose,
956
33b903e8 957#if defined(CONFIG_DEBUG_FS)
56c101af
KH
958 .debugfs_init = nouveau_drm_debugfs_init,
959 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
33b903e8
MS
960#endif
961
b44f8408 962 .get_vblank_counter = drm_vblank_no_hw_counter,
51cb4b39
BS
963 .enable_vblank = nouveau_display_vblank_enable,
964 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
965 .get_scanout_position = nouveau_display_scanoutpos,
966 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
967
968 .ioctls = nouveau_ioctls,
baa70943 969 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
970 .fops = &nouveau_driver_fops,
971
972 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
973 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
974 .gem_prime_export = drm_gem_prime_export,
975 .gem_prime_import = drm_gem_prime_import,
976 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 977 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 978 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
979 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
980 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
981 .gem_prime_vmap = nouveau_gem_prime_vmap,
982 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 983
a51e6ac4 984 .gem_free_object_unlocked = nouveau_gem_object_del,
77145f1c
BS
985 .gem_open_object = nouveau_gem_object_open,
986 .gem_close_object = nouveau_gem_object_close,
987
988 .dumb_create = nouveau_display_dumb_create,
989 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 990 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
991
992 .name = DRIVER_NAME,
993 .desc = DRIVER_DESC,
994#ifdef GIT_REVISION
995 .date = GIT_REVISION,
996#else
997 .date = DRIVER_DATE,
998#endif
999 .major = DRIVER_MAJOR,
1000 .minor = DRIVER_MINOR,
1001 .patchlevel = DRIVER_PATCHLEVEL,
1002};
1003
94580299
BS
1004static struct pci_device_id
1005nouveau_drm_pci_table[] = {
1006 {
1007 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1008 .class = PCI_BASE_CLASS_DISPLAY << 16,
1009 .class_mask = 0xff << 16,
1010 },
1011 {
1012 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1013 .class = PCI_BASE_CLASS_DISPLAY << 16,
1014 .class_mask = 0xff << 16,
1015 },
1016 {}
1017};
1018
703fa264
PM
1019static void nouveau_display_options(void)
1020{
1021 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1022
1023 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1024 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1025 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1026 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1027 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1028 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1029 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1030 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1031 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1032 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
703fa264
PM
1033}
1034
2d8b9ccb
DA
1035static const struct dev_pm_ops nouveau_pm_ops = {
1036 .suspend = nouveau_pmops_suspend,
1037 .resume = nouveau_pmops_resume,
1038 .freeze = nouveau_pmops_freeze,
1039 .thaw = nouveau_pmops_thaw,
1040 .poweroff = nouveau_pmops_freeze,
1041 .restore = nouveau_pmops_resume,
5addcf0a
DA
1042 .runtime_suspend = nouveau_pmops_runtime_suspend,
1043 .runtime_resume = nouveau_pmops_runtime_resume,
1044 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1045};
1046
94580299
BS
1047static struct pci_driver
1048nouveau_drm_pci_driver = {
1049 .name = "nouveau",
1050 .id_table = nouveau_drm_pci_table,
1051 .probe = nouveau_drm_probe,
1052 .remove = nouveau_drm_remove,
2d8b9ccb 1053 .driver.pm = &nouveau_pm_ops,
94580299
BS
1054};
1055
8ba9ff11 1056struct drm_device *
e396ecd1
AC
1057nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1058 struct platform_device *pdev,
47b2505e 1059 struct nvkm_device **pdevice)
420b9469 1060{
8ba9ff11
AC
1061 struct drm_device *drm;
1062 int err;
420b9469 1063
e396ecd1 1064 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1065 true, true, ~0ULL, pdevice);
8ba9ff11 1066 if (err)
e781dc8f 1067 goto err_free;
8ba9ff11 1068
915b4d11 1069 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1070 if (!drm) {
1071 err = -ENOMEM;
1072 goto err_free;
420b9469
AC
1073 }
1074
8ba9ff11
AC
1075 drm->platformdev = pdev;
1076 platform_set_drvdata(pdev, drm);
1077
1078 return drm;
1079
1080err_free:
e781dc8f 1081 nvkm_device_del(pdevice);
8ba9ff11
AC
1082
1083 return ERR_PTR(err);
420b9469
AC
1084}
1085
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1086static int __init
1087nouveau_drm_init(void)
1088{
915b4d11
DH
1089 driver_pci = driver_stub;
1090 driver_pci.set_busid = drm_pci_set_busid;
1091 driver_platform = driver_stub;
915b4d11 1092
703fa264
PM
1093 nouveau_display_options();
1094
77145f1c 1095 if (nouveau_modeset == -1) {
77145f1c
BS
1096 if (vgacon_text_force())
1097 nouveau_modeset = 0;
77145f1c
BS
1098 }
1099
1100 if (!nouveau_modeset)
1101 return 0;
1102
055a65d5
AC
1103#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1104 platform_driver_register(&nouveau_platform_driver);
1105#endif
1106
77145f1c 1107 nouveau_register_dsm_handler();
915b4d11 1108 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
94580299
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1109}
1110
1111static void __exit
1112nouveau_drm_exit(void)
1113{
77145f1c
BS
1114 if (!nouveau_modeset)
1115 return;
1116
915b4d11 1117 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1118 nouveau_unregister_dsm_handler();
055a65d5
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1119
1120#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1121 platform_driver_unregister(&nouveau_platform_driver);
1122#endif
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1123}
1124
1125module_init(nouveau_drm_init);
1126module_exit(nouveau_drm_exit);
1127
1128MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1129MODULE_AUTHOR(DRIVER_AUTHOR);
1130MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1131MODULE_LICENSE("GPL and additional rights");
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