Merge tag 'drm-vc4-next-2016-02-17' of github.com:anholt/linux into drm-next
[deliverable/linux.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
98b3a340 25#include <linux/apple-gmux.h>
77145f1c 26#include <linux/console.h>
c5fd936e 27#include <linux/delay.h>
94580299
BS
28#include <linux/module.h>
29#include <linux/pci.h>
5addcf0a 30#include <linux/pm_runtime.h>
98b3a340 31#include <linux/vgaarb.h>
5addcf0a 32#include <linux/vga_switcheroo.h>
fdb751ef 33
5addcf0a
DA
34#include "drmP.h"
35#include "drm_crtc_helper.h"
fdb751ef 36
ebb945a9 37#include <core/gpuobj.h>
c33e05a1 38#include <core/option.h>
7974dd1b
BS
39#include <core/pci.h>
40#include <core/tegra.h>
94580299 41
923bc416 42#include <nvif/class.h>
845f2725 43#include <nvif/cl0002.h>
8ed1730c 44#include <nvif/cla06f.h>
538b269b
BS
45#include <nvif/if0004.h>
46
94580299 47#include "nouveau_drm.h"
ebb945a9 48#include "nouveau_dma.h"
77145f1c
BS
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
77145f1c 51#include "nouveau_vga.h"
b9ed919f 52#include "nouveau_hwmon.h"
77145f1c
BS
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
ebb945a9
BS
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
33b903e8 59#include "nouveau_debugfs.h"
27111a23 60#include "nouveau_usif.h"
703fa264 61#include "nouveau_connector.h"
055a65d5 62#include "nouveau_platform.h"
ebb945a9 63
94580299
BS
64MODULE_PARM_DESC(config, "option string to pass to driver core");
65static char *nouveau_config;
66module_param_named(config, nouveau_config, charp, 0400);
67
68MODULE_PARM_DESC(debug, "debug string to pass to driver core");
69static char *nouveau_debug;
70module_param_named(debug, nouveau_debug, charp, 0400);
71
ebb945a9
BS
72MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
73static int nouveau_noaccel = 0;
74module_param_named(noaccel, nouveau_noaccel, int, 0400);
75
9430738d
BS
76MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
77 "0 = disabled, 1 = enabled, 2 = headless)");
78int nouveau_modeset = -1;
77145f1c
BS
79module_param_named(modeset, nouveau_modeset, int, 0400);
80
5addcf0a
DA
81MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
82int nouveau_runtime_pm = -1;
83module_param_named(runpm, nouveau_runtime_pm, int, 0400);
84
915b4d11
DH
85static struct drm_driver driver_stub;
86static struct drm_driver driver_pci;
87static struct drm_driver driver_platform;
77145f1c 88
94580299 89static u64
420b9469 90nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
91{
92 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
93 name |= pdev->bus->number << 16;
94 name |= PCI_SLOT(pdev->devfn) << 8;
95 return name | PCI_FUNC(pdev->devfn);
96}
97
420b9469
AC
98static u64
99nouveau_platform_name(struct platform_device *platformdev)
100{
101 return platformdev->id;
102}
103
104static u64
105nouveau_name(struct drm_device *dev)
106{
107 if (dev->pdev)
108 return nouveau_pci_name(dev->pdev);
109 else
110 return nouveau_platform_name(dev->platformdev);
111}
112
94580299 113static int
9ad97ede 114nouveau_cli_create(struct drm_device *dev, const char *sname,
fa6df8c1 115 int size, void **pcli)
94580299 116{
0ad72863 117 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
9ad97ede 118 int ret;
0ad72863 119 if (cli) {
9ad97ede
BS
120 snprintf(cli->name, sizeof(cli->name), "%s", sname);
121 cli->dev = dev;
122
a01ca78c 123 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
9ad97ede
BS
124 nouveau_config, nouveau_debug,
125 &cli->base);
27111a23 126 if (ret == 0) {
0ad72863 127 mutex_init(&cli->mutex);
27111a23
BS
128 usif_client_init(cli);
129 }
94580299 130 return ret;
dd5700ea 131 }
0ad72863 132 return -ENOMEM;
94580299
BS
133}
134
135static void
136nouveau_cli_destroy(struct nouveau_cli *cli)
137{
be83cd4e 138 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 139 nvif_client_fini(&cli->base);
27111a23 140 usif_client_fini(cli);
f5654d95 141 kfree(cli);
94580299
BS
142}
143
ebb945a9
BS
144static void
145nouveau_accel_fini(struct nouveau_drm *drm)
146{
fbd58ebd 147 nouveau_channel_idle(drm->channel);
0ad72863 148 nvif_object_fini(&drm->ntfy);
f027f491 149 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 150 nvif_notify_fini(&drm->flip);
0ad72863 151 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
152 nouveau_channel_del(&drm->channel);
153
154 nouveau_channel_idle(drm->cechan);
0ad72863 155 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
156 nouveau_channel_del(&drm->cechan);
157
ebb945a9
BS
158 if (drm->fence)
159 nouveau_fence(drm)->dtor(drm);
160}
161
162static void
163nouveau_accel_init(struct nouveau_drm *drm)
164{
967e7bde 165 struct nvif_device *device = &drm->device;
41a63406 166 struct nvif_sclass *sclass;
49981046 167 u32 arg0, arg1;
41a63406 168 int ret, i, n;
ebb945a9 169
967e7bde 170 if (nouveau_noaccel)
ebb945a9
BS
171 return;
172
173 /* initialise synchronisation routines */
967e7bde
BS
174 /*XXX: this is crap, but the fence/channel stuff is a little
175 * backwards in some places. this will be fixed.
176 */
41a63406 177 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
178 if (ret < 0)
179 return;
180
41a63406
BS
181 for (ret = -ENOSYS, i = 0; i < n; i++) {
182 switch (sclass[i].oclass) {
bbf8906b 183 case NV03_CHANNEL_DMA:
967e7bde
BS
184 ret = nv04_fence_create(drm);
185 break;
bbf8906b 186 case NV10_CHANNEL_DMA:
967e7bde
BS
187 ret = nv10_fence_create(drm);
188 break;
bbf8906b
BS
189 case NV17_CHANNEL_DMA:
190 case NV40_CHANNEL_DMA:
967e7bde
BS
191 ret = nv17_fence_create(drm);
192 break;
bbf8906b 193 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
194 ret = nv50_fence_create(drm);
195 break;
bbf8906b 196 case G82_CHANNEL_GPFIFO:
967e7bde
BS
197 ret = nv84_fence_create(drm);
198 break;
bbf8906b
BS
199 case FERMI_CHANNEL_GPFIFO:
200 case KEPLER_CHANNEL_GPFIFO_A:
a1020afe 201 case MAXWELL_CHANNEL_GPFIFO_A:
967e7bde
BS
202 ret = nvc0_fence_create(drm);
203 break;
204 default:
205 break;
206 }
207 }
208
41a63406 209 nvif_object_sclass_put(&sclass);
ebb945a9
BS
210 if (ret) {
211 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
212 nouveau_accel_fini(drm);
213 return;
214 }
215
967e7bde 216 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
fcf3f91c 217 ret = nouveau_channel_new(drm, &drm->device,
bbf8906b
BS
218 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
219 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
220 0, &drm->cechan);
49981046
BS
221 if (ret)
222 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
223
bbf8906b 224 arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
49469800 225 arg1 = 1;
00fc6f6f 226 } else
967e7bde
BS
227 if (device->info.chipset >= 0xa3 &&
228 device->info.chipset != 0xaa &&
229 device->info.chipset != 0xac) {
fcf3f91c 230 ret = nouveau_channel_new(drm, &drm->device,
0ad72863 231 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
232 if (ret)
233 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
234
235 arg0 = NvDmaFB;
236 arg1 = NvDmaTT;
49981046
BS
237 } else {
238 arg0 = NvDmaFB;
239 arg1 = NvDmaTT;
240 }
241
fcf3f91c 242 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
ebb945a9
BS
243 if (ret) {
244 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
245 nouveau_accel_fini(drm);
246 return;
247 }
248
a01ca78c 249 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 250 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 251 if (ret == 0) {
69a6146d
BS
252 ret = RING_SPACE(drm->channel, 2);
253 if (ret == 0) {
967e7bde 254 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
255 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
256 OUT_RING (drm->channel, NVDRM_NVSW);
257 } else
967e7bde 258 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
259 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
260 OUT_RING (drm->channel, 0x001f0000);
261 }
262 }
898a2b32
BS
263
264 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
265 false, NV04_NVSW_NTFY_UEVENT,
266 NULL, 0, 0, &drm->flip);
898a2b32
BS
267 if (ret == 0)
268 ret = nvif_notify_get(&drm->flip);
269 if (ret) {
270 nouveau_accel_fini(drm);
271 return;
272 }
69a6146d
BS
273 }
274
275 if (ret) {
276 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
277 nouveau_accel_fini(drm);
278 return;
279 }
280
967e7bde 281 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
f027f491
BS
282 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
283 NULL, &drm->notify);
ebb945a9
BS
284 if (ret) {
285 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
286 nouveau_accel_fini(drm);
287 return;
288 }
289
a01ca78c 290 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
291 NV_DMA_IN_MEMORY,
292 &(struct nv_dma_v0) {
293 .target = NV_DMA_V0_TARGET_VRAM,
294 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
295 .start = drm->notify->addr,
296 .limit = drm->notify->addr + 31
4acfd707 297 }, sizeof(struct nv_dma_v0),
0ad72863 298 &drm->ntfy);
ebb945a9
BS
299 if (ret) {
300 nouveau_accel_fini(drm);
301 return;
302 }
303 }
304
305
49981046 306 nouveau_bo_move_init(drm);
ebb945a9
BS
307}
308
56550d94
GKH
309static int nouveau_drm_probe(struct pci_dev *pdev,
310 const struct pci_device_id *pent)
94580299 311{
be83cd4e 312 struct nvkm_device *device;
ebb945a9
BS
313 struct apertures_struct *aper;
314 bool boot = false;
94580299
BS
315 int ret;
316
98b3a340
LW
317 /*
318 * apple-gmux is needed on dual GPU MacBook Pro
319 * to probe the panel if we're the inactive GPU.
320 */
321 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
322 apple_gmux_present() && pdev != vga_default_device() &&
323 !vga_switcheroo_handler_flags())
324 return -EPROBE_DEFER;
325
ebb945a9
BS
326 /* remove conflicting drivers (vesafb, efifb etc) */
327 aper = alloc_apertures(3);
328 if (!aper)
329 return -ENOMEM;
330
331 aper->ranges[0].base = pci_resource_start(pdev, 1);
332 aper->ranges[0].size = pci_resource_len(pdev, 1);
333 aper->count = 1;
334
335 if (pci_resource_len(pdev, 2)) {
336 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
337 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
338 aper->count++;
339 }
340
341 if (pci_resource_len(pdev, 3)) {
342 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
343 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
344 aper->count++;
345 }
346
347#ifdef CONFIG_X86
348 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
349#endif
771fa0e4
BS
350 if (nouveau_modeset != 2)
351 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 352 kfree(aper);
ebb945a9 353
7974dd1b
BS
354 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
355 true, true, ~0ULL, &device);
94580299
BS
356 if (ret)
357 return ret;
358
359 pci_set_master(pdev);
360
915b4d11 361 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 362 if (ret) {
e781dc8f 363 nvkm_device_del(&device);
94580299
BS
364 return ret;
365 }
366
367 return 0;
368}
369
5addcf0a
DA
370#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
371
372static void
46941b0f 373nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 374{
46941b0f 375 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 376
420b9469 377 if (!pdev) {
40189b0c 378 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
379 drm->hdmi_device = NULL;
380 return;
381 }
382
5addcf0a
DA
383 /* subfunction one is a hdmi audio device? */
384 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
385 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
386
387 if (!drm->hdmi_device) {
46941b0f 388 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
389 return;
390 }
391
392 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 393 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
394 pci_dev_put(drm->hdmi_device);
395 drm->hdmi_device = NULL;
396 return;
397 }
398}
399
5b8a43ae 400static int
94580299
BS
401nouveau_drm_load(struct drm_device *dev, unsigned long flags)
402{
94580299
BS
403 struct nouveau_drm *drm;
404 int ret;
405
9ad97ede 406 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
94580299
BS
407 if (ret)
408 return ret;
409
77145f1c
BS
410 dev->dev_private = drm;
411 drm->dev = dev;
989aa5b7 412 nvxx_client(&drm->client.base)->debug =
be83cd4e 413 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 414
94580299 415 INIT_LIST_HEAD(&drm->clients);
ebb945a9 416 spin_lock_init(&drm->tile.lock);
94580299 417
46941b0f 418 nouveau_get_hdmi_dev(drm);
5addcf0a 419
fcf3f91c 420 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
586491e6 421 &(struct nv_device_v0) {
94580299 422 .device = ~0,
586491e6 423 }, sizeof(struct nv_device_v0),
0ad72863 424 &drm->device);
94580299
BS
425 if (ret)
426 goto fail_device;
427
7d3428cd
IM
428 dev->irq_enabled = true;
429
77145f1c
BS
430 /* workaround an odd issue on nvc1 by disabling the device's
431 * nosnoop capability. hopefully won't cause issues until a
432 * better fix is found - assuming there is one...
433 */
967e7bde 434 if (drm->device.info.chipset == 0xc1)
a01ca78c 435 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 436
77145f1c 437 nouveau_vga_init(drm);
cb75d97e 438
967e7bde 439 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 440 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 441 0x1000, NULL, &drm->client.vm);
ebb945a9
BS
442 if (ret)
443 goto fail_device;
3ee6f5b5 444
989aa5b7 445 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
446 }
447
448 ret = nouveau_ttm_init(drm);
94580299 449 if (ret)
77145f1c
BS
450 goto fail_ttm;
451
452 ret = nouveau_bios_init(dev);
453 if (ret)
454 goto fail_bios;
455
77145f1c 456 ret = nouveau_display_create(dev);
ebb945a9 457 if (ret)
77145f1c
BS
458 goto fail_dispctor;
459
460 if (dev->mode_config.num_crtc) {
461 ret = nouveau_display_init(dev);
462 if (ret)
463 goto fail_dispinit;
464 }
465
b126a200 466 nouveau_debugfs_init(drm);
b9ed919f 467 nouveau_hwmon_init(dev);
ebb945a9
BS
468 nouveau_accel_init(drm);
469 nouveau_fbcon_init(dev);
5addcf0a
DA
470
471 if (nouveau_runtime_pm != 0) {
472 pm_runtime_use_autosuspend(dev->dev);
473 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
474 pm_runtime_set_active(dev->dev);
475 pm_runtime_allow(dev->dev);
476 pm_runtime_mark_last_busy(dev->dev);
477 pm_runtime_put(dev->dev);
478 }
94580299
BS
479 return 0;
480
77145f1c
BS
481fail_dispinit:
482 nouveau_display_destroy(dev);
483fail_dispctor:
77145f1c
BS
484 nouveau_bios_takedown(dev);
485fail_bios:
ebb945a9 486 nouveau_ttm_fini(drm);
77145f1c 487fail_ttm:
77145f1c 488 nouveau_vga_fini(drm);
94580299 489fail_device:
0ad72863 490 nvif_device_fini(&drm->device);
94580299
BS
491 nouveau_cli_destroy(&drm->client);
492 return ret;
493}
494
5b8a43ae 495static int
94580299
BS
496nouveau_drm_unload(struct drm_device *dev)
497{
77145f1c 498 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 499
5addcf0a 500 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
501 nouveau_fbcon_fini(dev);
502 nouveau_accel_fini(drm);
b9ed919f 503 nouveau_hwmon_fini(dev);
b126a200 504 nouveau_debugfs_fini(drm);
77145f1c 505
9430738d
BS
506 if (dev->mode_config.num_crtc)
507 nouveau_display_fini(dev);
77145f1c
BS
508 nouveau_display_destroy(dev);
509
77145f1c 510 nouveau_bios_takedown(dev);
94580299 511
ebb945a9 512 nouveau_ttm_fini(drm);
77145f1c 513 nouveau_vga_fini(drm);
cb75d97e 514
0ad72863 515 nvif_device_fini(&drm->device);
5addcf0a
DA
516 if (drm->hdmi_device)
517 pci_dev_put(drm->hdmi_device);
94580299
BS
518 nouveau_cli_destroy(&drm->client);
519 return 0;
520}
521
8ba9ff11
AC
522void
523nouveau_drm_device_remove(struct drm_device *dev)
94580299 524{
77145f1c 525 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 526 struct nvkm_client *client;
76ecea5b 527 struct nvkm_device *device;
77145f1c 528
7d3428cd 529 dev->irq_enabled = false;
989aa5b7 530 client = nvxx_client(&drm->client.base);
4e7e62d6 531 device = nvkm_device_find(client->device);
77145f1c
BS
532 drm_put_dev(dev);
533
e781dc8f 534 nvkm_device_del(&device);
94580299 535}
8ba9ff11
AC
536
537static void
538nouveau_drm_remove(struct pci_dev *pdev)
539{
540 struct drm_device *dev = pci_get_drvdata(pdev);
541
542 nouveau_drm_device_remove(dev);
543}
94580299 544
cd897837 545static int
05c63c2f 546nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 547{
77145f1c 548 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
549 struct nouveau_cli *cli;
550 int ret;
551
6fbb702e
BS
552 if (dev->mode_config.num_crtc) {
553 NV_INFO(drm, "suspending console...\n");
554 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 555 NV_INFO(drm, "suspending display...\n");
6fbb702e 556 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
557 if (ret)
558 return ret;
559 }
94580299 560
c52f4fa6 561 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
562 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
563
c52f4fa6 564 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
565 if (drm->cechan) {
566 ret = nouveau_channel_idle(drm->cechan);
567 if (ret)
f3980dc5 568 goto fail_display;
81dff21b
BS
569 }
570
571 if (drm->channel) {
572 ret = nouveau_channel_idle(drm->channel);
573 if (ret)
f3980dc5 574 goto fail_display;
81dff21b
BS
575 }
576
c52f4fa6 577 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 578 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
579 if (!nouveau_fence(drm)->suspend(drm)) {
580 ret = -ENOMEM;
581 goto fail_display;
582 }
ebb945a9
BS
583 }
584
94580299 585 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 586 ret = nvif_client_suspend(&cli->base);
94580299
BS
587 if (ret)
588 goto fail_client;
589 }
590
c52f4fa6 591 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 592 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
593 if (ret)
594 goto fail_client;
595
94580299
BS
596 return 0;
597
598fail_client:
599 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 600 nvif_client_resume(&cli->base);
94580299
BS
601 }
602
f3980dc5
IM
603 if (drm->fence && nouveau_fence(drm)->resume)
604 nouveau_fence(drm)->resume(drm);
605
606fail_display:
9430738d 607 if (dev->mode_config.num_crtc) {
c52f4fa6 608 NV_INFO(drm, "resuming display...\n");
6fbb702e 609 nouveau_display_resume(dev, runtime);
9430738d 610 }
94580299
BS
611 return ret;
612}
613
cd897837 614static int
6fbb702e 615nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
616{
617 struct nouveau_drm *drm = nouveau_drm(dev);
618 struct nouveau_cli *cli;
619
c52f4fa6 620 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 621 nvif_client_resume(&drm->client.base);
94580299 622
c52f4fa6 623 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
624 if (drm->fence && nouveau_fence(drm)->resume)
625 nouveau_fence(drm)->resume(drm);
626
94580299 627 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 628 nvif_client_resume(&cli->base);
94580299 629 }
cb75d97e 630
77145f1c 631 nouveau_run_vbios_init(dev);
77145f1c 632
9430738d 633 if (dev->mode_config.num_crtc) {
c52f4fa6 634 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
635 nouveau_display_resume(dev, runtime);
636 NV_INFO(drm, "resuming console...\n");
637 nouveau_fbcon_set_suspend(dev, 0);
9430738d 638 }
5addcf0a 639
77145f1c 640 return 0;
94580299
BS
641}
642
7bb6d442
BS
643int
644nouveau_pmops_suspend(struct device *dev)
645{
646 struct pci_dev *pdev = to_pci_dev(dev);
647 struct drm_device *drm_dev = pci_get_drvdata(pdev);
648 int ret;
649
650 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
651 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
652 return 0;
653
654 ret = nouveau_do_suspend(drm_dev, false);
655 if (ret)
656 return ret;
657
658 pci_save_state(pdev);
659 pci_disable_device(pdev);
7bb6d442 660 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 661 udelay(200);
7bb6d442
BS
662 return 0;
663}
664
665int
666nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
667{
668 struct pci_dev *pdev = to_pci_dev(dev);
669 struct drm_device *drm_dev = pci_get_drvdata(pdev);
670 int ret;
671
5addcf0a
DA
672 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
673 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
674 return 0;
675
676 pci_set_power_state(pdev, PCI_D0);
677 pci_restore_state(pdev);
678 ret = pci_enable_device(pdev);
679 if (ret)
680 return ret;
681 pci_set_master(pdev);
682
6fbb702e 683 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
684}
685
7bb6d442
BS
686static int
687nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
688{
689 struct pci_dev *pdev = to_pci_dev(dev);
690 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 691 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
692}
693
7bb6d442
BS
694static int
695nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
696{
697 struct pci_dev *pdev = to_pci_dev(dev);
698 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 699 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
700}
701
7bb6d442
BS
702static int
703nouveau_pmops_runtime_suspend(struct device *dev)
704{
705 struct pci_dev *pdev = to_pci_dev(dev);
706 struct drm_device *drm_dev = pci_get_drvdata(pdev);
707 int ret;
708
709 if (nouveau_runtime_pm == 0) {
710 pm_runtime_forbid(dev);
711 return -EBUSY;
712 }
713
714 /* are we optimus enabled? */
715 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
716 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
717 pm_runtime_forbid(dev);
718 return -EBUSY;
719 }
720
7bb6d442
BS
721 drm_kms_helper_poll_disable(drm_dev);
722 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
723 nouveau_switcheroo_optimus_dsm();
724 ret = nouveau_do_suspend(drm_dev, true);
725 pci_save_state(pdev);
726 pci_disable_device(pdev);
8c863944 727 pci_ignore_hotplug(pdev);
7bb6d442
BS
728 pci_set_power_state(pdev, PCI_D3cold);
729 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
730 return ret;
731}
732
733static int
734nouveau_pmops_runtime_resume(struct device *dev)
735{
736 struct pci_dev *pdev = to_pci_dev(dev);
737 struct drm_device *drm_dev = pci_get_drvdata(pdev);
738 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
739 int ret;
740
741 if (nouveau_runtime_pm == 0)
742 return -EINVAL;
743
744 pci_set_power_state(pdev, PCI_D0);
745 pci_restore_state(pdev);
746 ret = pci_enable_device(pdev);
747 if (ret)
748 return ret;
749 pci_set_master(pdev);
750
751 ret = nouveau_do_resume(drm_dev, true);
752 drm_kms_helper_poll_enable(drm_dev);
753 /* do magic */
a01ca78c 754 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
755 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
756 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
7bb6d442
BS
757 return ret;
758}
759
760static int
761nouveau_pmops_runtime_idle(struct device *dev)
762{
763 struct pci_dev *pdev = to_pci_dev(dev);
764 struct drm_device *drm_dev = pci_get_drvdata(pdev);
765 struct nouveau_drm *drm = nouveau_drm(drm_dev);
766 struct drm_crtc *crtc;
767
768 if (nouveau_runtime_pm == 0) {
769 pm_runtime_forbid(dev);
770 return -EBUSY;
771 }
772
773 /* are we optimus enabled? */
774 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
775 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
776 pm_runtime_forbid(dev);
777 return -EBUSY;
778 }
779
780 /* if we have a hdmi audio device - make sure it has a driver loaded */
781 if (drm->hdmi_device) {
782 if (!drm->hdmi_device->driver) {
783 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
784 pm_runtime_mark_last_busy(dev);
785 return -EBUSY;
786 }
787 }
788
789 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
790 if (crtc->enabled) {
791 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
792 return -EBUSY;
793 }
794 }
795 pm_runtime_mark_last_busy(dev);
796 pm_runtime_autosuspend(dev);
797 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
798 return 1;
799}
2d8b9ccb 800
5b8a43ae 801static int
ebb945a9
BS
802nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
803{
ebb945a9
BS
804 struct nouveau_drm *drm = nouveau_drm(dev);
805 struct nouveau_cli *cli;
a2896ced 806 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
807 int ret;
808
5addcf0a
DA
809 /* need to bring up power immediately if opening device */
810 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 811 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
812 return ret;
813
a2896ced
MS
814 get_task_comm(tmpname, current);
815 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 816
9ad97ede 817 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
420b9469 818
ebb945a9 819 if (ret)
5addcf0a 820 goto out_suspend;
ebb945a9 821
0ad72863
BS
822 cli->base.super = false;
823
967e7bde 824 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 825 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 826 0x1000, NULL, &cli->vm);
ebb945a9
BS
827 if (ret) {
828 nouveau_cli_destroy(cli);
5addcf0a 829 goto out_suspend;
ebb945a9 830 }
3ee6f5b5 831
989aa5b7 832 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
833 }
834
835 fpriv->driver_priv = cli;
836
837 mutex_lock(&drm->client.mutex);
838 list_add(&cli->head, &drm->clients);
839 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
840
841out_suspend:
842 pm_runtime_mark_last_busy(dev->dev);
843 pm_runtime_put_autosuspend(dev->dev);
844
845 return ret;
ebb945a9
BS
846}
847
5b8a43ae 848static void
ebb945a9
BS
849nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
850{
851 struct nouveau_cli *cli = nouveau_cli(fpriv);
852 struct nouveau_drm *drm = nouveau_drm(dev);
853
5addcf0a
DA
854 pm_runtime_get_sync(dev->dev);
855
ac8c7930 856 mutex_lock(&cli->mutex);
ebb945a9
BS
857 if (cli->abi16)
858 nouveau_abi16_fini(cli->abi16);
ac8c7930 859 mutex_unlock(&cli->mutex);
ebb945a9
BS
860
861 mutex_lock(&drm->client.mutex);
862 list_del(&cli->head);
863 mutex_unlock(&drm->client.mutex);
5addcf0a 864
ebb945a9
BS
865}
866
5b8a43ae 867static void
ebb945a9
BS
868nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
869{
870 struct nouveau_cli *cli = nouveau_cli(fpriv);
871 nouveau_cli_destroy(cli);
5addcf0a
DA
872 pm_runtime_mark_last_busy(dev->dev);
873 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
874}
875
baa70943 876static const struct drm_ioctl_desc
77145f1c 877nouveau_ioctls[] = {
f8c47144
DV
878 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
879 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
883 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
884 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
885 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
886 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
887 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
890};
891
27111a23
BS
892long
893nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 894{
27111a23
BS
895 struct drm_file *filp = file->private_data;
896 struct drm_device *dev = filp->minor->dev;
5addcf0a 897 long ret;
5addcf0a
DA
898
899 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 900 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
901 return ret;
902
27111a23
BS
903 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
904 case DRM_NOUVEAU_NVIF:
905 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
906 break;
907 default:
908 ret = drm_ioctl(file, cmd, arg);
909 break;
910 }
5addcf0a
DA
911
912 pm_runtime_mark_last_busy(dev->dev);
913 pm_runtime_put_autosuspend(dev->dev);
914 return ret;
915}
27111a23 916
77145f1c
BS
917static const struct file_operations
918nouveau_driver_fops = {
919 .owner = THIS_MODULE,
920 .open = drm_open,
921 .release = drm_release,
5addcf0a 922 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
923 .mmap = nouveau_ttm_mmap,
924 .poll = drm_poll,
77145f1c
BS
925 .read = drm_read,
926#if defined(CONFIG_COMPAT)
927 .compat_ioctl = nouveau_compat_ioctl,
928#endif
929 .llseek = noop_llseek,
930};
931
932static struct drm_driver
915b4d11 933driver_stub = {
77145f1c 934 .driver_features =
0e975980
PA
935 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
936 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
937
938 .load = nouveau_drm_load,
939 .unload = nouveau_drm_unload,
940 .open = nouveau_drm_open,
941 .preclose = nouveau_drm_preclose,
942 .postclose = nouveau_drm_postclose,
943 .lastclose = nouveau_vga_lastclose,
944
33b903e8 945#if defined(CONFIG_DEBUG_FS)
56c101af
KH
946 .debugfs_init = nouveau_drm_debugfs_init,
947 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
33b903e8
MS
948#endif
949
b44f8408 950 .get_vblank_counter = drm_vblank_no_hw_counter,
51cb4b39
BS
951 .enable_vblank = nouveau_display_vblank_enable,
952 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
953 .get_scanout_position = nouveau_display_scanoutpos,
954 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
955
956 .ioctls = nouveau_ioctls,
baa70943 957 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
958 .fops = &nouveau_driver_fops,
959
960 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
961 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
962 .gem_prime_export = drm_gem_prime_export,
963 .gem_prime_import = drm_gem_prime_import,
964 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 965 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 966 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
967 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
968 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
969 .gem_prime_vmap = nouveau_gem_prime_vmap,
970 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 971
77145f1c
BS
972 .gem_free_object = nouveau_gem_object_del,
973 .gem_open_object = nouveau_gem_object_open,
974 .gem_close_object = nouveau_gem_object_close,
975
976 .dumb_create = nouveau_display_dumb_create,
977 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 978 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
979
980 .name = DRIVER_NAME,
981 .desc = DRIVER_DESC,
982#ifdef GIT_REVISION
983 .date = GIT_REVISION,
984#else
985 .date = DRIVER_DATE,
986#endif
987 .major = DRIVER_MAJOR,
988 .minor = DRIVER_MINOR,
989 .patchlevel = DRIVER_PATCHLEVEL,
990};
991
94580299
BS
992static struct pci_device_id
993nouveau_drm_pci_table[] = {
994 {
995 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
996 .class = PCI_BASE_CLASS_DISPLAY << 16,
997 .class_mask = 0xff << 16,
998 },
999 {
1000 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1001 .class = PCI_BASE_CLASS_DISPLAY << 16,
1002 .class_mask = 0xff << 16,
1003 },
1004 {}
1005};
1006
703fa264
PM
1007static void nouveau_display_options(void)
1008{
1009 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1010
1011 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1012 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1013 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1014 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1015 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1016 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1017 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1018 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1019 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1020 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
703fa264
PM
1021}
1022
2d8b9ccb
DA
1023static const struct dev_pm_ops nouveau_pm_ops = {
1024 .suspend = nouveau_pmops_suspend,
1025 .resume = nouveau_pmops_resume,
1026 .freeze = nouveau_pmops_freeze,
1027 .thaw = nouveau_pmops_thaw,
1028 .poweroff = nouveau_pmops_freeze,
1029 .restore = nouveau_pmops_resume,
5addcf0a
DA
1030 .runtime_suspend = nouveau_pmops_runtime_suspend,
1031 .runtime_resume = nouveau_pmops_runtime_resume,
1032 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1033};
1034
94580299
BS
1035static struct pci_driver
1036nouveau_drm_pci_driver = {
1037 .name = "nouveau",
1038 .id_table = nouveau_drm_pci_table,
1039 .probe = nouveau_drm_probe,
1040 .remove = nouveau_drm_remove,
2d8b9ccb 1041 .driver.pm = &nouveau_pm_ops,
94580299
BS
1042};
1043
8ba9ff11 1044struct drm_device *
e396ecd1
AC
1045nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1046 struct platform_device *pdev,
47b2505e 1047 struct nvkm_device **pdevice)
420b9469 1048{
8ba9ff11
AC
1049 struct drm_device *drm;
1050 int err;
420b9469 1051
e396ecd1 1052 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1053 true, true, ~0ULL, pdevice);
8ba9ff11 1054 if (err)
e781dc8f 1055 goto err_free;
8ba9ff11 1056
915b4d11 1057 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1058 if (!drm) {
1059 err = -ENOMEM;
1060 goto err_free;
420b9469
AC
1061 }
1062
8ba9ff11
AC
1063 drm->platformdev = pdev;
1064 platform_set_drvdata(pdev, drm);
1065
1066 return drm;
1067
1068err_free:
e781dc8f 1069 nvkm_device_del(pdevice);
8ba9ff11
AC
1070
1071 return ERR_PTR(err);
420b9469
AC
1072}
1073
94580299
BS
1074static int __init
1075nouveau_drm_init(void)
1076{
915b4d11
DH
1077 driver_pci = driver_stub;
1078 driver_pci.set_busid = drm_pci_set_busid;
1079 driver_platform = driver_stub;
1080 driver_platform.set_busid = drm_platform_set_busid;
1081
703fa264
PM
1082 nouveau_display_options();
1083
77145f1c
BS
1084 if (nouveau_modeset == -1) {
1085#ifdef CONFIG_VGA_CONSOLE
1086 if (vgacon_text_force())
1087 nouveau_modeset = 0;
77145f1c 1088#endif
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1089 }
1090
1091 if (!nouveau_modeset)
1092 return 0;
1093
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1094#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1095 platform_driver_register(&nouveau_platform_driver);
1096#endif
1097
77145f1c 1098 nouveau_register_dsm_handler();
915b4d11 1099 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
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1100}
1101
1102static void __exit
1103nouveau_drm_exit(void)
1104{
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1105 if (!nouveau_modeset)
1106 return;
1107
915b4d11 1108 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1109 nouveau_unregister_dsm_handler();
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1110
1111#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1112 platform_driver_unregister(&nouveau_platform_driver);
1113#endif
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1114}
1115
1116module_init(nouveau_drm_init);
1117module_exit(nouveau_drm_exit);
1118
1119MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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1120MODULE_AUTHOR(DRIVER_AUTHOR);
1121MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1122MODULE_LICENSE("GPL and additional rights");
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