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dc5698e8 DA |
1 | /* |
2 | * Copyright (C) 2015 Red Hat, Inc. | |
3 | * All Rights Reserved. | |
4 | * | |
5 | * Authors: | |
6 | * Dave Airlie | |
7 | * Alon Levy | |
8 | * | |
9 | * Permission is hereby granted, free of charge, to any person obtaining a | |
10 | * copy of this software and associated documentation files (the "Software"), | |
11 | * to deal in the Software without restriction, including without limitation | |
12 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
13 | * and/or sell copies of the Software, and to permit persons to whom the | |
14 | * Software is furnished to do so, subject to the following conditions: | |
15 | * | |
16 | * The above copyright notice and this permission notice shall be included in | |
17 | * all copies or substantial portions of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
22 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
23 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
24 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
25 | * OTHER DEALINGS IN THE SOFTWARE. | |
26 | */ | |
27 | ||
28 | #include "virtgpu_drv.h" | |
29 | #include <drm/drm_crtc_helper.h> | |
30 | #include <drm/drm_atomic_helper.h> | |
31 | ||
bbbed888 GH |
32 | #define XRES_MIN 32 |
33 | #define YRES_MIN 32 | |
dc5698e8 DA |
34 | |
35 | #define XRES_DEF 1024 | |
36 | #define YRES_DEF 768 | |
37 | ||
38 | #define XRES_MAX 8192 | |
39 | #define YRES_MAX 8192 | |
40 | ||
dc5698e8 | 41 | static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = { |
dc5698e8 DA |
42 | .set_config = drm_atomic_helper_set_config, |
43 | .destroy = drm_crtc_cleanup, | |
44 | ||
0d841ac0 | 45 | .page_flip = drm_atomic_helper_page_flip, |
dc5698e8 DA |
46 | .reset = drm_atomic_helper_crtc_reset, |
47 | .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, | |
48 | .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, | |
49 | }; | |
50 | ||
51 | static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb) | |
52 | { | |
53 | struct virtio_gpu_framebuffer *virtio_gpu_fb | |
54 | = to_virtio_gpu_framebuffer(fb); | |
55 | ||
5345a5ab | 56 | drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj); |
dc5698e8 DA |
57 | drm_framebuffer_cleanup(fb); |
58 | kfree(virtio_gpu_fb); | |
59 | } | |
60 | ||
61 | static int | |
62 | virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb, | |
63 | struct drm_file *file_priv, | |
64 | unsigned flags, unsigned color, | |
65 | struct drm_clip_rect *clips, | |
66 | unsigned num_clips) | |
67 | { | |
68 | struct virtio_gpu_framebuffer *virtio_gpu_fb | |
69 | = to_virtio_gpu_framebuffer(fb); | |
70 | ||
71 | return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips); | |
72 | } | |
73 | ||
74 | static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = { | |
75 | .destroy = virtio_gpu_user_framebuffer_destroy, | |
76 | .dirty = virtio_gpu_framebuffer_surface_dirty, | |
77 | }; | |
78 | ||
79 | int | |
80 | virtio_gpu_framebuffer_init(struct drm_device *dev, | |
81 | struct virtio_gpu_framebuffer *vgfb, | |
1eb83451 | 82 | const struct drm_mode_fb_cmd2 *mode_cmd, |
dc5698e8 DA |
83 | struct drm_gem_object *obj) |
84 | { | |
85 | int ret; | |
86 | struct virtio_gpu_object *bo; | |
87 | vgfb->obj = obj; | |
88 | ||
89 | bo = gem_to_virtio_gpu_obj(obj); | |
90 | ||
91 | ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs); | |
92 | if (ret) { | |
93 | vgfb->obj = NULL; | |
94 | return ret; | |
95 | } | |
96 | drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd); | |
97 | ||
98 | spin_lock_init(&vgfb->dirty_lock); | |
99 | vgfb->x1 = vgfb->y1 = INT_MAX; | |
100 | vgfb->x2 = vgfb->y2 = 0; | |
101 | return 0; | |
102 | } | |
103 | ||
dc5698e8 DA |
104 | static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc) |
105 | { | |
106 | struct drm_device *dev = crtc->dev; | |
107 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
108 | struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); | |
109 | ||
110 | virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, | |
111 | crtc->mode.hdisplay, | |
112 | crtc->mode.vdisplay, 0, 0); | |
113 | } | |
114 | ||
115 | static void virtio_gpu_crtc_enable(struct drm_crtc *crtc) | |
116 | { | |
117 | } | |
118 | ||
119 | static void virtio_gpu_crtc_disable(struct drm_crtc *crtc) | |
120 | { | |
121 | struct drm_device *dev = crtc->dev; | |
122 | struct virtio_gpu_device *vgdev = dev->dev_private; | |
123 | struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc); | |
124 | ||
125 | virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0); | |
126 | } | |
127 | ||
128 | static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, | |
129 | struct drm_crtc_state *state) | |
130 | { | |
131 | return 0; | |
132 | } | |
133 | ||
9a11d2e7 GP |
134 | static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc, |
135 | struct drm_crtc_state *old_state) | |
136 | { | |
137 | unsigned long flags; | |
138 | ||
139 | spin_lock_irqsave(&crtc->dev->event_lock, flags); | |
140 | if (crtc->state->event) | |
141 | drm_crtc_send_vblank_event(crtc, crtc->state->event); | |
0d841ac0 | 142 | crtc->state->event = NULL; |
9a11d2e7 GP |
143 | spin_unlock_irqrestore(&crtc->dev->event_lock, flags); |
144 | } | |
145 | ||
dc5698e8 DA |
146 | static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = { |
147 | .enable = virtio_gpu_crtc_enable, | |
148 | .disable = virtio_gpu_crtc_disable, | |
dc5698e8 DA |
149 | .mode_set_nofb = virtio_gpu_crtc_mode_set_nofb, |
150 | .atomic_check = virtio_gpu_crtc_atomic_check, | |
9a11d2e7 | 151 | .atomic_flush = virtio_gpu_crtc_atomic_flush, |
dc5698e8 DA |
152 | }; |
153 | ||
dc5698e8 DA |
154 | static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder, |
155 | struct drm_display_mode *mode, | |
156 | struct drm_display_mode *adjusted_mode) | |
157 | { | |
158 | } | |
159 | ||
160 | static void virtio_gpu_enc_enable(struct drm_encoder *encoder) | |
161 | { | |
162 | } | |
163 | ||
164 | static void virtio_gpu_enc_disable(struct drm_encoder *encoder) | |
165 | { | |
166 | } | |
167 | ||
168 | static int virtio_gpu_conn_get_modes(struct drm_connector *connector) | |
169 | { | |
170 | struct virtio_gpu_output *output = | |
171 | drm_connector_to_virtio_gpu_output(connector); | |
172 | struct drm_display_mode *mode = NULL; | |
173 | int count, width, height; | |
174 | ||
175 | width = le32_to_cpu(output->info.r.width); | |
176 | height = le32_to_cpu(output->info.r.height); | |
177 | count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX); | |
178 | ||
179 | if (width == 0 || height == 0) { | |
180 | width = XRES_DEF; | |
181 | height = YRES_DEF; | |
182 | drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF); | |
183 | } else { | |
184 | DRM_DEBUG("add mode: %dx%d\n", width, height); | |
185 | mode = drm_cvt_mode(connector->dev, width, height, 60, | |
186 | false, false, false); | |
187 | mode->type |= DRM_MODE_TYPE_PREFERRED; | |
188 | drm_mode_probed_add(connector, mode); | |
189 | count++; | |
190 | } | |
191 | ||
192 | return count; | |
193 | } | |
194 | ||
195 | static int virtio_gpu_conn_mode_valid(struct drm_connector *connector, | |
196 | struct drm_display_mode *mode) | |
197 | { | |
198 | struct virtio_gpu_output *output = | |
199 | drm_connector_to_virtio_gpu_output(connector); | |
200 | int width, height; | |
201 | ||
202 | width = le32_to_cpu(output->info.r.width); | |
203 | height = le32_to_cpu(output->info.r.height); | |
204 | ||
205 | if (!(mode->type & DRM_MODE_TYPE_PREFERRED)) | |
206 | return MODE_OK; | |
207 | if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) | |
208 | return MODE_OK; | |
209 | if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && | |
210 | mode->vdisplay <= height && mode->vdisplay >= height - 16) | |
211 | return MODE_OK; | |
212 | ||
213 | DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); | |
214 | return MODE_BAD; | |
215 | } | |
216 | ||
dc5698e8 | 217 | static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = { |
dc5698e8 DA |
218 | .mode_set = virtio_gpu_enc_mode_set, |
219 | .enable = virtio_gpu_enc_enable, | |
220 | .disable = virtio_gpu_enc_disable, | |
221 | }; | |
222 | ||
223 | static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = { | |
224 | .get_modes = virtio_gpu_conn_get_modes, | |
225 | .mode_valid = virtio_gpu_conn_mode_valid, | |
dc5698e8 DA |
226 | }; |
227 | ||
dc5698e8 DA |
228 | static enum drm_connector_status virtio_gpu_conn_detect( |
229 | struct drm_connector *connector, | |
230 | bool force) | |
231 | { | |
232 | struct virtio_gpu_output *output = | |
233 | drm_connector_to_virtio_gpu_output(connector); | |
234 | ||
235 | if (output->info.enabled) | |
236 | return connector_status_connected; | |
237 | else | |
238 | return connector_status_disconnected; | |
239 | } | |
240 | ||
241 | static void virtio_gpu_conn_destroy(struct drm_connector *connector) | |
242 | { | |
243 | struct virtio_gpu_output *virtio_gpu_output = | |
244 | drm_connector_to_virtio_gpu_output(connector); | |
245 | ||
246 | drm_connector_unregister(connector); | |
247 | drm_connector_cleanup(connector); | |
248 | kfree(virtio_gpu_output); | |
249 | } | |
250 | ||
251 | static const struct drm_connector_funcs virtio_gpu_connector_funcs = { | |
252 | .dpms = drm_atomic_helper_connector_dpms, | |
dc5698e8 | 253 | .detect = virtio_gpu_conn_detect, |
6af3e656 | 254 | .fill_modes = drm_helper_probe_single_connector_modes, |
dc5698e8 DA |
255 | .destroy = virtio_gpu_conn_destroy, |
256 | .reset = drm_atomic_helper_connector_reset, | |
257 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, | |
258 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | |
259 | }; | |
260 | ||
261 | static const struct drm_encoder_funcs virtio_gpu_enc_funcs = { | |
262 | .destroy = drm_encoder_cleanup, | |
263 | }; | |
264 | ||
265 | static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index) | |
266 | { | |
267 | struct drm_device *dev = vgdev->ddev; | |
268 | struct virtio_gpu_output *output = vgdev->outputs + index; | |
269 | struct drm_connector *connector = &output->conn; | |
270 | struct drm_encoder *encoder = &output->enc; | |
271 | struct drm_crtc *crtc = &output->crtc; | |
bbbed888 | 272 | struct drm_plane *primary, *cursor; |
dc5698e8 DA |
273 | |
274 | output->index = index; | |
275 | if (index == 0) { | |
276 | output->info.enabled = cpu_to_le32(true); | |
277 | output->info.r.width = cpu_to_le32(XRES_DEF); | |
278 | output->info.r.height = cpu_to_le32(YRES_DEF); | |
279 | } | |
280 | ||
bbbed888 GH |
281 | primary = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_PRIMARY, index); |
282 | if (IS_ERR(primary)) | |
283 | return PTR_ERR(primary); | |
284 | cursor = virtio_gpu_plane_init(vgdev, DRM_PLANE_TYPE_CURSOR, index); | |
285 | if (IS_ERR(cursor)) | |
286 | return PTR_ERR(cursor); | |
287 | drm_crtc_init_with_planes(dev, crtc, primary, cursor, | |
f9882876 | 288 | &virtio_gpu_crtc_funcs, NULL); |
dc5698e8 | 289 | drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs); |
bbbed888 GH |
290 | primary->crtc = crtc; |
291 | cursor->crtc = crtc; | |
dc5698e8 DA |
292 | |
293 | drm_connector_init(dev, connector, &virtio_gpu_connector_funcs, | |
294 | DRM_MODE_CONNECTOR_VIRTUAL); | |
295 | drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs); | |
296 | ||
297 | drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs, | |
13a3d91f | 298 | DRM_MODE_ENCODER_VIRTUAL, NULL); |
dc5698e8 DA |
299 | drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs); |
300 | encoder->possible_crtcs = 1 << index; | |
301 | ||
302 | drm_mode_connector_attach_encoder(connector, encoder); | |
303 | drm_connector_register(connector); | |
304 | return 0; | |
305 | } | |
306 | ||
307 | static struct drm_framebuffer * | |
308 | virtio_gpu_user_framebuffer_create(struct drm_device *dev, | |
309 | struct drm_file *file_priv, | |
1eb83451 | 310 | const struct drm_mode_fb_cmd2 *mode_cmd) |
dc5698e8 DA |
311 | { |
312 | struct drm_gem_object *obj = NULL; | |
313 | struct virtio_gpu_framebuffer *virtio_gpu_fb; | |
314 | int ret; | |
315 | ||
316 | /* lookup object associated with res handle */ | |
a8ad0bd8 | 317 | obj = drm_gem_object_lookup(file_priv, mode_cmd->handles[0]); |
dc5698e8 DA |
318 | if (!obj) |
319 | return ERR_PTR(-EINVAL); | |
320 | ||
321 | virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL); | |
322 | if (virtio_gpu_fb == NULL) | |
323 | return ERR_PTR(-ENOMEM); | |
324 | ||
325 | ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj); | |
326 | if (ret) { | |
327 | kfree(virtio_gpu_fb); | |
5345a5ab | 328 | drm_gem_object_unreference_unlocked(obj); |
dc5698e8 DA |
329 | return NULL; |
330 | } | |
331 | ||
332 | return &virtio_gpu_fb->base; | |
333 | } | |
334 | ||
0d841ac0 | 335 | static void vgdev_atomic_commit_tail(struct drm_atomic_state *state) |
e7cf0963 | 336 | { |
0d841ac0 | 337 | struct drm_device *dev = state->dev; |
e7cf0963 GH |
338 | |
339 | drm_atomic_helper_commit_modeset_disables(dev, state); | |
340 | drm_atomic_helper_commit_modeset_enables(dev, state); | |
2b58e98d LY |
341 | drm_atomic_helper_commit_planes(dev, state, |
342 | DRM_PLANE_COMMIT_ACTIVE_ONLY); | |
e7cf0963 | 343 | |
0d841ac0 DV |
344 | drm_atomic_helper_commit_hw_done(state); |
345 | ||
e7cf0963 GH |
346 | drm_atomic_helper_wait_for_vblanks(dev, state); |
347 | drm_atomic_helper_cleanup_planes(dev, state); | |
e7cf0963 GH |
348 | } |
349 | ||
a9853117 | 350 | static struct drm_mode_config_helper_funcs virtio_mode_config_helpers = { |
0d841ac0 DV |
351 | .atomic_commit_tail = vgdev_atomic_commit_tail, |
352 | }; | |
353 | ||
dc5698e8 DA |
354 | static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = { |
355 | .fb_create = virtio_gpu_user_framebuffer_create, | |
356 | .atomic_check = drm_atomic_helper_check, | |
0d841ac0 | 357 | .atomic_commit = drm_atomic_helper_commit, |
dc5698e8 DA |
358 | }; |
359 | ||
360 | int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev) | |
361 | { | |
362 | int i; | |
363 | ||
364 | drm_mode_config_init(vgdev->ddev); | |
0d841ac0 DV |
365 | vgdev->ddev->mode_config.funcs = &virtio_gpu_mode_funcs; |
366 | vgdev->ddev->mode_config.helper_private = &virtio_mode_config_helpers; | |
dc5698e8 DA |
367 | |
368 | /* modes will be validated against the framebuffer size */ | |
369 | vgdev->ddev->mode_config.min_width = XRES_MIN; | |
370 | vgdev->ddev->mode_config.min_height = YRES_MIN; | |
371 | vgdev->ddev->mode_config.max_width = XRES_MAX; | |
372 | vgdev->ddev->mode_config.max_height = YRES_MAX; | |
373 | ||
374 | for (i = 0 ; i < vgdev->num_scanouts; ++i) | |
375 | vgdev_output_init(vgdev, i); | |
376 | ||
377 | drm_mode_config_reset(vgdev->ddev); | |
378 | return 0; | |
379 | } | |
380 | ||
381 | void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev) | |
382 | { | |
383 | virtio_gpu_fbdev_fini(vgdev); | |
384 | drm_mode_config_cleanup(vgdev->ddev); | |
385 | } |