[deliverable/linux.git] / drivers / infiniband / hw / cxgb3 / iwch_mem.c

/*
 * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#include <asm/byteorder.h>

#include <rdma/iw_cm.h>
#include <rdma/ib_verbs.h>

#include "cxio_hal.h"
#include "cxio_resource.h"
#include "iwch.h"
#include "iwch_provider.h"

static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
{
	u32 mmid;

	mhp->attr.state = 1;
	mhp->attr.stag = stag;
	mmid = stag >> 8;
	mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
	PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
	return insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
}

int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
		      struct iwch_mr *mhp, int shift)
{
	u32 stag;
	int ret;

	if (cxio_register_phys_mem(&rhp->rdev,
				   &stag, mhp->attr.pdid,
				   mhp->attr.perms,
				   mhp->attr.zbva,
				   mhp->attr.va_fbo,
				   mhp->attr.len,
				   shift - 12,
				   mhp->attr.pbl_size, mhp->attr.pbl_addr))
		return -ENOMEM;

	ret = iwch_finish_mem_reg(mhp, stag);
	if (ret)
		cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
		       mhp->attr.pbl_addr);
	return ret;
}

int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
					struct iwch_mr *mhp,
					int shift,
					int npages)
{
	u32 stag;
	int ret;

	/* We could support this... */
	if (npages > mhp->attr.pbl_size)
		return -ENOMEM;

	stag = mhp->attr.stag;
	if (cxio_reregister_phys_mem(&rhp->rdev,
				   &stag, mhp->attr.pdid,
				   mhp->attr.perms,
				   mhp->attr.zbva,
				   mhp->attr.va_fbo,
				   mhp->attr.len,
				   shift - 12,
				   mhp->attr.pbl_size, mhp->attr.pbl_addr))
		return -ENOMEM;

	ret = iwch_finish_mem_reg(mhp, stag);
	if (ret)
		cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
		       mhp->attr.pbl_addr);

	return ret;
}

int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
{
	mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
						    npages << 3);

	if (!mhp->attr.pbl_addr)
		return -ENOMEM;

	mhp->attr.pbl_size = npages;

	return 0;
}

void iwch_free_pbl(struct iwch_mr *mhp)
{
	cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
			      mhp->attr.pbl_size << 3);
}

int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
{
	return cxio_write_pbl(&mhp->rhp->rdev, pages,
			      mhp->attr.pbl_addr + (offset << 3), npages);
}

int build_phys_page_list(struct ib_phys_buf *buffer_list,
					int num_phys_buf,
					u64 *iova_start,
					u64 *total_size,
					int *npages,
					int *shift,
					__be64 **page_list)
{
	u64 mask;
	int i, j, n;

	mask = 0;
	*total_size = 0;
	for (i = 0; i < num_phys_buf; ++i) {
		if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
			return -EINVAL;
		if (i != 0 && i != num_phys_buf - 1 &&
		    (buffer_list[i].size & ~PAGE_MASK))
			return -EINVAL;
		*total_size += buffer_list[i].size;
		if (i > 0)
			mask |= buffer_list[i].addr;
		else
			mask |= buffer_list[i].addr & PAGE_MASK;
		if (i != num_phys_buf - 1)
			mask |= buffer_list[i].addr + buffer_list[i].size;
		else
			mask |= (buffer_list[i].addr + buffer_list[i].size +
				PAGE_SIZE - 1) & PAGE_MASK;
	}

	if (*total_size > 0xFFFFFFFFULL)
		return -ENOMEM;

	/* Find largest page shift we can use to cover buffers */
	for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
		if ((1ULL << *shift) & mask)
			break;

	buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
	buffer_list[0].addr &= ~0ull << *shift;

	*npages = 0;
	for (i = 0; i < num_phys_buf; ++i)
		*npages += (buffer_list[i].size +
			(1ULL << *shift) - 1) >> *shift;

	if (!*npages)
		return -EINVAL;

	*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);
	if (!*page_list)
		return -ENOMEM;

	n = 0;
	for (i = 0; i < num_phys_buf; ++i)
		for (j = 0;
		     j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
		     ++j)
			(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
			    ((u64) j << *shift));

	PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
	     __func__, (unsigned long long) *iova_start,
	     (unsigned long long) mask, *shift, (unsigned long long) *total_size,
	     *npages);

	return 0;

}
Commit	Line	Data
b038ced7 SW	1	/*
b038ced7 SW	2	* Copyright (c) 2006 Chelsio, Inc. All rights reserved.
b038ced7 SW	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32	#include <asm/byteorder.h>
	33
	34	#include <rdma/iw_cm.h>
	35	#include <rdma/ib_verbs.h>
	36
	37	#include "cxio_hal.h"
273748cc	38	#include "cxio_resource.h"
b038ced7 SW	39	#include "iwch.h"
	40	#include "iwch_provider.h"
	41
13a23933	42	static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
b038ced7	43	{
b038ced7 SW	44	u32 mmid;
b038ced7 SW	45
273748cc RD	46	mhp->attr.state = 1;
	47	mhp->attr.stag = stag;
	48	mmid = stag >> 8;
	49	mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
273748cc	50	PDBG("%s mmid 0x%x mhp %p\n", __func__, mmid, mhp);
13a23933	51	return insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
273748cc RD	52	}
	53
	54	int iwch_register_mem(struct iwch_dev rhp, struct iwch_pd php,
	55	struct iwch_mr *mhp, int shift)
	56	{
	57	u32 stag;
13a23933	58	int ret;
b038ced7 SW	59
	60	if (cxio_register_phys_mem(&rhp->rdev,
	61	&stag, mhp->attr.pdid,
	62	mhp->attr.perms,
	63	mhp->attr.zbva,
	64	mhp->attr.va_fbo,
	65	mhp->attr.len,
273748cc RD	66	shift - 12,
273748cc RD	67	mhp->attr.pbl_size, mhp->attr.pbl_addr))
b038ced7	68	return -ENOMEM;
273748cc	69
13a23933 SW	70	ret = iwch_finish_mem_reg(mhp, stag);
	71	if (ret)
	72	cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
	73	mhp->attr.pbl_addr);
	74	return ret;
b038ced7 SW	75	}
	76
	77	int iwch_reregister_mem(struct iwch_dev rhp, struct iwch_pd php,
	78	struct iwch_mr *mhp,
	79	int shift,
b038ced7 SW	80	int npages)
	81	{
	82	u32 stag;
13a23933	83	int ret;
b038ced7 SW	84
	85	/* We could support this... */
	86	if (npages > mhp->attr.pbl_size)
	87	return -ENOMEM;
	88
	89	stag = mhp->attr.stag;
	90	if (cxio_reregister_phys_mem(&rhp->rdev,
	91	&stag, mhp->attr.pdid,
	92	mhp->attr.perms,
	93	mhp->attr.zbva,
	94	mhp->attr.va_fbo,
	95	mhp->attr.len,
273748cc RD	96	shift - 12,
273748cc RD	97	mhp->attr.pbl_size, mhp->attr.pbl_addr))
b038ced7	98	return -ENOMEM;
273748cc	99
13a23933 SW	100	ret = iwch_finish_mem_reg(mhp, stag);
	101	if (ret)
	102	cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
	103	mhp->attr.pbl_addr);
273748cc	104
13a23933	105	return ret;
273748cc RD	106	}
	107
	108	int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
	109	{
	110	mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
	111	npages << 3);
	112
	113	if (!mhp->attr.pbl_addr)
	114	return -ENOMEM;
	115
	116	mhp->attr.pbl_size = npages;
	117
b038ced7 SW	118	return 0;
	119	}
	120
273748cc RD	121	void iwch_free_pbl(struct iwch_mr *mhp)
	122	{
	123	cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
	124	mhp->attr.pbl_size << 3);
	125	}
	126
	127	int iwch_write_pbl(struct iwch_mr mhp, __be64 pages, int npages, int offset)
	128	{
	129	return cxio_write_pbl(&mhp->rhp->rdev, pages,
	130	mhp->attr.pbl_addr + (offset << 3), npages);
	131	}
	132
b038ced7 SW	133	int build_phys_page_list(struct ib_phys_buf *buffer_list,
	134	int num_phys_buf,
	135	u64 *iova_start,
	136	u64 *total_size,
	137	int *npages,
	138	int *shift,
	139	__be64 **page_list)
	140	{
	141	u64 mask;
	142	int i, j, n;
	143
	144	mask = 0;
	145	*total_size = 0;
	146	for (i = 0; i < num_phys_buf; ++i) {
	147	if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
	148	return -EINVAL;
	149	if (i != 0 && i != num_phys_buf - 1 &&
	150	(buffer_list[i].size & ~PAGE_MASK))
	151	return -EINVAL;
	152	*total_size += buffer_list[i].size;
	153	if (i > 0)
	154	mask \|= buffer_list[i].addr;
d08ca26c SW	155	else
	156	mask \|= buffer_list[i].addr & PAGE_MASK;
	157	if (i != num_phys_buf - 1)
	158	mask \|= buffer_list[i].addr + buffer_list[i].size;
	159	else
	160	mask \|= (buffer_list[i].addr + buffer_list[i].size +
	161	PAGE_SIZE - 1) & PAGE_MASK;
b038ced7 SW	162	}
	163
	164	if (*total_size > 0xFFFFFFFFULL)
	165	return -ENOMEM;
	166
	167	/* Find largest page shift we can use to cover buffers */
	168	for (shift = PAGE_SHIFT; shift < 27; ++(*shift))
82d416ff BR	169	if ((1ULL << *shift) & mask)
82d416ff BR	170	break;
b038ced7 SW	171
	172	buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
	173	buffer_list[0].addr &= ~0ull << *shift;
	174
	175	*npages = 0;
	176	for (i = 0; i < num_phys_buf; ++i)
	177	*npages += (buffer_list[i].size +
	178	(1ULL << shift) - 1) >> shift;
	179
	180	if (!*npages)
	181	return -EINVAL;
	182
	183	page_list = kmalloc(sizeof(u64) *npages, GFP_KERNEL);
	184	if (!*page_list)
	185	return -ENOMEM;
	186
	187	n = 0;
	188	for (i = 0; i < num_phys_buf; ++i)
	189	for (j = 0;
	190	j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
	191	++j)
	192	(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +
	193	((u64) j << *shift));
	194
	195	PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",
33718363	196	__func__, (unsigned long long) *iova_start,
b038ced7 SW	197	(unsigned long long) mask, shift, (unsigned long long) total_size,
	198	*npages);
	199
	200	return 0;
	201
	202	}