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IB/core: Add timestamp_mask and hca_core_clock to query_device
[deliverable/linux.git] / drivers / infiniband / hw / mlx5 / main.c
CommitLineData
e126ba97 1/*
6cf0a15f 2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
e126ba97
EC		 3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <asm-generic/kmap_types.h>
34#include <linux/module.h>
35#include <linux/init.h>
36#include <linux/errno.h>
37#include <linux/pci.h>
38#include <linux/dma-mapping.h>
39#include <linux/slab.h>
40#include <linux/io-mapping.h>
41#include <linux/sched.h>
42#include <rdma/ib_user_verbs.h>
43#include <rdma/ib_smi.h>
44#include <rdma/ib_umem.h>
45#include "user.h"
46#include "mlx5_ib.h"
47
48#define DRIVER_NAME "mlx5_ib"
169a1d85
AV		 49#define DRIVER_VERSION "2.2-1"
50#define DRIVER_RELDATE "Feb 2014"
e126ba97
EC		 51
52MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
53MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
54MODULE_LICENSE("Dual BSD/GPL");
55MODULE_VERSION(DRIVER_VERSION);
56
9603b61d
JM		 57static int deprecated_prof_sel = 2;
58module_param_named(prof_sel, deprecated_prof_sel, int, 0444);
59MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core");
e126ba97
EC		 60
61static char mlx5_version[] =
62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
64
e126ba97
EC		 65static int mlx5_ib_query_device(struct ib_device *ibdev,
66 struct ib_device_attr *props)
67{
68 struct mlx5_ib_dev *dev = to_mdev(ibdev);
69 struct ib_smp *in_mad = NULL;
70 struct ib_smp *out_mad = NULL;
c7a08ac7 71 struct mlx5_general_caps *gen;
e126ba97
EC		 72 int err = -ENOMEM;
73 int max_rq_sg;
74 int max_sq_sg;
75 u64 flags;
76
c7a08ac7 77 gen = &dev->mdev->caps.gen;
e126ba97
EC		 78 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
79 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
80 if (!in_mad || !out_mad)
81 goto out;
82
83 init_query_mad(in_mad);
84 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
85
86 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
87 if (err)
88 goto out;
89
90 memset(props, 0, sizeof(*props));
91
9603b61d
JM		 92 props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
93 (fw_rev_min(dev->mdev) << 16) |
94 fw_rev_sub(dev->mdev);
e126ba97
EC		 95 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
96 IB_DEVICE_PORT_ACTIVE_EVENT |
97 IB_DEVICE_SYS_IMAGE_GUID |
1a4c3a3d 98 IB_DEVICE_RC_RNR_NAK_GEN;
c7a08ac7 99 flags = gen->flags;
e126ba97
EC		 100 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
101 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
102 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
103 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
104 if (flags & MLX5_DEV_CAP_FLAG_APM)
105 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
106 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
107 if (flags & MLX5_DEV_CAP_FLAG_XRC)
108 props->device_cap_flags |= IB_DEVICE_XRC;
109 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
2dea9094
SG		 110 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
111 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
112 /* At this stage no support for signature handover */
113 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
114 IB_PROT_T10DIF_TYPE_2 |
115 IB_PROT_T10DIF_TYPE_3;
116 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
117 IB_GUARD_T10DIF_CSUM;
118 }
f360d88a
EC		 119 if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
120 props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
e126ba97
EC		 121
122 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
123 0xffffff;
124 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
125 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
126 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
127
128 props->max_mr_size = ~0ull;
c7a08ac7
EC		 129 props->page_size_cap = gen->min_page_sz;
130 props->max_qp = 1 << gen->log_max_qp;
131 props->max_qp_wr = gen->max_wqes;
132 max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
133 max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
e126ba97
EC		 134 sizeof(struct mlx5_wqe_data_seg);
135 props->max_sge = min(max_rq_sg, max_sq_sg);
c7a08ac7
EC		 136 props->max_cq = 1 << gen->log_max_cq;
137 props->max_cqe = gen->max_cqes - 1;
138 props->max_mr = 1 << gen->log_max_mkey;
139 props->max_pd = 1 << gen->log_max_pd;
140 props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp;
141 props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp;
142 props->max_srq = 1 << gen->log_max_srq;
143 props->max_srq_wr = gen->max_srq_wqes - 1;
144 props->local_ca_ack_delay = gen->local_ca_ack_delay;
e126ba97 145 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
e126ba97
EC		 146 props->max_srq_sge = max_rq_sg - 1;
147 props->max_fast_reg_page_list_len = (unsigned int)-1;
c7a08ac7 148 props->local_ca_ack_delay = gen->local_ca_ack_delay;
81bea28f
EC		 149 props->atomic_cap = IB_ATOMIC_NONE;
150 props->masked_atomic_cap = IB_ATOMIC_NONE;
e126ba97 151 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
c7a08ac7
EC		 152 props->max_mcast_grp = 1 << gen->log_max_mcg;
153 props->max_mcast_qp_attach = gen->max_qp_mcg;
e126ba97
EC		 154 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
155 props->max_mcast_grp;
156 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
157
8cdd312c
HE		 158#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
159 if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)
160 props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
161 props->odp_caps = dev->odp_caps;
162#endif
163
e126ba97
EC		 164out:
165 kfree(in_mad);
166 kfree(out_mad);
167
168 return err;
169}
170
171int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
172 struct ib_port_attr *props)
173{
174 struct mlx5_ib_dev *dev = to_mdev(ibdev);
175 struct ib_smp *in_mad = NULL;
176 struct ib_smp *out_mad = NULL;
c7a08ac7 177 struct mlx5_general_caps *gen;
e126ba97
EC		 178 int ext_active_speed;
179 int err = -ENOMEM;
180
c7a08ac7
EC		 181 gen = &dev->mdev->caps.gen;
182 if (port < 1 || port > gen->num_ports) {
e126ba97
EC		 183 mlx5_ib_warn(dev, "invalid port number %d\n", port);
184 return -EINVAL;
185 }
186
187 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
188 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
189 if (!in_mad || !out_mad)
190 goto out;
191
192 memset(props, 0, sizeof(*props));
193
194 init_query_mad(in_mad);
195 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
196 in_mad->attr_mod = cpu_to_be32(port);
197
198 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
199 if (err) {
200 mlx5_ib_warn(dev, "err %d\n", err);
201 goto out;
202 }
203
204
205 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
206 props->lmc = out_mad->data[34] & 0x7;
207 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
208 props->sm_sl = out_mad->data[36] & 0xf;
209 props->state = out_mad->data[32] & 0xf;
210 props->phys_state = out_mad->data[33] >> 4;
211 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
212 props->gid_tbl_len = out_mad->data[50];
c7a08ac7
EC		 213 props->max_msg_sz = 1 << gen->log_max_msg;
214 props->pkey_tbl_len = gen->port[port - 1].pkey_table_len;
e126ba97
EC		 215 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
216 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
217 props->active_width = out_mad->data[31] & 0xf;
218 props->active_speed = out_mad->data[35] >> 4;
219 props->max_mtu = out_mad->data[41] & 0xf;
220 props->active_mtu = out_mad->data[36] >> 4;
221 props->subnet_timeout = out_mad->data[51] & 0x1f;
222 props->max_vl_num = out_mad->data[37] >> 4;
223 props->init_type_reply = out_mad->data[41] >> 4;
224
225 /* Check if extended speeds (EDR/FDR/...) are supported */
226 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
227 ext_active_speed = out_mad->data[62] >> 4;
228
229 switch (ext_active_speed) {
230 case 1:
231 props->active_speed = 16; /* FDR */
232 break;
233 case 2:
234 props->active_speed = 32; /* EDR */
235 break;
236 }
237 }
238
239 /* If reported active speed is QDR, check if is FDR-10 */
240 if (props->active_speed == 4) {
c7a08ac7 241 if (gen->ext_port_cap[port - 1] &
e126ba97
EC		 242 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
243 init_query_mad(in_mad);
244 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
245 in_mad->attr_mod = cpu_to_be32(port);
246
247 err = mlx5_MAD_IFC(dev, 1, 1, port,
248 NULL, NULL, in_mad, out_mad);
249 if (err)
250 goto out;
251
252 /* Checking LinkSpeedActive for FDR-10 */
253 if (out_mad->data[15] & 0x1)
254 props->active_speed = 8;
255 }
256 }
257
258out:
259 kfree(in_mad);
260 kfree(out_mad);
261
262 return err;
263}
264
265static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
266 union ib_gid *gid)
267{
268 struct ib_smp *in_mad = NULL;
269 struct ib_smp *out_mad = NULL;
270 int err = -ENOMEM;
271
272 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
273 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
274 if (!in_mad || !out_mad)
275 goto out;
276
277 init_query_mad(in_mad);
278 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
279 in_mad->attr_mod = cpu_to_be32(port);
280
281 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
282 if (err)
283 goto out;
284
285 memcpy(gid->raw, out_mad->data + 8, 8);
286
287 init_query_mad(in_mad);
288 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
289 in_mad->attr_mod = cpu_to_be32(index / 8);
290
291 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
292 if (err)
293 goto out;
294
295 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
296
297out:
298 kfree(in_mad);
299 kfree(out_mad);
300 return err;
301}
302
303static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
304 u16 *pkey)
305{
306 struct ib_smp *in_mad = NULL;
307 struct ib_smp *out_mad = NULL;
308 int err = -ENOMEM;
309
310 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
311 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
312 if (!in_mad || !out_mad)
313 goto out;
314
315 init_query_mad(in_mad);
316 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
317 in_mad->attr_mod = cpu_to_be32(index / 32);
318
319 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
320 if (err)
321 goto out;
322
323 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
324
325out:
326 kfree(in_mad);
327 kfree(out_mad);
328 return err;
329}
330
331struct mlx5_reg_node_desc {
332 u8 desc[64];
333};
334
335static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
336 struct ib_device_modify *props)
337{
338 struct mlx5_ib_dev *dev = to_mdev(ibdev);
339 struct mlx5_reg_node_desc in;
340 struct mlx5_reg_node_desc out;
341 int err;
342
343 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
344 return -EOPNOTSUPP;
345
346 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
347 return 0;
348
349 /*
350 * If possible, pass node desc to FW, so it can generate
351 * a 144 trap. If cmd fails, just ignore.
352 */
353 memcpy(&in, props->node_desc, 64);
9603b61d 354 err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out,
e126ba97
EC		 355 sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
356 if (err)
357 return err;
358
359 memcpy(ibdev->node_desc, props->node_desc, 64);
360
361 return err;
362}
363
364static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
365 struct ib_port_modify *props)
366{
367 struct mlx5_ib_dev *dev = to_mdev(ibdev);
368 struct ib_port_attr attr;
369 u32 tmp;
370 int err;
371
372 mutex_lock(&dev->cap_mask_mutex);
373
374 err = mlx5_ib_query_port(ibdev, port, &attr);
375 if (err)
376 goto out;
377
378 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
379 ~props->clr_port_cap_mask;
380
9603b61d 381 err = mlx5_set_port_caps(dev->mdev, port, tmp);
e126ba97
EC		 382
383out:
384 mutex_unlock(&dev->cap_mask_mutex);
385 return err;
386}
387
388static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
389 struct ib_udata *udata)
390{
391 struct mlx5_ib_dev *dev = to_mdev(ibdev);
78c0f98c 392 struct mlx5_ib_alloc_ucontext_req_v2 req;
e126ba97
EC		 393 struct mlx5_ib_alloc_ucontext_resp resp;
394 struct mlx5_ib_ucontext *context;
c7a08ac7 395 struct mlx5_general_caps *gen;
e126ba97
EC		 396 struct mlx5_uuar_info *uuari;
397 struct mlx5_uar *uars;
c1be5232 398 int gross_uuars;
e126ba97 399 int num_uars;
78c0f98c 400 int ver;
e126ba97
EC		 401 int uuarn;
402 int err;
403 int i;
f241e749 404 size_t reqlen;
e126ba97 405
c7a08ac7 406 gen = &dev->mdev->caps.gen;
e126ba97
EC		 407 if (!dev->ib_active)
408 return ERR_PTR(-EAGAIN);
409
78c0f98c
EC		 410 memset(&req, 0, sizeof(req));
411 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
412 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
413 ver = 0;
414 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
415 ver = 2;
416 else
417 return ERR_PTR(-EINVAL);
418
419 err = ib_copy_from_udata(&req, udata, reqlen);
e126ba97
EC		 420 if (err)
421 return ERR_PTR(err);
422
78c0f98c
EC		 423 if (req.flags || req.reserved)
424 return ERR_PTR(-EINVAL);
425
e126ba97
EC		 426 if (req.total_num_uuars > MLX5_MAX_UUARS)
427 return ERR_PTR(-ENOMEM);
428
429 if (req.total_num_uuars == 0)
430 return ERR_PTR(-EINVAL);
431
c1be5232
EC		 432 req.total_num_uuars = ALIGN(req.total_num_uuars,
433 MLX5_NON_FP_BF_REGS_PER_PAGE);
e126ba97
EC		 434 if (req.num_low_latency_uuars > req.total_num_uuars - 1)
435 return ERR_PTR(-EINVAL);
436
c1be5232
EC		 437 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
438 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
c7a08ac7
EC		 439 resp.qp_tab_size = 1 << gen->log_max_qp;
440 resp.bf_reg_size = gen->bf_reg_size;
e126ba97 441 resp.cache_line_size = L1_CACHE_BYTES;
c7a08ac7
EC		 442 resp.max_sq_desc_sz = gen->max_sq_desc_sz;
443 resp.max_rq_desc_sz = gen->max_rq_desc_sz;
444 resp.max_send_wqebb = gen->max_wqes;
445 resp.max_recv_wr = gen->max_wqes;
446 resp.max_srq_recv_wr = gen->max_srq_wqes;
e126ba97
EC		 447
448 context = kzalloc(sizeof(*context), GFP_KERNEL);
449 if (!context)
450 return ERR_PTR(-ENOMEM);
451
452 uuari = &context->uuari;
453 mutex_init(&uuari->lock);
454 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
455 if (!uars) {
456 err = -ENOMEM;
457 goto out_ctx;
458 }
459
c1be5232 460 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
e126ba97
EC		 461 sizeof(*uuari->bitmap),
462 GFP_KERNEL);
463 if (!uuari->bitmap) {
464 err = -ENOMEM;
465 goto out_uar_ctx;
466 }
467 /*
468 * clear all fast path uuars
469 */
c1be5232 470 for (i = 0; i < gross_uuars; i++) {
e126ba97
EC		 471 uuarn = i & 3;
472 if (uuarn == 2 || uuarn == 3)
473 set_bit(i, uuari->bitmap);
474 }
475
c1be5232 476 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
e126ba97
EC		 477 if (!uuari->count) {
478 err = -ENOMEM;
479 goto out_bitmap;
480 }
481
482 for (i = 0; i < num_uars; i++) {
9603b61d 483 err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index);
e126ba97
EC		 484 if (err)
485 goto out_count;
486 }
487
b4cfe447
HE		 488#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
489 context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range;
490#endif
491
e126ba97
EC		 492 INIT_LIST_HEAD(&context->db_page_list);
493 mutex_init(&context->db_page_mutex);
494
495 resp.tot_uuars = req.total_num_uuars;
c7a08ac7 496 resp.num_ports = gen->num_ports;
92b0ca7c
DC		 497 err = ib_copy_to_udata(udata, &resp,
498 sizeof(resp) - sizeof(resp.reserved));
e126ba97
EC		 499 if (err)
500 goto out_uars;
501
78c0f98c 502 uuari->ver = ver;
e126ba97
EC		 503 uuari->num_low_latency_uuars = req.num_low_latency_uuars;
504 uuari->uars = uars;
505 uuari->num_uars = num_uars;
506 return &context->ibucontext;
507
508out_uars:
509 for (i--; i >= 0; i--)
9603b61d 510 mlx5_cmd_free_uar(dev->mdev, uars[i].index);
e126ba97
EC		 511out_count:
512 kfree(uuari->count);
513
514out_bitmap:
515 kfree(uuari->bitmap);
516
517out_uar_ctx:
518 kfree(uars);
519
520out_ctx:
521 kfree(context);
522 return ERR_PTR(err);
523}
524
525static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
526{
527 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
528 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
529 struct mlx5_uuar_info *uuari = &context->uuari;
530 int i;
531
532 for (i = 0; i < uuari->num_uars; i++) {
9603b61d 533 if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
e126ba97
EC		 534 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
535 }
536
537 kfree(uuari->count);
538 kfree(uuari->bitmap);
539 kfree(uuari->uars);
540 kfree(context);
541
542 return 0;
543}
544
545static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
546{
9603b61d 547 return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index;
e126ba97
EC		 548}
549
550static int get_command(unsigned long offset)
551{
552 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
553}
554
555static int get_arg(unsigned long offset)
556{
557 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
558}
559
560static int get_index(unsigned long offset)
561{
562 return get_arg(offset);
563}
564
565static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
566{
567 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
568 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
569 struct mlx5_uuar_info *uuari = &context->uuari;
570 unsigned long command;
571 unsigned long idx;
572 phys_addr_t pfn;
573
574 command = get_command(vma->vm_pgoff);
575 switch (command) {
576 case MLX5_IB_MMAP_REGULAR_PAGE:
577 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
578 return -EINVAL;
579
580 idx = get_index(vma->vm_pgoff);
1c3ce90d
EC		 581 if (idx >= uuari->num_uars)
582 return -EINVAL;
583
e126ba97
EC		 584 pfn = uar_index2pfn(dev, uuari->uars[idx].index);
585 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
586 (unsigned long long)pfn);
587
e126ba97
EC		 588 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
589 if (io_remap_pfn_range(vma, vma->vm_start, pfn,
590 PAGE_SIZE, vma->vm_page_prot))
591 return -EAGAIN;
592
593 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
594 vma->vm_start,
595 (unsigned long long)pfn << PAGE_SHIFT);
596 break;
597
598 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
599 return -ENOSYS;
600
601 default:
602 return -EINVAL;
603 }
604
605 return 0;
606}
607
608static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
609{
610 struct mlx5_create_mkey_mbox_in *in;
611 struct mlx5_mkey_seg *seg;
612 struct mlx5_core_mr mr;
613 int err;
614
615 in = kzalloc(sizeof(*in), GFP_KERNEL);
616 if (!in)
617 return -ENOMEM;
618
619 seg = &in->seg;
620 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
621 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
622 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
623 seg->start_addr = 0;
624
9603b61d 625 err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
746b5583 626 NULL, NULL, NULL);
e126ba97
EC		 627 if (err) {
628 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
629 goto err_in;
630 }
631
632 kfree(in);
633 *key = mr.key;
634
635 return 0;
636
637err_in:
638 kfree(in);
639
640 return err;
641}
642
643static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
644{
645 struct mlx5_core_mr mr;
646 int err;
647
648 memset(&mr, 0, sizeof(mr));
649 mr.key = key;
9603b61d 650 err = mlx5_core_destroy_mkey(dev->mdev, &mr);
e126ba97
EC		 651 if (err)
652 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
653}
654
655static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
656 struct ib_ucontext *context,
657 struct ib_udata *udata)
658{
659 struct mlx5_ib_alloc_pd_resp resp;
660 struct mlx5_ib_pd *pd;
661 int err;
662
663 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
664 if (!pd)
665 return ERR_PTR(-ENOMEM);
666
9603b61d 667 err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn);
e126ba97
EC		 668 if (err) {
669 kfree(pd);
670 return ERR_PTR(err);
671 }
672
673 if (context) {
674 resp.pdn = pd->pdn;
675 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
9603b61d 676 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 677 kfree(pd);
678 return ERR_PTR(-EFAULT);
679 }
680 } else {
681 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
682 if (err) {
9603b61d 683 mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
e126ba97
EC		 684 kfree(pd);
685 return ERR_PTR(err);
686 }
687 }
688
689 return &pd->ibpd;
690}
691
692static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
693{
694 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
695 struct mlx5_ib_pd *mpd = to_mpd(pd);
696
697 if (!pd->uobject)
698 free_pa_mkey(mdev, mpd->pa_lkey);
699
9603b61d 700 mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
e126ba97
EC		 701 kfree(mpd);
702
703 return 0;
704}
705
706static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
707{
708 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
709 int err;
710
9603b61d 711 err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 712 if (err)
713 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
714 ibqp->qp_num, gid->raw);
715
716 return err;
717}
718
719static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
720{
721 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
722 int err;
723
9603b61d 724 err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num);
e126ba97
EC		 725 if (err)
726 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
727 ibqp->qp_num, gid->raw);
728
729 return err;
730}
731
732static int init_node_data(struct mlx5_ib_dev *dev)
733{
734 struct ib_smp *in_mad = NULL;
735 struct ib_smp *out_mad = NULL;
736 int err = -ENOMEM;
737
738 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
739 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
740 if (!in_mad || !out_mad)
741 goto out;
742
743 init_query_mad(in_mad);
744 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
745
746 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
747 if (err)
748 goto out;
749
750 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
751
752 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
753
754 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
755 if (err)
756 goto out;
757
9603b61d 758 dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
e126ba97
EC		 759 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
760
761out:
762 kfree(in_mad);
763 kfree(out_mad);
764 return err;
765}
766
767static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
768 char *buf)
769{
770 struct mlx5_ib_dev *dev =
771 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
772
9603b61d 773 return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
e126ba97
EC		 774}
775
776static ssize_t show_reg_pages(struct device *device,
777 struct device_attribute *attr, char *buf)
778{
779 struct mlx5_ib_dev *dev =
780 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
781
6aec21f6 782 return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
e126ba97
EC		 783}
784
785static ssize_t show_hca(struct device *device, struct device_attribute *attr,
786 char *buf)
787{
788 struct mlx5_ib_dev *dev =
789 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 790 return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
e126ba97
EC		 791}
792
793static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
794 char *buf)
795{
796 struct mlx5_ib_dev *dev =
797 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d
JM		 798 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
799 fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
e126ba97
EC		 800}
801
802static ssize_t show_rev(struct device *device, struct device_attribute *attr,
803 char *buf)
804{
805 struct mlx5_ib_dev *dev =
806 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
9603b61d 807 return sprintf(buf, "%x\n", dev->mdev->rev_id);
e126ba97
EC		 808}
809
810static ssize_t show_board(struct device *device, struct device_attribute *attr,
811 char *buf)
812{
813 struct mlx5_ib_dev *dev =
814 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
815 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
9603b61d 816 dev->mdev->board_id);
e126ba97
EC		 817}
818
819static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
820static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
821static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
822static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
823static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
824static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
825
826static struct device_attribute *mlx5_class_attributes[] = {
827 &dev_attr_hw_rev,
828 &dev_attr_fw_ver,
829 &dev_attr_hca_type,
830 &dev_attr_board_id,
831 &dev_attr_fw_pages,
832 &dev_attr_reg_pages,
833};
834
9603b61d 835static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context,
4d2f9bbb 836 enum mlx5_dev_event event, unsigned long param)
e126ba97 837{
9603b61d 838 struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
e126ba97 839 struct ib_event ibev;
9603b61d 840
e126ba97
EC		 841 u8 port = 0;
842
843 switch (event) {
844 case MLX5_DEV_EVENT_SYS_ERROR:
845 ibdev->ib_active = false;
846 ibev.event = IB_EVENT_DEVICE_FATAL;
847 break;
848
849 case MLX5_DEV_EVENT_PORT_UP:
850 ibev.event = IB_EVENT_PORT_ACTIVE;
4d2f9bbb 851 port = (u8)param;
e126ba97
EC		 852 break;
853
854 case MLX5_DEV_EVENT_PORT_DOWN:
855 ibev.event = IB_EVENT_PORT_ERR;
4d2f9bbb 856 port = (u8)param;
e126ba97
EC		 857 break;
858
859 case MLX5_DEV_EVENT_PORT_INITIALIZED:
860 /* not used by ULPs */
861 return;
862
863 case MLX5_DEV_EVENT_LID_CHANGE:
864 ibev.event = IB_EVENT_LID_CHANGE;
4d2f9bbb 865 port = (u8)param;
e126ba97
EC		 866 break;
867
868 case MLX5_DEV_EVENT_PKEY_CHANGE:
869 ibev.event = IB_EVENT_PKEY_CHANGE;
4d2f9bbb 870 port = (u8)param;
e126ba97
EC		 871 break;
872
873 case MLX5_DEV_EVENT_GUID_CHANGE:
874 ibev.event = IB_EVENT_GID_CHANGE;
4d2f9bbb 875 port = (u8)param;
e126ba97
EC		 876 break;
877
878 case MLX5_DEV_EVENT_CLIENT_REREG:
879 ibev.event = IB_EVENT_CLIENT_REREGISTER;
4d2f9bbb 880 port = (u8)param;
e126ba97
EC		 881 break;
882 }
883
884 ibev.device = &ibdev->ib_dev;
885 ibev.element.port_num = port;
886
a0c84c32
EC		 887 if (port < 1 || port > ibdev->num_ports) {
888 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
889 return;
890 }
891
e126ba97
EC		 892 if (ibdev->ib_active)
893 ib_dispatch_event(&ibev);
894}
895
896static void get_ext_port_caps(struct mlx5_ib_dev *dev)
897{
c7a08ac7 898 struct mlx5_general_caps *gen;
e126ba97
EC		 899 int port;
900
c7a08ac7
EC		 901 gen = &dev->mdev->caps.gen;
902 for (port = 1; port <= gen->num_ports; port++)
e126ba97
EC		 903 mlx5_query_ext_port_caps(dev, port);
904}
905
906static int get_port_caps(struct mlx5_ib_dev *dev)
907{
908 struct ib_device_attr *dprops = NULL;
909 struct ib_port_attr *pprops = NULL;
c7a08ac7 910 struct mlx5_general_caps *gen;
f614fc15 911 int err = -ENOMEM;
e126ba97
EC		 912 int port;
913
c7a08ac7 914 gen = &dev->mdev->caps.gen;
e126ba97
EC		 915 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
916 if (!pprops)
917 goto out;
918
919 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
920 if (!dprops)
921 goto out;
922
923 err = mlx5_ib_query_device(&dev->ib_dev, dprops);
924 if (err) {
925 mlx5_ib_warn(dev, "query_device failed %d\n", err);
926 goto out;
927 }
928
c7a08ac7 929 for (port = 1; port <= gen->num_ports; port++) {
e126ba97
EC		 930 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
931 if (err) {
932 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
933 break;
934 }
c7a08ac7
EC		 935 gen->port[port - 1].pkey_table_len = dprops->max_pkeys;
936 gen->port[port - 1].gid_table_len = pprops->gid_tbl_len;
e126ba97
EC		 937 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
938 dprops->max_pkeys, pprops->gid_tbl_len);
939 }
940
941out:
942 kfree(pprops);
943 kfree(dprops);
944
945 return err;
946}
947
948static void destroy_umrc_res(struct mlx5_ib_dev *dev)
949{
950 int err;
951
952 err = mlx5_mr_cache_cleanup(dev);
953 if (err)
954 mlx5_ib_warn(dev, "mr cache cleanup failed\n");
955
956 mlx5_ib_destroy_qp(dev->umrc.qp);
957 ib_destroy_cq(dev->umrc.cq);
958 ib_dereg_mr(dev->umrc.mr);
959 ib_dealloc_pd(dev->umrc.pd);
960}
961
962enum {
963 MAX_UMR_WR = 128,
964};
965
966static int create_umr_res(struct mlx5_ib_dev *dev)
967{
968 struct ib_qp_init_attr *init_attr = NULL;
969 struct ib_qp_attr *attr = NULL;
970 struct ib_pd *pd;
971 struct ib_cq *cq;
972 struct ib_qp *qp;
973 struct ib_mr *mr;
8e37210b 974 struct ib_cq_init_attr cq_attr = {};
e126ba97
EC		 975 int ret;
976
977 attr = kzalloc(sizeof(*attr), GFP_KERNEL);
978 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
979 if (!attr || !init_attr) {
980 ret = -ENOMEM;
981 goto error_0;
982 }
983
984 pd = ib_alloc_pd(&dev->ib_dev);
985 if (IS_ERR(pd)) {
986 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
987 ret = PTR_ERR(pd);
988 goto error_0;
989 }
990
991 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
992 if (IS_ERR(mr)) {
993 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
994 ret = PTR_ERR(mr);
995 goto error_1;
996 }
997
8e37210b
MB		 998 cq_attr.cqe = 128;
999 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL,
1000 &cq_attr);
e126ba97
EC		 1001 if (IS_ERR(cq)) {
1002 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
1003 ret = PTR_ERR(cq);
1004 goto error_2;
1005 }
1006 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
1007
1008 init_attr->send_cq = cq;
1009 init_attr->recv_cq = cq;
1010 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
1011 init_attr->cap.max_send_wr = MAX_UMR_WR;
1012 init_attr->cap.max_send_sge = 1;
1013 init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
1014 init_attr->port_num = 1;
1015 qp = mlx5_ib_create_qp(pd, init_attr, NULL);
1016 if (IS_ERR(qp)) {
1017 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
1018 ret = PTR_ERR(qp);
1019 goto error_3;
1020 }
1021 qp->device = &dev->ib_dev;
1022 qp->real_qp = qp;
1023 qp->uobject = NULL;
1024 qp->qp_type = MLX5_IB_QPT_REG_UMR;
1025
1026 attr->qp_state = IB_QPS_INIT;
1027 attr->port_num = 1;
1028 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
1029 IB_QP_PORT, NULL);
1030 if (ret) {
1031 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
1032 goto error_4;
1033 }
1034
1035 memset(attr, 0, sizeof(*attr));
1036 attr->qp_state = IB_QPS_RTR;
1037 attr->path_mtu = IB_MTU_256;
1038
1039 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1040 if (ret) {
1041 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
1042 goto error_4;
1043 }
1044
1045 memset(attr, 0, sizeof(*attr));
1046 attr->qp_state = IB_QPS_RTS;
1047 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1048 if (ret) {
1049 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
1050 goto error_4;
1051 }
1052
1053 dev->umrc.qp = qp;
1054 dev->umrc.cq = cq;
1055 dev->umrc.mr = mr;
1056 dev->umrc.pd = pd;
1057
1058 sema_init(&dev->umrc.sem, MAX_UMR_WR);
1059 ret = mlx5_mr_cache_init(dev);
1060 if (ret) {
1061 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
1062 goto error_4;
1063 }
1064
1065 kfree(attr);
1066 kfree(init_attr);
1067
1068 return 0;
1069
1070error_4:
1071 mlx5_ib_destroy_qp(qp);
1072
1073error_3:
1074 ib_destroy_cq(cq);
1075
1076error_2:
1077 ib_dereg_mr(mr);
1078
1079error_1:
1080 ib_dealloc_pd(pd);
1081
1082error_0:
1083 kfree(attr);
1084 kfree(init_attr);
1085 return ret;
1086}
1087
1088static int create_dev_resources(struct mlx5_ib_resources *devr)
1089{
1090 struct ib_srq_init_attr attr;
1091 struct mlx5_ib_dev *dev;
bcf4c1ea 1092 struct ib_cq_init_attr cq_attr = {.cqe = 1};
e126ba97
EC		 1093 int ret = 0;
1094
1095 dev = container_of(devr, struct mlx5_ib_dev, devr);
1096
1097 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1098 if (IS_ERR(devr->p0)) {
1099 ret = PTR_ERR(devr->p0);
1100 goto error0;
1101 }
1102 devr->p0->device = &dev->ib_dev;
1103 devr->p0->uobject = NULL;
1104 atomic_set(&devr->p0->usecnt, 0);
1105
bcf4c1ea 1106 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, &cq_attr, NULL, NULL);
e126ba97
EC		 1107 if (IS_ERR(devr->c0)) {
1108 ret = PTR_ERR(devr->c0);
1109 goto error1;
1110 }
1111 devr->c0->device = &dev->ib_dev;
1112 devr->c0->uobject = NULL;
1113 devr->c0->comp_handler = NULL;
1114 devr->c0->event_handler = NULL;
1115 devr->c0->cq_context = NULL;
1116 atomic_set(&devr->c0->usecnt, 0);
1117
1118 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1119 if (IS_ERR(devr->x0)) {
1120 ret = PTR_ERR(devr->x0);
1121 goto error2;
1122 }
1123 devr->x0->device = &dev->ib_dev;
1124 devr->x0->inode = NULL;
1125 atomic_set(&devr->x0->usecnt, 0);
1126 mutex_init(&devr->x0->tgt_qp_mutex);
1127 INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
1128
1129 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1130 if (IS_ERR(devr->x1)) {
1131 ret = PTR_ERR(devr->x1);
1132 goto error3;
1133 }
1134 devr->x1->device = &dev->ib_dev;
1135 devr->x1->inode = NULL;
1136 atomic_set(&devr->x1->usecnt, 0);
1137 mutex_init(&devr->x1->tgt_qp_mutex);
1138 INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
1139
1140 memset(&attr, 0, sizeof(attr));
1141 attr.attr.max_sge = 1;
1142 attr.attr.max_wr = 1;
1143 attr.srq_type = IB_SRQT_XRC;
1144 attr.ext.xrc.cq = devr->c0;
1145 attr.ext.xrc.xrcd = devr->x0;
1146
1147 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
1148 if (IS_ERR(devr->s0)) {
1149 ret = PTR_ERR(devr->s0);
1150 goto error4;
1151 }
1152 devr->s0->device = &dev->ib_dev;
1153 devr->s0->pd = devr->p0;
1154 devr->s0->uobject = NULL;
1155 devr->s0->event_handler = NULL;
1156 devr->s0->srq_context = NULL;
1157 devr->s0->srq_type = IB_SRQT_XRC;
1158 devr->s0->ext.xrc.xrcd = devr->x0;
1159 devr->s0->ext.xrc.cq = devr->c0;
1160 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
1161 atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
1162 atomic_inc(&devr->p0->usecnt);
1163 atomic_set(&devr->s0->usecnt, 0);
1164
1165 return 0;
1166
1167error4:
1168 mlx5_ib_dealloc_xrcd(devr->x1);
1169error3:
1170 mlx5_ib_dealloc_xrcd(devr->x0);
1171error2:
1172 mlx5_ib_destroy_cq(devr->c0);
1173error1:
1174 mlx5_ib_dealloc_pd(devr->p0);
1175error0:
1176 return ret;
1177}
1178
1179static void destroy_dev_resources(struct mlx5_ib_resources *devr)
1180{
1181 mlx5_ib_destroy_srq(devr->s0);
1182 mlx5_ib_dealloc_xrcd(devr->x0);
1183 mlx5_ib_dealloc_xrcd(devr->x1);
1184 mlx5_ib_destroy_cq(devr->c0);
1185 mlx5_ib_dealloc_pd(devr->p0);
1186}
1187
7738613e
IW		 1188static int mlx5_port_immutable(struct ib_device *ibdev, u8 port_num,
1189 struct ib_port_immutable *immutable)
1190{
1191 struct ib_port_attr attr;
1192 int err;
1193
1194 err = mlx5_ib_query_port(ibdev, port_num, &attr);
1195 if (err)
1196 return err;
1197
1198 immutable->pkey_tbl_len = attr.pkey_tbl_len;
1199 immutable->gid_tbl_len = attr.gid_tbl_len;
f9b22e35 1200 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
7738613e
IW		 1201
1202 return 0;
1203}
1204
9603b61d 1205static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
e126ba97 1206{
e126ba97
EC		 1207 struct mlx5_ib_dev *dev;
1208 int err;
1209 int i;
1210
1211 printk_once(KERN_INFO "%s", mlx5_version);
1212
1213 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
1214 if (!dev)
9603b61d 1215 return NULL;
e126ba97 1216
9603b61d 1217 dev->mdev = mdev;
e126ba97
EC		 1218
1219 err = get_port_caps(dev);
1220 if (err)
9603b61d 1221 goto err_dealloc;
e126ba97
EC		 1222
1223 get_ext_port_caps(dev);
1224
e126ba97
EC		 1225 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
1226
1227 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1228 dev->ib_dev.owner = THIS_MODULE;
1229 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
c7a08ac7
EC		 1230 dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey;
1231 dev->num_ports = mdev->caps.gen.num_ports;
e126ba97 1232 dev->ib_dev.phys_port_cnt = dev->num_ports;
233d05d2
SM		 1233 dev->ib_dev.num_comp_vectors =
1234 dev->mdev->priv.eq_table.num_comp_vectors;
e126ba97
EC		 1235 dev->ib_dev.dma_device = &mdev->pdev->dev;
1236
1237 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
1238 dev->ib_dev.uverbs_cmd_mask =
1239 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1240 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1241 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1242 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1243 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1244 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1245 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1246 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1247 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1248 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1249 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1250 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1251 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1252 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1253 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1254 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1255 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1256 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1257 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1258 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1259 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1260 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1261 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
1707cb4a
HE		 1262 dev->ib_dev.uverbs_ex_cmd_mask =
1263 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
e126ba97
EC		 1264
1265 dev->ib_dev.query_device = mlx5_ib_query_device;
1266 dev->ib_dev.query_port = mlx5_ib_query_port;
1267 dev->ib_dev.query_gid = mlx5_ib_query_gid;
1268 dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
1269 dev->ib_dev.modify_device = mlx5_ib_modify_device;
1270 dev->ib_dev.modify_port = mlx5_ib_modify_port;
1271 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
1272 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
1273 dev->ib_dev.mmap = mlx5_ib_mmap;
1274 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
1275 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
1276 dev->ib_dev.create_ah = mlx5_ib_create_ah;
1277 dev->ib_dev.query_ah = mlx5_ib_query_ah;
1278 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
1279 dev->ib_dev.create_srq = mlx5_ib_create_srq;
1280 dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
1281 dev->ib_dev.query_srq = mlx5_ib_query_srq;
1282 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
1283 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
1284 dev->ib_dev.create_qp = mlx5_ib_create_qp;
1285 dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
1286 dev->ib_dev.query_qp = mlx5_ib_query_qp;
1287 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
1288 dev->ib_dev.post_send = mlx5_ib_post_send;
1289 dev->ib_dev.post_recv = mlx5_ib_post_recv;
1290 dev->ib_dev.create_cq = mlx5_ib_create_cq;
1291 dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
1292 dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
1293 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
1294 dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
1295 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
1296 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
1297 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
1298 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
3121e3c4 1299 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
e126ba97
EC		 1300 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
1301 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
1302 dev->ib_dev.process_mad = mlx5_ib_process_mad;
3121e3c4 1303 dev->ib_dev.create_mr = mlx5_ib_create_mr;
e126ba97
EC		 1304 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
1305 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
1306 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
d5436ba0 1307 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
7738613e 1308 dev->ib_dev.get_port_immutable = mlx5_port_immutable;
e126ba97 1309
8cdd312c
HE		 1310 mlx5_ib_internal_query_odp_caps(dev);
1311
c7a08ac7 1312 if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) {
e126ba97
EC		 1313 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
1314 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
1315 dev->ib_dev.uverbs_cmd_mask |=
1316 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1317 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1318 }
1319
1320 err = init_node_data(dev);
1321 if (err)
233d05d2 1322 goto err_dealloc;
e126ba97
EC		 1323
1324 mutex_init(&dev->cap_mask_mutex);
e126ba97
EC		 1325
1326 err = create_dev_resources(&dev->devr);
1327 if (err)
233d05d2 1328 goto err_dealloc;
e126ba97 1329
6aec21f6 1330 err = mlx5_ib_odp_init_one(dev);
281d1a92 1331 if (err)
e126ba97
EC		 1332 goto err_rsrc;
1333
6aec21f6
HE		 1334 err = ib_register_device(&dev->ib_dev, NULL);
1335 if (err)
1336 goto err_odp;
1337
e126ba97
EC		 1338 err = create_umr_res(dev);
1339 if (err)
1340 goto err_dev;
1341
1342 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
281d1a92
WY		 1343 err = device_create_file(&dev->ib_dev.dev,
1344 mlx5_class_attributes[i]);
1345 if (err)
e126ba97
EC		 1346 goto err_umrc;
1347 }
1348
1349 dev->ib_active = true;
1350
9603b61d 1351 return dev;
e126ba97
EC		 1352
1353err_umrc:
1354 destroy_umrc_res(dev);
1355
1356err_dev:
1357 ib_unregister_device(&dev->ib_dev);
1358
6aec21f6
HE		 1359err_odp:
1360 mlx5_ib_odp_remove_one(dev);
1361
e126ba97
EC		 1362err_rsrc:
1363 destroy_dev_resources(&dev->devr);
1364
9603b61d 1365err_dealloc:
e126ba97
EC		 1366 ib_dealloc_device((struct ib_device *)dev);
1367
9603b61d 1368 return NULL;
e126ba97
EC		 1369}
1370
9603b61d 1371static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
e126ba97 1372{
9603b61d 1373 struct mlx5_ib_dev *dev = context;
6aec21f6 1374
e126ba97 1375 ib_unregister_device(&dev->ib_dev);
eefd56e5 1376 destroy_umrc_res(dev);
6aec21f6 1377 mlx5_ib_odp_remove_one(dev);
e126ba97 1378 destroy_dev_resources(&dev->devr);
e126ba97
EC		 1379 ib_dealloc_device(&dev->ib_dev);
1380}
1381
9603b61d
JM		 1382static struct mlx5_interface mlx5_ib_interface = {
1383 .add = mlx5_ib_add,
1384 .remove = mlx5_ib_remove,
1385 .event = mlx5_ib_event,
64613d94 1386 .protocol = MLX5_INTERFACE_PROTOCOL_IB,
e126ba97
EC		 1387};
1388
1389static int __init mlx5_ib_init(void)
1390{
6aec21f6
HE		 1391 int err;
1392
9603b61d
JM		 1393 if (deprecated_prof_sel != 2)
1394 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
1395
6aec21f6
HE		 1396 err = mlx5_ib_odp_init();
1397 if (err)
1398 return err;
1399
1400 err = mlx5_register_interface(&mlx5_ib_interface);
1401 if (err)
1402 goto clean_odp;
1403
1404 return err;
1405
1406clean_odp:
1407 mlx5_ib_odp_cleanup();
1408 return err;
e126ba97
EC		 1409}
1410
1411static void __exit mlx5_ib_cleanup(void)
1412{
9603b61d 1413 mlx5_unregister_interface(&mlx5_ib_interface);
6aec21f6 1414 mlx5_ib_odp_cleanup();
e126ba97
EC		 1415}
1416
1417module_init(mlx5_ib_init);
1418module_exit(mlx5_ib_cleanup);
Linux kernel - Deliverables
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