projects / deliverable / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 6a9401a7 | 1 | /* |
| 5d0d7156 | 2 | * Copyright (C) 2009-2010 Advanced Micro Devices, Inc. |
| 63ce3ae8 | 3 | * Author: Joerg Roedel <jroedel@suse.de> |
| 6a9401a7 JR |
4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it | |
| 6 | * under the terms of the GNU General Public License version 2 as published | |
| 7 | * by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program; if not, write to the Free Software | |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 17 | */ | |
| 18 | ||
| 19 | #ifndef _ASM_X86_AMD_IOMMU_PROTO_H | |
| 20 | #define _ASM_X86_AMD_IOMMU_PROTO_H | |
| 21 | ||
| 403f81d8 | 22 | #include "amd_iommu_types.h" |
| 6a9401a7 JR |
23 | |
| 24 | extern int amd_iommu_init_dma_ops(void); | |
| 25 | extern int amd_iommu_init_passthrough(void); | |
| 72fe00f0 | 26 | extern irqreturn_t amd_iommu_int_thread(int irq, void *data); |
| 6a9401a7 | 27 | extern irqreturn_t amd_iommu_int_handler(int irq, void *data); |
| 6a9401a7 JR |
28 | extern void amd_iommu_apply_erratum_63(u16 devid); |
| 29 | extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu); | |
| b7cc9554 JR |
30 | extern int amd_iommu_init_devices(void); |
| 31 | extern void amd_iommu_uninit_devices(void); | |
| 8638c491 | 32 | extern void amd_iommu_init_notifier(void); |
| 3a18404c | 33 | extern int amd_iommu_init_api(void); |
| 400a28a0 | 34 | |
| 6b474b82 | 35 | /* Needed for interrupt remapping */ |
| 6b474b82 JR |
36 | extern int amd_iommu_prepare(void); |
| 37 | extern int amd_iommu_enable(void); | |
| 38 | extern void amd_iommu_disable(void); | |
| 39 | extern int amd_iommu_reenable(int); | |
| 40 | extern int amd_iommu_enable_faulting(void); | |
| 41 | ||
| 72e1dcc4 | 42 | /* IOMMUv2 specific functions */ |
| 132bd68f JR |
43 | struct iommu_domain; |
| 44 | ||
| 400a28a0 | 45 | extern bool amd_iommu_v2_supported(void); |
| 72e1dcc4 JR |
46 | extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb); |
| 47 | extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb); | |
| 132bd68f | 48 | extern void amd_iommu_domain_direct_map(struct iommu_domain *dom); |
| 52815b75 | 49 | extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids); |
| 22e266c7 JR |
50 | extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid, |
| 51 | u64 address); | |
| 52 | extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid); | |
| b16137b1 JR |
53 | extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid, |
| 54 | unsigned long cr3); | |
| 55 | extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid); | |
| f3572db8 | 56 | extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev); |
| b16137b1 | 57 | |
| 30861ddc SK |
58 | /* IOMMU Performance Counter functions */ |
| 59 | extern bool amd_iommu_pc_supported(void); | |
| 60 | extern u8 amd_iommu_pc_get_max_banks(u16 devid); | |
| 61 | extern u8 amd_iommu_pc_get_max_counters(u16 devid); | |
| 62 | extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn, | |
| 63 | u64 *value, bool is_write); | |
| 64 | ||
| 7c71d306 JL |
65 | #ifdef CONFIG_IRQ_REMAP |
| 66 | extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu); | |
| 67 | #else | |
| 68 | static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu) | |
| 69 | { | |
| 70 | return 0; | |
| 71 | } | |
| 72 | #endif | |
| 73 | ||
| c99afa25 JR |
74 | #define PPR_SUCCESS 0x0 |
| 75 | #define PPR_INVALID 0x1 | |
| 76 | #define PPR_FAILURE 0xf | |
| 77 | ||
| 78 | extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid, | |
| 79 | int status, int tag); | |
| 400a28a0 | 80 | |
| 6a9401a7 JR |
81 | #ifndef CONFIG_AMD_IOMMU_STATS |
| 82 | ||
| 83 | static inline void amd_iommu_stats_init(void) { } | |
| 84 | ||
| 85 | #endif /* !CONFIG_AMD_IOMMU_STATS */ | |
| 86 | ||
| 4c894f47 JR |
87 | static inline bool is_rd890_iommu(struct pci_dev *pdev) |
| 88 | { | |
| 89 | return (pdev->vendor == PCI_VENDOR_ID_ATI) && | |
| 90 | (pdev->device == PCI_DEVICE_ID_RD890_IOMMU); | |
| 91 | } | |
| 92 | ||
| d99ddec3 JR |
93 | static inline bool iommu_feature(struct amd_iommu *iommu, u64 f) |
| 94 | { | |
| 95 | if (!(iommu->cap & (1 << IOMMU_CAP_EFR))) | |
| 96 | return false; | |
| 97 | ||
| 98 | return !!(iommu->features & f); | |
| 99 | } | |
| 100 | ||
| 6a9401a7 | 101 | #endif /* _ASM_X86_AMD_IOMMU_PROTO_H */ |