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[PATCH] KVM: MMU: Remove release_pt_page_64()
[deliverable/linux.git] / drivers / kvm / mmu.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19#include <linux/types.h>
20#include <linux/string.h>
21#include <asm/page.h>
22#include <linux/mm.h>
23#include <linux/highmem.h>
24#include <linux/module.h>
25
26#include "vmx.h"
27#include "kvm.h"
28
cea0f0e7
AK		 29#define pgprintk(x...) do { printk(x); } while (0)
30#define rmap_printk(x...) do { printk(x); } while (0)
6aa8b732
AK		 31
32#define ASSERT(x) \
33 if (!(x)) { \
34 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
35 __FILE__, __LINE__, #x); \
36 }
37
cea0f0e7
AK		 38#define PT64_PT_BITS 9
39#define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40#define PT32_PT_BITS 10
41#define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
6aa8b732
AK		 42
43#define PT_WRITABLE_SHIFT 1
44
45#define PT_PRESENT_MASK (1ULL << 0)
46#define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47#define PT_USER_MASK (1ULL << 2)
48#define PT_PWT_MASK (1ULL << 3)
49#define PT_PCD_MASK (1ULL << 4)
50#define PT_ACCESSED_MASK (1ULL << 5)
51#define PT_DIRTY_MASK (1ULL << 6)
52#define PT_PAGE_SIZE_MASK (1ULL << 7)
53#define PT_PAT_MASK (1ULL << 7)
54#define PT_GLOBAL_MASK (1ULL << 8)
55#define PT64_NX_MASK (1ULL << 63)
56
57#define PT_PAT_SHIFT 7
58#define PT_DIR_PAT_SHIFT 12
59#define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
60
61#define PT32_DIR_PSE36_SIZE 4
62#define PT32_DIR_PSE36_SHIFT 13
63#define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
64
65
66#define PT32_PTE_COPY_MASK \
8c7bb723 67 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
6aa8b732 68
8c7bb723 69#define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
6aa8b732
AK		 70
71#define PT_FIRST_AVAIL_BITS_SHIFT 9
72#define PT64_SECOND_AVAIL_BITS_SHIFT 52
73
74#define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75#define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
76
77#define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78#define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
79
80#define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81#define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
82
83#define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
84
85#define VALID_PAGE(x) ((x) != INVALID_PAGE)
86
87#define PT64_LEVEL_BITS 9
88
89#define PT64_LEVEL_SHIFT(level) \
90 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
91
92#define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
94
95#define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
97
98
99#define PT32_LEVEL_BITS 10
100
101#define PT32_LEVEL_SHIFT(level) \
102 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
103
104#define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
106
107#define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
109
110
111#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112#define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
114
115#define PT32_BASE_ADDR_MASK PAGE_MASK
116#define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118
119
120#define PFERR_PRESENT_MASK (1U << 0)
121#define PFERR_WRITE_MASK (1U << 1)
122#define PFERR_USER_MASK (1U << 2)
123
124#define PT64_ROOT_LEVEL 4
125#define PT32_ROOT_LEVEL 2
126#define PT32E_ROOT_LEVEL 3
127
128#define PT_DIRECTORY_LEVEL 2
129#define PT_PAGE_TABLE_LEVEL 1
130
cd4a4e53
AK		 131#define RMAP_EXT 4
132
133struct kvm_rmap_desc {
134 u64 *shadow_ptes[RMAP_EXT];
135 struct kvm_rmap_desc *more;
136};
137
6aa8b732
AK		 138static int is_write_protection(struct kvm_vcpu *vcpu)
139{
140 return vcpu->cr0 & CR0_WP_MASK;
141}
142
143static int is_cpuid_PSE36(void)
144{
145 return 1;
146}
147
148static int is_present_pte(unsigned long pte)
149{
150 return pte & PT_PRESENT_MASK;
151}
152
153static int is_writeble_pte(unsigned long pte)
154{
155 return pte & PT_WRITABLE_MASK;
156}
157
158static int is_io_pte(unsigned long pte)
159{
160 return pte & PT_SHADOW_IO_MARK;
161}
162
cd4a4e53
AK		 163static int is_rmap_pte(u64 pte)
164{
165 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
167}
168
169/*
170 * Reverse mapping data structures:
171 *
172 * If page->private bit zero is zero, then page->private points to the
173 * shadow page table entry that points to page_address(page).
174 *
175 * If page->private bit zero is one, (then page->private & ~1) points
176 * to a struct kvm_rmap_desc containing more mappings.
177 */
178static void rmap_add(struct kvm *kvm, u64 *spte)
179{
180 struct page *page;
181 struct kvm_rmap_desc *desc;
182 int i;
183
184 if (!is_rmap_pte(*spte))
185 return;
186 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
187 if (!page->private) {
188 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
189 page->private = (unsigned long)spte;
190 } else if (!(page->private & 1)) {
191 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
192 desc = kzalloc(sizeof *desc, GFP_NOWAIT);
193 if (!desc)
194 BUG(); /* FIXME: return error */
195 desc->shadow_ptes[0] = (u64 *)page->private;
196 desc->shadow_ptes[1] = spte;
197 page->private = (unsigned long)desc | 1;
198 } else {
199 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
200 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
201 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
202 desc = desc->more;
203 if (desc->shadow_ptes[RMAP_EXT-1]) {
204 desc->more = kzalloc(sizeof *desc->more, GFP_NOWAIT);
205 if (!desc->more)
206 BUG(); /* FIXME: return error */
207 desc = desc->more;
208 }
209 for (i = 0; desc->shadow_ptes[i]; ++i)
210 ;
211 desc->shadow_ptes[i] = spte;
212 }
213}
214
215static void rmap_desc_remove_entry(struct page *page,
216 struct kvm_rmap_desc *desc,
217 int i,
218 struct kvm_rmap_desc *prev_desc)
219{
220 int j;
221
222 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
223 ;
224 desc->shadow_ptes[i] = desc->shadow_ptes[j];
225 desc->shadow_ptes[j] = 0;
226 if (j != 0)
227 return;
228 if (!prev_desc && !desc->more)
229 page->private = (unsigned long)desc->shadow_ptes[0];
230 else
231 if (prev_desc)
232 prev_desc->more = desc->more;
233 else
234 page->private = (unsigned long)desc->more | 1;
235 kfree(desc);
236}
237
238static void rmap_remove(struct kvm *kvm, u64 *spte)
239{
240 struct page *page;
241 struct kvm_rmap_desc *desc;
242 struct kvm_rmap_desc *prev_desc;
243 int i;
244
245 if (!is_rmap_pte(*spte))
246 return;
247 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
248 if (!page->private) {
249 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
250 BUG();
251 } else if (!(page->private & 1)) {
252 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
253 if ((u64 *)page->private != spte) {
254 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
255 spte, *spte);
256 BUG();
257 }
258 page->private = 0;
259 } else {
260 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
261 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
262 prev_desc = NULL;
263 while (desc) {
264 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
265 if (desc->shadow_ptes[i] == spte) {
266 rmap_desc_remove_entry(page, desc, i,
267 prev_desc);
268 return;
269 }
270 prev_desc = desc;
271 desc = desc->more;
272 }
273 BUG();
274 }
275}
276
374cbac0
AK		 277static void rmap_write_protect(struct kvm *kvm, u64 gfn)
278{
279 struct page *page;
280 struct kvm_memory_slot *slot;
281 struct kvm_rmap_desc *desc;
282 u64 *spte;
283
284 slot = gfn_to_memslot(kvm, gfn);
285 BUG_ON(!slot);
286 page = gfn_to_page(slot, gfn);
287
288 while (page->private) {
289 if (!(page->private & 1))
290 spte = (u64 *)page->private;
291 else {
292 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
293 spte = desc->shadow_ptes[0];
294 }
295 BUG_ON(!spte);
296 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
297 page_to_pfn(page) << PAGE_SHIFT);
298 BUG_ON(!(*spte & PT_PRESENT_MASK));
299 BUG_ON(!(*spte & PT_WRITABLE_MASK));
300 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
301 rmap_remove(kvm, spte);
302 *spte &= ~(u64)PT_WRITABLE_MASK;
303 }
304}
305
6aa8b732
AK		 306static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
307{
308 struct kvm_mmu_page *page_head = page_header(page_hpa);
309
310 list_del(&page_head->link);
311 page_head->page_hpa = page_hpa;
312 list_add(&page_head->link, &vcpu->free_pages);
ebeace86 313 ++vcpu->kvm->n_free_mmu_pages;
6aa8b732
AK		 314}
315
316static int is_empty_shadow_page(hpa_t page_hpa)
317{
318 u32 *pos;
319 u32 *end;
320 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u32);
321 pos != end; pos++)
322 if (*pos != 0)
323 return 0;
324 return 1;
325}
326
cea0f0e7
AK		 327static unsigned kvm_page_table_hashfn(gfn_t gfn)
328{
329 return gfn;
330}
331
25c0de2c
AK		 332static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
333 u64 *parent_pte)
6aa8b732
AK		 334{
335 struct kvm_mmu_page *page;
336
337 if (list_empty(&vcpu->free_pages))
25c0de2c 338 return NULL;
6aa8b732
AK		 339
340 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
341 list_del(&page->link);
342 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
343 ASSERT(is_empty_shadow_page(page->page_hpa));
344 page->slot_bitmap = 0;
345 page->global = 1;
cea0f0e7 346 page->multimapped = 0;
6aa8b732 347 page->parent_pte = parent_pte;
ebeace86 348 --vcpu->kvm->n_free_mmu_pages;
25c0de2c 349 return page;
6aa8b732
AK		 350}
351
cea0f0e7
AK		 352static void mmu_page_add_parent_pte(struct kvm_mmu_page *page, u64 *parent_pte)
353{
354 struct kvm_pte_chain *pte_chain;
355 struct hlist_node *node;
356 int i;
357
358 if (!parent_pte)
359 return;
360 if (!page->multimapped) {
361 u64 *old = page->parent_pte;
362
363 if (!old) {
364 page->parent_pte = parent_pte;
365 return;
366 }
367 page->multimapped = 1;
368 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
369 BUG_ON(!pte_chain);
370 INIT_HLIST_HEAD(&page->parent_ptes);
371 hlist_add_head(&pte_chain->link, &page->parent_ptes);
372 pte_chain->parent_ptes[0] = old;
373 }
374 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
375 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
376 continue;
377 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
378 if (!pte_chain->parent_ptes[i]) {
379 pte_chain->parent_ptes[i] = parent_pte;
380 return;
381 }
382 }
383 pte_chain = kzalloc(sizeof(struct kvm_pte_chain), GFP_NOWAIT);
384 BUG_ON(!pte_chain);
385 hlist_add_head(&pte_chain->link, &page->parent_ptes);
386 pte_chain->parent_ptes[0] = parent_pte;
387}
388
389static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
390 u64 *parent_pte)
391{
392 struct kvm_pte_chain *pte_chain;
393 struct hlist_node *node;
394 int i;
395
396 if (!page->multimapped) {
397 BUG_ON(page->parent_pte != parent_pte);
398 page->parent_pte = NULL;
399 return;
400 }
401 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
402 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
403 if (!pte_chain->parent_ptes[i])
404 break;
405 if (pte_chain->parent_ptes[i] != parent_pte)
406 continue;
697fe2e2
AK		 407 while (i + 1 < NR_PTE_CHAIN_ENTRIES
408 && pte_chain->parent_ptes[i + 1]) {
cea0f0e7
AK		 409 pte_chain->parent_ptes[i]
410 = pte_chain->parent_ptes[i + 1];
411 ++i;
412 }
413 pte_chain->parent_ptes[i] = NULL;
697fe2e2
AK		 414 if (i == 0) {
415 hlist_del(&pte_chain->link);
416 kfree(pte_chain);
417 if (hlist_empty(&page->parent_ptes)) {
418 page->multimapped = 0;
419 page->parent_pte = NULL;
420 }
421 }
cea0f0e7
AK		 422 return;
423 }
424 BUG();
425}
426
427static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
428 gfn_t gfn)
429{
430 unsigned index;
431 struct hlist_head *bucket;
432 struct kvm_mmu_page *page;
433 struct hlist_node *node;
434
435 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
436 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
437 bucket = &vcpu->kvm->mmu_page_hash[index];
438 hlist_for_each_entry(page, node, bucket, hash_link)
439 if (page->gfn == gfn && !page->role.metaphysical) {
440 pgprintk("%s: found role %x\n",
441 __FUNCTION__, page->role.word);
442 return page;
443 }
444 return NULL;
445}
446
447static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
448 gfn_t gfn,
449 gva_t gaddr,
450 unsigned level,
451 int metaphysical,
452 u64 *parent_pte)
453{
454 union kvm_mmu_page_role role;
455 unsigned index;
456 unsigned quadrant;
457 struct hlist_head *bucket;
458 struct kvm_mmu_page *page;
459 struct hlist_node *node;
460
461 role.word = 0;
462 role.glevels = vcpu->mmu.root_level;
463 role.level = level;
464 role.metaphysical = metaphysical;
465 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
466 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
467 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
468 role.quadrant = quadrant;
469 }
470 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
471 gfn, role.word);
472 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
473 bucket = &vcpu->kvm->mmu_page_hash[index];
474 hlist_for_each_entry(page, node, bucket, hash_link)
475 if (page->gfn == gfn && page->role.word == role.word) {
476 mmu_page_add_parent_pte(page, parent_pte);
477 pgprintk("%s: found\n", __FUNCTION__);
478 return page;
479 }
480 page = kvm_mmu_alloc_page(vcpu, parent_pte);
481 if (!page)
482 return page;
483 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
484 page->gfn = gfn;
485 page->role = role;
486 hlist_add_head(&page->hash_link, bucket);
374cbac0
AK		 487 if (!metaphysical)
488 rmap_write_protect(vcpu->kvm, gfn);
cea0f0e7
AK		 489 return page;
490}
491
a436036b
AK		 492static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
493 struct kvm_mmu_page *page)
494{
697fe2e2
AK		 495 unsigned i;
496 u64 *pt;
497 u64 ent;
498
499 pt = __va(page->page_hpa);
500
501 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
502 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
503 if (pt[i] & PT_PRESENT_MASK)
504 rmap_remove(vcpu->kvm, &pt[i]);
505 pt[i] = 0;
506 }
507 return;
508 }
509
510 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
511 ent = pt[i];
512
513 pt[i] = 0;
514 if (!(ent & PT_PRESENT_MASK))
515 continue;
516 ent &= PT64_BASE_ADDR_MASK;
517 mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
518 }
a436036b
AK		 519}
520
cea0f0e7
AK		 521static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
522 struct kvm_mmu_page *page,
523 u64 *parent_pte)
524{
525 mmu_page_remove_parent_pte(page, parent_pte);
a436036b
AK		 526}
527
528static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
529 struct kvm_mmu_page *page)
530{
531 u64 *parent_pte;
532
533 while (page->multimapped || page->parent_pte) {
534 if (!page->multimapped)
535 parent_pte = page->parent_pte;
536 else {
537 struct kvm_pte_chain *chain;
538
539 chain = container_of(page->parent_ptes.first,
540 struct kvm_pte_chain, link);
541 parent_pte = chain->parent_ptes[0];
542 }
697fe2e2 543 BUG_ON(!parent_pte);
a436036b
AK		 544 kvm_mmu_put_page(vcpu, page, parent_pte);
545 *parent_pte = 0;
546 }
cc4529ef
AK		 547 kvm_mmu_page_unlink_children(vcpu, page);
548 hlist_del(&page->hash_link);
ebeace86 549 kvm_mmu_free_page(vcpu, page->page_hpa);
a436036b
AK		 550}
551
552static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
553{
554 unsigned index;
555 struct hlist_head *bucket;
556 struct kvm_mmu_page *page;
557 struct hlist_node *node, *n;
558 int r;
559
560 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
561 r = 0;
562 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
563 bucket = &vcpu->kvm->mmu_page_hash[index];
564 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
565 if (page->gfn == gfn && !page->role.metaphysical) {
697fe2e2
AK		 566 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
567 page->role.word);
a436036b
AK		 568 kvm_mmu_zap_page(vcpu, page);
569 r = 1;
570 }
571 return r;
cea0f0e7
AK		 572}
573
6aa8b732
AK		 574static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
575{
576 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
577 struct kvm_mmu_page *page_head = page_header(__pa(pte));
578
579 __set_bit(slot, &page_head->slot_bitmap);
580}
581
582hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
583{
584 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
585
586 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
587}
588
589hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
590{
591 struct kvm_memory_slot *slot;
592 struct page *page;
593
594 ASSERT((gpa & HPA_ERR_MASK) == 0);
595 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
596 if (!slot)
597 return gpa | HPA_ERR_MASK;
598 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
599 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
600 | (gpa & (PAGE_SIZE-1));
601}
602
603hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
604{
605 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
606
607 if (gpa == UNMAPPED_GVA)
608 return UNMAPPED_GVA;
609 return gpa_to_hpa(vcpu, gpa);
610}
611
6aa8b732
AK		 612static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
613{
614}
615
616static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
617{
618 int level = PT32E_ROOT_LEVEL;
619 hpa_t table_addr = vcpu->mmu.root_hpa;
620
621 for (; ; level--) {
622 u32 index = PT64_INDEX(v, level);
623 u64 *table;
cea0f0e7 624 u64 pte;
6aa8b732
AK		 625
626 ASSERT(VALID_PAGE(table_addr));
627 table = __va(table_addr);
628
629 if (level == 1) {
cea0f0e7
AK		 630 pte = table[index];
631 if (is_present_pte(pte) && is_writeble_pte(pte))
632 return 0;
6aa8b732
AK		 633 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
634 page_header_update_slot(vcpu->kvm, table, v);
635 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
636 PT_USER_MASK;
cd4a4e53 637 rmap_add(vcpu->kvm, &table[index]);
6aa8b732
AK		 638 return 0;
639 }
640
641 if (table[index] == 0) {
25c0de2c 642 struct kvm_mmu_page *new_table;
cea0f0e7 643 gfn_t pseudo_gfn;
6aa8b732 644
cea0f0e7
AK		 645 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
646 >> PAGE_SHIFT;
647 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
648 v, level - 1,
649 1, &table[index]);
25c0de2c 650 if (!new_table) {
6aa8b732
AK		 651 pgprintk("nonpaging_map: ENOMEM\n");
652 return -ENOMEM;
653 }
654
25c0de2c
AK		 655 table[index] = new_table->page_hpa | PT_PRESENT_MASK
656 | PT_WRITABLE_MASK | PT_USER_MASK;
6aa8b732
AK		 657 }
658 table_addr = table[index] & PT64_BASE_ADDR_MASK;
659 }
660}
661
17ac10ad
AK		 662static void mmu_free_roots(struct kvm_vcpu *vcpu)
663{
664 int i;
665
666#ifdef CONFIG_X86_64
667 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
668 hpa_t root = vcpu->mmu.root_hpa;
669
670 ASSERT(VALID_PAGE(root));
17ac10ad
AK		 671 vcpu->mmu.root_hpa = INVALID_PAGE;
672 return;
673 }
674#endif
675 for (i = 0; i < 4; ++i) {
676 hpa_t root = vcpu->mmu.pae_root[i];
677
678 ASSERT(VALID_PAGE(root));
679 root &= PT64_BASE_ADDR_MASK;
17ac10ad
AK		 680 vcpu->mmu.pae_root[i] = INVALID_PAGE;
681 }
682 vcpu->mmu.root_hpa = INVALID_PAGE;
683}
684
685static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
686{
687 int i;
cea0f0e7
AK		 688 gfn_t root_gfn;
689 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
17ac10ad
AK		 690
691#ifdef CONFIG_X86_64
692 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
693 hpa_t root = vcpu->mmu.root_hpa;
694
695 ASSERT(!VALID_PAGE(root));
cea0f0e7
AK		 696 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
697 PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
17ac10ad
AK		 698 vcpu->mmu.root_hpa = root;
699 return;
700 }
701#endif
702 for (i = 0; i < 4; ++i) {
703 hpa_t root = vcpu->mmu.pae_root[i];
704
705 ASSERT(!VALID_PAGE(root));
cea0f0e7
AK		 706 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
707 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
708 else if (vcpu->mmu.root_level == 0)
709 root_gfn = 0;
710 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
711 PT32_ROOT_LEVEL, !is_paging(vcpu),
712 NULL)->page_hpa;
17ac10ad
AK		 713 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
714 }
715 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
716}
717
6aa8b732
AK		 718static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
719{
720 return vaddr;
721}
722
723static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
724 u32 error_code)
725{
6aa8b732 726 gpa_t addr = gva;
ebeace86 727 hpa_t paddr;
6aa8b732
AK		 728
729 ASSERT(vcpu);
730 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
731
6aa8b732 732
ebeace86 733 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
6aa8b732 734
ebeace86
AK		 735 if (is_error_hpa(paddr))
736 return 1;
6aa8b732 737
ebeace86 738 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
6aa8b732
AK		 739}
740
6aa8b732
AK		 741static void nonpaging_free(struct kvm_vcpu *vcpu)
742{
17ac10ad 743 mmu_free_roots(vcpu);
6aa8b732
AK		 744}
745
746static int nonpaging_init_context(struct kvm_vcpu *vcpu)
747{
748 struct kvm_mmu *context = &vcpu->mmu;
749
750 context->new_cr3 = nonpaging_new_cr3;
751 context->page_fault = nonpaging_page_fault;
6aa8b732
AK		 752 context->gva_to_gpa = nonpaging_gva_to_gpa;
753 context->free = nonpaging_free;
cea0f0e7 754 context->root_level = 0;
6aa8b732 755 context->shadow_root_level = PT32E_ROOT_LEVEL;
17ac10ad 756 mmu_alloc_roots(vcpu);
6aa8b732
AK		 757 ASSERT(VALID_PAGE(context->root_hpa));
758 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
759 return 0;
760}
761
6aa8b732
AK		 762static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
763{
6aa8b732
AK		 764 ++kvm_stat.tlb_flush;
765 kvm_arch_ops->tlb_flush(vcpu);
766}
767
768static void paging_new_cr3(struct kvm_vcpu *vcpu)
769{
374cbac0 770 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
cea0f0e7
AK		 771 mmu_free_roots(vcpu);
772 mmu_alloc_roots(vcpu);
6aa8b732 773 kvm_mmu_flush_tlb(vcpu);
cea0f0e7 774 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
6aa8b732
AK		 775}
776
777static void mark_pagetable_nonglobal(void *shadow_pte)
778{
779 page_header(__pa(shadow_pte))->global = 0;
780}
781
782static inline void set_pte_common(struct kvm_vcpu *vcpu,
783 u64 *shadow_pte,
784 gpa_t gaddr,
785 int dirty,
815af8d4
AK		 786 u64 access_bits,
787 gfn_t gfn)
6aa8b732
AK		 788{
789 hpa_t paddr;
790
791 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
792 if (!dirty)
793 access_bits &= ~PT_WRITABLE_MASK;
cea0f0e7 794
374cbac0 795 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
6aa8b732
AK		 796
797 *shadow_pte |= access_bits;
798
6aa8b732
AK		 799 if (!(*shadow_pte & PT_GLOBAL_MASK))
800 mark_pagetable_nonglobal(shadow_pte);
801
802 if (is_error_hpa(paddr)) {
803 *shadow_pte |= gaddr;
804 *shadow_pte |= PT_SHADOW_IO_MARK;
805 *shadow_pte &= ~PT_PRESENT_MASK;
374cbac0 806 return;
6aa8b732 807 }
374cbac0
AK		 808
809 *shadow_pte |= paddr;
810
811 if (access_bits & PT_WRITABLE_MASK) {
812 struct kvm_mmu_page *shadow;
813
815af8d4 814 shadow = kvm_mmu_lookup_page(vcpu, gfn);
374cbac0
AK		 815 if (shadow) {
816 pgprintk("%s: found shadow page for %lx, marking ro\n",
815af8d4 817 __FUNCTION__, gfn);
374cbac0
AK		 818 access_bits &= ~PT_WRITABLE_MASK;
819 *shadow_pte &= ~PT_WRITABLE_MASK;
820 }
821 }
822
823 if (access_bits & PT_WRITABLE_MASK)
824 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
825
826 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
827 rmap_add(vcpu->kvm, shadow_pte);
6aa8b732
AK		 828}
829
830static void inject_page_fault(struct kvm_vcpu *vcpu,
831 u64 addr,
832 u32 err_code)
833{
834 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
835}
836
837static inline int fix_read_pf(u64 *shadow_ent)
838{
839 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
840 !(*shadow_ent & PT_USER_MASK)) {
841 /*
842 * If supervisor write protect is disabled, we shadow kernel
843 * pages as user pages so we can trap the write access.
844 */
845 *shadow_ent |= PT_USER_MASK;
846 *shadow_ent &= ~PT_WRITABLE_MASK;
847
848 return 1;
849
850 }
851 return 0;
852}
853
854static int may_access(u64 pte, int write, int user)
855{
856
857 if (user && !(pte & PT_USER_MASK))
858 return 0;
859 if (write && !(pte & PT_WRITABLE_MASK))
860 return 0;
861 return 1;
862}
863
6aa8b732
AK		 864static void paging_free(struct kvm_vcpu *vcpu)
865{
866 nonpaging_free(vcpu);
867}
868
869#define PTTYPE 64
870#include "paging_tmpl.h"
871#undef PTTYPE
872
873#define PTTYPE 32
874#include "paging_tmpl.h"
875#undef PTTYPE
876
17ac10ad 877static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
6aa8b732
AK		 878{
879 struct kvm_mmu *context = &vcpu->mmu;
880
881 ASSERT(is_pae(vcpu));
882 context->new_cr3 = paging_new_cr3;
883 context->page_fault = paging64_page_fault;
6aa8b732
AK		 884 context->gva_to_gpa = paging64_gva_to_gpa;
885 context->free = paging_free;
17ac10ad
AK		 886 context->root_level = level;
887 context->shadow_root_level = level;
888 mmu_alloc_roots(vcpu);
6aa8b732
AK		 889 ASSERT(VALID_PAGE(context->root_hpa));
890 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
891 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
892 return 0;
893}
894
17ac10ad
AK		 895static int paging64_init_context(struct kvm_vcpu *vcpu)
896{
897 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
898}
899
6aa8b732
AK		 900static int paging32_init_context(struct kvm_vcpu *vcpu)
901{
902 struct kvm_mmu *context = &vcpu->mmu;
903
904 context->new_cr3 = paging_new_cr3;
905 context->page_fault = paging32_page_fault;
6aa8b732
AK		 906 context->gva_to_gpa = paging32_gva_to_gpa;
907 context->free = paging_free;
908 context->root_level = PT32_ROOT_LEVEL;
909 context->shadow_root_level = PT32E_ROOT_LEVEL;
17ac10ad 910 mmu_alloc_roots(vcpu);
6aa8b732
AK		 911 ASSERT(VALID_PAGE(context->root_hpa));
912 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
913 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
914 return 0;
915}
916
917static int paging32E_init_context(struct kvm_vcpu *vcpu)
918{
17ac10ad 919 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
6aa8b732
AK		 920}
921
922static int init_kvm_mmu(struct kvm_vcpu *vcpu)
923{
924 ASSERT(vcpu);
925 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
926
927 if (!is_paging(vcpu))
928 return nonpaging_init_context(vcpu);
a9058ecd 929 else if (is_long_mode(vcpu))
6aa8b732
AK		 930 return paging64_init_context(vcpu);
931 else if (is_pae(vcpu))
932 return paging32E_init_context(vcpu);
933 else
934 return paging32_init_context(vcpu);
935}
936
937static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
938{
939 ASSERT(vcpu);
940 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
941 vcpu->mmu.free(vcpu);
942 vcpu->mmu.root_hpa = INVALID_PAGE;
943 }
944}
945
946int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
947{
948 destroy_kvm_mmu(vcpu);
949 return init_kvm_mmu(vcpu);
950}
951
da4a00f0
AK		 952void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
953{
9b7a0325
AK		 954 gfn_t gfn = gpa >> PAGE_SHIFT;
955 struct kvm_mmu_page *page;
956 struct kvm_mmu_page *child;
957 struct hlist_node *node;
958 struct hlist_head *bucket;
959 unsigned index;
960 u64 *spte;
961 u64 pte;
962 unsigned offset = offset_in_page(gpa);
963 unsigned page_offset;
964 int level;
965
da4a00f0 966 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
9b7a0325
AK		 967 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
968 bucket = &vcpu->kvm->mmu_page_hash[index];
969 hlist_for_each_entry(page, node, bucket, hash_link) {
970 if (page->gfn != gfn || page->role.metaphysical)
971 continue;
972 page_offset = offset;
973 level = page->role.level;
974 if (page->role.glevels == PT32_ROOT_LEVEL) {
975 page_offset <<= 1; /* 32->64 */
976 page_offset &= ~PAGE_MASK;
977 }
978 spte = __va(page->page_hpa);
979 spte += page_offset / sizeof(*spte);
980 pte = *spte;
981 if (is_present_pte(pte)) {
982 if (level == PT_PAGE_TABLE_LEVEL)
983 rmap_remove(vcpu->kvm, spte);
984 else {
985 child = page_header(pte & PT64_BASE_ADDR_MASK);
986 mmu_page_remove_parent_pte(child, spte);
987 }
988 }
989 *spte = 0;
990 }
da4a00f0
AK		 991}
992
993void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
994{
995}
996
a436036b
AK		 997int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
998{
999 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1000
1001 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1002}
1003
ebeace86
AK		 1004void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1005{
1006 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1007 struct kvm_mmu_page *page;
1008
1009 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1010 struct kvm_mmu_page, link);
1011 kvm_mmu_zap_page(vcpu, page);
1012 }
1013}
1014EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1015
6aa8b732
AK		 1016static void free_mmu_pages(struct kvm_vcpu *vcpu)
1017{
1018 while (!list_empty(&vcpu->free_pages)) {
1019 struct kvm_mmu_page *page;
1020
1021 page = list_entry(vcpu->free_pages.next,
1022 struct kvm_mmu_page, link);
1023 list_del(&page->link);
1024 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1025 page->page_hpa = INVALID_PAGE;
1026 }
17ac10ad 1027 free_page((unsigned long)vcpu->mmu.pae_root);
6aa8b732
AK		 1028}
1029
1030static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1031{
17ac10ad 1032 struct page *page;
6aa8b732
AK		 1033 int i;
1034
1035 ASSERT(vcpu);
1036
1037 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
6aa8b732
AK		 1038 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1039
1040 INIT_LIST_HEAD(&page_header->link);
17ac10ad 1041 if ((page = alloc_page(GFP_KERNEL)) == NULL)
6aa8b732
AK		 1042 goto error_1;
1043 page->private = (unsigned long)page_header;
1044 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1045 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1046 list_add(&page_header->link, &vcpu->free_pages);
ebeace86 1047 ++vcpu->kvm->n_free_mmu_pages;
6aa8b732 1048 }
17ac10ad
AK		 1049
1050 /*
1051 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1052 * Therefore we need to allocate shadow page tables in the first
1053 * 4GB of memory, which happens to fit the DMA32 zone.
1054 */
1055 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1056 if (!page)
1057 goto error_1;
1058 vcpu->mmu.pae_root = page_address(page);
1059 for (i = 0; i < 4; ++i)
1060 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1061
6aa8b732
AK		 1062 return 0;
1063
1064error_1:
1065 free_mmu_pages(vcpu);
1066 return -ENOMEM;
1067}
1068
8018c27b 1069int kvm_mmu_create(struct kvm_vcpu *vcpu)
6aa8b732 1070{
6aa8b732
AK		 1071 ASSERT(vcpu);
1072 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1073 ASSERT(list_empty(&vcpu->free_pages));
1074
8018c27b
IM		 1075 return alloc_mmu_pages(vcpu);
1076}
6aa8b732 1077
8018c27b
IM		 1078int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1079{
1080 ASSERT(vcpu);
1081 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1082 ASSERT(!list_empty(&vcpu->free_pages));
2c264957 1083
8018c27b 1084 return init_kvm_mmu(vcpu);
6aa8b732
AK		 1085}
1086
1087void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1088{
1089 ASSERT(vcpu);
1090
1091 destroy_kvm_mmu(vcpu);
1092 free_mmu_pages(vcpu);
1093}
1094
1095void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
1096{
1097 struct kvm_mmu_page *page;
1098
1099 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1100 int i;
1101 u64 *pt;
1102
1103 if (!test_bit(slot, &page->slot_bitmap))
1104 continue;
1105
1106 pt = __va(page->page_hpa);
1107 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1108 /* avoid RMW */
cd4a4e53
AK		 1109 if (pt[i] & PT_WRITABLE_MASK) {
1110 rmap_remove(kvm, &pt[i]);
6aa8b732 1111 pt[i] &= ~PT_WRITABLE_MASK;
cd4a4e53 1112 }
6aa8b732
AK		 1113 }
1114}
Linux kernel - Deliverables
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