Commit | Line | Data |
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6aa8b732 AK |
1 | /* |
2 | * Kernel-based Virtual Machine driver for Linux | |
3 | * | |
4 | * This module enables machines with Intel VT-x extensions to run virtual | |
5 | * machines without emulation or binary translation. | |
6 | * | |
7 | * MMU support | |
8 | * | |
9 | * Copyright (C) 2006 Qumranet, Inc. | |
10 | * | |
11 | * Authors: | |
12 | * Yaniv Kamay <yaniv@qumranet.com> | |
13 | * Avi Kivity <avi@qumranet.com> | |
14 | * | |
15 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
16 | * the COPYING file in the top-level directory. | |
17 | * | |
18 | */ | |
19 | #include <linux/types.h> | |
20 | #include <linux/string.h> | |
21 | #include <asm/page.h> | |
22 | #include <linux/mm.h> | |
23 | #include <linux/highmem.h> | |
24 | #include <linux/module.h> | |
e663ee64 | 25 | #include <asm/cmpxchg.h> |
6aa8b732 AK |
26 | |
27 | #include "vmx.h" | |
28 | #include "kvm.h" | |
29 | ||
37a7d8b0 AK |
30 | #undef MMU_DEBUG |
31 | ||
32 | #undef AUDIT | |
33 | ||
34 | #ifdef AUDIT | |
35 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg); | |
36 | #else | |
37 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {} | |
38 | #endif | |
39 | ||
40 | #ifdef MMU_DEBUG | |
41 | ||
42 | #define pgprintk(x...) do { if (dbg) printk(x); } while (0) | |
43 | #define rmap_printk(x...) do { if (dbg) printk(x); } while (0) | |
44 | ||
45 | #else | |
46 | ||
47 | #define pgprintk(x...) do { } while (0) | |
48 | #define rmap_printk(x...) do { } while (0) | |
49 | ||
50 | #endif | |
51 | ||
52 | #if defined(MMU_DEBUG) || defined(AUDIT) | |
53 | static int dbg = 1; | |
54 | #endif | |
6aa8b732 | 55 | |
d6c69ee9 YD |
56 | #ifndef MMU_DEBUG |
57 | #define ASSERT(x) do { } while (0) | |
58 | #else | |
6aa8b732 AK |
59 | #define ASSERT(x) \ |
60 | if (!(x)) { \ | |
61 | printk(KERN_WARNING "assertion failed %s:%d: %s\n", \ | |
62 | __FILE__, __LINE__, #x); \ | |
63 | } | |
d6c69ee9 | 64 | #endif |
6aa8b732 | 65 | |
cea0f0e7 AK |
66 | #define PT64_PT_BITS 9 |
67 | #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS) | |
68 | #define PT32_PT_BITS 10 | |
69 | #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS) | |
6aa8b732 AK |
70 | |
71 | #define PT_WRITABLE_SHIFT 1 | |
72 | ||
73 | #define PT_PRESENT_MASK (1ULL << 0) | |
74 | #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT) | |
75 | #define PT_USER_MASK (1ULL << 2) | |
76 | #define PT_PWT_MASK (1ULL << 3) | |
77 | #define PT_PCD_MASK (1ULL << 4) | |
78 | #define PT_ACCESSED_MASK (1ULL << 5) | |
79 | #define PT_DIRTY_MASK (1ULL << 6) | |
80 | #define PT_PAGE_SIZE_MASK (1ULL << 7) | |
81 | #define PT_PAT_MASK (1ULL << 7) | |
82 | #define PT_GLOBAL_MASK (1ULL << 8) | |
83 | #define PT64_NX_MASK (1ULL << 63) | |
84 | ||
85 | #define PT_PAT_SHIFT 7 | |
86 | #define PT_DIR_PAT_SHIFT 12 | |
87 | #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT) | |
88 | ||
89 | #define PT32_DIR_PSE36_SIZE 4 | |
90 | #define PT32_DIR_PSE36_SHIFT 13 | |
91 | #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT) | |
92 | ||
93 | ||
6aa8b732 AK |
94 | #define PT_FIRST_AVAIL_BITS_SHIFT 9 |
95 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | |
96 | ||
6aa8b732 AK |
97 | #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT) |
98 | ||
6aa8b732 AK |
99 | #define VALID_PAGE(x) ((x) != INVALID_PAGE) |
100 | ||
101 | #define PT64_LEVEL_BITS 9 | |
102 | ||
103 | #define PT64_LEVEL_SHIFT(level) \ | |
104 | ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS ) | |
105 | ||
106 | #define PT64_LEVEL_MASK(level) \ | |
107 | (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level)) | |
108 | ||
109 | #define PT64_INDEX(address, level)\ | |
110 | (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1)) | |
111 | ||
112 | ||
113 | #define PT32_LEVEL_BITS 10 | |
114 | ||
115 | #define PT32_LEVEL_SHIFT(level) \ | |
116 | ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS ) | |
117 | ||
118 | #define PT32_LEVEL_MASK(level) \ | |
119 | (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level)) | |
120 | ||
121 | #define PT32_INDEX(address, level)\ | |
122 | (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1)) | |
123 | ||
124 | ||
27aba766 | 125 | #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1)) |
6aa8b732 AK |
126 | #define PT64_DIR_BASE_ADDR_MASK \ |
127 | (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1)) | |
128 | ||
129 | #define PT32_BASE_ADDR_MASK PAGE_MASK | |
130 | #define PT32_DIR_BASE_ADDR_MASK \ | |
131 | (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1)) | |
132 | ||
133 | ||
134 | #define PFERR_PRESENT_MASK (1U << 0) | |
135 | #define PFERR_WRITE_MASK (1U << 1) | |
136 | #define PFERR_USER_MASK (1U << 2) | |
73b1087e | 137 | #define PFERR_FETCH_MASK (1U << 4) |
6aa8b732 AK |
138 | |
139 | #define PT64_ROOT_LEVEL 4 | |
140 | #define PT32_ROOT_LEVEL 2 | |
141 | #define PT32E_ROOT_LEVEL 3 | |
142 | ||
143 | #define PT_DIRECTORY_LEVEL 2 | |
144 | #define PT_PAGE_TABLE_LEVEL 1 | |
145 | ||
cd4a4e53 AK |
146 | #define RMAP_EXT 4 |
147 | ||
148 | struct kvm_rmap_desc { | |
149 | u64 *shadow_ptes[RMAP_EXT]; | |
150 | struct kvm_rmap_desc *more; | |
151 | }; | |
152 | ||
b5a33a75 AK |
153 | static struct kmem_cache *pte_chain_cache; |
154 | static struct kmem_cache *rmap_desc_cache; | |
d3d25b04 AK |
155 | static struct kmem_cache *mmu_page_cache; |
156 | static struct kmem_cache *mmu_page_header_cache; | |
b5a33a75 | 157 | |
6aa8b732 AK |
158 | static int is_write_protection(struct kvm_vcpu *vcpu) |
159 | { | |
160 | return vcpu->cr0 & CR0_WP_MASK; | |
161 | } | |
162 | ||
163 | static int is_cpuid_PSE36(void) | |
164 | { | |
165 | return 1; | |
166 | } | |
167 | ||
73b1087e AK |
168 | static int is_nx(struct kvm_vcpu *vcpu) |
169 | { | |
170 | return vcpu->shadow_efer & EFER_NX; | |
171 | } | |
172 | ||
6aa8b732 AK |
173 | static int is_present_pte(unsigned long pte) |
174 | { | |
175 | return pte & PT_PRESENT_MASK; | |
176 | } | |
177 | ||
178 | static int is_writeble_pte(unsigned long pte) | |
179 | { | |
180 | return pte & PT_WRITABLE_MASK; | |
181 | } | |
182 | ||
183 | static int is_io_pte(unsigned long pte) | |
184 | { | |
185 | return pte & PT_SHADOW_IO_MARK; | |
186 | } | |
187 | ||
cd4a4e53 AK |
188 | static int is_rmap_pte(u64 pte) |
189 | { | |
190 | return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK)) | |
191 | == (PT_WRITABLE_MASK | PT_PRESENT_MASK); | |
192 | } | |
193 | ||
e663ee64 AK |
194 | static void set_shadow_pte(u64 *sptep, u64 spte) |
195 | { | |
196 | #ifdef CONFIG_X86_64 | |
197 | set_64bit((unsigned long *)sptep, spte); | |
198 | #else | |
199 | set_64bit((unsigned long long *)sptep, spte); | |
200 | #endif | |
201 | } | |
202 | ||
e2dec939 | 203 | static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache, |
8c438502 AK |
204 | struct kmem_cache *base_cache, int min, |
205 | gfp_t gfp_flags) | |
714b93da AK |
206 | { |
207 | void *obj; | |
208 | ||
209 | if (cache->nobjs >= min) | |
e2dec939 | 210 | return 0; |
714b93da | 211 | while (cache->nobjs < ARRAY_SIZE(cache->objects)) { |
8c438502 | 212 | obj = kmem_cache_zalloc(base_cache, gfp_flags); |
714b93da | 213 | if (!obj) |
e2dec939 | 214 | return -ENOMEM; |
714b93da AK |
215 | cache->objects[cache->nobjs++] = obj; |
216 | } | |
e2dec939 | 217 | return 0; |
714b93da AK |
218 | } |
219 | ||
220 | static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc) | |
221 | { | |
222 | while (mc->nobjs) | |
223 | kfree(mc->objects[--mc->nobjs]); | |
224 | } | |
225 | ||
8c438502 | 226 | static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags) |
714b93da | 227 | { |
e2dec939 AK |
228 | int r; |
229 | ||
230 | r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache, | |
8c438502 | 231 | pte_chain_cache, 4, gfp_flags); |
e2dec939 AK |
232 | if (r) |
233 | goto out; | |
234 | r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache, | |
8c438502 | 235 | rmap_desc_cache, 1, gfp_flags); |
d3d25b04 AK |
236 | if (r) |
237 | goto out; | |
238 | r = mmu_topup_memory_cache(&vcpu->mmu_page_cache, | |
239 | mmu_page_cache, 4, gfp_flags); | |
240 | if (r) | |
241 | goto out; | |
242 | r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache, | |
243 | mmu_page_header_cache, 4, gfp_flags); | |
e2dec939 AK |
244 | out: |
245 | return r; | |
714b93da AK |
246 | } |
247 | ||
8c438502 AK |
248 | static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu) |
249 | { | |
250 | int r; | |
251 | ||
252 | r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT); | |
253 | if (r < 0) { | |
254 | spin_unlock(&vcpu->kvm->lock); | |
255 | kvm_arch_ops->vcpu_put(vcpu); | |
256 | r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL); | |
257 | kvm_arch_ops->vcpu_load(vcpu); | |
258 | spin_lock(&vcpu->kvm->lock); | |
259 | } | |
260 | return r; | |
261 | } | |
262 | ||
714b93da AK |
263 | static void mmu_free_memory_caches(struct kvm_vcpu *vcpu) |
264 | { | |
265 | mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache); | |
266 | mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache); | |
d3d25b04 AK |
267 | mmu_free_memory_cache(&vcpu->mmu_page_cache); |
268 | mmu_free_memory_cache(&vcpu->mmu_page_header_cache); | |
714b93da AK |
269 | } |
270 | ||
271 | static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc, | |
272 | size_t size) | |
273 | { | |
274 | void *p; | |
275 | ||
276 | BUG_ON(!mc->nobjs); | |
277 | p = mc->objects[--mc->nobjs]; | |
278 | memset(p, 0, size); | |
279 | return p; | |
280 | } | |
281 | ||
282 | static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj) | |
283 | { | |
284 | if (mc->nobjs < KVM_NR_MEM_OBJS) | |
285 | mc->objects[mc->nobjs++] = obj; | |
286 | else | |
287 | kfree(obj); | |
288 | } | |
289 | ||
290 | static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu) | |
291 | { | |
292 | return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache, | |
293 | sizeof(struct kvm_pte_chain)); | |
294 | } | |
295 | ||
296 | static void mmu_free_pte_chain(struct kvm_vcpu *vcpu, | |
297 | struct kvm_pte_chain *pc) | |
298 | { | |
299 | mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc); | |
300 | } | |
301 | ||
302 | static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu) | |
303 | { | |
304 | return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache, | |
305 | sizeof(struct kvm_rmap_desc)); | |
306 | } | |
307 | ||
308 | static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu, | |
309 | struct kvm_rmap_desc *rd) | |
310 | { | |
311 | mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd); | |
312 | } | |
313 | ||
cd4a4e53 AK |
314 | /* |
315 | * Reverse mapping data structures: | |
316 | * | |
317 | * If page->private bit zero is zero, then page->private points to the | |
318 | * shadow page table entry that points to page_address(page). | |
319 | * | |
320 | * If page->private bit zero is one, (then page->private & ~1) points | |
321 | * to a struct kvm_rmap_desc containing more mappings. | |
322 | */ | |
714b93da | 323 | static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
324 | { |
325 | struct page *page; | |
326 | struct kvm_rmap_desc *desc; | |
327 | int i; | |
328 | ||
329 | if (!is_rmap_pte(*spte)) | |
330 | return; | |
331 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 332 | if (!page_private(page)) { |
cd4a4e53 | 333 | rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte); |
5972e953 MR |
334 | set_page_private(page,(unsigned long)spte); |
335 | } else if (!(page_private(page) & 1)) { | |
cd4a4e53 | 336 | rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte); |
714b93da | 337 | desc = mmu_alloc_rmap_desc(vcpu); |
5972e953 | 338 | desc->shadow_ptes[0] = (u64 *)page_private(page); |
cd4a4e53 | 339 | desc->shadow_ptes[1] = spte; |
5972e953 | 340 | set_page_private(page,(unsigned long)desc | 1); |
cd4a4e53 AK |
341 | } else { |
342 | rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte); | |
5972e953 | 343 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
344 | while (desc->shadow_ptes[RMAP_EXT-1] && desc->more) |
345 | desc = desc->more; | |
346 | if (desc->shadow_ptes[RMAP_EXT-1]) { | |
714b93da | 347 | desc->more = mmu_alloc_rmap_desc(vcpu); |
cd4a4e53 AK |
348 | desc = desc->more; |
349 | } | |
350 | for (i = 0; desc->shadow_ptes[i]; ++i) | |
351 | ; | |
352 | desc->shadow_ptes[i] = spte; | |
353 | } | |
354 | } | |
355 | ||
714b93da AK |
356 | static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu, |
357 | struct page *page, | |
cd4a4e53 AK |
358 | struct kvm_rmap_desc *desc, |
359 | int i, | |
360 | struct kvm_rmap_desc *prev_desc) | |
361 | { | |
362 | int j; | |
363 | ||
364 | for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j) | |
365 | ; | |
366 | desc->shadow_ptes[i] = desc->shadow_ptes[j]; | |
11718b4d | 367 | desc->shadow_ptes[j] = NULL; |
cd4a4e53 AK |
368 | if (j != 0) |
369 | return; | |
370 | if (!prev_desc && !desc->more) | |
5972e953 | 371 | set_page_private(page,(unsigned long)desc->shadow_ptes[0]); |
cd4a4e53 AK |
372 | else |
373 | if (prev_desc) | |
374 | prev_desc->more = desc->more; | |
375 | else | |
5972e953 | 376 | set_page_private(page,(unsigned long)desc->more | 1); |
714b93da | 377 | mmu_free_rmap_desc(vcpu, desc); |
cd4a4e53 AK |
378 | } |
379 | ||
714b93da | 380 | static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte) |
cd4a4e53 AK |
381 | { |
382 | struct page *page; | |
383 | struct kvm_rmap_desc *desc; | |
384 | struct kvm_rmap_desc *prev_desc; | |
385 | int i; | |
386 | ||
387 | if (!is_rmap_pte(*spte)) | |
388 | return; | |
389 | page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT); | |
5972e953 | 390 | if (!page_private(page)) { |
cd4a4e53 AK |
391 | printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte); |
392 | BUG(); | |
5972e953 | 393 | } else if (!(page_private(page) & 1)) { |
cd4a4e53 | 394 | rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte); |
5972e953 | 395 | if ((u64 *)page_private(page) != spte) { |
cd4a4e53 AK |
396 | printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n", |
397 | spte, *spte); | |
398 | BUG(); | |
399 | } | |
5972e953 | 400 | set_page_private(page,0); |
cd4a4e53 AK |
401 | } else { |
402 | rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte); | |
5972e953 | 403 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
cd4a4e53 AK |
404 | prev_desc = NULL; |
405 | while (desc) { | |
406 | for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) | |
407 | if (desc->shadow_ptes[i] == spte) { | |
714b93da AK |
408 | rmap_desc_remove_entry(vcpu, page, |
409 | desc, i, | |
cd4a4e53 AK |
410 | prev_desc); |
411 | return; | |
412 | } | |
413 | prev_desc = desc; | |
414 | desc = desc->more; | |
415 | } | |
416 | BUG(); | |
417 | } | |
418 | } | |
419 | ||
714b93da | 420 | static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn) |
374cbac0 | 421 | { |
714b93da | 422 | struct kvm *kvm = vcpu->kvm; |
374cbac0 | 423 | struct page *page; |
374cbac0 AK |
424 | struct kvm_rmap_desc *desc; |
425 | u64 *spte; | |
426 | ||
954bbbc2 AK |
427 | page = gfn_to_page(kvm, gfn); |
428 | BUG_ON(!page); | |
374cbac0 | 429 | |
5972e953 MR |
430 | while (page_private(page)) { |
431 | if (!(page_private(page) & 1)) | |
432 | spte = (u64 *)page_private(page); | |
374cbac0 | 433 | else { |
5972e953 | 434 | desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul); |
374cbac0 AK |
435 | spte = desc->shadow_ptes[0]; |
436 | } | |
437 | BUG_ON(!spte); | |
27aba766 AK |
438 | BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT |
439 | != page_to_pfn(page)); | |
374cbac0 AK |
440 | BUG_ON(!(*spte & PT_PRESENT_MASK)); |
441 | BUG_ON(!(*spte & PT_WRITABLE_MASK)); | |
442 | rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte); | |
714b93da | 443 | rmap_remove(vcpu, spte); |
40907d57 | 444 | kvm_arch_ops->tlb_flush(vcpu); |
e663ee64 | 445 | set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK); |
374cbac0 AK |
446 | } |
447 | } | |
448 | ||
d6c69ee9 | 449 | #ifdef MMU_DEBUG |
47ad8e68 | 450 | static int is_empty_shadow_page(u64 *spt) |
6aa8b732 | 451 | { |
139bdb2d AK |
452 | u64 *pos; |
453 | u64 *end; | |
454 | ||
47ad8e68 | 455 | for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++) |
139bdb2d AK |
456 | if (*pos != 0) { |
457 | printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__, | |
458 | pos, *pos); | |
6aa8b732 | 459 | return 0; |
139bdb2d | 460 | } |
6aa8b732 AK |
461 | return 1; |
462 | } | |
d6c69ee9 | 463 | #endif |
6aa8b732 | 464 | |
4b02d6da AK |
465 | static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, |
466 | struct kvm_mmu_page *page_head) | |
260746c0 | 467 | { |
47ad8e68 | 468 | ASSERT(is_empty_shadow_page(page_head->spt)); |
d3d25b04 AK |
469 | list_del(&page_head->link); |
470 | mmu_memory_cache_free(&vcpu->mmu_page_cache, page_head->spt); | |
471 | mmu_memory_cache_free(&vcpu->mmu_page_header_cache, page_head); | |
260746c0 AK |
472 | ++vcpu->kvm->n_free_mmu_pages; |
473 | } | |
474 | ||
cea0f0e7 AK |
475 | static unsigned kvm_page_table_hashfn(gfn_t gfn) |
476 | { | |
477 | return gfn; | |
478 | } | |
479 | ||
25c0de2c AK |
480 | static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu, |
481 | u64 *parent_pte) | |
6aa8b732 AK |
482 | { |
483 | struct kvm_mmu_page *page; | |
484 | ||
d3d25b04 | 485 | if (!vcpu->kvm->n_free_mmu_pages) |
25c0de2c | 486 | return NULL; |
6aa8b732 | 487 | |
d3d25b04 AK |
488 | page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache, |
489 | sizeof *page); | |
490 | page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE); | |
491 | set_page_private(virt_to_page(page->spt), (unsigned long)page); | |
492 | list_add(&page->link, &vcpu->kvm->active_mmu_pages); | |
47ad8e68 | 493 | ASSERT(is_empty_shadow_page(page->spt)); |
6aa8b732 | 494 | page->slot_bitmap = 0; |
cea0f0e7 | 495 | page->multimapped = 0; |
6aa8b732 | 496 | page->parent_pte = parent_pte; |
ebeace86 | 497 | --vcpu->kvm->n_free_mmu_pages; |
25c0de2c | 498 | return page; |
6aa8b732 AK |
499 | } |
500 | ||
714b93da AK |
501 | static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu, |
502 | struct kvm_mmu_page *page, u64 *parent_pte) | |
cea0f0e7 AK |
503 | { |
504 | struct kvm_pte_chain *pte_chain; | |
505 | struct hlist_node *node; | |
506 | int i; | |
507 | ||
508 | if (!parent_pte) | |
509 | return; | |
510 | if (!page->multimapped) { | |
511 | u64 *old = page->parent_pte; | |
512 | ||
513 | if (!old) { | |
514 | page->parent_pte = parent_pte; | |
515 | return; | |
516 | } | |
517 | page->multimapped = 1; | |
714b93da | 518 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
519 | INIT_HLIST_HEAD(&page->parent_ptes); |
520 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
521 | pte_chain->parent_ptes[0] = old; | |
522 | } | |
523 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) { | |
524 | if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1]) | |
525 | continue; | |
526 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) | |
527 | if (!pte_chain->parent_ptes[i]) { | |
528 | pte_chain->parent_ptes[i] = parent_pte; | |
529 | return; | |
530 | } | |
531 | } | |
714b93da | 532 | pte_chain = mmu_alloc_pte_chain(vcpu); |
cea0f0e7 AK |
533 | BUG_ON(!pte_chain); |
534 | hlist_add_head(&pte_chain->link, &page->parent_ptes); | |
535 | pte_chain->parent_ptes[0] = parent_pte; | |
536 | } | |
537 | ||
714b93da AK |
538 | static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu, |
539 | struct kvm_mmu_page *page, | |
cea0f0e7 AK |
540 | u64 *parent_pte) |
541 | { | |
542 | struct kvm_pte_chain *pte_chain; | |
543 | struct hlist_node *node; | |
544 | int i; | |
545 | ||
546 | if (!page->multimapped) { | |
547 | BUG_ON(page->parent_pte != parent_pte); | |
548 | page->parent_pte = NULL; | |
549 | return; | |
550 | } | |
551 | hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) | |
552 | for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) { | |
553 | if (!pte_chain->parent_ptes[i]) | |
554 | break; | |
555 | if (pte_chain->parent_ptes[i] != parent_pte) | |
556 | continue; | |
697fe2e2 AK |
557 | while (i + 1 < NR_PTE_CHAIN_ENTRIES |
558 | && pte_chain->parent_ptes[i + 1]) { | |
cea0f0e7 AK |
559 | pte_chain->parent_ptes[i] |
560 | = pte_chain->parent_ptes[i + 1]; | |
561 | ++i; | |
562 | } | |
563 | pte_chain->parent_ptes[i] = NULL; | |
697fe2e2 AK |
564 | if (i == 0) { |
565 | hlist_del(&pte_chain->link); | |
714b93da | 566 | mmu_free_pte_chain(vcpu, pte_chain); |
697fe2e2 AK |
567 | if (hlist_empty(&page->parent_ptes)) { |
568 | page->multimapped = 0; | |
569 | page->parent_pte = NULL; | |
570 | } | |
571 | } | |
cea0f0e7 AK |
572 | return; |
573 | } | |
574 | BUG(); | |
575 | } | |
576 | ||
577 | static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu, | |
578 | gfn_t gfn) | |
579 | { | |
580 | unsigned index; | |
581 | struct hlist_head *bucket; | |
582 | struct kvm_mmu_page *page; | |
583 | struct hlist_node *node; | |
584 | ||
585 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
586 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
587 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
588 | hlist_for_each_entry(page, node, bucket, hash_link) | |
589 | if (page->gfn == gfn && !page->role.metaphysical) { | |
590 | pgprintk("%s: found role %x\n", | |
591 | __FUNCTION__, page->role.word); | |
592 | return page; | |
593 | } | |
594 | return NULL; | |
595 | } | |
596 | ||
597 | static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu, | |
598 | gfn_t gfn, | |
599 | gva_t gaddr, | |
600 | unsigned level, | |
601 | int metaphysical, | |
d28c6cfb | 602 | unsigned hugepage_access, |
cea0f0e7 AK |
603 | u64 *parent_pte) |
604 | { | |
605 | union kvm_mmu_page_role role; | |
606 | unsigned index; | |
607 | unsigned quadrant; | |
608 | struct hlist_head *bucket; | |
609 | struct kvm_mmu_page *page; | |
610 | struct hlist_node *node; | |
611 | ||
612 | role.word = 0; | |
613 | role.glevels = vcpu->mmu.root_level; | |
614 | role.level = level; | |
615 | role.metaphysical = metaphysical; | |
d28c6cfb | 616 | role.hugepage_access = hugepage_access; |
cea0f0e7 AK |
617 | if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) { |
618 | quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level)); | |
619 | quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1; | |
620 | role.quadrant = quadrant; | |
621 | } | |
622 | pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__, | |
623 | gfn, role.word); | |
624 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
625 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
626 | hlist_for_each_entry(page, node, bucket, hash_link) | |
627 | if (page->gfn == gfn && page->role.word == role.word) { | |
714b93da | 628 | mmu_page_add_parent_pte(vcpu, page, parent_pte); |
cea0f0e7 AK |
629 | pgprintk("%s: found\n", __FUNCTION__); |
630 | return page; | |
631 | } | |
632 | page = kvm_mmu_alloc_page(vcpu, parent_pte); | |
633 | if (!page) | |
634 | return page; | |
635 | pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word); | |
636 | page->gfn = gfn; | |
637 | page->role = role; | |
638 | hlist_add_head(&page->hash_link, bucket); | |
374cbac0 | 639 | if (!metaphysical) |
714b93da | 640 | rmap_write_protect(vcpu, gfn); |
cea0f0e7 AK |
641 | return page; |
642 | } | |
643 | ||
a436036b AK |
644 | static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu, |
645 | struct kvm_mmu_page *page) | |
646 | { | |
697fe2e2 AK |
647 | unsigned i; |
648 | u64 *pt; | |
649 | u64 ent; | |
650 | ||
47ad8e68 | 651 | pt = page->spt; |
697fe2e2 AK |
652 | |
653 | if (page->role.level == PT_PAGE_TABLE_LEVEL) { | |
654 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
655 | if (pt[i] & PT_PRESENT_MASK) | |
714b93da | 656 | rmap_remove(vcpu, &pt[i]); |
697fe2e2 AK |
657 | pt[i] = 0; |
658 | } | |
40907d57 | 659 | kvm_arch_ops->tlb_flush(vcpu); |
697fe2e2 AK |
660 | return; |
661 | } | |
662 | ||
663 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
664 | ent = pt[i]; | |
665 | ||
666 | pt[i] = 0; | |
667 | if (!(ent & PT_PRESENT_MASK)) | |
668 | continue; | |
669 | ent &= PT64_BASE_ADDR_MASK; | |
714b93da | 670 | mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]); |
697fe2e2 | 671 | } |
a436036b AK |
672 | } |
673 | ||
cea0f0e7 AK |
674 | static void kvm_mmu_put_page(struct kvm_vcpu *vcpu, |
675 | struct kvm_mmu_page *page, | |
676 | u64 *parent_pte) | |
677 | { | |
714b93da | 678 | mmu_page_remove_parent_pte(vcpu, page, parent_pte); |
a436036b AK |
679 | } |
680 | ||
681 | static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu, | |
682 | struct kvm_mmu_page *page) | |
683 | { | |
684 | u64 *parent_pte; | |
685 | ||
686 | while (page->multimapped || page->parent_pte) { | |
687 | if (!page->multimapped) | |
688 | parent_pte = page->parent_pte; | |
689 | else { | |
690 | struct kvm_pte_chain *chain; | |
691 | ||
692 | chain = container_of(page->parent_ptes.first, | |
693 | struct kvm_pte_chain, link); | |
694 | parent_pte = chain->parent_ptes[0]; | |
695 | } | |
697fe2e2 | 696 | BUG_ON(!parent_pte); |
a436036b | 697 | kvm_mmu_put_page(vcpu, page, parent_pte); |
e663ee64 | 698 | set_shadow_pte(parent_pte, 0); |
a436036b | 699 | } |
cc4529ef | 700 | kvm_mmu_page_unlink_children(vcpu, page); |
3bb65a22 AK |
701 | if (!page->root_count) { |
702 | hlist_del(&page->hash_link); | |
4b02d6da | 703 | kvm_mmu_free_page(vcpu, page); |
36868f7b AK |
704 | } else |
705 | list_move(&page->link, &vcpu->kvm->active_mmu_pages); | |
a436036b AK |
706 | } |
707 | ||
708 | static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn) | |
709 | { | |
710 | unsigned index; | |
711 | struct hlist_head *bucket; | |
712 | struct kvm_mmu_page *page; | |
713 | struct hlist_node *node, *n; | |
714 | int r; | |
715 | ||
716 | pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn); | |
717 | r = 0; | |
718 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; | |
719 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
720 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) | |
721 | if (page->gfn == gfn && !page->role.metaphysical) { | |
697fe2e2 AK |
722 | pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn, |
723 | page->role.word); | |
a436036b AK |
724 | kvm_mmu_zap_page(vcpu, page); |
725 | r = 1; | |
726 | } | |
727 | return r; | |
cea0f0e7 AK |
728 | } |
729 | ||
97a0a01e AK |
730 | static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn) |
731 | { | |
732 | struct kvm_mmu_page *page; | |
733 | ||
734 | while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) { | |
735 | pgprintk("%s: zap %lx %x\n", | |
736 | __FUNCTION__, gfn, page->role.word); | |
737 | kvm_mmu_zap_page(vcpu, page); | |
738 | } | |
739 | } | |
740 | ||
6aa8b732 AK |
741 | static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa) |
742 | { | |
743 | int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT)); | |
744 | struct kvm_mmu_page *page_head = page_header(__pa(pte)); | |
745 | ||
746 | __set_bit(slot, &page_head->slot_bitmap); | |
747 | } | |
748 | ||
749 | hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
750 | { | |
751 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
752 | ||
753 | return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa; | |
754 | } | |
755 | ||
756 | hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa) | |
757 | { | |
6aa8b732 AK |
758 | struct page *page; |
759 | ||
760 | ASSERT((gpa & HPA_ERR_MASK) == 0); | |
954bbbc2 AK |
761 | page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT); |
762 | if (!page) | |
6aa8b732 | 763 | return gpa | HPA_ERR_MASK; |
6aa8b732 AK |
764 | return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) |
765 | | (gpa & (PAGE_SIZE-1)); | |
766 | } | |
767 | ||
768 | hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva) | |
769 | { | |
770 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
771 | ||
772 | if (gpa == UNMAPPED_GVA) | |
773 | return UNMAPPED_GVA; | |
774 | return gpa_to_hpa(vcpu, gpa); | |
775 | } | |
776 | ||
039576c0 AK |
777 | struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva) |
778 | { | |
779 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
780 | ||
781 | if (gpa == UNMAPPED_GVA) | |
782 | return NULL; | |
783 | return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT); | |
784 | } | |
785 | ||
6aa8b732 AK |
786 | static void nonpaging_new_cr3(struct kvm_vcpu *vcpu) |
787 | { | |
788 | } | |
789 | ||
790 | static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p) | |
791 | { | |
792 | int level = PT32E_ROOT_LEVEL; | |
793 | hpa_t table_addr = vcpu->mmu.root_hpa; | |
794 | ||
795 | for (; ; level--) { | |
796 | u32 index = PT64_INDEX(v, level); | |
797 | u64 *table; | |
cea0f0e7 | 798 | u64 pte; |
6aa8b732 AK |
799 | |
800 | ASSERT(VALID_PAGE(table_addr)); | |
801 | table = __va(table_addr); | |
802 | ||
803 | if (level == 1) { | |
cea0f0e7 AK |
804 | pte = table[index]; |
805 | if (is_present_pte(pte) && is_writeble_pte(pte)) | |
806 | return 0; | |
6aa8b732 AK |
807 | mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT); |
808 | page_header_update_slot(vcpu->kvm, table, v); | |
809 | table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK | | |
810 | PT_USER_MASK; | |
714b93da | 811 | rmap_add(vcpu, &table[index]); |
6aa8b732 AK |
812 | return 0; |
813 | } | |
814 | ||
815 | if (table[index] == 0) { | |
25c0de2c | 816 | struct kvm_mmu_page *new_table; |
cea0f0e7 | 817 | gfn_t pseudo_gfn; |
6aa8b732 | 818 | |
cea0f0e7 AK |
819 | pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK) |
820 | >> PAGE_SHIFT; | |
821 | new_table = kvm_mmu_get_page(vcpu, pseudo_gfn, | |
822 | v, level - 1, | |
d28c6cfb | 823 | 1, 0, &table[index]); |
25c0de2c | 824 | if (!new_table) { |
6aa8b732 AK |
825 | pgprintk("nonpaging_map: ENOMEM\n"); |
826 | return -ENOMEM; | |
827 | } | |
828 | ||
47ad8e68 | 829 | table[index] = __pa(new_table->spt) | PT_PRESENT_MASK |
25c0de2c | 830 | | PT_WRITABLE_MASK | PT_USER_MASK; |
6aa8b732 AK |
831 | } |
832 | table_addr = table[index] & PT64_BASE_ADDR_MASK; | |
833 | } | |
834 | } | |
835 | ||
17ac10ad AK |
836 | static void mmu_free_roots(struct kvm_vcpu *vcpu) |
837 | { | |
838 | int i; | |
3bb65a22 | 839 | struct kvm_mmu_page *page; |
17ac10ad AK |
840 | |
841 | #ifdef CONFIG_X86_64 | |
842 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
843 | hpa_t root = vcpu->mmu.root_hpa; | |
844 | ||
845 | ASSERT(VALID_PAGE(root)); | |
3bb65a22 AK |
846 | page = page_header(root); |
847 | --page->root_count; | |
17ac10ad AK |
848 | vcpu->mmu.root_hpa = INVALID_PAGE; |
849 | return; | |
850 | } | |
851 | #endif | |
852 | for (i = 0; i < 4; ++i) { | |
853 | hpa_t root = vcpu->mmu.pae_root[i]; | |
854 | ||
417726a3 AK |
855 | if (root) { |
856 | ASSERT(VALID_PAGE(root)); | |
857 | root &= PT64_BASE_ADDR_MASK; | |
858 | page = page_header(root); | |
859 | --page->root_count; | |
860 | } | |
17ac10ad AK |
861 | vcpu->mmu.pae_root[i] = INVALID_PAGE; |
862 | } | |
863 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
864 | } | |
865 | ||
866 | static void mmu_alloc_roots(struct kvm_vcpu *vcpu) | |
867 | { | |
868 | int i; | |
cea0f0e7 | 869 | gfn_t root_gfn; |
3bb65a22 AK |
870 | struct kvm_mmu_page *page; |
871 | ||
cea0f0e7 | 872 | root_gfn = vcpu->cr3 >> PAGE_SHIFT; |
17ac10ad AK |
873 | |
874 | #ifdef CONFIG_X86_64 | |
875 | if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) { | |
876 | hpa_t root = vcpu->mmu.root_hpa; | |
877 | ||
878 | ASSERT(!VALID_PAGE(root)); | |
68a99f6d | 879 | page = kvm_mmu_get_page(vcpu, root_gfn, 0, |
d28c6cfb | 880 | PT64_ROOT_LEVEL, 0, 0, NULL); |
47ad8e68 | 881 | root = __pa(page->spt); |
3bb65a22 | 882 | ++page->root_count; |
17ac10ad AK |
883 | vcpu->mmu.root_hpa = root; |
884 | return; | |
885 | } | |
886 | #endif | |
887 | for (i = 0; i < 4; ++i) { | |
888 | hpa_t root = vcpu->mmu.pae_root[i]; | |
889 | ||
890 | ASSERT(!VALID_PAGE(root)); | |
417726a3 AK |
891 | if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) { |
892 | if (!is_present_pte(vcpu->pdptrs[i])) { | |
893 | vcpu->mmu.pae_root[i] = 0; | |
894 | continue; | |
895 | } | |
cea0f0e7 | 896 | root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT; |
417726a3 | 897 | } else if (vcpu->mmu.root_level == 0) |
cea0f0e7 | 898 | root_gfn = 0; |
68a99f6d | 899 | page = kvm_mmu_get_page(vcpu, root_gfn, i << 30, |
cea0f0e7 | 900 | PT32_ROOT_LEVEL, !is_paging(vcpu), |
d28c6cfb | 901 | 0, NULL); |
47ad8e68 | 902 | root = __pa(page->spt); |
3bb65a22 | 903 | ++page->root_count; |
17ac10ad AK |
904 | vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK; |
905 | } | |
906 | vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root); | |
907 | } | |
908 | ||
6aa8b732 AK |
909 | static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr) |
910 | { | |
911 | return vaddr; | |
912 | } | |
913 | ||
914 | static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva, | |
915 | u32 error_code) | |
916 | { | |
6aa8b732 | 917 | gpa_t addr = gva; |
ebeace86 | 918 | hpa_t paddr; |
e2dec939 | 919 | int r; |
6aa8b732 | 920 | |
e2dec939 AK |
921 | r = mmu_topup_memory_caches(vcpu); |
922 | if (r) | |
923 | return r; | |
714b93da | 924 | |
6aa8b732 AK |
925 | ASSERT(vcpu); |
926 | ASSERT(VALID_PAGE(vcpu->mmu.root_hpa)); | |
927 | ||
6aa8b732 | 928 | |
ebeace86 | 929 | paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK); |
6aa8b732 | 930 | |
ebeace86 AK |
931 | if (is_error_hpa(paddr)) |
932 | return 1; | |
6aa8b732 | 933 | |
ebeace86 | 934 | return nonpaging_map(vcpu, addr & PAGE_MASK, paddr); |
6aa8b732 AK |
935 | } |
936 | ||
6aa8b732 AK |
937 | static void nonpaging_free(struct kvm_vcpu *vcpu) |
938 | { | |
17ac10ad | 939 | mmu_free_roots(vcpu); |
6aa8b732 AK |
940 | } |
941 | ||
942 | static int nonpaging_init_context(struct kvm_vcpu *vcpu) | |
943 | { | |
944 | struct kvm_mmu *context = &vcpu->mmu; | |
945 | ||
946 | context->new_cr3 = nonpaging_new_cr3; | |
947 | context->page_fault = nonpaging_page_fault; | |
6aa8b732 AK |
948 | context->gva_to_gpa = nonpaging_gva_to_gpa; |
949 | context->free = nonpaging_free; | |
cea0f0e7 | 950 | context->root_level = 0; |
6aa8b732 | 951 | context->shadow_root_level = PT32E_ROOT_LEVEL; |
17ac10ad | 952 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
953 | ASSERT(VALID_PAGE(context->root_hpa)); |
954 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa); | |
955 | return 0; | |
956 | } | |
957 | ||
6aa8b732 AK |
958 | static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu) |
959 | { | |
1165f5fe | 960 | ++vcpu->stat.tlb_flush; |
6aa8b732 AK |
961 | kvm_arch_ops->tlb_flush(vcpu); |
962 | } | |
963 | ||
964 | static void paging_new_cr3(struct kvm_vcpu *vcpu) | |
965 | { | |
374cbac0 | 966 | pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3); |
cea0f0e7 | 967 | mmu_free_roots(vcpu); |
7f7417d6 IM |
968 | if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES)) |
969 | kvm_mmu_free_some_pages(vcpu); | |
cea0f0e7 | 970 | mmu_alloc_roots(vcpu); |
6aa8b732 | 971 | kvm_mmu_flush_tlb(vcpu); |
cea0f0e7 | 972 | kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa); |
6aa8b732 AK |
973 | } |
974 | ||
6aa8b732 AK |
975 | static void inject_page_fault(struct kvm_vcpu *vcpu, |
976 | u64 addr, | |
977 | u32 err_code) | |
978 | { | |
979 | kvm_arch_ops->inject_page_fault(vcpu, addr, err_code); | |
980 | } | |
981 | ||
6aa8b732 AK |
982 | static void paging_free(struct kvm_vcpu *vcpu) |
983 | { | |
984 | nonpaging_free(vcpu); | |
985 | } | |
986 | ||
987 | #define PTTYPE 64 | |
988 | #include "paging_tmpl.h" | |
989 | #undef PTTYPE | |
990 | ||
991 | #define PTTYPE 32 | |
992 | #include "paging_tmpl.h" | |
993 | #undef PTTYPE | |
994 | ||
17ac10ad | 995 | static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level) |
6aa8b732 AK |
996 | { |
997 | struct kvm_mmu *context = &vcpu->mmu; | |
998 | ||
999 | ASSERT(is_pae(vcpu)); | |
1000 | context->new_cr3 = paging_new_cr3; | |
1001 | context->page_fault = paging64_page_fault; | |
6aa8b732 AK |
1002 | context->gva_to_gpa = paging64_gva_to_gpa; |
1003 | context->free = paging_free; | |
17ac10ad AK |
1004 | context->root_level = level; |
1005 | context->shadow_root_level = level; | |
1006 | mmu_alloc_roots(vcpu); | |
6aa8b732 AK |
1007 | ASSERT(VALID_PAGE(context->root_hpa)); |
1008 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1009 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1010 | return 0; | |
1011 | } | |
1012 | ||
17ac10ad AK |
1013 | static int paging64_init_context(struct kvm_vcpu *vcpu) |
1014 | { | |
1015 | return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL); | |
1016 | } | |
1017 | ||
6aa8b732 AK |
1018 | static int paging32_init_context(struct kvm_vcpu *vcpu) |
1019 | { | |
1020 | struct kvm_mmu *context = &vcpu->mmu; | |
1021 | ||
1022 | context->new_cr3 = paging_new_cr3; | |
1023 | context->page_fault = paging32_page_fault; | |
6aa8b732 AK |
1024 | context->gva_to_gpa = paging32_gva_to_gpa; |
1025 | context->free = paging_free; | |
1026 | context->root_level = PT32_ROOT_LEVEL; | |
1027 | context->shadow_root_level = PT32E_ROOT_LEVEL; | |
17ac10ad | 1028 | mmu_alloc_roots(vcpu); |
6aa8b732 AK |
1029 | ASSERT(VALID_PAGE(context->root_hpa)); |
1030 | kvm_arch_ops->set_cr3(vcpu, context->root_hpa | | |
1031 | (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK))); | |
1032 | return 0; | |
1033 | } | |
1034 | ||
1035 | static int paging32E_init_context(struct kvm_vcpu *vcpu) | |
1036 | { | |
17ac10ad | 1037 | return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL); |
6aa8b732 AK |
1038 | } |
1039 | ||
1040 | static int init_kvm_mmu(struct kvm_vcpu *vcpu) | |
1041 | { | |
1042 | ASSERT(vcpu); | |
1043 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
1044 | ||
d3d25b04 | 1045 | mmu_topup_memory_caches(vcpu); |
6aa8b732 AK |
1046 | if (!is_paging(vcpu)) |
1047 | return nonpaging_init_context(vcpu); | |
a9058ecd | 1048 | else if (is_long_mode(vcpu)) |
6aa8b732 AK |
1049 | return paging64_init_context(vcpu); |
1050 | else if (is_pae(vcpu)) | |
1051 | return paging32E_init_context(vcpu); | |
1052 | else | |
1053 | return paging32_init_context(vcpu); | |
1054 | } | |
1055 | ||
1056 | static void destroy_kvm_mmu(struct kvm_vcpu *vcpu) | |
1057 | { | |
1058 | ASSERT(vcpu); | |
1059 | if (VALID_PAGE(vcpu->mmu.root_hpa)) { | |
1060 | vcpu->mmu.free(vcpu); | |
1061 | vcpu->mmu.root_hpa = INVALID_PAGE; | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu) | |
1066 | { | |
714b93da AK |
1067 | int r; |
1068 | ||
6aa8b732 | 1069 | destroy_kvm_mmu(vcpu); |
714b93da AK |
1070 | r = init_kvm_mmu(vcpu); |
1071 | if (r < 0) | |
1072 | goto out; | |
e2dec939 | 1073 | r = mmu_topup_memory_caches(vcpu); |
714b93da AK |
1074 | out: |
1075 | return r; | |
6aa8b732 AK |
1076 | } |
1077 | ||
09072daf | 1078 | static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu, |
ac1b714e AK |
1079 | struct kvm_mmu_page *page, |
1080 | u64 *spte) | |
1081 | { | |
1082 | u64 pte; | |
1083 | struct kvm_mmu_page *child; | |
1084 | ||
1085 | pte = *spte; | |
1086 | if (is_present_pte(pte)) { | |
1087 | if (page->role.level == PT_PAGE_TABLE_LEVEL) | |
1088 | rmap_remove(vcpu, spte); | |
1089 | else { | |
1090 | child = page_header(pte & PT64_BASE_ADDR_MASK); | |
1091 | mmu_page_remove_parent_pte(vcpu, child, spte); | |
1092 | } | |
1093 | } | |
1094 | *spte = 0; | |
1095 | } | |
1096 | ||
0028425f AK |
1097 | static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu, |
1098 | struct kvm_mmu_page *page, | |
1099 | u64 *spte, | |
1100 | const void *new, int bytes) | |
1101 | { | |
1102 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1103 | return; | |
1104 | ||
1105 | if (page->role.glevels == PT32_ROOT_LEVEL) | |
1106 | paging32_update_pte(vcpu, page, spte, new, bytes); | |
1107 | else | |
1108 | paging64_update_pte(vcpu, page, spte, new, bytes); | |
1109 | } | |
1110 | ||
09072daf AK |
1111 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
1112 | const u8 *old, const u8 *new, int bytes) | |
da4a00f0 | 1113 | { |
9b7a0325 AK |
1114 | gfn_t gfn = gpa >> PAGE_SHIFT; |
1115 | struct kvm_mmu_page *page; | |
0e7bc4b9 | 1116 | struct hlist_node *node, *n; |
9b7a0325 AK |
1117 | struct hlist_head *bucket; |
1118 | unsigned index; | |
1119 | u64 *spte; | |
9b7a0325 | 1120 | unsigned offset = offset_in_page(gpa); |
0e7bc4b9 | 1121 | unsigned pte_size; |
9b7a0325 | 1122 | unsigned page_offset; |
0e7bc4b9 | 1123 | unsigned misaligned; |
fce0657f | 1124 | unsigned quadrant; |
9b7a0325 | 1125 | int level; |
86a5ba02 | 1126 | int flooded = 0; |
ac1b714e | 1127 | int npte; |
9b7a0325 | 1128 | |
da4a00f0 | 1129 | pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes); |
86a5ba02 AK |
1130 | if (gfn == vcpu->last_pt_write_gfn) { |
1131 | ++vcpu->last_pt_write_count; | |
1132 | if (vcpu->last_pt_write_count >= 3) | |
1133 | flooded = 1; | |
1134 | } else { | |
1135 | vcpu->last_pt_write_gfn = gfn; | |
1136 | vcpu->last_pt_write_count = 1; | |
1137 | } | |
9b7a0325 AK |
1138 | index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES; |
1139 | bucket = &vcpu->kvm->mmu_page_hash[index]; | |
0e7bc4b9 | 1140 | hlist_for_each_entry_safe(page, node, n, bucket, hash_link) { |
9b7a0325 AK |
1141 | if (page->gfn != gfn || page->role.metaphysical) |
1142 | continue; | |
0e7bc4b9 AK |
1143 | pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8; |
1144 | misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1); | |
e925c5ba | 1145 | misaligned |= bytes < 4; |
86a5ba02 | 1146 | if (misaligned || flooded) { |
0e7bc4b9 AK |
1147 | /* |
1148 | * Misaligned accesses are too much trouble to fix | |
1149 | * up; also, they usually indicate a page is not used | |
1150 | * as a page table. | |
86a5ba02 AK |
1151 | * |
1152 | * If we're seeing too many writes to a page, | |
1153 | * it may no longer be a page table, or we may be | |
1154 | * forking, in which case it is better to unmap the | |
1155 | * page. | |
0e7bc4b9 AK |
1156 | */ |
1157 | pgprintk("misaligned: gpa %llx bytes %d role %x\n", | |
1158 | gpa, bytes, page->role.word); | |
1159 | kvm_mmu_zap_page(vcpu, page); | |
1160 | continue; | |
1161 | } | |
9b7a0325 AK |
1162 | page_offset = offset; |
1163 | level = page->role.level; | |
ac1b714e | 1164 | npte = 1; |
9b7a0325 | 1165 | if (page->role.glevels == PT32_ROOT_LEVEL) { |
ac1b714e AK |
1166 | page_offset <<= 1; /* 32->64 */ |
1167 | /* | |
1168 | * A 32-bit pde maps 4MB while the shadow pdes map | |
1169 | * only 2MB. So we need to double the offset again | |
1170 | * and zap two pdes instead of one. | |
1171 | */ | |
1172 | if (level == PT32_ROOT_LEVEL) { | |
6b8d0f9b | 1173 | page_offset &= ~7; /* kill rounding error */ |
ac1b714e AK |
1174 | page_offset <<= 1; |
1175 | npte = 2; | |
1176 | } | |
fce0657f | 1177 | quadrant = page_offset >> PAGE_SHIFT; |
9b7a0325 | 1178 | page_offset &= ~PAGE_MASK; |
fce0657f AK |
1179 | if (quadrant != page->role.quadrant) |
1180 | continue; | |
9b7a0325 | 1181 | } |
47ad8e68 | 1182 | spte = &page->spt[page_offset / sizeof(*spte)]; |
ac1b714e | 1183 | while (npte--) { |
09072daf | 1184 | mmu_pte_write_zap_pte(vcpu, page, spte); |
0028425f | 1185 | mmu_pte_write_new_pte(vcpu, page, spte, new, bytes); |
ac1b714e | 1186 | ++spte; |
9b7a0325 | 1187 | } |
9b7a0325 | 1188 | } |
da4a00f0 AK |
1189 | } |
1190 | ||
a436036b AK |
1191 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva) |
1192 | { | |
1193 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva); | |
1194 | ||
1195 | return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT); | |
1196 | } | |
1197 | ||
ebeace86 AK |
1198 | void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu) |
1199 | { | |
1200 | while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) { | |
1201 | struct kvm_mmu_page *page; | |
1202 | ||
1203 | page = container_of(vcpu->kvm->active_mmu_pages.prev, | |
1204 | struct kvm_mmu_page, link); | |
1205 | kvm_mmu_zap_page(vcpu, page); | |
1206 | } | |
1207 | } | |
1208 | EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages); | |
1209 | ||
6aa8b732 AK |
1210 | static void free_mmu_pages(struct kvm_vcpu *vcpu) |
1211 | { | |
f51234c2 | 1212 | struct kvm_mmu_page *page; |
6aa8b732 | 1213 | |
f51234c2 AK |
1214 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { |
1215 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1216 | struct kvm_mmu_page, link); | |
1217 | kvm_mmu_zap_page(vcpu, page); | |
1218 | } | |
17ac10ad | 1219 | free_page((unsigned long)vcpu->mmu.pae_root); |
6aa8b732 AK |
1220 | } |
1221 | ||
1222 | static int alloc_mmu_pages(struct kvm_vcpu *vcpu) | |
1223 | { | |
17ac10ad | 1224 | struct page *page; |
6aa8b732 AK |
1225 | int i; |
1226 | ||
1227 | ASSERT(vcpu); | |
1228 | ||
d3d25b04 | 1229 | vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES; |
17ac10ad AK |
1230 | |
1231 | /* | |
1232 | * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64. | |
1233 | * Therefore we need to allocate shadow page tables in the first | |
1234 | * 4GB of memory, which happens to fit the DMA32 zone. | |
1235 | */ | |
1236 | page = alloc_page(GFP_KERNEL | __GFP_DMA32); | |
1237 | if (!page) | |
1238 | goto error_1; | |
1239 | vcpu->mmu.pae_root = page_address(page); | |
1240 | for (i = 0; i < 4; ++i) | |
1241 | vcpu->mmu.pae_root[i] = INVALID_PAGE; | |
1242 | ||
6aa8b732 AK |
1243 | return 0; |
1244 | ||
1245 | error_1: | |
1246 | free_mmu_pages(vcpu); | |
1247 | return -ENOMEM; | |
1248 | } | |
1249 | ||
8018c27b | 1250 | int kvm_mmu_create(struct kvm_vcpu *vcpu) |
6aa8b732 | 1251 | { |
6aa8b732 AK |
1252 | ASSERT(vcpu); |
1253 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
6aa8b732 | 1254 | |
8018c27b IM |
1255 | return alloc_mmu_pages(vcpu); |
1256 | } | |
6aa8b732 | 1257 | |
8018c27b IM |
1258 | int kvm_mmu_setup(struct kvm_vcpu *vcpu) |
1259 | { | |
1260 | ASSERT(vcpu); | |
1261 | ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa)); | |
2c264957 | 1262 | |
8018c27b | 1263 | return init_kvm_mmu(vcpu); |
6aa8b732 AK |
1264 | } |
1265 | ||
1266 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu) | |
1267 | { | |
1268 | ASSERT(vcpu); | |
1269 | ||
1270 | destroy_kvm_mmu(vcpu); | |
1271 | free_mmu_pages(vcpu); | |
714b93da | 1272 | mmu_free_memory_caches(vcpu); |
6aa8b732 AK |
1273 | } |
1274 | ||
714b93da | 1275 | void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot) |
6aa8b732 | 1276 | { |
714b93da | 1277 | struct kvm *kvm = vcpu->kvm; |
6aa8b732 AK |
1278 | struct kvm_mmu_page *page; |
1279 | ||
1280 | list_for_each_entry(page, &kvm->active_mmu_pages, link) { | |
1281 | int i; | |
1282 | u64 *pt; | |
1283 | ||
1284 | if (!test_bit(slot, &page->slot_bitmap)) | |
1285 | continue; | |
1286 | ||
47ad8e68 | 1287 | pt = page->spt; |
6aa8b732 AK |
1288 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) |
1289 | /* avoid RMW */ | |
cd4a4e53 | 1290 | if (pt[i] & PT_WRITABLE_MASK) { |
714b93da | 1291 | rmap_remove(vcpu, &pt[i]); |
6aa8b732 | 1292 | pt[i] &= ~PT_WRITABLE_MASK; |
cd4a4e53 | 1293 | } |
6aa8b732 AK |
1294 | } |
1295 | } | |
37a7d8b0 | 1296 | |
e0fa826f DL |
1297 | void kvm_mmu_zap_all(struct kvm_vcpu *vcpu) |
1298 | { | |
1299 | destroy_kvm_mmu(vcpu); | |
1300 | ||
1301 | while (!list_empty(&vcpu->kvm->active_mmu_pages)) { | |
1302 | struct kvm_mmu_page *page; | |
1303 | ||
1304 | page = container_of(vcpu->kvm->active_mmu_pages.next, | |
1305 | struct kvm_mmu_page, link); | |
1306 | kvm_mmu_zap_page(vcpu, page); | |
1307 | } | |
1308 | ||
1309 | mmu_free_memory_caches(vcpu); | |
1310 | kvm_arch_ops->tlb_flush(vcpu); | |
1311 | init_kvm_mmu(vcpu); | |
1312 | } | |
1313 | ||
b5a33a75 AK |
1314 | void kvm_mmu_module_exit(void) |
1315 | { | |
1316 | if (pte_chain_cache) | |
1317 | kmem_cache_destroy(pte_chain_cache); | |
1318 | if (rmap_desc_cache) | |
1319 | kmem_cache_destroy(rmap_desc_cache); | |
d3d25b04 AK |
1320 | if (mmu_page_cache) |
1321 | kmem_cache_destroy(mmu_page_cache); | |
1322 | if (mmu_page_header_cache) | |
1323 | kmem_cache_destroy(mmu_page_header_cache); | |
b5a33a75 AK |
1324 | } |
1325 | ||
1326 | int kvm_mmu_module_init(void) | |
1327 | { | |
1328 | pte_chain_cache = kmem_cache_create("kvm_pte_chain", | |
1329 | sizeof(struct kvm_pte_chain), | |
1330 | 0, 0, NULL, NULL); | |
1331 | if (!pte_chain_cache) | |
1332 | goto nomem; | |
1333 | rmap_desc_cache = kmem_cache_create("kvm_rmap_desc", | |
1334 | sizeof(struct kvm_rmap_desc), | |
1335 | 0, 0, NULL, NULL); | |
1336 | if (!rmap_desc_cache) | |
1337 | goto nomem; | |
1338 | ||
d3d25b04 AK |
1339 | mmu_page_cache = kmem_cache_create("kvm_mmu_page", |
1340 | PAGE_SIZE, | |
1341 | PAGE_SIZE, 0, NULL, NULL); | |
1342 | if (!mmu_page_cache) | |
1343 | goto nomem; | |
1344 | ||
1345 | mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header", | |
1346 | sizeof(struct kvm_mmu_page), | |
1347 | 0, 0, NULL, NULL); | |
1348 | if (!mmu_page_header_cache) | |
1349 | goto nomem; | |
1350 | ||
b5a33a75 AK |
1351 | return 0; |
1352 | ||
1353 | nomem: | |
1354 | kvm_mmu_module_exit(); | |
1355 | return -ENOMEM; | |
1356 | } | |
1357 | ||
37a7d8b0 AK |
1358 | #ifdef AUDIT |
1359 | ||
1360 | static const char *audit_msg; | |
1361 | ||
1362 | static gva_t canonicalize(gva_t gva) | |
1363 | { | |
1364 | #ifdef CONFIG_X86_64 | |
1365 | gva = (long long)(gva << 16) >> 16; | |
1366 | #endif | |
1367 | return gva; | |
1368 | } | |
1369 | ||
1370 | static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte, | |
1371 | gva_t va, int level) | |
1372 | { | |
1373 | u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK); | |
1374 | int i; | |
1375 | gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1)); | |
1376 | ||
1377 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) { | |
1378 | u64 ent = pt[i]; | |
1379 | ||
2807696c | 1380 | if (!(ent & PT_PRESENT_MASK)) |
37a7d8b0 AK |
1381 | continue; |
1382 | ||
1383 | va = canonicalize(va); | |
1384 | if (level > 1) | |
1385 | audit_mappings_page(vcpu, ent, va, level - 1); | |
1386 | else { | |
1387 | gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va); | |
1388 | hpa_t hpa = gpa_to_hpa(vcpu, gpa); | |
1389 | ||
1390 | if ((ent & PT_PRESENT_MASK) | |
1391 | && (ent & PT64_BASE_ADDR_MASK) != hpa) | |
1392 | printk(KERN_ERR "audit error: (%s) levels %d" | |
1393 | " gva %lx gpa %llx hpa %llx ent %llx\n", | |
1394 | audit_msg, vcpu->mmu.root_level, | |
1395 | va, gpa, hpa, ent); | |
1396 | } | |
1397 | } | |
1398 | } | |
1399 | ||
1400 | static void audit_mappings(struct kvm_vcpu *vcpu) | |
1401 | { | |
1ea252af | 1402 | unsigned i; |
37a7d8b0 AK |
1403 | |
1404 | if (vcpu->mmu.root_level == 4) | |
1405 | audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4); | |
1406 | else | |
1407 | for (i = 0; i < 4; ++i) | |
1408 | if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK) | |
1409 | audit_mappings_page(vcpu, | |
1410 | vcpu->mmu.pae_root[i], | |
1411 | i << 30, | |
1412 | 2); | |
1413 | } | |
1414 | ||
1415 | static int count_rmaps(struct kvm_vcpu *vcpu) | |
1416 | { | |
1417 | int nmaps = 0; | |
1418 | int i, j, k; | |
1419 | ||
1420 | for (i = 0; i < KVM_MEMORY_SLOTS; ++i) { | |
1421 | struct kvm_memory_slot *m = &vcpu->kvm->memslots[i]; | |
1422 | struct kvm_rmap_desc *d; | |
1423 | ||
1424 | for (j = 0; j < m->npages; ++j) { | |
1425 | struct page *page = m->phys_mem[j]; | |
1426 | ||
1427 | if (!page->private) | |
1428 | continue; | |
1429 | if (!(page->private & 1)) { | |
1430 | ++nmaps; | |
1431 | continue; | |
1432 | } | |
1433 | d = (struct kvm_rmap_desc *)(page->private & ~1ul); | |
1434 | while (d) { | |
1435 | for (k = 0; k < RMAP_EXT; ++k) | |
1436 | if (d->shadow_ptes[k]) | |
1437 | ++nmaps; | |
1438 | else | |
1439 | break; | |
1440 | d = d->more; | |
1441 | } | |
1442 | } | |
1443 | } | |
1444 | return nmaps; | |
1445 | } | |
1446 | ||
1447 | static int count_writable_mappings(struct kvm_vcpu *vcpu) | |
1448 | { | |
1449 | int nmaps = 0; | |
1450 | struct kvm_mmu_page *page; | |
1451 | int i; | |
1452 | ||
1453 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
47ad8e68 | 1454 | u64 *pt = page->spt; |
37a7d8b0 AK |
1455 | |
1456 | if (page->role.level != PT_PAGE_TABLE_LEVEL) | |
1457 | continue; | |
1458 | ||
1459 | for (i = 0; i < PT64_ENT_PER_PAGE; ++i) { | |
1460 | u64 ent = pt[i]; | |
1461 | ||
1462 | if (!(ent & PT_PRESENT_MASK)) | |
1463 | continue; | |
1464 | if (!(ent & PT_WRITABLE_MASK)) | |
1465 | continue; | |
1466 | ++nmaps; | |
1467 | } | |
1468 | } | |
1469 | return nmaps; | |
1470 | } | |
1471 | ||
1472 | static void audit_rmap(struct kvm_vcpu *vcpu) | |
1473 | { | |
1474 | int n_rmap = count_rmaps(vcpu); | |
1475 | int n_actual = count_writable_mappings(vcpu); | |
1476 | ||
1477 | if (n_rmap != n_actual) | |
1478 | printk(KERN_ERR "%s: (%s) rmap %d actual %d\n", | |
1479 | __FUNCTION__, audit_msg, n_rmap, n_actual); | |
1480 | } | |
1481 | ||
1482 | static void audit_write_protection(struct kvm_vcpu *vcpu) | |
1483 | { | |
1484 | struct kvm_mmu_page *page; | |
1485 | ||
1486 | list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) { | |
1487 | hfn_t hfn; | |
1488 | struct page *pg; | |
1489 | ||
1490 | if (page->role.metaphysical) | |
1491 | continue; | |
1492 | ||
1493 | hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT) | |
1494 | >> PAGE_SHIFT; | |
1495 | pg = pfn_to_page(hfn); | |
1496 | if (pg->private) | |
1497 | printk(KERN_ERR "%s: (%s) shadow page has writable" | |
1498 | " mappings: gfn %lx role %x\n", | |
1499 | __FUNCTION__, audit_msg, page->gfn, | |
1500 | page->role.word); | |
1501 | } | |
1502 | } | |
1503 | ||
1504 | static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) | |
1505 | { | |
1506 | int olddbg = dbg; | |
1507 | ||
1508 | dbg = 0; | |
1509 | audit_msg = msg; | |
1510 | audit_rmap(vcpu); | |
1511 | audit_write_protection(vcpu); | |
1512 | audit_mappings(vcpu); | |
1513 | dbg = olddbg; | |
1514 | } | |
1515 | ||
1516 | #endif |