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tracing: extend sched_pi_setprio
[deliverable/linux.git] / drivers / macintosh / via-pmu.c
CommitLineData
1da177e4
LT		 1/*
2 * Device driver for the via-pmu on Apple Powermacs.
3 *
4 * The VIA (versatile interface adapter) interfaces to the PMU,
5 * a 6805 microprocessor core whose primary function is to control
6 * battery charging and system power on the PowerBook 3400 and 2400.
7 * The PMU also controls the ADB (Apple Desktop Bus) which connects
8 * to the keyboard and mouse, as well as the non-volatile RAM
9 * and the RTC (real time clock) chip.
10 *
11 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
12 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 13 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT		 14 *
15 * THIS DRIVER IS BECOMING A TOTAL MESS !
16 * - Cleanup atomically disabling reply to PMU events after
17 * a sleep or a freq. switch
1da177e4
LT		 18 *
19 */
20#include <stdarg.h>
d851b6e0 21#include <linux/mutex.h>
1da177e4
LT		 22#include <linux/types.h>
23#include <linux/errno.h>
24#include <linux/kernel.h>
25#include <linux/delay.h>
26#include <linux/sched.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/pci.h>
30#include <linux/slab.h>
31#include <linux/poll.h>
32#include <linux/adb.h>
33#include <linux/pmu.h>
34#include <linux/cuda.h>
1da177e4
LT		 35#include <linux/module.h>
36#include <linux/spinlock.h>
37#include <linux/pm.h>
38#include <linux/proc_fs.h>
9d2f7342 39#include <linux/seq_file.h>
1da177e4
LT		 40#include <linux/init.h>
41#include <linux/interrupt.h>
42#include <linux/device.h>
e83b906c 43#include <linux/syscore_ops.h>
7dfb7103 44#include <linux/freezer.h>
1da177e4 45#include <linux/syscalls.h>
6002f544 46#include <linux/suspend.h>
1da177e4 47#include <linux/cpu.h>
4cc4587f 48#include <linux/compat.h>
5af50730
RH		 49#include <linux/of_address.h>
50#include <linux/of_irq.h>
1da177e4
LT		 51#include <asm/prom.h>
52#include <asm/machdep.h>
53#include <asm/io.h>
54#include <asm/pgtable.h>
1da177e4
LT		 55#include <asm/sections.h>
56#include <asm/irq.h>
57#include <asm/pmac_feature.h>
5b9ca526
BH		 58#include <asm/pmac_pfunc.h>
59#include <asm/pmac_low_i2c.h>
1da177e4
LT		 60#include <asm/uaccess.h>
61#include <asm/mmu_context.h>
62#include <asm/cputable.h>
63#include <asm/time.h>
1da177e4 64#include <asm/backlight.h>
1da177e4 65
9e8e30a0
JB		 66#include "via-pmu-event.h"
67
1da177e4 68/* Some compile options */
f91266ed 69#undef DEBUG_SLEEP
1da177e4
LT		 70
71/* Misc minor number allocated for /dev/pmu */
72#define PMU_MINOR 154
73
74/* How many iterations between battery polls */
75#define BATTERY_POLLING_COUNT 2
76
d851b6e0 77static DEFINE_MUTEX(pmu_info_proc_mutex);
1da177e4
LT		 78static volatile unsigned char __iomem *via;
79
80/* VIA registers - spaced 0x200 bytes apart */
81#define RS 0x200 /* skip between registers */
82#define B 0 /* B-side data */
83#define A RS /* A-side data */
84#define DIRB (2*RS) /* B-side direction (1=output) */
85#define DIRA (3*RS) /* A-side direction (1=output) */
86#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
87#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
88#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
89#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
90#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
91#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
92#define SR (10*RS) /* Shift register */
93#define ACR (11*RS) /* Auxiliary control register */
94#define PCR (12*RS) /* Peripheral control register */
95#define IFR (13*RS) /* Interrupt flag register */
96#define IER (14*RS) /* Interrupt enable register */
97#define ANH (15*RS) /* A-side data, no handshake */
98
99/* Bits in B data register: both active low */
100#define TACK 0x08 /* Transfer acknowledge (input) */
101#define TREQ 0x10 /* Transfer request (output) */
102
103/* Bits in ACR */
104#define SR_CTRL 0x1c /* Shift register control bits */
105#define SR_EXT 0x0c /* Shift on external clock */
106#define SR_OUT 0x10 /* Shift out if 1 */
107
108/* Bits in IFR and IER */
109#define IER_SET 0x80 /* set bits in IER */
110#define IER_CLR 0 /* clear bits in IER */
111#define SR_INT 0x04 /* Shift register full/empty */
112#define CB2_INT 0x08
113#define CB1_INT 0x10 /* transition on CB1 input */
114
115static volatile enum pmu_state {
116 idle,
117 sending,
118 intack,
119 reading,
120 reading_intr,
121 locked,
122} pmu_state;
123
124static volatile enum int_data_state {
125 int_data_empty,
126 int_data_fill,
127 int_data_ready,
128 int_data_flush
129} int_data_state[2] = { int_data_empty, int_data_empty };
130
131static struct adb_request *current_req;
132static struct adb_request *last_req;
133static struct adb_request *req_awaiting_reply;
134static unsigned char interrupt_data[2][32];
135static int interrupt_data_len[2];
136static int int_data_last;
137static unsigned char *reply_ptr;
138static int data_index;
139static int data_len;
140static volatile int adb_int_pending;
141static volatile int disable_poll;
1da177e4
LT		 142static struct device_node *vias;
143static int pmu_kind = PMU_UNKNOWN;
87275856 144static int pmu_fully_inited;
1da177e4 145static int pmu_has_adb;
51d3082f 146static struct device_node *gpio_node;
87275856 147static unsigned char __iomem *gpio_reg;
0ebfff14 148static int gpio_irq = NO_IRQ;
1da177e4 149static int gpio_irq_enabled = -1;
87275856 150static volatile int pmu_suspended;
1da177e4
LT		 151static spinlock_t pmu_lock;
152static u8 pmu_intr_mask;
153static int pmu_version;
154static int drop_interrupts;
f91266ed 155#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 156static int option_lid_wakeup = 1;
f91266ed 157#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 158static unsigned long async_req_locks;
159static unsigned int pmu_irq_stats[11];
160
161static struct proc_dir_entry *proc_pmu_root;
162static struct proc_dir_entry *proc_pmu_info;
163static struct proc_dir_entry *proc_pmu_irqstats;
164static struct proc_dir_entry *proc_pmu_options;
165static int option_server_mode;
166
1da177e4
LT		 167int pmu_battery_count;
168int pmu_cur_battery;
a334bdbd 169unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT		 170struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
171static int query_batt_timer = BATTERY_POLLING_COUNT;
172static struct adb_request batt_req;
173static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 174
1da177e4
LT		 175int __fake_sleep;
176int asleep;
1da177e4
LT		 177
178#ifdef CONFIG_ADB
87275856 179static int adb_dev_map;
1da177e4
LT		 180static int pmu_adb_flags;
181
182static int pmu_probe(void);
183static int pmu_init(void);
184static int pmu_send_request(struct adb_request *req, int sync);
185static int pmu_adb_autopoll(int devs);
186static int pmu_adb_reset_bus(void);
187#endif /* CONFIG_ADB */
188
189static int init_pmu(void);
1da177e4 190static void pmu_start(void);
7d12e780
DH		 191static irqreturn_t via_pmu_interrupt(int irq, void *arg);
192static irqreturn_t gpio1_interrupt(int irq, void *arg);
9d2f7342
AD		 193static const struct file_operations pmu_info_proc_fops;
194static const struct file_operations pmu_irqstats_proc_fops;
1da177e4 195static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342
AD		 196static const struct file_operations pmu_battery_proc_fops;
197static const struct file_operations pmu_options_proc_fops;
1da177e4
LT		 198
199#ifdef CONFIG_ADB
200struct adb_driver via_pmu_driver = {
201 "PMU",
202 pmu_probe,
203 pmu_init,
204 pmu_send_request,
205 pmu_adb_autopoll,
206 pmu_poll_adb,
207 pmu_adb_reset_bus
208};
209#endif /* CONFIG_ADB */
210
211extern void low_sleep_handler(void);
212extern void enable_kernel_altivec(void);
213extern void enable_kernel_fp(void);
214
215#ifdef DEBUG_SLEEP
216int pmu_polled_request(struct adb_request *req);
f91266ed 217void pmu_blink(int n);
1da177e4
LT		 218#endif
219
220/*
221 * This table indicates for each PMU opcode:
222 * - the number of data bytes to be sent with the command, or -1
223 * if a length byte should be sent,
224 * - the number of response bytes which the PMU will return, or
225 * -1 if it will send a length byte.
226 */
aacaf9bd 227static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 228/* 0 1 2 3 4 5 6 7 */
229/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
230/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
231/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
232/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
233/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
234/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
235/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
236/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
237/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
238/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
239/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
240/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
241/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
242/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
243/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
244/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
245/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
246/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
247/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
248/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
249/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
250/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
251/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
252/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
253/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
254/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
255/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
256/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
257/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
258/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
259/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
260/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
261};
262
263static char *pbook_type[] = {
264 "Unknown PowerBook",
265 "PowerBook 2400/3400/3500(G3)",
266 "PowerBook G3 Series",
267 "1999 PowerBook G3",
268 "Core99"
269};
270
51d3082f 271int __init find_via_pmu(void)
1da177e4 272{
cc5d0189 273 u64 taddr;
018a3d1d 274 const u32 *reg;
51d3082f 275
1da177e4
LT		 276 if (via != 0)
277 return 1;
51d3082f
BH		 278 vias = of_find_node_by_name(NULL, "via-pmu");
279 if (vias == NULL)
1da177e4 280 return 0;
1da177e4 281
01b2726d 282 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH		 283 if (reg == NULL) {
284 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
285 goto fail;
286 }
287 taddr = of_translate_address(vias, reg);
bb6b9b28 288 if (taddr == OF_BAD_ADDR) {
51d3082f
BH		 289 printk(KERN_ERR "via-pmu: Can't translate address !\n");
290 goto fail;
1da177e4
LT		 291 }
292
293 spin_lock_init(&pmu_lock);
294
295 pmu_has_adb = 1;
296
297 pmu_intr_mask = PMU_INT_PCEJECT |
298 PMU_INT_SNDBRT |
299 PMU_INT_ADB |
300 PMU_INT_TICK;
301
302 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 303 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 304 pmu_kind = PMU_OHARE_BASED;
55b61fec 305 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 306 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 307 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 308 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR		 309 else if (of_device_is_compatible(vias->parent, "Keylargo")
310 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 311 struct device_node *gpiop;
1658ab66 312 struct device_node *adbp;
cc5d0189 313 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT		 314
315 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR		 316 adbp = of_find_node_by_type(NULL, "adb");
317 pmu_has_adb = (adbp != NULL);
318 of_node_put(adbp);
1da177e4
LT		 319 pmu_intr_mask = PMU_INT_PCEJECT |
320 PMU_INT_SNDBRT |
321 PMU_INT_ADB |
322 PMU_INT_TICK |
323 PMU_INT_ENVIRONMENT;
324
51d3082f
BH		 325 gpiop = of_find_node_by_name(NULL, "gpio");
326 if (gpiop) {
01b2726d 327 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH		 328 if (reg)
329 gaddr = of_translate_address(gpiop, reg);
cc5d0189 330 if (gaddr != OF_BAD_ADDR)
51d3082f 331 gpio_reg = ioremap(gaddr, 0x10);
e702240e 332 of_node_put(gpiop);
1da177e4 333 }
61e37ca2 334 if (gpio_reg == NULL) {
51d3082f 335 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
ffa3eb01 336 goto fail;
61e37ca2 337 }
1da177e4
LT		 338 } else
339 pmu_kind = PMU_UNKNOWN;
340
51d3082f
BH		 341 via = ioremap(taddr, 0x2000);
342 if (via == NULL) {
343 printk(KERN_ERR "via-pmu: Can't map address !\n");
ffa3eb01 344 goto fail_via_remap;
51d3082f 345 }
1da177e4
LT		 346
347 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
348 out_8(&via[IFR], 0x7f); /* clear IFR */
349
350 pmu_state = idle;
351
ffa3eb01
PC		 352 if (!init_pmu())
353 goto fail_init;
1da177e4 354
bb6b9b28 355 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT		 356 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
357
358 sys_ctrler = SYS_CTRLER_PMU;
359
360 return 1;
ffa3eb01
PC		 361
362 fail_init:
363 iounmap(via);
364 via = NULL;
365 fail_via_remap:
61e37ca2
OH		 366 iounmap(gpio_reg);
367 gpio_reg = NULL;
ffa3eb01
PC		 368 fail:
369 of_node_put(vias);
51d3082f
BH		 370 vias = NULL;
371 return 0;
1da177e4
LT		 372}
373
374#ifdef CONFIG_ADB
51d3082f 375static int pmu_probe(void)
1da177e4
LT		 376{
377 return vias == NULL? -ENODEV: 0;
378}
379
51d3082f 380static int __init pmu_init(void)
1da177e4
LT		 381{
382 if (vias == NULL)
383 return -ENODEV;
384 return 0;
385}
386#endif /* CONFIG_ADB */
387
388/*
389 * We can't wait until pmu_init gets called, that happens too late.
390 * It happens after IDE and SCSI initialization, which can take a few
391 * seconds, and by that time the PMU could have given up on us and
392 * turned us off.
393 * Thus this is called with arch_initcall rather than device_initcall.
394 */
395static int __init via_pmu_start(void)
396{
0ebfff14
BH		 397 unsigned int irq;
398
1da177e4
LT		 399 if (vias == NULL)
400 return -ENODEV;
401
1da177e4 402 batt_req.complete = 1;
1da177e4 403
0ebfff14
BH		 404 irq = irq_of_parse_and_map(vias, 0);
405 if (irq == NO_IRQ) {
7b52b440 406 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH		 407 return -ENODEV;
408 }
ba461f09
IC		 409 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
410 * to be disabled between the 2 passes of driver suspend, we
411 * control our own disabling for that one
11a50873 412 */
ba461f09
IC		 413 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
414 "VIA-PMU", (void *)0)) {
0ebfff14
BH		 415 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
416 return -ENODEV;
1da177e4
LT		 417 }
418
51d3082f
BH		 419 if (pmu_kind == PMU_KEYLARGO_BASED) {
420 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
421 if (gpio_node == NULL)
422 gpio_node = of_find_node_by_name(NULL,
423 "pmu-interrupt");
0ebfff14
BH		 424 if (gpio_node)
425 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 426
0ebfff14 427 if (gpio_irq != NO_IRQ) {
6c308215
JO		 428 if (request_irq(gpio_irq, gpio1_interrupt,
429 IRQF_NO_SUSPEND, "GPIO1 ADB",
430 (void *)0))
51d3082f
BH		 431 printk(KERN_ERR "pmu: can't get irq %d"
432 " (GPIO1)\n", gpio_irq);
433 else
434 gpio_irq_enabled = 1;
435 }
1da177e4
LT		 436 }
437
438 /* Enable interrupts */
439 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
440
441 pmu_fully_inited = 1;
442
443 /* Make sure PMU settle down before continuing. This is _very_ important
444 * since the IDE probe may shut interrupts down for quite a bit of time. If
445 * a PMU communication is pending while this happens, the PMU may timeout
446 * Not that on Core99 machines, the PMU keeps sending us environement
447 * messages, we should find a way to either fix IDE or make it call
448 * pmu_suspend() before masking interrupts. This can also happens while
449 * scolling with some fbdevs.
450 */
451 do {
452 pmu_poll();
453 } while (pmu_state != idle);
454
455 return 0;
456}
457
458arch_initcall(via_pmu_start);
459
460/*
461 * This has to be done after pci_init, which is a subsys_initcall.
462 */
463static int __init via_pmu_dev_init(void)
464{
465 if (vias == NULL)
466 return -ENODEV;
467
1da177e4 468#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 469 /* Initialize backlight */
4b755999 470 pmu_backlight_init();
5474c120 471#endif
1da177e4 472
8c870933 473#ifdef CONFIG_PPC32
71a157e8
GL		 474 if (of_machine_is_compatible("AAPL,3400/2400") ||
475 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT		 476 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
477 NULL, PMAC_MB_INFO_MODEL, 0);
478 pmu_battery_count = 1;
479 if (mb == PMAC_TYPE_COMET)
480 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
481 else
482 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL		 483 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
484 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT		 485 pmu_battery_count = 2;
486 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
487 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
488 } else {
30686ba6
SR		 489 struct device_node* prim =
490 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 491 const u32 *prim_info = NULL;
1da177e4 492 if (prim)
01b2726d 493 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT		 494 if (prim_info) {
495 /* Other stuffs here yet unknown */
496 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
497 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
498 if (pmu_battery_count > 1)
499 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
500 }
30686ba6 501 of_node_put(prim);
1da177e4 502 }
8c870933
BH		 503#endif /* CONFIG_PPC32 */
504
1da177e4
LT		 505 /* Create /proc/pmu */
506 proc_pmu_root = proc_mkdir("pmu", NULL);
507 if (proc_pmu_root) {
8c870933 508 long i;
1da177e4
LT		 509
510 for (i=0; i<pmu_battery_count; i++) {
511 char title[16];
8c870933 512 sprintf(title, "battery_%ld", i);
9d2f7342
AD		 513 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
514 &pmu_battery_proc_fops, (void *)i);
1da177e4 515 }
1da177e4 516
9d2f7342
AD		 517 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
518 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
519 &pmu_irqstats_proc_fops);
520 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
521 &pmu_options_proc_fops);
1da177e4
LT		 522 }
523 return 0;
524}
525
526device_initcall(via_pmu_dev_init);
527
aacaf9bd 528static int
1da177e4
LT		 529init_pmu(void)
530{
531 int timeout;
532 struct adb_request req;
533
534 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
535 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
536
537 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
538 timeout = 100000;
539 while (!req.complete) {
540 if (--timeout < 0) {
541 printk(KERN_ERR "init_pmu: no response from PMU\n");
542 return 0;
543 }
544 udelay(10);
545 pmu_poll();
546 }
547
548 /* ack all pending interrupts */
549 timeout = 100000;
550 interrupt_data[0][0] = 1;
551 while (interrupt_data[0][0] || pmu_state != idle) {
552 if (--timeout < 0) {
553 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
554 return 0;
555 }
556 if (pmu_state == idle)
557 adb_int_pending = 1;
7d12e780 558 via_pmu_interrupt(0, NULL);
1da177e4
LT		 559 udelay(10);
560 }
561
562 /* Tell PMU we are ready. */
563 if (pmu_kind == PMU_KEYLARGO_BASED) {
564 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
565 while (!req.complete)
566 pmu_poll();
567 }
568
569 /* Read PMU version */
570 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
571 pmu_wait_complete(&req);
572 if (req.reply_len > 0)
573 pmu_version = req.reply[0];
574
575 /* Read server mode setting */
576 if (pmu_kind == PMU_KEYLARGO_BASED) {
577 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
578 PMU_PWR_GET_POWERUP_EVENTS);
579 pmu_wait_complete(&req);
580 if (req.reply_len == 2) {
581 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
582 option_server_mode = 1;
583 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
584 option_server_mode ? "enabled" : "disabled");
585 }
586 }
587 return 1;
588}
589
590int
591pmu_get_model(void)
592{
593 return pmu_kind;
594}
595
1da177e4
LT		 596static void pmu_set_server_mode(int server_mode)
597{
598 struct adb_request req;
599
600 if (pmu_kind != PMU_KEYLARGO_BASED)
601 return;
602
603 option_server_mode = server_mode;
604 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
605 pmu_wait_complete(&req);
606 if (req.reply_len < 2)
607 return;
608 if (server_mode)
609 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
610 PMU_PWR_SET_POWERUP_EVENTS,
611 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
612 else
613 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
614 PMU_PWR_CLR_POWERUP_EVENTS,
615 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
616 pmu_wait_complete(&req);
617}
618
1da177e4
LT		 619/* This new version of the code for 2400/3400/3500 powerbooks
620 * is inspired from the implementation in gkrellm-pmu
621 */
aacaf9bd 622static void
1da177e4
LT		 623done_battery_state_ohare(struct adb_request* req)
624{
625 /* format:
626 * [0] : flags
627 * 0x01 : AC indicator
628 * 0x02 : charging
629 * 0x04 : battery exist
630 * 0x08 :
631 * 0x10 :
632 * 0x20 : full charged
633 * 0x40 : pcharge reset
634 * 0x80 : battery exist
635 *
636 * [1][2] : battery voltage
637 * [3] : CPU temperature
638 * [4] : battery temperature
639 * [5] : current
640 * [6][7] : pcharge
641 * --tkoba
642 */
643 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
644 long pcharge, charge, vb, vmax, lmax;
645 long vmax_charging, vmax_charged;
646 long amperage, voltage, time, max;
647 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
648 NULL, PMAC_MB_INFO_MODEL, 0);
649
650 if (req->reply[0] & 0x01)
651 pmu_power_flags |= PMU_PWR_AC_PRESENT;
652 else
653 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
654
655 if (mb == PMAC_TYPE_COMET) {
656 vmax_charged = 189;
657 vmax_charging = 213;
658 lmax = 6500;
659 } else {
660 vmax_charged = 330;
661 vmax_charging = 330;
662 lmax = 6500;
663 }
664 vmax = vmax_charged;
665
666 /* If battery installed */
667 if (req->reply[0] & 0x04) {
668 bat_flags |= PMU_BATT_PRESENT;
669 if (req->reply[0] & 0x02)
670 bat_flags |= PMU_BATT_CHARGING;
671 vb = (req->reply[1] << 8) | req->reply[2];
672 voltage = (vb * 265 + 72665) / 10;
673 amperage = req->reply[5];
674 if ((req->reply[0] & 0x01) == 0) {
675 if (amperage > 200)
676 vb += ((amperage - 200) * 15)/100;
677 } else if (req->reply[0] & 0x02) {
678 vb = (vb * 97) / 100;
679 vmax = vmax_charging;
680 }
681 charge = (100 * vb) / vmax;
682 if (req->reply[0] & 0x40) {
683 pcharge = (req->reply[6] << 8) + req->reply[7];
684 if (pcharge > lmax)
685 pcharge = lmax;
686 pcharge *= 100;
687 pcharge = 100 - pcharge / lmax;
688 if (pcharge < charge)
689 charge = pcharge;
690 }
691 if (amperage > 0)
692 time = (charge * 16440) / amperage;
693 else
694 time = 0;
695 max = 100;
696 amperage = -amperage;
697 } else
698 charge = max = amperage = voltage = time = 0;
699
700 pmu_batteries[pmu_cur_battery].flags = bat_flags;
701 pmu_batteries[pmu_cur_battery].charge = charge;
702 pmu_batteries[pmu_cur_battery].max_charge = max;
703 pmu_batteries[pmu_cur_battery].amperage = amperage;
704 pmu_batteries[pmu_cur_battery].voltage = voltage;
705 pmu_batteries[pmu_cur_battery].time_remaining = time;
706
707 clear_bit(0, &async_req_locks);
708}
709
aacaf9bd 710static void
1da177e4
LT		 711done_battery_state_smart(struct adb_request* req)
712{
713 /* format:
714 * [0] : format of this structure (known: 3,4,5)
715 * [1] : flags
716 *
717 * format 3 & 4:
718 *
719 * [2] : charge
720 * [3] : max charge
721 * [4] : current
722 * [5] : voltage
723 *
724 * format 5:
725 *
726 * [2][3] : charge
727 * [4][5] : max charge
728 * [6][7] : current
729 * [8][9] : voltage
730 */
731
732 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
733 int amperage;
734 unsigned int capa, max, voltage;
735
736 if (req->reply[1] & 0x01)
737 pmu_power_flags |= PMU_PWR_AC_PRESENT;
738 else
739 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
740
741
742 capa = max = amperage = voltage = 0;
743
744 if (req->reply[1] & 0x04) {
745 bat_flags |= PMU_BATT_PRESENT;
746 switch(req->reply[0]) {
747 case 3:
748 case 4: capa = req->reply[2];
749 max = req->reply[3];
750 amperage = *((signed char *)&req->reply[4]);
751 voltage = req->reply[5];
752 break;
753 case 5: capa = (req->reply[2] << 8) | req->reply[3];
754 max = (req->reply[4] << 8) | req->reply[5];
755 amperage = *((signed short *)&req->reply[6]);
756 voltage = (req->reply[8] << 8) | req->reply[9];
757 break;
758 default:
ebd004e4
AS		 759 pr_warn("pmu.c: unrecognized battery info, "
760 "len: %d, %4ph\n", req->reply_len,
761 req->reply);
1da177e4
LT		 762 break;
763 }
764 }
765
766 if ((req->reply[1] & 0x01) && (amperage > 0))
767 bat_flags |= PMU_BATT_CHARGING;
768
769 pmu_batteries[pmu_cur_battery].flags = bat_flags;
770 pmu_batteries[pmu_cur_battery].charge = capa;
771 pmu_batteries[pmu_cur_battery].max_charge = max;
772 pmu_batteries[pmu_cur_battery].amperage = amperage;
773 pmu_batteries[pmu_cur_battery].voltage = voltage;
774 if (amperage) {
775 if ((req->reply[1] & 0x01) && (amperage > 0))
776 pmu_batteries[pmu_cur_battery].time_remaining
777 = ((max-capa) * 3600) / amperage;
778 else
779 pmu_batteries[pmu_cur_battery].time_remaining
780 = (capa * 3600) / (-amperage);
781 } else
782 pmu_batteries[pmu_cur_battery].time_remaining = 0;
783
784 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
785
786 clear_bit(0, &async_req_locks);
787}
788
aacaf9bd 789static void
1da177e4
LT		 790query_battery_state(void)
791{
792 if (test_and_set_bit(0, &async_req_locks))
793 return;
794 if (pmu_kind == PMU_OHARE_BASED)
795 pmu_request(&batt_req, done_battery_state_ohare,
796 1, PMU_BATTERY_STATE);
797 else
798 pmu_request(&batt_req, done_battery_state_smart,
799 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
800}
801
9d2f7342 802static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 803{
9d2f7342
AD		 804 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
805 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
806 seq_printf(m, "AC Power : %d\n",
63e1fd41 807 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD		 808 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
809
810 return 0;
811}
1da177e4 812
9d2f7342
AD		 813static int pmu_info_proc_open(struct inode *inode, struct file *file)
814{
815 return single_open(file, pmu_info_proc_show, NULL);
1da177e4
LT		 816}
817
9d2f7342
AD		 818static const struct file_operations pmu_info_proc_fops = {
819 .owner = THIS_MODULE,
820 .open = pmu_info_proc_open,
821 .read = seq_read,
822 .llseek = seq_lseek,
823 .release = single_release,
824};
825
826static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 827{
828 int i;
1da177e4
LT		 829 static const char *irq_names[] = {
830 "Total CB1 triggered events",
831 "Total GPIO1 triggered events",
832 "PC-Card eject button",
833 "Sound/Brightness button",
834 "ADB message",
835 "Battery state change",
836 "Environment interrupt",
837 "Tick timer",
838 "Ghost interrupt (zero len)",
839 "Empty interrupt (empty mask)",
840 "Max irqs in a row"
841 };
842
843 for (i=0; i<11; i++) {
9d2f7342 844 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT		 845 i, pmu_irq_stats[i], irq_names[i]);
846 }
9d2f7342 847 return 0;
1da177e4
LT		 848}
849
9d2f7342 850static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
1da177e4 851{
9d2f7342
AD		 852 return single_open(file, pmu_irqstats_proc_show, NULL);
853}
854
855static const struct file_operations pmu_irqstats_proc_fops = {
856 .owner = THIS_MODULE,
857 .open = pmu_irqstats_proc_open,
858 .read = seq_read,
859 .llseek = seq_lseek,
860 .release = single_release,
861};
862
863static int pmu_battery_proc_show(struct seq_file *m, void *v)
864{
865 long batnum = (long)m->private;
1da177e4 866
9d2f7342
AD		 867 seq_putc(m, '\n');
868 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
869 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
870 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
871 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
872 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
873 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
874 return 0;
1da177e4 875}
1da177e4 876
9d2f7342 877static int pmu_battery_proc_open(struct inode *inode, struct file *file)
1da177e4 878{
d9dda78b 879 return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
9d2f7342 880}
1da177e4 881
9d2f7342
AD		 882static const struct file_operations pmu_battery_proc_fops = {
883 .owner = THIS_MODULE,
884 .open = pmu_battery_proc_open,
885 .read = seq_read,
886 .llseek = seq_lseek,
887 .release = single_release,
888};
889
890static int pmu_options_proc_show(struct seq_file *m, void *v)
891{
f91266ed 892#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 893 if (pmu_kind == PMU_KEYLARGO_BASED &&
894 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 895 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 896#endif
1da177e4 897 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 898 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 899
9d2f7342 900 return 0;
1da177e4 901}
9d2f7342
AD		 902
903static int pmu_options_proc_open(struct inode *inode, struct file *file)
904{
905 return single_open(file, pmu_options_proc_show, NULL);
906}
907
908static ssize_t pmu_options_proc_write(struct file *file,
909 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT		 910{
911 char tmp[33];
912 char *label, *val;
9d2f7342 913 size_t fcount = count;
1da177e4
LT		 914
915 if (!count)
916 return -EINVAL;
917 if (count > 32)
918 count = 32;
919 if (copy_from_user(tmp, buffer, count))
920 return -EFAULT;
921 tmp[count] = 0;
922
923 label = tmp;
924 while(*label == ' ')
925 label++;
926 val = label;
927 while(*val && (*val != '=')) {
928 if (*val == ' ')
929 *val = 0;
930 val++;
931 }
932 if ((*val) == 0)
933 return -EINVAL;
934 *(val++) = 0;
935 while(*val == ' ')
936 val++;
f91266ed 937#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 938 if (pmu_kind == PMU_KEYLARGO_BASED &&
939 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
940 if (!strcmp(label, "lid_wakeup"))
941 option_lid_wakeup = ((*val) == '1');
8c870933 942#endif
1da177e4
LT		 943 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
944 int new_value;
945 new_value = ((*val) == '1');
946 if (new_value != option_server_mode)
947 pmu_set_server_mode(new_value);
948 }
949 return fcount;
950}
951
9d2f7342
AD		 952static const struct file_operations pmu_options_proc_fops = {
953 .owner = THIS_MODULE,
954 .open = pmu_options_proc_open,
955 .read = seq_read,
956 .llseek = seq_lseek,
957 .release = single_release,
958 .write = pmu_options_proc_write,
959};
960
1da177e4
LT		 961#ifdef CONFIG_ADB
962/* Send an ADB command */
11a50873 963static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT		 964{
965 int i, ret;
966
967 if ((vias == NULL) || (!pmu_fully_inited)) {
968 req->complete = 1;
969 return -ENXIO;
970 }
971
972 ret = -EINVAL;
973
974 switch (req->data[0]) {
975 case PMU_PACKET:
976 for (i = 0; i < req->nbytes - 1; ++i)
977 req->data[i] = req->data[i+1];
978 --req->nbytes;
979 if (pmu_data_len[req->data[0]][1] != 0) {
980 req->reply[0] = ADB_RET_OK;
981 req->reply_len = 1;
982 } else
983 req->reply_len = 0;
984 ret = pmu_queue_request(req);
985 break;
986 case CUDA_PACKET:
987 switch (req->data[1]) {
988 case CUDA_GET_TIME:
989 if (req->nbytes != 2)
990 break;
991 req->data[0] = PMU_READ_RTC;
992 req->nbytes = 1;
993 req->reply_len = 3;
994 req->reply[0] = CUDA_PACKET;
995 req->reply[1] = 0;
996 req->reply[2] = CUDA_GET_TIME;
997 ret = pmu_queue_request(req);
998 break;
999 case CUDA_SET_TIME:
1000 if (req->nbytes != 6)
1001 break;
1002 req->data[0] = PMU_SET_RTC;
1003 req->nbytes = 5;
1004 for (i = 1; i <= 4; ++i)
1005 req->data[i] = req->data[i+1];
1006 req->reply_len = 3;
1007 req->reply[0] = CUDA_PACKET;
1008 req->reply[1] = 0;
1009 req->reply[2] = CUDA_SET_TIME;
1010 ret = pmu_queue_request(req);
1011 break;
1012 }
1013 break;
1014 case ADB_PACKET:
1015 if (!pmu_has_adb)
1016 return -ENXIO;
1017 for (i = req->nbytes - 1; i > 1; --i)
1018 req->data[i+2] = req->data[i];
1019 req->data[3] = req->nbytes - 2;
1020 req->data[2] = pmu_adb_flags;
1021 /*req->data[1] = req->data[1];*/
1022 req->data[0] = PMU_ADB_CMD;
1023 req->nbytes += 2;
1024 req->reply_expected = 1;
1025 req->reply_len = 0;
1026 ret = pmu_queue_request(req);
1027 break;
1028 }
1029 if (ret) {
1030 req->complete = 1;
1031 return ret;
1032 }
1033
1034 if (sync)
1035 while (!req->complete)
1036 pmu_poll();
1037
1038 return 0;
1039}
1040
1041/* Enable/disable autopolling */
11a50873 1042static int __pmu_adb_autopoll(int devs)
1da177e4
LT		 1043{
1044 struct adb_request req;
1045
1da177e4 1046 if (devs) {
1da177e4
LT		 1047 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1048 adb_dev_map >> 8, adb_dev_map);
1049 pmu_adb_flags = 2;
1050 } else {
1051 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1052 pmu_adb_flags = 0;
1053 }
1054 while (!req.complete)
1055 pmu_poll();
1056 return 0;
1057}
1058
11a50873
BH		 1059static int pmu_adb_autopoll(int devs)
1060{
1061 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1062 return -ENXIO;
1063
1064 adb_dev_map = devs;
1065 return __pmu_adb_autopoll(devs);
1066}
1067
1da177e4 1068/* Reset the ADB bus */
11a50873 1069static int pmu_adb_reset_bus(void)
1da177e4
LT		 1070{
1071 struct adb_request req;
1072 int save_autopoll = adb_dev_map;
1073
1074 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1075 return -ENXIO;
1076
1077 /* anyone got a better idea?? */
11a50873 1078 __pmu_adb_autopoll(0);
1da177e4 1079
11a50873 1080 req.nbytes = 4;
1da177e4
LT		 1081 req.done = NULL;
1082 req.data[0] = PMU_ADB_CMD;
11a50873
BH		 1083 req.data[1] = ADB_BUSRESET;
1084 req.data[2] = 0;
1da177e4
LT		 1085 req.data[3] = 0;
1086 req.data[4] = 0;
1087 req.reply_len = 0;
1088 req.reply_expected = 1;
1089 if (pmu_queue_request(&req) != 0) {
1090 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1091 return -EIO;
1092 }
1093 pmu_wait_complete(&req);
1094
1095 if (save_autopoll != 0)
11a50873 1096 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT		 1097
1098 return 0;
1099}
1100#endif /* CONFIG_ADB */
1101
1102/* Construct and send a pmu request */
aacaf9bd 1103int
1da177e4
LT		 1104pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1105 int nbytes, ...)
1106{
1107 va_list list;
1108 int i;
1109
1110 if (vias == NULL)
1111 return -ENXIO;
1112
1113 if (nbytes < 0 || nbytes > 32) {
1114 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1115 req->complete = 1;
1116 return -EINVAL;
1117 }
1118 req->nbytes = nbytes;
1119 req->done = done;
1120 va_start(list, nbytes);
1121 for (i = 0; i < nbytes; ++i)
1122 req->data[i] = va_arg(list, int);
1123 va_end(list);
1124 req->reply_len = 0;
1125 req->reply_expected = 0;
1126 return pmu_queue_request(req);
1127}
1128
aacaf9bd 1129int
1da177e4
LT		 1130pmu_queue_request(struct adb_request *req)
1131{
1132 unsigned long flags;
1133 int nsend;
1134
1135 if (via == NULL) {
1136 req->complete = 1;
1137 return -ENXIO;
1138 }
1139 if (req->nbytes <= 0) {
1140 req->complete = 1;
1141 return 0;
1142 }
1143 nsend = pmu_data_len[req->data[0]][0];
1144 if (nsend >= 0 && req->nbytes != nsend + 1) {
1145 req->complete = 1;
1146 return -EINVAL;
1147 }
1148
1149 req->next = NULL;
1150 req->sent = 0;
1151 req->complete = 0;
1152
1153 spin_lock_irqsave(&pmu_lock, flags);
1154 if (current_req != 0) {
1155 last_req->next = req;
1156 last_req = req;
1157 } else {
1158 current_req = req;
1159 last_req = req;
1160 if (pmu_state == idle)
1161 pmu_start();
1162 }
1163 spin_unlock_irqrestore(&pmu_lock, flags);
1164
1165 return 0;
1166}
1167
1168static inline void
1169wait_for_ack(void)
1170{
1171 /* Sightly increased the delay, I had one occurrence of the message
1172 * reported
1173 */
1174 int timeout = 4000;
1175 while ((in_8(&via[B]) & TACK) == 0) {
1176 if (--timeout < 0) {
1177 printk(KERN_ERR "PMU not responding (!ack)\n");
1178 return;
1179 }
1180 udelay(10);
1181 }
1182}
1183
1184/* New PMU seems to be very sensitive to those timings, so we make sure
1185 * PCI is flushed immediately */
1186static inline void
1187send_byte(int x)
1188{
1189 volatile unsigned char __iomem *v = via;
1190
1191 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1192 out_8(&v[SR], x);
1193 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1194 (void)in_8(&v[B]);
1195}
1196
1197static inline void
1198recv_byte(void)
1199{
1200 volatile unsigned char __iomem *v = via;
1201
1202 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1203 in_8(&v[SR]); /* resets SR */
1204 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1205 (void)in_8(&v[B]);
1206}
1207
1208static inline void
1209pmu_done(struct adb_request *req)
1210{
1211 void (*done)(struct adb_request *) = req->done;
1212 mb();
1213 req->complete = 1;
1214 /* Here, we assume that if the request has a done member, the
1215 * struct request will survive to setting req->complete to 1
1216 */
1217 if (done)
1218 (*done)(req);
1219}
1220
aacaf9bd 1221static void
1da177e4
LT		 1222pmu_start(void)
1223{
1224 struct adb_request *req;
1225
1226 /* assert pmu_state == idle */
1227 /* get the packet to send */
1228 req = current_req;
1229 if (req == 0 || pmu_state != idle
1230 || (/*req->reply_expected && */req_awaiting_reply))
1231 return;
1232
1233 pmu_state = sending;
1234 data_index = 1;
1235 data_len = pmu_data_len[req->data[0]][0];
1236
1237 /* Sounds safer to make sure ACK is high before writing. This helped
1238 * kill a problem with ADB and some iBooks
1239 */
1240 wait_for_ack();
1241 /* set the shift register to shift out and send a byte */
1242 send_byte(req->data[0]);
1243}
1244
aacaf9bd 1245void
1da177e4
LT		 1246pmu_poll(void)
1247{
1248 if (!via)
1249 return;
1250 if (disable_poll)
1251 return;
7d12e780 1252 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1253}
1254
aacaf9bd 1255void
1da177e4
LT		 1256pmu_poll_adb(void)
1257{
1258 if (!via)
1259 return;
1260 if (disable_poll)
1261 return;
1262 /* Kicks ADB read when PMU is suspended */
1263 adb_int_pending = 1;
1264 do {
7d12e780 1265 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1266 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1267 || req_awaiting_reply));
1268}
1269
aacaf9bd 1270void
1da177e4
LT		 1271pmu_wait_complete(struct adb_request *req)
1272{
1273 if (!via)
1274 return;
1275 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1276 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1277}
1278
1279/* This function loops until the PMU is idle and prevents it from
1280 * anwsering to ADB interrupts. pmu_request can still be called.
1281 * This is done to avoid spurrious shutdowns when we know we'll have
1282 * interrupts switched off for a long time
1283 */
aacaf9bd 1284void
1da177e4
LT		 1285pmu_suspend(void)
1286{
1287 unsigned long flags;
1b0e9d44 1288
1da177e4
LT		 1289 if (!via)
1290 return;
1291
1292 spin_lock_irqsave(&pmu_lock, flags);
1293 pmu_suspended++;
1294 if (pmu_suspended > 1) {
1295 spin_unlock_irqrestore(&pmu_lock, flags);
1296 return;
1297 }
1298
1299 do {
1300 spin_unlock_irqrestore(&pmu_lock, flags);
1301 if (req_awaiting_reply)
1302 adb_int_pending = 1;
7d12e780 1303 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1304 spin_lock_irqsave(&pmu_lock, flags);
1305 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT		 1306 if (gpio_irq >= 0)
1307 disable_irq_nosync(gpio_irq);
1308 out_8(&via[IER], CB1_INT | IER_CLR);
1309 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT		 1310 break;
1311 }
1312 } while (1);
1313}
1314
aacaf9bd 1315void
1da177e4
LT		 1316pmu_resume(void)
1317{
1318 unsigned long flags;
1319
1320 if (!via || (pmu_suspended < 1))
1321 return;
1322
1323 spin_lock_irqsave(&pmu_lock, flags);
1324 pmu_suspended--;
1325 if (pmu_suspended > 0) {
1326 spin_unlock_irqrestore(&pmu_lock, flags);
1327 return;
1328 }
1329 adb_int_pending = 1;
1da177e4
LT		 1330 if (gpio_irq >= 0)
1331 enable_irq(gpio_irq);
1332 out_8(&via[IER], CB1_INT | IER_SET);
1333 spin_unlock_irqrestore(&pmu_lock, flags);
1334 pmu_poll();
1da177e4
LT		 1335}
1336
1337/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1338static void
7d12e780 1339pmu_handle_data(unsigned char *data, int len)
1da177e4
LT		 1340{
1341 unsigned char ints, pirq;
1342 int i = 0;
1343
1344 asleep = 0;
1345 if (drop_interrupts || len < 1) {
1346 adb_int_pending = 0;
1347 pmu_irq_stats[8]++;
1348 return;
1349 }
1350
1351 /* Get PMU interrupt mask */
1352 ints = data[0];
1353
1354 /* Record zero interrupts for stats */
1355 if (ints == 0)
1356 pmu_irq_stats[9]++;
1357
1358 /* Hack to deal with ADB autopoll flag */
1359 if (ints & PMU_INT_ADB)
1360 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1361
1362next:
1363
1364 if (ints == 0) {
1365 if (i > pmu_irq_stats[10])
1366 pmu_irq_stats[10] = i;
1367 return;
1368 }
1369
1370 for (pirq = 0; pirq < 8; pirq++)
1371 if (ints & (1 << pirq))
1372 break;
1373 pmu_irq_stats[pirq]++;
1374 i++;
1375 ints &= ~(1 << pirq);
1376
1377 /* Note: for some reason, we get an interrupt with len=1,
1378 * data[0]==0 after each normal ADB interrupt, at least
1379 * on the Pismo. Still investigating... --BenH
1380 */
1381 if ((1 << pirq) & PMU_INT_ADB) {
1382 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1383 struct adb_request *req = req_awaiting_reply;
1384 if (req == 0) {
1385 printk(KERN_ERR "PMU: extra ADB reply\n");
1386 return;
1387 }
1388 req_awaiting_reply = NULL;
1389 if (len <= 2)
1390 req->reply_len = 0;
1391 else {
1392 memcpy(req->reply, data + 1, len - 1);
1393 req->reply_len = len - 1;
1394 }
1395 pmu_done(req);
1396 } else {
1da177e4
LT		 1397 if (len == 4 && data[1] == 0x2c) {
1398 extern int xmon_wants_key, xmon_adb_keycode;
1399 if (xmon_wants_key) {
1400 xmon_adb_keycode = data[2];
1401 return;
1402 }
1403 }
1da177e4
LT		 1404#ifdef CONFIG_ADB
1405 /*
1406 * XXX On the [23]400 the PMU gives us an up
1407 * event for keycodes 0x74 or 0x75 when the PC
1408 * card eject buttons are released, so we
1409 * ignore those events.
1410 */
1411 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1412 && data[1] == 0x2c && data[3] == 0xff
1413 && (data[2] & ~1) == 0xf4))
7d12e780 1414 adb_input(data+1, len-1, 1);
1da177e4
LT		 1415#endif /* CONFIG_ADB */
1416 }
1417 }
1418 /* Sound/brightness button pressed */
1419 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1420#ifdef CONFIG_PMAC_BACKLIGHT
1421 if (len == 3)
4b755999
MH		 1422 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1423#endif
1da177e4
LT		 1424 }
1425 /* Tick interrupt */
1426 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT		 1427 /* Environement or tick interrupt, query batteries */
1428 if (pmu_battery_count) {
1429 if ((--query_batt_timer) == 0) {
1430 query_battery_state();
1431 query_batt_timer = BATTERY_POLLING_COUNT;
1432 }
1433 }
1434 }
1435 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1436 if (pmu_battery_count)
1437 query_battery_state();
1438 pmu_pass_intr(data, len);
9e8e30a0
JB		 1439 /* len == 6 is probably a bad check. But how do I
1440 * know what PMU versions send what events here? */
1441 if (len == 6) {
1442 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1443 via_pmu_event(PMU_EVT_LID, data[1]&1);
1444 }
1da177e4
LT		 1445 } else {
1446 pmu_pass_intr(data, len);
1da177e4
LT		 1447 }
1448 goto next;
1449}
1450
aacaf9bd 1451static struct adb_request*
7d12e780 1452pmu_sr_intr(void)
1da177e4
LT		 1453{
1454 struct adb_request *req;
1455 int bite = 0;
1456
1457 if (via[B] & TREQ) {
1458 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1459 out_8(&via[IFR], SR_INT);
1460 return NULL;
1461 }
1462 /* The ack may not yet be low when we get the interrupt */
1463 while ((in_8(&via[B]) & TACK) != 0)
1464 ;
1465
1466 /* if reading grab the byte, and reset the interrupt */
1467 if (pmu_state == reading || pmu_state == reading_intr)
1468 bite = in_8(&via[SR]);
1469
1470 /* reset TREQ and wait for TACK to go high */
1471 out_8(&via[B], in_8(&via[B]) | TREQ);
1472 wait_for_ack();
1473
1474 switch (pmu_state) {
1475 case sending:
1476 req = current_req;
1477 if (data_len < 0) {
1478 data_len = req->nbytes - 1;
1479 send_byte(data_len);
1480 break;
1481 }
1482 if (data_index <= data_len) {
1483 send_byte(req->data[data_index++]);
1484 break;
1485 }
1486 req->sent = 1;
1487 data_len = pmu_data_len[req->data[0]][1];
1488 if (data_len == 0) {
1489 pmu_state = idle;
1490 current_req = req->next;
1491 if (req->reply_expected)
1492 req_awaiting_reply = req;
1493 else
1494 return req;
1495 } else {
1496 pmu_state = reading;
1497 data_index = 0;
1498 reply_ptr = req->reply + req->reply_len;
1499 recv_byte();
1500 }
1501 break;
1502
1503 case intack:
1504 data_index = 0;
1505 data_len = -1;
1506 pmu_state = reading_intr;
1507 reply_ptr = interrupt_data[int_data_last];
1508 recv_byte();
1509 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1510 enable_irq(gpio_irq);
1511 gpio_irq_enabled = 1;
1512 }
1513 break;
1514
1515 case reading:
1516 case reading_intr:
1517 if (data_len == -1) {
1518 data_len = bite;
1519 if (bite > 32)
1520 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1521 } else if (data_index < 32) {
1522 reply_ptr[data_index++] = bite;
1523 }
1524 if (data_index < data_len) {
1525 recv_byte();
1526 break;
1527 }
1528
1529 if (pmu_state == reading_intr) {
1530 pmu_state = idle;
1531 int_data_state[int_data_last] = int_data_ready;
1532 interrupt_data_len[int_data_last] = data_len;
1533 } else {
1534 req = current_req;
1535 /*
1536 * For PMU sleep and freq change requests, we lock the
c03983ac 1537 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT		 1538 * spurrious event polling getting in
1539 */
1540 current_req = req->next;
1541 req->reply_len += data_index;
1542 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1543 pmu_state = locked;
1544 else
1545 pmu_state = idle;
1546 return req;
1547 }
1548 break;
1549
1550 default:
1551 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1552 pmu_state);
1553 }
1554 return NULL;
1555}
1556
aacaf9bd 1557static irqreturn_t
7d12e780 1558via_pmu_interrupt(int irq, void *arg)
1da177e4
LT		 1559{
1560 unsigned long flags;
1561 int intr;
1562 int nloop = 0;
1563 int int_data = -1;
1564 struct adb_request *req = NULL;
1565 int handled = 0;
1566
1567 /* This is a bit brutal, we can probably do better */
1568 spin_lock_irqsave(&pmu_lock, flags);
1569 ++disable_poll;
1570
1571 for (;;) {
1572 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1573 if (intr == 0)
1574 break;
1575 handled = 1;
1576 if (++nloop > 1000) {
1577 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1578 "intr=%x, ier=%x pmu_state=%d\n",
1579 intr, in_8(&via[IER]), pmu_state);
1580 break;
1581 }
1582 out_8(&via[IFR], intr);
1583 if (intr & CB1_INT) {
1584 adb_int_pending = 1;
1585 pmu_irq_stats[0]++;
1586 }
1587 if (intr & SR_INT) {
7d12e780 1588 req = pmu_sr_intr();
1da177e4
LT		 1589 if (req)
1590 break;
1591 }
1592 }
1593
1594recheck:
1595 if (pmu_state == idle) {
1596 if (adb_int_pending) {
1597 if (int_data_state[0] == int_data_empty)
1598 int_data_last = 0;
1599 else if (int_data_state[1] == int_data_empty)
1600 int_data_last = 1;
1601 else
1602 goto no_free_slot;
1603 pmu_state = intack;
1604 int_data_state[int_data_last] = int_data_fill;
1605 /* Sounds safer to make sure ACK is high before writing.
1606 * This helped kill a problem with ADB and some iBooks
1607 */
1608 wait_for_ack();
1609 send_byte(PMU_INT_ACK);
1610 adb_int_pending = 0;
1611 } else if (current_req)
1612 pmu_start();
1613 }
1614no_free_slot:
1615 /* Mark the oldest buffer for flushing */
1616 if (int_data_state[!int_data_last] == int_data_ready) {
1617 int_data_state[!int_data_last] = int_data_flush;
1618 int_data = !int_data_last;
1619 } else if (int_data_state[int_data_last] == int_data_ready) {
1620 int_data_state[int_data_last] = int_data_flush;
1621 int_data = int_data_last;
1622 }
1623 --disable_poll;
1624 spin_unlock_irqrestore(&pmu_lock, flags);
1625
1626 /* Deal with completed PMU requests outside of the lock */
1627 if (req) {
1628 pmu_done(req);
1629 req = NULL;
1630 }
1631
1632 /* Deal with interrupt datas outside of the lock */
1633 if (int_data >= 0) {
7d12e780 1634 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT		 1635 spin_lock_irqsave(&pmu_lock, flags);
1636 ++disable_poll;
1637 int_data_state[int_data] = int_data_empty;
1638 int_data = -1;
1639 goto recheck;
1640 }
1641
1642 return IRQ_RETVAL(handled);
1643}
1644
aacaf9bd 1645void
1da177e4
LT		 1646pmu_unlock(void)
1647{
1648 unsigned long flags;
1649
1650 spin_lock_irqsave(&pmu_lock, flags);
1651 if (pmu_state == locked)
1652 pmu_state = idle;
1653 adb_int_pending = 1;
1654 spin_unlock_irqrestore(&pmu_lock, flags);
1655}
1656
1657
aacaf9bd 1658static irqreturn_t
7d12e780 1659gpio1_interrupt(int irq, void *arg)
1da177e4
LT		 1660{
1661 unsigned long flags;
1662
1663 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1664 spin_lock_irqsave(&pmu_lock, flags);
1665 if (gpio_irq_enabled > 0) {
1666 disable_irq_nosync(gpio_irq);
1667 gpio_irq_enabled = 0;
1668 }
1669 pmu_irq_stats[1]++;
1670 adb_int_pending = 1;
1671 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1672 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1673 return IRQ_HANDLED;
1674 }
1675 return IRQ_NONE;
1676}
1677
aacaf9bd 1678void
1da177e4
LT		 1679pmu_enable_irled(int on)
1680{
1681 struct adb_request req;
1682
1683 if (vias == NULL)
1684 return ;
1685 if (pmu_kind == PMU_KEYLARGO_BASED)
1686 return ;
1687
1688 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1689 (on ? PMU_POW_ON : PMU_POW_OFF));
1690 pmu_wait_complete(&req);
1691}
1692
aacaf9bd 1693void
1da177e4
LT		 1694pmu_restart(void)
1695{
1696 struct adb_request req;
1697
1698 if (via == NULL)
1699 return;
1700
1701 local_irq_disable();
1702
1703 drop_interrupts = 1;
1704
1705 if (pmu_kind != PMU_KEYLARGO_BASED) {
1706 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1707 PMU_INT_TICK );
1708 while(!req.complete)
1709 pmu_poll();
1710 }
1711
1712 pmu_request(&req, NULL, 1, PMU_RESET);
1713 pmu_wait_complete(&req);
1714 for (;;)
1715 ;
1716}
1717
aacaf9bd 1718void
1da177e4
LT		 1719pmu_shutdown(void)
1720{
1721 struct adb_request req;
1722
1723 if (via == NULL)
1724 return;
1725
1726 local_irq_disable();
1727
1728 drop_interrupts = 1;
1729
1730 if (pmu_kind != PMU_KEYLARGO_BASED) {
1731 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1732 PMU_INT_TICK );
1733 pmu_wait_complete(&req);
1734 } else {
1735 /* Disable server mode on shutdown or we'll just
1736 * wake up again
1737 */
1738 pmu_set_server_mode(0);
1739 }
1740
1741 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1742 'M', 'A', 'T', 'T');
1743 pmu_wait_complete(&req);
1744 for (;;)
1745 ;
1746}
1747
1748int
1749pmu_present(void)
1750{
1751 return via != 0;
1752}
1753
f91266ed 1754#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 1755/*
1756 * Put the powerbook to sleep.
1757 */
1758
aacaf9bd 1759static u32 save_via[8];
1da177e4 1760
aacaf9bd 1761static void
1da177e4
LT		 1762save_via_state(void)
1763{
1764 save_via[0] = in_8(&via[ANH]);
1765 save_via[1] = in_8(&via[DIRA]);
1766 save_via[2] = in_8(&via[B]);
1767 save_via[3] = in_8(&via[DIRB]);
1768 save_via[4] = in_8(&via[PCR]);
1769 save_via[5] = in_8(&via[ACR]);
1770 save_via[6] = in_8(&via[T1CL]);
1771 save_via[7] = in_8(&via[T1CH]);
1772}
aacaf9bd 1773static void
1da177e4
LT		 1774restore_via_state(void)
1775{
1776 out_8(&via[ANH], save_via[0]);
1777 out_8(&via[DIRA], save_via[1]);
1778 out_8(&via[B], save_via[2]);
1779 out_8(&via[DIRB], save_via[3]);
1780 out_8(&via[PCR], save_via[4]);
1781 out_8(&via[ACR], save_via[5]);
1782 out_8(&via[T1CL], save_via[6]);
1783 out_8(&via[T1CH], save_via[7]);
1784 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1785 out_8(&via[IFR], 0x7f); /* clear IFR */
1786 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1787}
1788
1da177e4
LT		 1789#define GRACKLE_PM (1<<7)
1790#define GRACKLE_DOZE (1<<5)
1791#define GRACKLE_NAP (1<<4)
1792#define GRACKLE_SLEEP (1<<3)
1793
3bea6313 1794static int powerbook_sleep_grackle(void)
1da177e4
LT		 1795{
1796 unsigned long save_l2cr;
1797 unsigned short pmcr1;
1798 struct adb_request req;
1da177e4
LT		 1799 struct pci_dev *grackle;
1800
c78f8305 1801 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT		 1802 if (!grackle)
1803 return -ENODEV;
1804
1da177e4
LT		 1805 /* Turn off various things. Darwin does some retry tests here... */
1806 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1807 pmu_wait_complete(&req);
1808 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1809 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1810 pmu_wait_complete(&req);
1811
1812 /* For 750, save backside cache setting and disable it */
1813 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1814
1815 if (!__fake_sleep) {
1816 /* Ask the PMU to put us to sleep */
1817 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1818 pmu_wait_complete(&req);
1819 }
1820
1821 /* The VIA is supposed not to be restored correctly*/
1822 save_via_state();
1823 /* We shut down some HW */
1824 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1825
1826 pci_read_config_word(grackle, 0x70, &pmcr1);
1827 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1828 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1829 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1830 pci_write_config_word(grackle, 0x70, pmcr1);
1831
1832 /* Call low-level ASM sleep handler */
1833 if (__fake_sleep)
1834 mdelay(5000);
1835 else
1836 low_sleep_handler();
1837
1838 /* We're awake again, stop grackle PM */
1839 pci_read_config_word(grackle, 0x70, &pmcr1);
1840 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1841 pci_write_config_word(grackle, 0x70, pmcr1);
1842
c78f8305
AC		 1843 pci_dev_put(grackle);
1844
1da177e4
LT		 1845 /* Make sure the PMU is idle */
1846 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1847 restore_via_state();
1848
1849 /* Restore L2 cache */
1850 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1851 _set_L2CR(save_l2cr);
1852
1853 /* Restore userland MMU context */
d2adba3f 1854 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1855
1856 /* Power things up */
1857 pmu_unlock();
1858 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1859 pmu_wait_complete(&req);
1860 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1861 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1862 pmu_wait_complete(&req);
1863 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1864 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1865 pmu_wait_complete(&req);
1866
1da177e4
LT		 1867 return 0;
1868}
1869
aacaf9bd 1870static int
1da177e4
LT		 1871powerbook_sleep_Core99(void)
1872{
1873 unsigned long save_l2cr;
1874 unsigned long save_l3cr;
1875 struct adb_request req;
1da177e4
LT		 1876
1877 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1878 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1879 return -ENOSYS;
1880 }
1881
1882 if (num_online_cpus() > 1 || cpu_is_offline(0))
1883 return -EAGAIN;
1884
b16eeb47
BH		 1885 /* Stop environment and ADB interrupts */
1886 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1887 pmu_wait_complete(&req);
1da177e4
LT		 1888
1889 /* Tell PMU what events will wake us up */
1890 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1891 0xff, 0xff);
1892 pmu_wait_complete(&req);
1893 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1894 0, PMU_PWR_WAKEUP_KEY |
1895 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1896 pmu_wait_complete(&req);
1897
1898 /* Save the state of the L2 and L3 caches */
1899 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1900 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1901
1902 if (!__fake_sleep) {
1903 /* Ask the PMU to put us to sleep */
1904 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1905 pmu_wait_complete(&req);
1906 }
1907
1908 /* The VIA is supposed not to be restored correctly*/
1909 save_via_state();
1910
1911 /* Shut down various ASICs. There's a chance that we can no longer
1912 * talk to the PMU after this, so I moved it to _after_ sending the
1913 * sleep command to it. Still need to be checked.
1914 */
1915 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1916
1917 /* Call low-level ASM sleep handler */
1918 if (__fake_sleep)
1919 mdelay(5000);
1920 else
1921 low_sleep_handler();
1922
1923 /* Restore Apple core ASICs state */
1924 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1925
1926 /* Restore VIA */
1927 restore_via_state();
1928
0086b5ec
BH		 1929 /* tweak LPJ before cpufreq is there */
1930 loops_per_jiffy *= 2;
1931
1da177e4
LT		 1932 /* Restore video */
1933 pmac_call_early_video_resume();
1934
1935 /* Restore L2 cache */
1936 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1937 _set_L2CR(save_l2cr);
1938 /* Restore L3 cache */
1939 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1940 _set_L3CR(save_l3cr);
1941
1942 /* Restore userland MMU context */
d2adba3f 1943 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1944
1945 /* Tell PMU we are ready */
1946 pmu_unlock();
1947 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1948 pmu_wait_complete(&req);
1949 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1950 pmu_wait_complete(&req);
1951
0086b5ec
BH		 1952 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1953 loops_per_jiffy /= 2;
1954
1da177e4
LT		 1955 return 0;
1956}
1957
1958#define PB3400_MEM_CTRL 0xf8000000
1959#define PB3400_MEM_CTRL_SLEEP 0x70
1960
887ef35a
PM		 1961static void __iomem *pb3400_mem_ctrl;
1962
1963static void powerbook_sleep_init_3400(void)
1964{
1965 /* map in the memory controller registers */
1966 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1967 if (pb3400_mem_ctrl == NULL)
1968 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1969}
1970
1971static int powerbook_sleep_3400(void)
1da177e4 1972{
f91266ed 1973 int i, x;
1da177e4 1974 unsigned int hid0;
887ef35a 1975 unsigned long msr;
1da177e4 1976 struct adb_request sleep_req;
1da177e4
LT		 1977 unsigned int __iomem *mem_ctrl_sleep;
1978
887ef35a 1979 if (pb3400_mem_ctrl == NULL)
1da177e4 1980 return -ENOMEM;
887ef35a 1981 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1982
1da177e4
LT		 1983 /* Set the memory controller to keep the memory refreshed
1984 while we're asleep */
1985 for (i = 0x403f; i >= 0x4000; --i) {
1986 out_be32(mem_ctrl_sleep, i);
1987 do {
1988 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1989 } while (x == 0);
1990 if (x >= 0x100)
1991 break;
1992 }
1993
1994 /* Ask the PMU to put us to sleep */
1995 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM		 1996 pmu_wait_complete(&sleep_req);
1997 pmu_unlock();
1da177e4 1998
887ef35a 1999 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 2000
1da177e4
LT		 2001 asleep = 1;
2002
2003 /* Put the CPU into sleep mode */
21fe3301 2004 hid0 = mfspr(SPRN_HID0);
1da177e4 2005 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 2006 mtspr(SPRN_HID0, hid0);
887ef35a
PM		 2007 local_irq_enable();
2008 msr = mfmsr() | MSR_POW;
2009 while (asleep) {
2010 mb();
2011 mtmsr(msr);
2012 isync();
2013 }
2014 local_irq_disable();
1da177e4
LT		 2015
2016 /* OK, we're awake again, start restoring things */
2017 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2018 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2019
1da177e4
LT		 2020 return 0;
2021}
2022
f91266ed 2023#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2024
1da177e4
LT		 2025/*
2026 * Support for /dev/pmu device
2027 */
2028#define RB_SIZE 0x10
2029struct pmu_private {
2030 struct list_head list;
2031 int rb_get;
2032 int rb_put;
2033 struct rb_entry {
2034 unsigned short len;
2035 unsigned char data[16];
2036 } rb_buf[RB_SIZE];
2037 wait_queue_head_t wait;
2038 spinlock_t lock;
2039#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2040 int backlight_locker;
4b755999 2041#endif
1da177e4
LT		 2042};
2043
2044static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2045static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2046
aacaf9bd 2047static void
1da177e4
LT		 2048pmu_pass_intr(unsigned char *data, int len)
2049{
2050 struct pmu_private *pp;
2051 struct list_head *list;
2052 int i;
2053 unsigned long flags;
2054
2055 if (len > sizeof(pp->rb_buf[0].data))
2056 len = sizeof(pp->rb_buf[0].data);
2057 spin_lock_irqsave(&all_pvt_lock, flags);
2058 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2059 pp = list_entry(list, struct pmu_private, list);
2060 spin_lock(&pp->lock);
2061 i = pp->rb_put + 1;
2062 if (i >= RB_SIZE)
2063 i = 0;
2064 if (i != pp->rb_get) {
2065 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2066 rp->len = len;
2067 memcpy(rp->data, data, len);
2068 pp->rb_put = i;
2069 wake_up_interruptible(&pp->wait);
2070 }
2071 spin_unlock(&pp->lock);
2072 }
2073 spin_unlock_irqrestore(&all_pvt_lock, flags);
2074}
2075
aacaf9bd 2076static int
1da177e4
LT		 2077pmu_open(struct inode *inode, struct file *file)
2078{
2079 struct pmu_private *pp;
2080 unsigned long flags;
2081
2082 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2083 if (pp == 0)
2084 return -ENOMEM;
2085 pp->rb_get = pp->rb_put = 0;
2086 spin_lock_init(&pp->lock);
2087 init_waitqueue_head(&pp->wait);
d851b6e0 2088 mutex_lock(&pmu_info_proc_mutex);
1da177e4
LT		 2089 spin_lock_irqsave(&all_pvt_lock, flags);
2090#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2091 pp->backlight_locker = 0;
4b755999 2092#endif
1da177e4
LT		 2093 list_add(&pp->list, &all_pmu_pvt);
2094 spin_unlock_irqrestore(&all_pvt_lock, flags);
2095 file->private_data = pp;
d851b6e0 2096 mutex_unlock(&pmu_info_proc_mutex);
1da177e4
LT		 2097 return 0;
2098}
2099
aacaf9bd 2100static ssize_t
1da177e4
LT		 2101pmu_read(struct file *file, char __user *buf,
2102 size_t count, loff_t *ppos)
2103{
2104 struct pmu_private *pp = file->private_data;
2105 DECLARE_WAITQUEUE(wait, current);
2106 unsigned long flags;
2107 int ret = 0;
2108
2109 if (count < 1 || pp == 0)
2110 return -EINVAL;
2111 if (!access_ok(VERIFY_WRITE, buf, count))
2112 return -EFAULT;
2113
2114 spin_lock_irqsave(&pp->lock, flags);
2115 add_wait_queue(&pp->wait, &wait);
111fbc68 2116 set_current_state(TASK_INTERRUPTIBLE);
1da177e4
LT		 2117
2118 for (;;) {
2119 ret = -EAGAIN;
2120 if (pp->rb_get != pp->rb_put) {
2121 int i = pp->rb_get;
2122 struct rb_entry *rp = &pp->rb_buf[i];
2123 ret = rp->len;
2124 spin_unlock_irqrestore(&pp->lock, flags);
2125 if (ret > count)
2126 ret = count;
2127 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2128 ret = -EFAULT;
2129 if (++i >= RB_SIZE)
2130 i = 0;
2131 spin_lock_irqsave(&pp->lock, flags);
2132 pp->rb_get = i;
2133 }
2134 if (ret >= 0)
2135 break;
2136 if (file->f_flags & O_NONBLOCK)
2137 break;
2138 ret = -ERESTARTSYS;
2139 if (signal_pending(current))
2140 break;
2141 spin_unlock_irqrestore(&pp->lock, flags);
2142 schedule();
2143 spin_lock_irqsave(&pp->lock, flags);
2144 }
111fbc68 2145 __set_current_state(TASK_RUNNING);
1da177e4
LT		 2146 remove_wait_queue(&pp->wait, &wait);
2147 spin_unlock_irqrestore(&pp->lock, flags);
2148
2149 return ret;
2150}
2151
aacaf9bd 2152static ssize_t
1da177e4
LT		 2153pmu_write(struct file *file, const char __user *buf,
2154 size_t count, loff_t *ppos)
2155{
2156 return 0;
2157}
2158
aacaf9bd 2159static unsigned int
1da177e4
LT		 2160pmu_fpoll(struct file *filp, poll_table *wait)
2161{
2162 struct pmu_private *pp = filp->private_data;
2163 unsigned int mask = 0;
2164 unsigned long flags;
2165
2166 if (pp == 0)
2167 return 0;
2168 poll_wait(filp, &pp->wait, wait);
2169 spin_lock_irqsave(&pp->lock, flags);
2170 if (pp->rb_get != pp->rb_put)
2171 mask |= POLLIN;
2172 spin_unlock_irqrestore(&pp->lock, flags);
2173 return mask;
2174}
2175
aacaf9bd 2176static int
1da177e4
LT		 2177pmu_release(struct inode *inode, struct file *file)
2178{
2179 struct pmu_private *pp = file->private_data;
2180 unsigned long flags;
2181
1da177e4
LT		 2182 if (pp != 0) {
2183 file->private_data = NULL;
2184 spin_lock_irqsave(&all_pvt_lock, flags);
2185 list_del(&pp->list);
2186 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2187
1da177e4 2188#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH		 2189 if (pp->backlight_locker)
2190 pmac_backlight_enable();
2191#endif
2192
1da177e4
LT		 2193 kfree(pp);
2194 }
1da177e4
LT		 2195 return 0;
2196}
2197
f91266ed 2198#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2199static void pmac_suspend_disable_irqs(void)
f91266ed 2200{
f91266ed
JB		 2201 /* Call platform functions marked "on sleep" */
2202 pmac_pfunc_i2c_suspend();
2203 pmac_pfunc_base_suspend();
f91266ed
JB		 2204}
2205
2206static int powerbook_sleep(suspend_state_t state)
2207{
2208 int error = 0;
2209
2210 /* Wait for completion of async requests */
2211 while (!batt_req.complete)
2212 pmu_poll();
2213
2214 /* Giveup the lazy FPU & vec so we don't have to back them
2215 * up from the low level code
2216 */
2217 enable_kernel_fp();
2218
2219#ifdef CONFIG_ALTIVEC
2220 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2221 enable_kernel_altivec();
2222#endif /* CONFIG_ALTIVEC */
2223
2224 switch (pmu_kind) {
2225 case PMU_OHARE_BASED:
2226 error = powerbook_sleep_3400();
2227 break;
2228 case PMU_HEATHROW_BASED:
2229 case PMU_PADDINGTON_BASED:
2230 error = powerbook_sleep_grackle();
2231 break;
2232 case PMU_KEYLARGO_BASED:
2233 error = powerbook_sleep_Core99();
2234 break;
2235 default:
2236 return -ENOSYS;
2237 }
2238
2239 if (error)
2240 return error;
2241
2242 mdelay(100);
2243
f91266ed
JB		 2244 return 0;
2245}
2246
7ac5dde9 2247static void pmac_suspend_enable_irqs(void)
f91266ed
JB		 2248{
2249 /* Force a poll of ADB interrupts */
2250 adb_int_pending = 1;
2251 via_pmu_interrupt(0, NULL);
2252
f91266ed 2253 mdelay(10);
f91266ed
JB		 2254
2255 /* Call platform functions marked "on wake" */
2256 pmac_pfunc_base_resume();
2257 pmac_pfunc_i2c_resume();
2258}
2259
2260static int pmu_sleep_valid(suspend_state_t state)
2261{
2262 return state == PM_SUSPEND_MEM
2263 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2264}
2265
2f55ac07 2266static const struct platform_suspend_ops pmu_pm_ops = {
f91266ed
JB		 2267 .enter = powerbook_sleep,
2268 .valid = pmu_sleep_valid,
2269};
2270
2271static int register_pmu_pm_ops(void)
2272{
7ac5dde9
SW		 2273 if (pmu_kind == PMU_OHARE_BASED)
2274 powerbook_sleep_init_3400();
2275 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2276 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB		 2277 suspend_set_ops(&pmu_pm_ops);
2278
2279 return 0;
2280}
2281
2282device_initcall(register_pmu_pm_ops);
2283#endif
2284
55929332 2285static int pmu_ioctl(struct file *filp,
1da177e4
LT		 2286 u_int cmd, u_long arg)
2287{
1da177e4 2288 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2289 int error = -EINVAL;
1da177e4
LT		 2290
2291 switch (cmd) {
2292 case PMU_IOC_SLEEP:
2293 if (!capable(CAP_SYS_ADMIN))
2294 return -EACCES;
f91266ed 2295 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2296 case PMU_IOC_CAN_SLEEP:
f91266ed 2297 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT		 2298 return put_user(0, argp);
2299 else
2300 return put_user(1, argp);
2301
5474c120
MH		 2302#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2303 /* Compatibility ioctl's for backlight */
1da177e4 2304 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH		 2305 {
2306 int brightness;
2307
5474c120
MH		 2308 brightness = pmac_backlight_get_legacy_brightness();
2309 if (brightness < 0)
2310 return brightness;
2311 else
2312 return put_user(brightness, argp);
2313
2314 }
1da177e4
LT		 2315 case PMU_IOC_SET_BACKLIGHT:
2316 {
5474c120
MH		 2317 int brightness;
2318
5474c120
MH		 2319 error = get_user(brightness, argp);
2320 if (error)
2321 return error;
2322
2323 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT		 2324 }
2325#ifdef CONFIG_INPUT_ADBHID
2326 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2327 struct pmu_private *pp = filp->private_data;
8c870933 2328
1da177e4
LT		 2329 if (pp->backlight_locker)
2330 return 0;
4b755999 2331
1da177e4 2332 pp->backlight_locker = 1;
4b755999
MH		 2333 pmac_backlight_disable();
2334
1da177e4
LT		 2335 return 0;
2336 }
2337#endif /* CONFIG_INPUT_ADBHID */
5474c120 2338#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2339
1da177e4
LT		 2340 case PMU_IOC_GET_MODEL:
2341 return put_user(pmu_kind, argp);
2342 case PMU_IOC_HAS_ADB:
2343 return put_user(pmu_has_adb, argp);
2344 }
8c870933 2345 return error;
1da177e4
LT		 2346}
2347
55929332
AB		 2348static long pmu_unlocked_ioctl(struct file *filp,
2349 u_int cmd, u_long arg)
2350{
2351 int ret;
2352
d851b6e0 2353 mutex_lock(&pmu_info_proc_mutex);
55929332 2354 ret = pmu_ioctl(filp, cmd, arg);
d851b6e0 2355 mutex_unlock(&pmu_info_proc_mutex);
55929332
AB		 2356
2357 return ret;
2358}
2359
4cc4587f
AS		 2360#ifdef CONFIG_COMPAT
2361#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2362#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2363#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2364#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2365#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2366#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2367
2368static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2369{
2370 switch (cmd) {
2371 case PMU_IOC_SLEEP:
2372 break;
2373 case PMU_IOC_GET_BACKLIGHT32:
2374 cmd = PMU_IOC_GET_BACKLIGHT;
2375 break;
2376 case PMU_IOC_SET_BACKLIGHT32:
2377 cmd = PMU_IOC_SET_BACKLIGHT;
2378 break;
2379 case PMU_IOC_GET_MODEL32:
2380 cmd = PMU_IOC_GET_MODEL;
2381 break;
2382 case PMU_IOC_HAS_ADB32:
2383 cmd = PMU_IOC_HAS_ADB;
2384 break;
2385 case PMU_IOC_CAN_SLEEP32:
2386 cmd = PMU_IOC_CAN_SLEEP;
2387 break;
2388 case PMU_IOC_GRAB_BACKLIGHT32:
2389 cmd = PMU_IOC_GRAB_BACKLIGHT;
2390 break;
2391 default:
2392 return -ENOIOCTLCMD;
2393 }
2394 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2395}
2396#endif
2397
fa027c2a 2398static const struct file_operations pmu_device_fops = {
1da177e4
LT		 2399 .read = pmu_read,
2400 .write = pmu_write,
2401 .poll = pmu_fpoll,
55929332 2402 .unlocked_ioctl = pmu_unlocked_ioctl,
4cc4587f
AS		 2403#ifdef CONFIG_COMPAT
2404 .compat_ioctl = compat_pmu_ioctl,
2405#endif
1da177e4
LT		 2406 .open = pmu_open,
2407 .release = pmu_release,
6038f373 2408 .llseek = noop_llseek,
1da177e4
LT		 2409};
2410
aacaf9bd 2411static struct miscdevice pmu_device = {
1da177e4
LT		 2412 PMU_MINOR, "pmu", &pmu_device_fops
2413};
2414
8c870933 2415static int pmu_device_init(void)
1da177e4
LT		 2416{
2417 if (!via)
8c870933 2418 return 0;
1da177e4
LT		 2419 if (misc_register(&pmu_device) < 0)
2420 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2421 return 0;
1da177e4 2422}
8c870933
BH		 2423device_initcall(pmu_device_init);
2424
1da177e4
LT		 2425
2426#ifdef DEBUG_SLEEP
aacaf9bd 2427static inline void
1da177e4
LT		 2428polled_handshake(volatile unsigned char __iomem *via)
2429{
2430 via[B] &= ~TREQ; eieio();
2431 while ((via[B] & TACK) != 0)
2432 ;
2433 via[B] |= TREQ; eieio();
2434 while ((via[B] & TACK) == 0)
2435 ;
2436}
2437
aacaf9bd 2438static inline void
1da177e4
LT		 2439polled_send_byte(volatile unsigned char __iomem *via, int x)
2440{
2441 via[ACR] |= SR_OUT | SR_EXT; eieio();
2442 via[SR] = x; eieio();
2443 polled_handshake(via);
2444}
2445
aacaf9bd 2446static inline int
1da177e4
LT		 2447polled_recv_byte(volatile unsigned char __iomem *via)
2448{
2449 int x;
2450
2451 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2452 x = via[SR]; eieio();
2453 polled_handshake(via);
2454 x = via[SR]; eieio();
2455 return x;
2456}
2457
aacaf9bd 2458int
1da177e4
LT		 2459pmu_polled_request(struct adb_request *req)
2460{
2461 unsigned long flags;
2462 int i, l, c;
2463 volatile unsigned char __iomem *v = via;
2464
2465 req->complete = 1;
2466 c = req->data[0];
2467 l = pmu_data_len[c][0];
2468 if (l >= 0 && req->nbytes != l + 1)
2469 return -EINVAL;
2470
2471 local_irq_save(flags);
2472 while (pmu_state != idle)
2473 pmu_poll();
2474
2475 while ((via[B] & TACK) == 0)
2476 ;
2477 polled_send_byte(v, c);
2478 if (l < 0) {
2479 l = req->nbytes - 1;
2480 polled_send_byte(v, l);
2481 }
2482 for (i = 1; i <= l; ++i)
2483 polled_send_byte(v, req->data[i]);
2484
2485 l = pmu_data_len[c][1];
2486 if (l < 0)
2487 l = polled_recv_byte(v);
2488 for (i = 0; i < l; ++i)
2489 req->reply[i + req->reply_len] = polled_recv_byte(v);
2490
2491 if (req->done)
2492 (*req->done)(req);
2493
2494 local_irq_restore(flags);
2495 return 0;
2496}
1da177e4 2497
f91266ed
JB		 2498/* N.B. This doesn't work on the 3400 */
2499void pmu_blink(int n)
2500{
2501 struct adb_request req;
1da177e4 2502
f91266ed 2503 memset(&req, 0, sizeof(req));
1da177e4 2504
f91266ed
JB		 2505 for (; n > 0; --n) {
2506 req.nbytes = 4;
2507 req.done = NULL;
2508 req.data[0] = 0xee;
2509 req.data[1] = 4;
2510 req.data[2] = 0;
2511 req.data[3] = 1;
2512 req.reply[0] = ADB_RET_OK;
2513 req.reply_len = 1;
2514 req.reply_expected = 0;
2515 pmu_polled_request(&req);
2516 mdelay(50);
2517 req.nbytes = 4;
2518 req.done = NULL;
2519 req.data[0] = 0xee;
2520 req.data[1] = 4;
2521 req.data[2] = 0;
2522 req.data[3] = 0;
2523 req.reply[0] = ADB_RET_OK;
2524 req.reply_len = 1;
2525 req.reply_expected = 0;
2526 pmu_polled_request(&req);
2527 mdelay(50);
2528 }
2529 mdelay(50);
2530}
2531#endif /* DEBUG_SLEEP */
1da177e4 2532
f91266ed 2533#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2534int pmu_sys_suspended;
1da177e4 2535
e83b906c 2536static int pmu_syscore_suspend(void)
1da177e4 2537{
e83b906c 2538 /* Suspend PMU event interrupts */
1da177e4 2539 pmu_suspend();
1da177e4 2540 pmu_sys_suspended = 1;
0094f2cd
BH		 2541
2542#ifdef CONFIG_PMAC_BACKLIGHT
2543 /* Tell backlight code not to muck around with the chip anymore */
2544 pmu_backlight_set_sleep(1);
2545#endif
2546
1da177e4
LT		 2547 return 0;
2548}
2549
e83b906c 2550static void pmu_syscore_resume(void)
1da177e4
LT		 2551{
2552 struct adb_request req;
2553
2554 if (!pmu_sys_suspended)
e83b906c 2555 return;
1da177e4
LT		 2556
2557 /* Tell PMU we are ready */
2558 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2559 pmu_wait_complete(&req);
2560
0094f2cd
BH		 2561#ifdef CONFIG_PMAC_BACKLIGHT
2562 /* Tell backlight code it can use the chip again */
2563 pmu_backlight_set_sleep(0);
2564#endif
1da177e4
LT		 2565 /* Resume PMU event interrupts */
2566 pmu_resume();
1da177e4 2567 pmu_sys_suspended = 0;
1da177e4
LT		 2568}
2569
e83b906c
BH		 2570static struct syscore_ops pmu_syscore_ops = {
2571 .suspend = pmu_syscore_suspend,
2572 .resume = pmu_syscore_resume,
1da177e4
LT		 2573};
2574
e83b906c 2575static int pmu_syscore_register(void)
1da177e4 2576{
e83b906c 2577 register_syscore_ops(&pmu_syscore_ops);
1da177e4 2578
1da177e4
LT		 2579 return 0;
2580}
e83b906c
BH		 2581subsys_initcall(pmu_syscore_register);
2582#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2583
2584EXPORT_SYMBOL(pmu_request);
730745a5 2585EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT		 2586EXPORT_SYMBOL(pmu_poll);
2587EXPORT_SYMBOL(pmu_poll_adb);
2588EXPORT_SYMBOL(pmu_wait_complete);
2589EXPORT_SYMBOL(pmu_suspend);
2590EXPORT_SYMBOL(pmu_resume);
2591EXPORT_SYMBOL(pmu_unlock);
620a2459 2592#if defined(CONFIG_PPC32)
1da177e4
LT		 2593EXPORT_SYMBOL(pmu_enable_irled);
2594EXPORT_SYMBOL(pmu_battery_count);
2595EXPORT_SYMBOL(pmu_batteries);
2596EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2597#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2598
Linux kernel - Deliverables
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