[deliverable/linux.git] / drivers / media / dvb-frontends / atbm8830.c

/*
 *    Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
 *    ATBM8830, ATBM8831
 *
 *    Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
 *
 *    This program is free software; you can redistribute it and/or modify
 *    it under the terms of the GNU General Public License as published by
 *    the Free Software Foundation; either version 2 of the License, or
 *    (at your option) any later version.
 *
 *    This program is distributed in the hope that it will be useful,
 *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *    GNU General Public License for more details.
 *
 *    You should have received a copy of the GNU General Public License
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <asm/div64.h>
#include "dvb_frontend.h"

#include "atbm8830.h"
#include "atbm8830_priv.h"

#define dprintk(args...) \
	do { \
		if (debug) \
			printk(KERN_DEBUG "atbm8830: " args); \
	} while (0)

static int debug;

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");

static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
{
	int ret = 0;
	u8 dev_addr;
	u8 buf1[] = { reg >> 8, reg & 0xFF };
	u8 buf2[] = { data };
	struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
	struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };

	dev_addr = priv->config->demod_address;
	msg1.addr = dev_addr;
	msg2.addr = dev_addr;

	if (debug >= 2)
		dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);

	ret = i2c_transfer(priv->i2c, &msg1, 1);
	if (ret != 1)
		return -EIO;

	ret = i2c_transfer(priv->i2c, &msg2, 1);
	return (ret != 1) ? -EIO : 0;
}

static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
{
	int ret;
	u8 dev_addr;

	u8 buf1[] = { reg >> 8, reg & 0xFF };
	u8 buf2[] = { 0 };
	struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
	struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };

	dev_addr = priv->config->demod_address;
	msg1.addr = dev_addr;
	msg2.addr = dev_addr;

	ret = i2c_transfer(priv->i2c, &msg1, 1);
	if (ret != 1) {
		dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
		return -EIO;
	}

	ret = i2c_transfer(priv->i2c, &msg2, 1);
	if (ret != 1)
		return -EIO;

	*p_data = buf2[0];
	if (debug >= 2)
		dprintk("%s: reg=0x%04X, data=0x%02X\n",
			__func__, reg, buf2[0]);

	return 0;
}

/* Lock register latch so that multi-register read is atomic */
static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
{
	return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
}

static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
{
	u32 val;
	u64 t;

	/* 0x100000 * freq / 30.4MHz */
	t = (u64)0x100000 * freq;
	do_div(t, 30400);
	val = t;

	atbm8830_write_reg(priv, REG_OSC_CLK, val);
	atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
	atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);

	return 0;
}

static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
{

	u32 fs = priv->config->osc_clk_freq;
	u64 t;
	u32 val;
	u8 dat;

	if (freq != 0) {
		/* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
		t = (u64) 2 * 31416 * (freq - fs);
		t <<= 22;
		do_div(t, fs);
		do_div(t, 1000);
		val = t;

		atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
		atbm8830_write_reg(priv, REG_IF_FREQ, val);
		atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
		atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);

		atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
		dat &= 0xFC;
		atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
	} else {
		/* Zero IF */
		atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);

		atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
		dat &= 0xFC;
		dat |= 0x02;
		atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);

		if (priv->config->zif_swap_iq)
			atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
		else
			atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
	}

	return 0;
}

static int is_locked(struct atbm_state *priv, u8 *locked)
{
	u8 status;

	atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);

	if (locked != NULL)
		*locked = (status == 1);
	return 0;
}

static int set_agc_config(struct atbm_state *priv,
	u8 min, u8 max, u8 hold_loop)
{
	/* no effect if both min and max are zero */
	if (!min && !max)
	    return 0;

	atbm8830_write_reg(priv, REG_AGC_MIN, min);
	atbm8830_write_reg(priv, REG_AGC_MAX, max);
	atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);

	return 0;
}

static int set_static_channel_mode(struct atbm_state *priv)
{
	int i;

	for (i = 0; i < 5; i++)
		atbm8830_write_reg(priv, 0x099B + i, 0x08);

	atbm8830_write_reg(priv, 0x095B, 0x7F);
	atbm8830_write_reg(priv, 0x09CB, 0x01);
	atbm8830_write_reg(priv, 0x09CC, 0x7F);
	atbm8830_write_reg(priv, 0x09CD, 0x7F);
	atbm8830_write_reg(priv, 0x0E01, 0x20);

	/* For single carrier */
	atbm8830_write_reg(priv, 0x0B03, 0x0A);
	atbm8830_write_reg(priv, 0x0935, 0x10);
	atbm8830_write_reg(priv, 0x0936, 0x08);
	atbm8830_write_reg(priv, 0x093E, 0x08);
	atbm8830_write_reg(priv, 0x096E, 0x06);

	/* frame_count_max0 */
	atbm8830_write_reg(priv, 0x0B09, 0x00);
	/* frame_count_max1 */
	atbm8830_write_reg(priv, 0x0B0A, 0x08);

	return 0;
}

static int set_ts_config(struct atbm_state *priv)
{
	const struct atbm8830_config *cfg = priv->config;

	/*Set parallel/serial ts mode*/
	atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
	atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
	/*Set ts sampling edge*/
	atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
		cfg->ts_sampling_edge ? 1 : 0);
	/*Set ts clock freerun*/
	atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
		cfg->ts_clk_gated ? 0 : 1);

	return 0;
}

static int atbm8830_init(struct dvb_frontend *fe)
{
	struct atbm_state *priv = fe->demodulator_priv;
	const struct atbm8830_config *cfg = priv->config;

	/*Set oscillator frequency*/
	set_osc_freq(priv, cfg->osc_clk_freq);

	/*Set IF frequency*/
	set_if_freq(priv, cfg->if_freq);

	/*Set AGC Config*/
	set_agc_config(priv, cfg->agc_min, cfg->agc_max,
		cfg->agc_hold_loop);

	/*Set static channel mode*/
	set_static_channel_mode(priv);

	set_ts_config(priv);
	/*Turn off DSP reset*/
	atbm8830_write_reg(priv, 0x000A, 0);

	/*SW version test*/
	atbm8830_write_reg(priv, 0x020C, 11);

	/* Run */
	atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);

	return 0;
}


static void atbm8830_release(struct dvb_frontend *fe)
{
	struct atbm_state *state = fe->demodulator_priv;
	dprintk("%s\n", __func__);

	kfree(state);
}

static int atbm8830_set_fe(struct dvb_frontend *fe)
{
	struct atbm_state *priv = fe->demodulator_priv;
	int i;
	u8 locked = 0;
	dprintk("%s\n", __func__);

	/* set frequency */
	if (fe->ops.tuner_ops.set_params) {
		if (fe->ops.i2c_gate_ctrl)
			fe->ops.i2c_gate_ctrl(fe, 1);
		fe->ops.tuner_ops.set_params(fe);
		if (fe->ops.i2c_gate_ctrl)
			fe->ops.i2c_gate_ctrl(fe, 0);
	}

	/* start auto lock */
	for (i = 0; i < 10; i++) {
		mdelay(100);
		dprintk("Try %d\n", i);
		is_locked(priv, &locked);
		if (locked != 0) {
			dprintk("ATBM8830 locked!\n");
			break;
		}
	}

	return 0;
}

static int atbm8830_get_fe(struct dvb_frontend *fe,
			   struct dtv_frontend_properties *c)
{
	dprintk("%s\n", __func__);

	/* TODO: get real readings from device */
	/* inversion status */
	c->inversion = INVERSION_OFF;

	/* bandwidth */
	c->bandwidth_hz = 8000000;

	c->code_rate_HP = FEC_AUTO;
	c->code_rate_LP = FEC_AUTO;

	c->modulation = QAM_AUTO;

	/* transmission mode */
	c->transmission_mode = TRANSMISSION_MODE_AUTO;

	/* guard interval */
	c->guard_interval = GUARD_INTERVAL_AUTO;

	/* hierarchy */
	c->hierarchy = HIERARCHY_NONE;

	return 0;
}

static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
	struct dvb_frontend_tune_settings *fesettings)
{
	fesettings->min_delay_ms = 0;
	fesettings->step_size = 0;
	fesettings->max_drift = 0;
	return 0;
}

static int atbm8830_read_status(struct dvb_frontend *fe,
				enum fe_status *fe_status)
{
	struct atbm_state *priv = fe->demodulator_priv;
	u8 locked = 0;
	u8 agc_locked = 0;

	dprintk("%s\n", __func__);
	*fe_status = 0;

	is_locked(priv, &locked);
	if (locked) {
		*fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
			FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
	}
	dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);

	atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
	dprintk("AGC Lock: %d\n", agc_locked);

	return 0;
}

static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
{
	struct atbm_state *priv = fe->demodulator_priv;
	u32 frame_err;
	u8 t;

	dprintk("%s\n", __func__);

	atbm8830_reglatch_lock(priv, 1);

	atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
	frame_err = t & 0x7F;
	frame_err <<= 8;
	atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
	frame_err |= t;

	atbm8830_reglatch_lock(priv, 0);

	*ber = frame_err * 100 / 32767;

	dprintk("%s: ber=0x%x\n", __func__, *ber);
	return 0;
}

static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
{
	struct atbm_state *priv = fe->demodulator_priv;
	u32 pwm;
	u8 t;

	dprintk("%s\n", __func__);
	atbm8830_reglatch_lock(priv, 1);

	atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
	pwm = t & 0x03;
	pwm <<= 8;
	atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
	pwm |= t;

	atbm8830_reglatch_lock(priv, 0);

	dprintk("AGC PWM = 0x%02X\n", pwm);
	pwm = 0x400 - pwm;

	*signal = pwm * 0x10000 / 0x400;

	return 0;
}

static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
{
	dprintk("%s\n", __func__);
	*snr = 0;
	return 0;
}

static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
	dprintk("%s\n", __func__);
	*ucblocks = 0;
	return 0;
}

static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
	struct atbm_state *priv = fe->demodulator_priv;

	return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
}

static struct dvb_frontend_ops atbm8830_ops = {
	.delsys = { SYS_DTMB },
	.info = {
		.name = "AltoBeam ATBM8830/8831 DMB-TH",
		.frequency_min = 474000000,
		.frequency_max = 858000000,
		.frequency_stepsize = 10000,
		.caps =
			FE_CAN_FEC_AUTO |
			FE_CAN_QAM_AUTO |
			FE_CAN_TRANSMISSION_MODE_AUTO |
			FE_CAN_GUARD_INTERVAL_AUTO
	},

	.release = atbm8830_release,

	.init = atbm8830_init,
	.sleep = NULL,
	.write = NULL,
	.i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,

	.set_frontend = atbm8830_set_fe,
	.get_frontend = atbm8830_get_fe,
	.get_tune_settings = atbm8830_get_tune_settings,

	.read_status = atbm8830_read_status,
	.read_ber = atbm8830_read_ber,
	.read_signal_strength = atbm8830_read_signal_strength,
	.read_snr = atbm8830_read_snr,
	.read_ucblocks = atbm8830_read_ucblocks,
};

struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
	struct i2c_adapter *i2c)
{
	struct atbm_state *priv = NULL;
	u8 data = 0;

	dprintk("%s()\n", __func__);

	if (config == NULL || i2c == NULL)
		return NULL;

	priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
	if (priv == NULL)
		goto error_out;

	priv->config = config;
	priv->i2c = i2c;

	/* check if the demod is there */
	if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
		dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
			__func__, priv->config->demod_address);
		goto error_out;
	}
	dprintk("atbm8830 chip id: 0x%02X\n", data);

	memcpy(&priv->frontend.ops, &atbm8830_ops,
	       sizeof(struct dvb_frontend_ops));
	priv->frontend.demodulator_priv = priv;

	atbm8830_init(&priv->frontend);

	atbm8830_i2c_gate_ctrl(&priv->frontend, 1);

	return &priv->frontend;

error_out:
	dprintk("%s() error_out\n", __func__);
	kfree(priv);
	return NULL;

}
EXPORT_SYMBOL(atbm8830_attach);

MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
ec27b6aa DW	1	/*
	2	* Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
	3	* ATBM8830, ATBM8831
	4	*
	5	* Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20	*/
	21
92fda216	22	#include <asm/div64.h>
ec27b6aa DW	23	#include "dvb_frontend.h"
	24
	25	#include "atbm8830.h"
	26	#include "atbm8830_priv.h"
	27
	28	#define dprintk(args...) \
	29	do { \
	30	if (debug) \
	31	printk(KERN_DEBUG "atbm8830: " args); \
	32	} while (0)
	33
	34	static int debug;
	35
	36	module_param(debug, int, 0644);
	37	MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
	38
	39	static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
	40	{
	41	int ret = 0;
	42	u8 dev_addr;
	43	u8 buf1[] = { reg >> 8, reg & 0xFF };
	44	u8 buf2[] = { data };
	45	struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
	46	struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
	47
	48	dev_addr = priv->config->demod_address;
	49	msg1.addr = dev_addr;
	50	msg2.addr = dev_addr;
	51
	52	if (debug >= 2)
c429e7b6	53	dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
ec27b6aa DW	54
	55	ret = i2c_transfer(priv->i2c, &msg1, 1);
	56	if (ret != 1)
	57	return -EIO;
	58
	59	ret = i2c_transfer(priv->i2c, &msg2, 1);
	60	return (ret != 1) ? -EIO : 0;
	61	}
	62
	63	static int atbm8830_read_reg(struct atbm_state priv, u16 reg, u8 p_data)
	64	{
	65	int ret;
	66	u8 dev_addr;
	67
	68	u8 buf1[] = { reg >> 8, reg & 0xFF };
	69	u8 buf2[] = { 0 };
	70	struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
	71	struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
	72
	73	dev_addr = priv->config->demod_address;
	74	msg1.addr = dev_addr;
	75	msg2.addr = dev_addr;
	76
	77	ret = i2c_transfer(priv->i2c, &msg1, 1);
	78	if (ret != 1) {
c429e7b6	79	dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
ec27b6aa DW	80	return -EIO;
	81	}
	82
	83	ret = i2c_transfer(priv->i2c, &msg2, 1);
	84	if (ret != 1)
	85	return -EIO;
	86
	87	*p_data = buf2[0];
	88	if (debug >= 2)
c429e7b6	89	dprintk("%s: reg=0x%04X, data=0x%02X\n",
ec27b6aa DW	90	__func__, reg, buf2[0]);
	91
	92	return 0;
	93	}
	94
	95	/* Lock register latch so that multi-register read is atomic */
	96	static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
	97	{
	98	return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
	99	}
	100
	101	static int set_osc_freq(struct atbm_state priv, u32 freq /in kHz*/)
	102	{
	103	u32 val;
92fda216	104	u64 t;
ec27b6aa	105
92fda216 DW	106	/* 0x100000 * freq / 30.4MHz */
	107	t = (u64)0x100000 * freq;
	108	do_div(t, 30400);
	109	val = t;
ec27b6aa DW	110
	111	atbm8830_write_reg(priv, REG_OSC_CLK, val);
	112	atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
	113	atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
	114
	115	return 0;
	116	}
	117
	118	static int set_if_freq(struct atbm_state priv, u32 freq /in kHz*/)
	119	{
b8415f53	120
ec27b6aa	121	u32 fs = priv->config->osc_clk_freq;
92fda216	122	u64 t;
ec27b6aa DW	123	u32 val;
	124	u8 dat;
	125
ec27b6aa	126	if (freq != 0) {
92fda216 DW	127	/* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
	128	t = (u64) 2 * 31416 * (freq - fs);
	129	t <<= 22;
	130	do_div(t, fs);
	131	do_div(t, 1000);
	132	val = t;
	133
ec27b6aa DW	134	atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
	135	atbm8830_write_reg(priv, REG_IF_FREQ, val);
	136	atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
	137	atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
	138
	139	atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
	140	dat &= 0xFC;
	141	atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
	142	} else {
	143	/* Zero IF */
	144	atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
	145
	146	atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
	147	dat &= 0xFC;
	148	dat \|= 0x02;
	149	atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
	150
	151	if (priv->config->zif_swap_iq)
	152	atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
	153	else
	154	atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
	155	}
	156
	157	return 0;
	158	}
	159
	160	static int is_locked(struct atbm_state priv, u8 locked)
	161	{
	162	u8 status;
	163
	164	atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
	165
	166	if (locked != NULL)
	167	*locked = (status == 1);
	168	return 0;
	169	}
	170
c245c75c DW	171	static int set_agc_config(struct atbm_state *priv,
	172	u8 min, u8 max, u8 hold_loop)
	173	{
	174	/* no effect if both min and max are zero */
	175	if (!min && !max)
	176	return 0;
	177
	178	atbm8830_write_reg(priv, REG_AGC_MIN, min);
	179	atbm8830_write_reg(priv, REG_AGC_MAX, max);
	180	atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
	181
	182	return 0;
	183	}
ec27b6aa DW	184
	185	static int set_static_channel_mode(struct atbm_state *priv)
	186	{
	187	int i;
	188
	189	for (i = 0; i < 5; i++)
	190	atbm8830_write_reg(priv, 0x099B + i, 0x08);
	191
	192	atbm8830_write_reg(priv, 0x095B, 0x7F);
	193	atbm8830_write_reg(priv, 0x09CB, 0x01);
	194	atbm8830_write_reg(priv, 0x09CC, 0x7F);
	195	atbm8830_write_reg(priv, 0x09CD, 0x7F);
	196	atbm8830_write_reg(priv, 0x0E01, 0x20);
	197
	198	/* For single carrier */
	199	atbm8830_write_reg(priv, 0x0B03, 0x0A);
	200	atbm8830_write_reg(priv, 0x0935, 0x10);
	201	atbm8830_write_reg(priv, 0x0936, 0x08);
	202	atbm8830_write_reg(priv, 0x093E, 0x08);
	203	atbm8830_write_reg(priv, 0x096E, 0x06);
	204
	205	/* frame_count_max0 */
	206	atbm8830_write_reg(priv, 0x0B09, 0x00);
	207	/* frame_count_max1 */
	208	atbm8830_write_reg(priv, 0x0B0A, 0x08);
	209
	210	return 0;
	211	}
	212
	213	static int set_ts_config(struct atbm_state *priv)
	214	{
	215	const struct atbm8830_config *cfg = priv->config;
	216
	217	/Set parallel/serial ts mode/
	218	atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
	219	atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
	220	/Set ts sampling edge/
	221	atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
	222	cfg->ts_sampling_edge ? 1 : 0);
	223	/Set ts clock freerun/
	224	atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
	225	cfg->ts_clk_gated ? 0 : 1);
	226
	227	return 0;
	228	}
	229
	230	static int atbm8830_init(struct dvb_frontend *fe)
	231	{
	232	struct atbm_state *priv = fe->demodulator_priv;
	233	const struct atbm8830_config *cfg = priv->config;
	234
	235	/Set oscillator frequency/
	236	set_osc_freq(priv, cfg->osc_clk_freq);
	237
	238	/Set IF frequency/
	239	set_if_freq(priv, cfg->if_freq);
	240
c245c75c DW	241	/Set AGC Config/
	242	set_agc_config(priv, cfg->agc_min, cfg->agc_max,
	243	cfg->agc_hold_loop);
ec27b6aa DW	244
	245	/Set static channel mode/
	246	set_static_channel_mode(priv);
	247
	248	set_ts_config(priv);
	249	/Turn off DSP reset/
	250	atbm8830_write_reg(priv, 0x000A, 0);
	251
	252	/SW version test/
	253	atbm8830_write_reg(priv, 0x020C, 11);
	254
	255	/* Run */
	256	atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
	257
	258	return 0;
	259	}
	260
	261
	262	static void atbm8830_release(struct dvb_frontend *fe)
	263	{
	264	struct atbm_state *state = fe->demodulator_priv;
	265	dprintk("%s\n", __func__);
	266
	267	kfree(state);
	268	}
	269
a552438f	270	static int atbm8830_set_fe(struct dvb_frontend *fe)
ec27b6aa DW	271	{
	272	struct atbm_state *priv = fe->demodulator_priv;
	273	int i;
	274	u8 locked = 0;
	275	dprintk("%s\n", __func__);
	276
	277	/* set frequency */
	278	if (fe->ops.tuner_ops.set_params) {
	279	if (fe->ops.i2c_gate_ctrl)
	280	fe->ops.i2c_gate_ctrl(fe, 1);
14d24d14	281	fe->ops.tuner_ops.set_params(fe);
ec27b6aa DW	282	if (fe->ops.i2c_gate_ctrl)
	283	fe->ops.i2c_gate_ctrl(fe, 0);
	284	}
	285
	286	/* start auto lock */
	287	for (i = 0; i < 10; i++) {
	288	mdelay(100);
	289	dprintk("Try %d\n", i);
	290	is_locked(priv, &locked);
	291	if (locked != 0) {
	292	dprintk("ATBM8830 locked!\n");
	293	break;
	294	}
	295	}
	296
	297	return 0;
	298	}
	299
7e3e68bc MCC	300	static int atbm8830_get_fe(struct dvb_frontend *fe,
7e3e68bc MCC	301	struct dtv_frontend_properties *c)
ec27b6aa DW	302	{
	303	dprintk("%s\n", __func__);
	304
	305	/* TODO: get real readings from device */
	306	/* inversion status */
a552438f	307	c->inversion = INVERSION_OFF;
ec27b6aa DW	308
ec27b6aa DW	309	/* bandwidth */
a552438f	310	c->bandwidth_hz = 8000000;
ec27b6aa	311
a552438f MCC	312	c->code_rate_HP = FEC_AUTO;
a552438f MCC	313	c->code_rate_LP = FEC_AUTO;
ec27b6aa	314
a552438f	315	c->modulation = QAM_AUTO;
ec27b6aa DW	316
ec27b6aa DW	317	/* transmission mode */
a552438f	318	c->transmission_mode = TRANSMISSION_MODE_AUTO;
ec27b6aa DW	319
ec27b6aa DW	320	/* guard interval */
a552438f	321	c->guard_interval = GUARD_INTERVAL_AUTO;
ec27b6aa DW	322
ec27b6aa DW	323	/* hierarchy */
a552438f	324	c->hierarchy = HIERARCHY_NONE;
ec27b6aa DW	325
	326	return 0;
	327	}
	328
	329	static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
	330	struct dvb_frontend_tune_settings *fesettings)
	331	{
	332	fesettings->min_delay_ms = 0;
	333	fesettings->step_size = 0;
	334	fesettings->max_drift = 0;
	335	return 0;
	336	}
	337
0df289a2 MCC	338	static int atbm8830_read_status(struct dvb_frontend *fe,
0df289a2 MCC	339	enum fe_status *fe_status)
ec27b6aa DW	340	{
	341	struct atbm_state *priv = fe->demodulator_priv;
	342	u8 locked = 0;
	343	u8 agc_locked = 0;
	344
	345	dprintk("%s\n", __func__);
	346	*fe_status = 0;
	347
	348	is_locked(priv, &locked);
	349	if (locked) {
	350	*fe_status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \|
	351	FE_HAS_VITERBI \| FE_HAS_SYNC \| FE_HAS_LOCK;
	352	}
	353	dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
	354
	355	atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
	356	dprintk("AGC Lock: %d\n", agc_locked);
	357
	358	return 0;
	359	}
	360
	361	static int atbm8830_read_ber(struct dvb_frontend fe, u32 ber)
	362	{
	363	struct atbm_state *priv = fe->demodulator_priv;
	364	u32 frame_err;
	365	u8 t;
	366
	367	dprintk("%s\n", __func__);
	368
	369	atbm8830_reglatch_lock(priv, 1);
	370
	371	atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
	372	frame_err = t & 0x7F;
	373	frame_err <<= 8;
	374	atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
	375	frame_err \|= t;
	376
	377	atbm8830_reglatch_lock(priv, 0);
	378
	379	ber = frame_err 100 / 32767;
	380
	381	dprintk("%s: ber=0x%x\n", __func__, *ber);
	382	return 0;
	383	}
	384
	385	static int atbm8830_read_signal_strength(struct dvb_frontend fe, u16 signal)
	386	{
	387	struct atbm_state *priv = fe->demodulator_priv;
	388	u32 pwm;
	389	u8 t;
	390
	391	dprintk("%s\n", __func__);
	392	atbm8830_reglatch_lock(priv, 1);
	393
	394	atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
	395	pwm = t & 0x03;
	396	pwm <<= 8;
	397	atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
	398	pwm \|= t;
	399
	400	atbm8830_reglatch_lock(priv, 0);
	401
	402	dprintk("AGC PWM = 0x%02X\n", pwm);
	403	pwm = 0x400 - pwm;
404
405	signal = pwm 0x10000 / 0x400;
406
407	return 0;
408	}
409
410	static int atbm8830_read_snr(struct dvb_frontend fe, u16 snr)
411	{
412	dprintk("%s\n", __func__);
413	*snr = 0;
414	return 0;
415	}
416
417	static int atbm8830_read_ucblocks(struct dvb_frontend fe, u32 ucblocks)
418	{
419	dprintk("%s\n", __func__);
420	*ucblocks = 0;
421	return 0;
422	}
423
424	static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
425	{
426	struct atbm_state *priv = fe->demodulator_priv;
427
428	return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
429	}
430
431	static struct dvb_frontend_ops atbm8830_ops = {
224b6642	432	.delsys = { SYS_DTMB },
ec27b6aa DW	433	.info = {
ec27b6aa DW	434	.name = "AltoBeam ATBM8830/8831 DMB-TH",
ec27b6aa DW	435	.frequency_min = 474000000,
	436	.frequency_max = 858000000,
	437	.frequency_stepsize = 10000,
	438	.caps =
	439	FE_CAN_FEC_AUTO \|
	440	FE_CAN_QAM_AUTO \|
	441	FE_CAN_TRANSMISSION_MODE_AUTO \|
	442	FE_CAN_GUARD_INTERVAL_AUTO
	443	},
	444
	445	.release = atbm8830_release,
	446
	447	.init = atbm8830_init,
	448	.sleep = NULL,
	449	.write = NULL,
	450	.i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
	451
a552438f MCC	452	.set_frontend = atbm8830_set_fe,
a552438f MCC	453	.get_frontend = atbm8830_get_fe,
ec27b6aa DW	454	.get_tune_settings = atbm8830_get_tune_settings,
	455
	456	.read_status = atbm8830_read_status,
	457	.read_ber = atbm8830_read_ber,
	458	.read_signal_strength = atbm8830_read_signal_strength,
	459	.read_snr = atbm8830_read_snr,
	460	.read_ucblocks = atbm8830_read_ucblocks,
	461	};
	462
	463	struct dvb_frontend atbm8830_attach(const struct atbm8830_config config,
	464	struct i2c_adapter *i2c)
	465	{
	466	struct atbm_state *priv = NULL;
	467	u8 data = 0;
	468
	469	dprintk("%s()\n", __func__);
	470
	471	if (config == NULL \|\| i2c == NULL)
	472	return NULL;
	473
	474	priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
	475	if (priv == NULL)
	476	goto error_out;
	477
	478	priv->config = config;
	479	priv->i2c = i2c;
	480
	481	/* check if the demod is there */
	482	if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
	483	dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
	484	__func__, priv->config->demod_address);
	485	goto error_out;
	486	}
	487	dprintk("atbm8830 chip id: 0x%02X\n", data);
	488
	489	memcpy(&priv->frontend.ops, &atbm8830_ops,
	490	sizeof(struct dvb_frontend_ops));
	491	priv->frontend.demodulator_priv = priv;
	492
	493	atbm8830_init(&priv->frontend);
	494
	495	atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
	496
	497	return &priv->frontend;
	498
	499	error_out:
	500	dprintk("%s() error_out\n", __func__);
	501	kfree(priv);
	502	return NULL;
	503
	504	}
	505	EXPORT_SYMBOL(atbm8830_attach);
	506
	507	MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
	508	MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
	509	MODULE_LICENSE("GPL");