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Merge remote-tracking branch 'md/for-next'
[deliverable/linux.git] / drivers / media / platform / omap / omap_vout.c
CommitLineData
5c7ab634
VH		 1/*
2 * omap_vout.c
3 *
4 * Copyright (C) 2005-2010 Texas Instruments.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 *
10 * Leveraged code from the OMAP2 camera driver
11 * Video-for-Linux (Version 2) camera capture driver for
12 * the OMAP24xx camera controller.
13 *
14 * Author: Andy Lowe (source@mvista.com)
15 *
16 * Copyright (C) 2004 MontaVista Software, Inc.
17 * Copyright (C) 2010 Texas Instruments.
18 *
19 * History:
20 * 20-APR-2006 Khasim Modified VRFB based Rotation,
21 * The image data is always read from 0 degree
22 * view and written
23 * to the virtual space of desired rotation angle
24 * 4-DEC-2006 Jian Changed to support better memory management
25 *
26 * 17-Nov-2008 Hardik Changed driver to use video_ioctl2
27 *
28 * 23-Feb-2010 Vaibhav H Modified to use new DSS2 interface
29 *
30 */
31
32#include <linux/init.h>
33#include <linux/module.h>
34#include <linux/vmalloc.h>
35#include <linux/sched.h>
36#include <linux/types.h>
37#include <linux/platform_device.h>
5c7ab634
VH		 38#include <linux/irq.h>
39#include <linux/videodev2.h>
72915e85 40#include <linux/dma-mapping.h>
d1ee8878 41#include <linux/slab.h>
5c7ab634 42
dd880dd4 43#include <media/videobuf-dma-contig.h>
5c7ab634
VH		 44#include <media/v4l2-device.h>
45#include <media/v4l2-ioctl.h>
46
6a1c9f6d 47#include <video/omapvrfb.h>
781a1622 48#include <video/omapfb_dss.h>
5c7ab634
VH		 49
50#include "omap_voutlib.h"
51#include "omap_voutdef.h"
445e258f 52#include "omap_vout_vrfb.h"
5c7ab634
VH		 53
54MODULE_AUTHOR("Texas Instruments");
55MODULE_DESCRIPTION("OMAP Video for Linux Video out driver");
56MODULE_LICENSE("GPL");
57
5c7ab634
VH		 58/* Driver Configuration macros */
59#define VOUT_NAME "omap_vout"
60
61enum omap_vout_channels {
62 OMAP_VIDEO1,
63 OMAP_VIDEO2,
64};
65
5c7ab634
VH		 66static struct videobuf_queue_ops video_vbq_ops;
67/* Variables configurable through module params*/
68static u32 video1_numbuffers = 3;
69static u32 video2_numbuffers = 3;
70static u32 video1_bufsize = OMAP_VOUT_MAX_BUF_SIZE;
71static u32 video2_bufsize = OMAP_VOUT_MAX_BUF_SIZE;
90ab5ee9
RR		 72static bool vid1_static_vrfb_alloc;
73static bool vid2_static_vrfb_alloc;
74static bool debug;
5c7ab634
VH		 75
76/* Module parameters */
77module_param(video1_numbuffers, uint, S_IRUGO);
78MODULE_PARM_DESC(video1_numbuffers,
79 "Number of buffers to be allocated at init time for Video1 device.");
80
81module_param(video2_numbuffers, uint, S_IRUGO);
82MODULE_PARM_DESC(video2_numbuffers,
83 "Number of buffers to be allocated at init time for Video2 device.");
84
85module_param(video1_bufsize, uint, S_IRUGO);
86MODULE_PARM_DESC(video1_bufsize,
87 "Size of the buffer to be allocated for video1 device");
88
89module_param(video2_bufsize, uint, S_IRUGO);
90MODULE_PARM_DESC(video2_bufsize,
91 "Size of the buffer to be allocated for video2 device");
92
93module_param(vid1_static_vrfb_alloc, bool, S_IRUGO);
94MODULE_PARM_DESC(vid1_static_vrfb_alloc,
95 "Static allocation of the VRFB buffer for video1 device");
96
97module_param(vid2_static_vrfb_alloc, bool, S_IRUGO);
98MODULE_PARM_DESC(vid2_static_vrfb_alloc,
99 "Static allocation of the VRFB buffer for video2 device");
100
101module_param(debug, bool, S_IRUGO);
102MODULE_PARM_DESC(debug, "Debug level (0-1)");
103
104/* list of image formats supported by OMAP2 video pipelines */
0d334f7f 105static const struct v4l2_fmtdesc omap_formats[] = {
5c7ab634
VH		 106 {
107 /* Note: V4L2 defines RGB565 as:
108 *
109 * Byte 0 Byte 1
110 * g2 g1 g0 r4 r3 r2 r1 r0 b4 b3 b2 b1 b0 g5 g4 g3
111 *
112 * We interpret RGB565 as:
113 *
114 * Byte 0 Byte 1
115 * g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3
116 */
117 .description = "RGB565, le",
118 .pixelformat = V4L2_PIX_FMT_RGB565,
119 },
120 {
121 /* Note: V4L2 defines RGB32 as: RGB-8-8-8-8 we use
122 * this for RGB24 unpack mode, the last 8 bits are ignored
123 * */
124 .description = "RGB32, le",
125 .pixelformat = V4L2_PIX_FMT_RGB32,
126 },
127 {
128 /* Note: V4L2 defines RGB24 as: RGB-8-8-8 we use
129 * this for RGB24 packed mode
130 *
131 */
132 .description = "RGB24, le",
133 .pixelformat = V4L2_PIX_FMT_RGB24,
134 },
135 {
136 .description = "YUYV (YUV 4:2:2), packed",
137 .pixelformat = V4L2_PIX_FMT_YUYV,
138 },
139 {
140 .description = "UYVY, packed",
141 .pixelformat = V4L2_PIX_FMT_UYVY,
142 },
143};
144
145#define NUM_OUTPUT_FORMATS (ARRAY_SIZE(omap_formats))
146
5c7ab634
VH		 147/*
148 * Try format
149 */
150static int omap_vout_try_format(struct v4l2_pix_format *pix)
151{
152 int ifmt, bpp = 0;
153
154 pix->height = clamp(pix->height, (u32)VID_MIN_HEIGHT,
155 (u32)VID_MAX_HEIGHT);
156 pix->width = clamp(pix->width, (u32)VID_MIN_WIDTH, (u32)VID_MAX_WIDTH);
157
158 for (ifmt = 0; ifmt < NUM_OUTPUT_FORMATS; ifmt++) {
159 if (pix->pixelformat == omap_formats[ifmt].pixelformat)
160 break;
161 }
162
163 if (ifmt == NUM_OUTPUT_FORMATS)
164 ifmt = 0;
165
166 pix->pixelformat = omap_formats[ifmt].pixelformat;
167 pix->field = V4L2_FIELD_ANY;
5c7ab634
VH		 168
169 switch (pix->pixelformat) {
170 case V4L2_PIX_FMT_YUYV:
171 case V4L2_PIX_FMT_UYVY:
172 default:
173 pix->colorspace = V4L2_COLORSPACE_JPEG;
174 bpp = YUYV_BPP;
175 break;
176 case V4L2_PIX_FMT_RGB565:
177 case V4L2_PIX_FMT_RGB565X:
178 pix->colorspace = V4L2_COLORSPACE_SRGB;
179 bpp = RGB565_BPP;
180 break;
181 case V4L2_PIX_FMT_RGB24:
182 pix->colorspace = V4L2_COLORSPACE_SRGB;
183 bpp = RGB24_BPP;
184 break;
185 case V4L2_PIX_FMT_RGB32:
186 case V4L2_PIX_FMT_BGR32:
187 pix->colorspace = V4L2_COLORSPACE_SRGB;
188 bpp = RGB32_BPP;
189 break;
190 }
191 pix->bytesperline = pix->width * bpp;
192 pix->sizeimage = pix->bytesperline * pix->height;
193
194 return bpp;
195}
196
197/*
8a677b6e
JK		 198 * omap_vout_get_userptr: Convert user space virtual address to physical
199 * address.
5c7ab634 200 */
8a677b6e
JK		 201static int omap_vout_get_userptr(struct videobuf_buffer *vb, u32 virtp,
202 u32 *physp)
5c7ab634 203{
8a677b6e
JK		 204 struct frame_vector *vec;
205 int ret;
5c7ab634 206
5c7ab634 207 /* For kernel direct-mapped memory, take the easy way */
8a677b6e
JK		 208 if (virtp >= PAGE_OFFSET) {
209 *physp = virt_to_phys((void *)virtp);
210 return 0;
211 }
212
213 vec = frame_vector_create(1);
214 if (!vec)
215 return -ENOMEM;
216
217 ret = get_vaddr_frames(virtp, 1, true, false, vec);
218 if (ret != 1) {
219 frame_vector_destroy(vec);
220 return -EINVAL;
5c7ab634 221 }
8a677b6e
JK		 222 *physp = __pfn_to_phys(frame_vector_pfns(vec)[0]);
223 vb->priv = vec;
5c7ab634 224
8a677b6e 225 return 0;
5c7ab634
VH		 226}
227
5c7ab634
VH		 228/*
229 * Free the V4L2 buffers
230 */
445e258f 231void omap_vout_free_buffers(struct omap_vout_device *vout)
5c7ab634
VH		 232{
233 int i, numbuffers;
234
235 /* Allocate memory for the buffers */
236 numbuffers = (vout->vid) ? video2_numbuffers : video1_numbuffers;
237 vout->buffer_size = (vout->vid) ? video2_bufsize : video1_bufsize;
238
239 for (i = 0; i < numbuffers; i++) {
240 omap_vout_free_buffer(vout->buf_virt_addr[i],
241 vout->buffer_size);
242 vout->buf_phy_addr[i] = 0;
243 vout->buf_virt_addr[i] = 0;
244 }
245}
246
5c7ab634
VH		 247/*
248 * Convert V4L2 rotation to DSS rotation
249 * V4L2 understand 0, 90, 180, 270.
25985edc 250 * Convert to 0, 1, 2 and 3 respectively for DSS
5c7ab634
VH		 251 */
252static int v4l2_rot_to_dss_rot(int v4l2_rotation,
253 enum dss_rotation *rotation, bool mirror)
254{
255 int ret = 0;
256
257 switch (v4l2_rotation) {
258 case 90:
259 *rotation = dss_rotation_90_degree;
260 break;
261 case 180:
262 *rotation = dss_rotation_180_degree;
263 break;
264 case 270:
265 *rotation = dss_rotation_270_degree;
266 break;
267 case 0:
268 *rotation = dss_rotation_0_degree;
269 break;
270 default:
271 ret = -EINVAL;
272 }
273 return ret;
274}
275
5c7ab634
VH		 276static int omap_vout_calculate_offset(struct omap_vout_device *vout)
277{
5c7ab634 278 struct omapvideo_info *ovid;
5c7ab634
VH		 279 struct v4l2_rect *crop = &vout->crop;
280 struct v4l2_pix_format *pix = &vout->pix;
281 int *cropped_offset = &vout->cropped_offset;
445e258f 282 int ps = 2, line_length = 0;
5c7ab634
VH		 283
284 ovid = &vout->vid_info;
5c7ab634 285
445e258f 286 if (ovid->rotation_type == VOUT_ROT_VRFB) {
287 omap_vout_calculate_vrfb_offset(vout);
288 } else {
289 vout->line_length = line_length = pix->width;
5c7ab634 290
445e258f 291 if (V4L2_PIX_FMT_YUYV == pix->pixelformat ||
292 V4L2_PIX_FMT_UYVY == pix->pixelformat)
293 ps = 2;
294 else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat)
5c7ab634 295 ps = 4;
445e258f 296 else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat)
297 ps = 3;
5c7ab634 298
445e258f 299 vout->ps = ps;
300
301 *cropped_offset = (line_length * ps) *
302 crop->top + crop->left * ps;
5c7ab634 303 }
445e258f 304
5c7ab634 305 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "%s Offset:%x\n",
445e258f 306 __func__, vout->cropped_offset);
307
5c7ab634
VH		 308 return 0;
309}
310
311/*
312 * Convert V4L2 pixel format to DSS pixel format
313 */
72fcf2a8 314static int video_mode_to_dss_mode(struct omap_vout_device *vout)
5c7ab634
VH		 315{
316 struct omap_overlay *ovl;
317 struct omapvideo_info *ovid;
318 struct v4l2_pix_format *pix = &vout->pix;
319 enum omap_color_mode mode;
320
321 ovid = &vout->vid_info;
322 ovl = ovid->overlays[0];
323
324 switch (pix->pixelformat) {
5c7ab634
VH		 325 case V4L2_PIX_FMT_YUYV:
326 mode = OMAP_DSS_COLOR_YUV2;
327 break;
328 case V4L2_PIX_FMT_UYVY:
329 mode = OMAP_DSS_COLOR_UYVY;
330 break;
331 case V4L2_PIX_FMT_RGB565:
332 mode = OMAP_DSS_COLOR_RGB16;
333 break;
334 case V4L2_PIX_FMT_RGB24:
335 mode = OMAP_DSS_COLOR_RGB24P;
336 break;
337 case V4L2_PIX_FMT_RGB32:
338 mode = (ovl->id == OMAP_DSS_VIDEO1) ?
339 OMAP_DSS_COLOR_RGB24U : OMAP_DSS_COLOR_ARGB32;
340 break;
341 case V4L2_PIX_FMT_BGR32:
342 mode = OMAP_DSS_COLOR_RGBX32;
343 break;
344 default:
345 mode = -EINVAL;
fe653786 346 break;
5c7ab634
VH		 347 }
348 return mode;
349}
350
351/*
352 * Setup the overlay
353 */
a137ac87 354static int omapvid_setup_overlay(struct omap_vout_device *vout,
5c7ab634
VH		 355 struct omap_overlay *ovl, int posx, int posy, int outw,
356 int outh, u32 addr)
357{
358 int ret = 0;
359 struct omap_overlay_info info;
52334bb3 360 int cropheight, cropwidth, pixwidth;
5c7ab634
VH		 361
362 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0 &&
363 (outw != vout->pix.width || outh != vout->pix.height)) {
364 ret = -EINVAL;
365 goto setup_ovl_err;
366 }
367
368 vout->dss_mode = video_mode_to_dss_mode(vout);
369 if (vout->dss_mode == -EINVAL) {
370 ret = -EINVAL;
371 goto setup_ovl_err;
372 }
373
374 /* Setup the input plane parameters according to
375 * rotation value selected.
376 */
b366888a 377 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 378 cropheight = vout->crop.width;
379 cropwidth = vout->crop.height;
5c7ab634
VH		 380 pixwidth = vout->pix.height;
381 } else {
382 cropheight = vout->crop.height;
383 cropwidth = vout->crop.width;
5c7ab634
VH		 384 pixwidth = vout->pix.width;
385 }
386
387 ovl->get_overlay_info(ovl, &info);
388 info.paddr = addr;
5c7ab634
VH		 389 info.width = cropwidth;
390 info.height = cropheight;
391 info.color_mode = vout->dss_mode;
392 info.mirror = vout->mirror;
393 info.pos_x = posx;
394 info.pos_y = posy;
395 info.out_width = outw;
396 info.out_height = outh;
397 info.global_alpha = vout->win.global_alpha;
b366888a 398 if (!is_rotation_enabled(vout)) {
5c7ab634
VH		 399 info.rotation = 0;
400 info.rotation_type = OMAP_DSS_ROT_DMA;
401 info.screen_width = pixwidth;
402 } else {
403 info.rotation = vout->rotation;
404 info.rotation_type = OMAP_DSS_ROT_VRFB;
405 info.screen_width = 2048;
406 }
407
408 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
e8bd888a 409 "%s enable=%d addr=%pad width=%d\n height=%d color_mode=%d\n"
5c7ab634
VH		 410 "rotation=%d mirror=%d posx=%d posy=%d out_width = %d \n"
411 "out_height=%d rotation_type=%d screen_width=%d\n",
e8bd888a 412 __func__, ovl->is_enabled(ovl), &info.paddr, info.width, info.height,
5c7ab634
VH		 413 info.color_mode, info.rotation, info.mirror, info.pos_x,
414 info.pos_y, info.out_width, info.out_height, info.rotation_type,
415 info.screen_width);
416
417 ret = ovl->set_overlay_info(ovl, &info);
418 if (ret)
419 goto setup_ovl_err;
420
421 return 0;
422
423setup_ovl_err:
424 v4l2_warn(&vout->vid_dev->v4l2_dev, "setup_overlay failed\n");
425 return ret;
426}
427
428/*
429 * Initialize the overlay structure
430 */
a137ac87 431static int omapvid_init(struct omap_vout_device *vout, u32 addr)
5c7ab634
VH		 432{
433 int ret = 0, i;
434 struct v4l2_window *win;
435 struct omap_overlay *ovl;
cc182196 436 int posx, posy, outw, outh;
5c7ab634
VH		 437 struct omap_video_timings *timing;
438 struct omapvideo_info *ovid = &vout->vid_info;
439
440 win = &vout->win;
441 for (i = 0; i < ovid->num_overlays; i++) {
d629f03f
AT		 442 struct omap_dss_device *dssdev;
443
5c7ab634 444 ovl = ovid->overlays[i];
d629f03f
AT		 445 dssdev = ovl->get_device(ovl);
446
447 if (!dssdev)
5c7ab634
VH		 448 return -EINVAL;
449
d629f03f 450 timing = &dssdev->panel.timings;
5c7ab634
VH		 451
452 outw = win->w.width;
453 outh = win->w.height;
454 switch (vout->rotation) {
455 case dss_rotation_90_degree:
456 /* Invert the height and width for 90
457 * and 270 degree rotation
458 */
cc182196 459 swap(outw, outh);
5c7ab634
VH		 460 posy = (timing->y_res - win->w.width) - win->w.left;
461 posx = win->w.top;
462 break;
463
464 case dss_rotation_180_degree:
465 posx = (timing->x_res - win->w.width) - win->w.left;
466 posy = (timing->y_res - win->w.height) - win->w.top;
467 break;
468
469 case dss_rotation_270_degree:
cc182196 470 swap(outw, outh);
5c7ab634
VH		 471 posy = win->w.left;
472 posx = (timing->x_res - win->w.height) - win->w.top;
473 break;
474
475 default:
476 posx = win->w.left;
477 posy = win->w.top;
478 break;
479 }
480
481 ret = omapvid_setup_overlay(vout, ovl, posx, posy,
482 outw, outh, addr);
483 if (ret)
484 goto omapvid_init_err;
485 }
486 return 0;
487
488omapvid_init_err:
489 v4l2_warn(&vout->vid_dev->v4l2_dev, "apply_changes failed\n");
490 return ret;
491}
492
493/*
494 * Apply the changes set the go bit of DSS
495 */
a137ac87 496static int omapvid_apply_changes(struct omap_vout_device *vout)
5c7ab634
VH		 497{
498 int i;
499 struct omap_overlay *ovl;
500 struct omapvideo_info *ovid = &vout->vid_info;
501
502 for (i = 0; i < ovid->num_overlays; i++) {
d629f03f
AT		 503 struct omap_dss_device *dssdev;
504
5c7ab634 505 ovl = ovid->overlays[i];
d629f03f
AT		 506 dssdev = ovl->get_device(ovl);
507 if (!dssdev)
5c7ab634
VH		 508 return -EINVAL;
509 ovl->manager->apply(ovl->manager);
510 }
511
512 return 0;
513}
514
27801688
AT		 515static int omapvid_handle_interlace_display(struct omap_vout_device *vout,
516 unsigned int irqstatus, struct timeval timevalue)
517{
518 u32 fid;
519
520 if (vout->first_int) {
521 vout->first_int = 0;
522 goto err;
523 }
524
525 if (irqstatus & DISPC_IRQ_EVSYNC_ODD)
526 fid = 1;
527 else if (irqstatus & DISPC_IRQ_EVSYNC_EVEN)
528 fid = 0;
529 else
530 goto err;
531
532 vout->field_id ^= 1;
533 if (fid != vout->field_id) {
534 if (fid == 0)
535 vout->field_id = fid;
536 } else if (0 == fid) {
537 if (vout->cur_frm == vout->next_frm)
538 goto err;
539
540 vout->cur_frm->ts = timevalue;
541 vout->cur_frm->state = VIDEOBUF_DONE;
542 wake_up_interruptible(&vout->cur_frm->done);
543 vout->cur_frm = vout->next_frm;
544 } else {
545 if (list_empty(&vout->dma_queue) ||
546 (vout->cur_frm != vout->next_frm))
547 goto err;
548 }
549
550 return vout->field_id;
551err:
552 return 0;
553}
554
a137ac87 555static void omap_vout_isr(void *arg, unsigned int irqstatus)
5c7ab634 556{
e144ca64
AT		 557 int ret, fid, mgr_id;
558 u32 addr, irq;
5c7ab634
VH		 559 struct omap_overlay *ovl;
560 struct timeval timevalue;
561 struct omapvideo_info *ovid;
562 struct omap_dss_device *cur_display;
563 struct omap_vout_device *vout = (struct omap_vout_device *)arg;
564
565 if (!vout->streaming)
566 return;
567
568 ovid = &vout->vid_info;
569 ovl = ovid->overlays[0];
5c7ab634 570
e144ca64 571 mgr_id = ovl->manager->id;
d629f03f
AT		 572
573 /* get the display device attached to the overlay */
574 cur_display = ovl->get_device(ovl);
575
576 if (!cur_display)
577 return;
5c7ab634
VH		 578
579 spin_lock(&vout->vbq_lock);
8e6057b5 580 v4l2_get_timestamp(&timevalue);
5c7ab634 581
27801688 582 switch (cur_display->type) {
881a9640 583 case OMAP_DISPLAY_TYPE_DSI:
27801688 584 case OMAP_DISPLAY_TYPE_DPI:
c6a328a0 585 case OMAP_DISPLAY_TYPE_DVI:
e144ca64
AT		 586 if (mgr_id == OMAP_DSS_CHANNEL_LCD)
587 irq = DISPC_IRQ_VSYNC;
588 else if (mgr_id == OMAP_DSS_CHANNEL_LCD2)
589 irq = DISPC_IRQ_VSYNC2;
590 else
5c7ab634
VH		 591 goto vout_isr_err;
592
e144ca64 593 if (!(irqstatus & irq))
5251dd6c 594 goto vout_isr_err;
27801688
AT		 595 break;
596 case OMAP_DISPLAY_TYPE_VENC:
597 fid = omapvid_handle_interlace_display(vout, irqstatus,
598 timevalue);
599 if (!fid)
5c7ab634 600 goto vout_isr_err;
27801688
AT		 601 break;
602 case OMAP_DISPLAY_TYPE_HDMI:
603 if (!(irqstatus & DISPC_IRQ_EVSYNC_EVEN))
604 goto vout_isr_err;
605 break;
606 default:
607 goto vout_isr_err;
608 }
5c7ab634 609
27801688
AT		 610 if (!vout->first_int && (vout->cur_frm != vout->next_frm)) {
611 vout->cur_frm->ts = timevalue;
612 vout->cur_frm->state = VIDEOBUF_DONE;
613 wake_up_interruptible(&vout->cur_frm->done);
614 vout->cur_frm = vout->next_frm;
615 }
5c7ab634 616
27801688
AT		 617 vout->first_int = 0;
618 if (list_empty(&vout->dma_queue))
619 goto vout_isr_err;
5c7ab634 620
27801688
AT		 621 vout->next_frm = list_entry(vout->dma_queue.next,
622 struct videobuf_buffer, queue);
623 list_del(&vout->next_frm->queue);
5c7ab634 624
27801688 625 vout->next_frm->state = VIDEOBUF_ACTIVE;
5c7ab634 626
27801688
AT		 627 addr = (unsigned long) vout->queued_buf_addr[vout->next_frm->i]
628 + vout->cropped_offset;
5c7ab634 629
27801688
AT		 630 /* First save the configuration in ovelray structure */
631 ret = omapvid_init(vout, addr);
15170025 632 if (ret) {
27801688
AT		 633 printk(KERN_ERR VOUT_NAME
634 "failed to set overlay info\n");
15170025
FF		 635 goto vout_isr_err;
636 }
637
27801688
AT		 638 /* Enable the pipeline and set the Go bit */
639 ret = omapvid_apply_changes(vout);
640 if (ret)
641 printk(KERN_ERR VOUT_NAME "failed to change mode\n");
5c7ab634
VH		 642
643vout_isr_err:
644 spin_unlock(&vout->vbq_lock);
645}
646
5c7ab634
VH		 647/* Video buffer call backs */
648
649/*
650 * Buffer setup function is called by videobuf layer when REQBUF ioctl is
651 * called. This is used to setup buffers and return size and count of
652 * buffers allocated. After the call to this buffer, videobuf layer will
653 * setup buffer queue depending on the size and count of buffers
654 */
655static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count,
656 unsigned int *size)
657{
658 int startindex = 0, i, j;
659 u32 phy_addr = 0, virt_addr = 0;
660 struct omap_vout_device *vout = q->priv_data;
445e258f 661 struct omapvideo_info *ovid = &vout->vid_info;
d06db7ec 662 int vid_max_buf_size;
5c7ab634
VH		 663
664 if (!vout)
665 return -EINVAL;
666
d06db7ec
AT		 667 vid_max_buf_size = vout->vid == OMAP_VIDEO1 ? video1_bufsize :
668 video2_bufsize;
669
5c7ab634
VH		 670 if (V4L2_BUF_TYPE_VIDEO_OUTPUT != q->type)
671 return -EINVAL;
672
673 startindex = (vout->vid == OMAP_VIDEO1) ?
674 video1_numbuffers : video2_numbuffers;
675 if (V4L2_MEMORY_MMAP == vout->memory && *count < startindex)
676 *count = startindex;
677
445e258f 678 if (ovid->rotation_type == VOUT_ROT_VRFB) {
5c7ab634
VH		 679 if (omap_vout_vrfb_buffer_setup(vout, count, startindex))
680 return -ENOMEM;
445e258f 681 }
5c7ab634
VH		 682
683 if (V4L2_MEMORY_MMAP != vout->memory)
684 return 0;
685
686 /* Now allocated the V4L2 buffers */
687 *size = PAGE_ALIGN(vout->pix.width * vout->pix.height * vout->bpp);
688 startindex = (vout->vid == OMAP_VIDEO1) ?
689 video1_numbuffers : video2_numbuffers;
690
383e4f69 691 /* Check the size of the buffer */
d06db7ec 692 if (*size > vid_max_buf_size) {
383e4f69
VH		 693 v4l2_err(&vout->vid_dev->v4l2_dev,
694 "buffer allocation mismatch [%u] [%u]\n",
695 *size, vout->buffer_size);
696 return -ENOMEM;
697 }
698
5c7ab634
VH		 699 for (i = startindex; i < *count; i++) {
700 vout->buffer_size = *size;
701
702 virt_addr = omap_vout_alloc_buffer(vout->buffer_size,
703 &phy_addr);
704 if (!virt_addr) {
445e258f 705 if (ovid->rotation_type == VOUT_ROT_NONE) {
5c7ab634 706 break;
445e258f 707 } else {
708 if (!is_rotation_enabled(vout))
709 break;
5c7ab634
VH		 710 /* Free the VRFB buffers if no space for V4L2 buffers */
711 for (j = i; j < *count; j++) {
712 omap_vout_free_buffer(
713 vout->smsshado_virt_addr[j],
714 vout->smsshado_size);
715 vout->smsshado_virt_addr[j] = 0;
716 vout->smsshado_phy_addr[j] = 0;
445e258f 717 }
5c7ab634
VH		 718 }
719 }
720 vout->buf_virt_addr[i] = virt_addr;
721 vout->buf_phy_addr[i] = phy_addr;
722 }
723 *count = vout->buffer_allocated = i;
724
725 return 0;
726}
727
728/*
729 * Free the V4L2 buffers additionally allocated than default
445e258f 730 * number of buffers
5c7ab634 731 */
445e258f 732static void omap_vout_free_extra_buffers(struct omap_vout_device *vout)
5c7ab634
VH		 733{
734 int num_buffers = 0, i;
735
736 num_buffers = (vout->vid == OMAP_VIDEO1) ?
737 video1_numbuffers : video2_numbuffers;
738
739 for (i = num_buffers; i < vout->buffer_allocated; i++) {
740 if (vout->buf_virt_addr[i])
741 omap_vout_free_buffer(vout->buf_virt_addr[i],
742 vout->buffer_size);
743
744 vout->buf_virt_addr[i] = 0;
745 vout->buf_phy_addr[i] = 0;
746 }
5c7ab634
VH		 747 vout->buffer_allocated = num_buffers;
748}
749
750/*
751 * This function will be called when VIDIOC_QBUF ioctl is called.
752 * It prepare buffers before give out for the display. This function
753 * converts user space virtual address into physical address if userptr memory
754 * exchange mechanism is used. If rotation is enabled, it copies entire
755 * buffer into VRFB memory space before giving it to the DSS.
756 */
757static int omap_vout_buffer_prepare(struct videobuf_queue *q,
445e258f 758 struct videobuf_buffer *vb,
759 enum v4l2_field field)
5c7ab634 760{
5c7ab634 761 struct omap_vout_device *vout = q->priv_data;
445e258f 762 struct omapvideo_info *ovid = &vout->vid_info;
5c7ab634
VH		 763
764 if (VIDEOBUF_NEEDS_INIT == vb->state) {
765 vb->width = vout->pix.width;
766 vb->height = vout->pix.height;
767 vb->size = vb->width * vb->height * vout->bpp;
768 vb->field = field;
769 }
770 vb->state = VIDEOBUF_PREPARED;
771 /* if user pointer memory mechanism is used, get the physical
772 * address of the buffer
773 */
774 if (V4L2_MEMORY_USERPTR == vb->memory) {
8a677b6e
JK		 775 int ret;
776
5c7ab634
VH		 777 if (0 == vb->baddr)
778 return -EINVAL;
5c7ab634 779 /* Physical address */
8a677b6e
JK		 780 ret = omap_vout_get_userptr(vb, vb->baddr,
781 (u32 *)&vout->queued_buf_addr[vb->i]);
782 if (ret < 0)
783 return ret;
dd880dd4 784 } else {
e8bd888a 785 unsigned long addr, dma_addr;
72915e85
AJ		 786 unsigned long size;
787
788 addr = (unsigned long) vout->buf_virt_addr[vb->i];
789 size = (unsigned long) vb->size;
790
791 dma_addr = dma_map_single(vout->vid_dev->v4l2_dev.dev, (void *) addr,
792 size, DMA_TO_DEVICE);
793 if (dma_mapping_error(vout->vid_dev->v4l2_dev.dev, dma_addr))
794 v4l2_err(&vout->vid_dev->v4l2_dev, "dma_map_single failed\n");
795
dd880dd4 796 vout->queued_buf_addr[vb->i] = (u8 *)vout->buf_phy_addr[vb->i];
5c7ab634
VH		 797 }
798
445e258f 799 if (ovid->rotation_type == VOUT_ROT_VRFB)
800 return omap_vout_prepare_vrfb(vout, vb);
801 else
5c7ab634 802 return 0;
5c7ab634
VH		 803}
804
805/*
25985edc 806 * Buffer queue function will be called from the videobuf layer when _QBUF
5c7ab634
VH		 807 * ioctl is called. It is used to enqueue buffer, which is ready to be
808 * displayed.
809 */
810static void omap_vout_buffer_queue(struct videobuf_queue *q,
811 struct videobuf_buffer *vb)
812{
813 struct omap_vout_device *vout = q->priv_data;
814
815 /* Driver is also maintainig a queue. So enqueue buffer in the driver
816 * queue */
817 list_add_tail(&vb->queue, &vout->dma_queue);
818
819 vb->state = VIDEOBUF_QUEUED;
820}
821
822/*
823 * Buffer release function is called from videobuf layer to release buffer
824 * which are already allocated
825 */
826static void omap_vout_buffer_release(struct videobuf_queue *q,
827 struct videobuf_buffer *vb)
828{
5c7ab634 829 vb->state = VIDEOBUF_NEEDS_INIT;
8a677b6e
JK		 830 if (vb->memory == V4L2_MEMORY_USERPTR && vb->priv) {
831 struct frame_vector *vec = vb->priv;
5c7ab634 832
8a677b6e
JK		 833 put_vaddr_frames(vec);
834 frame_vector_destroy(vec);
835 }
5c7ab634
VH		 836}
837
838/*
839 * File operations
840 */
94f3f48f
LP		 841static unsigned int omap_vout_poll(struct file *file,
842 struct poll_table_struct *wait)
843{
844 struct omap_vout_device *vout = file->private_data;
845 struct videobuf_queue *q = &vout->vbq;
846
847 return videobuf_poll_stream(file, q, wait);
848}
849
5c7ab634
VH		 850static void omap_vout_vm_open(struct vm_area_struct *vma)
851{
852 struct omap_vout_device *vout = vma->vm_private_data;
853
854 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
855 "vm_open [vma=%08lx-%08lx]\n", vma->vm_start, vma->vm_end);
856 vout->mmap_count++;
857}
858
859static void omap_vout_vm_close(struct vm_area_struct *vma)
860{
861 struct omap_vout_device *vout = vma->vm_private_data;
862
863 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
864 "vm_close [vma=%08lx-%08lx]\n", vma->vm_start, vma->vm_end);
865 vout->mmap_count--;
866}
867
7cbea8dc 868static const struct vm_operations_struct omap_vout_vm_ops = {
5c7ab634
VH		 869 .open = omap_vout_vm_open,
870 .close = omap_vout_vm_close,
871};
872
873static int omap_vout_mmap(struct file *file, struct vm_area_struct *vma)
874{
875 int i;
876 void *pos;
877 unsigned long start = vma->vm_start;
878 unsigned long size = (vma->vm_end - vma->vm_start);
5c7ab634
VH		 879 struct omap_vout_device *vout = file->private_data;
880 struct videobuf_queue *q = &vout->vbq;
881
882 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
883 " %s pgoff=0x%lx, start=0x%lx, end=0x%lx\n", __func__,
884 vma->vm_pgoff, vma->vm_start, vma->vm_end);
885
886 /* look for the buffer to map */
887 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
888 if (NULL == q->bufs[i])
889 continue;
890 if (V4L2_MEMORY_MMAP != q->bufs[i]->memory)
891 continue;
892 if (q->bufs[i]->boff == (vma->vm_pgoff << PAGE_SHIFT))
893 break;
894 }
895
896 if (VIDEO_MAX_FRAME == i) {
897 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
898 "offset invalid [offset=0x%lx]\n",
899 (vma->vm_pgoff << PAGE_SHIFT));
900 return -EINVAL;
901 }
383e4f69
VH		 902 /* Check the size of the buffer */
903 if (size > vout->buffer_size) {
904 v4l2_err(&vout->vid_dev->v4l2_dev,
905 "insufficient memory [%lu] [%u]\n",
906 size, vout->buffer_size);
907 return -ENOMEM;
908 }
909
5c7ab634
VH		 910 q->bufs[i]->baddr = vma->vm_start;
911
314e51b9 912 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
5c7ab634
VH		 913 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
914 vma->vm_ops = &omap_vout_vm_ops;
915 vma->vm_private_data = (void *) vout;
dd880dd4 916 pos = (void *)vout->buf_virt_addr[i];
5c7ab634
VH		 917 vma->vm_pgoff = virt_to_phys((void *)pos) >> PAGE_SHIFT;
918 while (size > 0) {
919 unsigned long pfn;
920 pfn = virt_to_phys((void *) pos) >> PAGE_SHIFT;
921 if (remap_pfn_range(vma, start, pfn, PAGE_SIZE, PAGE_SHARED))
922 return -EAGAIN;
923 start += PAGE_SIZE;
924 pos += PAGE_SIZE;
925 size -= PAGE_SIZE;
926 }
927 vout->mmap_count++;
928 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
929
930 return 0;
931}
932
933static int omap_vout_release(struct file *file)
934{
935 unsigned int ret, i;
936 struct videobuf_queue *q;
937 struct omapvideo_info *ovid;
938 struct omap_vout_device *vout = file->private_data;
939
940 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Entering %s\n", __func__);
941 ovid = &vout->vid_info;
942
943 if (!vout)
944 return 0;
945
946 q = &vout->vbq;
947 /* Disable all the overlay managers connected with this interface */
948 for (i = 0; i < ovid->num_overlays; i++) {
949 struct omap_overlay *ovl = ovid->overlays[i];
d629f03f
AT		 950 struct omap_dss_device *dssdev = ovl->get_device(ovl);
951
952 if (dssdev)
aaa874a9 953 ovl->disable(ovl);
5c7ab634
VH		 954 }
955 /* Turn off the pipeline */
956 ret = omapvid_apply_changes(vout);
957 if (ret)
958 v4l2_warn(&vout->vid_dev->v4l2_dev,
959 "Unable to apply changes\n");
960
961 /* Free all buffers */
445e258f 962 omap_vout_free_extra_buffers(vout);
963
964 /* Free the VRFB buffers only if they are allocated
965 * during reqbufs. Don't free if init time allocated
966 */
967 if (ovid->rotation_type == VOUT_ROT_VRFB) {
968 if (!vout->vrfb_static_allocation)
969 omap_vout_free_vrfb_buffers(vout);
970 }
5c7ab634
VH		 971 videobuf_mmap_free(q);
972
973 /* Even if apply changes fails we should continue
b595076a 974 freeing allocated memory */
5c7ab634
VH		 975 if (vout->streaming) {
976 u32 mask = 0;
977
978 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN |
5251dd6c 979 DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_VSYNC2;
5c7ab634 980 omap_dispc_unregister_isr(omap_vout_isr, vout, mask);
160ac0ba 981 vout->streaming = false;
5c7ab634
VH		 982
983 videobuf_streamoff(q);
984 videobuf_queue_cancel(q);
985 }
986
987 if (vout->mmap_count != 0)
988 vout->mmap_count = 0;
989
990 vout->opened -= 1;
991 file->private_data = NULL;
992
993 if (vout->buffer_allocated)
994 videobuf_mmap_free(q);
995
996 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
997 return ret;
998}
999
1000static int omap_vout_open(struct file *file)
1001{
1002 struct videobuf_queue *q;
1003 struct omap_vout_device *vout = NULL;
1004
1005 vout = video_drvdata(file);
1006 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Entering %s\n", __func__);
1007
1008 if (vout == NULL)
1009 return -ENODEV;
1010
1011 /* for now, we only support single open */
1012 if (vout->opened)
1013 return -EBUSY;
1014
1015 vout->opened += 1;
1016
1017 file->private_data = vout;
1018 vout->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1019
1020 q = &vout->vbq;
1021 video_vbq_ops.buf_setup = omap_vout_buffer_setup;
1022 video_vbq_ops.buf_prepare = omap_vout_buffer_prepare;
1023 video_vbq_ops.buf_release = omap_vout_buffer_release;
1024 video_vbq_ops.buf_queue = omap_vout_buffer_queue;
1025 spin_lock_init(&vout->vbq_lock);
1026
dd880dd4
VH		 1027 videobuf_queue_dma_contig_init(q, &video_vbq_ops, q->dev,
1028 &vout->vbq_lock, vout->type, V4L2_FIELD_NONE,
e3cfd447 1029 sizeof(struct videobuf_buffer), vout, NULL);
5c7ab634
VH		 1030
1031 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
1032 return 0;
1033}
1034
1035/*
1036 * V4L2 ioctls
1037 */
1038static int vidioc_querycap(struct file *file, void *fh,
1039 struct v4l2_capability *cap)
1040{
1041 struct omap_vout_device *vout = fh;
1042
1043 strlcpy(cap->driver, VOUT_NAME, sizeof(cap->driver));
1044 strlcpy(cap->card, vout->vfd->name, sizeof(cap->card));
1045 cap->bus_info[0] = '\0';
a020c747 1046 cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT |
047a01fd 1047 V4L2_CAP_VIDEO_OUTPUT_OVERLAY;
a020c747 1048 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
5c7ab634
VH		 1049
1050 return 0;
1051}
1052
1053static int vidioc_enum_fmt_vid_out(struct file *file, void *fh,
1054 struct v4l2_fmtdesc *fmt)
1055{
1056 int index = fmt->index;
5c7ab634 1057
5c7ab634
VH		 1058 if (index >= NUM_OUTPUT_FORMATS)
1059 return -EINVAL;
1060
1061 fmt->flags = omap_formats[index].flags;
1062 strlcpy(fmt->description, omap_formats[index].description,
1063 sizeof(fmt->description));
1064 fmt->pixelformat = omap_formats[index].pixelformat;
1065
1066 return 0;
1067}
1068
1069static int vidioc_g_fmt_vid_out(struct file *file, void *fh,
1070 struct v4l2_format *f)
1071{
1072 struct omap_vout_device *vout = fh;
1073
1074 f->fmt.pix = vout->pix;
1075 return 0;
1076
1077}
1078
1079static int vidioc_try_fmt_vid_out(struct file *file, void *fh,
1080 struct v4l2_format *f)
1081{
1082 struct omap_overlay *ovl;
1083 struct omapvideo_info *ovid;
1084 struct omap_video_timings *timing;
1085 struct omap_vout_device *vout = fh;
d629f03f 1086 struct omap_dss_device *dssdev;
5c7ab634
VH		 1087
1088 ovid = &vout->vid_info;
1089 ovl = ovid->overlays[0];
d629f03f
AT		 1090 /* get the display device attached to the overlay */
1091 dssdev = ovl->get_device(ovl);
5c7ab634 1092
d629f03f 1093 if (!dssdev)
5c7ab634 1094 return -EINVAL;
d629f03f
AT		 1095
1096 timing = &dssdev->panel.timings;
5c7ab634
VH		 1097
1098 vout->fbuf.fmt.height = timing->y_res;
1099 vout->fbuf.fmt.width = timing->x_res;
1100
1101 omap_vout_try_format(&f->fmt.pix);
1102 return 0;
1103}
1104
1105static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
1106 struct v4l2_format *f)
1107{
1108 int ret, bpp;
1109 struct omap_overlay *ovl;
1110 struct omapvideo_info *ovid;
1111 struct omap_video_timings *timing;
1112 struct omap_vout_device *vout = fh;
d629f03f 1113 struct omap_dss_device *dssdev;
5c7ab634
VH		 1114
1115 if (vout->streaming)
1116 return -EBUSY;
1117
1118 mutex_lock(&vout->lock);
1119
1120 ovid = &vout->vid_info;
1121 ovl = ovid->overlays[0];
d629f03f 1122 dssdev = ovl->get_device(ovl);
5c7ab634
VH		 1123
1124 /* get the display device attached to the overlay */
d629f03f 1125 if (!dssdev) {
5c7ab634
VH		 1126 ret = -EINVAL;
1127 goto s_fmt_vid_out_exit;
1128 }
d629f03f 1129 timing = &dssdev->panel.timings;
5c7ab634
VH		 1130
1131 /* We dont support RGB24-packed mode if vrfb rotation
1132 * is enabled*/
b366888a 1133 if ((is_rotation_enabled(vout)) &&
5c7ab634
VH		 1134 f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1135 ret = -EINVAL;
1136 goto s_fmt_vid_out_exit;
1137 }
1138
1139 /* get the framebuffer parameters */
1140
b366888a 1141 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 1142 vout->fbuf.fmt.height = timing->x_res;
1143 vout->fbuf.fmt.width = timing->y_res;
1144 } else {
1145 vout->fbuf.fmt.height = timing->y_res;
1146 vout->fbuf.fmt.width = timing->x_res;
1147 }
1148
1149 /* change to samller size is OK */
1150
1151 bpp = omap_vout_try_format(&f->fmt.pix);
1152 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp;
1153
1154 /* try & set the new output format */
1155 vout->bpp = bpp;
1156 vout->pix = f->fmt.pix;
1157 vout->vrfb_bpp = 1;
1158
1159 /* If YUYV then vrfb bpp is 2, for others its 1 */
1160 if (V4L2_PIX_FMT_YUYV == vout->pix.pixelformat ||
1161 V4L2_PIX_FMT_UYVY == vout->pix.pixelformat)
1162 vout->vrfb_bpp = 2;
1163
1164 /* set default crop and win */
1165 omap_vout_new_format(&vout->pix, &vout->fbuf, &vout->crop, &vout->win);
1166
5c7ab634
VH		 1167 ret = 0;
1168
1169s_fmt_vid_out_exit:
1170 mutex_unlock(&vout->lock);
1171 return ret;
1172}
1173
1174static int vidioc_try_fmt_vid_overlay(struct file *file, void *fh,
1175 struct v4l2_format *f)
1176{
1177 int ret = 0;
1178 struct omap_vout_device *vout = fh;
11354dd5
AT		 1179 struct omap_overlay *ovl;
1180 struct omapvideo_info *ovid;
5c7ab634
VH		 1181 struct v4l2_window *win = &f->fmt.win;
1182
11354dd5
AT		 1183 ovid = &vout->vid_info;
1184 ovl = ovid->overlays[0];
1185
5c7ab634
VH		 1186 ret = omap_vout_try_window(&vout->fbuf, win);
1187
1188 if (!ret) {
11354dd5 1189 if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
5c7ab634
VH		 1190 win->global_alpha = 255;
1191 else
1192 win->global_alpha = f->fmt.win.global_alpha;
1193 }
1194
1195 return ret;
1196}
1197
1198static int vidioc_s_fmt_vid_overlay(struct file *file, void *fh,
1199 struct v4l2_format *f)
1200{
1201 int ret = 0;
1202 struct omap_overlay *ovl;
1203 struct omapvideo_info *ovid;
1204 struct omap_vout_device *vout = fh;
1205 struct v4l2_window *win = &f->fmt.win;
1206
1207 mutex_lock(&vout->lock);
1208 ovid = &vout->vid_info;
1209 ovl = ovid->overlays[0];
1210
1211 ret = omap_vout_new_window(&vout->crop, &vout->win, &vout->fbuf, win);
1212 if (!ret) {
11354dd5
AT		 1213 /* Video1 plane does not support global alpha on OMAP3 */
1214 if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
5c7ab634
VH		 1215 vout->win.global_alpha = 255;
1216 else
1217 vout->win.global_alpha = f->fmt.win.global_alpha;
1218
1219 vout->win.chromakey = f->fmt.win.chromakey;
1220 }
1221 mutex_unlock(&vout->lock);
1222 return ret;
1223}
1224
5c7ab634
VH		 1225static int vidioc_g_fmt_vid_overlay(struct file *file, void *fh,
1226 struct v4l2_format *f)
1227{
1228 u32 key_value = 0;
1229 struct omap_overlay *ovl;
1230 struct omapvideo_info *ovid;
1231 struct omap_vout_device *vout = fh;
1232 struct omap_overlay_manager_info info;
1233 struct v4l2_window *win = &f->fmt.win;
1234
1235 ovid = &vout->vid_info;
1236 ovl = ovid->overlays[0];
1237
1238 win->w = vout->win.w;
1239 win->field = vout->win.field;
1240 win->global_alpha = vout->win.global_alpha;
1241
1242 if (ovl->manager && ovl->manager->get_manager_info) {
1243 ovl->manager->get_manager_info(ovl->manager, &info);
1244 key_value = info.trans_key;
1245 }
1246 win->chromakey = key_value;
1247 return 0;
1248}
1249
d1d09461 1250static int vidioc_g_selection(struct file *file, void *fh, struct v4l2_selection *sel)
5c7ab634
VH		 1251{
1252 struct omap_vout_device *vout = fh;
1253 struct v4l2_pix_format *pix = &vout->pix;
1254
d1d09461 1255 if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
5c7ab634
VH		 1256 return -EINVAL;
1257
d1d09461
HV		 1258 switch (sel->target) {
1259 case V4L2_SEL_TGT_CROP:
1260 sel->r = vout->crop;
1261 break;
1262 case V4L2_SEL_TGT_CROP_DEFAULT:
1263 omap_vout_default_crop(&vout->pix, &vout->fbuf, &sel->r);
1264 break;
1265 case V4L2_SEL_TGT_CROP_BOUNDS:
1266 /* Width and height are always even */
1267 sel->r.width = pix->width & ~1;
1268 sel->r.height = pix->height & ~1;
1269 break;
1270 default:
5c7ab634 1271 return -EINVAL;
d1d09461 1272 }
5c7ab634
VH		 1273 return 0;
1274}
1275
d1d09461 1276static int vidioc_s_selection(struct file *file, void *fh, struct v4l2_selection *sel)
5c7ab634
VH		 1277{
1278 int ret = -EINVAL;
1279 struct omap_vout_device *vout = fh;
1280 struct omapvideo_info *ovid;
1281 struct omap_overlay *ovl;
1282 struct omap_video_timings *timing;
d629f03f 1283 struct omap_dss_device *dssdev;
5c7ab634 1284
d1d09461
HV		 1285 if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1286 return -EINVAL;
1287
1288 if (sel->target != V4L2_SEL_TGT_CROP)
1289 return -EINVAL;
1290
5c7ab634
VH		 1291 if (vout->streaming)
1292 return -EBUSY;
1293
1294 mutex_lock(&vout->lock);
1295 ovid = &vout->vid_info;
1296 ovl = ovid->overlays[0];
d629f03f
AT		 1297 /* get the display device attached to the overlay */
1298 dssdev = ovl->get_device(ovl);
5c7ab634 1299
d629f03f 1300 if (!dssdev) {
5c7ab634
VH		 1301 ret = -EINVAL;
1302 goto s_crop_err;
1303 }
d629f03f
AT		 1304
1305 timing = &dssdev->panel.timings;
5c7ab634 1306
b366888a 1307 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 1308 vout->fbuf.fmt.height = timing->x_res;
1309 vout->fbuf.fmt.width = timing->y_res;
1310 } else {
1311 vout->fbuf.fmt.height = timing->y_res;
1312 vout->fbuf.fmt.width = timing->x_res;
1313 }
1314
d1d09461
HV		 1315 ret = omap_vout_new_crop(&vout->pix, &vout->crop, &vout->win,
1316 &vout->fbuf, &sel->r);
5c7ab634
VH		 1317
1318s_crop_err:
1319 mutex_unlock(&vout->lock);
1320 return ret;
1321}
1322
77430f03 1323static int omap_vout_s_ctrl(struct v4l2_ctrl *ctrl)
5c7ab634 1324{
77430f03
HV		 1325 struct omap_vout_device *vout =
1326 container_of(ctrl->handler, struct omap_vout_device, ctrl_handler);
5c7ab634
VH		 1327 int ret = 0;
1328
1329 switch (ctrl->id) {
77430f03 1330 case V4L2_CID_ROTATE: {
445e258f 1331 struct omapvideo_info *ovid;
77430f03 1332 int rotation = ctrl->val;
5c7ab634 1333
445e258f 1334 ovid = &vout->vid_info;
1335
5c7ab634 1336 mutex_lock(&vout->lock);
445e258f 1337 if (rotation && ovid->rotation_type == VOUT_ROT_NONE) {
1338 mutex_unlock(&vout->lock);
1339 ret = -ERANGE;
1340 break;
1341 }
5c7ab634
VH		 1342
1343 if (rotation && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1344 mutex_unlock(&vout->lock);
1345 ret = -EINVAL;
1346 break;
1347 }
1348
1349 if (v4l2_rot_to_dss_rot(rotation, &vout->rotation,
1350 vout->mirror)) {
1351 mutex_unlock(&vout->lock);
1352 ret = -EINVAL;
1353 break;
1354 }
5c7ab634
VH		 1355 mutex_unlock(&vout->lock);
1356 break;
1357 }
1358 case V4L2_CID_BG_COLOR:
1359 {
1360 struct omap_overlay *ovl;
77430f03 1361 unsigned int color = ctrl->val;
5c7ab634
VH		 1362 struct omap_overlay_manager_info info;
1363
1364 ovl = vout->vid_info.overlays[0];
1365
1366 mutex_lock(&vout->lock);
1367 if (!ovl->manager || !ovl->manager->get_manager_info) {
1368 mutex_unlock(&vout->lock);
1369 ret = -EINVAL;
1370 break;
1371 }
1372
1373 ovl->manager->get_manager_info(ovl->manager, &info);
1374 info.default_color = color;
1375 if (ovl->manager->set_manager_info(ovl->manager, &info)) {
1376 mutex_unlock(&vout->lock);
1377 ret = -EINVAL;
1378 break;
1379 }
5c7ab634
VH		 1380 mutex_unlock(&vout->lock);
1381 break;
1382 }
1383 case V4L2_CID_VFLIP:
1384 {
5c7ab634 1385 struct omapvideo_info *ovid;
77430f03 1386 unsigned int mirror = ctrl->val;
5c7ab634
VH		 1387
1388 ovid = &vout->vid_info;
5c7ab634
VH		 1389
1390 mutex_lock(&vout->lock);
445e258f 1391 if (mirror && ovid->rotation_type == VOUT_ROT_NONE) {
1392 mutex_unlock(&vout->lock);
1393 ret = -ERANGE;
1394 break;
1395 }
5c7ab634
VH		 1396
1397 if (mirror && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1398 mutex_unlock(&vout->lock);
1399 ret = -EINVAL;
1400 break;
1401 }
1402 vout->mirror = mirror;
5c7ab634
VH		 1403 mutex_unlock(&vout->lock);
1404 break;
1405 }
1406 default:
77430f03 1407 return -EINVAL;
5c7ab634
VH		 1408 }
1409 return ret;
1410}
1411
77430f03
HV		 1412static const struct v4l2_ctrl_ops omap_vout_ctrl_ops = {
1413 .s_ctrl = omap_vout_s_ctrl,
1414};
1415
5c7ab634
VH		 1416static int vidioc_reqbufs(struct file *file, void *fh,
1417 struct v4l2_requestbuffers *req)
1418{
1419 int ret = 0;
1420 unsigned int i, num_buffers = 0;
1421 struct omap_vout_device *vout = fh;
1422 struct videobuf_queue *q = &vout->vbq;
5c7ab634 1423
52334bb3 1424 if (req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
5c7ab634
VH		 1425 return -EINVAL;
1426 /* if memory is not mmp or userptr
1427 return error */
1428 if ((V4L2_MEMORY_MMAP != req->memory) &&
1429 (V4L2_MEMORY_USERPTR != req->memory))
1430 return -EINVAL;
1431
1432 mutex_lock(&vout->lock);
1433 /* Cannot be requested when streaming is on */
1434 if (vout->streaming) {
1435 ret = -EBUSY;
1436 goto reqbuf_err;
1437 }
1438
1439 /* If buffers are already allocated free them */
1440 if (q->bufs[0] && (V4L2_MEMORY_MMAP == q->bufs[0]->memory)) {
1441 if (vout->mmap_count) {
1442 ret = -EBUSY;
1443 goto reqbuf_err;
1444 }
1445 num_buffers = (vout->vid == OMAP_VIDEO1) ?
1446 video1_numbuffers : video2_numbuffers;
1447 for (i = num_buffers; i < vout->buffer_allocated; i++) {
dd880dd4 1448 omap_vout_free_buffer(vout->buf_virt_addr[i],
5c7ab634
VH		 1449 vout->buffer_size);
1450 vout->buf_virt_addr[i] = 0;
1451 vout->buf_phy_addr[i] = 0;
1452 }
1453 vout->buffer_allocated = num_buffers;
1454 videobuf_mmap_free(q);
1455 } else if (q->bufs[0] && (V4L2_MEMORY_USERPTR == q->bufs[0]->memory)) {
1456 if (vout->buffer_allocated) {
1457 videobuf_mmap_free(q);
1458 for (i = 0; i < vout->buffer_allocated; i++) {
1459 kfree(q->bufs[i]);
1460 q->bufs[i] = NULL;
1461 }
1462 vout->buffer_allocated = 0;
1463 }
1464 }
1465
1466 /*store the memory type in data structure */
1467 vout->memory = req->memory;
1468
1469 INIT_LIST_HEAD(&vout->dma_queue);
1470
1471 /* call videobuf_reqbufs api */
1472 ret = videobuf_reqbufs(q, req);
1473 if (ret < 0)
1474 goto reqbuf_err;
1475
1476 vout->buffer_allocated = req->count;
dd880dd4 1477
5c7ab634
VH		 1478reqbuf_err:
1479 mutex_unlock(&vout->lock);
1480 return ret;
1481}
1482
1483static int vidioc_querybuf(struct file *file, void *fh,
1484 struct v4l2_buffer *b)
1485{
1486 struct omap_vout_device *vout = fh;
1487
1488 return videobuf_querybuf(&vout->vbq, b);
1489}
1490
1491static int vidioc_qbuf(struct file *file, void *fh,
1492 struct v4l2_buffer *buffer)
1493{
1494 struct omap_vout_device *vout = fh;
1495 struct videobuf_queue *q = &vout->vbq;
1496
1497 if ((V4L2_BUF_TYPE_VIDEO_OUTPUT != buffer->type) ||
1498 (buffer->index >= vout->buffer_allocated) ||
1499 (q->bufs[buffer->index]->memory != buffer->memory)) {
1500 return -EINVAL;
1501 }
1502 if (V4L2_MEMORY_USERPTR == buffer->memory) {
1503 if ((buffer->length < vout->pix.sizeimage) ||
1504 (0 == buffer->m.userptr)) {
1505 return -EINVAL;
1506 }
1507 }
1508
b366888a 1509 if ((is_rotation_enabled(vout)) &&
5c7ab634
VH		 1510 vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED) {
1511 v4l2_warn(&vout->vid_dev->v4l2_dev,
1512 "DMA Channel not allocated for Rotation\n");
1513 return -EINVAL;
1514 }
1515
1516 return videobuf_qbuf(q, buffer);
1517}
1518
1519static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b)
1520{
1521 struct omap_vout_device *vout = fh;
1522 struct videobuf_queue *q = &vout->vbq;
1523
72915e85
AJ		 1524 int ret;
1525 u32 addr;
1526 unsigned long size;
1527 struct videobuf_buffer *vb;
1528
1529 vb = q->bufs[b->index];
1530
5c7ab634
VH		 1531 if (!vout->streaming)
1532 return -EINVAL;
1533
1534 if (file->f_flags & O_NONBLOCK)
1535 /* Call videobuf_dqbuf for non blocking mode */
72915e85 1536 ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 1);
5c7ab634
VH		 1537 else
1538 /* Call videobuf_dqbuf for blocking mode */
72915e85
AJ		 1539 ret = videobuf_dqbuf(q, (struct v4l2_buffer *)b, 0);
1540
1541 addr = (unsigned long) vout->buf_phy_addr[vb->i];
1542 size = (unsigned long) vb->size;
1543 dma_unmap_single(vout->vid_dev->v4l2_dev.dev, addr,
1544 size, DMA_TO_DEVICE);
1545 return ret;
5c7ab634
VH		 1546}
1547
1548static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i)
1549{
1550 int ret = 0, j;
1551 u32 addr = 0, mask = 0;
1552 struct omap_vout_device *vout = fh;
1553 struct videobuf_queue *q = &vout->vbq;
1554 struct omapvideo_info *ovid = &vout->vid_info;
1555
1556 mutex_lock(&vout->lock);
1557
1558 if (vout->streaming) {
1559 ret = -EBUSY;
1560 goto streamon_err;
1561 }
1562
1563 ret = videobuf_streamon(q);
1564 if (ret)
1565 goto streamon_err;
1566
1567 if (list_empty(&vout->dma_queue)) {
1568 ret = -EIO;
1569 goto streamon_err1;
1570 }
1571
1572 /* Get the next frame from the buffer queue */
1573 vout->next_frm = vout->cur_frm = list_entry(vout->dma_queue.next,
1574 struct videobuf_buffer, queue);
1575 /* Remove buffer from the buffer queue */
1576 list_del(&vout->cur_frm->queue);
1577 /* Mark state of the current frame to active */
1578 vout->cur_frm->state = VIDEOBUF_ACTIVE;
1579 /* Initialize field_id and started member */
1580 vout->field_id = 0;
1581
1582 /* set flag here. Next QBUF will start DMA */
160ac0ba 1583 vout->streaming = true;
5c7ab634
VH		 1584
1585 vout->first_int = 1;
1586
1587 if (omap_vout_calculate_offset(vout)) {
1588 ret = -EINVAL;
1589 goto streamon_err1;
1590 }
1591 addr = (unsigned long) vout->queued_buf_addr[vout->cur_frm->i]
1592 + vout->cropped_offset;
1593
5251dd6c
AJ		 1594 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD
1595 | DISPC_IRQ_VSYNC2;
5c7ab634 1596
5c7ab634
VH		 1597 /* First save the configuration in ovelray structure */
1598 ret = omapvid_init(vout, addr);
15170025 1599 if (ret) {
5c7ab634
VH		 1600 v4l2_err(&vout->vid_dev->v4l2_dev,
1601 "failed to set overlay info\n");
15170025
FF		 1602 goto streamon_err1;
1603 }
1604
1605 omap_dispc_register_isr(omap_vout_isr, vout, mask);
1606
5c7ab634
VH		 1607 /* Enable the pipeline and set the Go bit */
1608 ret = omapvid_apply_changes(vout);
1609 if (ret)
1610 v4l2_err(&vout->vid_dev->v4l2_dev, "failed to change mode\n");
1611
aaa874a9
TV		 1612 for (j = 0; j < ovid->num_overlays; j++) {
1613 struct omap_overlay *ovl = ovid->overlays[j];
d629f03f 1614 struct omap_dss_device *dssdev = ovl->get_device(ovl);
aaa874a9 1615
d629f03f 1616 if (dssdev) {
aaa874a9
TV		 1617 ret = ovl->enable(ovl);
1618 if (ret)
1619 goto streamon_err1;
1620 }
1621 }
1622
5c7ab634
VH		 1623 ret = 0;
1624
1625streamon_err1:
1626 if (ret)
1627 ret = videobuf_streamoff(q);
1628streamon_err:
1629 mutex_unlock(&vout->lock);
1630 return ret;
1631}
1632
1633static int vidioc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i)
1634{
1635 u32 mask = 0;
1636 int ret = 0, j;
1637 struct omap_vout_device *vout = fh;
1638 struct omapvideo_info *ovid = &vout->vid_info;
1639
1640 if (!vout->streaming)
1641 return -EINVAL;
1642
160ac0ba 1643 vout->streaming = false;
5251dd6c
AJ		 1644 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD
1645 | DISPC_IRQ_VSYNC2;
5c7ab634
VH		 1646
1647 omap_dispc_unregister_isr(omap_vout_isr, vout, mask);
1648
1649 for (j = 0; j < ovid->num_overlays; j++) {
1650 struct omap_overlay *ovl = ovid->overlays[j];
d629f03f 1651 struct omap_dss_device *dssdev = ovl->get_device(ovl);
5c7ab634 1652
d629f03f 1653 if (dssdev)
aaa874a9 1654 ovl->disable(ovl);
5c7ab634
VH		 1655 }
1656
1657 /* Turn of the pipeline */
1658 ret = omapvid_apply_changes(vout);
1659 if (ret)
1660 v4l2_err(&vout->vid_dev->v4l2_dev, "failed to change mode in"
1661 " streamoff\n");
1662
1663 INIT_LIST_HEAD(&vout->dma_queue);
1664 ret = videobuf_streamoff(&vout->vbq);
1665
1666 return ret;
1667}
1668
1669static int vidioc_s_fbuf(struct file *file, void *fh,
e6eb28c2 1670 const struct v4l2_framebuffer *a)
5c7ab634
VH		 1671{
1672 int enable = 0;
1673 struct omap_overlay *ovl;
1674 struct omapvideo_info *ovid;
1675 struct omap_vout_device *vout = fh;
1676 struct omap_overlay_manager_info info;
1677 enum omap_dss_trans_key_type key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
1678
1679 ovid = &vout->vid_info;
1680 ovl = ovid->overlays[0];
1681
1682 /* OMAP DSS doesn't support Source and Destination color
1683 key together */
1684 if ((a->flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY) &&
1685 (a->flags & V4L2_FBUF_FLAG_CHROMAKEY))
1686 return -EINVAL;
1687 /* OMAP DSS Doesn't support the Destination color key
1688 and alpha blending together */
1689 if ((a->flags & V4L2_FBUF_FLAG_CHROMAKEY) &&
1690 (a->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA))
1691 return -EINVAL;
1692
1693 if ((a->flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY)) {
1694 vout->fbuf.flags |= V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1695 key_type = OMAP_DSS_COLOR_KEY_VID_SRC;
1696 } else
1697 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1698
1699 if ((a->flags & V4L2_FBUF_FLAG_CHROMAKEY)) {
1700 vout->fbuf.flags |= V4L2_FBUF_FLAG_CHROMAKEY;
1701 key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
1702 } else
1703 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_CHROMAKEY;
1704
1705 if (a->flags & (V4L2_FBUF_FLAG_CHROMAKEY |
1706 V4L2_FBUF_FLAG_SRC_CHROMAKEY))
1707 enable = 1;
1708 else
1709 enable = 0;
1710 if (ovl->manager && ovl->manager->get_manager_info &&
1711 ovl->manager->set_manager_info) {
1712
1713 ovl->manager->get_manager_info(ovl->manager, &info);
1714 info.trans_enabled = enable;
1715 info.trans_key_type = key_type;
1716 info.trans_key = vout->win.chromakey;
1717
1718 if (ovl->manager->set_manager_info(ovl->manager, &info))
1719 return -EINVAL;
1720 }
1721 if (a->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) {
1722 vout->fbuf.flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA;
1723 enable = 1;
1724 } else {
1725 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_LOCAL_ALPHA;
1726 enable = 0;
1727 }
1728 if (ovl->manager && ovl->manager->get_manager_info &&
1729 ovl->manager->set_manager_info) {
1730 ovl->manager->get_manager_info(ovl->manager, &info);
11354dd5
AT		 1731 /* enable this only if there is no zorder cap */
1732 if ((ovl->caps & OMAP_DSS_OVL_CAP_ZORDER) == 0)
1733 info.partial_alpha_enabled = enable;
5c7ab634
VH		 1734 if (ovl->manager->set_manager_info(ovl->manager, &info))
1735 return -EINVAL;
1736 }
1737
1738 return 0;
1739}
1740
1741static int vidioc_g_fbuf(struct file *file, void *fh,
1742 struct v4l2_framebuffer *a)
1743{
1744 struct omap_overlay *ovl;
1745 struct omapvideo_info *ovid;
1746 struct omap_vout_device *vout = fh;
1747 struct omap_overlay_manager_info info;
1748
1749 ovid = &vout->vid_info;
1750 ovl = ovid->overlays[0];
1751
047a01fd
HV		 1752 /* The video overlay must stay within the framebuffer and can't be
1753 positioned independently. */
1754 a->flags = V4L2_FBUF_FLAG_OVERLAY;
5c7ab634
VH		 1755 a->capability = V4L2_FBUF_CAP_LOCAL_ALPHA | V4L2_FBUF_CAP_CHROMAKEY
1756 | V4L2_FBUF_CAP_SRC_CHROMAKEY;
1757
1758 if (ovl->manager && ovl->manager->get_manager_info) {
1759 ovl->manager->get_manager_info(ovl->manager, &info);
1760 if (info.trans_key_type == OMAP_DSS_COLOR_KEY_VID_SRC)
1761 a->flags |= V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1762 if (info.trans_key_type == OMAP_DSS_COLOR_KEY_GFX_DST)
1763 a->flags |= V4L2_FBUF_FLAG_CHROMAKEY;
1764 }
1765 if (ovl->manager && ovl->manager->get_manager_info) {
1766 ovl->manager->get_manager_info(ovl->manager, &info);
11354dd5 1767 if (info.partial_alpha_enabled)
5c7ab634
VH		 1768 a->flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA;
1769 }
1770
1771 return 0;
1772}
1773
1774static const struct v4l2_ioctl_ops vout_ioctl_ops = {
1775 .vidioc_querycap = vidioc_querycap,
1776 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
1777 .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
1778 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
1779 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
5c7ab634
VH		 1780 .vidioc_s_fbuf = vidioc_s_fbuf,
1781 .vidioc_g_fbuf = vidioc_g_fbuf,
7b2607c9
LP		 1782 .vidioc_try_fmt_vid_out_overlay = vidioc_try_fmt_vid_overlay,
1783 .vidioc_s_fmt_vid_out_overlay = vidioc_s_fmt_vid_overlay,
1784 .vidioc_g_fmt_vid_out_overlay = vidioc_g_fmt_vid_overlay,
d1d09461
HV		 1785 .vidioc_g_selection = vidioc_g_selection,
1786 .vidioc_s_selection = vidioc_s_selection,
5c7ab634
VH		 1787 .vidioc_reqbufs = vidioc_reqbufs,
1788 .vidioc_querybuf = vidioc_querybuf,
1789 .vidioc_qbuf = vidioc_qbuf,
1790 .vidioc_dqbuf = vidioc_dqbuf,
1791 .vidioc_streamon = vidioc_streamon,
1792 .vidioc_streamoff = vidioc_streamoff,
1793};
1794
1795static const struct v4l2_file_operations omap_vout_fops = {
1796 .owner = THIS_MODULE,
94f3f48f 1797 .poll = omap_vout_poll,
5c7ab634
VH		 1798 .unlocked_ioctl = video_ioctl2,
1799 .mmap = omap_vout_mmap,
1800 .open = omap_vout_open,
1801 .release = omap_vout_release,
1802};
1803
1804/* Init functions used during driver initialization */
1805/* Initial setup of video_data */
1806static int __init omap_vout_setup_video_data(struct omap_vout_device *vout)
1807{
1808 struct video_device *vfd;
1809 struct v4l2_pix_format *pix;
d629f03f
AT		 1810 struct omap_overlay *ovl = vout->vid_info.overlays[0];
1811 struct omap_dss_device *display = ovl->get_device(ovl);
77430f03 1812 struct v4l2_ctrl_handler *hdl;
5c7ab634
VH		 1813
1814 /* set the default pix */
1815 pix = &vout->pix;
1816
1817 /* Set the default picture of QVGA */
1818 pix->width = QQVGA_WIDTH;
1819 pix->height = QQVGA_HEIGHT;
1820
1821 /* Default pixel format is RGB 5-6-5 */
1822 pix->pixelformat = V4L2_PIX_FMT_RGB565;
1823 pix->field = V4L2_FIELD_ANY;
1824 pix->bytesperline = pix->width * 2;
1825 pix->sizeimage = pix->bytesperline * pix->height;
5c7ab634
VH		 1826 pix->colorspace = V4L2_COLORSPACE_JPEG;
1827
1828 vout->bpp = RGB565_BPP;
1829 vout->fbuf.fmt.width = display->panel.timings.x_res;
1830 vout->fbuf.fmt.height = display->panel.timings.y_res;
1831
1832 /* Set the data structures for the overlay parameters*/
1833 vout->win.global_alpha = 255;
1834 vout->fbuf.flags = 0;
1835 vout->fbuf.capability = V4L2_FBUF_CAP_LOCAL_ALPHA |
1836 V4L2_FBUF_CAP_SRC_CHROMAKEY | V4L2_FBUF_CAP_CHROMAKEY;
1837 vout->win.chromakey = 0;
1838
1839 omap_vout_new_format(pix, &vout->fbuf, &vout->crop, &vout->win);
1840
77430f03
HV		 1841 hdl = &vout->ctrl_handler;
1842 v4l2_ctrl_handler_init(hdl, 3);
1843 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1844 V4L2_CID_ROTATE, 0, 270, 90, 0);
1845 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1846 V4L2_CID_BG_COLOR, 0, 0xffffff, 1, 0);
1847 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1848 V4L2_CID_VFLIP, 0, 1, 1, 0);
1849 if (hdl->error)
1850 return hdl->error;
1851
5c7ab634 1852 vout->rotation = 0;
160ac0ba 1853 vout->mirror = false;
445e258f 1854 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB)
1855 vout->vrfb_bpp = 2;
5c7ab634 1856
5c7ab634
VH		 1857 /* initialize the video_device struct */
1858 vfd = vout->vfd = video_device_alloc();
1859
1860 if (!vfd) {
1861 printk(KERN_ERR VOUT_NAME ": could not allocate"
1862 " video device struct\n");
77430f03 1863 v4l2_ctrl_handler_free(hdl);
5c7ab634
VH		 1864 return -ENOMEM;
1865 }
77430f03 1866 vfd->ctrl_handler = hdl;
5c7ab634
VH		 1867 vfd->release = video_device_release;
1868 vfd->ioctl_ops = &vout_ioctl_ops;
1869
1870 strlcpy(vfd->name, VOUT_NAME, sizeof(vfd->name));
1871
5c7ab634
VH		 1872 vfd->fops = &omap_vout_fops;
1873 vfd->v4l2_dev = &vout->vid_dev->v4l2_dev;
954f340f 1874 vfd->vfl_dir = VFL_DIR_TX;
5c7ab634
VH		 1875 mutex_init(&vout->lock);
1876
1877 vfd->minor = -1;
1878 return 0;
1879
1880}
1881
1882/* Setup video buffers */
1883static int __init omap_vout_setup_video_bufs(struct platform_device *pdev,
1884 int vid_num)
1885{
1886 u32 numbuffers;
445e258f 1887 int ret = 0, i;
1888 struct omapvideo_info *ovid;
5c7ab634 1889 struct omap_vout_device *vout;
5c7ab634
VH		 1890 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
1891 struct omap2video_device *vid_dev =
1892 container_of(v4l2_dev, struct omap2video_device, v4l2_dev);
1893
1894 vout = vid_dev->vouts[vid_num];
445e258f 1895 ovid = &vout->vid_info;
5c7ab634
VH		 1896
1897 numbuffers = (vid_num == 0) ? video1_numbuffers : video2_numbuffers;
1898 vout->buffer_size = (vid_num == 0) ? video1_bufsize : video2_bufsize;
1899 dev_info(&pdev->dev, "Buffer Size = %d\n", vout->buffer_size);
1900
1901 for (i = 0; i < numbuffers; i++) {
1902 vout->buf_virt_addr[i] =
1903 omap_vout_alloc_buffer(vout->buffer_size,
1904 (u32 *) &vout->buf_phy_addr[i]);
1905 if (!vout->buf_virt_addr[i]) {
1906 numbuffers = i;
1907 ret = -ENOMEM;
1908 goto free_buffers;
1909 }
1910 }
1911
5c7ab634
VH		 1912 vout->cropped_offset = 0;
1913
445e258f 1914 if (ovid->rotation_type == VOUT_ROT_VRFB) {
ac0b2b30 1915 bool static_vrfb_allocation = (vid_num == 0) ?
445e258f 1916 vid1_static_vrfb_alloc : vid2_static_vrfb_alloc;
1917 ret = omap_vout_setup_vrfb_bufs(pdev, vid_num,
1918 static_vrfb_allocation);
5c7ab634 1919 }
5c7ab634 1920
445e258f 1921 return ret;
5c7ab634
VH		 1922
1923free_buffers:
1924 for (i = 0; i < numbuffers; i++) {
1925 omap_vout_free_buffer(vout->buf_virt_addr[i],
1926 vout->buffer_size);
1927 vout->buf_virt_addr[i] = 0;
1928 vout->buf_phy_addr[i] = 0;
1929 }
1930 return ret;
1931
1932}
1933
1934/* Create video out devices */
1935static int __init omap_vout_create_video_devices(struct platform_device *pdev)
1936{
1937 int ret = 0, k;
1938 struct omap_vout_device *vout;
1939 struct video_device *vfd = NULL;
1940 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
1941 struct omap2video_device *vid_dev = container_of(v4l2_dev,
1942 struct omap2video_device, v4l2_dev);
1943
1944 for (k = 0; k < pdev->num_resources; k++) {
1945
2ef17c9f 1946 vout = kzalloc(sizeof(struct omap_vout_device), GFP_KERNEL);
5c7ab634
VH		 1947 if (!vout) {
1948 dev_err(&pdev->dev, ": could not allocate memory\n");
1949 return -ENOMEM;
1950 }
5c7ab634
VH		 1951
1952 vout->vid = k;
1953 vid_dev->vouts[k] = vout;
1954 vout->vid_dev = vid_dev;
1955 /* Select video2 if only 1 overlay is controlled by V4L2 */
1956 if (pdev->num_resources == 1)
1957 vout->vid_info.overlays[0] = vid_dev->overlays[k + 2];
1958 else
1959 /* Else select video1 and video2 one by one. */
1960 vout->vid_info.overlays[0] = vid_dev->overlays[k + 1];
1961 vout->vid_info.num_overlays = 1;
1962 vout->vid_info.id = k + 1;
1963
445e258f 1964 /* Set VRFB as rotation_type for omap2 and omap3 */
950e2fb4 1965 if (omap_vout_dss_omap24xx() || omap_vout_dss_omap34xx())
445e258f 1966 vout->vid_info.rotation_type = VOUT_ROT_VRFB;
1967
5c7ab634
VH		 1968 /* Setup the default configuration for the video devices
1969 */
1970 if (omap_vout_setup_video_data(vout) != 0) {
1971 ret = -ENOMEM;
1972 goto error;
1973 }
1974
1975 /* Allocate default number of buffers for the video streaming
1976 * and reserve the VRFB space for rotation
1977 */
1978 if (omap_vout_setup_video_bufs(pdev, k) != 0) {
1979 ret = -ENOMEM;
1980 goto error1;
1981 }
1982
1983 /* Register the Video device with V4L2
1984 */
1985 vfd = vout->vfd;
8f3a307b 1986 if (video_register_device(vfd, VFL_TYPE_GRABBER, -1) < 0) {
5c7ab634
VH		 1987 dev_err(&pdev->dev, ": Could not register "
1988 "Video for Linux device\n");
1989 vfd->minor = -1;
1990 ret = -ENODEV;
1991 goto error2;
1992 }
1993 video_set_drvdata(vfd, vout);
1994
32d640de
AT		 1995 dev_info(&pdev->dev, ": registered and initialized"
1996 " video device %d\n", vfd->minor);
1997 if (k == (pdev->num_resources - 1))
1998 return 0;
5c7ab634 1999
32d640de 2000 continue;
5c7ab634 2001error2:
445e258f 2002 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB)
2003 omap_vout_release_vrfb(vout);
5c7ab634
VH		 2004 omap_vout_free_buffers(vout);
2005error1:
2006 video_device_release(vfd);
2007error:
2008 kfree(vout);
2009 return ret;
5c7ab634
VH		 2010 }
2011
2012 return -ENODEV;
2013}
2014/* Driver functions */
2015static void omap_vout_cleanup_device(struct omap_vout_device *vout)
2016{
2017 struct video_device *vfd;
445e258f 2018 struct omapvideo_info *ovid;
5c7ab634
VH		 2019
2020 if (!vout)
2021 return;
2022
2023 vfd = vout->vfd;
445e258f 2024 ovid = &vout->vid_info;
5c7ab634
VH		 2025 if (vfd) {
2026 if (!video_is_registered(vfd)) {
2027 /*
2028 * The device was never registered, so release the
2029 * video_device struct directly.
2030 */
2031 video_device_release(vfd);
2032 } else {
2033 /*
2034 * The unregister function will release the video_device
2035 * struct as well as unregistering it.
2036 */
2037 video_unregister_device(vfd);
2038 }
2039 }
77430f03 2040 v4l2_ctrl_handler_free(&vout->ctrl_handler);
445e258f 2041 if (ovid->rotation_type == VOUT_ROT_VRFB) {
2042 omap_vout_release_vrfb(vout);
2043 /* Free the VRFB buffer if allocated
2044 * init time
2045 */
2046 if (vout->vrfb_static_allocation)
2047 omap_vout_free_vrfb_buffers(vout);
2048 }
5c7ab634 2049 omap_vout_free_buffers(vout);
5c7ab634
VH		 2050
2051 kfree(vout);
2052}
2053
2054static int omap_vout_remove(struct platform_device *pdev)
2055{
2056 int k;
2057 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
2058 struct omap2video_device *vid_dev = container_of(v4l2_dev, struct
2059 omap2video_device, v4l2_dev);
2060
2061 v4l2_device_unregister(v4l2_dev);
2062 for (k = 0; k < pdev->num_resources; k++)
2063 omap_vout_cleanup_device(vid_dev->vouts[k]);
2064
2065 for (k = 0; k < vid_dev->num_displays; k++) {
2066 if (vid_dev->displays[k]->state != OMAP_DSS_DISPLAY_DISABLED)
5ba9bb0e 2067 vid_dev->displays[k]->driver->disable(vid_dev->displays[k]);
5c7ab634
VH		 2068
2069 omap_dss_put_device(vid_dev->displays[k]);
2070 }
2071 kfree(vid_dev);
2072 return 0;
2073}
2074
2075static int __init omap_vout_probe(struct platform_device *pdev)
2076{
2077 int ret = 0, i;
2078 struct omap_overlay *ovl;
2079 struct omap_dss_device *dssdev = NULL;
2080 struct omap_dss_device *def_display;
2081 struct omap2video_device *vid_dev = NULL;
2082
591a0ac7
TV		 2083 if (omapdss_is_initialized() == false)
2084 return -EPROBE_DEFER;
2085
a9ee9f08
TV		 2086 ret = omapdss_compat_init();
2087 if (ret) {
2088 dev_err(&pdev->dev, "failed to init dss\n");
2089 return ret;
2090 }
2091
5c7ab634
VH		 2092 if (pdev->num_resources == 0) {
2093 dev_err(&pdev->dev, "probed for an unknown device\n");
a9ee9f08
TV		 2094 ret = -ENODEV;
2095 goto err_dss_init;
5c7ab634
VH		 2096 }
2097
2098 vid_dev = kzalloc(sizeof(struct omap2video_device), GFP_KERNEL);
a9ee9f08
TV		 2099 if (vid_dev == NULL) {
2100 ret = -ENOMEM;
2101 goto err_dss_init;
2102 }
5c7ab634
VH		 2103
2104 vid_dev->num_displays = 0;
2105 for_each_dss_dev(dssdev) {
2106 omap_dss_get_device(dssdev);
71c7a972
TV		 2107
2108 if (!dssdev->driver) {
2109 dev_warn(&pdev->dev, "no driver for display: %s\n",
2110 dssdev->name);
2111 omap_dss_put_device(dssdev);
2112 continue;
2113 }
2114
5c7ab634
VH		 2115 vid_dev->displays[vid_dev->num_displays++] = dssdev;
2116 }
2117
2118 if (vid_dev->num_displays == 0) {
2119 dev_err(&pdev->dev, "no displays\n");
2120 ret = -EINVAL;
2121 goto probe_err0;
2122 }
2123
2124 vid_dev->num_overlays = omap_dss_get_num_overlays();
2125 for (i = 0; i < vid_dev->num_overlays; i++)
2126 vid_dev->overlays[i] = omap_dss_get_overlay(i);
2127
2128 vid_dev->num_managers = omap_dss_get_num_overlay_managers();
2129 for (i = 0; i < vid_dev->num_managers; i++)
2130 vid_dev->managers[i] = omap_dss_get_overlay_manager(i);
2131
2132 /* Get the Video1 overlay and video2 overlay.
2133 * Setup the Display attached to that overlays
2134 */
2135 for (i = 1; i < vid_dev->num_overlays; i++) {
2136 ovl = omap_dss_get_overlay(i);
d629f03f
AT		 2137 dssdev = ovl->get_device(ovl);
2138
2139 if (dssdev) {
2140 def_display = dssdev;
5c7ab634
VH		 2141 } else {
2142 dev_warn(&pdev->dev, "cannot find display\n");
2143 def_display = NULL;
2144 }
2145 if (def_display) {
5ba9bb0e
VH		 2146 struct omap_dss_driver *dssdrv = def_display->driver;
2147
2148 ret = dssdrv->enable(def_display);
5c7ab634
VH		 2149 if (ret) {
2150 /* Here we are not considering a error
2151 * as display may be enabled by frame
2152 * buffer driver
2153 */
2154 dev_warn(&pdev->dev,
2155 "'%s' Display already enabled\n",
2156 def_display->name);
2157 }
5c7ab634
VH		 2158 }
2159 }
2160
2161 if (v4l2_device_register(&pdev->dev, &vid_dev->v4l2_dev) < 0) {
2162 dev_err(&pdev->dev, "v4l2_device_register failed\n");
2163 ret = -ENODEV;
2164 goto probe_err1;
2165 }
2166
2167 ret = omap_vout_create_video_devices(pdev);
2168 if (ret)
2169 goto probe_err2;
2170
2171 for (i = 0; i < vid_dev->num_displays; i++) {
2172 struct omap_dss_device *display = vid_dev->displays[i];
2173
5ba9bb0e
VH		 2174 if (display->driver->update)
2175 display->driver->update(display, 0, 0,
5c7ab634
VH		 2176 display->panel.timings.x_res,
2177 display->panel.timings.y_res);
2178 }
2179 return 0;
2180
2181probe_err2:
2182 v4l2_device_unregister(&vid_dev->v4l2_dev);
2183probe_err1:
2184 for (i = 1; i < vid_dev->num_overlays; i++) {
2185 def_display = NULL;
2186 ovl = omap_dss_get_overlay(i);
d629f03f
AT		 2187 dssdev = ovl->get_device(ovl);
2188
2189 if (dssdev)
2190 def_display = dssdev;
5c7ab634 2191
5ba9bb0e
VH		 2192 if (def_display && def_display->driver)
2193 def_display->driver->disable(def_display);
5c7ab634
VH		 2194 }
2195probe_err0:
2196 kfree(vid_dev);
a9ee9f08
TV		 2197err_dss_init:
2198 omapdss_compat_uninit();
5c7ab634
VH		 2199 return ret;
2200}
2201
2202static struct platform_driver omap_vout_driver = {
2203 .driver = {
2204 .name = VOUT_NAME,
2205 },
5c7ab634
VH		 2206 .remove = omap_vout_remove,
2207};
2208
2209static int __init omap_vout_init(void)
2210{
93596ef7 2211 if (platform_driver_probe(&omap_vout_driver, omap_vout_probe) != 0) {
5c7ab634
VH		 2212 printk(KERN_ERR VOUT_NAME ":Could not register Video driver\n");
2213 return -EINVAL;
2214 }
2215 return 0;
2216}
2217
2218static void omap_vout_cleanup(void)
2219{
2220 platform_driver_unregister(&omap_vout_driver);
2221}
2222
2223late_initcall(omap_vout_init);
2224module_exit(omap_vout_cleanup);
Linux kernel - Deliverables
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