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f3af9572 LP |
1 | /* |
2 | * vsp1_drm.c -- R-Car VSP1 DRM API | |
3 | * | |
4 | * Copyright (C) 2015 Renesas Electronics Corporation | |
5 | * | |
6 | * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com) | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | */ | |
13 | ||
14 | #include <linux/device.h> | |
15 | #include <linux/slab.h> | |
f3af9572 LP |
16 | |
17 | #include <media/media-entity.h> | |
18 | #include <media/v4l2-subdev.h> | |
c1741af7 | 19 | #include <media/vsp1.h> |
f3af9572 LP |
20 | |
21 | #include "vsp1.h" | |
22 | #include "vsp1_bru.h" | |
1517b039 | 23 | #include "vsp1_dl.h" |
f3af9572 LP |
24 | #include "vsp1_drm.h" |
25 | #include "vsp1_lif.h" | |
26 | #include "vsp1_pipe.h" | |
27 | #include "vsp1_rwpf.h" | |
28 | ||
f3af9572 LP |
29 | /* ----------------------------------------------------------------------------- |
30 | * DU Driver API | |
31 | */ | |
32 | ||
33 | int vsp1_du_init(struct device *dev) | |
34 | { | |
35 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
36 | ||
37 | if (!vsp1) | |
38 | return -EPROBE_DEFER; | |
39 | ||
40 | return 0; | |
41 | } | |
42 | EXPORT_SYMBOL_GPL(vsp1_du_init); | |
43 | ||
44 | /** | |
45 | * vsp1_du_setup_lif - Setup the output part of the VSP pipeline | |
46 | * @dev: the VSP device | |
47 | * @width: output frame width in pixels | |
48 | * @height: output frame height in pixels | |
49 | * | |
50 | * Configure the output part of VSP DRM pipeline for the given frame @width and | |
51 | * @height. This sets up formats on the BRU source pad, the WPF0 sink and source | |
52 | * pads, and the LIF sink pad. | |
53 | * | |
54 | * As the media bus code on the BRU source pad is conditioned by the | |
55 | * configuration of the BRU sink 0 pad, we also set up the formats on all BRU | |
56 | * sinks, even if the configuration will be overwritten later by | |
57 | * vsp1_du_setup_rpf(). This ensures that the BRU configuration is set to a well | |
58 | * defined state. | |
59 | * | |
60 | * Return 0 on success or a negative error code on failure. | |
61 | */ | |
62 | int vsp1_du_setup_lif(struct device *dev, unsigned int width, | |
63 | unsigned int height) | |
64 | { | |
65 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
66 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
67 | struct vsp1_bru *bru = vsp1->bru; | |
68 | struct v4l2_subdev_format format; | |
69 | unsigned int i; | |
70 | int ret; | |
71 | ||
72 | dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n", | |
73 | __func__, width, height); | |
74 | ||
75 | if (width == 0 || height == 0) { | |
76 | /* Zero width or height means the CRTC is being disabled, stop | |
77 | * the pipeline and turn the light off. | |
78 | */ | |
79 | ret = vsp1_pipeline_stop(pipe); | |
80 | if (ret == -ETIMEDOUT) | |
81 | dev_err(vsp1->dev, "DRM pipeline stop timeout\n"); | |
82 | ||
83 | media_entity_pipeline_stop(&pipe->output->entity.subdev.entity); | |
84 | ||
85 | for (i = 0; i < bru->entity.source_pad; ++i) { | |
86 | bru->inputs[i].rpf = NULL; | |
87 | pipe->inputs[i] = NULL; | |
88 | } | |
89 | ||
90 | pipe->num_inputs = 0; | |
91 | ||
92 | vsp1_device_put(vsp1); | |
93 | ||
94 | dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__); | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
1517b039 TS |
99 | vsp1_dl_reset(vsp1->drm->dl); |
100 | ||
f3af9572 LP |
101 | /* Configure the format at the BRU sinks and propagate it through the |
102 | * pipeline. | |
103 | */ | |
104 | memset(&format, 0, sizeof(format)); | |
105 | format.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
106 | ||
107 | for (i = 0; i < bru->entity.source_pad; ++i) { | |
108 | format.pad = i; | |
109 | ||
110 | format.format.width = width; | |
111 | format.format.height = height; | |
112 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
113 | format.format.field = V4L2_FIELD_NONE; | |
114 | ||
115 | ret = v4l2_subdev_call(&bru->entity.subdev, pad, | |
116 | set_fmt, NULL, &format); | |
117 | if (ret < 0) | |
118 | return ret; | |
119 | ||
120 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
121 | __func__, format.format.width, format.format.height, | |
122 | format.format.code, i); | |
123 | } | |
124 | ||
125 | format.pad = bru->entity.source_pad; | |
126 | format.format.width = width; | |
127 | format.format.height = height; | |
128 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
129 | format.format.field = V4L2_FIELD_NONE; | |
130 | ||
131 | ret = v4l2_subdev_call(&bru->entity.subdev, pad, set_fmt, NULL, | |
132 | &format); | |
133 | if (ret < 0) | |
134 | return ret; | |
135 | ||
136 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
137 | __func__, format.format.width, format.format.height, | |
138 | format.format.code, i); | |
139 | ||
140 | format.pad = RWPF_PAD_SINK; | |
141 | ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, set_fmt, NULL, | |
142 | &format); | |
143 | if (ret < 0) | |
144 | return ret; | |
145 | ||
146 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF0 sink\n", | |
147 | __func__, format.format.width, format.format.height, | |
148 | format.format.code); | |
149 | ||
150 | format.pad = RWPF_PAD_SOURCE; | |
151 | ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, get_fmt, NULL, | |
152 | &format); | |
153 | if (ret < 0) | |
154 | return ret; | |
155 | ||
156 | dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF0 source\n", | |
157 | __func__, format.format.width, format.format.height, | |
158 | format.format.code); | |
159 | ||
160 | format.pad = LIF_PAD_SINK; | |
161 | ret = v4l2_subdev_call(&vsp1->lif->entity.subdev, pad, set_fmt, NULL, | |
162 | &format); | |
163 | if (ret < 0) | |
164 | return ret; | |
165 | ||
166 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF sink\n", | |
167 | __func__, format.format.width, format.format.height, | |
168 | format.format.code); | |
169 | ||
170 | /* Verify that the format at the output of the pipeline matches the | |
171 | * requested frame size and media bus code. | |
172 | */ | |
173 | if (format.format.width != width || format.format.height != height || | |
174 | format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) { | |
175 | dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__); | |
176 | return -EPIPE; | |
177 | } | |
178 | ||
179 | /* Mark the pipeline as streaming and enable the VSP1. This will store | |
180 | * the pipeline pointer in all entities, which the s_stream handlers | |
181 | * will need. We don't start the entities themselves right at this point | |
182 | * as there's no plane configured yet, so we can't start processing | |
183 | * buffers. | |
184 | */ | |
185 | ret = vsp1_device_get(vsp1); | |
186 | if (ret < 0) | |
187 | return ret; | |
188 | ||
189 | ret = media_entity_pipeline_start(&pipe->output->entity.subdev.entity, | |
190 | &pipe->pipe); | |
191 | if (ret < 0) { | |
192 | dev_dbg(vsp1->dev, "%s: pipeline start failed\n", __func__); | |
193 | vsp1_device_put(vsp1); | |
194 | return ret; | |
195 | } | |
196 | ||
197 | dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__); | |
198 | ||
199 | return 0; | |
200 | } | |
201 | EXPORT_SYMBOL_GPL(vsp1_du_setup_lif); | |
202 | ||
203 | /** | |
7b4baddc LP |
204 | * vsp1_du_atomic_begin - Prepare for an atomic update |
205 | * @dev: the VSP device | |
206 | */ | |
207 | void vsp1_du_atomic_begin(struct device *dev) | |
208 | { | |
209 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
210 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
211 | unsigned long flags; | |
212 | ||
213 | spin_lock_irqsave(&pipe->irqlock, flags); | |
214 | ||
215 | vsp1->drm->num_inputs = pipe->num_inputs; | |
7b4baddc LP |
216 | |
217 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
1517b039 TS |
218 | |
219 | /* Prepare the display list. */ | |
220 | vsp1_dl_begin(vsp1->drm->dl); | |
7b4baddc LP |
221 | } |
222 | EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin); | |
223 | ||
224 | /** | |
225 | * vsp1_du_atomic_update - Setup one RPF input of the VSP pipeline | |
f3af9572 LP |
226 | * @dev: the VSP device |
227 | * @rpf_index: index of the RPF to setup (0-based) | |
228 | * @pixelformat: V4L2 pixel format for the RPF memory input | |
229 | * @pitch: number of bytes per line in the image stored in memory | |
230 | * @mem: DMA addresses of the memory buffers (one per plane) | |
231 | * @src: the source crop rectangle for the RPF | |
232 | * @dst: the destination compose rectangle for the BRU input | |
233 | * | |
234 | * Configure the VSP to perform composition of the image referenced by @mem | |
235 | * through RPF @rpf_index, using the @src crop rectangle and the @dst | |
236 | * composition rectangle. The Z-order is fixed with RPF 0 at the bottom. | |
237 | * | |
238 | * Image format as stored in memory is expressed as a V4L2 @pixelformat value. | |
239 | * As a special case, setting the pixel format to 0 will disable the RPF. The | |
240 | * @pitch, @mem, @src and @dst parameters are ignored in that case. Calling the | |
241 | * function on a disabled RPF is allowed. | |
242 | * | |
243 | * The memory pitch is configurable to allow for padding at end of lines, or | |
244 | * simple for images that extend beyond the crop rectangle boundaries. The | |
245 | * @pitch value is expressed in bytes and applies to all planes for multiplanar | |
246 | * formats. | |
247 | * | |
248 | * The source memory buffer is referenced by the DMA address of its planes in | |
249 | * the @mem array. Up to two planes are supported. The second plane DMA address | |
250 | * is ignored for formats using a single plane. | |
251 | * | |
252 | * This function isn't reentrant, the caller needs to serialize calls. | |
253 | * | |
254 | * TODO: Implement Z-order control by decoupling the RPF index from the BRU | |
255 | * input index. | |
256 | * | |
257 | * Return 0 on success or a negative error code on failure. | |
258 | */ | |
7b4baddc LP |
259 | int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index, |
260 | u32 pixelformat, unsigned int pitch, | |
261 | dma_addr_t mem[2], const struct v4l2_rect *src, | |
262 | const struct v4l2_rect *dst) | |
f3af9572 LP |
263 | { |
264 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
265 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
266 | const struct vsp1_format_info *fmtinfo; | |
267 | struct v4l2_subdev_selection sel; | |
268 | struct v4l2_subdev_format format; | |
269 | struct vsp1_rwpf_memory memory; | |
270 | struct vsp1_rwpf *rpf; | |
271 | unsigned long flags; | |
f3af9572 LP |
272 | int ret; |
273 | ||
5aa2eb3c | 274 | if (rpf_index >= vsp1->info->rpf_count) |
f3af9572 LP |
275 | return -EINVAL; |
276 | ||
277 | rpf = vsp1->rpf[rpf_index]; | |
278 | ||
279 | if (pixelformat == 0) { | |
280 | dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__, | |
281 | rpf_index); | |
282 | ||
283 | spin_lock_irqsave(&pipe->irqlock, flags); | |
284 | ||
285 | if (pipe->inputs[rpf_index]) { | |
286 | /* Remove the RPF from the pipeline if it was previously | |
287 | * enabled. | |
288 | */ | |
289 | vsp1->bru->inputs[rpf_index].rpf = NULL; | |
290 | pipe->inputs[rpf_index] = NULL; | |
291 | ||
7b4baddc | 292 | pipe->num_inputs--; |
f3af9572 LP |
293 | } |
294 | ||
295 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
296 | ||
f3af9572 LP |
297 | return 0; |
298 | } | |
299 | ||
300 | dev_dbg(vsp1->dev, | |
301 | "%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad }\n", | |
302 | __func__, rpf_index, | |
303 | src->left, src->top, src->width, src->height, | |
304 | dst->left, dst->top, dst->width, dst->height, | |
305 | pixelformat, pitch, &mem[0], &mem[1]); | |
306 | ||
307 | /* Set the stride at the RPF input. */ | |
308 | fmtinfo = vsp1_get_format_info(pixelformat); | |
309 | if (!fmtinfo) { | |
310 | dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n", | |
311 | pixelformat); | |
312 | return -EINVAL; | |
313 | } | |
314 | ||
315 | rpf->fmtinfo = fmtinfo; | |
316 | rpf->format.num_planes = fmtinfo->planes; | |
317 | rpf->format.plane_fmt[0].bytesperline = pitch; | |
318 | rpf->format.plane_fmt[1].bytesperline = pitch; | |
319 | ||
320 | /* Configure the format on the RPF sink pad and propagate it up to the | |
321 | * BRU sink pad. | |
322 | */ | |
323 | memset(&format, 0, sizeof(format)); | |
324 | format.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
325 | format.pad = RWPF_PAD_SINK; | |
326 | format.format.width = src->width + src->left; | |
327 | format.format.height = src->height + src->top; | |
328 | format.format.code = fmtinfo->mbus; | |
329 | format.format.field = V4L2_FIELD_NONE; | |
330 | ||
331 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL, | |
332 | &format); | |
333 | if (ret < 0) | |
334 | return ret; | |
335 | ||
336 | dev_dbg(vsp1->dev, | |
337 | "%s: set format %ux%u (%x) on RPF%u sink\n", | |
338 | __func__, format.format.width, format.format.height, | |
339 | format.format.code, rpf->entity.index); | |
340 | ||
341 | memset(&sel, 0, sizeof(sel)); | |
342 | sel.which = V4L2_SUBDEV_FORMAT_ACTIVE; | |
343 | sel.pad = RWPF_PAD_SINK; | |
344 | sel.target = V4L2_SEL_TGT_CROP; | |
345 | sel.r = *src; | |
346 | ||
347 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL, | |
348 | &sel); | |
349 | if (ret < 0) | |
350 | return ret; | |
351 | ||
352 | dev_dbg(vsp1->dev, | |
353 | "%s: set selection (%u,%u)/%ux%u on RPF%u sink\n", | |
354 | __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height, | |
355 | rpf->entity.index); | |
356 | ||
357 | /* RPF source, hardcode the format to ARGB8888 to turn on format | |
358 | * conversion if needed. | |
359 | */ | |
360 | format.pad = RWPF_PAD_SOURCE; | |
361 | ||
362 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, get_fmt, NULL, | |
363 | &format); | |
364 | if (ret < 0) | |
365 | return ret; | |
366 | ||
367 | dev_dbg(vsp1->dev, | |
368 | "%s: got format %ux%u (%x) on RPF%u source\n", | |
369 | __func__, format.format.width, format.format.height, | |
370 | format.format.code, rpf->entity.index); | |
371 | ||
372 | format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32; | |
373 | ||
374 | ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL, | |
375 | &format); | |
376 | if (ret < 0) | |
377 | return ret; | |
378 | ||
379 | /* BRU sink, propagate the format from the RPF source. */ | |
380 | format.pad = rpf->entity.index; | |
381 | ||
382 | ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL, | |
383 | &format); | |
384 | if (ret < 0) | |
385 | return ret; | |
386 | ||
387 | dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n", | |
388 | __func__, format.format.width, format.format.height, | |
389 | format.format.code, format.pad); | |
390 | ||
391 | sel.pad = rpf->entity.index; | |
392 | sel.target = V4L2_SEL_TGT_COMPOSE; | |
393 | sel.r = *dst; | |
394 | ||
395 | ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection, | |
396 | NULL, &sel); | |
397 | if (ret < 0) | |
398 | return ret; | |
399 | ||
400 | dev_dbg(vsp1->dev, | |
401 | "%s: set selection (%u,%u)/%ux%u on BRU pad %u\n", | |
402 | __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height, | |
403 | sel.pad); | |
404 | ||
405 | /* Store the compose rectangle coordinates in the RPF. */ | |
406 | rpf->location.left = dst->left; | |
407 | rpf->location.top = dst->top; | |
408 | ||
409 | /* Set the memory buffer address. */ | |
410 | memory.num_planes = fmtinfo->planes; | |
411 | memory.addr[0] = mem[0]; | |
412 | memory.addr[1] = mem[1]; | |
413 | ||
414 | rpf->ops->set_memory(rpf, &memory); | |
415 | ||
416 | spin_lock_irqsave(&pipe->irqlock, flags); | |
417 | ||
418 | /* If the RPF was previously stopped set the BRU input to the RPF and | |
419 | * store the RPF in the pipeline inputs array. | |
420 | */ | |
421 | if (!pipe->inputs[rpf->entity.index]) { | |
422 | vsp1->bru->inputs[rpf_index].rpf = rpf; | |
423 | pipe->inputs[rpf->entity.index] = rpf; | |
7b4baddc | 424 | pipe->num_inputs++; |
f3af9572 LP |
425 | } |
426 | ||
7b4baddc LP |
427 | spin_unlock_irqrestore(&pipe->irqlock, flags); |
428 | ||
429 | return 0; | |
430 | } | |
431 | EXPORT_SYMBOL_GPL(vsp1_du_atomic_update); | |
432 | ||
433 | /** | |
434 | * vsp1_du_atomic_flush - Commit an atomic update | |
435 | * @dev: the VSP device | |
436 | */ | |
437 | void vsp1_du_atomic_flush(struct device *dev) | |
438 | { | |
439 | struct vsp1_device *vsp1 = dev_get_drvdata(dev); | |
440 | struct vsp1_pipeline *pipe = &vsp1->drm->pipe; | |
1517b039 | 441 | struct vsp1_entity *entity; |
7b4baddc LP |
442 | unsigned long flags; |
443 | bool stop = false; | |
1517b039 | 444 | int ret; |
7b4baddc | 445 | |
1517b039 TS |
446 | list_for_each_entry(entity, &pipe->entities, list_pipe) { |
447 | /* Disconnect unused RPFs from the pipeline. */ | |
448 | if (entity->type == VSP1_ENTITY_RPF) { | |
449 | struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev); | |
450 | ||
451 | if (!pipe->inputs[rpf->entity.index]) { | |
452 | vsp1_mod_write(entity, entity->route->reg, | |
453 | VI6_DPR_NODE_UNUSED); | |
454 | continue; | |
455 | } | |
456 | } | |
457 | ||
458 | vsp1_entity_route_setup(entity); | |
459 | ||
460 | ret = v4l2_subdev_call(&entity->subdev, video, | |
461 | s_stream, 1); | |
462 | if (ret < 0) { | |
463 | dev_err(vsp1->dev, | |
464 | "DRM pipeline start failure on entity %s\n", | |
465 | entity->subdev.name); | |
466 | return; | |
467 | } | |
468 | } | |
469 | ||
470 | vsp1_dl_commit(vsp1->drm->dl); | |
7b4baddc | 471 | |
1517b039 | 472 | spin_lock_irqsave(&pipe->irqlock, flags); |
7b4baddc LP |
473 | |
474 | /* Start or stop the pipeline if needed. */ | |
1517b039 TS |
475 | if (!vsp1->drm->num_inputs && pipe->num_inputs) { |
476 | vsp1_write(vsp1, VI6_DISP_IRQ_STA, 0); | |
477 | vsp1_write(vsp1, VI6_DISP_IRQ_ENB, VI6_DISP_IRQ_ENB_DSTE); | |
478 | vsp1_pipeline_run(pipe); | |
479 | } else if (vsp1->drm->num_inputs && !pipe->num_inputs) { | |
7b4baddc | 480 | stop = true; |
1517b039 | 481 | } |
f3af9572 LP |
482 | |
483 | spin_unlock_irqrestore(&pipe->irqlock, flags); | |
484 | ||
1517b039 TS |
485 | if (stop) { |
486 | vsp1_write(vsp1, VI6_DISP_IRQ_ENB, 0); | |
7b4baddc | 487 | vsp1_pipeline_stop(pipe); |
1517b039 | 488 | } |
f3af9572 | 489 | } |
7b4baddc | 490 | EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush); |
f3af9572 LP |
491 | |
492 | /* ----------------------------------------------------------------------------- | |
493 | * Initialization | |
494 | */ | |
495 | ||
496 | int vsp1_drm_create_links(struct vsp1_device *vsp1) | |
497 | { | |
498 | const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE; | |
499 | unsigned int i; | |
500 | int ret; | |
501 | ||
502 | /* VSPD instances require a BRU to perform composition and a LIF to | |
503 | * output to the DU. | |
504 | */ | |
505 | if (!vsp1->bru || !vsp1->lif) | |
506 | return -ENXIO; | |
507 | ||
5aa2eb3c | 508 | for (i = 0; i < vsp1->info->rpf_count; ++i) { |
f3af9572 LP |
509 | struct vsp1_rwpf *rpf = vsp1->rpf[i]; |
510 | ||
511 | ret = media_create_pad_link(&rpf->entity.subdev.entity, | |
512 | RWPF_PAD_SOURCE, | |
513 | &vsp1->bru->entity.subdev.entity, | |
514 | i, flags); | |
515 | if (ret < 0) | |
516 | return ret; | |
517 | ||
518 | rpf->entity.sink = &vsp1->bru->entity.subdev.entity; | |
519 | rpf->entity.sink_pad = i; | |
520 | } | |
521 | ||
522 | ret = media_create_pad_link(&vsp1->bru->entity.subdev.entity, | |
523 | vsp1->bru->entity.source_pad, | |
524 | &vsp1->wpf[0]->entity.subdev.entity, | |
525 | RWPF_PAD_SINK, flags); | |
526 | if (ret < 0) | |
527 | return ret; | |
528 | ||
529 | vsp1->bru->entity.sink = &vsp1->wpf[0]->entity.subdev.entity; | |
530 | vsp1->bru->entity.sink_pad = RWPF_PAD_SINK; | |
531 | ||
532 | ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity, | |
533 | RWPF_PAD_SOURCE, | |
534 | &vsp1->lif->entity.subdev.entity, | |
535 | LIF_PAD_SINK, flags); | |
536 | if (ret < 0) | |
537 | return ret; | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
542 | int vsp1_drm_init(struct vsp1_device *vsp1) | |
543 | { | |
544 | struct vsp1_pipeline *pipe; | |
545 | unsigned int i; | |
546 | ||
547 | vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL); | |
548 | if (!vsp1->drm) | |
549 | return -ENOMEM; | |
550 | ||
1517b039 TS |
551 | vsp1->drm->dl = vsp1_dl_create(vsp1); |
552 | if (!vsp1->drm->dl) | |
553 | return -ENOMEM; | |
554 | ||
f3af9572 LP |
555 | pipe = &vsp1->drm->pipe; |
556 | ||
557 | vsp1_pipeline_init(pipe); | |
f3af9572 LP |
558 | |
559 | /* The DRM pipeline is static, add entities manually. */ | |
5aa2eb3c | 560 | for (i = 0; i < vsp1->info->rpf_count; ++i) { |
f3af9572 LP |
561 | struct vsp1_rwpf *input = vsp1->rpf[i]; |
562 | ||
563 | list_add_tail(&input->entity.list_pipe, &pipe->entities); | |
564 | } | |
565 | ||
566 | list_add_tail(&vsp1->bru->entity.list_pipe, &pipe->entities); | |
567 | list_add_tail(&vsp1->wpf[0]->entity.list_pipe, &pipe->entities); | |
568 | list_add_tail(&vsp1->lif->entity.list_pipe, &pipe->entities); | |
569 | ||
570 | pipe->bru = &vsp1->bru->entity; | |
571 | pipe->lif = &vsp1->lif->entity; | |
572 | pipe->output = vsp1->wpf[0]; | |
573 | ||
1517b039 TS |
574 | pipe->dl = vsp1->drm->dl; |
575 | ||
f3af9572 LP |
576 | return 0; |
577 | } | |
1517b039 TS |
578 | |
579 | void vsp1_drm_cleanup(struct vsp1_device *vsp1) | |
580 | { | |
581 | vsp1_dl_destroy(vsp1->drm->dl); | |
582 | } |