Merge remote-tracking branch 'lightnvm/for-next'
[deliverable/linux.git] / drivers / media / tuners / tda18271-fe.c
CommitLineData
5bea1cd3 1/*
6ca04de3 2 tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
5bea1cd3 3
59067f7e 4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
5bea1cd3
MK
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19*/
20
6ca04de3 21#include "tda18271-priv.h"
1bacb2df 22#include "tda8290.h"
5bea1cd3 23
36dba13b
MCC
24#include <linux/delay.h>
25#include <linux/videodev2.h>
26
b5f3e1e1 27int tda18271_debug;
54465b08 28module_param_named(debug, tda18271_debug, int, 0644);
0e1fab90 29MODULE_PARM_DESC(debug, "set debug level "
cf04d29c 30 "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
5bea1cd3 31
81016b49 32static int tda18271_cal_on_startup = -1;
0f96251e
MK
33module_param_named(cal, tda18271_cal_on_startup, int, 0644);
34MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
35
a4f263b5 36static DEFINE_MUTEX(tda18271_list_mutex);
f9e315a1 37static LIST_HEAD(hybrid_tuner_instance_list);
a4f263b5 38
5bea1cd3
MK
39/*---------------------------------------------------------------------*/
40
4240b460
MK
41static int tda18271_toggle_output(struct dvb_frontend *fe, int standby)
42{
43 struct tda18271_priv *priv = fe->tuner_priv;
44
45 int ret = tda18271_set_standby_mode(fe, standby ? 1 : 0,
46 priv->output_opt & TDA18271_OUTPUT_LT_OFF ? 1 : 0,
47 priv->output_opt & TDA18271_OUTPUT_XT_OFF ? 1 : 0);
48
49 if (tda_fail(ret))
50 goto fail;
51
52 tda_dbg("%s mode: xtal oscillator %s, slave tuner loop thru %s\n",
53 standby ? "standby" : "active",
54 priv->output_opt & TDA18271_OUTPUT_XT_OFF ? "off" : "on",
55 priv->output_opt & TDA18271_OUTPUT_LT_OFF ? "off" : "on");
56fail:
57 return ret;
58}
59
60/*---------------------------------------------------------------------*/
61
868f5ccd
MK
62static inline int charge_pump_source(struct dvb_frontend *fe, int force)
63{
64 struct tda18271_priv *priv = fe->tuner_priv;
65 return tda18271_charge_pump_source(fe,
66 (priv->role == TDA18271_SLAVE) ?
67 TDA18271_CAL_PLL :
68 TDA18271_MAIN_PLL, force);
69}
70
44e645c2
MK
71static inline void tda18271_set_if_notch(struct dvb_frontend *fe)
72{
73 struct tda18271_priv *priv = fe->tuner_priv;
74 unsigned char *regs = priv->tda18271_regs;
75
76 switch (priv->mode) {
77 case TDA18271_ANALOG:
78 regs[R_MPD] &= ~0x80; /* IF notch = 0 */
79 break;
80 case TDA18271_DIGITAL:
81 regs[R_MPD] |= 0x80; /* IF notch = 1 */
82 break;
83 }
84}
85
255b5113 86static int tda18271_channel_configuration(struct dvb_frontend *fe,
c293d0a7
MK
87 struct tda18271_std_map_item *map,
88 u32 freq, u32 bw)
255b5113
MK
89{
90 struct tda18271_priv *priv = fe->tuner_priv;
91 unsigned char *regs = priv->tda18271_regs;
31940e39 92 int ret;
255b5113
MK
93 u32 N;
94
95 /* update TV broadcast parameters */
96
97 /* set standard */
98 regs[R_EP3] &= ~0x1f; /* clear std bits */
7f7203df 99 regs[R_EP3] |= (map->agc_mode << 3) | map->std;
255b5113 100
51858d13
MK
101 if (priv->id == TDA18271HDC2) {
102 /* set rfagc to high speed mode */
103 regs[R_EP3] &= ~0x04;
104 }
40194b2b 105
255b5113
MK
106 /* set cal mode to normal */
107 regs[R_EP4] &= ~0x03;
108
44e645c2 109 /* update IF output level */
255b5113 110 regs[R_EP4] &= ~0x1c; /* clear if level bits */
14c74b23 111 regs[R_EP4] |= (map->if_lvl << 2);
255b5113 112
c293d0a7
MK
113 /* update FM_RFn */
114 regs[R_EP4] &= ~0x80;
115 regs[R_EP4] |= map->fm_rfn << 7;
255b5113 116
c0dc0c11
MK
117 /* update rf top / if top */
118 regs[R_EB22] = 0x00;
119 regs[R_EB22] |= map->rfagc_top;
31940e39 120 ret = tda18271_write_regs(fe, R_EB22, 1);
4bd5d107 121 if (tda_fail(ret))
31940e39 122 goto fail;
255b5113
MK
123
124 /* --------------------------------------------------------------- */
125
126 /* disable Power Level Indicator */
127 regs[R_EP1] |= 0x40;
128
7ae1ac4c
MK
129 /* make sure thermometer is off */
130 regs[R_TM] &= ~0x10;
131
255b5113
MK
132 /* frequency dependent parameters */
133
134 tda18271_calc_ir_measure(fe, &freq);
135
136 tda18271_calc_bp_filter(fe, &freq);
137
138 tda18271_calc_rf_band(fe, &freq);
139
140 tda18271_calc_gain_taper(fe, &freq);
141
142 /* --------------------------------------------------------------- */
143
144 /* dual tuner and agc1 extra configuration */
145
868f5ccd
MK
146 switch (priv->role) {
147 case TDA18271_MASTER:
148 regs[R_EB1] |= 0x04; /* main vco */
149 break;
150 case TDA18271_SLAVE:
151 regs[R_EB1] &= ~0x04; /* cal vco */
152 break;
153 }
255b5113
MK
154
155 /* agc1 always active */
156 regs[R_EB1] &= ~0x02;
157
158 /* agc1 has priority on agc2 */
159 regs[R_EB1] &= ~0x01;
160
31940e39 161 ret = tda18271_write_regs(fe, R_EB1, 1);
4bd5d107 162 if (tda_fail(ret))
31940e39 163 goto fail;
255b5113
MK
164
165 /* --------------------------------------------------------------- */
166
c293d0a7 167 N = map->if_freq * 1000 + freq;
255b5113 168
868f5ccd
MK
169 switch (priv->role) {
170 case TDA18271_MASTER:
171 tda18271_calc_main_pll(fe, N);
44e645c2 172 tda18271_set_if_notch(fe);
868f5ccd
MK
173 tda18271_write_regs(fe, R_MPD, 4);
174 break;
175 case TDA18271_SLAVE:
176 tda18271_calc_cal_pll(fe, N);
177 tda18271_write_regs(fe, R_CPD, 4);
178
179 regs[R_MPD] = regs[R_CPD] & 0x7f;
44e645c2 180 tda18271_set_if_notch(fe);
868f5ccd
MK
181 tda18271_write_regs(fe, R_MPD, 1);
182 break;
183 }
255b5113 184
31940e39 185 ret = tda18271_write_regs(fe, R_TM, 7);
4bd5d107 186 if (tda_fail(ret))
31940e39 187 goto fail;
255b5113 188
868f5ccd
MK
189 /* force charge pump source */
190 charge_pump_source(fe, 1);
255b5113
MK
191
192 msleep(1);
193
868f5ccd
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194 /* return pll to normal operation */
195 charge_pump_source(fe, 0);
255b5113 196
40194b2b
MK
197 msleep(20);
198
51858d13
MK
199 if (priv->id == TDA18271HDC2) {
200 /* set rfagc to normal speed mode */
201 if (map->fm_rfn)
202 regs[R_EP3] &= ~0x04;
203 else
204 regs[R_EP3] |= 0x04;
205 ret = tda18271_write_regs(fe, R_EP3, 1);
206 }
31940e39
MK
207fail:
208 return ret;
255b5113
MK
209}
210
211static int tda18271_read_thermometer(struct dvb_frontend *fe)
212{
213 struct tda18271_priv *priv = fe->tuner_priv;
214 unsigned char *regs = priv->tda18271_regs;
215 int tm;
216
217 /* switch thermometer on */
218 regs[R_TM] |= 0x10;
219 tda18271_write_regs(fe, R_TM, 1);
220
221 /* read thermometer info */
222 tda18271_read_regs(fe);
223
224 if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
225 (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
226
227 if ((regs[R_TM] & 0x20) == 0x20)
228 regs[R_TM] &= ~0x20;
229 else
230 regs[R_TM] |= 0x20;
231
232 tda18271_write_regs(fe, R_TM, 1);
233
234 msleep(10); /* temperature sensing */
235
236 /* read thermometer info */
237 tda18271_read_regs(fe);
238 }
239
240 tm = tda18271_lookup_thermometer(fe);
241
242 /* switch thermometer off */
243 regs[R_TM] &= ~0x10;
244 tda18271_write_regs(fe, R_TM, 1);
245
246 /* set CAL mode to normal */
247 regs[R_EP4] &= ~0x03;
248 tda18271_write_regs(fe, R_EP4, 1);
249
250 return tm;
251}
252
12afe378
MK
253/* ------------------------------------------------------------------ */
254
d1c53424
MK
255static int tda18271c2_rf_tracking_filters_correction(struct dvb_frontend *fe,
256 u32 freq)
255b5113
MK
257{
258 struct tda18271_priv *priv = fe->tuner_priv;
259 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
260 unsigned char *regs = priv->tda18271_regs;
3a6b49fe
MK
261 int i, ret;
262 u8 tm_current, dc_over_dt, rf_tab;
263 s32 rfcal_comp, approx;
255b5113
MK
264
265 /* power up */
20f42063 266 ret = tda18271_set_standby_mode(fe, 0, 0, 0);
4bd5d107 267 if (tda_fail(ret))
20f42063 268 goto fail;
255b5113
MK
269
270 /* read die current temperature */
271 tm_current = tda18271_read_thermometer(fe);
272
273 /* frequency dependent parameters */
274
275 tda18271_calc_rf_cal(fe, &freq);
276 rf_tab = regs[R_EB14];
277
278 i = tda18271_lookup_rf_band(fe, &freq, NULL);
4bd5d107
MK
279 if (tda_fail(i))
280 return i;
255b5113
MK
281
282 if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
3a6b49fe
MK
283 approx = map[i].rf_a1 * (s32)(freq / 1000 - map[i].rf1) +
284 map[i].rf_b1 + rf_tab;
255b5113 285 } else {
3a6b49fe
MK
286 approx = map[i].rf_a2 * (s32)(freq / 1000 - map[i].rf2) +
287 map[i].rf_b2 + rf_tab;
255b5113
MK
288 }
289
290 if (approx < 0)
291 approx = 0;
292 if (approx > 255)
293 approx = 255;
294
295 tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
296
297 /* calculate temperature compensation */
3a6b49fe 298 rfcal_comp = dc_over_dt * (s32)(tm_current - priv->tm_rfcal) / 1000;
255b5113 299
3a6b49fe 300 regs[R_EB14] = (unsigned char)(approx + rfcal_comp);
20f42063
MK
301 ret = tda18271_write_regs(fe, R_EB14, 1);
302fail:
303 return ret;
255b5113
MK
304}
305
306static int tda18271_por(struct dvb_frontend *fe)
307{
308 struct tda18271_priv *priv = fe->tuner_priv;
309 unsigned char *regs = priv->tda18271_regs;
24124f78 310 int ret;
255b5113
MK
311
312 /* power up detector 1 */
313 regs[R_EB12] &= ~0x20;
24124f78 314 ret = tda18271_write_regs(fe, R_EB12, 1);
4bd5d107 315 if (tda_fail(ret))
24124f78 316 goto fail;
255b5113
MK
317
318 regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
319 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
24124f78 320 ret = tda18271_write_regs(fe, R_EB18, 1);
4bd5d107 321 if (tda_fail(ret))
24124f78 322 goto fail;
255b5113
MK
323
324 regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
325
326 /* POR mode */
24124f78 327 ret = tda18271_set_standby_mode(fe, 1, 0, 0);
4bd5d107 328 if (tda_fail(ret))
24124f78 329 goto fail;
255b5113
MK
330
331 /* disable 1.5 MHz low pass filter */
332 regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
333 regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
24124f78
MK
334 ret = tda18271_write_regs(fe, R_EB21, 3);
335fail:
336 return ret;
255b5113
MK
337}
338
339static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
340{
341 struct tda18271_priv *priv = fe->tuner_priv;
342 unsigned char *regs = priv->tda18271_regs;
343 u32 N;
344
345 /* set CAL mode to normal */
346 regs[R_EP4] &= ~0x03;
347 tda18271_write_regs(fe, R_EP4, 1);
348
349 /* switch off agc1 */
350 regs[R_EP3] |= 0x40; /* sm_lt = 1 */
351
352 regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
353 tda18271_write_regs(fe, R_EB18, 1);
354
355 /* frequency dependent parameters */
356
357 tda18271_calc_bp_filter(fe, &freq);
358 tda18271_calc_gain_taper(fe, &freq);
359 tda18271_calc_rf_band(fe, &freq);
360 tda18271_calc_km(fe, &freq);
361
362 tda18271_write_regs(fe, R_EP1, 3);
363 tda18271_write_regs(fe, R_EB13, 1);
364
365 /* main pll charge pump source */
4efb0ca5 366 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
255b5113
MK
367
368 /* cal pll charge pump source */
4efb0ca5 369 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 1);
255b5113
MK
370
371 /* force dcdc converter to 0 V */
372 regs[R_EB14] = 0x00;
373 tda18271_write_regs(fe, R_EB14, 1);
374
375 /* disable plls lock */
376 regs[R_EB20] &= ~0x20;
377 tda18271_write_regs(fe, R_EB20, 1);
378
379 /* set CAL mode to RF tracking filter calibration */
380 regs[R_EP4] |= 0x03;
381 tda18271_write_regs(fe, R_EP4, 2);
382
383 /* --------------------------------------------------------------- */
384
385 /* set the internal calibration signal */
386 N = freq;
387
ae07d042
MK
388 tda18271_calc_cal_pll(fe, N);
389 tda18271_write_regs(fe, R_CPD, 4);
255b5113
MK
390
391 /* downconvert internal calibration */
392 N += 1000000;
393
394 tda18271_calc_main_pll(fe, N);
395 tda18271_write_regs(fe, R_MPD, 4);
396
397 msleep(5);
398
399 tda18271_write_regs(fe, R_EP2, 1);
400 tda18271_write_regs(fe, R_EP1, 1);
401 tda18271_write_regs(fe, R_EP2, 1);
402 tda18271_write_regs(fe, R_EP1, 1);
403
404 /* --------------------------------------------------------------- */
405
406 /* normal operation for the main pll */
4efb0ca5 407 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
255b5113
MK
408
409 /* normal operation for the cal pll */
4efb0ca5 410 tda18271_charge_pump_source(fe, TDA18271_CAL_PLL, 0);
255b5113 411
ae07d042 412 msleep(10); /* plls locking */
255b5113
MK
413
414 /* launch the rf tracking filters calibration */
415 regs[R_EB20] |= 0x20;
416 tda18271_write_regs(fe, R_EB20, 1);
417
418 msleep(60); /* calibration */
419
420 /* --------------------------------------------------------------- */
421
422 /* set CAL mode to normal */
423 regs[R_EP4] &= ~0x03;
424
425 /* switch on agc1 */
426 regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
427
428 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
429 tda18271_write_regs(fe, R_EB18, 1);
430
431 tda18271_write_regs(fe, R_EP3, 2);
432
433 /* synchronization */
434 tda18271_write_regs(fe, R_EP1, 1);
435
436 /* get calibration result */
437 tda18271_read_extended(fe);
438
439 return regs[R_EB14];
440}
441
442static int tda18271_powerscan(struct dvb_frontend *fe,
443 u32 *freq_in, u32 *freq_out)
444{
445 struct tda18271_priv *priv = fe->tuner_priv;
446 unsigned char *regs = priv->tda18271_regs;
24124f78 447 int sgn, bcal, count, wait, ret;
255b5113
MK
448 u8 cid_target;
449 u16 count_limit;
450 u32 freq;
451
452 freq = *freq_in;
453
454 tda18271_calc_rf_band(fe, &freq);
455 tda18271_calc_rf_cal(fe, &freq);
456 tda18271_calc_gain_taper(fe, &freq);
457 tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
458
459 tda18271_write_regs(fe, R_EP2, 1);
460 tda18271_write_regs(fe, R_EB14, 1);
461
462 /* downconvert frequency */
463 freq += 1000000;
464
465 tda18271_calc_main_pll(fe, freq);
466 tda18271_write_regs(fe, R_MPD, 4);
467
468 msleep(5); /* pll locking */
469
470 /* detection mode */
471 regs[R_EP4] &= ~0x03;
472 regs[R_EP4] |= 0x01;
473 tda18271_write_regs(fe, R_EP4, 1);
474
475 /* launch power detection measurement */
476 tda18271_write_regs(fe, R_EP2, 1);
477
478 /* read power detection info, stored in EB10 */
24124f78 479 ret = tda18271_read_extended(fe);
4bd5d107 480 if (tda_fail(ret))
24124f78 481 return ret;
255b5113
MK
482
483 /* algorithm initialization */
484 sgn = 1;
485 *freq_out = *freq_in;
486 bcal = 0;
487 count = 0;
488 wait = false;
489
490 while ((regs[R_EB10] & 0x3f) < cid_target) {
491 /* downconvert updated freq to 1 MHz */
492 freq = *freq_in + (sgn * count) + 1000000;
493
494 tda18271_calc_main_pll(fe, freq);
495 tda18271_write_regs(fe, R_MPD, 4);
496
497 if (wait) {
498 msleep(5); /* pll locking */
499 wait = false;
500 } else
501 udelay(100); /* pll locking */
502
503 /* launch power detection measurement */
504 tda18271_write_regs(fe, R_EP2, 1);
505
506 /* read power detection info, stored in EB10 */
24124f78 507 ret = tda18271_read_extended(fe);
4bd5d107 508 if (tda_fail(ret))
24124f78 509 return ret;
255b5113
MK
510
511 count += 200;
512
e7809a07 513 if (count <= count_limit)
255b5113
MK
514 continue;
515
516 if (sgn <= 0)
517 break;
518
519 sgn = -1 * sgn;
520 count = 200;
521 wait = true;
522 }
523
524 if ((regs[R_EB10] & 0x3f) >= cid_target) {
525 bcal = 1;
526 *freq_out = freq - 1000000;
527 } else
528 bcal = 0;
529
cf04d29c 530 tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
255b5113
MK
531 bcal, *freq_in, *freq_out, freq);
532
533 return bcal;
534}
535
536static int tda18271_powerscan_init(struct dvb_frontend *fe)
537{
538 struct tda18271_priv *priv = fe->tuner_priv;
539 unsigned char *regs = priv->tda18271_regs;
24124f78 540 int ret;
255b5113
MK
541
542 /* set standard to digital */
543 regs[R_EP3] &= ~0x1f; /* clear std bits */
544 regs[R_EP3] |= 0x12;
545
546 /* set cal mode to normal */
547 regs[R_EP4] &= ~0x03;
548
44e645c2 549 /* update IF output level */
255b5113
MK
550 regs[R_EP4] &= ~0x1c; /* clear if level bits */
551
24124f78 552 ret = tda18271_write_regs(fe, R_EP3, 2);
4bd5d107 553 if (tda_fail(ret))
24124f78 554 goto fail;
255b5113
MK
555
556 regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
24124f78 557 ret = tda18271_write_regs(fe, R_EB18, 1);
4bd5d107 558 if (tda_fail(ret))
24124f78 559 goto fail;
255b5113
MK
560
561 regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
562
563 /* 1.5 MHz low pass filter */
564 regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
565 regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
566
24124f78
MK
567 ret = tda18271_write_regs(fe, R_EB21, 3);
568fail:
569 return ret;
255b5113
MK
570}
571
572static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
573{
574 struct tda18271_priv *priv = fe->tuner_priv;
575 struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
576 unsigned char *regs = priv->tda18271_regs;
577 int bcal, rf, i;
3986bd11 578 s32 divisor, dividend;
255b5113
MK
579#define RF1 0
580#define RF2 1
581#define RF3 2
582 u32 rf_default[3];
583 u32 rf_freq[3];
381ad0ea
MK
584 s32 prog_cal[3];
585 s32 prog_tab[3];
255b5113
MK
586
587 i = tda18271_lookup_rf_band(fe, &freq, NULL);
588
4bd5d107 589 if (tda_fail(i))
255b5113
MK
590 return i;
591
592 rf_default[RF1] = 1000 * map[i].rf1_def;
593 rf_default[RF2] = 1000 * map[i].rf2_def;
594 rf_default[RF3] = 1000 * map[i].rf3_def;
595
596 for (rf = RF1; rf <= RF3; rf++) {
597 if (0 == rf_default[rf])
598 return 0;
cf04d29c 599 tda_cal("freq = %d, rf = %d\n", freq, rf);
255b5113
MK
600
601 /* look for optimized calibration frequency */
602 bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
4bd5d107 603 if (tda_fail(bcal))
24124f78 604 return bcal;
255b5113
MK
605
606 tda18271_calc_rf_cal(fe, &rf_freq[rf]);
381ad0ea 607 prog_tab[rf] = (s32)regs[R_EB14];
255b5113
MK
608
609 if (1 == bcal)
381ad0ea
MK
610 prog_cal[rf] =
611 (s32)tda18271_calibrate_rf(fe, rf_freq[rf]);
255b5113
MK
612 else
613 prog_cal[rf] = prog_tab[rf];
614
615 switch (rf) {
616 case RF1:
617 map[i].rf_a1 = 0;
381ad0ea 618 map[i].rf_b1 = (prog_cal[RF1] - prog_tab[RF1]);
255b5113
MK
619 map[i].rf1 = rf_freq[RF1] / 1000;
620 break;
621 case RF2:
381ad0ea
MK
622 dividend = (prog_cal[RF2] - prog_tab[RF2] -
623 prog_cal[RF1] + prog_tab[RF1]);
3986bd11
MK
624 divisor = (s32)(rf_freq[RF2] - rf_freq[RF1]) / 1000;
625 map[i].rf_a1 = (dividend / divisor);
255b5113
MK
626 map[i].rf2 = rf_freq[RF2] / 1000;
627 break;
628 case RF3:
381ad0ea
MK
629 dividend = (prog_cal[RF3] - prog_tab[RF3] -
630 prog_cal[RF2] + prog_tab[RF2]);
3986bd11
MK
631 divisor = (s32)(rf_freq[RF3] - rf_freq[RF2]) / 1000;
632 map[i].rf_a2 = (dividend / divisor);
381ad0ea 633 map[i].rf_b2 = (prog_cal[RF2] - prog_tab[RF2]);
255b5113
MK
634 map[i].rf3 = rf_freq[RF3] / 1000;
635 break;
636 default:
637 BUG();
638 }
639 }
640
641 return 0;
642}
643
09f83c4f 644static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
255b5113
MK
645{
646 struct tda18271_priv *priv = fe->tuner_priv;
647 unsigned int i;
24124f78 648 int ret;
255b5113 649
36dba13b 650 tda_info("performing RF tracking filter calibration\n");
255b5113
MK
651
652 /* wait for die temperature stabilization */
653 msleep(200);
654
24124f78 655 ret = tda18271_powerscan_init(fe);
4bd5d107 656 if (tda_fail(ret))
24124f78 657 goto fail;
255b5113
MK
658
659 /* rf band calibration */
c151c32f
MK
660 for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++) {
661 ret =
255b5113
MK
662 tda18271_rf_tracking_filters_init(fe, 1000 *
663 priv->rf_cal_state[i].rfmax);
4bd5d107 664 if (tda_fail(ret))
c151c32f
MK
665 goto fail;
666 }
255b5113 667
09f83c4f 668 priv->tm_rfcal = tda18271_read_thermometer(fe);
24124f78
MK
669fail:
670 return ret;
255b5113
MK
671}
672
673/* ------------------------------------------------------------------ */
674
12afe378 675static int tda18271c2_rf_cal_init(struct dvb_frontend *fe)
255b5113
MK
676{
677 struct tda18271_priv *priv = fe->tuner_priv;
839c6c96 678 unsigned char *regs = priv->tda18271_regs;
24124f78 679 int ret;
839c6c96
MK
680
681 /* test RF_CAL_OK to see if we need init */
682 if ((regs[R_EP1] & 0x10) == 0)
683 priv->cal_initialized = false;
255b5113
MK
684
685 if (priv->cal_initialized)
686 return 0;
687
24124f78 688 ret = tda18271_calc_rf_filter_curve(fe);
4bd5d107 689 if (tda_fail(ret))
24124f78 690 goto fail;
255b5113 691
24124f78 692 ret = tda18271_por(fe);
4bd5d107 693 if (tda_fail(ret))
24124f78 694 goto fail;
255b5113 695
36dba13b 696 tda_info("RF tracking filter calibration complete\n");
6bfa6657 697
255b5113 698 priv->cal_initialized = true;
c151c32f 699 goto end;
24124f78 700fail:
36dba13b 701 tda_info("RF tracking filter calibration failed!\n");
c151c32f 702end:
24124f78 703 return ret;
255b5113
MK
704}
705
4d2d42bc
MK
706static int tda18271c1_rf_tracking_filter_calibration(struct dvb_frontend *fe,
707 u32 freq, u32 bw)
5bea1cd3
MK
708{
709 struct tda18271_priv *priv = fe->tuner_priv;
710 unsigned char *regs = priv->tda18271_regs;
10ed0bf4 711 int ret;
fe0bf6d7 712 u32 N = 0;
5bea1cd3 713
255b5113 714 /* calculate bp filter */
b92bf0f6 715 tda18271_calc_bp_filter(fe, &freq);
5bea1cd3
MK
716 tda18271_write_regs(fe, R_EP1, 1);
717
718 regs[R_EB4] &= 0x07;
719 regs[R_EB4] |= 0x60;
720 tda18271_write_regs(fe, R_EB4, 1);
721
722 regs[R_EB7] = 0x60;
723 tda18271_write_regs(fe, R_EB7, 1);
724
725 regs[R_EB14] = 0x00;
726 tda18271_write_regs(fe, R_EB14, 1);
727
728 regs[R_EB20] = 0xcc;
729 tda18271_write_regs(fe, R_EB20, 1);
730
255b5113 731 /* set cal mode to RF tracking filter calibration */
26501a70 732 regs[R_EP4] |= 0x03;
5bea1cd3 733
255b5113 734 /* calculate cal pll */
5bea1cd3
MK
735
736 switch (priv->mode) {
737 case TDA18271_ANALOG:
738 N = freq - 1250000;
739 break;
740 case TDA18271_DIGITAL:
741 N = freq + bw / 2;
742 break;
743 }
744
fe0bf6d7 745 tda18271_calc_cal_pll(fe, N);
5bea1cd3 746
255b5113 747 /* calculate main pll */
5bea1cd3
MK
748
749 switch (priv->mode) {
750 case TDA18271_ANALOG:
751 N = freq - 250000;
752 break;
753 case TDA18271_DIGITAL:
754 N = freq + bw / 2 + 1000000;
755 break;
756 }
757
fe0bf6d7 758 tda18271_calc_main_pll(fe, N);
5bea1cd3 759
10ed0bf4 760 ret = tda18271_write_regs(fe, R_EP3, 11);
4bd5d107 761 if (tda_fail(ret))
10ed0bf4
MK
762 return ret;
763
5bea1cd3
MK
764 msleep(5); /* RF tracking filter calibration initialization */
765
255b5113 766 /* search for K,M,CO for RF calibration */
b92bf0f6 767 tda18271_calc_km(fe, &freq);
5bea1cd3
MK
768 tda18271_write_regs(fe, R_EB13, 1);
769
255b5113 770 /* search for rf band */
b92bf0f6 771 tda18271_calc_rf_band(fe, &freq);
5bea1cd3 772
255b5113 773 /* search for gain taper */
b92bf0f6 774 tda18271_calc_gain_taper(fe, &freq);
5bea1cd3
MK
775
776 tda18271_write_regs(fe, R_EP2, 1);
777 tda18271_write_regs(fe, R_EP1, 1);
778 tda18271_write_regs(fe, R_EP2, 1);
779 tda18271_write_regs(fe, R_EP1, 1);
780
781 regs[R_EB4] &= 0x07;
782 regs[R_EB4] |= 0x40;
783 tda18271_write_regs(fe, R_EB4, 1);
784
785 regs[R_EB7] = 0x40;
786 tda18271_write_regs(fe, R_EB7, 1);
4d2d42bc 787 msleep(10); /* pll locking */
5bea1cd3
MK
788
789 regs[R_EB20] = 0xec;
790 tda18271_write_regs(fe, R_EB20, 1);
791 msleep(60); /* RF tracking filter calibration completion */
792
793 regs[R_EP4] &= ~0x03; /* set cal mode to normal */
794 tda18271_write_regs(fe, R_EP4, 1);
795
796 tda18271_write_regs(fe, R_EP1, 1);
797
b92bf0f6
MK
798 /* RF tracking filter correction for VHF_Low band */
799 if (0 == tda18271_calc_rf_cal(fe, &freq))
5bea1cd3 800 tda18271_write_regs(fe, R_EB14, 1);
5bea1cd3 801
4d2d42bc
MK
802 return 0;
803}
804
d1c53424
MK
805/* ------------------------------------------------------------------ */
806
12afe378
MK
807static int tda18271_ir_cal_init(struct dvb_frontend *fe)
808{
809 struct tda18271_priv *priv = fe->tuner_priv;
810 unsigned char *regs = priv->tda18271_regs;
d35fccaf 811 int ret;
12afe378 812
d35fccaf 813 ret = tda18271_read_regs(fe);
4bd5d107 814 if (tda_fail(ret))
d35fccaf 815 goto fail;
12afe378
MK
816
817 /* test IR_CAL_OK to see if we need init */
818 if ((regs[R_EP1] & 0x08) == 0)
d35fccaf
MK
819 ret = tda18271_init_regs(fe);
820fail:
821 return ret;
12afe378
MK
822}
823
824static int tda18271_init(struct dvb_frontend *fe)
825{
826 struct tda18271_priv *priv = fe->tuner_priv;
d35fccaf 827 int ret;
12afe378
MK
828
829 mutex_lock(&priv->lock);
830
4240b460 831 /* full power up */
d35fccaf 832 ret = tda18271_set_standby_mode(fe, 0, 0, 0);
4bd5d107 833 if (tda_fail(ret))
d35fccaf 834 goto fail;
12afe378
MK
835
836 /* initialization */
d35fccaf 837 ret = tda18271_ir_cal_init(fe);
4bd5d107 838 if (tda_fail(ret))
d35fccaf 839 goto fail;
12afe378
MK
840
841 if (priv->id == TDA18271HDC2)
842 tda18271c2_rf_cal_init(fe);
d35fccaf 843fail:
12afe378
MK
844 mutex_unlock(&priv->lock);
845
d35fccaf 846 return ret;
12afe378
MK
847}
848
cc7e26d4
MK
849static int tda18271_sleep(struct dvb_frontend *fe)
850{
851 struct tda18271_priv *priv = fe->tuner_priv;
852 int ret;
853
854 mutex_lock(&priv->lock);
855
856 /* enter standby mode, with required output features enabled */
857 ret = tda18271_toggle_output(fe, 1);
858
859 mutex_unlock(&priv->lock);
860
861 return ret;
862}
863
adcc4b3e
MK
864/* ------------------------------------------------------------------ */
865
866static int tda18271_agc(struct dvb_frontend *fe)
867{
868 struct tda18271_priv *priv = fe->tuner_priv;
869 int ret = 0;
870
871 switch (priv->config) {
1bacb2df 872 case TDA8290_LNA_OFF:
ecda4273
MK
873 /* no external agc configuration required */
874 if (tda18271_debug & DBG_ADV)
875 tda_dbg("no agc configuration provided\n");
adcc4b3e 876 break;
1bacb2df 877 case TDA8290_LNA_ON_BRIDGE:
adcc4b3e
MK
878 /* switch with GPIO of saa713x */
879 tda_dbg("invoking callback\n");
880 if (fe->callback)
881 ret = fe->callback(priv->i2c_props.adap->algo_data,
882 DVB_FRONTEND_COMPONENT_TUNER,
883 TDA18271_CALLBACK_CMD_AGC_ENABLE,
884 priv->mode);
885 break;
1bacb2df
OZ
886 case TDA8290_LNA_GP0_HIGH_ON:
887 case TDA8290_LNA_GP0_HIGH_OFF:
adcc4b3e
MK
888 default:
889 /* n/a - currently not supported */
890 tda_err("unsupported configuration: %d\n", priv->config);
891 ret = -EINVAL;
892 break;
893 }
894 return ret;
895}
896
d1c53424 897static int tda18271_tune(struct dvb_frontend *fe,
c293d0a7 898 struct tda18271_std_map_item *map, u32 freq, u32 bw)
4d2d42bc
MK
899{
900 struct tda18271_priv *priv = fe->tuner_priv;
d35fccaf 901 int ret;
4d2d42bc 902
7f7203df
MK
903 tda_dbg("freq = %d, ifc = %d, bw = %d, agc_mode = %d, std = %d\n",
904 freq, map->if_freq, bw, map->agc_mode, map->std);
d1c53424 905
adcc4b3e
MK
906 ret = tda18271_agc(fe);
907 if (tda_fail(ret))
908 tda_warn("failed to configure agc\n");
909
d35fccaf 910 ret = tda18271_init(fe);
4bd5d107 911 if (tda_fail(ret))
d35fccaf 912 goto fail;
4d2d42bc
MK
913
914 mutex_lock(&priv->lock);
915
ccbac9bb
MK
916 switch (priv->id) {
917 case TDA18271HDC1:
d1c53424 918 tda18271c1_rf_tracking_filter_calibration(fe, freq, bw);
ccbac9bb
MK
919 break;
920 case TDA18271HDC2:
d1c53424 921 tda18271c2_rf_tracking_filters_correction(fe, freq);
ccbac9bb
MK
922 break;
923 }
31940e39 924 ret = tda18271_channel_configuration(fe, map, freq, bw);
d1c53424
MK
925
926 mutex_unlock(&priv->lock);
d35fccaf
MK
927fail:
928 return ret;
ccbac9bb
MK
929}
930
5bea1cd3
MK
931/* ------------------------------------------------------------------ */
932
14d24d14 933static int tda18271_set_params(struct dvb_frontend *fe)
5bea1cd3 934{
5ca1c94d
MCC
935 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
936 u32 delsys = c->delivery_system;
937 u32 bw = c->bandwidth_hz;
938 u32 freq = c->frequency;
5bea1cd3 939 struct tda18271_priv *priv = fe->tuner_priv;
f21e0d7f 940 struct tda18271_std_map *std_map = &priv->std;
c293d0a7 941 struct tda18271_std_map_item *map;
ccbac9bb 942 int ret;
5bea1cd3
MK
943
944 priv->mode = TDA18271_DIGITAL;
945
5ca1c94d
MCC
946 switch (delsys) {
947 case SYS_ATSC:
948 map = &std_map->atsc_6;
5bea1cd3 949 bw = 6000000;
5ca1c94d 950 break;
083b6b8a 951 case SYS_ISDBT:
5ca1c94d
MCC
952 case SYS_DVBT:
953 case SYS_DVBT2:
954 if (bw <= 6000000) {
c293d0a7 955 map = &std_map->dvbt_6;
5ca1c94d 956 } else if (bw <= 7000000) {
c293d0a7 957 map = &std_map->dvbt_7;
5ca1c94d 958 } else {
c293d0a7 959 map = &std_map->dvbt_8;
5bea1cd3 960 }
5ca1c94d
MCC
961 break;
962 case SYS_DVBC_ANNEX_B:
963 bw = 6000000;
964 /* falltrough */
965 case SYS_DVBC_ANNEX_A:
966 case SYS_DVBC_ANNEX_C:
967 if (bw <= 6000000) {
968 map = &std_map->qam_6;
969 } else if (bw <= 7000000) {
970 map = &std_map->qam_7;
5ca1c94d
MCC
971 } else {
972 map = &std_map->qam_8;
5ca1c94d
MCC
973 }
974 break;
975 default:
182519f4 976 tda_warn("modulation type not supported!\n");
5bea1cd3
MK
977 return -EINVAL;
978 }
979
ed73683f
MK
980 /* When tuning digital, the analog demod must be tri-stated */
981 if (fe->ops.analog_ops.standby)
982 fe->ops.analog_ops.standby(fe);
983
c293d0a7 984 ret = tda18271_tune(fe, map, freq, bw);
ccbac9bb 985
4bd5d107 986 if (tda_fail(ret))
ccbac9bb
MK
987 goto fail;
988
8c8ee113 989 priv->if_freq = map->if_freq;
ccbac9bb 990 priv->frequency = freq;
c6f56e7d 991 priv->bandwidth = bw;
ccbac9bb
MK
992fail:
993 return ret;
5bea1cd3
MK
994}
995
996static int tda18271_set_analog_params(struct dvb_frontend *fe,
997 struct analog_parameters *params)
998{
999 struct tda18271_priv *priv = fe->tuner_priv;
f21e0d7f 1000 struct tda18271_std_map *std_map = &priv->std;
c293d0a7 1001 struct tda18271_std_map_item *map;
5bea1cd3 1002 char *mode;
c293d0a7 1003 int ret;
4d831787
MK
1004 u32 freq = params->frequency * 125 *
1005 ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
5bea1cd3
MK
1006
1007 priv->mode = TDA18271_ANALOG;
1008
c353f42f 1009 if (params->mode == V4L2_TUNER_RADIO) {
c293d0a7 1010 map = &std_map->fm_radio;
c353f42f
MK
1011 mode = "fm";
1012 } else if (params->std & V4L2_STD_MN) {
c293d0a7 1013 map = &std_map->atv_mn;
5bea1cd3
MK
1014 mode = "MN";
1015 } else if (params->std & V4L2_STD_B) {
c293d0a7 1016 map = &std_map->atv_b;
5bea1cd3
MK
1017 mode = "B";
1018 } else if (params->std & V4L2_STD_GH) {
c293d0a7 1019 map = &std_map->atv_gh;
5bea1cd3
MK
1020 mode = "GH";
1021 } else if (params->std & V4L2_STD_PAL_I) {
c293d0a7 1022 map = &std_map->atv_i;
5bea1cd3
MK
1023 mode = "I";
1024 } else if (params->std & V4L2_STD_DK) {
c293d0a7 1025 map = &std_map->atv_dk;
5bea1cd3
MK
1026 mode = "DK";
1027 } else if (params->std & V4L2_STD_SECAM_L) {
c293d0a7 1028 map = &std_map->atv_l;
5bea1cd3
MK
1029 mode = "L";
1030 } else if (params->std & V4L2_STD_SECAM_LC) {
c293d0a7 1031 map = &std_map->atv_lc;
95af8a26 1032 mode = "L'";
5bea1cd3 1033 } else {
c293d0a7 1034 map = &std_map->atv_i;
5bea1cd3
MK
1035 mode = "xx";
1036 }
1037
182519f4 1038 tda_dbg("setting tda18271 to system %s\n", mode);
5bea1cd3 1039
c293d0a7 1040 ret = tda18271_tune(fe, map, freq, 0);
ccbac9bb 1041
4bd5d107 1042 if (tda_fail(ret))
ccbac9bb
MK
1043 goto fail;
1044
8c8ee113 1045 priv->if_freq = map->if_freq;
ccbac9bb
MK
1046 priv->frequency = freq;
1047 priv->bandwidth = 0;
1048fail:
1049 return ret;
5bea1cd3
MK
1050}
1051
1052static int tda18271_release(struct dvb_frontend *fe)
1053{
a4f263b5
MK
1054 struct tda18271_priv *priv = fe->tuner_priv;
1055
1056 mutex_lock(&tda18271_list_mutex);
1057
f9e315a1
MK
1058 if (priv)
1059 hybrid_tuner_release_state(priv);
a4f263b5 1060
a4f263b5
MK
1061 mutex_unlock(&tda18271_list_mutex);
1062
5bea1cd3 1063 fe->tuner_priv = NULL;
a4f263b5 1064
5bea1cd3
MK
1065 return 0;
1066}
1067
1068static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1069{
1070 struct tda18271_priv *priv = fe->tuner_priv;
1071 *frequency = priv->frequency;
1072 return 0;
1073}
1074
1075static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1076{
1077 struct tda18271_priv *priv = fe->tuner_priv;
1078 *bandwidth = priv->bandwidth;
1079 return 0;
1080}
1081
8c8ee113
MK
1082static int tda18271_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
1083{
1084 struct tda18271_priv *priv = fe->tuner_priv;
1085 *frequency = (u32)priv->if_freq * 1000;
1086 return 0;
1087}
1088
f21e0d7f
MK
1089/* ------------------------------------------------------------------ */
1090
1091#define tda18271_update_std(std_cfg, name) do { \
7f7203df 1092 if (map->std_cfg.if_freq + \
c735372f
MK
1093 map->std_cfg.agc_mode + map->std_cfg.std + \
1094 map->std_cfg.if_lvl + map->std_cfg.rfagc_top > 0) { \
f21e0d7f
MK
1095 tda_dbg("Using custom std config for %s\n", name); \
1096 memcpy(&std->std_cfg, &map->std_cfg, \
1097 sizeof(struct tda18271_std_map_item)); \
1098 } } while (0)
1099
1100#define tda18271_dump_std_item(std_cfg, name) do { \
c735372f
MK
1101 tda_dbg("(%s) if_freq = %d, agc_mode = %d, std = %d, " \
1102 "if_lvl = %d, rfagc_top = 0x%02x\n", \
7f7203df 1103 name, std->std_cfg.if_freq, \
c735372f
MK
1104 std->std_cfg.agc_mode, std->std_cfg.std, \
1105 std->std_cfg.if_lvl, std->std_cfg.rfagc_top); \
f21e0d7f
MK
1106 } while (0)
1107
1108static int tda18271_dump_std_map(struct dvb_frontend *fe)
1109{
1110 struct tda18271_priv *priv = fe->tuner_priv;
1111 struct tda18271_std_map *std = &priv->std;
1112
1113 tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
c735372f
MK
1114 tda18271_dump_std_item(fm_radio, " fm ");
1115 tda18271_dump_std_item(atv_b, "atv b ");
1116 tda18271_dump_std_item(atv_dk, "atv dk");
1117 tda18271_dump_std_item(atv_gh, "atv gh");
1118 tda18271_dump_std_item(atv_i, "atv i ");
1119 tda18271_dump_std_item(atv_l, "atv l ");
1120 tda18271_dump_std_item(atv_lc, "atv l'");
f21e0d7f
MK
1121 tda18271_dump_std_item(atv_mn, "atv mn");
1122 tda18271_dump_std_item(atsc_6, "atsc 6");
1123 tda18271_dump_std_item(dvbt_6, "dvbt 6");
1124 tda18271_dump_std_item(dvbt_7, "dvbt 7");
1125 tda18271_dump_std_item(dvbt_8, "dvbt 8");
c735372f 1126 tda18271_dump_std_item(qam_6, "qam 6 ");
4e791048 1127 tda18271_dump_std_item(qam_7, "qam 7 ");
c735372f 1128 tda18271_dump_std_item(qam_8, "qam 8 ");
f21e0d7f
MK
1129
1130 return 0;
1131}
1132
1133static int tda18271_update_std_map(struct dvb_frontend *fe,
1134 struct tda18271_std_map *map)
1135{
1136 struct tda18271_priv *priv = fe->tuner_priv;
1137 struct tda18271_std_map *std = &priv->std;
1138
1139 if (!map)
1140 return -EINVAL;
1141
c353f42f 1142 tda18271_update_std(fm_radio, "fm");
f21e0d7f
MK
1143 tda18271_update_std(atv_b, "atv b");
1144 tda18271_update_std(atv_dk, "atv dk");
1145 tda18271_update_std(atv_gh, "atv gh");
1146 tda18271_update_std(atv_i, "atv i");
1147 tda18271_update_std(atv_l, "atv l");
1148 tda18271_update_std(atv_lc, "atv l'");
1149 tda18271_update_std(atv_mn, "atv mn");
1150 tda18271_update_std(atsc_6, "atsc 6");
1151 tda18271_update_std(dvbt_6, "dvbt 6");
1152 tda18271_update_std(dvbt_7, "dvbt 7");
1153 tda18271_update_std(dvbt_8, "dvbt 8");
1154 tda18271_update_std(qam_6, "qam 6");
4e791048 1155 tda18271_update_std(qam_7, "qam 7");
f21e0d7f
MK
1156 tda18271_update_std(qam_8, "qam 8");
1157
1158 return 0;
1159}
1160
49e7aaf0
MK
1161static int tda18271_get_id(struct dvb_frontend *fe)
1162{
1163 struct tda18271_priv *priv = fe->tuner_priv;
1164 unsigned char *regs = priv->tda18271_regs;
1165 char *name;
351d1878 1166 int ret;
49e7aaf0 1167
8d316bf5 1168 mutex_lock(&priv->lock);
351d1878 1169 ret = tda18271_read_regs(fe);
8d316bf5 1170 mutex_unlock(&priv->lock);
49e7aaf0 1171
351d1878
MK
1172 if (ret) {
1173 tda_info("Error reading device ID @ %d-%04x, bailing out.\n",
1174 i2c_adapter_id(priv->i2c_props.adap),
1175 priv->i2c_props.addr);
1176 return -EIO;
1177 }
1178
49e7aaf0
MK
1179 switch (regs[R_ID] & 0x7f) {
1180 case 3:
1181 name = "TDA18271HD/C1";
255b5113 1182 priv->id = TDA18271HDC1;
49e7aaf0
MK
1183 break;
1184 case 4:
1185 name = "TDA18271HD/C2";
255b5113 1186 priv->id = TDA18271HDC2;
49e7aaf0
MK
1187 break;
1188 default:
bfc3d57f
MCC
1189 tda_info("Unknown device (%i) detected @ %d-%04x, device not supported.\n",
1190 regs[R_ID], i2c_adapter_id(priv->i2c_props.adap),
1191 priv->i2c_props.addr);
1192 return -EINVAL;
49e7aaf0
MK
1193 }
1194
bfc3d57f
MCC
1195 tda_info("%s detected @ %d-%04x\n", name,
1196 i2c_adapter_id(priv->i2c_props.adap), priv->i2c_props.addr);
49e7aaf0 1197
bfc3d57f 1198 return 0;
49e7aaf0
MK
1199}
1200
c54e1dde
MK
1201static int tda18271_setup_configuration(struct dvb_frontend *fe,
1202 struct tda18271_config *cfg)
42f9a03e
MK
1203{
1204 struct tda18271_priv *priv = fe->tuner_priv;
42f9a03e
MK
1205
1206 priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
1207 priv->role = (cfg) ? cfg->role : TDA18271_MASTER;
1208 priv->config = (cfg) ? cfg->config : 0;
1209 priv->small_i2c = (cfg) ?
1210 cfg->small_i2c : TDA18271_39_BYTE_CHUNK_INIT;
1211 priv->output_opt = (cfg) ?
1212 cfg->output_opt : TDA18271_OUTPUT_LT_XT_ON;
1213
42f9a03e
MK
1214 return 0;
1215}
1216
5881ecfc
MK
1217static inline int tda18271_need_cal_on_startup(struct tda18271_config *cfg)
1218{
1219 /* tda18271_cal_on_startup == -1 when cal module option is unset */
1220 return ((tda18271_cal_on_startup == -1) ?
1221 /* honor configuration setting */
1222 ((cfg) && (cfg->rf_cal_on_startup)) :
1223 /* module option overrides configuration setting */
1224 (tda18271_cal_on_startup)) ? 1 : 0;
1225}
1226
c54e1dde
MK
1227static int tda18271_set_config(struct dvb_frontend *fe, void *priv_cfg)
1228{
1229 struct tda18271_config *cfg = (struct tda18271_config *) priv_cfg;
c54e1dde
MK
1230
1231 tda18271_setup_configuration(fe, cfg);
1232
5881ecfc 1233 if (tda18271_need_cal_on_startup(cfg))
c54e1dde
MK
1234 tda18271_init(fe);
1235
972aacc2
MK
1236 /* override default std map with values in config struct */
1237 if ((cfg) && (cfg->std_map))
1238 tda18271_update_std_map(fe, cfg->std_map);
1239
c54e1dde
MK
1240 return 0;
1241}
1242
0b8bd83c 1243static const struct dvb_tuner_ops tda18271_tuner_ops = {
5bea1cd3
MK
1244 .info = {
1245 .name = "NXP TDA18271HD",
1246 .frequency_min = 45000000,
1247 .frequency_max = 864000000,
1248 .frequency_step = 62500
1249 },
efce8410 1250 .init = tda18271_init,
518d8739 1251 .sleep = tda18271_sleep,
5bea1cd3
MK
1252 .set_params = tda18271_set_params,
1253 .set_analog_params = tda18271_set_analog_params,
1254 .release = tda18271_release,
42f9a03e 1255 .set_config = tda18271_set_config,
5bea1cd3
MK
1256 .get_frequency = tda18271_get_frequency,
1257 .get_bandwidth = tda18271_get_bandwidth,
8c8ee113 1258 .get_if_frequency = tda18271_get_if_frequency,
5bea1cd3
MK
1259};
1260
1261struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
e435f95c 1262 struct i2c_adapter *i2c,
f21e0d7f 1263 struct tda18271_config *cfg)
5bea1cd3
MK
1264{
1265 struct tda18271_priv *priv = NULL;
fab9bfbe 1266 int instance, ret;
a4f263b5
MK
1267
1268 mutex_lock(&tda18271_list_mutex);
1269
f9e315a1
MK
1270 instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
1271 hybrid_tuner_instance_list,
1272 i2c, addr, "tda18271");
1273 switch (instance) {
1274 case 0:
1275 goto fail;
f9e315a1
MK
1276 case 1:
1277 /* new tuner instance */
42f9a03e
MK
1278 fe->tuner_priv = priv;
1279
c54e1dde 1280 tda18271_setup_configuration(fe, cfg);
81016b49 1281
a4f263b5
MK
1282 priv->cal_initialized = false;
1283 mutex_init(&priv->lock);
5bea1cd3 1284
fab9bfbe
MK
1285 ret = tda18271_get_id(fe);
1286 if (tda_fail(ret))
a4f263b5 1287 goto fail;
49e7aaf0 1288
fab9bfbe
MK
1289 ret = tda18271_assign_map_layout(fe);
1290 if (tda_fail(ret))
a4f263b5 1291 goto fail;
255b5113 1292
6b82e0cf
MK
1293 /* if delay_cal is set, delay IR & RF calibration until init()
1294 * module option 'cal' overrides this delay */
1295 if ((cfg->delay_cal) && (!tda18271_need_cal_on_startup(cfg)))
1296 break;
1297
a4f263b5
MK
1298 mutex_lock(&priv->lock);
1299 tda18271_init_regs(fe);
0f96251e 1300
5881ecfc
MK
1301 if ((tda18271_need_cal_on_startup(cfg)) &&
1302 (priv->id == TDA18271HDC2))
12afe378 1303 tda18271c2_rf_cal_init(fe);
0f96251e 1304
4cfae675
MK
1305 /* enter standby mode, with required output features enabled */
1306 ret = tda18271_toggle_output(fe, 1);
1307 tda_fail(ret);
1308
a4f263b5 1309 mutex_unlock(&priv->lock);
f9e315a1
MK
1310 break;
1311 default:
1312 /* existing tuner instance */
1313 fe->tuner_priv = priv;
1314
d5abef6b
MK
1315 /* allow dvb driver to override configuration settings */
1316 if (cfg) {
1317 if (cfg->gate != TDA18271_GATE_ANALOG)
1318 priv->gate = cfg->gate;
1319 if (cfg->role)
1320 priv->role = cfg->role;
1321 if (cfg->config)
1322 priv->config = cfg->config;
1323 if (cfg->small_i2c)
1324 priv->small_i2c = cfg->small_i2c;
1325 if (cfg->output_opt)
1326 priv->output_opt = cfg->output_opt;
42f9a03e
MK
1327 if (cfg->std_map)
1328 tda18271_update_std_map(fe, cfg->std_map);
d5abef6b 1329 }
5881ecfc 1330 if (tda18271_need_cal_on_startup(cfg))
188ea058 1331 tda18271_init(fe);
f9e315a1 1332 break;
a4f263b5 1333 }
5bea1cd3 1334
972aacc2
MK
1335 /* override default std map with values in config struct */
1336 if ((cfg) && (cfg->std_map))
1337 tda18271_update_std_map(fe, cfg->std_map);
1338
a4f263b5 1339 mutex_unlock(&tda18271_list_mutex);
8d316bf5 1340
a4f263b5
MK
1341 memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
1342 sizeof(struct dvb_tuner_ops));
efce8410 1343
c735372f 1344 if (tda18271_debug & (DBG_MAP | DBG_ADV))
a4f263b5 1345 tda18271_dump_std_map(fe);
8d316bf5 1346
5bea1cd3 1347 return fe;
49e7aaf0 1348fail:
a4f263b5
MK
1349 mutex_unlock(&tda18271_list_mutex);
1350
49e7aaf0
MK
1351 tda18271_release(fe);
1352 return NULL;
5bea1cd3
MK
1353}
1354EXPORT_SYMBOL_GPL(tda18271_attach);
1355MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
1356MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
1357MODULE_LICENSE("GPL");
5abaa530 1358MODULE_VERSION("0.4");
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