Commit | Line | Data |
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abfa3df3 JC |
1 | /* |
2 | * The Marvell camera core. This device appears in a number of settings, | |
3 | * so it needs platform-specific support outside of the core. | |
4 | * | |
5 | * Copyright 2011 Jonathan Corbet corbet@lwn.net | |
6 | */ | |
7 | #include <linux/kernel.h> | |
8 | #include <linux/module.h> | |
9 | #include <linux/fs.h> | |
abfa3df3 JC |
10 | #include <linux/mm.h> |
11 | #include <linux/i2c.h> | |
12 | #include <linux/interrupt.h> | |
13 | #include <linux/spinlock.h> | |
abfa3df3 | 14 | #include <linux/slab.h> |
abfa3df3 JC |
15 | #include <linux/device.h> |
16 | #include <linux/wait.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/dma-mapping.h> | |
19 | #include <linux/delay.h> | |
abfa3df3 | 20 | #include <linux/vmalloc.h> |
abfa3df3 | 21 | #include <linux/io.h> |
362d45b2 JC |
22 | #include <linux/videodev2.h> |
23 | #include <media/v4l2-device.h> | |
24 | #include <media/v4l2-ioctl.h> | |
25 | #include <media/v4l2-chip-ident.h> | |
26 | #include <media/ov7670.h> | |
27 | #include <media/videobuf2-vmalloc.h> | |
abfa3df3 JC |
28 | |
29 | #include "mcam-core.h" | |
30 | ||
31 | ||
32 | /* | |
33 | * Internal DMA buffer management. Since the controller cannot do S/G I/O, | |
34 | * we must have physically contiguous buffers to bring frames into. | |
35 | * These parameters control how many buffers we use, whether we | |
36 | * allocate them at load time (better chance of success, but nails down | |
37 | * memory) or when somebody tries to use the camera (riskier), and, | |
38 | * for load-time allocation, how big they should be. | |
39 | * | |
40 | * The controller can cycle through three buffers. We could use | |
41 | * more by flipping pointers around, but it probably makes little | |
42 | * sense. | |
43 | */ | |
44 | ||
45 | static int alloc_bufs_at_read; | |
46 | module_param(alloc_bufs_at_read, bool, 0444); | |
47 | MODULE_PARM_DESC(alloc_bufs_at_read, | |
48 | "Non-zero value causes DMA buffers to be allocated when the " | |
49 | "video capture device is read, rather than at module load " | |
50 | "time. This saves memory, but decreases the chances of " | |
51 | "successfully getting those buffers."); | |
52 | ||
53 | static int n_dma_bufs = 3; | |
54 | module_param(n_dma_bufs, uint, 0644); | |
55 | MODULE_PARM_DESC(n_dma_bufs, | |
56 | "The number of DMA buffers to allocate. Can be either two " | |
57 | "(saves memory, makes timing tighter) or three."); | |
58 | ||
59 | static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ | |
60 | module_param(dma_buf_size, uint, 0444); | |
61 | MODULE_PARM_DESC(dma_buf_size, | |
62 | "The size of the allocated DMA buffers. If actual operating " | |
63 | "parameters require larger buffers, an attempt to reallocate " | |
64 | "will be made."); | |
65 | ||
66 | static int min_buffers = 1; | |
67 | module_param(min_buffers, uint, 0644); | |
68 | MODULE_PARM_DESC(min_buffers, | |
69 | "The minimum number of streaming I/O buffers we are willing " | |
70 | "to work with."); | |
71 | ||
72 | static int max_buffers = 10; | |
73 | module_param(max_buffers, uint, 0644); | |
74 | MODULE_PARM_DESC(max_buffers, | |
75 | "The maximum number of streaming I/O buffers an application " | |
76 | "will be allowed to allocate. These buffers are big and live " | |
77 | "in vmalloc space."); | |
78 | ||
79 | static int flip; | |
80 | module_param(flip, bool, 0444); | |
81 | MODULE_PARM_DESC(flip, | |
82 | "If set, the sensor will be instructed to flip the image " | |
83 | "vertically."); | |
84 | ||
85 | /* | |
86 | * Status flags. Always manipulated with bit operations. | |
87 | */ | |
88 | #define CF_BUF0_VALID 0 /* Buffers valid - first three */ | |
89 | #define CF_BUF1_VALID 1 | |
90 | #define CF_BUF2_VALID 2 | |
91 | #define CF_DMA_ACTIVE 3 /* A frame is incoming */ | |
92 | #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ | |
93 | ||
94 | #define sensor_call(cam, o, f, args...) \ | |
95 | v4l2_subdev_call(cam->sensor, o, f, ##args) | |
96 | ||
97 | static struct mcam_format_struct { | |
98 | __u8 *desc; | |
99 | __u32 pixelformat; | |
100 | int bpp; /* Bytes per pixel */ | |
101 | enum v4l2_mbus_pixelcode mbus_code; | |
102 | } mcam_formats[] = { | |
103 | { | |
104 | .desc = "YUYV 4:2:2", | |
105 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
106 | .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, | |
107 | .bpp = 2, | |
108 | }, | |
109 | { | |
110 | .desc = "RGB 444", | |
111 | .pixelformat = V4L2_PIX_FMT_RGB444, | |
112 | .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, | |
113 | .bpp = 2, | |
114 | }, | |
115 | { | |
116 | .desc = "RGB 565", | |
117 | .pixelformat = V4L2_PIX_FMT_RGB565, | |
118 | .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, | |
119 | .bpp = 2, | |
120 | }, | |
121 | { | |
122 | .desc = "Raw RGB Bayer", | |
123 | .pixelformat = V4L2_PIX_FMT_SBGGR8, | |
124 | .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, | |
125 | .bpp = 1 | |
126 | }, | |
127 | }; | |
128 | #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) | |
129 | ||
130 | static struct mcam_format_struct *mcam_find_format(u32 pixelformat) | |
131 | { | |
132 | unsigned i; | |
133 | ||
134 | for (i = 0; i < N_MCAM_FMTS; i++) | |
135 | if (mcam_formats[i].pixelformat == pixelformat) | |
136 | return mcam_formats + i; | |
137 | /* Not found? Then return the first format. */ | |
138 | return mcam_formats; | |
139 | } | |
140 | ||
141 | /* | |
142 | * Start over with DMA buffers - dev_lock needed. | |
143 | */ | |
144 | static void mcam_reset_buffers(struct mcam_camera *cam) | |
145 | { | |
146 | int i; | |
147 | ||
148 | cam->next_buf = -1; | |
149 | for (i = 0; i < cam->nbufs; i++) | |
150 | clear_bit(i, &cam->flags); | |
abfa3df3 JC |
151 | } |
152 | ||
153 | static inline int mcam_needs_config(struct mcam_camera *cam) | |
154 | { | |
155 | return test_bit(CF_CONFIG_NEEDED, &cam->flags); | |
156 | } | |
157 | ||
158 | static void mcam_set_config_needed(struct mcam_camera *cam, int needed) | |
159 | { | |
160 | if (needed) | |
161 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | |
162 | else | |
163 | clear_bit(CF_CONFIG_NEEDED, &cam->flags); | |
164 | } | |
165 | ||
b5210fd2 JC |
166 | /* |
167 | * Our buffer type for working with videobuf2. Note that the vb2 | |
168 | * developers have decreed that struct vb2_buffer must be at the | |
169 | * beginning of this structure. | |
170 | */ | |
171 | struct mcam_vb_buffer { | |
172 | struct vb2_buffer vb_buf; | |
173 | struct list_head queue; | |
174 | }; | |
175 | ||
176 | static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb) | |
177 | { | |
178 | return container_of(vb, struct mcam_vb_buffer, vb_buf); | |
179 | } | |
180 | ||
abfa3df3 JC |
181 | |
182 | /* | |
67a8dbbc | 183 | * Debugging and related. |
abfa3df3 JC |
184 | */ |
185 | #define cam_err(cam, fmt, arg...) \ | |
186 | dev_err((cam)->dev, fmt, ##arg); | |
187 | #define cam_warn(cam, fmt, arg...) \ | |
188 | dev_warn((cam)->dev, fmt, ##arg); | |
189 | #define cam_dbg(cam, fmt, arg...) \ | |
190 | dev_dbg((cam)->dev, fmt, ##arg); | |
191 | ||
192 | ||
193 | ||
194 | /* ------------------------------------------------------------------- */ | |
195 | /* | |
196 | * Deal with the controller. | |
197 | */ | |
198 | ||
199 | /* | |
200 | * Do everything we think we need to have the interface operating | |
201 | * according to the desired format. | |
202 | */ | |
203 | static void mcam_ctlr_dma(struct mcam_camera *cam) | |
204 | { | |
205 | /* | |
206 | * Store the first two Y buffers (we aren't supporting | |
207 | * planar formats for now, so no UV bufs). Then either | |
208 | * set the third if it exists, or tell the controller | |
209 | * to just use two. | |
210 | */ | |
211 | mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); | |
212 | mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); | |
213 | if (cam->nbufs > 2) { | |
214 | mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); | |
215 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); | |
216 | } else | |
217 | mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); | |
67a8dbbc JC |
218 | if (cam->chip_id == V4L2_IDENT_CAFE) |
219 | mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */ | |
abfa3df3 JC |
220 | } |
221 | ||
222 | static void mcam_ctlr_image(struct mcam_camera *cam) | |
223 | { | |
224 | int imgsz; | |
225 | struct v4l2_pix_format *fmt = &cam->pix_format; | |
226 | ||
227 | imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | | |
228 | (fmt->bytesperline & IMGSZ_H_MASK); | |
229 | mcam_reg_write(cam, REG_IMGSIZE, imgsz); | |
230 | mcam_reg_write(cam, REG_IMGOFFSET, 0); | |
231 | /* YPITCH just drops the last two bits */ | |
232 | mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, | |
233 | IMGP_YP_MASK); | |
234 | /* | |
235 | * Tell the controller about the image format we are using. | |
236 | */ | |
237 | switch (cam->pix_format.pixelformat) { | |
238 | case V4L2_PIX_FMT_YUYV: | |
239 | mcam_reg_write_mask(cam, REG_CTRL0, | |
240 | C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, | |
241 | C0_DF_MASK); | |
242 | break; | |
243 | ||
244 | case V4L2_PIX_FMT_RGB444: | |
245 | mcam_reg_write_mask(cam, REG_CTRL0, | |
246 | C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, | |
247 | C0_DF_MASK); | |
248 | /* Alpha value? */ | |
249 | break; | |
250 | ||
251 | case V4L2_PIX_FMT_RGB565: | |
252 | mcam_reg_write_mask(cam, REG_CTRL0, | |
253 | C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, | |
254 | C0_DF_MASK); | |
255 | break; | |
256 | ||
257 | default: | |
258 | cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); | |
259 | break; | |
260 | } | |
261 | /* | |
262 | * Make sure it knows we want to use hsync/vsync. | |
263 | */ | |
264 | mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, | |
265 | C0_SIFM_MASK); | |
266 | } | |
267 | ||
268 | ||
269 | /* | |
270 | * Configure the controller for operation; caller holds the | |
271 | * device mutex. | |
272 | */ | |
273 | static int mcam_ctlr_configure(struct mcam_camera *cam) | |
274 | { | |
275 | unsigned long flags; | |
276 | ||
277 | spin_lock_irqsave(&cam->dev_lock, flags); | |
278 | mcam_ctlr_dma(cam); | |
279 | mcam_ctlr_image(cam); | |
280 | mcam_set_config_needed(cam, 0); | |
281 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
282 | return 0; | |
283 | } | |
284 | ||
285 | static void mcam_ctlr_irq_enable(struct mcam_camera *cam) | |
286 | { | |
287 | /* | |
288 | * Clear any pending interrupts, since we do not | |
289 | * expect to have I/O active prior to enabling. | |
290 | */ | |
291 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); | |
292 | mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); | |
293 | } | |
294 | ||
295 | static void mcam_ctlr_irq_disable(struct mcam_camera *cam) | |
296 | { | |
297 | mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); | |
298 | } | |
299 | ||
300 | /* | |
301 | * Make the controller start grabbing images. Everything must | |
302 | * be set up before doing this. | |
303 | */ | |
304 | static void mcam_ctlr_start(struct mcam_camera *cam) | |
305 | { | |
306 | /* set_bit performs a read, so no other barrier should be | |
307 | needed here */ | |
308 | mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); | |
309 | } | |
310 | ||
311 | static void mcam_ctlr_stop(struct mcam_camera *cam) | |
312 | { | |
313 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | |
314 | } | |
315 | ||
316 | static void mcam_ctlr_init(struct mcam_camera *cam) | |
317 | { | |
318 | unsigned long flags; | |
319 | ||
320 | spin_lock_irqsave(&cam->dev_lock, flags); | |
321 | /* | |
322 | * Make sure it's not powered down. | |
323 | */ | |
324 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); | |
325 | /* | |
326 | * Turn off the enable bit. It sure should be off anyway, | |
327 | * but it's good to be sure. | |
328 | */ | |
329 | mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); | |
330 | /* | |
331 | * Clock the sensor appropriately. Controller clock should | |
332 | * be 48MHz, sensor "typical" value is half that. | |
333 | */ | |
334 | mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); | |
335 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
336 | } | |
337 | ||
338 | ||
339 | /* | |
340 | * Stop the controller, and don't return until we're really sure that no | |
341 | * further DMA is going on. | |
342 | */ | |
343 | static void mcam_ctlr_stop_dma(struct mcam_camera *cam) | |
344 | { | |
345 | unsigned long flags; | |
346 | ||
347 | /* | |
348 | * Theory: stop the camera controller (whether it is operating | |
349 | * or not). Delay briefly just in case we race with the SOF | |
350 | * interrupt, then wait until no DMA is active. | |
351 | */ | |
352 | spin_lock_irqsave(&cam->dev_lock, flags); | |
353 | mcam_ctlr_stop(cam); | |
354 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
b5210fd2 | 355 | msleep(10); |
abfa3df3 JC |
356 | if (test_bit(CF_DMA_ACTIVE, &cam->flags)) |
357 | cam_err(cam, "Timeout waiting for DMA to end\n"); | |
358 | /* This would be bad news - what now? */ | |
359 | spin_lock_irqsave(&cam->dev_lock, flags); | |
360 | cam->state = S_IDLE; | |
361 | mcam_ctlr_irq_disable(cam); | |
362 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
363 | } | |
364 | ||
365 | /* | |
366 | * Power up and down. | |
367 | */ | |
368 | static void mcam_ctlr_power_up(struct mcam_camera *cam) | |
369 | { | |
370 | unsigned long flags; | |
371 | ||
372 | spin_lock_irqsave(&cam->dev_lock, flags); | |
abfa3df3 | 373 | cam->plat_power_up(cam); |
67a8dbbc | 374 | mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); |
abfa3df3 JC |
375 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
376 | msleep(5); /* Just to be sure */ | |
377 | } | |
378 | ||
379 | static void mcam_ctlr_power_down(struct mcam_camera *cam) | |
380 | { | |
381 | unsigned long flags; | |
382 | ||
383 | spin_lock_irqsave(&cam->dev_lock, flags); | |
67a8dbbc JC |
384 | /* |
385 | * School of hard knocks department: be sure we do any register | |
386 | * twiddling on the controller *before* calling the platform | |
387 | * power down routine. | |
388 | */ | |
abfa3df3 | 389 | mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); |
67a8dbbc | 390 | cam->plat_power_down(cam); |
abfa3df3 JC |
391 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
392 | } | |
393 | ||
394 | /* -------------------------------------------------------------------- */ | |
395 | /* | |
396 | * Communications with the sensor. | |
397 | */ | |
398 | ||
399 | static int __mcam_cam_reset(struct mcam_camera *cam) | |
400 | { | |
401 | return sensor_call(cam, core, reset, 0); | |
402 | } | |
403 | ||
404 | /* | |
405 | * We have found the sensor on the i2c. Let's try to have a | |
406 | * conversation. | |
407 | */ | |
408 | static int mcam_cam_init(struct mcam_camera *cam) | |
409 | { | |
410 | struct v4l2_dbg_chip_ident chip; | |
411 | int ret; | |
412 | ||
413 | mutex_lock(&cam->s_mutex); | |
414 | if (cam->state != S_NOTREADY) | |
415 | cam_warn(cam, "Cam init with device in funky state %d", | |
416 | cam->state); | |
417 | ret = __mcam_cam_reset(cam); | |
418 | if (ret) | |
419 | goto out; | |
420 | chip.ident = V4L2_IDENT_NONE; | |
421 | chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; | |
422 | chip.match.addr = cam->sensor_addr; | |
423 | ret = sensor_call(cam, core, g_chip_ident, &chip); | |
424 | if (ret) | |
425 | goto out; | |
426 | cam->sensor_type = chip.ident; | |
427 | if (cam->sensor_type != V4L2_IDENT_OV7670) { | |
428 | cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); | |
429 | ret = -EINVAL; | |
430 | goto out; | |
431 | } | |
432 | /* Get/set parameters? */ | |
433 | ret = 0; | |
434 | cam->state = S_IDLE; | |
435 | out: | |
436 | mcam_ctlr_power_down(cam); | |
437 | mutex_unlock(&cam->s_mutex); | |
438 | return ret; | |
439 | } | |
440 | ||
441 | /* | |
442 | * Configure the sensor to match the parameters we have. Caller should | |
443 | * hold s_mutex | |
444 | */ | |
445 | static int mcam_cam_set_flip(struct mcam_camera *cam) | |
446 | { | |
447 | struct v4l2_control ctrl; | |
448 | ||
449 | memset(&ctrl, 0, sizeof(ctrl)); | |
450 | ctrl.id = V4L2_CID_VFLIP; | |
451 | ctrl.value = flip; | |
452 | return sensor_call(cam, core, s_ctrl, &ctrl); | |
453 | } | |
454 | ||
455 | ||
456 | static int mcam_cam_configure(struct mcam_camera *cam) | |
457 | { | |
458 | struct v4l2_mbus_framefmt mbus_fmt; | |
459 | int ret; | |
460 | ||
461 | v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); | |
462 | ret = sensor_call(cam, core, init, 0); | |
463 | if (ret == 0) | |
464 | ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); | |
465 | /* | |
466 | * OV7670 does weird things if flip is set *before* format... | |
467 | */ | |
468 | ret += mcam_cam_set_flip(cam); | |
469 | return ret; | |
470 | } | |
471 | ||
472 | /* -------------------------------------------------------------------- */ | |
473 | /* | |
474 | * DMA buffer management. These functions need s_mutex held. | |
475 | */ | |
476 | ||
477 | /* FIXME: this is inefficient as hell, since dma_alloc_coherent just | |
478 | * does a get_free_pages() call, and we waste a good chunk of an orderN | |
479 | * allocation. Should try to allocate the whole set in one chunk. | |
480 | */ | |
481 | static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) | |
482 | { | |
483 | int i; | |
484 | ||
485 | mcam_set_config_needed(cam, 1); | |
486 | if (loadtime) | |
487 | cam->dma_buf_size = dma_buf_size; | |
488 | else | |
489 | cam->dma_buf_size = cam->pix_format.sizeimage; | |
490 | if (n_dma_bufs > 3) | |
491 | n_dma_bufs = 3; | |
492 | ||
493 | cam->nbufs = 0; | |
494 | for (i = 0; i < n_dma_bufs; i++) { | |
495 | cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, | |
496 | cam->dma_buf_size, cam->dma_handles + i, | |
497 | GFP_KERNEL); | |
498 | if (cam->dma_bufs[i] == NULL) { | |
499 | cam_warn(cam, "Failed to allocate DMA buffer\n"); | |
500 | break; | |
501 | } | |
502 | /* For debug, remove eventually */ | |
503 | memset(cam->dma_bufs[i], 0xcc, cam->dma_buf_size); | |
504 | (cam->nbufs)++; | |
505 | } | |
506 | ||
507 | switch (cam->nbufs) { | |
508 | case 1: | |
509 | dma_free_coherent(cam->dev, cam->dma_buf_size, | |
510 | cam->dma_bufs[0], cam->dma_handles[0]); | |
511 | cam->nbufs = 0; | |
512 | case 0: | |
513 | cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); | |
514 | return -ENOMEM; | |
515 | ||
516 | case 2: | |
517 | if (n_dma_bufs > 2) | |
518 | cam_warn(cam, "Will limp along with only 2 buffers\n"); | |
519 | break; | |
520 | } | |
521 | return 0; | |
522 | } | |
523 | ||
524 | static void mcam_free_dma_bufs(struct mcam_camera *cam) | |
525 | { | |
526 | int i; | |
527 | ||
528 | for (i = 0; i < cam->nbufs; i++) { | |
529 | dma_free_coherent(cam->dev, cam->dma_buf_size, | |
530 | cam->dma_bufs[i], cam->dma_handles[i]); | |
531 | cam->dma_bufs[i] = NULL; | |
532 | } | |
533 | cam->nbufs = 0; | |
534 | } | |
535 | ||
536 | ||
537 | ||
abfa3df3 JC |
538 | /* ----------------------------------------------------------------------- */ |
539 | /* | |
540 | * Here starts the V4L2 interface code. | |
541 | */ | |
542 | ||
abfa3df3 JC |
543 | |
544 | /* | |
545 | * Get everything ready, and start grabbing frames. | |
546 | */ | |
547 | static int mcam_read_setup(struct mcam_camera *cam, enum mcam_state state) | |
548 | { | |
549 | int ret; | |
550 | unsigned long flags; | |
551 | ||
552 | /* | |
553 | * Configuration. If we still don't have DMA buffers, | |
554 | * make one last, desperate attempt. | |
555 | */ | |
556 | if (cam->nbufs == 0) | |
557 | if (mcam_alloc_dma_bufs(cam, 0)) | |
558 | return -ENOMEM; | |
559 | ||
560 | if (mcam_needs_config(cam)) { | |
561 | mcam_cam_configure(cam); | |
562 | ret = mcam_ctlr_configure(cam); | |
563 | if (ret) | |
564 | return ret; | |
565 | } | |
566 | ||
567 | /* | |
568 | * Turn it loose. | |
569 | */ | |
570 | spin_lock_irqsave(&cam->dev_lock, flags); | |
571 | mcam_reset_buffers(cam); | |
572 | mcam_ctlr_irq_enable(cam); | |
573 | cam->state = state; | |
574 | mcam_ctlr_start(cam); | |
575 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
576 | return 0; | |
577 | } | |
578 | ||
b5210fd2 JC |
579 | /* ----------------------------------------------------------------------- */ |
580 | /* | |
581 | * Videobuf2 interface code. | |
582 | */ | |
abfa3df3 | 583 | |
b5210fd2 JC |
584 | static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs, |
585 | unsigned int *num_planes, unsigned long sizes[], | |
586 | void *alloc_ctxs[]) | |
abfa3df3 | 587 | { |
b5210fd2 JC |
588 | struct mcam_camera *cam = vb2_get_drv_priv(vq); |
589 | ||
590 | sizes[0] = cam->pix_format.sizeimage; | |
591 | *num_planes = 1; /* Someday we have to support planar formats... */ | |
592 | if (*nbufs < 2 || *nbufs > 32) | |
593 | *nbufs = 6; /* semi-arbitrary numbers */ | |
594 | return 0; | |
595 | } | |
596 | ||
597 | static int mcam_vb_buf_init(struct vb2_buffer *vb) | |
598 | { | |
599 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | |
600 | ||
601 | INIT_LIST_HEAD(&mvb->queue); | |
602 | return 0; | |
603 | } | |
604 | ||
605 | static void mcam_vb_buf_queue(struct vb2_buffer *vb) | |
606 | { | |
607 | struct mcam_vb_buffer *mvb = vb_to_mvb(vb); | |
608 | struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue); | |
609 | unsigned long flags; | |
610 | ||
611 | spin_lock_irqsave(&cam->dev_lock, flags); | |
612 | list_add(&cam->buffers, &mvb->queue); | |
613 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
614 | } | |
615 | ||
616 | /* | |
617 | * vb2 uses these to release the mutex when waiting in dqbuf. I'm | |
618 | * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs | |
619 | * to be called with the mutex held), but better safe than sorry. | |
620 | */ | |
621 | static void mcam_vb_wait_prepare(struct vb2_queue *vq) | |
622 | { | |
623 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
624 | ||
625 | mutex_unlock(&cam->s_mutex); | |
626 | } | |
627 | ||
628 | static void mcam_vb_wait_finish(struct vb2_queue *vq) | |
629 | { | |
630 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
abfa3df3 | 631 | |
abfa3df3 | 632 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 633 | } |
abfa3df3 | 634 | |
b5210fd2 JC |
635 | /* |
636 | * These need to be called with the mutex held from vb2 | |
637 | */ | |
638 | static int mcam_vb_start_streaming(struct vb2_queue *vq) | |
639 | { | |
640 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
641 | int ret = -EINVAL; | |
abfa3df3 | 642 | |
b5210fd2 JC |
643 | if (cam->state == S_IDLE) { |
644 | cam->sequence = 0; | |
645 | ret = mcam_read_setup(cam, S_STREAMING); | |
abfa3df3 | 646 | } |
b5210fd2 JC |
647 | return ret; |
648 | } | |
649 | ||
650 | static int mcam_vb_stop_streaming(struct vb2_queue *vq) | |
651 | { | |
652 | struct mcam_camera *cam = vb2_get_drv_priv(vq); | |
653 | unsigned long flags; | |
654 | ||
655 | if (cam->state != S_STREAMING) | |
656 | return -EINVAL; | |
657 | mcam_ctlr_stop_dma(cam); | |
abfa3df3 | 658 | /* |
b5210fd2 JC |
659 | * VB2 reclaims the buffers, so we need to forget |
660 | * about them. | |
abfa3df3 | 661 | */ |
b5210fd2 JC |
662 | spin_lock_irqsave(&cam->dev_lock, flags); |
663 | INIT_LIST_HEAD(&cam->buffers); | |
664 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
665 | return 0; | |
abfa3df3 JC |
666 | } |
667 | ||
668 | ||
b5210fd2 JC |
669 | static const struct vb2_ops mcam_vb2_ops = { |
670 | .queue_setup = mcam_vb_queue_setup, | |
671 | .buf_init = mcam_vb_buf_init, | |
672 | .buf_queue = mcam_vb_buf_queue, | |
673 | .start_streaming = mcam_vb_start_streaming, | |
674 | .stop_streaming = mcam_vb_stop_streaming, | |
675 | .wait_prepare = mcam_vb_wait_prepare, | |
676 | .wait_finish = mcam_vb_wait_finish, | |
677 | }; | |
abfa3df3 | 678 | |
b5210fd2 JC |
679 | static int mcam_setup_vb2(struct mcam_camera *cam) |
680 | { | |
681 | struct vb2_queue *vq = &cam->vb_queue; | |
abfa3df3 | 682 | |
b5210fd2 JC |
683 | memset(vq, 0, sizeof(*vq)); |
684 | vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
685 | vq->io_modes = VB2_MMAP; /* Add userptr */ | |
686 | vq->drv_priv = cam; | |
687 | vq->ops = &mcam_vb2_ops; | |
688 | vq->mem_ops = &vb2_vmalloc_memops; | |
689 | vq->buf_struct_size = sizeof(struct mcam_vb_buffer); | |
abfa3df3 | 690 | |
b5210fd2 JC |
691 | return vb2_queue_init(vq); |
692 | } | |
693 | ||
694 | static void mcam_cleanup_vb2(struct mcam_camera *cam) | |
695 | { | |
696 | vb2_queue_release(&cam->vb_queue); | |
697 | } | |
698 | ||
699 | static ssize_t mcam_v4l_read(struct file *filp, | |
700 | char __user *buffer, size_t len, loff_t *pos) | |
701 | { | |
702 | struct mcam_camera *cam = filp->private_data; | |
703 | int ret; | |
704 | ||
705 | mutex_lock(&cam->s_mutex); | |
706 | ret = vb2_read(&cam->vb_queue, buffer, len, pos, | |
707 | filp->f_flags & O_NONBLOCK); | |
708 | mutex_unlock(&cam->s_mutex); | |
709 | return ret; | |
710 | } | |
abfa3df3 JC |
711 | |
712 | ||
713 | ||
714 | /* | |
715 | * Streaming I/O support. | |
716 | */ | |
717 | ||
abfa3df3 JC |
718 | static int mcam_vidioc_streamon(struct file *filp, void *priv, |
719 | enum v4l2_buf_type type) | |
720 | { | |
721 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 722 | int ret; |
abfa3df3 | 723 | |
abfa3df3 | 724 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 725 | ret = vb2_streamon(&cam->vb_queue, type); |
abfa3df3 | 726 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
727 | return ret; |
728 | } | |
729 | ||
730 | ||
731 | static int mcam_vidioc_streamoff(struct file *filp, void *priv, | |
732 | enum v4l2_buf_type type) | |
733 | { | |
734 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 735 | int ret; |
abfa3df3 | 736 | |
abfa3df3 | 737 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 738 | ret = vb2_streamoff(&cam->vb_queue, type); |
abfa3df3 | 739 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
740 | return ret; |
741 | } | |
742 | ||
743 | ||
abfa3df3 JC |
744 | static int mcam_vidioc_reqbufs(struct file *filp, void *priv, |
745 | struct v4l2_requestbuffers *req) | |
746 | { | |
747 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 748 | int ret; |
abfa3df3 | 749 | |
abfa3df3 | 750 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 751 | ret = vb2_reqbufs(&cam->vb_queue, req); |
abfa3df3 JC |
752 | mutex_unlock(&cam->s_mutex); |
753 | return ret; | |
754 | } | |
755 | ||
756 | ||
757 | static int mcam_vidioc_querybuf(struct file *filp, void *priv, | |
758 | struct v4l2_buffer *buf) | |
759 | { | |
760 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 761 | int ret; |
abfa3df3 JC |
762 | |
763 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 764 | ret = vb2_querybuf(&cam->vb_queue, buf); |
abfa3df3 JC |
765 | mutex_unlock(&cam->s_mutex); |
766 | return ret; | |
767 | } | |
768 | ||
769 | static int mcam_vidioc_qbuf(struct file *filp, void *priv, | |
770 | struct v4l2_buffer *buf) | |
771 | { | |
772 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 773 | int ret; |
abfa3df3 JC |
774 | |
775 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 776 | ret = vb2_qbuf(&cam->vb_queue, buf); |
abfa3df3 JC |
777 | mutex_unlock(&cam->s_mutex); |
778 | return ret; | |
779 | } | |
780 | ||
781 | static int mcam_vidioc_dqbuf(struct file *filp, void *priv, | |
782 | struct v4l2_buffer *buf) | |
783 | { | |
784 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 785 | int ret; |
abfa3df3 JC |
786 | |
787 | mutex_lock(&cam->s_mutex); | |
b5210fd2 | 788 | ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK); |
abfa3df3 | 789 | mutex_unlock(&cam->s_mutex); |
abfa3df3 JC |
790 | return ret; |
791 | } | |
792 | ||
793 | ||
abfa3df3 JC |
794 | static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) |
795 | { | |
796 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 797 | int ret; |
abfa3df3 | 798 | |
abfa3df3 | 799 | mutex_lock(&cam->s_mutex); |
b5210fd2 | 800 | ret = vb2_mmap(&cam->vb_queue, vma); |
abfa3df3 JC |
801 | mutex_unlock(&cam->s_mutex); |
802 | return ret; | |
803 | } | |
804 | ||
805 | ||
806 | ||
807 | static int mcam_v4l_open(struct file *filp) | |
808 | { | |
809 | struct mcam_camera *cam = video_drvdata(filp); | |
b5210fd2 | 810 | int ret = 0; |
abfa3df3 JC |
811 | |
812 | filp->private_data = cam; | |
813 | ||
814 | mutex_lock(&cam->s_mutex); | |
815 | if (cam->users == 0) { | |
b5210fd2 JC |
816 | ret = mcam_setup_vb2(cam); |
817 | if (ret) | |
818 | goto out; | |
abfa3df3 JC |
819 | mcam_ctlr_power_up(cam); |
820 | __mcam_cam_reset(cam); | |
821 | mcam_set_config_needed(cam, 1); | |
abfa3df3 JC |
822 | } |
823 | (cam->users)++; | |
b5210fd2 | 824 | out: |
abfa3df3 | 825 | mutex_unlock(&cam->s_mutex); |
b5210fd2 | 826 | return ret; |
abfa3df3 JC |
827 | } |
828 | ||
829 | ||
830 | static int mcam_v4l_release(struct file *filp) | |
831 | { | |
832 | struct mcam_camera *cam = filp->private_data; | |
833 | ||
834 | mutex_lock(&cam->s_mutex); | |
835 | (cam->users)--; | |
836 | if (filp == cam->owner) { | |
837 | mcam_ctlr_stop_dma(cam); | |
abfa3df3 JC |
838 | cam->owner = NULL; |
839 | } | |
840 | if (cam->users == 0) { | |
b5210fd2 | 841 | mcam_cleanup_vb2(cam); |
abfa3df3 JC |
842 | mcam_ctlr_power_down(cam); |
843 | if (alloc_bufs_at_read) | |
844 | mcam_free_dma_bufs(cam); | |
845 | } | |
846 | mutex_unlock(&cam->s_mutex); | |
847 | return 0; | |
848 | } | |
849 | ||
850 | ||
851 | ||
852 | static unsigned int mcam_v4l_poll(struct file *filp, | |
853 | struct poll_table_struct *pt) | |
854 | { | |
855 | struct mcam_camera *cam = filp->private_data; | |
b5210fd2 | 856 | int ret; |
abfa3df3 | 857 | |
b5210fd2 JC |
858 | mutex_lock(&cam->s_mutex); |
859 | ret = vb2_poll(&cam->vb_queue, filp, pt); | |
860 | mutex_unlock(&cam->s_mutex); | |
861 | return ret; | |
abfa3df3 JC |
862 | } |
863 | ||
864 | ||
865 | ||
866 | static int mcam_vidioc_queryctrl(struct file *filp, void *priv, | |
867 | struct v4l2_queryctrl *qc) | |
868 | { | |
869 | struct mcam_camera *cam = priv; | |
870 | int ret; | |
871 | ||
872 | mutex_lock(&cam->s_mutex); | |
873 | ret = sensor_call(cam, core, queryctrl, qc); | |
874 | mutex_unlock(&cam->s_mutex); | |
875 | return ret; | |
876 | } | |
877 | ||
878 | ||
879 | static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, | |
880 | struct v4l2_control *ctrl) | |
881 | { | |
882 | struct mcam_camera *cam = priv; | |
883 | int ret; | |
884 | ||
885 | mutex_lock(&cam->s_mutex); | |
886 | ret = sensor_call(cam, core, g_ctrl, ctrl); | |
887 | mutex_unlock(&cam->s_mutex); | |
888 | return ret; | |
889 | } | |
890 | ||
891 | ||
892 | static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, | |
893 | struct v4l2_control *ctrl) | |
894 | { | |
895 | struct mcam_camera *cam = priv; | |
896 | int ret; | |
897 | ||
898 | mutex_lock(&cam->s_mutex); | |
899 | ret = sensor_call(cam, core, s_ctrl, ctrl); | |
900 | mutex_unlock(&cam->s_mutex); | |
901 | return ret; | |
902 | } | |
903 | ||
904 | ||
abfa3df3 JC |
905 | static int mcam_vidioc_querycap(struct file *file, void *priv, |
906 | struct v4l2_capability *cap) | |
907 | { | |
908 | strcpy(cap->driver, "marvell_ccic"); | |
909 | strcpy(cap->card, "marvell_ccic"); | |
910 | cap->version = 1; | |
911 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | | |
912 | V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | |
913 | return 0; | |
914 | } | |
915 | ||
916 | ||
917 | /* | |
918 | * The default format we use until somebody says otherwise. | |
919 | */ | |
920 | static const struct v4l2_pix_format mcam_def_pix_format = { | |
921 | .width = VGA_WIDTH, | |
922 | .height = VGA_HEIGHT, | |
923 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
924 | .field = V4L2_FIELD_NONE, | |
925 | .bytesperline = VGA_WIDTH*2, | |
926 | .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, | |
927 | }; | |
928 | ||
929 | static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = | |
930 | V4L2_MBUS_FMT_YUYV8_2X8; | |
931 | ||
932 | static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, | |
933 | void *priv, struct v4l2_fmtdesc *fmt) | |
934 | { | |
935 | if (fmt->index >= N_MCAM_FMTS) | |
936 | return -EINVAL; | |
937 | strlcpy(fmt->description, mcam_formats[fmt->index].desc, | |
938 | sizeof(fmt->description)); | |
939 | fmt->pixelformat = mcam_formats[fmt->index].pixelformat; | |
940 | return 0; | |
941 | } | |
942 | ||
943 | static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, | |
944 | struct v4l2_format *fmt) | |
945 | { | |
946 | struct mcam_camera *cam = priv; | |
947 | struct mcam_format_struct *f; | |
948 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | |
949 | struct v4l2_mbus_framefmt mbus_fmt; | |
950 | int ret; | |
951 | ||
952 | f = mcam_find_format(pix->pixelformat); | |
953 | pix->pixelformat = f->pixelformat; | |
954 | v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); | |
955 | mutex_lock(&cam->s_mutex); | |
956 | ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); | |
957 | mutex_unlock(&cam->s_mutex); | |
958 | v4l2_fill_pix_format(pix, &mbus_fmt); | |
959 | pix->bytesperline = pix->width * f->bpp; | |
960 | pix->sizeimage = pix->height * pix->bytesperline; | |
961 | return ret; | |
962 | } | |
963 | ||
964 | static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, | |
965 | struct v4l2_format *fmt) | |
966 | { | |
967 | struct mcam_camera *cam = priv; | |
968 | struct mcam_format_struct *f; | |
969 | int ret; | |
970 | ||
971 | /* | |
972 | * Can't do anything if the device is not idle | |
973 | * Also can't if there are streaming buffers in place. | |
974 | */ | |
b5210fd2 | 975 | if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0) |
abfa3df3 JC |
976 | return -EBUSY; |
977 | ||
978 | f = mcam_find_format(fmt->fmt.pix.pixelformat); | |
979 | ||
980 | /* | |
981 | * See if the formatting works in principle. | |
982 | */ | |
983 | ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); | |
984 | if (ret) | |
985 | return ret; | |
986 | /* | |
987 | * Now we start to change things for real, so let's do it | |
988 | * under lock. | |
989 | */ | |
990 | mutex_lock(&cam->s_mutex); | |
991 | cam->pix_format = fmt->fmt.pix; | |
992 | cam->mbus_code = f->mbus_code; | |
993 | ||
994 | /* | |
995 | * Make sure we have appropriate DMA buffers. | |
996 | */ | |
997 | ret = -ENOMEM; | |
998 | if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) | |
999 | mcam_free_dma_bufs(cam); | |
1000 | if (cam->nbufs == 0) { | |
1001 | if (mcam_alloc_dma_bufs(cam, 0)) | |
1002 | goto out; | |
1003 | } | |
1004 | /* | |
1005 | * It looks like this might work, so let's program the sensor. | |
1006 | */ | |
1007 | ret = mcam_cam_configure(cam); | |
1008 | if (!ret) | |
1009 | ret = mcam_ctlr_configure(cam); | |
1010 | out: | |
1011 | mutex_unlock(&cam->s_mutex); | |
1012 | return ret; | |
1013 | } | |
1014 | ||
1015 | /* | |
1016 | * Return our stored notion of how the camera is/should be configured. | |
1017 | * The V4l2 spec wants us to be smarter, and actually get this from | |
1018 | * the camera (and not mess with it at open time). Someday. | |
1019 | */ | |
1020 | static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, | |
1021 | struct v4l2_format *f) | |
1022 | { | |
1023 | struct mcam_camera *cam = priv; | |
1024 | ||
1025 | f->fmt.pix = cam->pix_format; | |
1026 | return 0; | |
1027 | } | |
1028 | ||
1029 | /* | |
1030 | * We only have one input - the sensor - so minimize the nonsense here. | |
1031 | */ | |
1032 | static int mcam_vidioc_enum_input(struct file *filp, void *priv, | |
1033 | struct v4l2_input *input) | |
1034 | { | |
1035 | if (input->index != 0) | |
1036 | return -EINVAL; | |
1037 | ||
1038 | input->type = V4L2_INPUT_TYPE_CAMERA; | |
1039 | input->std = V4L2_STD_ALL; /* Not sure what should go here */ | |
1040 | strcpy(input->name, "Camera"); | |
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) | |
1045 | { | |
1046 | *i = 0; | |
1047 | return 0; | |
1048 | } | |
1049 | ||
1050 | static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) | |
1051 | { | |
1052 | if (i != 0) | |
1053 | return -EINVAL; | |
1054 | return 0; | |
1055 | } | |
1056 | ||
1057 | /* from vivi.c */ | |
1058 | static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) | |
1059 | { | |
1060 | return 0; | |
1061 | } | |
1062 | ||
1063 | /* | |
1064 | * G/S_PARM. Most of this is done by the sensor, but we are | |
1065 | * the level which controls the number of read buffers. | |
1066 | */ | |
1067 | static int mcam_vidioc_g_parm(struct file *filp, void *priv, | |
1068 | struct v4l2_streamparm *parms) | |
1069 | { | |
1070 | struct mcam_camera *cam = priv; | |
1071 | int ret; | |
1072 | ||
1073 | mutex_lock(&cam->s_mutex); | |
1074 | ret = sensor_call(cam, video, g_parm, parms); | |
1075 | mutex_unlock(&cam->s_mutex); | |
1076 | parms->parm.capture.readbuffers = n_dma_bufs; | |
1077 | return ret; | |
1078 | } | |
1079 | ||
1080 | static int mcam_vidioc_s_parm(struct file *filp, void *priv, | |
1081 | struct v4l2_streamparm *parms) | |
1082 | { | |
1083 | struct mcam_camera *cam = priv; | |
1084 | int ret; | |
1085 | ||
1086 | mutex_lock(&cam->s_mutex); | |
1087 | ret = sensor_call(cam, video, s_parm, parms); | |
1088 | mutex_unlock(&cam->s_mutex); | |
1089 | parms->parm.capture.readbuffers = n_dma_bufs; | |
1090 | return ret; | |
1091 | } | |
1092 | ||
1093 | static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, | |
1094 | struct v4l2_dbg_chip_ident *chip) | |
1095 | { | |
1096 | struct mcam_camera *cam = priv; | |
1097 | ||
1098 | chip->ident = V4L2_IDENT_NONE; | |
1099 | chip->revision = 0; | |
1100 | if (v4l2_chip_match_host(&chip->match)) { | |
1101 | chip->ident = cam->chip_id; | |
1102 | return 0; | |
1103 | } | |
1104 | return sensor_call(cam, core, g_chip_ident, chip); | |
1105 | } | |
1106 | ||
1107 | static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, | |
1108 | struct v4l2_frmsizeenum *sizes) | |
1109 | { | |
1110 | struct mcam_camera *cam = priv; | |
1111 | int ret; | |
1112 | ||
1113 | mutex_lock(&cam->s_mutex); | |
1114 | ret = sensor_call(cam, video, enum_framesizes, sizes); | |
1115 | mutex_unlock(&cam->s_mutex); | |
1116 | return ret; | |
1117 | } | |
1118 | ||
1119 | static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, | |
1120 | struct v4l2_frmivalenum *interval) | |
1121 | { | |
1122 | struct mcam_camera *cam = priv; | |
1123 | int ret; | |
1124 | ||
1125 | mutex_lock(&cam->s_mutex); | |
1126 | ret = sensor_call(cam, video, enum_frameintervals, interval); | |
1127 | mutex_unlock(&cam->s_mutex); | |
1128 | return ret; | |
1129 | } | |
1130 | ||
1131 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1132 | static int mcam_vidioc_g_register(struct file *file, void *priv, | |
1133 | struct v4l2_dbg_register *reg) | |
1134 | { | |
1135 | struct mcam_camera *cam = priv; | |
1136 | ||
1137 | if (v4l2_chip_match_host(®->match)) { | |
1138 | reg->val = mcam_reg_read(cam, reg->reg); | |
1139 | reg->size = 4; | |
1140 | return 0; | |
1141 | } | |
1142 | return sensor_call(cam, core, g_register, reg); | |
1143 | } | |
1144 | ||
1145 | static int mcam_vidioc_s_register(struct file *file, void *priv, | |
1146 | struct v4l2_dbg_register *reg) | |
1147 | { | |
1148 | struct mcam_camera *cam = priv; | |
1149 | ||
1150 | if (v4l2_chip_match_host(®->match)) { | |
1151 | mcam_reg_write(cam, reg->reg, reg->val); | |
1152 | return 0; | |
1153 | } | |
1154 | return sensor_call(cam, core, s_register, reg); | |
1155 | } | |
1156 | #endif | |
1157 | ||
1158 | /* | |
1159 | * This template device holds all of those v4l2 methods; we | |
1160 | * clone it for specific real devices. | |
1161 | */ | |
1162 | ||
1163 | static const struct v4l2_file_operations mcam_v4l_fops = { | |
1164 | .owner = THIS_MODULE, | |
1165 | .open = mcam_v4l_open, | |
1166 | .release = mcam_v4l_release, | |
1167 | .read = mcam_v4l_read, | |
1168 | .poll = mcam_v4l_poll, | |
1169 | .mmap = mcam_v4l_mmap, | |
1170 | .unlocked_ioctl = video_ioctl2, | |
1171 | }; | |
1172 | ||
1173 | static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { | |
1174 | .vidioc_querycap = mcam_vidioc_querycap, | |
1175 | .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, | |
1176 | .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, | |
1177 | .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, | |
1178 | .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, | |
1179 | .vidioc_enum_input = mcam_vidioc_enum_input, | |
1180 | .vidioc_g_input = mcam_vidioc_g_input, | |
1181 | .vidioc_s_input = mcam_vidioc_s_input, | |
1182 | .vidioc_s_std = mcam_vidioc_s_std, | |
1183 | .vidioc_reqbufs = mcam_vidioc_reqbufs, | |
1184 | .vidioc_querybuf = mcam_vidioc_querybuf, | |
1185 | .vidioc_qbuf = mcam_vidioc_qbuf, | |
1186 | .vidioc_dqbuf = mcam_vidioc_dqbuf, | |
1187 | .vidioc_streamon = mcam_vidioc_streamon, | |
1188 | .vidioc_streamoff = mcam_vidioc_streamoff, | |
1189 | .vidioc_queryctrl = mcam_vidioc_queryctrl, | |
1190 | .vidioc_g_ctrl = mcam_vidioc_g_ctrl, | |
1191 | .vidioc_s_ctrl = mcam_vidioc_s_ctrl, | |
1192 | .vidioc_g_parm = mcam_vidioc_g_parm, | |
1193 | .vidioc_s_parm = mcam_vidioc_s_parm, | |
1194 | .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, | |
1195 | .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, | |
1196 | .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, | |
1197 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
1198 | .vidioc_g_register = mcam_vidioc_g_register, | |
1199 | .vidioc_s_register = mcam_vidioc_s_register, | |
1200 | #endif | |
1201 | }; | |
1202 | ||
1203 | static struct video_device mcam_v4l_template = { | |
1204 | .name = "mcam", | |
1205 | .tvnorms = V4L2_STD_NTSC_M, | |
1206 | .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ | |
1207 | ||
1208 | .fops = &mcam_v4l_fops, | |
1209 | .ioctl_ops = &mcam_v4l_ioctl_ops, | |
1210 | .release = video_device_release_empty, | |
1211 | }; | |
1212 | ||
1213 | /* ---------------------------------------------------------------------- */ | |
1214 | /* | |
1215 | * Interrupt handler stuff | |
1216 | */ | |
1217 | ||
1218 | ||
1219 | ||
1220 | static void mcam_frame_tasklet(unsigned long data) | |
1221 | { | |
1222 | struct mcam_camera *cam = (struct mcam_camera *) data; | |
1223 | int i; | |
1224 | unsigned long flags; | |
b5210fd2 | 1225 | struct mcam_vb_buffer *buf; |
abfa3df3 JC |
1226 | |
1227 | spin_lock_irqsave(&cam->dev_lock, flags); | |
1228 | for (i = 0; i < cam->nbufs; i++) { | |
1229 | int bufno = cam->next_buf; | |
b5210fd2 JC |
1230 | |
1231 | if (cam->state != S_STREAMING || bufno < 0) | |
1232 | break; /* I/O got stopped */ | |
abfa3df3 JC |
1233 | if (++(cam->next_buf) >= cam->nbufs) |
1234 | cam->next_buf = 0; | |
1235 | if (!test_bit(bufno, &cam->flags)) | |
1236 | continue; | |
b5210fd2 | 1237 | if (list_empty(&cam->buffers)) |
abfa3df3 JC |
1238 | break; /* Leave it valid, hope for better later */ |
1239 | clear_bit(bufno, &cam->flags); | |
b5210fd2 JC |
1240 | buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, |
1241 | queue); | |
1242 | list_del_init(&buf->queue); | |
abfa3df3 JC |
1243 | /* |
1244 | * Drop the lock during the big copy. This *should* be safe... | |
1245 | */ | |
1246 | spin_unlock_irqrestore(&cam->dev_lock, flags); | |
b5210fd2 | 1247 | memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno], |
abfa3df3 | 1248 | cam->pix_format.sizeimage); |
b5210fd2 JC |
1249 | buf->vb_buf.v4l2_buf.bytesused = cam->pix_format.sizeimage; |
1250 | buf->vb_buf.v4l2_buf.sequence = cam->buf_seq[bufno]; | |
1251 | buf->vb_buf.v4l2_buf.flags &= ~V4L2_BUF_FLAG_QUEUED; | |
1252 | buf->vb_buf.v4l2_buf.flags |= V4L2_BUF_FLAG_DONE; | |
1253 | vb2_set_plane_payload(&buf->vb_buf, 0, | |
1254 | cam->pix_format.sizeimage); | |
1255 | vb2_buffer_done(&buf->vb_buf, VB2_BUF_STATE_DONE); | |
abfa3df3 | 1256 | spin_lock_irqsave(&cam->dev_lock, flags); |
abfa3df3 | 1257 | } |
abfa3df3 JC |
1258 | spin_unlock_irqrestore(&cam->dev_lock, flags); |
1259 | } | |
1260 | ||
1261 | ||
1262 | ||
1263 | static void mcam_frame_complete(struct mcam_camera *cam, int frame) | |
1264 | { | |
1265 | /* | |
1266 | * Basic frame housekeeping. | |
1267 | */ | |
1268 | if (test_bit(frame, &cam->flags) && printk_ratelimit()) | |
1269 | cam_err(cam, "Frame overrun on %d, frames lost\n", frame); | |
1270 | set_bit(frame, &cam->flags); | |
1271 | clear_bit(CF_DMA_ACTIVE, &cam->flags); | |
1272 | if (cam->next_buf < 0) | |
1273 | cam->next_buf = frame; | |
1274 | cam->buf_seq[frame] = ++(cam->sequence); | |
1275 | ||
1276 | switch (cam->state) { | |
abfa3df3 JC |
1277 | /* |
1278 | * For the streaming case, we defer the real work to the | |
1279 | * camera tasklet. | |
1280 | * | |
1281 | * FIXME: if the application is not consuming the buffers, | |
1282 | * we should eventually put things on hold and restart in | |
1283 | * vidioc_dqbuf(). | |
1284 | */ | |
1285 | case S_STREAMING: | |
1286 | tasklet_schedule(&cam->s_tasklet); | |
1287 | break; | |
1288 | ||
1289 | default: | |
1290 | cam_err(cam, "Frame interrupt in non-operational state\n"); | |
1291 | break; | |
1292 | } | |
1293 | } | |
1294 | ||
1295 | ||
1296 | ||
1297 | ||
1298 | int mccic_irq(struct mcam_camera *cam, unsigned int irqs) | |
1299 | { | |
1300 | unsigned int frame, handled = 0; | |
1301 | ||
1302 | mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ | |
1303 | /* | |
1304 | * Handle any frame completions. There really should | |
1305 | * not be more than one of these, or we have fallen | |
1306 | * far behind. | |
1307 | */ | |
1308 | for (frame = 0; frame < cam->nbufs; frame++) | |
1309 | if (irqs & (IRQ_EOF0 << frame)) { | |
1310 | mcam_frame_complete(cam, frame); | |
1311 | handled = 1; | |
1312 | } | |
1313 | /* | |
1314 | * If a frame starts, note that we have DMA active. This | |
1315 | * code assumes that we won't get multiple frame interrupts | |
1316 | * at once; may want to rethink that. | |
1317 | */ | |
1318 | if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { | |
1319 | set_bit(CF_DMA_ACTIVE, &cam->flags); | |
1320 | handled = 1; | |
1321 | } | |
1322 | return handled; | |
1323 | } | |
1324 | ||
1325 | /* | |
1326 | * Registration and such. | |
1327 | */ | |
1328 | ||
abfa3df3 | 1329 | static struct ov7670_config sensor_cfg = { |
abfa3df3 JC |
1330 | /* |
1331 | * Exclude QCIF mode, because it only captures a tiny portion | |
1332 | * of the sensor FOV | |
1333 | */ | |
1334 | .min_width = 320, | |
1335 | .min_height = 240, | |
1336 | }; | |
1337 | ||
1338 | ||
1339 | int mccic_register(struct mcam_camera *cam) | |
1340 | { | |
1341 | struct i2c_board_info ov7670_info = { | |
1342 | .type = "ov7670", | |
1c68f889 | 1343 | .addr = 0x42 >> 1, |
abfa3df3 JC |
1344 | .platform_data = &sensor_cfg, |
1345 | }; | |
1346 | int ret; | |
1347 | ||
1348 | /* | |
1349 | * Register with V4L | |
1350 | */ | |
1351 | ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); | |
1352 | if (ret) | |
1353 | return ret; | |
1354 | ||
1355 | mutex_init(&cam->s_mutex); | |
1356 | cam->state = S_NOTREADY; | |
1357 | mcam_set_config_needed(cam, 1); | |
abfa3df3 JC |
1358 | cam->pix_format = mcam_def_pix_format; |
1359 | cam->mbus_code = mcam_def_mbus_code; | |
1360 | INIT_LIST_HEAD(&cam->dev_list); | |
b5210fd2 | 1361 | INIT_LIST_HEAD(&cam->buffers); |
abfa3df3 JC |
1362 | tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, (unsigned long) cam); |
1363 | ||
1364 | mcam_ctlr_init(cam); | |
1365 | ||
abfa3df3 JC |
1366 | /* |
1367 | * Try to find the sensor. | |
1368 | */ | |
2164b5af JC |
1369 | sensor_cfg.clock_speed = cam->clock_speed; |
1370 | sensor_cfg.use_smbus = cam->use_smbus; | |
abfa3df3 JC |
1371 | cam->sensor_addr = ov7670_info.addr; |
1372 | cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, | |
595a93a4 | 1373 | cam->i2c_adapter, &ov7670_info, NULL); |
abfa3df3 JC |
1374 | if (cam->sensor == NULL) { |
1375 | ret = -ENODEV; | |
1376 | goto out_unregister; | |
1377 | } | |
1378 | ||
1379 | ret = mcam_cam_init(cam); | |
1380 | if (ret) | |
1381 | goto out_unregister; | |
1382 | /* | |
1383 | * Get the v4l2 setup done. | |
1384 | */ | |
1385 | mutex_lock(&cam->s_mutex); | |
1386 | cam->vdev = mcam_v4l_template; | |
1387 | cam->vdev.debug = 0; | |
1388 | cam->vdev.v4l2_dev = &cam->v4l2_dev; | |
1389 | ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); | |
1390 | if (ret) | |
1391 | goto out; | |
1392 | video_set_drvdata(&cam->vdev, cam); | |
1393 | ||
1394 | /* | |
1395 | * If so requested, try to get our DMA buffers now. | |
1396 | */ | |
1397 | if (!alloc_bufs_at_read) { | |
1398 | if (mcam_alloc_dma_bufs(cam, 1)) | |
1399 | cam_warn(cam, "Unable to alloc DMA buffers at load" | |
1400 | " will try again later."); | |
1401 | } | |
1402 | ||
1403 | out: | |
1404 | mutex_unlock(&cam->s_mutex); | |
1405 | return ret; | |
1406 | out_unregister: | |
1407 | v4l2_device_unregister(&cam->v4l2_dev); | |
1408 | return ret; | |
1409 | } | |
1410 | ||
1411 | ||
1412 | void mccic_shutdown(struct mcam_camera *cam) | |
1413 | { | |
67a8dbbc JC |
1414 | /* |
1415 | * If we have no users (and we really, really should have no | |
1416 | * users) the device will already be powered down. Trying to | |
1417 | * take it down again will wedge the machine, which is frowned | |
1418 | * upon. | |
1419 | */ | |
1420 | if (cam->users > 0) { | |
abfa3df3 | 1421 | cam_warn(cam, "Removing a device with users!\n"); |
67a8dbbc JC |
1422 | mcam_ctlr_power_down(cam); |
1423 | } | |
b5210fd2 | 1424 | vb2_queue_release(&cam->vb_queue); |
67a8dbbc | 1425 | mcam_free_dma_bufs(cam); |
abfa3df3 JC |
1426 | video_unregister_device(&cam->vdev); |
1427 | v4l2_device_unregister(&cam->v4l2_dev); | |
1428 | } | |
1429 | ||
1430 | /* | |
1431 | * Power management | |
1432 | */ | |
1433 | #ifdef CONFIG_PM | |
1434 | ||
1435 | void mccic_suspend(struct mcam_camera *cam) | |
1436 | { | |
1437 | enum mcam_state cstate = cam->state; | |
1438 | ||
1439 | mcam_ctlr_stop_dma(cam); | |
1440 | mcam_ctlr_power_down(cam); | |
1441 | cam->state = cstate; | |
1442 | } | |
1443 | ||
1444 | int mccic_resume(struct mcam_camera *cam) | |
1445 | { | |
1446 | int ret = 0; | |
1447 | ||
1448 | mutex_lock(&cam->s_mutex); | |
1449 | if (cam->users > 0) { | |
1450 | mcam_ctlr_power_up(cam); | |
1451 | __mcam_cam_reset(cam); | |
1452 | } else { | |
1453 | mcam_ctlr_power_down(cam); | |
1454 | } | |
1455 | mutex_unlock(&cam->s_mutex); | |
1456 | ||
1457 | set_bit(CF_CONFIG_NEEDED, &cam->flags); | |
b5210fd2 | 1458 | if (cam->state == S_STREAMING) |
abfa3df3 JC |
1459 | ret = mcam_read_setup(cam, cam->state); |
1460 | return ret; | |
1461 | } | |
1462 | #endif /* CONFIG_PM */ |