Merge remote-tracking branch 'iommu/next'
[deliverable/linux.git] / drivers / mtd / nand / gpmi-nand / gpmi-nand.c
CommitLineData
10a2bcae
HS
1/*
2 * Freescale GPMI NAND Flash Driver
3 *
026918e7 4 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
10a2bcae
HS
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21#include <linux/clk.h>
22#include <linux/slab.h>
23#include <linux/interrupt.h>
df16c86a 24#include <linux/module.h>
10a2bcae 25#include <linux/mtd/partitions.h>
e10db1f0
HS
26#include <linux/of.h>
27#include <linux/of_device.h>
10a2bcae 28#include "gpmi-nand.h"
b8e2931d 29#include "bch-regs.h"
10a2bcae 30
5de0b52e
HS
31/* Resource names for the GPMI NAND driver. */
32#define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
33#define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
34#define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
5de0b52e 35
10a2bcae
HS
36/* add our owner bbt descriptor */
37static uint8_t scan_ff_pattern[] = { 0xff };
38static struct nand_bbt_descr gpmi_bbt_descr = {
39 .options = 0,
40 .offs = 0,
41 .len = 1,
42 .pattern = scan_ff_pattern
43};
44
7a2b89ac
HS
45/*
46 * We may change the layout if we can get the ECC info from the datasheet,
47 * else we will use all the (page + OOB).
48 */
3f158e47
BB
49static int gpmi_ooblayout_ecc(struct mtd_info *mtd, int section,
50 struct mtd_oob_region *oobregion)
51{
52 struct nand_chip *chip = mtd_to_nand(mtd);
53 struct gpmi_nand_data *this = nand_get_controller_data(chip);
54 struct bch_geometry *geo = &this->bch_geometry;
55
56 if (section)
57 return -ERANGE;
58
59 oobregion->offset = 0;
60 oobregion->length = geo->page_size - mtd->writesize;
61
62 return 0;
63}
64
65static int gpmi_ooblayout_free(struct mtd_info *mtd, int section,
66 struct mtd_oob_region *oobregion)
67{
68 struct nand_chip *chip = mtd_to_nand(mtd);
69 struct gpmi_nand_data *this = nand_get_controller_data(chip);
70 struct bch_geometry *geo = &this->bch_geometry;
71
72 if (section)
73 return -ERANGE;
74
75 /* The available oob size we have. */
76 if (geo->page_size < mtd->writesize + mtd->oobsize) {
77 oobregion->offset = geo->page_size - mtd->writesize;
78 oobregion->length = mtd->oobsize - oobregion->offset;
79 }
80
81 return 0;
82}
83
84static const struct mtd_ooblayout_ops gpmi_ooblayout_ops = {
85 .ecc = gpmi_ooblayout_ecc,
86 .free = gpmi_ooblayout_free,
10a2bcae
HS
87};
88
6189cccb
HS
89static const struct gpmi_devdata gpmi_devdata_imx23 = {
90 .type = IS_MX23,
91 .bch_max_ecc_strength = 20,
92 .max_chain_delay = 16,
93};
94
95static const struct gpmi_devdata gpmi_devdata_imx28 = {
96 .type = IS_MX28,
97 .bch_max_ecc_strength = 20,
98 .max_chain_delay = 16,
99};
100
101static const struct gpmi_devdata gpmi_devdata_imx6q = {
102 .type = IS_MX6Q,
103 .bch_max_ecc_strength = 40,
104 .max_chain_delay = 12,
105};
106
91f5498e
HS
107static const struct gpmi_devdata gpmi_devdata_imx6sx = {
108 .type = IS_MX6SX,
109 .bch_max_ecc_strength = 62,
110 .max_chain_delay = 12,
111};
112
10a2bcae
HS
113static irqreturn_t bch_irq(int irq, void *cookie)
114{
115 struct gpmi_nand_data *this = cookie;
116
117 gpmi_clear_bch(this);
118 complete(&this->bch_done);
119 return IRQ_HANDLED;
120}
121
122/*
123 * Calculate the ECC strength by hand:
124 * E : The ECC strength.
125 * G : the length of Galois Field.
126 * N : The chunk count of per page.
127 * O : the oobsize of the NAND chip.
128 * M : the metasize of per page.
129 *
130 * The formula is :
131 * E * G * N
132 * ------------ <= (O - M)
133 * 8
134 *
135 * So, we get E by:
136 * (O - M) * 8
137 * E <= -------------
138 * G * N
139 */
140static inline int get_ecc_strength(struct gpmi_nand_data *this)
141{
142 struct bch_geometry *geo = &this->bch_geometry;
2a690b25 143 struct mtd_info *mtd = nand_to_mtd(&this->nand);
10a2bcae
HS
144 int ecc_strength;
145
146 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
147 / (geo->gf_len * geo->ecc_chunk_count);
148
149 /* We need the minor even number. */
150 return round_down(ecc_strength, 2);
151}
152
92d0e09a
HS
153static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
154{
155 struct bch_geometry *geo = &this->bch_geometry;
156
157 /* Do the sanity check. */
158 if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
159 /* The mx23/mx28 only support the GF13. */
160 if (geo->gf_len == 14)
161 return false;
92d0e09a 162 }
6189cccb 163 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength;
92d0e09a
HS
164}
165
2febcdf8
HS
166/*
167 * If we can get the ECC information from the nand chip, we do not
168 * need to calculate them ourselves.
169 *
170 * We may have available oob space in this case.
171 */
b8b0e465 172static int set_geometry_by_ecc_info(struct gpmi_nand_data *this)
2febcdf8
HS
173{
174 struct bch_geometry *geo = &this->bch_geometry;
2a690b25
BB
175 struct nand_chip *chip = &this->nand;
176 struct mtd_info *mtd = nand_to_mtd(chip);
2febcdf8
HS
177 unsigned int block_mark_bit_offset;
178
179 if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
b8b0e465 180 return -EINVAL;
2febcdf8
HS
181
182 switch (chip->ecc_step_ds) {
183 case SZ_512:
184 geo->gf_len = 13;
185 break;
186 case SZ_1K:
187 geo->gf_len = 14;
188 break;
189 default:
190 dev_err(this->dev,
191 "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
192 chip->ecc_strength_ds, chip->ecc_step_ds);
b8b0e465 193 return -EINVAL;
2febcdf8
HS
194 }
195 geo->ecc_chunk_size = chip->ecc_step_ds;
196 geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
197 if (!gpmi_check_ecc(this))
b8b0e465 198 return -EINVAL;
2febcdf8
HS
199
200 /* Keep the C >= O */
201 if (geo->ecc_chunk_size < mtd->oobsize) {
202 dev_err(this->dev,
203 "unsupported nand chip. ecc size: %d, oob size : %d\n",
204 chip->ecc_step_ds, mtd->oobsize);
b8b0e465 205 return -EINVAL;
2febcdf8
HS
206 }
207
208 /* The default value, see comment in the legacy_set_geometry(). */
209 geo->metadata_size = 10;
210
211 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
212
213 /*
214 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below:
215 *
216 * | P |
217 * |<----------------------------------------------------->|
218 * | |
219 * | (Block Mark) |
220 * | P' | | | |
221 * |<-------------------------------------------->| D | | O' |
222 * | |<---->| |<--->|
223 * V V V V V
224 * +---+----------+-+----------+-+----------+-+----------+-+-----+
225 * | M | data |E| data |E| data |E| data |E| |
226 * +---+----------+-+----------+-+----------+-+----------+-+-----+
227 * ^ ^
228 * | O |
229 * |<------------>|
230 * | |
231 *
232 * P : the page size for BCH module.
233 * E : The ECC strength.
234 * G : the length of Galois Field.
235 * N : The chunk count of per page.
236 * M : the metasize of per page.
237 * C : the ecc chunk size, aka the "data" above.
238 * P': the nand chip's page size.
239 * O : the nand chip's oob size.
240 * O': the free oob.
241 *
242 * The formula for P is :
243 *
244 * E * G * N
245 * P = ------------ + P' + M
246 * 8
247 *
248 * The position of block mark moves forward in the ECC-based view
249 * of page, and the delta is:
250 *
251 * E * G * (N - 1)
252 * D = (---------------- + M)
253 * 8
254 *
255 * Please see the comment in legacy_set_geometry().
256 * With the condition C >= O , we still can get same result.
257 * So the bit position of the physical block mark within the ECC-based
258 * view of the page is :
259 * (P' - D) * 8
260 */
261 geo->page_size = mtd->writesize + geo->metadata_size +
262 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
263
2febcdf8
HS
264 geo->payload_size = mtd->writesize;
265
266 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
267 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
268 + ALIGN(geo->ecc_chunk_count, 4);
269
270 if (!this->swap_block_mark)
b8b0e465 271 return 0;
2febcdf8
HS
272
273 /* For bit swap. */
274 block_mark_bit_offset = mtd->writesize * 8 -
275 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
276 + geo->metadata_size * 8);
277
278 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
279 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
b8b0e465 280 return 0;
2febcdf8
HS
281}
282
283static int legacy_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
284{
285 struct bch_geometry *geo = &this->bch_geometry;
2a690b25 286 struct mtd_info *mtd = nand_to_mtd(&this->nand);
10a2bcae
HS
287 unsigned int metadata_size;
288 unsigned int status_size;
289 unsigned int block_mark_bit_offset;
290
291 /*
292 * The size of the metadata can be changed, though we set it to 10
293 * bytes now. But it can't be too large, because we have to save
294 * enough space for BCH.
295 */
296 geo->metadata_size = 10;
297
298 /* The default for the length of Galois Field. */
299 geo->gf_len = 13;
300
9ff16f08 301 /* The default for chunk size. */
10a2bcae 302 geo->ecc_chunk_size = 512;
9ff16f08 303 while (geo->ecc_chunk_size < mtd->oobsize) {
10a2bcae 304 geo->ecc_chunk_size *= 2; /* keep C >= O */
9ff16f08
HS
305 geo->gf_len = 14;
306 }
10a2bcae
HS
307
308 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
309
310 /* We use the same ECC strength for all chunks. */
311 geo->ecc_strength = get_ecc_strength(this);
92d0e09a
HS
312 if (!gpmi_check_ecc(this)) {
313 dev_err(this->dev,
b8b0e465
HX
314 "ecc strength: %d cannot be supported by the controller (%d)\n"
315 "try to use minimum ecc strength that NAND chip required\n",
d8c0372b 316 geo->ecc_strength,
6189cccb 317 this->devdata->bch_max_ecc_strength);
10a2bcae
HS
318 return -EINVAL;
319 }
320
2ab20271
HX
321 geo->page_size = mtd->writesize + geo->metadata_size +
322 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
10a2bcae
HS
323 geo->payload_size = mtd->writesize;
324
325 /*
326 * The auxiliary buffer contains the metadata and the ECC status. The
327 * metadata is padded to the nearest 32-bit boundary. The ECC status
328 * contains one byte for every ECC chunk, and is also padded to the
329 * nearest 32-bit boundary.
330 */
331 metadata_size = ALIGN(geo->metadata_size, 4);
332 status_size = ALIGN(geo->ecc_chunk_count, 4);
333
334 geo->auxiliary_size = metadata_size + status_size;
335 geo->auxiliary_status_offset = metadata_size;
336
337 if (!this->swap_block_mark)
338 return 0;
339
340 /*
341 * We need to compute the byte and bit offsets of
342 * the physical block mark within the ECC-based view of the page.
343 *
344 * NAND chip with 2K page shows below:
345 * (Block Mark)
346 * | |
347 * | D |
348 * |<---->|
349 * V V
350 * +---+----------+-+----------+-+----------+-+----------+-+
351 * | M | data |E| data |E| data |E| data |E|
352 * +---+----------+-+----------+-+----------+-+----------+-+
353 *
354 * The position of block mark moves forward in the ECC-based view
355 * of page, and the delta is:
356 *
357 * E * G * (N - 1)
358 * D = (---------------- + M)
359 * 8
360 *
361 * With the formula to compute the ECC strength, and the condition
362 * : C >= O (C is the ecc chunk size)
363 *
364 * It's easy to deduce to the following result:
365 *
366 * E * G (O - M) C - M C - M
367 * ----------- <= ------- <= -------- < ---------
368 * 8 N N (N - 1)
369 *
370 * So, we get:
371 *
372 * E * G * (N - 1)
373 * D = (---------------- + M) < C
374 * 8
375 *
376 * The above inequality means the position of block mark
377 * within the ECC-based view of the page is still in the data chunk,
378 * and it's NOT in the ECC bits of the chunk.
379 *
380 * Use the following to compute the bit position of the
381 * physical block mark within the ECC-based view of the page:
382 * (page_size - D) * 8
383 *
384 * --Huang Shijie
385 */
386 block_mark_bit_offset = mtd->writesize * 8 -
387 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
388 + geo->metadata_size * 8);
389
390 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
391 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
392 return 0;
393}
394
2febcdf8
HS
395int common_nfc_set_geometry(struct gpmi_nand_data *this)
396{
b8b0e465
HX
397 if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc"))
398 || legacy_set_geometry(this))
399 return set_geometry_by_ecc_info(this);
400
401 return 0;
2febcdf8
HS
402}
403
10a2bcae
HS
404struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
405{
a7c12d01
HS
406 /* We use the DMA channel 0 to access all the nand chips. */
407 return this->dma_chans[0];
10a2bcae
HS
408}
409
410/* Can we use the upper's buffer directly for DMA? */
411void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
412{
413 struct scatterlist *sgl = &this->data_sgl;
414 int ret;
415
10a2bcae 416 /* first try to map the upper buffer directly */
0ff76a92
HS
417 if (virt_addr_valid(this->upper_buf) &&
418 !object_is_on_stack(this->upper_buf)) {
419 sg_init_one(sgl, this->upper_buf, this->upper_len);
10a2bcae
HS
420 ret = dma_map_sg(this->dev, sgl, 1, dr);
421 if (ret == 0)
0ff76a92 422 goto map_fail;
10a2bcae 423
0ff76a92
HS
424 this->direct_dma_map_ok = true;
425 return;
10a2bcae 426 }
0ff76a92
HS
427
428map_fail:
429 /* We have to use our own DMA buffer. */
430 sg_init_one(sgl, this->data_buffer_dma, this->upper_len);
431
432 if (dr == DMA_TO_DEVICE)
433 memcpy(this->data_buffer_dma, this->upper_buf, this->upper_len);
434
435 dma_map_sg(this->dev, sgl, 1, dr);
436
437 this->direct_dma_map_ok = false;
10a2bcae
HS
438}
439
440/* This will be called after the DMA operation is finished. */
441static void dma_irq_callback(void *param)
442{
443 struct gpmi_nand_data *this = param;
444 struct completion *dma_c = &this->dma_done;
445
10a2bcae
HS
446 switch (this->dma_type) {
447 case DMA_FOR_COMMAND:
448 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
449 break;
450
451 case DMA_FOR_READ_DATA:
452 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
453 if (this->direct_dma_map_ok == false)
454 memcpy(this->upper_buf, this->data_buffer_dma,
455 this->upper_len);
456 break;
457
458 case DMA_FOR_WRITE_DATA:
459 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
460 break;
461
462 case DMA_FOR_READ_ECC_PAGE:
463 case DMA_FOR_WRITE_ECC_PAGE:
464 /* We have to wait the BCH interrupt to finish. */
465 break;
466
467 default:
da40c16a 468 dev_err(this->dev, "in wrong DMA operation.\n");
10a2bcae 469 }
7b3d2fb9
HS
470
471 complete(dma_c);
10a2bcae
HS
472}
473
474int start_dma_without_bch_irq(struct gpmi_nand_data *this,
475 struct dma_async_tx_descriptor *desc)
476{
477 struct completion *dma_c = &this->dma_done;
706d5b28 478 unsigned long timeout;
10a2bcae
HS
479
480 init_completion(dma_c);
481
482 desc->callback = dma_irq_callback;
483 desc->callback_param = this;
484 dmaengine_submit(desc);
d04525ed 485 dma_async_issue_pending(get_dma_chan(this));
10a2bcae
HS
486
487 /* Wait for the interrupt from the DMA block. */
706d5b28
NMG
488 timeout = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
489 if (!timeout) {
da40c16a
HS
490 dev_err(this->dev, "DMA timeout, last DMA :%d\n",
491 this->last_dma_type);
10a2bcae
HS
492 gpmi_dump_info(this);
493 return -ETIMEDOUT;
494 }
495 return 0;
496}
497
498/*
499 * This function is used in BCH reading or BCH writing pages.
500 * It will wait for the BCH interrupt as long as ONE second.
501 * Actually, we must wait for two interrupts :
502 * [1] firstly the DMA interrupt and
503 * [2] secondly the BCH interrupt.
504 */
505int start_dma_with_bch_irq(struct gpmi_nand_data *this,
506 struct dma_async_tx_descriptor *desc)
507{
508 struct completion *bch_c = &this->bch_done;
706d5b28 509 unsigned long timeout;
10a2bcae
HS
510
511 /* Prepare to receive an interrupt from the BCH block. */
512 init_completion(bch_c);
513
514 /* start the DMA */
515 start_dma_without_bch_irq(this, desc);
516
517 /* Wait for the interrupt from the BCH block. */
706d5b28
NMG
518 timeout = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
519 if (!timeout) {
da40c16a
HS
520 dev_err(this->dev, "BCH timeout, last DMA :%d\n",
521 this->last_dma_type);
10a2bcae
HS
522 gpmi_dump_info(this);
523 return -ETIMEDOUT;
524 }
525 return 0;
526}
527
d8929942
GKH
528static int acquire_register_block(struct gpmi_nand_data *this,
529 const char *res_name)
10a2bcae
HS
530{
531 struct platform_device *pdev = this->pdev;
532 struct resources *res = &this->resources;
533 struct resource *r;
513d57e1 534 void __iomem *p;
10a2bcae
HS
535
536 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
87a9d698
HS
537 p = devm_ioremap_resource(&pdev->dev, r);
538 if (IS_ERR(p))
539 return PTR_ERR(p);
10a2bcae
HS
540
541 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
542 res->gpmi_regs = p;
543 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
544 res->bch_regs = p;
545 else
da40c16a 546 dev_err(this->dev, "unknown resource name : %s\n", res_name);
10a2bcae
HS
547
548 return 0;
549}
550
d8929942 551static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
10a2bcae
HS
552{
553 struct platform_device *pdev = this->pdev;
10a2bcae
HS
554 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
555 struct resource *r;
556 int err;
557
558 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
559 if (!r) {
da40c16a 560 dev_err(this->dev, "Can't get resource for %s\n", res_name);
52a073bd 561 return -ENODEV;
10a2bcae
HS
562 }
563
3cb2c1ed
HS
564 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this);
565 if (err)
566 dev_err(this->dev, "error requesting BCH IRQ\n");
10a2bcae 567
3cb2c1ed 568 return err;
10a2bcae
HS
569}
570
10a2bcae
HS
571static void release_dma_channels(struct gpmi_nand_data *this)
572{
573 unsigned int i;
574 for (i = 0; i < DMA_CHANS; i++)
575 if (this->dma_chans[i]) {
576 dma_release_channel(this->dma_chans[i]);
577 this->dma_chans[i] = NULL;
578 }
579}
580
06f25510 581static int acquire_dma_channels(struct gpmi_nand_data *this)
10a2bcae
HS
582{
583 struct platform_device *pdev = this->pdev;
e10db1f0 584 struct dma_chan *dma_chan;
10a2bcae 585
e10db1f0 586 /* request dma channel */
5fac0e18 587 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
e10db1f0 588 if (!dma_chan) {
da40c16a 589 dev_err(this->dev, "Failed to request DMA channel.\n");
e10db1f0 590 goto acquire_err;
10a2bcae
HS
591 }
592
e10db1f0 593 this->dma_chans[0] = dma_chan;
10a2bcae
HS
594 return 0;
595
596acquire_err:
10a2bcae
HS
597 release_dma_channels(this);
598 return -EINVAL;
599}
600
ff506172
HS
601static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = {
602 "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
603};
604
06f25510 605static int gpmi_get_clks(struct gpmi_nand_data *this)
ff506172
HS
606{
607 struct resources *r = &this->resources;
608 char **extra_clks = NULL;
609 struct clk *clk;
d1cb556c 610 int err, i;
ff506172
HS
611
612 /* The main clock is stored in the first. */
554cbc50 613 r->clock[0] = devm_clk_get(this->dev, "gpmi_io");
d1cb556c
MM
614 if (IS_ERR(r->clock[0])) {
615 err = PTR_ERR(r->clock[0]);
ff506172 616 goto err_clock;
d1cb556c 617 }
ff506172
HS
618
619 /* Get extra clocks */
91f5498e 620 if (GPMI_IS_MX6(this))
ff506172
HS
621 extra_clks = extra_clks_for_mx6q;
622 if (!extra_clks)
623 return 0;
624
625 for (i = 1; i < GPMI_CLK_MAX; i++) {
626 if (extra_clks[i - 1] == NULL)
627 break;
628
554cbc50 629 clk = devm_clk_get(this->dev, extra_clks[i - 1]);
d1cb556c
MM
630 if (IS_ERR(clk)) {
631 err = PTR_ERR(clk);
ff506172 632 goto err_clock;
d1cb556c 633 }
ff506172
HS
634
635 r->clock[i] = clk;
636 }
637
91f5498e 638 if (GPMI_IS_MX6(this))
ff506172 639 /*
91f5498e 640 * Set the default value for the gpmi clock.
ff506172 641 *
e1ca95e3
HS
642 * If you want to use the ONFI nand which is in the
643 * Synchronous Mode, you should change the clock as you need.
ff506172
HS
644 */
645 clk_set_rate(r->clock[0], 22000000);
e1ca95e3 646
ff506172
HS
647 return 0;
648
649err_clock:
650 dev_dbg(this->dev, "failed in finding the clocks.\n");
d1cb556c 651 return err;
ff506172
HS
652}
653
06f25510 654static int acquire_resources(struct gpmi_nand_data *this)
10a2bcae 655{
10a2bcae
HS
656 int ret;
657
658 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
659 if (ret)
660 goto exit_regs;
661
662 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
663 if (ret)
664 goto exit_regs;
665
666 ret = acquire_bch_irq(this, bch_irq);
667 if (ret)
668 goto exit_regs;
669
670 ret = acquire_dma_channels(this);
671 if (ret)
3cb2c1ed 672 goto exit_regs;
10a2bcae 673
ff506172
HS
674 ret = gpmi_get_clks(this);
675 if (ret)
10a2bcae 676 goto exit_clock;
10a2bcae
HS
677 return 0;
678
679exit_clock:
680 release_dma_channels(this);
10a2bcae 681exit_regs:
10a2bcae
HS
682 return ret;
683}
684
685static void release_resources(struct gpmi_nand_data *this)
686{
10a2bcae
HS
687 release_dma_channels(this);
688}
689
06f25510 690static int init_hardware(struct gpmi_nand_data *this)
10a2bcae
HS
691{
692 int ret;
693
694 /*
695 * This structure contains the "safe" GPMI timing that should succeed
696 * with any NAND Flash device
697 * (although, with less-than-optimal performance).
698 */
699 struct nand_timing safe_timing = {
700 .data_setup_in_ns = 80,
701 .data_hold_in_ns = 60,
702 .address_setup_in_ns = 25,
703 .gpmi_sample_delay_in_ns = 6,
704 .tREA_in_ns = -1,
705 .tRLOH_in_ns = -1,
706 .tRHOH_in_ns = -1,
707 };
708
709 /* Initialize the hardwares. */
710 ret = gpmi_init(this);
711 if (ret)
712 return ret;
713
714 this->timing = safe_timing;
715 return 0;
716}
717
718static int read_page_prepare(struct gpmi_nand_data *this,
719 void *destination, unsigned length,
720 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
721 void **use_virt, dma_addr_t *use_phys)
722{
723 struct device *dev = this->dev;
724
725 if (virt_addr_valid(destination)) {
726 dma_addr_t dest_phys;
727
728 dest_phys = dma_map_single(dev, destination,
729 length, DMA_FROM_DEVICE);
730 if (dma_mapping_error(dev, dest_phys)) {
731 if (alt_size < length) {
da40c16a 732 dev_err(dev, "Alternate buffer is too small\n");
10a2bcae
HS
733 return -ENOMEM;
734 }
735 goto map_failed;
736 }
737 *use_virt = destination;
738 *use_phys = dest_phys;
739 this->direct_dma_map_ok = true;
740 return 0;
741 }
742
743map_failed:
744 *use_virt = alt_virt;
745 *use_phys = alt_phys;
746 this->direct_dma_map_ok = false;
747 return 0;
748}
749
750static inline void read_page_end(struct gpmi_nand_data *this,
751 void *destination, unsigned length,
752 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
753 void *used_virt, dma_addr_t used_phys)
754{
755 if (this->direct_dma_map_ok)
756 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
757}
758
759static inline void read_page_swap_end(struct gpmi_nand_data *this,
760 void *destination, unsigned length,
761 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
762 void *used_virt, dma_addr_t used_phys)
763{
764 if (!this->direct_dma_map_ok)
765 memcpy(destination, alt_virt, length);
766}
767
768static int send_page_prepare(struct gpmi_nand_data *this,
769 const void *source, unsigned length,
770 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
771 const void **use_virt, dma_addr_t *use_phys)
772{
773 struct device *dev = this->dev;
774
775 if (virt_addr_valid(source)) {
776 dma_addr_t source_phys;
777
778 source_phys = dma_map_single(dev, (void *)source, length,
779 DMA_TO_DEVICE);
780 if (dma_mapping_error(dev, source_phys)) {
781 if (alt_size < length) {
da40c16a 782 dev_err(dev, "Alternate buffer is too small\n");
10a2bcae
HS
783 return -ENOMEM;
784 }
785 goto map_failed;
786 }
787 *use_virt = source;
788 *use_phys = source_phys;
789 return 0;
790 }
791map_failed:
792 /*
793 * Copy the content of the source buffer into the alternate
794 * buffer and set up the return values accordingly.
795 */
796 memcpy(alt_virt, source, length);
797
798 *use_virt = alt_virt;
799 *use_phys = alt_phys;
800 return 0;
801}
802
803static void send_page_end(struct gpmi_nand_data *this,
804 const void *source, unsigned length,
805 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
806 const void *used_virt, dma_addr_t used_phys)
807{
808 struct device *dev = this->dev;
809 if (used_virt == source)
810 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
811}
812
813static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
814{
815 struct device *dev = this->dev;
816
817 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
818 dma_free_coherent(dev, this->page_buffer_size,
819 this->page_buffer_virt,
820 this->page_buffer_phys);
821 kfree(this->cmd_buffer);
822 kfree(this->data_buffer_dma);
da3bc42c 823 kfree(this->raw_buffer);
10a2bcae
HS
824
825 this->cmd_buffer = NULL;
826 this->data_buffer_dma = NULL;
2cd395d1 827 this->raw_buffer = NULL;
10a2bcae
HS
828 this->page_buffer_virt = NULL;
829 this->page_buffer_size = 0;
830}
831
832/* Allocate the DMA buffers */
833static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
834{
835 struct bch_geometry *geo = &this->bch_geometry;
836 struct device *dev = this->dev;
2a690b25 837 struct mtd_info *mtd = nand_to_mtd(&this->nand);
10a2bcae
HS
838
839 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
513d57e1 840 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
10a2bcae
HS
841 if (this->cmd_buffer == NULL)
842 goto error_alloc;
843
06f216c8
HS
844 /*
845 * [2] Allocate a read/write data buffer.
846 * The gpmi_alloc_dma_buffer can be called twice.
847 * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
848 * is called before the nand_scan_ident; and we allocate a buffer
849 * of the real NAND page size when the gpmi_alloc_dma_buffer is
850 * called after the nand_scan_ident.
851 */
852 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
853 GFP_DMA | GFP_KERNEL);
10a2bcae
HS
854 if (this->data_buffer_dma == NULL)
855 goto error_alloc;
856
857 /*
858 * [3] Allocate the page buffer.
859 *
860 * Both the payload buffer and the auxiliary buffer must appear on
861 * 32-bit boundaries. We presume the size of the payload buffer is a
862 * power of two and is much larger than four, which guarantees the
863 * auxiliary buffer will appear on a 32-bit boundary.
864 */
865 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
866 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
867 &this->page_buffer_phys, GFP_DMA);
868 if (!this->page_buffer_virt)
869 goto error_alloc;
870
da3bc42c
BB
871 this->raw_buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
872 if (!this->raw_buffer)
873 goto error_alloc;
10a2bcae
HS
874
875 /* Slice up the page buffer. */
876 this->payload_virt = this->page_buffer_virt;
877 this->payload_phys = this->page_buffer_phys;
878 this->auxiliary_virt = this->payload_virt + geo->payload_size;
879 this->auxiliary_phys = this->payload_phys + geo->payload_size;
880 return 0;
881
882error_alloc:
883 gpmi_free_dma_buffer(this);
10a2bcae
HS
884 return -ENOMEM;
885}
886
887static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
888{
4bd4ebcc 889 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 890 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
891 int ret;
892
893 /*
894 * Every operation begins with a command byte and a series of zero or
895 * more address bytes. These are distinguished by either the Address
896 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
897 * asserted. When MTD is ready to execute the command, it will deassert
898 * both latch enables.
899 *
900 * Rather than run a separate DMA operation for every single byte, we
901 * queue them up and run a single DMA operation for the entire series
902 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
903 */
904 if ((ctrl & (NAND_ALE | NAND_CLE))) {
905 if (data != NAND_CMD_NONE)
906 this->cmd_buffer[this->command_length++] = data;
907 return;
908 }
909
910 if (!this->command_length)
911 return;
912
913 ret = gpmi_send_command(this);
914 if (ret)
da40c16a
HS
915 dev_err(this->dev, "Chip: %u, Error %d\n",
916 this->current_chip, ret);
10a2bcae
HS
917
918 this->command_length = 0;
919}
920
921static int gpmi_dev_ready(struct mtd_info *mtd)
922{
4bd4ebcc 923 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 924 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
925
926 return gpmi_is_ready(this, this->current_chip);
927}
928
929static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
930{
4bd4ebcc 931 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 932 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
933
934 if ((this->current_chip < 0) && (chipnr >= 0))
935 gpmi_begin(this);
936 else if ((this->current_chip >= 0) && (chipnr < 0))
937 gpmi_end(this);
938
939 this->current_chip = chipnr;
940}
941
942static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
943{
4bd4ebcc 944 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 945 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae 946
c2325962 947 dev_dbg(this->dev, "len is %d\n", len);
10a2bcae
HS
948 this->upper_buf = buf;
949 this->upper_len = len;
950
951 gpmi_read_data(this);
952}
953
954static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
955{
4bd4ebcc 956 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 957 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae 958
c2325962 959 dev_dbg(this->dev, "len is %d\n", len);
10a2bcae
HS
960 this->upper_buf = (uint8_t *)buf;
961 this->upper_len = len;
962
963 gpmi_send_data(this);
964}
965
966static uint8_t gpmi_read_byte(struct mtd_info *mtd)
967{
4bd4ebcc 968 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 969 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
970 uint8_t *buf = this->data_buffer_dma;
971
972 gpmi_read_buf(mtd, buf, 1);
973 return buf[0];
974}
975
976/*
977 * Handles block mark swapping.
978 * It can be called in swapping the block mark, or swapping it back,
979 * because the the operations are the same.
980 */
981static void block_mark_swapping(struct gpmi_nand_data *this,
982 void *payload, void *auxiliary)
983{
984 struct bch_geometry *nfc_geo = &this->bch_geometry;
985 unsigned char *p;
986 unsigned char *a;
987 unsigned int bit;
988 unsigned char mask;
989 unsigned char from_data;
990 unsigned char from_oob;
991
992 if (!this->swap_block_mark)
993 return;
994
995 /*
996 * If control arrives here, we're swapping. Make some convenience
997 * variables.
998 */
999 bit = nfc_geo->block_mark_bit_offset;
1000 p = payload + nfc_geo->block_mark_byte_offset;
1001 a = auxiliary;
1002
1003 /*
1004 * Get the byte from the data area that overlays the block mark. Since
1005 * the ECC engine applies its own view to the bits in the page, the
1006 * physical block mark won't (in general) appear on a byte boundary in
1007 * the data.
1008 */
1009 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
1010
1011 /* Get the byte from the OOB. */
1012 from_oob = a[0];
1013
1014 /* Swap them. */
1015 a[0] = from_data;
1016
1017 mask = (0x1 << bit) - 1;
1018 p[0] = (p[0] & mask) | (from_oob << bit);
1019
1020 mask = ~0 << bit;
1021 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
1022}
1023
1024static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1fbb938d 1025 uint8_t *buf, int oob_required, int page)
10a2bcae 1026{
d699ed25 1027 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
1028 struct bch_geometry *nfc_geo = &this->bch_geometry;
1029 void *payload_virt;
1030 dma_addr_t payload_phys;
1031 void *auxiliary_virt;
1032 dma_addr_t auxiliary_phys;
1033 unsigned int i;
1034 unsigned char *status;
b23b746c 1035 unsigned int max_bitflips = 0;
10a2bcae
HS
1036 int ret;
1037
c2325962 1038 dev_dbg(this->dev, "page number is : %d\n", page);
4a57d670 1039 ret = read_page_prepare(this, buf, nfc_geo->payload_size,
10a2bcae
HS
1040 this->payload_virt, this->payload_phys,
1041 nfc_geo->payload_size,
1042 &payload_virt, &payload_phys);
1043 if (ret) {
da40c16a 1044 dev_err(this->dev, "Inadequate DMA buffer\n");
10a2bcae
HS
1045 ret = -ENOMEM;
1046 return ret;
1047 }
1048 auxiliary_virt = this->auxiliary_virt;
1049 auxiliary_phys = this->auxiliary_phys;
1050
1051 /* go! */
1052 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
4a57d670 1053 read_page_end(this, buf, nfc_geo->payload_size,
10a2bcae
HS
1054 this->payload_virt, this->payload_phys,
1055 nfc_geo->payload_size,
1056 payload_virt, payload_phys);
1057 if (ret) {
da40c16a 1058 dev_err(this->dev, "Error in ECC-based read: %d\n", ret);
b23b746c 1059 return ret;
10a2bcae
HS
1060 }
1061
1062 /* handle the block mark swapping */
1063 block_mark_swapping(this, payload_virt, auxiliary_virt);
1064
1065 /* Loop over status bytes, accumulating ECC status. */
b23b746c 1066 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
10a2bcae 1067
bd2e778c
MP
1068 read_page_swap_end(this, buf, nfc_geo->payload_size,
1069 this->payload_virt, this->payload_phys,
1070 nfc_geo->payload_size,
1071 payload_virt, payload_phys);
1072
10a2bcae
HS
1073 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
1074 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
1075 continue;
1076
1077 if (*status == STATUS_UNCORRECTABLE) {
bd2e778c
MP
1078 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1079 u8 *eccbuf = this->raw_buffer;
1080 int offset, bitoffset;
1081 int eccbytes;
1082 int flips;
1083
1084 /* Read ECC bytes into our internal raw_buffer */
1085 offset = nfc_geo->metadata_size * 8;
1086 offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1);
1087 offset -= eccbits;
1088 bitoffset = offset % 8;
1089 eccbytes = DIV_ROUND_UP(offset + eccbits, 8);
1090 offset /= 8;
1091 eccbytes -= offset;
1092 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, offset, -1);
1093 chip->read_buf(mtd, eccbuf, eccbytes);
1094
1095 /*
1096 * ECC data are not byte aligned and we may have
1097 * in-band data in the first and last byte of
1098 * eccbuf. Set non-eccbits to one so that
1099 * nand_check_erased_ecc_chunk() does not count them
1100 * as bitflips.
1101 */
1102 if (bitoffset)
1103 eccbuf[0] |= GENMASK(bitoffset - 1, 0);
1104
1105 bitoffset = (bitoffset + eccbits) % 8;
1106 if (bitoffset)
1107 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset);
1108
1109 /*
1110 * The ECC hardware has an uncorrectable ECC status
1111 * code in case we have bitflips in an erased page. As
1112 * nothing was written into this subpage the ECC is
1113 * obviously wrong and we can not trust it. We assume
1114 * at this point that we are reading an erased page and
1115 * try to correct the bitflips in buffer up to
1116 * ecc_strength bitflips. If this is a page with random
1117 * data, we exceed this number of bitflips and have a
1118 * ECC failure. Otherwise we use the corrected buffer.
1119 */
1120 if (i == 0) {
1121 /* The first block includes metadata */
1122 flips = nand_check_erased_ecc_chunk(
1123 buf + i * nfc_geo->ecc_chunk_size,
1124 nfc_geo->ecc_chunk_size,
1125 eccbuf, eccbytes,
1126 auxiliary_virt,
1127 nfc_geo->metadata_size,
1128 nfc_geo->ecc_strength);
1129 } else {
1130 flips = nand_check_erased_ecc_chunk(
1131 buf + i * nfc_geo->ecc_chunk_size,
1132 nfc_geo->ecc_chunk_size,
1133 eccbuf, eccbytes,
1134 NULL, 0,
1135 nfc_geo->ecc_strength);
1136 }
1137
1138 if (flips > 0) {
1139 max_bitflips = max_t(unsigned int, max_bitflips,
1140 flips);
1141 mtd->ecc_stats.corrected += flips;
1142 continue;
1143 }
1144
b23b746c 1145 mtd->ecc_stats.failed++;
10a2bcae
HS
1146 continue;
1147 }
bd2e778c 1148
b23b746c
ZS
1149 mtd->ecc_stats.corrected += *status;
1150 max_bitflips = max_t(unsigned int, max_bitflips, *status);
10a2bcae
HS
1151 }
1152
7725cc85
BN
1153 if (oob_required) {
1154 /*
1155 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
1156 * for details about our policy for delivering the OOB.
1157 *
1158 * We fill the caller's buffer with set bits, and then copy the
1159 * block mark to th caller's buffer. Note that, if block mark
1160 * swapping was necessary, it has already been done, so we can
1161 * rely on the first byte of the auxiliary buffer to contain
1162 * the block mark.
1163 */
1164 memset(chip->oob_poi, ~0, mtd->oobsize);
1165 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
7725cc85 1166 }
6023813a 1167
b23b746c 1168 return max_bitflips;
10a2bcae
HS
1169}
1170
b8e2931d
HS
1171/* Fake a virtual small page for the subpage read */
1172static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1173 uint32_t offs, uint32_t len, uint8_t *buf, int page)
1174{
d699ed25 1175 struct gpmi_nand_data *this = nand_get_controller_data(chip);
b8e2931d
HS
1176 void __iomem *bch_regs = this->resources.bch_regs;
1177 struct bch_geometry old_geo = this->bch_geometry;
1178 struct bch_geometry *geo = &this->bch_geometry;
1179 int size = chip->ecc.size; /* ECC chunk size */
1180 int meta, n, page_size;
1181 u32 r1_old, r2_old, r1_new, r2_new;
1182 unsigned int max_bitflips;
1183 int first, last, marker_pos;
1184 int ecc_parity_size;
1185 int col = 0;
2a500afe 1186 int old_swap_block_mark = this->swap_block_mark;
b8e2931d
HS
1187
1188 /* The size of ECC parity */
1189 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
1190
1191 /* Align it with the chunk size */
1192 first = offs / size;
1193 last = (offs + len - 1) / size;
1194
2a500afe
LW
1195 if (this->swap_block_mark) {
1196 /*
1197 * Find the chunk which contains the Block Marker.
1198 * If this chunk is in the range of [first, last],
1199 * we have to read out the whole page.
1200 * Why? since we had swapped the data at the position of Block
1201 * Marker to the metadata which is bound with the chunk 0.
1202 */
1203 marker_pos = geo->block_mark_byte_offset / size;
1204 if (last >= marker_pos && first <= marker_pos) {
1205 dev_dbg(this->dev,
1206 "page:%d, first:%d, last:%d, marker at:%d\n",
b8e2931d 1207 page, first, last, marker_pos);
2a500afe
LW
1208 return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
1209 }
b8e2931d
HS
1210 }
1211
1212 meta = geo->metadata_size;
1213 if (first) {
1214 col = meta + (size + ecc_parity_size) * first;
1215 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1);
1216
1217 meta = 0;
1218 buf = buf + first * size;
1219 }
1220
1221 /* Save the old environment */
1222 r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
1223 r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
1224
1225 /* change the BCH registers and bch_geometry{} */
1226 n = last - first + 1;
1227 page_size = meta + (size + ecc_parity_size) * n;
1228
1229 r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
1230 BM_BCH_FLASH0LAYOUT0_META_SIZE);
1231 r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
1232 | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
1233 writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
1234
1235 r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
1236 r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
1237 writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
1238
1239 geo->ecc_chunk_count = n;
1240 geo->payload_size = n * size;
1241 geo->page_size = page_size;
1242 geo->auxiliary_status_offset = ALIGN(meta, 4);
1243
1244 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
1245 page, offs, len, col, first, n, page_size);
1246
1247 /* Read the subpage now */
1248 this->swap_block_mark = false;
1249 max_bitflips = gpmi_ecc_read_page(mtd, chip, buf, 0, page);
1250
1251 /* Restore */
1252 writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
1253 writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
1254 this->bch_geometry = old_geo;
2a500afe 1255 this->swap_block_mark = old_swap_block_mark;
b8e2931d
HS
1256
1257 return max_bitflips;
1258}
1259
fdbad98d 1260static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
45aaeff9 1261 const uint8_t *buf, int oob_required, int page)
10a2bcae 1262{
d699ed25 1263 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae
HS
1264 struct bch_geometry *nfc_geo = &this->bch_geometry;
1265 const void *payload_virt;
1266 dma_addr_t payload_phys;
1267 const void *auxiliary_virt;
1268 dma_addr_t auxiliary_phys;
1269 int ret;
1270
c2325962 1271 dev_dbg(this->dev, "ecc write page.\n");
10a2bcae
HS
1272 if (this->swap_block_mark) {
1273 /*
1274 * If control arrives here, we're doing block mark swapping.
1275 * Since we can't modify the caller's buffers, we must copy them
1276 * into our own.
1277 */
1278 memcpy(this->payload_virt, buf, mtd->writesize);
1279 payload_virt = this->payload_virt;
1280 payload_phys = this->payload_phys;
1281
1282 memcpy(this->auxiliary_virt, chip->oob_poi,
1283 nfc_geo->auxiliary_size);
1284 auxiliary_virt = this->auxiliary_virt;
1285 auxiliary_phys = this->auxiliary_phys;
1286
1287 /* Handle block mark swapping. */
1288 block_mark_swapping(this,
6a760966 1289 (void *)payload_virt, (void *)auxiliary_virt);
10a2bcae
HS
1290 } else {
1291 /*
1292 * If control arrives here, we're not doing block mark swapping,
1293 * so we can to try and use the caller's buffers.
1294 */
1295 ret = send_page_prepare(this,
1296 buf, mtd->writesize,
1297 this->payload_virt, this->payload_phys,
1298 nfc_geo->payload_size,
1299 &payload_virt, &payload_phys);
1300 if (ret) {
da40c16a 1301 dev_err(this->dev, "Inadequate payload DMA buffer\n");
fdbad98d 1302 return 0;
10a2bcae
HS
1303 }
1304
1305 ret = send_page_prepare(this,
1306 chip->oob_poi, mtd->oobsize,
1307 this->auxiliary_virt, this->auxiliary_phys,
1308 nfc_geo->auxiliary_size,
1309 &auxiliary_virt, &auxiliary_phys);
1310 if (ret) {
da40c16a 1311 dev_err(this->dev, "Inadequate auxiliary DMA buffer\n");
10a2bcae
HS
1312 goto exit_auxiliary;
1313 }
1314 }
1315
1316 /* Ask the NFC. */
1317 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
1318 if (ret)
da40c16a 1319 dev_err(this->dev, "Error in ECC-based write: %d\n", ret);
10a2bcae
HS
1320
1321 if (!this->swap_block_mark) {
1322 send_page_end(this, chip->oob_poi, mtd->oobsize,
1323 this->auxiliary_virt, this->auxiliary_phys,
1324 nfc_geo->auxiliary_size,
1325 auxiliary_virt, auxiliary_phys);
1326exit_auxiliary:
1327 send_page_end(this, buf, mtd->writesize,
1328 this->payload_virt, this->payload_phys,
1329 nfc_geo->payload_size,
1330 payload_virt, payload_phys);
1331 }
fdbad98d
JW
1332
1333 return 0;
10a2bcae
HS
1334}
1335
1336/*
1337 * There are several places in this driver where we have to handle the OOB and
1338 * block marks. This is the function where things are the most complicated, so
1339 * this is where we try to explain it all. All the other places refer back to
1340 * here.
1341 *
1342 * These are the rules, in order of decreasing importance:
1343 *
1344 * 1) Nothing the caller does can be allowed to imperil the block mark.
1345 *
1346 * 2) In read operations, the first byte of the OOB we return must reflect the
1347 * true state of the block mark, no matter where that block mark appears in
1348 * the physical page.
1349 *
1350 * 3) ECC-based read operations return an OOB full of set bits (since we never
1351 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1352 * return).
1353 *
1354 * 4) "Raw" read operations return a direct view of the physical bytes in the
1355 * page, using the conventional definition of which bytes are data and which
1356 * are OOB. This gives the caller a way to see the actual, physical bytes
1357 * in the page, without the distortions applied by our ECC engine.
1358 *
1359 *
1360 * What we do for this specific read operation depends on two questions:
1361 *
1362 * 1) Are we doing a "raw" read, or an ECC-based read?
1363 *
1364 * 2) Are we using block mark swapping or transcription?
1365 *
1366 * There are four cases, illustrated by the following Karnaugh map:
1367 *
1368 * | Raw | ECC-based |
1369 * -------------+-------------------------+-------------------------+
1370 * | Read the conventional | |
1371 * | OOB at the end of the | |
1372 * Swapping | page and return it. It | |
1373 * | contains exactly what | |
1374 * | we want. | Read the block mark and |
1375 * -------------+-------------------------+ return it in a buffer |
1376 * | Read the conventional | full of set bits. |
1377 * | OOB at the end of the | |
1378 * | page and also the block | |
1379 * Transcribing | mark in the metadata. | |
1380 * | Copy the block mark | |
1381 * | into the first byte of | |
1382 * | the OOB. | |
1383 * -------------+-------------------------+-------------------------+
1384 *
1385 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1386 * giving an accurate view of the actual, physical bytes in the page (we're
1387 * overwriting the block mark). That's OK because it's more important to follow
1388 * rule #2.
1389 *
1390 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1391 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1392 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1393 * ECC-based or raw view of the page is implicit in which function it calls
1394 * (there is a similar pair of ECC-based/raw functions for writing).
10a2bcae
HS
1395 */
1396static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
5c2ffb11 1397 int page)
10a2bcae 1398{
d699ed25 1399 struct gpmi_nand_data *this = nand_get_controller_data(chip);
10a2bcae 1400
c2325962 1401 dev_dbg(this->dev, "page number is %d\n", page);
10a2bcae
HS
1402 /* clear the OOB buffer */
1403 memset(chip->oob_poi, ~0, mtd->oobsize);
1404
1405 /* Read out the conventional OOB. */
1406 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1407 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1408
1409 /*
1410 * Now, we want to make sure the block mark is correct. In the
2a500afe
LW
1411 * non-transcribing case (!GPMI_IS_MX23()), we already have it.
1412 * Otherwise, we need to explicitly read it.
10a2bcae 1413 */
2a500afe 1414 if (GPMI_IS_MX23(this)) {
10a2bcae
HS
1415 /* Read the block mark into the first byte of the OOB buffer. */
1416 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1417 chip->oob_poi[0] = chip->read_byte(mtd);
1418 }
1419
5c2ffb11 1420 return 0;
10a2bcae
HS
1421}
1422
1423static int
1424gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1425{
191a8294 1426 struct mtd_oob_region of = { };
7a2b89ac
HS
1427 int status = 0;
1428
1429 /* Do we have available oob area? */
191a8294
BB
1430 mtd_ooblayout_free(mtd, 0, &of);
1431 if (!of.length)
7a2b89ac
HS
1432 return -EPERM;
1433
1434 if (!nand_is_slc(chip))
1435 return -EPERM;
1436
191a8294
BB
1437 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of.offset, page);
1438 chip->write_buf(mtd, chip->oob_poi + of.offset, of.length);
7a2b89ac
HS
1439 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1440
1441 status = chip->waitfunc(mtd, chip);
1442 return status & NAND_STATUS_FAIL ? -EIO : 0;
10a2bcae
HS
1443}
1444
da3bc42c
BB
1445/*
1446 * This function reads a NAND page without involving the ECC engine (no HW
1447 * ECC correction).
1448 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1449 * inline (interleaved with payload DATA), and do not align data chunk on
1450 * byte boundaries.
1451 * We thus need to take care moving the payload data and ECC bits stored in the
1452 * page into the provided buffers, which is why we're using gpmi_copy_bits.
1453 *
1454 * See set_geometry_by_ecc_info inline comments to have a full description
1455 * of the layout used by the GPMI controller.
1456 */
1457static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
1458 struct nand_chip *chip, uint8_t *buf,
1459 int oob_required, int page)
1460{
d699ed25 1461 struct gpmi_nand_data *this = nand_get_controller_data(chip);
da3bc42c
BB
1462 struct bch_geometry *nfc_geo = &this->bch_geometry;
1463 int eccsize = nfc_geo->ecc_chunk_size;
1464 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1465 u8 *tmp_buf = this->raw_buffer;
1466 size_t src_bit_off;
1467 size_t oob_bit_off;
1468 size_t oob_byte_off;
1469 uint8_t *oob = chip->oob_poi;
1470 int step;
1471
1472 chip->read_buf(mtd, tmp_buf,
1473 mtd->writesize + mtd->oobsize);
1474
1475 /*
1476 * If required, swap the bad block marker and the data stored in the
1477 * metadata section, so that we don't wrongly consider a block as bad.
1478 *
1479 * See the layout description for a detailed explanation on why this
1480 * is needed.
1481 */
1482 if (this->swap_block_mark) {
1483 u8 swap = tmp_buf[0];
1484
1485 tmp_buf[0] = tmp_buf[mtd->writesize];
1486 tmp_buf[mtd->writesize] = swap;
1487 }
1488
1489 /*
1490 * Copy the metadata section into the oob buffer (this section is
1491 * guaranteed to be aligned on a byte boundary).
1492 */
1493 if (oob_required)
1494 memcpy(oob, tmp_buf, nfc_geo->metadata_size);
1495
1496 oob_bit_off = nfc_geo->metadata_size * 8;
1497 src_bit_off = oob_bit_off;
1498
1499 /* Extract interleaved payload data and ECC bits */
1500 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1501 if (buf)
1502 gpmi_copy_bits(buf, step * eccsize * 8,
1503 tmp_buf, src_bit_off,
1504 eccsize * 8);
1505 src_bit_off += eccsize * 8;
1506
1507 /* Align last ECC block to align a byte boundary */
1508 if (step == nfc_geo->ecc_chunk_count - 1 &&
1509 (oob_bit_off + eccbits) % 8)
1510 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1511
1512 if (oob_required)
1513 gpmi_copy_bits(oob, oob_bit_off,
1514 tmp_buf, src_bit_off,
1515 eccbits);
1516
1517 src_bit_off += eccbits;
1518 oob_bit_off += eccbits;
1519 }
1520
1521 if (oob_required) {
1522 oob_byte_off = oob_bit_off / 8;
1523
1524 if (oob_byte_off < mtd->oobsize)
1525 memcpy(oob + oob_byte_off,
1526 tmp_buf + mtd->writesize + oob_byte_off,
1527 mtd->oobsize - oob_byte_off);
1528 }
1529
1530 return 0;
1531}
1532
1533/*
1534 * This function writes a NAND page without involving the ECC engine (no HW
1535 * ECC generation).
1536 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1537 * inline (interleaved with payload DATA), and do not align data chunk on
1538 * byte boundaries.
1539 * We thus need to take care moving the OOB area at the right place in the
1540 * final page, which is why we're using gpmi_copy_bits.
1541 *
1542 * See set_geometry_by_ecc_info inline comments to have a full description
1543 * of the layout used by the GPMI controller.
1544 */
1545static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
1546 struct nand_chip *chip,
1547 const uint8_t *buf,
45aaeff9 1548 int oob_required, int page)
da3bc42c 1549{
d699ed25 1550 struct gpmi_nand_data *this = nand_get_controller_data(chip);
da3bc42c
BB
1551 struct bch_geometry *nfc_geo = &this->bch_geometry;
1552 int eccsize = nfc_geo->ecc_chunk_size;
1553 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1554 u8 *tmp_buf = this->raw_buffer;
1555 uint8_t *oob = chip->oob_poi;
1556 size_t dst_bit_off;
1557 size_t oob_bit_off;
1558 size_t oob_byte_off;
1559 int step;
1560
1561 /*
1562 * Initialize all bits to 1 in case we don't have a buffer for the
1563 * payload or oob data in order to leave unspecified bits of data
1564 * to their initial state.
1565 */
1566 if (!buf || !oob_required)
1567 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize);
1568
1569 /*
1570 * First copy the metadata section (stored in oob buffer) at the
1571 * beginning of the page, as imposed by the GPMI layout.
1572 */
1573 memcpy(tmp_buf, oob, nfc_geo->metadata_size);
1574 oob_bit_off = nfc_geo->metadata_size * 8;
1575 dst_bit_off = oob_bit_off;
1576
1577 /* Interleave payload data and ECC bits */
1578 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1579 if (buf)
1580 gpmi_copy_bits(tmp_buf, dst_bit_off,
1581 buf, step * eccsize * 8, eccsize * 8);
1582 dst_bit_off += eccsize * 8;
1583
1584 /* Align last ECC block to align a byte boundary */
1585 if (step == nfc_geo->ecc_chunk_count - 1 &&
1586 (oob_bit_off + eccbits) % 8)
1587 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1588
1589 if (oob_required)
1590 gpmi_copy_bits(tmp_buf, dst_bit_off,
1591 oob, oob_bit_off, eccbits);
1592
1593 dst_bit_off += eccbits;
1594 oob_bit_off += eccbits;
1595 }
1596
1597 oob_byte_off = oob_bit_off / 8;
1598
1599 if (oob_required && oob_byte_off < mtd->oobsize)
1600 memcpy(tmp_buf + mtd->writesize + oob_byte_off,
1601 oob + oob_byte_off, mtd->oobsize - oob_byte_off);
1602
1603 /*
1604 * If required, swap the bad block marker and the first byte of the
1605 * metadata section, so that we don't modify the bad block marker.
1606 *
1607 * See the layout description for a detailed explanation on why this
1608 * is needed.
1609 */
1610 if (this->swap_block_mark) {
1611 u8 swap = tmp_buf[0];
1612
1613 tmp_buf[0] = tmp_buf[mtd->writesize];
1614 tmp_buf[mtd->writesize] = swap;
1615 }
1616
1617 chip->write_buf(mtd, tmp_buf, mtd->writesize + mtd->oobsize);
1618
1619 return 0;
1620}
1621
7ca94e07
BB
1622static int gpmi_ecc_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1623 int page)
1624{
1625 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1626
1627 return gpmi_ecc_read_page_raw(mtd, chip, NULL, 1, page);
1628}
1629
1630static int gpmi_ecc_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1631 int page)
1632{
1633 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0, page);
1634
45aaeff9 1635 return gpmi_ecc_write_page_raw(mtd, chip, NULL, 1, page);
7ca94e07
BB
1636}
1637
10a2bcae
HS
1638static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1639{
4bd4ebcc 1640 struct nand_chip *chip = mtd_to_nand(mtd);
d699ed25 1641 struct gpmi_nand_data *this = nand_get_controller_data(chip);
5a0edb25 1642 int ret = 0;
10a2bcae
HS
1643 uint8_t *block_mark;
1644 int column, page, status, chipnr;
1645
5a0edb25
BN
1646 chipnr = (int)(ofs >> chip->chip_shift);
1647 chip->select_chip(mtd, chipnr);
10a2bcae 1648
2a500afe 1649 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0;
10a2bcae 1650
5a0edb25
BN
1651 /* Write the block mark. */
1652 block_mark = this->data_buffer_dma;
1653 block_mark[0] = 0; /* bad block marker */
10a2bcae 1654
5a0edb25
BN
1655 /* Shift to get page */
1656 page = (int)(ofs >> chip->page_shift);
10a2bcae 1657
5a0edb25
BN
1658 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1659 chip->write_buf(mtd, block_mark, 1);
1660 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
10a2bcae 1661
5a0edb25
BN
1662 status = chip->waitfunc(mtd, chip);
1663 if (status & NAND_STATUS_FAIL)
1664 ret = -EIO;
10a2bcae 1665
5a0edb25 1666 chip->select_chip(mtd, -1);
10a2bcae
HS
1667
1668 return ret;
1669}
1670
a78da287 1671static int nand_boot_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
1672{
1673 struct boot_rom_geometry *geometry = &this->rom_geometry;
1674
1675 /*
1676 * Set the boot block stride size.
1677 *
1678 * In principle, we should be reading this from the OTP bits, since
1679 * that's where the ROM is going to get it. In fact, we don't have any
1680 * way to read the OTP bits, so we go with the default and hope for the
1681 * best.
1682 */
1683 geometry->stride_size_in_pages = 64;
1684
1685 /*
1686 * Set the search area stride exponent.
1687 *
1688 * In principle, we should be reading this from the OTP bits, since
1689 * that's where the ROM is going to get it. In fact, we don't have any
1690 * way to read the OTP bits, so we go with the default and hope for the
1691 * best.
1692 */
1693 geometry->search_area_stride_exponent = 2;
1694 return 0;
1695}
1696
1697static const char *fingerprint = "STMP";
a78da287 1698static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
10a2bcae
HS
1699{
1700 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1701 struct device *dev = this->dev;
10a2bcae 1702 struct nand_chip *chip = &this->nand;
2a690b25 1703 struct mtd_info *mtd = nand_to_mtd(chip);
10a2bcae
HS
1704 unsigned int search_area_size_in_strides;
1705 unsigned int stride;
1706 unsigned int page;
10a2bcae
HS
1707 uint8_t *buffer = chip->buffers->databuf;
1708 int saved_chip_number;
1709 int found_an_ncb_fingerprint = false;
1710
1711 /* Compute the number of strides in a search area. */
1712 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1713
1714 saved_chip_number = this->current_chip;
1715 chip->select_chip(mtd, 0);
1716
1717 /*
1718 * Loop through the first search area, looking for the NCB fingerprint.
1719 */
1720 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1721
1722 for (stride = 0; stride < search_area_size_in_strides; stride++) {
513d57e1 1723 /* Compute the page addresses. */
10a2bcae 1724 page = stride * rom_geo->stride_size_in_pages;
10a2bcae
HS
1725
1726 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1727
1728 /*
1729 * Read the NCB fingerprint. The fingerprint is four bytes long
1730 * and starts in the 12th byte of the page.
1731 */
1732 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1733 chip->read_buf(mtd, buffer, strlen(fingerprint));
1734
1735 /* Look for the fingerprint. */
1736 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1737 found_an_ncb_fingerprint = true;
1738 break;
1739 }
1740
1741 }
1742
1743 chip->select_chip(mtd, saved_chip_number);
1744
1745 if (found_an_ncb_fingerprint)
1746 dev_dbg(dev, "\tFound a fingerprint\n");
1747 else
1748 dev_dbg(dev, "\tNo fingerprint found\n");
1749 return found_an_ncb_fingerprint;
1750}
1751
1752/* Writes a transcription stamp. */
a78da287 1753static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
10a2bcae
HS
1754{
1755 struct device *dev = this->dev;
1756 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
10a2bcae 1757 struct nand_chip *chip = &this->nand;
2a690b25 1758 struct mtd_info *mtd = nand_to_mtd(chip);
10a2bcae
HS
1759 unsigned int block_size_in_pages;
1760 unsigned int search_area_size_in_strides;
1761 unsigned int search_area_size_in_pages;
1762 unsigned int search_area_size_in_blocks;
1763 unsigned int block;
1764 unsigned int stride;
1765 unsigned int page;
10a2bcae
HS
1766 uint8_t *buffer = chip->buffers->databuf;
1767 int saved_chip_number;
1768 int status;
1769
1770 /* Compute the search area geometry. */
1771 block_size_in_pages = mtd->erasesize / mtd->writesize;
1772 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1773 search_area_size_in_pages = search_area_size_in_strides *
1774 rom_geo->stride_size_in_pages;
1775 search_area_size_in_blocks =
1776 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1777 block_size_in_pages;
1778
1779 dev_dbg(dev, "Search Area Geometry :\n");
1780 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1781 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1782 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1783
1784 /* Select chip 0. */
1785 saved_chip_number = this->current_chip;
1786 chip->select_chip(mtd, 0);
1787
1788 /* Loop over blocks in the first search area, erasing them. */
1789 dev_dbg(dev, "Erasing the search area...\n");
1790
1791 for (block = 0; block < search_area_size_in_blocks; block++) {
1792 /* Compute the page address. */
1793 page = block * block_size_in_pages;
1794
1795 /* Erase this block. */
1796 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1797 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1798 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1799
1800 /* Wait for the erase to finish. */
1801 status = chip->waitfunc(mtd, chip);
1802 if (status & NAND_STATUS_FAIL)
1803 dev_err(dev, "[%s] Erase failed.\n", __func__);
1804 }
1805
1806 /* Write the NCB fingerprint into the page buffer. */
1807 memset(buffer, ~0, mtd->writesize);
10a2bcae
HS
1808 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1809
1810 /* Loop through the first search area, writing NCB fingerprints. */
1811 dev_dbg(dev, "Writing NCB fingerprints...\n");
1812 for (stride = 0; stride < search_area_size_in_strides; stride++) {
513d57e1 1813 /* Compute the page addresses. */
10a2bcae 1814 page = stride * rom_geo->stride_size_in_pages;
10a2bcae
HS
1815
1816 /* Write the first page of the current stride. */
1817 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1818 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
45aaeff9 1819 chip->ecc.write_page_raw(mtd, chip, buffer, 0, page);
10a2bcae
HS
1820 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1821
1822 /* Wait for the write to finish. */
1823 status = chip->waitfunc(mtd, chip);
1824 if (status & NAND_STATUS_FAIL)
1825 dev_err(dev, "[%s] Write failed.\n", __func__);
1826 }
1827
1828 /* Deselect chip 0. */
1829 chip->select_chip(mtd, saved_chip_number);
1830 return 0;
1831}
1832
a78da287 1833static int mx23_boot_init(struct gpmi_nand_data *this)
10a2bcae
HS
1834{
1835 struct device *dev = this->dev;
1836 struct nand_chip *chip = &this->nand;
2a690b25 1837 struct mtd_info *mtd = nand_to_mtd(chip);
10a2bcae
HS
1838 unsigned int block_count;
1839 unsigned int block;
1840 int chipnr;
1841 int page;
1842 loff_t byte;
1843 uint8_t block_mark;
1844 int ret = 0;
1845
1846 /*
1847 * If control arrives here, we can't use block mark swapping, which
1848 * means we're forced to use transcription. First, scan for the
1849 * transcription stamp. If we find it, then we don't have to do
1850 * anything -- the block marks are already transcribed.
1851 */
1852 if (mx23_check_transcription_stamp(this))
1853 return 0;
1854
1855 /*
1856 * If control arrives here, we couldn't find a transcription stamp, so
1857 * so we presume the block marks are in the conventional location.
1858 */
1859 dev_dbg(dev, "Transcribing bad block marks...\n");
1860
1861 /* Compute the number of blocks in the entire medium. */
1862 block_count = chip->chipsize >> chip->phys_erase_shift;
1863
1864 /*
1865 * Loop over all the blocks in the medium, transcribing block marks as
1866 * we go.
1867 */
1868 for (block = 0; block < block_count; block++) {
1869 /*
1870 * Compute the chip, page and byte addresses for this block's
1871 * conventional mark.
1872 */
1873 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1874 page = block << (chip->phys_erase_shift - chip->page_shift);
1875 byte = block << chip->phys_erase_shift;
1876
1877 /* Send the command to read the conventional block mark. */
1878 chip->select_chip(mtd, chipnr);
1879 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1880 block_mark = chip->read_byte(mtd);
1881 chip->select_chip(mtd, -1);
1882
1883 /*
1884 * Check if the block is marked bad. If so, we need to mark it
1885 * again, but this time the result will be a mark in the
1886 * location where we transcribe block marks.
1887 */
1888 if (block_mark != 0xff) {
1889 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1890 ret = chip->block_markbad(mtd, byte);
1891 if (ret)
d8c0372b
LW
1892 dev_err(dev,
1893 "Failed to mark block bad with ret %d\n",
1894 ret);
10a2bcae
HS
1895 }
1896 }
1897
1898 /* Write the stamp that indicates we've transcribed the block marks. */
1899 mx23_write_transcription_stamp(this);
1900 return 0;
1901}
1902
a78da287 1903static int nand_boot_init(struct gpmi_nand_data *this)
10a2bcae
HS
1904{
1905 nand_boot_set_geometry(this);
1906
1907 /* This is ROM arch-specific initilization before the BBT scanning. */
1908 if (GPMI_IS_MX23(this))
1909 return mx23_boot_init(this);
1910 return 0;
1911}
1912
a78da287 1913static int gpmi_set_geometry(struct gpmi_nand_data *this)
10a2bcae
HS
1914{
1915 int ret;
1916
1917 /* Free the temporary DMA memory for reading ID. */
1918 gpmi_free_dma_buffer(this);
1919
1920 /* Set up the NFC geometry which is used by BCH. */
1921 ret = bch_set_geometry(this);
1922 if (ret) {
da40c16a 1923 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret);
10a2bcae
HS
1924 return ret;
1925 }
1926
1927 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1928 return gpmi_alloc_dma_buffer(this);
1929}
1930
ccce4177 1931static void gpmi_nand_exit(struct gpmi_nand_data *this)
f720e7ce 1932{
2a690b25 1933 nand_release(nand_to_mtd(&this->nand));
f720e7ce
HS
1934 gpmi_free_dma_buffer(this);
1935}
1936
1937static int gpmi_init_last(struct gpmi_nand_data *this)
10a2bcae 1938{
2a690b25 1939 struct nand_chip *chip = &this->nand;
3f158e47 1940 struct mtd_info *mtd = nand_to_mtd(chip);
f720e7ce
HS
1941 struct nand_ecc_ctrl *ecc = &chip->ecc;
1942 struct bch_geometry *bch_geo = &this->bch_geometry;
10a2bcae
HS
1943 int ret;
1944
d7364a27
HS
1945 /* Set up the medium geometry */
1946 ret = gpmi_set_geometry(this);
10a2bcae
HS
1947 if (ret)
1948 return ret;
1949
f720e7ce
HS
1950 /* Init the nand_ecc_ctrl{} */
1951 ecc->read_page = gpmi_ecc_read_page;
1952 ecc->write_page = gpmi_ecc_write_page;
1953 ecc->read_oob = gpmi_ecc_read_oob;
1954 ecc->write_oob = gpmi_ecc_write_oob;
da3bc42c
BB
1955 ecc->read_page_raw = gpmi_ecc_read_page_raw;
1956 ecc->write_page_raw = gpmi_ecc_write_page_raw;
7ca94e07
BB
1957 ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
1958 ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
f720e7ce
HS
1959 ecc->mode = NAND_ECC_HW;
1960 ecc->size = bch_geo->ecc_chunk_size;
1961 ecc->strength = bch_geo->ecc_strength;
3f158e47 1962 mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops);
f720e7ce 1963
b8e2931d
HS
1964 /*
1965 * We only enable the subpage read when:
1966 * (1) the chip is imx6, and
1967 * (2) the size of the ECC parity is byte aligned.
1968 */
91f5498e 1969 if (GPMI_IS_MX6(this) &&
b8e2931d
HS
1970 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
1971 ecc->read_subpage = gpmi_ecc_read_subpage;
1972 chip->options |= NAND_SUBPAGE_READ;
1973 }
1974
995fbbf5
HS
1975 /*
1976 * Can we enable the extra features? such as EDO or Sync mode.
1977 *
1978 * We do not check the return value now. That's means if we fail in
1979 * enable the extra features, we still can run in the normal way.
1980 */
1981 gpmi_extra_init(this);
1982
f720e7ce 1983 return 0;
10a2bcae
HS
1984}
1985
ccce4177 1986static int gpmi_nand_init(struct gpmi_nand_data *this)
10a2bcae 1987{
10a2bcae 1988 struct nand_chip *chip = &this->nand;
2a690b25 1989 struct mtd_info *mtd = nand_to_mtd(chip);
10a2bcae
HS
1990 int ret;
1991
1992 /* init current chip */
1993 this->current_chip = -1;
1994
1995 /* init the MTD data structures */
10a2bcae 1996 mtd->name = "gpmi-nand";
4dc67b1d 1997 mtd->dev.parent = this->dev;
10a2bcae
HS
1998
1999 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
d699ed25 2000 nand_set_controller_data(chip, this);
a61ae81a 2001 nand_set_flash_node(chip, this->pdev->dev.of_node);
10a2bcae
HS
2002 chip->select_chip = gpmi_select_chip;
2003 chip->cmd_ctrl = gpmi_cmd_ctrl;
2004 chip->dev_ready = gpmi_dev_ready;
2005 chip->read_byte = gpmi_read_byte;
2006 chip->read_buf = gpmi_read_buf;
2007 chip->write_buf = gpmi_write_buf;
10a2bcae
HS
2008 chip->badblock_pattern = &gpmi_bbt_descr;
2009 chip->block_markbad = gpmi_block_markbad;
2010 chip->options |= NAND_NO_SUBPAGE_WRITE;
2a500afe
LW
2011
2012 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
2013 this->swap_block_mark = !GPMI_IS_MX23(this);
2014
f720e7ce
HS
2015 /*
2016 * Allocate a temporary DMA buffer for reading ID in the
2017 * nand_scan_ident().
2018 */
10a2bcae
HS
2019 this->bch_geometry.payload_size = 1024;
2020 this->bch_geometry.auxiliary_size = 128;
2021 ret = gpmi_alloc_dma_buffer(this);
2022 if (ret)
2023 goto err_out;
2024
91f5498e 2025 ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
f720e7ce
HS
2026 if (ret)
2027 goto err_out;
2028
f05f6a10
BB
2029 if (chip->bbt_options & NAND_BBT_USE_FLASH) {
2030 chip->bbt_options |= NAND_BBT_NO_OOB;
2031
2032 if (of_property_read_bool(this->dev->of_node,
2033 "fsl,no-blockmark-swap"))
2034 this->swap_block_mark = false;
2035 }
2036 dev_dbg(this->dev, "Blockmark swapping %sabled\n",
2037 this->swap_block_mark ? "en" : "dis");
2038
f720e7ce
HS
2039 ret = gpmi_init_last(this);
2040 if (ret)
2041 goto err_out;
2042
885d71e5 2043 chip->options |= NAND_SKIP_BBTSCAN;
f720e7ce
HS
2044 ret = nand_scan_tail(mtd);
2045 if (ret)
10a2bcae 2046 goto err_out;
10a2bcae 2047
885d71e5
HS
2048 ret = nand_boot_init(this);
2049 if (ret)
2050 goto err_out;
899b834a
FE
2051 ret = chip->scan_bbt(mtd);
2052 if (ret)
2053 goto err_out;
885d71e5 2054
a61ae81a 2055 ret = mtd_device_register(mtd, NULL, 0);
10a2bcae
HS
2056 if (ret)
2057 goto err_out;
2058 return 0;
2059
2060err_out:
ccce4177 2061 gpmi_nand_exit(this);
10a2bcae
HS
2062 return ret;
2063}
2064
e10db1f0
HS
2065static const struct of_device_id gpmi_nand_id_table[] = {
2066 {
2067 .compatible = "fsl,imx23-gpmi-nand",
6a760966 2068 .data = &gpmi_devdata_imx23,
e10db1f0
HS
2069 }, {
2070 .compatible = "fsl,imx28-gpmi-nand",
6a760966 2071 .data = &gpmi_devdata_imx28,
9013bb40
HS
2072 }, {
2073 .compatible = "fsl,imx6q-gpmi-nand",
6a760966 2074 .data = &gpmi_devdata_imx6q,
91f5498e
HS
2075 }, {
2076 .compatible = "fsl,imx6sx-gpmi-nand",
6a760966 2077 .data = &gpmi_devdata_imx6sx,
e10db1f0
HS
2078 }, {}
2079};
2080MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
2081
06f25510 2082static int gpmi_nand_probe(struct platform_device *pdev)
10a2bcae 2083{
10a2bcae 2084 struct gpmi_nand_data *this;
e10db1f0 2085 const struct of_device_id *of_id;
10a2bcae
HS
2086 int ret;
2087
6189cccb
HS
2088 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
2089 if (!this)
2090 return -ENOMEM;
2091
e10db1f0
HS
2092 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
2093 if (of_id) {
6189cccb 2094 this->devdata = of_id->data;
e10db1f0 2095 } else {
da40c16a 2096 dev_err(&pdev->dev, "Failed to find the right device id.\n");
52a073bd 2097 return -ENODEV;
e10db1f0
HS
2098 }
2099
10a2bcae
HS
2100 platform_set_drvdata(pdev, this);
2101 this->pdev = pdev;
2102 this->dev = &pdev->dev;
10a2bcae
HS
2103
2104 ret = acquire_resources(this);
2105 if (ret)
2106 goto exit_acquire_resources;
2107
2108 ret = init_hardware(this);
2109 if (ret)
2110 goto exit_nfc_init;
2111
ccce4177 2112 ret = gpmi_nand_init(this);
10a2bcae
HS
2113 if (ret)
2114 goto exit_nfc_init;
2115
490e280a
FE
2116 dev_info(this->dev, "driver registered.\n");
2117
10a2bcae
HS
2118 return 0;
2119
2120exit_nfc_init:
2121 release_resources(this);
10a2bcae 2122exit_acquire_resources:
490e280a 2123
10a2bcae
HS
2124 return ret;
2125}
2126
810b7e06 2127static int gpmi_nand_remove(struct platform_device *pdev)
10a2bcae
HS
2128{
2129 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
2130
ccce4177 2131 gpmi_nand_exit(this);
10a2bcae 2132 release_resources(this);
10a2bcae
HS
2133 return 0;
2134}
2135
026918e7
HS
2136#ifdef CONFIG_PM_SLEEP
2137static int gpmi_pm_suspend(struct device *dev)
2138{
2139 struct gpmi_nand_data *this = dev_get_drvdata(dev);
2140
2141 release_dma_channels(this);
2142 return 0;
2143}
2144
2145static int gpmi_pm_resume(struct device *dev)
2146{
2147 struct gpmi_nand_data *this = dev_get_drvdata(dev);
2148 int ret;
2149
2150 ret = acquire_dma_channels(this);
2151 if (ret < 0)
2152 return ret;
2153
2154 /* re-init the GPMI registers */
2155 this->flags &= ~GPMI_TIMING_INIT_OK;
2156 ret = gpmi_init(this);
2157 if (ret) {
2158 dev_err(this->dev, "Error setting GPMI : %d\n", ret);
2159 return ret;
2160 }
2161
2162 /* re-init the BCH registers */
2163 ret = bch_set_geometry(this);
2164 if (ret) {
2165 dev_err(this->dev, "Error setting BCH : %d\n", ret);
2166 return ret;
2167 }
2168
2169 /* re-init others */
2170 gpmi_extra_init(this);
2171
2172 return 0;
2173}
2174#endif /* CONFIG_PM_SLEEP */
2175
2176static const struct dev_pm_ops gpmi_pm_ops = {
2177 SET_SYSTEM_SLEEP_PM_OPS(gpmi_pm_suspend, gpmi_pm_resume)
2178};
2179
10a2bcae
HS
2180static struct platform_driver gpmi_nand_driver = {
2181 .driver = {
2182 .name = "gpmi-nand",
026918e7 2183 .pm = &gpmi_pm_ops,
e10db1f0 2184 .of_match_table = gpmi_nand_id_table,
10a2bcae
HS
2185 },
2186 .probe = gpmi_nand_probe,
5153b88c 2187 .remove = gpmi_nand_remove,
10a2bcae 2188};
490e280a 2189module_platform_driver(gpmi_nand_driver);
10a2bcae
HS
2190
2191MODULE_AUTHOR("Freescale Semiconductor, Inc.");
2192MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
2193MODULE_LICENSE("GPL");
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